fix multi core error of rk3568

This commit is contained in:
lr 2024-07-19 23:15:10 +08:00
parent a8aea9338f
commit ae7992d429
13 changed files with 54 additions and 119 deletions

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@ -73,7 +73,7 @@ Modification:
#include "cortex_a55.h" #include "cortex_a55.h"
#define NR_CPU 2 // maximum number of CPUs #define NR_CPU 4 // maximum number of CPUs
__attribute__((always_inline)) static inline uint64_t EL0_mode() // Set ARM mode to EL0 __attribute__((always_inline)) static inline uint64_t EL0_mode() // Set ARM mode to EL0
{ {

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@ -220,6 +220,7 @@ bool secondary_cpu_hardkernel_init(int cpu_id, struct TraceTag* _hardkernel_tag)
p_icache_driver->enable(); p_icache_driver->enable();
p_dcache_driver->enable(); p_dcache_driver->enable();
// clock // clock
p_clock_driver->sys_clock_init();
p_intr_driver->single_irq_enable(p_clock_driver->get_clock_int(), cpu_id, 0); p_intr_driver->single_irq_enable(p_clock_driver->get_clock_int(), cpu_id, 0);
// mmu // mmu
secondary_cpu_load_kern_pgdir(&init_mmu_tag, &init_intr_tag); secondary_cpu_load_kern_pgdir(&init_mmu_tag, &init_intr_tag);

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@ -55,64 +55,56 @@ Modification:
#define UNLOCKED 0xFF #define UNLOCKED 0xFF
// int spinlock_lock(spinlock_t * lock, uint64_t timeout) // int spinlock_lock(spinlock_t * lock, uint64_t timeout)
.global _spinlock_lock .global _spinlock_lock
.func _spinlock_lock .func _spinlock_lock
_spinlock_lock: _spinlock_lock:
mov w2, #1 mov w2, #1
sevl
1:
wfe
sevl 2:
wfe ldaxrb w1, [x0] // check if the spinlock is currently unlocked
cmp w1, #UNLOCKED
bne 1b
ldaxrb w1, [x0] // check if the spinlock is currently unlocked mrs x1, mpidr_el1 // get our CPU ID
cmp w1, #UNLOCKED and x1, x1, #0xFFF
bne _spinlock_lock lsr x1, x1, #8
stxrb w2, w1, [x0]
cmp x2, #0
bne 2b // check if the write was successful, if the write failed, start over
mrs x1, mpidr_el1 // get our CPU ID dmb ish // Ensure that accesses to shared resource have completed
and x1, x1, #0xFFF
lsr x1, x1, #8
stxrb w2, w1, [x0]
cmp x2, #0
bne _spinlock_lock // check if the write was successful, if the write failed, start over
dmb ish // Ensure that accesses to shared resource have completed mov x0, #0
ret
mov x0, #0 .endfunc
ret
.endfunc
// void spinlock_unlock(spinlock_t * lock) // void spinlock_unlock(spinlock_t * lock)
.global _spinlock_unlock .global _spinlock_unlock
.func _spinlock_unlock .func _spinlock_unlock
_spinlock_unlock: _spinlock_unlock:
mrs x1, mpidr_el1 // get our CPU ID
and x1, x1, #0xFFF
lsr x1, x1, #8
mrs x1, mpidr_el1 // get our CPU ID ldr w2, [x0]
and x1, x1, #0xFFF cmp w1, w2
lsr x1, x1, #8 bne 1f //doesn't match,jump to 1
ldr w2, [x0] dmb ish
cmp w1, w2 mov w1, #UNLOCKED
bne 1f //doesn't match,jump to 1 str w1, [x0]
dsb ish //Ensure that no instructions following the barrier execute until
// all memory accesses prior to the barrier have completed.
dmb ish sevl // send event to wake up other cores waiting on spinlock
mov w1, #UNLOCKED
str w1, [x0]
dsb ish //Ensure that no instructions following the barrier execute until
// all memory accesses prior to the barrier have completed.
sevl // send event to wake up other cores waiting on spinlock
mov x0, #0 // return success
ret
mov x0, #0 // return success
ret
1: 1:
mov x0, #1 //doesn't match, so exit with failure mov x0, #1 //doesn't match, so exit with failure
ret ret
.endfunc .endfunc
.end .end

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@ -182,25 +182,19 @@ alltraps:
b badtrap b badtrap
badtrap: badtrap:
msr daifset, #0xf
savereg savereg
mov x0, sp mov x0, sp
bl kernel_intr_handler bl kernel_intr_handler
b . b .
el1sync: el1sync:
msr daifset, #0xf
savereg savereg
mov x0, sp mov x0, sp
bl kernel_abort_handler bl kernel_abort_handler
b . b .
el1irq: el1irq:
msr daifset, #0xf
usavereg usavereg
mov x0, sp mov x0, sp
bl intr_irq_dispatch bl intr_irq_dispatch
@ -209,9 +203,7 @@ el1irq:
eret eret
el0sync: el0sync:
msr daifset, #0xf
usavereg usavereg
mov x0, sp mov x0, sp
bl syscall_arch_handler bl syscall_arch_handler
@ -220,9 +212,7 @@ el0sync:
eret eret
el0irq: el0irq:
msr daifset, #0xf
usavereg usavereg
mov x0, sp mov x0, sp
bl intr_irq_dispatch bl intr_irq_dispatch

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@ -59,7 +59,7 @@ __attribute__((optimize("O0"))) void spinlock_init(struct spinlock* lock, char*
} }
extern int _spinlock_lock(struct spinlock* lock, uint32_t timeout); extern int _spinlock_lock(struct spinlock* lock, uint32_t timeout);
extern void _spinlock_unlock(struct spinlock* lock); extern int _spinlock_unlock(struct spinlock* lock);
__attribute__((optimize("O0"))) void spinlock_lock(struct spinlock* lock) __attribute__((optimize("O0"))) void spinlock_lock(struct spinlock* lock)
{ {
@ -88,7 +88,9 @@ __attribute__((optimize("O0"))) void spinlock_unlock(struct spinlock* lock)
_double_list_del(p_lock_node->prev, p_lock_node->next); _double_list_del(p_lock_node->prev, p_lock_node->next);
_spinlock_unlock(&request_lock); _spinlock_unlock(&request_lock);
_spinlock_unlock(lock); if (_spinlock_unlock(lock) != 0) {
ERROR("Core %d trying to unlock a lock belongs to %d.\n", cur_cpuid(), lock->owner_cpu);
}
} }
__attribute__((optimize("O0"))) bool spinlock_try_lock(struct spinlock* lock) __attribute__((optimize("O0"))) bool spinlock_try_lock(struct spinlock* lock)

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@ -35,9 +35,9 @@ Modification:
/* A55 physical memory layout */ /* A55 physical memory layout */
#define PHY_MEM_BASE (0x0000000010000000ULL) #define PHY_MEM_BASE (0x0000000010000000ULL)
#define PHY_USER_FREEMEM_BASE (0x0000000030000000ULL) #define PHY_USER_FREEMEM_BASE (0x0000000040000000ULL)
#define PHY_USER_FREEMEM_TOP (0x0000000040000000ULL) #define PHY_USER_FREEMEM_TOP (0x0000000050000000ULL)
#define PHY_MEM_STOP (0x0000000040000000ULL) #define PHY_MEM_STOP (0x0000000050000000ULL)
/* PTE-PAGE_SIZE */ /* PTE-PAGE_SIZE */
#define LEVEL4_PTE_SHIFT 12 #define LEVEL4_PTE_SHIFT 12
@ -58,7 +58,7 @@ Modification:
#define NUM_TOPLEVEL_PDE NUM_LEVEL2_PDE #define NUM_TOPLEVEL_PDE NUM_LEVEL2_PDE
#define PAGE_SIZE LEVEL4_PTE_SIZE #define PAGE_SIZE LEVEL4_PTE_SIZE
#define MAX_NR_FREE_PAGES ((PHY_MEM_STOP - PHY_MEM_BASE) >> LEVEL4_PTE_SHIFT) #define MAX_NR_FREE_PAGES ((PHY_USER_FREEMEM_BASE - PHY_MEM_BASE) >> LEVEL4_PTE_SHIFT)
/* Deivce memory layout */ /* Deivce memory layout */
#define DEV_PHYMEM_BASE (0x00000000F0000000ULL) #define DEV_PHYMEM_BASE (0x00000000F0000000ULL)

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@ -43,9 +43,9 @@ INC_DIR = -I$(KERNEL_ROOT)/services/shell/letter-shell \
-I$(KERNEL_ROOT)/services/app -I$(KERNEL_ROOT)/services/app
ifeq ($(BOARD), imx6q-sabrelite) ifeq ($(BOARD), imx6q-sabrelite)
all: init test_fault simple_client simple_server shell fs_server semaphore_server test_semaphore test_ipc_null test_thread test_irq_hdlr test_irq_block test_irq_send eth_driver epit_server test_net lwip readme.txt | bin all: test_fault simple_client simple_server shell fs_server semaphore_server test_semaphore test_ipc_null test_thread test_irq_hdlr test_irq_block test_irq_send eth_driver epit_server test_net lwip readme.txt | bin
else else
all: init test_fault simple_client simple_server shell fs_server semaphore_server test_ipc_null test_thread test_semaphore test_net lwip readme.txt eth_hal | bin all: test_fault simple_client simple_server shell fs_server semaphore_server test_ipc_null test_thread test_semaphore test_net lwip readme.txt eth_hal | bin
endif endif
../tools/mkfs/mkfs ./fs.img $^ ../tools/mkfs/mkfs ./fs.img $^
@mv $(filter-out readme.txt, $^) bin @mv $(filter-out readme.txt, $^) bin
@ -97,10 +97,6 @@ shell: shell_port.o libserial.o printf.o shell_cmd_list.o shell.o shell_ext.o li
@${ld} ${user_ldflags} -e main -o $@ $^ ${board_specs} @${ld} ${user_ldflags} -e main -o $@ $^ ${board_specs}
@${objdump} -S $@ > $@.asm @${objdump} -S $@ > $@.asm
init: init.o libfs.o libipc.o session.o libserial.o printf.o usyscall.o arch_usyscall.o libmem.o
@${ld} ${user_ldflags} -e main -o $@ $^ ${board_specs}
@${objdump} -S $@ > $@.asm
test_fault: test_fault.o libserial.o printf.o usyscall.o arch_usyscall.o test_fault: test_fault.o libserial.o printf.o usyscall.o arch_usyscall.o
@${ld} ${user_ldflags} -e main -o $@ $^ ${board_specs} @${ld} ${user_ldflags} -e main -o $@ $^ ${board_specs}
@${objdump} -S $@ > $@.asm @${objdump} -S $@ > $@.asm

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@ -1,43 +0,0 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
// init: The initial user-level program
#include <stdbool.h>
#include "libfs.h"
#include "libserial.h"
#include "usyscall.h"
int main(int argc, char* argv[])
{
struct Session session;
printf("init: connecting MemFS\n");
while (connect_session(&session, "MemFS", 8092) < 0) {
yield(SYS_TASK_YIELD_NO_REASON);
}
printf("init: connect MemFS success\n");
int fd;
char* shell_task_param[2] = { "/shell", 0 };
if ((fd = open(&session, shell_task_param[0])) < 0) {
printf("Open %s failed\n", shell_task_param[0]);
exit(1);
}
if (spawn(&session, fd, read, fsize, shell_task_param[0], shell_task_param) < 0) {
printf("Syscall Spawn shell failed\n");
}
close(&session, fd);
exit(0);
return 0;
}

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@ -349,7 +349,6 @@ IPC_SERVER_REGISTER_INTERFACES(IpcFsServer, 10,
int main(int argc, char* argv[]) int main(int argc, char* argv[])
{ {
printf("MemFS Start\n");
sys_state_info info; sys_state_info info;
get_memblock_info(&info); get_memblock_info(&info);

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@ -35,7 +35,7 @@ user_apps:
.section .rawdata_init .section .rawdata_init
.globl initapp .globl initapp
initapp: initapp:
.incbin "../services/app/bin/init" .incbin "../services/app/bin/shell"
.section .rawdata_memfs .section .rawdata_memfs
.globl memfs .globl memfs

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@ -45,7 +45,7 @@ static struct TraceTag hardkernel_tag, softkernel_tag;
static volatile int core_para_init = 0; static volatile int core_para_init = 0;
static void sync_cores() { static void sync_cores() {
while (core_para_init != 0xF) ; while (core_para_init != ((1 << NR_CPU) - 1)) ;
return; return;
} }
@ -92,8 +92,8 @@ int main(void)
} }
/* start first task */ /* start first task */
char* init_task_param[2] = { "/app/init", 0 }; char* init_task_param[2] = { "/app/shell", 0 };
sys_spawn((char*)_binary_init_start, "init", init_task_param); sys_spawn((char*)_binary_init_start, "shell", init_task_param);
char* fs_server_task_param[2] = { "/app/fs_server", 0 }; char* fs_server_task_param[2] = { "/app/fs_server", 0 };
sys_spawn((char*)_binary_default_fs_start, "memfs", fs_server_task_param); sys_spawn((char*)_binary_default_fs_start, "memfs", fs_server_task_param);
} }

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@ -49,7 +49,7 @@ bool module_phymem_init()
return true; return true;
} }
char* kalloc(size_t size) char* kalloc(uintptr_t size)
{ {
char* mem_alloc = KBuddyAlloc(&kern_virtmem_buddy, size); char* mem_alloc = KBuddyAlloc(&kern_virtmem_buddy, size);
if (mem_alloc == NULL) { if (mem_alloc == NULL) {

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@ -303,13 +303,11 @@ static void _scheduler(struct SchedulerRightGroup right_group)
/* if there's not a runnable task, wait for one */ /* if there's not a runnable task, wait for one */
if (next_task == NULL) { if (next_task == NULL) {
xizi_leave_kernel(); xizi_leave_kernel();
// there is no task to run, into low power mode
cpu_into_low_power();
/* leave kernel for other cores, so they may create a runnable task */ /* leave kernel for other cores, so they may create a runnable task */
xizi_enter_kernel(); xizi_enter_kernel();
// activate cpu
cpu_leave_low_power();
continue; continue;
} }