This commit is contained in:
xj 2024-07-03 06:15:24 -07:00
parent 57ae614071
commit ad5acb644b
6 changed files with 23 additions and 9 deletions

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@ -149,7 +149,7 @@ struct usbh_hubport * usbh_root_hub_port ( struct usbh_hubport *hport ) {
struct usbh_hubport *parent;
/* Navigate up to root hub */
while (parent = hport->parent->parent) {
while ((parent = hport->parent->parent)) {
hport = parent;
}

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@ -24,6 +24,7 @@ Modification: Use usb_malloc, usb_free and usb_align functions
#include <stddef.h>
#include <stdint.h>
#include <string.h>
#include "usb_config.h"
#define USB_MEM_ALIGNX __attribute__((aligned(CONFIG_USB_ALIGN_SIZE)))

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@ -598,11 +598,11 @@ int xhci_usb_hc_init(uint32_t id){
memset(xhci, 0, sizeof(*xhci));
xhci->bus = bus;
bus->priv = xhci;
if (rc = xhci_probe(xhci, usb_hc_get_register_base(id)) != 0) {
if ((rc = xhci_probe(xhci, usb_hc_get_register_base(id)) != 0)) {
goto err_open;
}
if (rc = xhci_open(xhci) != 0 ) {
if ((rc = xhci_open(xhci) != 0) ) {
goto err_open;
}

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@ -81,6 +81,7 @@ Modification: Modify xhci_probe functions in order to adopt to XiZi AIOT.
#include "xhci_reg.h"
#include "xhci.h"
#include "usb_hc_xhci.h"
#include "usyscall.h"
/** @file
@ -127,7 +128,9 @@ static inline size_t xhci_align ( size_t len ) {
size_t align;
/* Align to own length (rounded up to a power of two) */
align = ( 1 << fls ( len - 1 ) );
// align = ( 1 << fls ( len - 1 ) );
// align = ( 1 << fls ( len - 1 ) );
align = XHCI_MIN_ALIGN;
/* Round up to XHCI_MIN_ALIGN if needed */
if ( align < XHCI_MIN_ALIGN )
@ -191,15 +194,15 @@ static void xhci_init ( struct xhci_host *xhci, void *regs ) {
/* Locate capability, operational, runtime, and doorbell registers */
xhci->cap = regs;
id = usb_hc_get_register_id(regs);
id = usb_hc_get_register_id((unsigned long)regs);
cap_vir_addr = usb_hc_get_register_vir_base(id);
if(!mmap(cap_vir_addr, regs, USB3_ADDR_OFFSET_UPPER_BOUND, true)){
if(!mmap(cap_vir_addr, (uintptr_t)regs, USB3_ADDR_OFFSET_UPPER_BOUND, true)){
return;
}
xhci->cap_addr = xhci->base_addr = cap_vir_addr;
xhci->cap_addr = xhci->base_addr = (void *)cap_vir_addr;
// caplength = readb ( xhci->cap + XHCI_CAP_CAPLENGTH );
caplength = readb ( xhci->cap_addr + XHCI_CAP_CAPLENGTH );
@ -687,7 +690,7 @@ static int xhci_dcbaa_alloc ( struct xhci_host *xhci ) {
xhci->dcbaa.context = NULL;
rc = sys_mmap(&dcbaap_addr, &dcbaap_phy, len);
rc = naive_mmap(&dcbaap_addr, &dcbaap_phy, len, false);
if(rc != 0){
USB_LOG_ERR("XHCI %s could not allocate DCBAA\n", xhci->name );
@ -2225,7 +2228,8 @@ int xhci_work_endpoint_open ( struct xhci_host *xhci, struct xhci_slot *slot, st
/* Calculate interval */
if ( ctx_type & XHCI_EP_TYPE_PERIODIC ) {
ep->interval = ( fls ( ep->interval ) - 1 );
// ep->interval = ( fls ( ep->interval ) - 1 );
ep->interval = 256;
}
ep->ctx_type = ctx_type;
@ -2643,6 +2647,7 @@ void xhci_event_process(struct xhci_host *xhci) {
/* Stop if we reach an empty TRB */
// DSB();
// __asm__ __volatile__("dsb sy": : : "memory");
// __asm__ volatile("dmb ish\n\t");
BARRIER();
nidx = evts->nidx; /* index of dequeue trb */

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@ -36,6 +36,7 @@ Modification: replant and redefine some xhci data structure, so that the cherryU
#ifndef XHCI_H_
#define XHCI_H_
#include <strings.h>
#include "xhci_reg.h"
#include "usbh_core.h"

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@ -9,6 +9,13 @@ user_ldflags = --start-group,-lgcc,-lc,--end-group
cflags = -std=c11 -march=armv7-a -mtune=cortex-a9 -nostdlib -nodefaultlibs -mfloat-abi=soft -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
#cflags = -Wall -g -std=c11
endif
ifeq ($(BOARD), ok1028a-c)
toolchain ?= aarch64-none-elf-
user_ldflags = -N -Ttext 0
cflags = -Wall -g -std=c11 -mtune=cortex-a72 -nostdlib -nodefaultlibs -fno-pic -static -fno-builtin -fno-strict-aliasing -Wall -ggdb -Wno-unused -Werror -fno-omit-frame-pointer -fno-stack-protector -fno-pie
board_specs = $(KERNEL_ROOT)/services/app/stub.o
endif
cc = ${toolchain}gcc
ld = ${toolchain}g++
objdump = ${toolchain}objdump