forked from xuos/xiuos
Adjust directory structure
This commit is contained in:
@@ -0,0 +1,19 @@
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if BSP_USING_HWTIMER
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config HWTIMER_BUS_NAME_1
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string "hwtimer bus name"
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default "hwtim1"
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menuconfig ENABLE_TIM1
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bool "enable TIM1"
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default y
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if ENABLE_TIM1
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config HWTIMER_1_DEVICE_NAME_1
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string "TIM1 dev name"
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default "hwtim1_dev1"
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config HWTIMER_DRIVER_NAME_1
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string "TIM1 drv name"
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default "hwtim1_drv"
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endif
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endif
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@@ -0,0 +1,3 @@
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SRC_FILES := hardware_hwtimer.c connect_hwtimer.c
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include $(KERNEL_ROOT)/compiler.mk
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@@ -0,0 +1,155 @@
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/*
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* Copyright (c) 2020 AIIT XUOS Lab
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* XiUOS is licensed under Mulan PSL v2.
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* You can use this software according to the terms and conditions of the Mulan PSL v2.
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* You may obtain a copy of Mulan PSL v2 at:
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* http://license.coscl.org.cn/MulanPSL2
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* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
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* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
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* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
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* See the Mulan PSL v2 for more details.
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*/
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/**
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* @file connect_hwtimer.c
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* @brief support kd233-board hwtimer function and register to bus framework
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* @version 1.0
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* @author AIIT XUOS Lab
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* @date 2021-04-25
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*/
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#include <board.h>
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#include <xiuos.h>
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#include <stdio.h>
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#include <syslog.h>
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#include <plic.h>
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#include <sysctl.h>
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#include <fpioa.h>
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#include "connect_hwtimer.h"
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static struct HwtimerCallBackInfo *ptim2_cb_info = NULL;
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int timer_callback(void *ctx)
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{
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if (ptim2_cb_info) {
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if (ptim2_cb_info->timeout_callback) {
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ptim2_cb_info->timeout_callback(ptim2_cb_info->param);
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}
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}
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return 0;
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}
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uint32 HwtimerOpen(void *dev)
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{
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struct HwtimerHardwareDevice *hwtimer_dev = dev;
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ptim2_cb_info = &hwtimer_dev->hwtimer_param.cb_info;
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plic_init();
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sysctl_enable_irq();
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timer_init(TIMER_DEVICE_1);
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size_t real_time = timer_set_interval(TIMER_DEVICE_1, TIMER_CHANNEL_1, hwtimer_dev->hwtimer_param.period_millisecond *1000);
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KPrintf("timer_set_interval -- real_time : %ld\n", real_time);
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timer_irq_register(TIMER_DEVICE_1, TIMER_CHANNEL_1, !hwtimer_dev->hwtimer_param.repeat, 1, timer_callback, NULL);
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timer_set_enable(TIMER_DEVICE_1, TIMER_CHANNEL_1, 1);
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return EOK;
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}
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uint32 HwtimerClose(void *dev)
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{
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timer_set_enable(TIMER_DEVICE_1, TIMER_CHANNEL_1, 0);
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return EOK;
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}
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/*manage the hwtimer device operations*/
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static const struct HwtimerDevDone dev_done =
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{
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.open = HwtimerOpen,
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.close = HwtimerClose,
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.write = NONE,
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.read = NONE,
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};
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/*Init hwtimer bus*/
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static int BoardHwtimerBusInit(struct HwtimerBus *hwtimer_bus, struct HwtimerDriver *hwtimer_driver)
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{
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x_err_t ret = EOK;
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/*Init the hwtimer bus */
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ret = HwtimerBusInit(hwtimer_bus, HWTIMER_BUS_NAME_1);
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if (EOK != ret) {
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KPrintf("board_hwtimer_init HwtimerBusInit error %d\n", ret);
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return ERROR;
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}
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/*Init the hwtimer driver*/
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hwtimer_driver->configure = NONE;
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ret = HwtimerDriverInit(hwtimer_driver, HWTIMER_DRIVER_NAME_1);
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if (EOK != ret) {
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KPrintf("board_hwtimer_init HwtimerDriverInit error %d\n", ret);
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return ERROR;
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}
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/*Attach the hwtimer driver to the hwtimer bus*/
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ret = HwtimerDriverAttachToBus(HWTIMER_DRIVER_NAME_1, HWTIMER_BUS_NAME_1);
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if (EOK != ret) {
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KPrintf("board_hwtimer_init USEDriverAttachToBus error %d\n", ret);
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return ERROR;
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}
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return ret;
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}
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/*Attach the hwtimer device to the hwtimer bus*/
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static int BoardHwtimerDevBend(void)
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{
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x_err_t ret = EOK;
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static struct HwtimerHardwareDevice hwtimer_device_0;
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memset(&hwtimer_device_0, 0, sizeof(struct HwtimerHardwareDevice));
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hwtimer_device_0.dev_done = &dev_done;
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ret = HwtimerDeviceRegister(&hwtimer_device_0, NONE, HWTIMER_1_DEVICE_NAME_1);
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if (EOK != ret) {
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KPrintf("board_hwtimer_init HWTIMERDeviceInit device %s error %d\n", HWTIMER_1_DEVICE_NAME_1, ret);
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return ERROR;
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}
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ret = HwtimerDeviceAttachToBus(HWTIMER_1_DEVICE_NAME_1, HWTIMER_BUS_NAME_1);
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if (EOK != ret) {
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KPrintf("board_hwtimer_init HwtimerDeviceAttachToBus device %s error %d\n", HWTIMER_1_DEVICE_NAME_1, ret);
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return ERROR;
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}
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return ret;
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}
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/*K210 BOARD HWTIMER INIT*/
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int HwTimerInit(void)
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{
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x_err_t ret = EOK;
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static struct HwtimerBus hwtimer_bus;
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memset(&hwtimer_bus, 0, sizeof(struct HwtimerBus));
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static struct HwtimerDriver hwtimer_driver;
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memset(&hwtimer_driver, 0, sizeof(struct HwtimerDriver));
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ret = BoardHwtimerBusInit(&hwtimer_bus, &hwtimer_driver);
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if (EOK != ret) {
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KPrintf("board_hwtimer_Init error ret %u\n", ret);
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return ERROR;
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}
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ret = BoardHwtimerDevBend();
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if (EOK != ret) {
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KPrintf("board_hwtimer_Init error ret %u\n", ret);
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return ERROR;
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}
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return ret;
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}
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@@ -0,0 +1,406 @@
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/* Copyright 2018 Canaan Inc.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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||||
* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/**
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* @file hardware_hwtimer.c
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* @brief add from Canaan k210 SDK
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* https://canaan-creative.com/developer
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* @version 1.0
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* @author AIIT XUOS Lab
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* @date 2021-04-25
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*/
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#include <syslog.h>
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#include "hardware_hwtimer.h"
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#include "sysctl.h"
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#include "stddef.h"
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#include "utils.h"
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#include "plic.h"
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#include "io.h"
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#include "xs_isr.h"
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/**
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* @brief Private definitions for the timer instance
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*/
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typedef struct timer_instance
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{
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timer_callback_t callback;
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void *ctx;
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bool single_shot;
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} timer_instance_t;
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typedef void(*irq_manager_callback_t)(int irq, void* arg);
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volatile timer_instance_t timer_instance[TIMER_DEVICE_MAX][TIMER_CHANNEL_MAX];
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volatile kendryte_timer_t *const timer[3] =
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{
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(volatile kendryte_timer_t *)TIMER0_BASE_ADDR,
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(volatile kendryte_timer_t *)TIMER1_BASE_ADDR,
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(volatile kendryte_timer_t *)TIMER2_BASE_ADDR
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};
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void timer_init(timer_device_number_t timer_number)
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{
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for(size_t i = 0; i < TIMER_CHANNEL_MAX; i++)
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timer_instance[timer_number][i] = (const timer_instance_t) {
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.callback = NULL,
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.ctx = NULL,
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.single_shot = 0,
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};
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sysctl_clock_enable(SYSCTL_CLOCK_TIMER0 + timer_number);
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}
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void timer_set_clock_div(timer_device_number_t timer_number, uint32_t div)
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{
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sysctl_clock_set_threshold(timer_number == 0 ? SYSCTL_THRESHOLD_TIMER0 :
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timer_number == 1 ? SYSCTL_THRESHOLD_TIMER1 :
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SYSCTL_THRESHOLD_TIMER2, div);
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}
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void timer_enable(timer_device_number_t timer_number, timer_channel_number_t channel)
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{
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timer[timer_number]->channel[channel].control |= TIMER_CR_ENABLE;
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}
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void timer_disable(timer_device_number_t timer_number, timer_channel_number_t channel)
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{
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timer[timer_number]->channel[channel].control &= (~TIMER_CR_ENABLE);
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}
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void timer_enable_pwm(timer_device_number_t timer_number, timer_channel_number_t channel)
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{
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timer[timer_number]->channel[channel].control |= TIMER_CR_PWM_ENABLE;
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}
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void timer_disable_pwm(timer_device_number_t timer_number, timer_channel_number_t channel)
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{
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timer[timer_number]->channel[channel].control &= (~TIMER_CR_PWM_ENABLE);
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}
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void timer_enable_interrupt(timer_device_number_t timer_number, timer_channel_number_t channel)
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{
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timer[timer_number]->channel[channel].control &= (~TIMER_CR_INTERRUPT_MASK);
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}
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void timer_disable_interrupt(timer_device_number_t timer_number, timer_channel_number_t channel)
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{
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timer[timer_number]->channel[channel].control |= TIMER_CR_INTERRUPT_MASK;
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}
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void timer_set_mode(timer_device_number_t timer_number, timer_channel_number_t channel, uint32_t mode)
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{
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timer[timer_number]->channel[channel].control &= (~TIMER_CR_MODE_MASK);
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timer[timer_number]->channel[channel].control |= mode;
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}
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void timer_set_reload(timer_device_number_t timer_number, timer_channel_number_t channel, uint32_t count)
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{
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timer[timer_number]->channel[channel].load_count = count;
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}
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void timer_set_reload2(timer_device_number_t timer_number, timer_channel_number_t channel, uint32_t count)
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{
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timer[timer_number]->load_count2[channel] = count;
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}
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uint32_t timer_get_count(timer_device_number_t timer_number, timer_channel_number_t channel)
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{
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return timer[timer_number]->channel[channel].current_value;
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}
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uint32_t timer_get_reload(timer_device_number_t timer_number, timer_channel_number_t channel)
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{
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return timer[timer_number]->channel[channel].load_count;
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}
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uint32_t timer_get_reload2(timer_device_number_t timer_number, timer_channel_number_t channel)
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{
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return timer[timer_number]->load_count2[channel];
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}
|
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|
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uint32_t timer_get_interrupt_status(timer_device_number_t timer_number)
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{
|
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return timer[timer_number]->intr_stat;
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}
|
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|
||||
uint32_t timer_get_raw_interrupt_status(timer_device_number_t timer_number)
|
||||
{
|
||||
return timer[timer_number]->raw_intr_stat;
|
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}
|
||||
|
||||
uint32_t timer_channel_get_interrupt_status(timer_device_number_t timer_number, timer_channel_number_t channel)
|
||||
{
|
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return timer[timer_number]->channel[channel].intr_stat;
|
||||
}
|
||||
|
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void timer_clear_interrupt(timer_device_number_t timer_number)
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||||
{
|
||||
timer[timer_number]->eoi = timer[timer_number]->eoi;
|
||||
}
|
||||
|
||||
void timer_channel_clear_interrupt(timer_device_number_t timer_number, timer_channel_number_t channel)
|
||||
{
|
||||
timer[timer_number]->channel[channel].eoi = timer[timer_number]->channel[channel].eoi;
|
||||
}
|
||||
|
||||
void timer_set_enable(timer_device_number_t timer_number, timer_channel_number_t channel, uint32_t enable)
|
||||
{
|
||||
if (enable)
|
||||
timer[timer_number]->channel[channel].control = TIMER_CR_USER_MODE | TIMER_CR_ENABLE;
|
||||
else
|
||||
timer[timer_number]->channel[channel].control = TIMER_CR_INTERRUPT_MASK;
|
||||
}
|
||||
|
||||
size_t timer_set_interval(timer_device_number_t timer_number, timer_channel_number_t channel, size_t useconds)
|
||||
{
|
||||
uint32_t clk_freq = SysctlClockGetFreq(SYSCTL_CLOCK_TIMER0 + timer_number);
|
||||
|
||||
double min_step = 1e6 / clk_freq;
|
||||
size_t value = (size_t)(useconds / min_step);
|
||||
configASSERT(value > 0 && value < UINT32_MAX);
|
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timer[timer_number]->channel[channel].load_count = (uint32_t)value;
|
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return (size_t)(min_step * value);
|
||||
}
|
||||
|
||||
typedef void(*timer_ontick)();
|
||||
timer_ontick time_irq[3][4] = { NULL };
|
||||
|
||||
static int timer_isr(void *parm)
|
||||
{
|
||||
uint32_t timer_number;
|
||||
for (timer_number = 0; timer_number < 3; timer_number++)
|
||||
{
|
||||
if (parm == timer[timer_number])
|
||||
break;
|
||||
}
|
||||
|
||||
uint32_t channel = timer[timer_number]->intr_stat;
|
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size_t i = 0;
|
||||
for (i = 0; i < 4; i++)
|
||||
{
|
||||
if (channel & 1)
|
||||
{
|
||||
if (time_irq[timer_number][i])
|
||||
(time_irq[timer_number][i])();
|
||||
break;
|
||||
}
|
||||
|
||||
channel >>= 1;
|
||||
}
|
||||
|
||||
readl(&timer[timer_number]->eoi);
|
||||
return 0;
|
||||
}
|
||||
|
||||
void timer_set_irq(timer_device_number_t timer_number, timer_channel_number_t channel, void(*func)(), uint32_t priority)
|
||||
{
|
||||
time_irq[timer_number][channel] = func;
|
||||
if (channel < 2)
|
||||
{
|
||||
plic_set_priority(IRQN_TIMER0A_INTERRUPT + timer_number * 2, priority);
|
||||
plic_irq_register(IRQN_TIMER0A_INTERRUPT + timer_number * 2, timer_isr, (void *)timer[timer_number]);
|
||||
plic_irq_enable(IRQN_TIMER0A_INTERRUPT + timer_number * 2);
|
||||
}
|
||||
else
|
||||
{
|
||||
plic_set_priority(IRQN_TIMER0B_INTERRUPT + timer_number * 2, priority);
|
||||
plic_irq_register(IRQN_TIMER0B_INTERRUPT + timer_number * 2, timer_isr, (void *)timer[timer_number]);
|
||||
plic_irq_enable(IRQN_TIMER0B_INTERRUPT + timer_number * 2);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get the timer irqn by device and channel object
|
||||
*
|
||||
* @note Internal function, not public
|
||||
* @param device The device
|
||||
* @param channel The channel
|
||||
* @return plic_irq_t IRQ number
|
||||
*/
|
||||
static plic_irq_t get_timer_irqn_by_device_and_channel(timer_device_number_t device, timer_channel_number_t channel)
|
||||
{
|
||||
if (device < TIMER_DEVICE_MAX && channel < TIMER_CHANNEL_MAX) {
|
||||
/*
|
||||
* Select timer interrupt part
|
||||
* Hierarchy of Timer interrupt to PLIC
|
||||
* +---------+ +-----------+
|
||||
* | 0+----+ | |
|
||||
* | | +--+0A |
|
||||
* | 1+----+ | |
|
||||
* | TIMER0 | | |
|
||||
* | 2+----+ | |
|
||||
* | | +--+0B |
|
||||
* | 3+----+ | |
|
||||
* +---------+ | |
|
||||
* | |
|
||||
* +---------+ | |
|
||||
* | 0+----+ | |
|
||||
* | | +--+1A |
|
||||
* | 1+----+ | |
|
||||
* | TIMER1 | | PLIC |
|
||||
* | 2+----+ | |
|
||||
* | | +--+1B |
|
||||
* | 3+----+ | |
|
||||
* +---------+ | |
|
||||
* | |
|
||||
* +---------+ | |
|
||||
* | 0+----+ | |
|
||||
* | | +--+2A |
|
||||
* | 1+----+ | |
|
||||
* | TIMER2 | | |
|
||||
* | 2+----+ | |
|
||||
* | | +--+2B |
|
||||
* | 3+----+ | |
|
||||
* +---------+ +-----------+
|
||||
*
|
||||
*/
|
||||
if (channel < 2) {
|
||||
/* It is part A interrupt, offset + 0 */
|
||||
return IRQN_TIMER0A_INTERRUPT + device * 2;
|
||||
}
|
||||
else {
|
||||
/* It is part B interrupt, offset + 1 */
|
||||
return IRQN_TIMER0B_INTERRUPT + device * 2;
|
||||
}
|
||||
}
|
||||
return IRQN_NO_INTERRUPT;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Process user callback function
|
||||
*
|
||||
* @note Internal function, not public
|
||||
* @param device The timer device
|
||||
* @param ctx The context
|
||||
* @return int The callback result
|
||||
*/
|
||||
static int timer_interrupt_handler(timer_device_number_t device, void *ctx)
|
||||
{
|
||||
uint32_t channel_int_stat = timer[device]->intr_stat;
|
||||
|
||||
for (size_t i = 0; i < TIMER_CHANNEL_MAX; i++)
|
||||
{
|
||||
/* Check every bit for interrupt status */
|
||||
if (channel_int_stat & 1)
|
||||
{
|
||||
if (timer_instance[device][i].callback) {
|
||||
/* Process user callback function */
|
||||
timer_instance[device][i].callback(timer_instance[device][i].ctx);
|
||||
/* Check if this timer is a single shot timer */
|
||||
if (timer_instance[device][i].single_shot) {
|
||||
/* Single shot timer, disable it */
|
||||
timer_set_enable(device, i, 0);
|
||||
}
|
||||
}
|
||||
/* Clear timer interrupt flag for specific channel */
|
||||
readl(&timer[device]->channel[i].eoi);
|
||||
}
|
||||
channel_int_stat >>= 1;
|
||||
}
|
||||
|
||||
/*
|
||||
* NOTE:
|
||||
* Don't read timer[device]->eoi here, or you will lost some interrupt
|
||||
* readl(&timer[device]->eoi);
|
||||
*/
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Callback function bus for timer interrupt
|
||||
*
|
||||
* @note Internal function, not public
|
||||
* @param ctx The context
|
||||
* @return int The callback result
|
||||
*/
|
||||
static void timer0_interrupt_callback(int irq, void *ctx)
|
||||
{
|
||||
timer_interrupt_handler(TIMER_DEVICE_0, ctx);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Callback function bus for timer interrupt
|
||||
*
|
||||
* @note Internal function, not public
|
||||
* @param ctx The context
|
||||
* @return int The callback result
|
||||
*/
|
||||
static void timer1_interrupt_callback(int irq, void *ctx)
|
||||
{
|
||||
timer_interrupt_handler(TIMER_DEVICE_1, ctx);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Callback function bus for timer interrupt
|
||||
*
|
||||
* @note Internal function, not public
|
||||
* @param ctx The context
|
||||
* @return int The callback result
|
||||
*/
|
||||
static void timer2_interrupt_callback(int irq, void *ctx)
|
||||
{
|
||||
timer_interrupt_handler(TIMER_DEVICE_2, ctx);
|
||||
}
|
||||
|
||||
int timer_irq_register(timer_device_number_t device, timer_channel_number_t channel, int is_single_shot, uint32_t priority, timer_callback_t callback, void *ctx)
|
||||
{
|
||||
if (device < TIMER_DEVICE_MAX && channel < TIMER_CHANNEL_MAX) {
|
||||
plic_irq_t irq_number = get_timer_irqn_by_device_and_channel(device, channel);
|
||||
irq_manager_callback_t plic_irq_callback[TIMER_DEVICE_MAX] = {
|
||||
timer0_interrupt_callback,
|
||||
timer1_interrupt_callback,
|
||||
timer2_interrupt_callback,
|
||||
};
|
||||
|
||||
timer_instance[device][channel] = (const timer_instance_t) {
|
||||
.callback = callback,
|
||||
.ctx = ctx,
|
||||
.single_shot = is_single_shot,
|
||||
};
|
||||
|
||||
// plic_set_priority(irq_number, priority);
|
||||
// plic_irq_register(irq_number, plic_irq_callback[device], (void *)&timer_instance[device]);
|
||||
// plic_irq_enable(irq_number);
|
||||
|
||||
isrManager.done->registerIrq(irq_number, plic_irq_callback[device], NULL);
|
||||
isrManager.done->enableIrq(irq_number);
|
||||
return 0;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
int timer_irq_unregister(timer_device_number_t device, timer_channel_number_t channel)
|
||||
{
|
||||
if (device < TIMER_DEVICE_MAX && channel < TIMER_CHANNEL_MAX) {
|
||||
timer_instance[device][channel] = (const timer_instance_t) {
|
||||
.callback = NULL,
|
||||
.ctx = NULL,
|
||||
.single_shot = 0,
|
||||
};
|
||||
|
||||
/* Combine 0 and 1 to A interrupt, 2 and 3 to B interrupt */
|
||||
if ((!(timer_instance[device][TIMER_CHANNEL_0].callback ||
|
||||
timer_instance[device][TIMER_CHANNEL_1].callback)) ||
|
||||
(!(timer_instance[device][TIMER_CHANNEL_2].callback ||
|
||||
timer_instance[device][TIMER_CHANNEL_3].callback))) {
|
||||
plic_irq_t irq_number = get_timer_irqn_by_device_and_channel(device, channel);
|
||||
plic_irq_unregister(irq_number);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
Reference in New Issue
Block a user