forked from xuos/xiuos
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@@ -0,0 +1,14 @@
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if BSP_USING_WDT
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config WDT_BUS_NAME
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string "watchdog bus name"
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default "wdt"
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config WDT_DRIVER_NAME
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string "watchdog driver name"
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default "wdt_drv"
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config WDT_DEVICE_NAME
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string "watchdog device name"
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default "wdt_dev"
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endif
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@@ -0,0 +1,5 @@
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SRC_FILES := hardware_wdg.c connect_wdg.c
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include $(KERNEL_ROOT)/compiler.mk
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@@ -0,0 +1,133 @@
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/*
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* Copyright (c) 2020 AIIT XUOS Lab
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* XiUOS is licensed under Mulan PSL v2.
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* You can use this software according to the terms and conditions of the Mulan PSL v2.
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* You may obtain a copy of Mulan PSL v2 at:
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* http://license.coscl.org.cn/MulanPSL2
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* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
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* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
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* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
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* See the Mulan PSL v2 for more details.
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*/
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/**
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* @file connect_wdt.c
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* @brief support aiit-arm32-board watchdog function and register to bus framework
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* @version 1.0
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* @author AIIT XUOS Lab
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* @date 2021-04-25
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*/
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#include <connect_wdg.h>
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#include <hardware_iwdg.h>
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/**
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* This function Watchdog configuration function
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*
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* @param arg Watchdog device Parameters
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*
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* @return EOK
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*/
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static int WdgSet(uint16_t arg)
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{
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IWDG_Enable();
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IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable);
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IWDG_SetPrescaler(IWDG_Prescaler_16);
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IWDG_SetReload(arg);
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while(IWDG_GetFlagStatus(IWDG_FLAG_RVU) != RESET);
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IWDG_ReloadCounter();
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return 0;
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}
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/**
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* This function Watchdog initialization
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*
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* @param dev Watchdog driver structure handle
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*
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* @return EOK
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*/
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static uint32 WdtOpen(void *dev)
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{
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WdgSet(4000);
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return EOK;
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}
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/**
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* This function Watchdog control function
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*
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* @param drv Watchdog driver structure handle
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*
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* @param args Watchdog driver Parameters
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*
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* @return EOK
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*/
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static uint32 WdtConfigure(void *drv, struct BusConfigureInfo *args)
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{
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switch (args->configure_cmd)
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{
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case OPER_WDT_SET_TIMEOUT:
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if (WdgSet((uint16_t)*(int *)args->private_data) != 0) {
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return ERROR;
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}
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break;
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case OPER_WDT_KEEPALIVE:
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IWDG_ReloadCounter();
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break;
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default:
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return ERROR;
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}
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return EOK;
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}
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static const struct WdtDevDone dev_done =
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{
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WdtOpen,
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NONE,
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NONE,
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NONE,
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};
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/**
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* This function Watchdog initialization
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*
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* @return EOK
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*/
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int HwWdtInit(void)
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{
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x_err_t ret = EOK;
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static struct WdtBus wdt;
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static struct WdtDriver drv;
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static struct WdtHardwareDevice dev;
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ret = WdtBusInit(&wdt, WDT_BUS_NAME);
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if (ret != EOK) {
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KPrintf("Watchdog bus init error %d\n", ret);
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return ERROR;
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}
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drv.configure = WdtConfigure;
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ret = WdtDriverInit(&drv, WDT_DRIVER_NAME);
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if (ret != EOK) {
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KPrintf("Watchdog driver init error %d\n", ret);
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return ERROR;
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}
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ret = WdtDriverAttachToBus(WDT_DRIVER_NAME, WDT_BUS_NAME);
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if (ret != EOK) {
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KPrintf("Watchdog driver attach error %d\n", ret);
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return ERROR;
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}
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dev.dev_done = &dev_done;
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ret = WdtDeviceRegister(&dev, WDT_DEVICE_NAME);
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if (ret != EOK) {
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KPrintf("Watchdog device register error %d\n", ret);
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return ERROR;
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}
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ret = WdtDeviceAttachToBus(WDT_DEVICE_NAME, WDT_BUS_NAME);
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if (ret != EOK) {
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KPrintf("Watchdog device register error %d\n", ret);
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return ERROR;
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}
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}
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@@ -0,0 +1,283 @@
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/**
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******************************************************************************
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* @file stm32f4xx_iwdg.c
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* @author MCD Application Team
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* @version V1.0.0
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* @date 30-September-2011
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* @brief This file provides firmware functions to manage the following
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* functionalities of the Independent watchdog (IWDG) peripheral:
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* - Prescaler and Counter configuration
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* - IWDG activation
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* - Flag management
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*
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* @verbatim
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*
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* ===================================================================
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* IWDG features
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* ===================================================================
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*
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* The IWDG can be started by either software or hardware (configurable
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* through option byte).
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*
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* The IWDG is clocked by its own dedicated low-speed clock (LSI) and
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* thus stays active even if the main clock fails.
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* Once the IWDG is started, the LSI is forced ON and cannot be disabled
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* (LSI cannot be disabled too), and the counter starts counting down from
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* the reset value of 0xFFF. When it reaches the end of count value (0x000)
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* a system reset is generated.
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* The IWDG counter should be reloaded at regular intervals to prevent
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* an MCU reset.
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*
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* The IWDG is implemented in the VDD voltage domain that is still functional
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* in STOP and STANDBY mode (IWDG reset can wake-up from STANDBY).
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*
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* IWDGRST flag in RCC_CSR register can be used to inform when a IWDG
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* reset occurs.
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*
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* Min-max timeout value @32KHz (LSI): ~125us / ~32.7s
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* The IWDG timeout may vary due to LSI frequency dispersion. STM32F4xx
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* devices provide the capability to measure the LSI frequency (LSI clock
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* connected internally to TIM5 CH4 input capture). The measured value
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* can be used to have an IWDG timeout with an acceptable accuracy.
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* For more information, please refer to the STM32F4xx Reference manual
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*
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*
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* ===================================================================
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* How to use this driver
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* ===================================================================
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* 1. Enable write access to IWDG_PR and IWDG_RLR registers using
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* IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable) function
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*
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* 2. Configure the IWDG prescaler using IWDG_SetPrescaler() function
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*
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* 3. Configure the IWDG counter value using IWDG_SetReload() function.
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* This value will be loaded in the IWDG counter each time the counter
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* is reloaded, then the IWDG will start counting down from this value.
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*
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* 4. Start the IWDG using IWDG_Enable() function, when the IWDG is used
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* in software mode (no need to enable the LSI, it will be enabled
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* by hardware)
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*
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* 5. Then the application program must reload the IWDG counter at regular
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* intervals during normal operation to prevent an MCU reset, using
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* IWDG_ReloadCounter() function.
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*
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* @endverbatim
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*
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******************************************************************************
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* @attention
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*
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* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*
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* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
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******************************************************************************
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*/
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/**
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* @file: hardware_wdg.c
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* @brief: support hardware wdg function
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* @version: 1.0
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* @author: AIIT XUOS Lab
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* @date: 2021/4/25
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*/
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/*************************************************
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File name: hardware_wdg.c
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Description: support hardware wdg function
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Others:
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History:
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1. Date: 2021-04-25
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Author: AIIT XUOS Lab
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Modification:
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1. rename stm32f4xx_iwdg.c for XiUOS
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*************************************************/
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/* Includes ------------------------------------------------------------------*/
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#include <hardware_iwdg.h>
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#include <stm32_assert_template.h>
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/** @addtogroup STM32F4xx_StdPeriph_Driver
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* @{
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*/
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/** @defgroup IWDG
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* @brief IWDG driver modules
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* @{
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*/
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/* KR register bit mask */
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#define KR_KEY_RELOAD ((uint16_t)0xAAAA)
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#define KR_KEY_ENABLE ((uint16_t)0xCCCC)
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/* Private functions ---------------------------------------------------------*/
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/** @defgroup IWDG_Private_Functions
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* @{
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*/
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/** @defgroup IWDG_Group1 Prescaler and Counter configuration functions
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* @brief Prescaler and Counter configuration functions
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*
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@verbatim
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===============================================================================
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Prescaler and Counter configuration functions
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===============================================================================
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@endverbatim
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* @{
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*/
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/**
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* @brief Enables or disables write access to IWDG_PR and IWDG_RLR registers.
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* @param IWDG_WriteAccess: new state of write access to IWDG_PR and IWDG_RLR registers.
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* This parameter can be one of the following values:
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* @arg IWDG_WriteAccess_Enable: Enable write access to IWDG_PR and IWDG_RLR registers
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* @arg IWDG_WriteAccess_Disable: Disable write access to IWDG_PR and IWDG_RLR registers
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* @retval None
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*/
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void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess)
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{
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/* Check the parameters */
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assert_param(IS_IWDG_WRITE_ACCESS(IWDG_WriteAccess));
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IWDG->KR = IWDG_WriteAccess;
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}
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/**
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* @brief Sets IWDG Prescaler value.
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* @param IWDG_Prescaler: specifies the IWDG Prescaler value.
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* This parameter can be one of the following values:
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* @arg IWDG_Prescaler_4: IWDG prescaler set to 4
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* @arg IWDG_Prescaler_8: IWDG prescaler set to 8
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* @arg IWDG_Prescaler_16: IWDG prescaler set to 16
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* @arg IWDG_Prescaler_32: IWDG prescaler set to 32
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* @arg IWDG_Prescaler_64: IWDG prescaler set to 64
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* @arg IWDG_Prescaler_128: IWDG prescaler set to 128
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* @arg IWDG_Prescaler_256: IWDG prescaler set to 256
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* @retval None
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*/
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void IWDG_SetPrescaler(uint8_t IWDG_Prescaler)
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{
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/* Check the parameters */
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assert_param(IS_IWDG_PRESCALER(IWDG_Prescaler));
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IWDG->PR = IWDG_Prescaler;
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}
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/**
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* @brief Sets IWDG Reload value.
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* @param Reload: specifies the IWDG Reload value.
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* This parameter must be a number between 0 and 0x0FFF.
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* @retval None
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*/
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void IWDG_SetReload(uint16_t Reload)
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{
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/* Check the parameters */
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assert_param(IS_IWDG_RELOAD(Reload));
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IWDG->RLR = Reload;
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}
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/**
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* @brief Reloads IWDG counter with value defined in the reload register
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* (write access to IWDG_PR and IWDG_RLR registers disabled).
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* @param None
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* @retval None
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*/
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void IWDG_ReloadCounter(void)
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{
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IWDG->KR = KR_KEY_RELOAD;
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}
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/**
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* @}
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*/
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/** @defgroup IWDG_Group2 IWDG activation function
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* @brief IWDG activation function
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*
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@verbatim
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===============================================================================
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IWDG activation function
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===============================================================================
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@endverbatim
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* @{
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*/
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/**
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* @brief Enables IWDG (write access to IWDG_PR and IWDG_RLR registers disabled).
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* @param None
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* @retval None
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*/
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void IWDG_Enable(void)
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{
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IWDG->KR = KR_KEY_ENABLE;
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}
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/**
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* @}
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*/
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/** @defgroup IWDG_Group3 Flag management function
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* @brief Flag management function
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*
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@verbatim
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===============================================================================
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Flag management function
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===============================================================================
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@endverbatim
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* @{
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*/
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/**
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* @brief Checks whether the specified IWDG flag is set or not.
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* @param IWDG_FLAG: specifies the flag to check.
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* This parameter can be one of the following values:
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* @arg IWDG_FLAG_PVU: Prescaler Value Update on going
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* @arg IWDG_FLAG_RVU: Reload Value Update on going
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* @retval The new state of IWDG_FLAG (SET or RESET).
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*/
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FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG)
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{
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FlagStatus bitstatus = RESET;
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/* Check the parameters */
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assert_param(IS_IWDG_FLAG(IWDG_FLAG));
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if ((IWDG->SR & IWDG_FLAG) != (uint32_t)RESET)
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{
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bitstatus = SET;
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}
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else
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{
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bitstatus = RESET;
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}
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/* Return the flag status */
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return bitstatus;
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}
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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||||
* @}
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*/
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/**
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* @}
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*/
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/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
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