forked from xuos/xiuos
feat support ch438 extuart function for xidatong board from Liu_Weichao
it is OK
This commit is contained in:
xuedongliang
commit
6778158db7
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@ -412,7 +412,6 @@ static uint32 Imxrt1052PinConfigure(struct PinParam *param)
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struct PinIndex pin_index;
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KPrintf("Imxrt1052PinConfigure\n");
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if (GetPin(&pin_index, param->pin) < 0) {
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return ERROR;
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}
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@ -420,7 +419,6 @@ static uint32 Imxrt1052PinConfigure(struct PinParam *param)
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switch(param->cmd)
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{
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case GPIO_CONFIG_MODE:
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KPrintf("GpioConfigMode %u\n", param->pin);
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GpioConfigMode(param->mode, &pin_index, param->pin);
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break;
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case GPIO_IRQ_REGISTER:
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@ -583,6 +581,9 @@ static __inline void PinIrqHdr(uint32_t index_offset, uint8_t pin_start, GPIO_Ty
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if (isr_status & (1 << i)) {
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GPIO_PortClearInterruptFlags(gpio, (1 << i));
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__DSB();
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pin = index_offset + i;
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if (pin_irq_hdr_tab[pin].hdr) {
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pin_irq_hdr_tab[pin].hdr(pin_irq_hdr_tab[pin].args);
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@ -611,7 +611,7 @@ void WriteCH438Data(uint8 addr, uint8 dat)
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********************************************************************************************************/
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void WriteCH438Block(uint8 maddr, uint8 mlen, uint8 *mbuf)
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{
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while (mlen--) {
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while (mlen--) {
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WriteCH438Data(maddr, *mbuf++);
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}
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}
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@ -742,7 +742,7 @@ static void Timeout438Proc(void *parameter)
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}
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}
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void Ch438PortInit( uint8 ext_uart_no,uint32 BaudRate )
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void Ch438PortInit(uint8 ext_uart_no, uint32 BaudRate )
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{
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uint32 div;
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uint8 DLL,DLM,dlab;
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@ -767,7 +767,8 @@ void Ch438PortInit( uint8 ext_uart_no,uint32 BaudRate )
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REG_IIR_ADDR = offset_addr[ext_uart_no] | REG_IIR0_ADDR;
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WriteCH438Data(REG_IER_ADDR, BIT_IER_RESET); /* reset the uart */
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MdelayKTask(50);
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//MdelayKTask(50);
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ImxrtUdelay(50000);
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dlab = ReadCH438Data(REG_IER_ADDR);
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dlab &= 0xDF;
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@ -818,7 +819,8 @@ void CH438PortInitParityCheck(uint8 ext_uart_no, uint32 BaudRate)
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REG_IIR_ADDR = offset_addr[ext_uart_no] | REG_IIR0_ADDR;
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WriteCH438Data(REG_IER_ADDR, BIT_IER_RESET); /* reset the uart */
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MdelayKTask(50);
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//MdelayKTask(50);
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ImxrtUdelay(50000);
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dlab = ReadCH438Data(REG_IER_ADDR);
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dlab &= 0xDF;
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@ -896,14 +898,12 @@ static uint32 ImxrtCh438Init(struct SerialDriver *serial_drv, struct SerialCfgP
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}
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/* config NRD pin as output*/
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KPrintf("####TEST CH438_NRD_PIN %u start####\n", CH438_NRD_PIN);
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pin_cfg.pin = CH438_NRD_PIN;
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ret = BusDrvConfigure(ch438_pin->owner_driver, &configure_info);
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if (ret != EOK) {
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KPrintf("config NRD pin %d failed!\n", CH438_NRD_PIN);
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return ERROR;
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}
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KPrintf("####TEST CH438_NRD_PIN %u done####\n", CH438_NRD_PIN);
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/* config ALE pin as output*/
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pin_cfg.pin = CH438_ALE_PIN;
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@ -1027,7 +1027,7 @@ static uint32 ImxrtCh438ReadData(void *dev, struct BusBlockReadParam *read_param
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case INT_THR_EMPTY: /* THR EMPTY INTERRUPT*/
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break;
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case INT_RCV_OVERTIME: /* RECV OVERTIME INTERRUPT*/
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case INT_RCV_SUCCESS: /* RECV INTERRUPT SUCCESSFULLY*/
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case INT_RCV_SUCCESS: /* RECV INTERRUPT SUCCESSFULLY*/
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rcv_num = Ch438UartRcv(dev_param->ext_uart_no, (uint8 *)read_param->buffer, read_param->size);
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read_param->read_length = rcv_num;
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break;
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@ -1056,14 +1056,14 @@ static const struct SerialDevDone dev_done =
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static void Ch438InitDefault(struct SerialDriver *serial_drv)
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{
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struct PinParam PinCfg;
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struct PinParam pin_cfg;
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BusType ch438_pin;
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struct BusConfigureInfo configure_info;
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int ret = 0;
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configure_info.configure_cmd = OPE_CFG;
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configure_info.private_data = (void *)&PinCfg;
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configure_info.private_data = (void *)&pin_cfg;
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ch438_sem = KSemaphoreCreate(0);
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if (ch438_sem < 0) {
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@ -1073,72 +1073,43 @@ static void Ch438InitDefault(struct SerialDriver *serial_drv)
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ch438_pin = PinBusInitGet();
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PinCfg.cmd = GPIO_CONFIG_MODE;
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PinCfg.pin = CH438_INT_PIN;
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PinCfg.mode = GPIO_CFG_INPUT_PULLUP;
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pin_cfg.cmd = GPIO_CONFIG_MODE;
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pin_cfg.pin = CH438_INT_PIN;
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pin_cfg.mode = GPIO_CFG_INPUT_PULLUP;
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ret = BusDrvConfigure(ch438_pin->owner_driver, &configure_info);
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if (ret != EOK) {
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KPrintf("config BSP_CH438_INT_PIN pin %d failed!\n", CH438_INT_PIN);
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return;
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}
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PinCfg.cmd = GPIO_IRQ_REGISTER;
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PinCfg.pin = CH438_INT_PIN;
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PinCfg.irq_set.irq_mode = GPIO_IRQ_EDGE_FALLING;
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PinCfg.irq_set.hdr = Ch438Irq;
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PinCfg.irq_set.args = NONE;
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pin_cfg.cmd = GPIO_IRQ_REGISTER;
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pin_cfg.pin = CH438_INT_PIN;
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pin_cfg.irq_set.irq_mode = GPIO_IRQ_EDGE_FALLING;
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pin_cfg.irq_set.hdr = Ch438Irq;
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pin_cfg.irq_set.args = NONE;
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ret = BusDrvConfigure(ch438_pin->owner_driver, &configure_info);
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if (ret != EOK) {
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KPrintf("config BSP_CH438_INT_PIN %d failed!\n", CH438_INT_PIN);
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KPrintf("config BSP_CH438_INT_PIN GPIO_IRQ_REGISTER %d failed!\n", CH438_INT_PIN);
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return;
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}
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PinCfg.cmd = GPIO_IRQ_ENABLE;
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PinCfg.pin = CH438_INT_PIN;
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//disable ch438 int gpio irq
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pin_cfg.cmd = GPIO_IRQ_DISABLE;
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pin_cfg.pin = CH438_INT_PIN;
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ret = BusDrvConfigure(ch438_pin->owner_driver, &configure_info);
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if (ret != EOK) {
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KPrintf("config BSP_CH438_INT_PIN %d failed!\n", CH438_INT_PIN);
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KPrintf("config BSP_CH438_INT_PIN GPIO_IRQ_DISABLE %d failed!\n", CH438_INT_PIN);
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return;
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}
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struct SerialCfgParam serial_cfg;
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memset(&serial_cfg, 0, sizeof(struct SerialCfgParam));
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configure_info.configure_cmd = OPE_INT;
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configure_info.private_data = (void *)&serial_cfg;
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serial_cfg.data_cfg.port_configure = PORT_CFG_INIT;
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serial_cfg.data_cfg.ext_uart_no = 0;
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serial_cfg.data_cfg.serial_baud_rate = BAUD_RATE_115200;
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BusDrvConfigure(&serial_drv->driver, &configure_info);
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serial_cfg.data_cfg.ext_uart_no = 1;
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serial_cfg.data_cfg.serial_baud_rate = BAUD_RATE_9600;
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BusDrvConfigure(&serial_drv->driver, &configure_info);
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serial_cfg.data_cfg.ext_uart_no = 2;
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serial_cfg.data_cfg.serial_baud_rate = BAUD_RATE_9600;
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BusDrvConfigure(&serial_drv->driver, &configure_info);
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serial_cfg.data_cfg.ext_uart_no = 3;
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serial_cfg.data_cfg.serial_baud_rate = BAUD_RATE_9600;
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BusDrvConfigure(&serial_drv->driver, &configure_info);
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serial_cfg.data_cfg.ext_uart_no = 4;
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serial_cfg.data_cfg.serial_baud_rate = BAUD_RATE_9600;
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BusDrvConfigure(&serial_drv->driver, &configure_info);
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serial_cfg.data_cfg.ext_uart_no = 5;
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serial_cfg.data_cfg.serial_baud_rate = BAUD_RATE_9600;
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BusDrvConfigure(&serial_drv->driver, &configure_info);
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serial_cfg.data_cfg.ext_uart_no = 6;
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serial_cfg.data_cfg.serial_baud_rate = BAUD_RATE_9600;
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BusDrvConfigure(&serial_drv->driver, &configure_info);
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serial_cfg.data_cfg.ext_uart_no = 7;
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serial_cfg.data_cfg.serial_baud_rate = BAUD_RATE_9600;
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BusDrvConfigure(&serial_drv->driver, &configure_info);
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//enable ch438 int gpio irq
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pin_cfg.cmd = GPIO_IRQ_ENABLE;
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pin_cfg.pin = CH438_INT_PIN;
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ret = BusDrvConfigure(ch438_pin->owner_driver, &configure_info);
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if (ret != EOK) {
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KPrintf("config BSP_CH438_INT_PIN GPIO_IRQ_ENABLE %d failed!\n", CH438_INT_PIN);
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return;
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}
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}
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static uint32 ImxrtCh438DevRegister(struct SerialHardwareDevice *serial_dev, char *dev_name)
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@ -1272,25 +1243,108 @@ int Imxrt1052HwCh438Init(void)
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return ret;
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}
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void CH438RegTest(unsigned char num)//for test
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#ifdef CH438_EXTUART_TEST
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static void CH438RegTest(unsigned char num)//for test
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{
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uint8 dat;
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KPrintf("current test serilnum: %02x \r\n",offset_addr[num]);
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KPrintf("IER: %02x\r\n",ReadCH438Data(offset_addr[num] | REG_IER0_ADDR));//?IER
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KPrintf("IIR: %02x\r\n",ReadCH438Data(offset_addr[num] | REG_IIR0_ADDR));//?IIR
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KPrintf("LCR: %02x\r\n",ReadCH438Data(offset_addr[num] | REG_LCR0_ADDR));//?LCR
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KPrintf("MCR: %02x\r\n",ReadCH438Data(offset_addr[num] | REG_MCR0_ADDR));//?MCR
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KPrintf("LSR: %02x\r\n",ReadCH438Data(offset_addr[num] | REG_LSR0_ADDR));//?LSR
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KPrintf("MSR: %02x\r\n",ReadCH438Data(offset_addr[num] | REG_MSR0_ADDR));//?MSR
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KPrintf("FCR: %02x\r\n",ReadCH438Data(offset_addr[num] | REG_FCR0_ADDR));//?FCR
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KPrintf("SSR: %02x\r\n",ReadCH438Data( offset_addr[num] | REG_SSR_ADDR ));//?SSR
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KPrintf("current test serial num: %02x \r\n",offset_addr[num]);
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KPrintf("IER: 0x%02x\r\n",ReadCH438Data(offset_addr[num] | REG_IER0_ADDR));//IER
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KPrintf("IIR: 0x%02x\r\n",ReadCH438Data(offset_addr[num] | REG_IIR0_ADDR));//IIR
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KPrintf("LCR: 0x%02x\r\n",ReadCH438Data(offset_addr[num] | REG_LCR0_ADDR));//LCR
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KPrintf("MCR: 0x%02x\r\n",ReadCH438Data(offset_addr[num] | REG_MCR0_ADDR));//MCR
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KPrintf("LSR: 0x%02x\r\n",ReadCH438Data(offset_addr[num] | REG_LSR0_ADDR));//LSR
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KPrintf("MSR: 0x%02x\r\n",ReadCH438Data(offset_addr[num] | REG_MSR0_ADDR));//MSR
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KPrintf("FCR: 0x%02x\r\n",ReadCH438Data(offset_addr[num] | REG_FCR0_ADDR));//FCR
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KPrintf("SSR: 0x%02x\r\n",ReadCH438Data(offset_addr[num] | REG_SSR_ADDR ));//SSR
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KPrintf("SCR0: %02x\r\n",(unsigned short)ReadCH438Data(offset_addr[num] | REG_SCR0_ADDR));//?SCR
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KPrintf("SCR0: 0x%02x\r\n",(unsigned short)ReadCH438Data(offset_addr[num] | REG_SCR0_ADDR));//SCR
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dat = 0x55;
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WriteCH438Data(offset_addr[num] | REG_SCR0_ADDR, dat);
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KPrintf("SCR55: %02x\r\n",(unsigned short)ReadCH438Data(offset_addr[num] | REG_SCR0_ADDR));//?SCR
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KPrintf("SCR55: 0x%02x\r\n",(unsigned short)ReadCH438Data(offset_addr[num] | REG_SCR0_ADDR));//SCR
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dat = 0xAA;
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WriteCH438Data(offset_addr[num] | REG_SCR0_ADDR, dat);
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KPrintf("SCRAA: %02x\r\n",(unsigned short)ReadCH438Data(offset_addr[num] | REG_SCR0_ADDR));//?SCR
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KPrintf("SCRAA: 0x%02x\r\n",(unsigned short)ReadCH438Data(offset_addr[num] | REG_SCR0_ADDR));//SCR
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}
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static struct Bus *bus;
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static struct HardwareDev *dev;
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static struct Driver *drv;
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static void Ch438Read(void *parameter)
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{
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uint8 RevLen;
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uint8 ext_uart_no = 0;
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uint8 i, cnt = 0;
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struct BusBlockReadParam read_param;
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static uint8 Ch438Buff[8][256];
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struct BusBlockWriteParam write_param;
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while (1)
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{
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KPrintf("ready to read test_ch438 data\n");
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read_param.buffer = Ch438Buff[ext_uart_no];
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RevLen = BusDevReadData(dev, &read_param);
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KPrintf("test_ch438 get data %u\n", RevLen);
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if (RevLen) {
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for(i = 0 ; i < RevLen; i ++) {
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KPrintf("i %u data 0x%x\n", i, Ch438Buff[ext_uart_no][i]);
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Ch438Buff[ext_uart_no][i] = 0;
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}
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cnt ++;
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write_param.buffer = &cnt;
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write_param.size = 1;
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BusDevWriteData(dev, &write_param);
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}
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}
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}
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static void TestCh438Init(void)
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{
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x_err_t flag;
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struct BusConfigureInfo configure_info;
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bus = BusFind(CH438_BUS_NAME);
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drv = BusFindDriver(bus, CH438_DRIVER_NAME);
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dev = BusFindDevice(bus, CH438_DEVICE_NAME_0);
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struct SerialCfgParam serial_cfg;
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memset(&serial_cfg, 0, sizeof(struct SerialCfgParam));
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configure_info.configure_cmd = OPE_INT;
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configure_info.private_data = (void *)&serial_cfg;
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serial_cfg.data_cfg.port_configure = PORT_CFG_INIT;
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serial_cfg.data_cfg.ext_uart_no = 0;
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serial_cfg.data_cfg.serial_baud_rate = 115200;
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BusDrvConfigure(drv, &configure_info);
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KPrintf("ready to create test_ch438 task\n");
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int32 task_CH438_read = KTaskCreate("task_CH438_read", Ch438Read, NONE, 2048, 10);
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flag = StartupKTask(task_CH438_read);
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if (flag != EOK) {
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KPrintf("StartupKTask task_CH438_read failed .\n");
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return;
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}
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}
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void TestCh438(void)
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{
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TestCh438Init();
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CH438RegTest(0);
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}
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SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN),
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TestCh438, TestCh438, TestCh438 );
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#endif
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@ -78,6 +78,7 @@ const struct PinMask pin_mask[] =
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struct PinIrqHdr pin_irq_hdr_tab[] =
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{
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/* GPIO1 */
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{-1, 0, NONE, NONE},//1
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{-1, 0, NONE, NONE},
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{-1, 0, NONE, NONE},
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{-1, 0, NONE, NONE},
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@ -108,9 +109,9 @@ struct PinIrqHdr pin_irq_hdr_tab[] =
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{-1, 0, NONE, NONE},
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{-1, 0, NONE, NONE},
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{-1, 0, NONE, NONE},
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{-1, 0, NONE, NONE},
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{-1, 0, NONE, NONE},
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{-1, 0, NONE, NONE},//32
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/* GPIO2 */
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{-1, 0, NONE, NONE},//33
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{-1, 0, NONE, NONE},
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{-1, 0, NONE, NONE},
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{-1, 0, NONE, NONE},
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@ -141,9 +142,9 @@ struct PinIrqHdr pin_irq_hdr_tab[] =
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{-1, 0, NONE, NONE},
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{-1, 0, NONE, NONE},
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{-1, 0, NONE, NONE},
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{-1, 0, NONE, NONE},
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{-1, 0, NONE, NONE},
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{-1, 0, NONE, NONE},//64
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/* GPIO3 */
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{-1, 0, NONE, NONE},//65
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{-1, 0, NONE, NONE},
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{-1, 0, NONE, NONE},
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{-1, 0, NONE, NONE},
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@ -174,8 +175,7 @@ struct PinIrqHdr pin_irq_hdr_tab[] =
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{-1, 0, NONE, NONE},
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{-1, 0, NONE, NONE},
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{-1, 0, NONE, NONE},
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{-1, 0, NONE, NONE},
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{-1, 0, NONE, NONE},
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{-1, 0, NONE, NONE},//96
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/* GPIO4 */
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{-1, 0, NONE, NONE},
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{-1, 0, NONE, NONE},
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@ -208,9 +208,9 @@ struct PinIrqHdr pin_irq_hdr_tab[] =
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{-1, 0, NONE, NONE},
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{-1, 0, NONE, NONE},
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{-1, 0, NONE, NONE},
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{-1, 0, NONE, NONE},
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{-1, 0, NONE, NONE},//128
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/* GPIO5 */
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{-1, 0, NONE, NONE},
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{-1, 0, NONE, NONE},//129
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{-1, 0, NONE, NONE},
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{-1, 0, NONE, NONE},
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};
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@ -412,7 +412,6 @@ static uint32 Imxrt1052PinConfigure(struct PinParam *param)
|
|||
|
||||
struct PinIndex pin_index;
|
||||
|
||||
KPrintf("Imxrt1052PinConfigure\n");
|
||||
if (GetPin(&pin_index, param->pin) < 0) {
|
||||
return ERROR;
|
||||
}
|
||||
|
|
@ -420,7 +419,6 @@ static uint32 Imxrt1052PinConfigure(struct PinParam *param)
|
|||
switch(param->cmd)
|
||||
{
|
||||
case GPIO_CONFIG_MODE:
|
||||
KPrintf("GpioConfigMode %u\n", param->pin);
|
||||
GpioConfigMode(param->mode, &pin_index, param->pin);
|
||||
break;
|
||||
case GPIO_IRQ_REGISTER:
|
||||
|
|
@ -583,6 +581,9 @@ static __inline void PinIrqHdr(uint32_t index_offset, uint8_t pin_start, GPIO_Ty
|
|||
|
||||
if (isr_status & (1 << i)) {
|
||||
GPIO_PortClearInterruptFlags(gpio, (1 << i));
|
||||
|
||||
__DSB();
|
||||
|
||||
pin = index_offset + i;
|
||||
if (pin_irq_hdr_tab[pin].hdr) {
|
||||
pin_irq_hdr_tab[pin].hdr(pin_irq_hdr_tab[pin].args);
|
||||
|
|
|
|||
|
|
@ -267,10 +267,6 @@
|
|||
#define CH438_NRD_PIN IMXRT_GET_PIN(3, 5)
|
||||
#define CH438_ALE_PIN IMXRT_GET_PIN(3, 2)
|
||||
#define CH438_INT_PIN IMXRT_GET_PIN(3, 3)
|
||||
// #define DIR_485CH1_PIN
|
||||
// #define DIR_485CH2_PIN
|
||||
|
||||
void CH438RegTest(unsigned char num);
|
||||
|
||||
int Imxrt1052HwCh438Init(void);
|
||||
|
||||
|
|
|
|||
|
|
@ -72,76 +72,6 @@ const BOOT_DATA_T boot_data = {
|
|||
#elif defined(__ICCARM__)
|
||||
#pragma location=".boot_hdr.dcd_data"
|
||||
#endif
|
||||
//const uint8_t dcd_sdram[1044] = {
|
||||
///*0000*/ 0xD2, 0x04, 0x14, 0x41, 0xCC, 0x02, 0xF4, 0x04, 0x40, 0x0F, 0xC0, 0x68, 0xFF, 0xFF, 0xFF, 0xFF,
|
||||
///*0010*/ 0x40, 0x0F, 0xC0, 0x6C, 0xFF, 0xFF, 0xFF, 0xFF, 0x40, 0x0F, 0xC0, 0x70, 0xFF, 0xFF, 0xFF, 0xFF,
|
||||
///*0020*/ 0x40, 0x0F, 0xC0, 0x74, 0xFF, 0xFF, 0xFF, 0xFF, 0x40, 0x0F, 0xC0, 0x78, 0xFF, 0xFF, 0xFF, 0xFF,
|
||||
///*0030*/ 0x40, 0x0F, 0xC0, 0x7C, 0xFF, 0xFF, 0xFF, 0xFF, 0x40, 0x0F, 0xC0, 0x80, 0xFF, 0xFF, 0xFF, 0xFF,
|
||||
///*0040*/ 0x40, 0x0D, 0x80, 0x30, 0x00, 0x00, 0x20, 0x01, 0x40, 0x0D, 0x81, 0x00, 0x00, 0x1D, 0x00, 0x00,
|
||||
///*0050*/ 0x40, 0x0F, 0xC0, 0x14, 0x00, 0x09, 0x83, 0x40, 0x40, 0x1F, 0x80, 0x14, 0x00, 0x00, 0x00, 0x00,
|
||||
///*0060*/ 0x40, 0x1F, 0x80, 0x18, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0x1C, 0x00, 0x00, 0x00, 0x00,
|
||||
///*0070*/ 0x40, 0x1F, 0x80, 0x20, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0x24, 0x00, 0x00, 0x00, 0x00,
|
||||
///*0080*/ 0x40, 0x1F, 0x80, 0x28, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0x2C, 0x00, 0x00, 0x00, 0x00,
|
||||
///*0090*/ 0x40, 0x1F, 0x80, 0x30, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0x34, 0x00, 0x00, 0x00, 0x00,
|
||||
///*00a0*/ 0x40, 0x1F, 0x80, 0x38, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0x3C, 0x00, 0x00, 0x00, 0x00,
|
||||
///*00b0*/ 0x40, 0x1F, 0x80, 0x40, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0x44, 0x00, 0x00, 0x00, 0x00,
|
||||
///*00c0*/ 0x40, 0x1F, 0x80, 0x48, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0x4C, 0x00, 0x00, 0x00, 0x00,
|
||||
///*00d0*/ 0x40, 0x1F, 0x80, 0x50, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0x54, 0x00, 0x00, 0x00, 0x00,
|
||||
///*00e0*/ 0x40, 0x1F, 0x80, 0x58, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0x5C, 0x00, 0x00, 0x00, 0x00,
|
||||
///*00f0*/ 0x40, 0x1F, 0x80, 0x60, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0x64, 0x00, 0x00, 0x00, 0x00,
|
||||
///*0100*/ 0x40, 0x1F, 0x80, 0x68, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0x6C, 0x00, 0x00, 0x00, 0x00,
|
||||
///*0110*/ 0x40, 0x1F, 0x80, 0x70, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0x74, 0x00, 0x00, 0x00, 0x00,
|
||||
///*0120*/ 0x40, 0x1F, 0x80, 0x78, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0x7C, 0x00, 0x00, 0x00, 0x00,
|
||||
///*0130*/ 0x40, 0x1F, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0x84, 0x00, 0x00, 0x00, 0x00,
|
||||
///*0140*/ 0x40, 0x1F, 0x80, 0x88, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0x8C, 0x00, 0x00, 0x00, 0x00,
|
||||
///*0150*/ 0x40, 0x1F, 0x80, 0x90, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0x94, 0x00, 0x00, 0x00, 0x00,
|
||||
///*0160*/ 0x40, 0x1F, 0x80, 0x98, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0x9C, 0x00, 0x00, 0x00, 0x00,
|
||||
///*0170*/ 0x40, 0x1F, 0x80, 0xA0, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0xA4, 0x00, 0x00, 0x00, 0x00,
|
||||
///*0180*/ 0x40, 0x1F, 0x80, 0xA8, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x80, 0xAC, 0x00, 0x00, 0x00, 0x00,
|
||||
///*0190*/ 0x40, 0x1F, 0x80, 0xB0, 0x00, 0x00, 0x00, 0x10, 0x40, 0x1F, 0x80, 0xB4, 0x00, 0x00, 0x00, 0x00,
|
||||
///*01a0*/ 0x40, 0x1F, 0x80, 0xB8, 0x00, 0x00, 0x00, 0x00, 0x40, 0x1F, 0x82, 0x04, 0x00, 0x00, 0x00, 0xF1,
|
||||
///*01b0*/ 0x40, 0x1F, 0x82, 0x08, 0x00, 0x00, 0x00, 0xF1, 0x40, 0x1F, 0x82, 0x0C, 0x00, 0x00, 0x00, 0xF1,
|
||||
///*01c0*/ 0x40, 0x1F, 0x82, 0x10, 0x00, 0x00, 0x00, 0xF1, 0x40, 0x1F, 0x82, 0x14, 0x00, 0x00, 0x00, 0xF1,
|
||||
///*01d0*/ 0x40, 0x1F, 0x82, 0x18, 0x00, 0x00, 0x00, 0xF1, 0x40, 0x1F, 0x82, 0x1C, 0x00, 0x00, 0x00, 0xF1,
|
||||
///*01e0*/ 0x40, 0x1F, 0x82, 0x20, 0x00, 0x00, 0x00, 0xF1, 0x40, 0x1F, 0x82, 0x24, 0x00, 0x00, 0x00, 0xF1,
|
||||
///*01f0*/ 0x40, 0x1F, 0x82, 0x28, 0x00, 0x00, 0x00, 0xF1, 0x40, 0x1F, 0x82, 0x2C, 0x00, 0x00, 0x00, 0xF1,
|
||||
///*0200*/ 0x40, 0x1F, 0x82, 0x30, 0x00, 0x00, 0x00, 0xF1, 0x40, 0x1F, 0x82, 0x34, 0x00, 0x00, 0x00, 0xF1,
|
||||
///*0210*/ 0x40, 0x1F, 0x82, 0x38, 0x00, 0x00, 0x00, 0xF1, 0x40, 0x1F, 0x82, 0x3C, 0x00, 0x00, 0x00, 0xF1,
|
||||
///*0220*/ 0x40, 0x1F, 0x82, 0x40, 0x00, 0x00, 0x00, 0xF1, 0x40, 0x1F, 0x82, 0x44, 0x00, 0x00, 0x00, 0xF1,
|
||||
///*0230*/ 0x40, 0x1F, 0x82, 0x48, 0x00, 0x00, 0x00, 0xF1, 0x40, 0x1F, 0x82, 0x4C, 0x00, 0x00, 0x00, 0xF1,
|
||||
///*0240*/ 0x40, 0x1F, 0x82, 0x50, 0x00, 0x00, 0x00, 0xF1, 0x40, 0x1F, 0x82, 0x54, 0x00, 0x00, 0x00, 0xF1,
|
||||
///*0250*/ 0x40, 0x1F, 0x82, 0x58, 0x00, 0x00, 0x00, 0xF1, 0x40, 0x1F, 0x82, 0x5C, 0x00, 0x00, 0x00, 0xF1,
|
||||
///*0260*/ 0x40, 0x1F, 0x82, 0x60, 0x00, 0x00, 0x00, 0xF1, 0x40, 0x1F, 0x82, 0x64, 0x00, 0x00, 0x00, 0xF1,
|
||||
///*0270*/ 0x40, 0x1F, 0x82, 0x68, 0x00, 0x00, 0x00, 0xF1, 0x40, 0x1F, 0x82, 0x6C, 0x00, 0x00, 0x00, 0xF1,
|
||||
///*0280*/ 0x40, 0x1F, 0x82, 0x70, 0x00, 0x00, 0x00, 0xF1, 0x40, 0x1F, 0x82, 0x74, 0x00, 0x00, 0x00, 0xF1,
|
||||
///*0290*/ 0x40, 0x1F, 0x82, 0x78, 0x00, 0x00, 0x00, 0xF1, 0x40, 0x1F, 0x82, 0x7C, 0x00, 0x00, 0x00, 0xF1,
|
||||
///*02a0*/ 0x40, 0x1F, 0x82, 0x80, 0x00, 0x00, 0x00, 0xF1, 0x40, 0x1F, 0x82, 0x84, 0x00, 0x00, 0x00, 0xF1,
|
||||
///*02b0*/ 0x40, 0x1F, 0x82, 0x88, 0x00, 0x00, 0x00, 0xF1, 0x40, 0x1F, 0x82, 0x8C, 0x00, 0x00, 0x00, 0xF1,
|
||||
///*02c0*/ 0x40, 0x1F, 0x82, 0x90, 0x00, 0x00, 0x00, 0xF1, 0x40, 0x1F, 0x82, 0x94, 0x00, 0x00, 0x00, 0xF1,
|
||||
///*02d0*/ 0x40, 0x1F, 0x82, 0x98, 0x00, 0x00, 0x00, 0xF1, 0x40, 0x1F, 0x82, 0x9C, 0x00, 0x00, 0x00, 0xF1,
|
||||
///*02e0*/ 0x40, 0x1F, 0x82, 0xA0, 0x00, 0x00, 0x00, 0xF1, 0x40, 0x1F, 0x82, 0xA4, 0x00, 0x00, 0x00, 0xF1,
|
||||
///*02f0*/ 0x40, 0x1F, 0x82, 0xA8, 0x00, 0x00, 0x00, 0xF1, 0xCC, 0x00, 0x0C, 0x14, 0x40, 0x2F, 0x00, 0x00,
|
||||
///*0300*/ 0x00, 0x00, 0x00, 0x02, 0xCC, 0x00, 0x9C, 0x04, 0x40, 0x2F, 0x00, 0x00, 0x10, 0x00, 0x00, 0x04,
|
||||
///*0310*/ 0x40, 0x2F, 0x00, 0x08, 0x00, 0x03, 0x05, 0x24, 0x40, 0x2F, 0x00, 0x0C, 0x06, 0x03, 0x05, 0x24,
|
||||
///*0320*/ 0x40, 0x2F, 0x00, 0x10, 0x80, 0x00, 0x00, 0x21, 0x40, 0x2F, 0x00, 0x14, 0x90, 0x00, 0x00, 0x21,
|
||||
///*0330*/ 0x40, 0x2F, 0x00, 0x04, 0x00, 0x00, 0x00, 0x08, 0x40, 0x2F, 0x00, 0x40, 0x00, 0x00, 0x0B, 0x27,
|
||||
///*0340*/ 0x40, 0x2F, 0x00, 0x44, 0x00, 0x10, 0x01, 0x00, 0x40, 0x2F, 0x00, 0x48, 0x00, 0x02, 0x02, 0x01,
|
||||
///*0350*/ 0x40, 0x2F, 0x00, 0x4C, 0x08, 0x19, 0x3D, 0x0E, 0x40, 0x2F, 0x00, 0x74, 0x00, 0x65, 0x29, 0x22,
|
||||
///*0360*/ 0x40, 0x2F, 0x00, 0x78, 0x00, 0x01, 0x09, 0x20, 0x40, 0x2F, 0x00, 0x7C, 0x50, 0x21, 0x0A, 0x08,
|
||||
///*0370*/ 0x40, 0x2F, 0x00, 0x80, 0x00, 0x00, 0x00, 0x21, 0x40, 0x2F, 0x00, 0x84, 0x00, 0x88, 0x88, 0x88,
|
||||
///*0380*/ 0x40, 0x2F, 0x00, 0x94, 0x00, 0x00, 0x00, 0x02, 0x40, 0x2F, 0x00, 0x98, 0x00, 0x00, 0x00, 0x00,
|
||||
///*0390*/ 0x40, 0x2F, 0x00, 0x90, 0x80, 0x00, 0x00, 0x00, 0x40, 0x2F, 0x00, 0x9C, 0xA5, 0x5A, 0x00, 0x0F,
|
||||
///*03a0*/ 0xCF, 0x00, 0x0C, 0x1C, 0x40, 0x2F, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0xCC, 0x00, 0x14, 0x04,
|
||||
///*03b0*/ 0x40, 0x2F, 0x00, 0x90, 0x80, 0x00, 0x00, 0x00, 0x40, 0x2F, 0x00, 0x9C, 0xA5, 0x5A, 0x00, 0x0C,
|
||||
///*03c0*/ 0xCF, 0x00, 0x0C, 0x1C, 0x40, 0x2F, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0xCC, 0x00, 0x14, 0x04,
|
||||
///*03d0*/ 0x40, 0x2F, 0x00, 0x90, 0x80, 0x00, 0x00, 0x00, 0x40, 0x2F, 0x00, 0x9C, 0xA5, 0x5A, 0x00, 0x0C,
|
||||
///*03e0*/ 0xCF, 0x00, 0x0C, 0x1C, 0x40, 0x2F, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0xCC, 0x00, 0x1C, 0x04,
|
||||
///*03f0*/ 0x40, 0x2F, 0x00, 0xA0, 0x00, 0x00, 0x00, 0x22, 0x40, 0x2F, 0x00, 0x90, 0x80, 0x00, 0x00, 0x00,
|
||||
///*0400*/ 0x40, 0x2F, 0x00, 0x9C, 0xA5, 0x5A, 0x00, 0x0A, 0xCF, 0x00, 0x0C, 0x1C, 0x40, 0x2F, 0x00, 0x3C,
|
||||
///*0410*/ 0x00, 0x00, 0x00, 0x01,
|
||||
//};
|
||||
|
||||
|
||||
|
||||
const uint8_t dcd_sdram[1072] = {
|
||||
/*0000*/ 0xD2,
|
||||
|
|
|
|||
|
|
@ -12,7 +12,7 @@
|
|||
|
||||
/**
|
||||
* @file TestCh438.c
|
||||
* @brief support to test ch438 function
|
||||
* @brief support to test ch438 function, only support aiit_arm32_board and aiit_riscv64-board
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2021-04-24
|
||||
|
|
|
|||
Loading…
Reference in New Issue