forked from xuos/xiuos
add xidatong-riscv64 bsp for nuttx
This commit is contained in:
wgzAIIT
parent
4ee205876a
commit
66d30ed255
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#
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# For a description of the syntax of this configuration file,
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# see misc/tools/kconfig-language.txt.
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#
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if ARCH_BOARD_XIDATONG_RISCV64
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menuconfig BSP_USING_CH438
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bool "Using CH438 device"
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default n
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if BSP_USING_CH438
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config CH438_EXTUART0
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bool "Using Ch438 Port 0"
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default n
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menu "Ch438 Port 0 Configuration"
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depends on CH438_EXTUART0
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config CH438_EXTUART0_BAUD
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int "Ch438 Port 0 Baud Rate."
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default 115200
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---help---
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The configured BAUD of the CH438 EXTUART0.
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endmenu
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config CH438_EXTUART1
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bool "Using Ch438 Port 1"
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default n
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menu "Ch438 Port 1 Configuration"
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depends on CH438_EXTUART1
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config CH438_EXTUART1_BAUD
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int "Ch438 Port 1 Baud Rate."
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default 115200
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---help---
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The configured BAUD of the CH438 EXTUART1.
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endmenu
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config CH438_EXTUART2
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bool "Using Ch438 Port 2"
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default n
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menu "Ch438 Port 2 Configuration"
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depends on CH438_EXTUART2
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config CH438_EXTUART2_BAUD
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int "Ch438 Port 2 Baud Rate."
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default 115200
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---help---
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The configured BAUD of the CH438 EXTUART2.
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endmenu
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config CH438_EXTUART3
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bool "Using Ch438 Port 3"
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default n
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menu "Ch438 Port 3 Configuration"
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depends on CH438_EXTUART3
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config CH438_EXTUART3_BAUD
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int "Ch438 Port 3 Baud Rate."
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default 115200
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---help---
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The configured BAUD of the CH438 EXTUART3.
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endmenu
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config CH438_EXTUART4
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bool "Using Ch438 Port 4"
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default n
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menu "Ch438 Port 4 Configuration"
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depends on CH438_EXTUART4
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config CH438_EXTUART4_BAUD
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int "Ch438 Port 4 Baud Rate."
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default 115200
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---help---
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The configured BAUD of the CH438 EXTUART4.
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endmenu
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config CH438_EXTUART5
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bool "Using Ch438 Port 5"
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default n
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menu "Ch438 Port 5 Configuration"
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depends on CH438_EXTUART5
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config CH438_EXTUART5_BAUD
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int "Ch438 Port 5 Baud Rate."
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default 115200
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---help---
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The configured BAUD of the CH438 EXTUART5.
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endmenu
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config CH438_EXTUART6
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bool "Using Ch438 Port 6"
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default n
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menu "Ch438 Port 6 Configuration"
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depends on CH438_EXTUART6
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config CH438_EXTUART6_BAUD
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int "Ch438 Port 6 Baud Rate."
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default 115200
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---help---
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The configured BAUD of the CH438 EXTUART6.
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endmenu
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config CH438_EXTUART7
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bool "Using Ch438 Port 7"
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default n
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menu "Ch438 Port 7 Configuration"
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depends on CH438_EXTUART7
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config CH438_EXTUART7_BAUD
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int "Ch438 Port 7 Baud Rate."
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default 115200
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---help---
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The configured BAUD of the CH438 EXTUART7.
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endmenu
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endif # BSP_USING_CH438
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endif # ARCH_BOARD_XIDATONG_RISCV64
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@ -0,0 +1,47 @@
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1. Download and install toolchain
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$ curl https://static.dev.sifive.com/dev-tools/riscv64-unknown-elf-gcc-8.3.0-2019.08.0-x86_64-linux-ubuntu14.tar.gz
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2. Build and install qemu
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$ git clone https://github.com/qemu/qemu
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$ cd qemu
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$ ./configure --target-list=riscv64-softmmu
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$ make
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$ sudo make install
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3. Modify defconfig
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--- a/boards/risc-v/k210/xidatong-riscv64/configs/nsh/defconfig
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+++ b/boards/risc-v/k210/xidatong-riscv64/configs/nsh/defconfig
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@@ -25,6 +25,7 @@ CONFIG_EXAMPLES_HELLO=y
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CONFIG_FS_PROCFS=y
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CONFIG_IDLETHREAD_STACKSIZE=2048
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CONFIG_INTELHEX_BINARY=y
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+CONFIG_K210_WITH_QEMU=y
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CONFIG_LIBC_PERROR_STDOUT=y
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CONFIG_LIBC_STRERROR=y
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4. Configure and build NuttX
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$ mkdir ./nuttx; cd ./nuttx
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$ git clone https://github.com/apache/incubator-nuttx.git
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$ git clone https://github.com/apache/incubator-nuttx-apps.git
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$ cd nuttx
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$ make distclean
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$ ./tools/configure.sh xidatong-riscv64:nsh
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$ make V=1
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5. Run the nuttx with qemu
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$ qemu-system-riscv64 -nographic -machine sifive_u -bios ./nuttx
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NOTE: To run nuttx for kostest, gdb needs to be used to load both nuttx_user.elf and nuttx
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$ qemu-system-riscv64 -nographic -machine sifive_u -s -S
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$ riscv64-unknown-elf-gdb -ex 'target extended-remot:1234' -ex 'load nuttx_user.elf' -ex 'load nuttx' -ex 'c'
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6. TODO
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Support FPU
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Support RISC-V User mode
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@ -0,0 +1,42 @@
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1. Download and install toolchain and openocd-k210
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$ curl https://static.dev.sifive.com/dev-tools/riscv64-unknown-elf-gcc-8.3.0-2019.08.0-x86_64-linux-ubuntu14.tar.gz
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$ export PATH=$PATH:/$TOOL_CHAIN_PATH/bin
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2. Build openocd-k210
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$ git clone https://github.com/kendryte/openocd-kendryte
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$ cd openocd-kendryte
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$ ./bootstrap & ./configure & make
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3. Configure and build NuttX
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$ mkdir ./nuttx; cd ./nuttx
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$ git clone https://github.com/apache/incubator-nuttx.git nuttx
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$ git clone https://github.com/apache/incubator-nuttx-apps.git apps
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$ cd nuttx
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$ make distclean
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$ ./tools/configure.sh xidatong-riscv64:nsh
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$ make V=1
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4. Download and run the nuttx from SRAM (not SPI-Flash)
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$ picocom -b 115200 /dev/ttyUSB0
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$ sudo ./src/openocd -s ./tcl -f ./tcl/kendryte.cfg -m 0
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$ riscv64-unknown-elf-gdb ./nuttx
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(gdb) target extended-remote :3333
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(gdb) load nuttx
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(gdb) c
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5. Write nuttx.bin to SPI-Flash
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$ pip3 install kflash
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$ kflash -p /dev/ttyUSB0 -b 1500000 ./nuttx/nuttx.bin
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NOTE: The kflash_gui is not recommended because it's unstable
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6. TODO
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Support peripherals such as GPIO/SPI/I2C/...
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Support FPU
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Support RISC-V U-mode including memory protection
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@ -0,0 +1,63 @@
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#
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# This file is autogenerated: PLEASE DO NOT EDIT IT.
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#
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# You can use "make menuconfig" to make any modifications to the installed .config file.
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# You can then do "make savedefconfig" to generate a new defconfig file that includes your
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# modifications.
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#
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# CONFIG_NSH_DISABLE_LOSMART is not set
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# CONFIG_STANDARD_SERIAL is not set
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CONFIG_ADD_NUTTX_FETURES=y
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CONFIG_ARCH="risc-v"
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CONFIG_ARCH_BOARD="xidatong-riscv64"
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CONFIG_ARCH_BOARD_XIDATONG_RISCV64=y
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CONFIG_ARCH_CHIP="k210"
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CONFIG_ARCH_CHIP_K210=y
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CONFIG_ARCH_INTERRUPTSTACK=2048
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CONFIG_ARCH_RISCV=y
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CONFIG_ARCH_STACKDUMP=y
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CONFIG_BINFMT_DISABLE=y
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CONFIG_BOARD_LOOPSPERMSEC=46000
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CONFIG_BUILTIN=y
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CONFIG_DEBUG_FULLOPT=y
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CONFIG_DEBUG_SYMBOLS=y
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CONFIG_DEV_ZERO=y
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CONFIG_EXAMPLES_HELLO=y
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CONFIG_FS_PROCFS=y
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CONFIG_IDLETHREAD_STACKSIZE=2048
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CONFIG_INIT_ENTRYPOINT="nsh_main"
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CONFIG_INIT_STACKSIZE=3072
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CONFIG_INTELHEX_BINARY=y
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CONFIG_LIBC_PERROR_STDOUT=y
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CONFIG_LIBC_STRERROR=y
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CONFIG_NSH_ARCHINIT=y
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CONFIG_NSH_BUILTIN_APPS=y
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CONFIG_NSH_DISABLE_IFUPDOWN=y
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CONFIG_NSH_DISABLE_MKDIR=y
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CONFIG_NSH_DISABLE_RM=y
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CONFIG_NSH_DISABLE_RMDIR=y
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CONFIG_NSH_DISABLE_UMOUNT=y
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CONFIG_NSH_READLINE=y
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CONFIG_NSH_STRERROR=y
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CONFIG_PREALLOC_TIMERS=4
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CONFIG_RAM_SIZE=2097152
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CONFIG_RAM_START=0x80400000
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CONFIG_RAW_BINARY=y
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CONFIG_READLINE_CMD_HISTORY=y
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CONFIG_READLINE_CMD_HISTORY_LEN=100
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CONFIG_READLINE_CMD_HISTORY_LINELEN=120
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CONFIG_RR_INTERVAL=200
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CONFIG_SCHED_WAITPID=y
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CONFIG_STACK_COLORATION=y
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CONFIG_START_DAY=28
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CONFIG_START_MONTH=12
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CONFIG_START_YEAR=2019
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CONFIG_SYSTEM_NSH=y
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CONFIG_TASK_NAME_SIZE=20
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CONFIG_TESTING_GETPRIME=y
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CONFIG_TESTING_OSTEST=y
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CONFIG_UART0_SERIAL_CONSOLE=y
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CONFIG_READLINE_TABCOMPLETION=y
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CONFIG_SCHED_HPWORK=y
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CONFIG_DEV_GPIO=y
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@ -0,0 +1,97 @@
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/****************************************************************************
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* boards/risc-v/k210/xidatong-riscv64/include/board.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __BOARDS_RISCV_K210_XIDATONG_RISCV64_INCLUDE_BOARD_H
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#define __BOARDS_RISCV_K210_XIDATONG_RISCV64_INCLUDE_BOARD_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#ifndef __ASSEMBLY__
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# include <stdint.h>
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#endif
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#include "k210.h"
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#include "k210_fpioa.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define BOARD_LED_PAD 14 /* Connected to red led */
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/* Map pad 14 to gpiohs io 0 */
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#define BOARD_LED_IO_FUNC K210_IO_FUNC_GPIOHS0
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#define BOARD_LED_IO 0
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#define LED_STARTED 0 /* N/C */
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#define LED_HEAPALLOCATE 1 /* N/C */
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#define LED_IRQSENABLED 2 /* N/C */
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#define LED_STACKCREATED 3 /* N/C */
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#define LED_INIRQ 4 /* N/C */
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#define LED_SIGNAL 5 /* N/C */
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#define LED_ASSERTION 6 /* N/C */
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#define LED_PANIC 7 /* blink */
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/* GPIO pins used by the GPIO Subsystem */
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#define BOARD_NGPIOOUT 2 /* Amount of GPIO Output pins */
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#define BOARD_NGPIOINT 0 /* Amount of GPIO Input */
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/****************************************************************************
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* Public Types
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****************************************************************************/
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#ifndef __ASSEMBLY__
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/****************************************************************************
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* Public Data
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****************************************************************************/
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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/****************************************************************************
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* Name: k210_boardinitialize
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****************************************************************************/
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void k210_boardinitialize(void);
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __BOARDS_RISC-V_K210_XIDATONG_RISCV64_INCLUDE_BOARD_H */
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@ -0,0 +1,92 @@
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############################################################################
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# boards/risc-v/k210/xidatong-riscv64/kernel/Makefile
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#
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# Licensed to the Apache Software Foundation (ASF) under one or more
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# contributor license agreements. See the NOTICE file distributed with
|
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# this work for additional information regarding copyright ownership. The
|
||||
# ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
# "License"); you may not use this file except in compliance with the
|
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# License. You may obtain a copy of the License at
|
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
|
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# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
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# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
# License for the specific language governing permissions and limitations
|
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# under the License.
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#
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############################################################################
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include $(TOPDIR)/Make.defs
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# The entry point name (if none is provided in the .config file)
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CONFIG_INIT_ENTRYPOINT ?= user_start
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ENTRYPT = $(patsubst "%",%,$(CONFIG_INIT_ENTRYPOINT))
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# Get the paths to the libraries and the links script path in format that
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# is appropriate for the host OS
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USER_LIBPATHS = $(addprefix -L,$(call CONVERT_PATH,$(addprefix $(TOPDIR)$(DELIM),$(dir $(USERLIBS)))))
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USER_LDSCRIPT = -T $(call CONVERT_PATH,$(BOARD_DIR)$(DELIM)scripts$(DELIM)memory.ld)
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USER_LDSCRIPT += -T $(call CONVERT_PATH,$(BOARD_DIR)$(DELIM)scripts$(DELIM)user-space.ld)
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USER_HEXFILE += $(call CONVERT_PATH,$(TOPDIR)$(DELIM)nuttx_user.hex)
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USER_SRECFILE += $(call CONVERT_PATH,$(TOPDIR)$(DELIM)nuttx_user.srec)
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USER_BINFILE += $(call CONVERT_PATH,$(TOPDIR)$(DELIM)nuttx_user.bin)
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USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT)
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USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS))))
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USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}"
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# Source files
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CSRCS = k210_userspace.c
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COBJS = $(CSRCS:.c=$(OBJEXT))
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OBJS = $(COBJS)
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# Targets:
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all: $(TOPDIR)$(DELIM)nuttx_user.elf $(TOPDIR)$(DELIM)User.map
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.PHONY: nuttx_user.elf depend clean distclean
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$(COBJS): %$(OBJEXT): %.c
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$(call COMPILE, $<, $@)
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# Create the nuttx_user.elf file containing all of the user-mode code
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nuttx_user.elf: $(OBJS)
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$(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC)
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$(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf
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@echo "LD: nuttx_user.elf"
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$(Q) cp -a nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.elf
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ifeq ($(CONFIG_INTELHEX_BINARY),y)
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@echo "CP: nuttx_user.hex"
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$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O ihex nuttx_user.elf $(USER_HEXFILE)
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endif
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ifeq ($(CONFIG_MOTOROLA_SREC),y)
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@echo "CP: nuttx_user.srec"
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$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O srec nuttx_user.elf $(USER_SRECFILE)
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endif
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ifeq ($(CONFIG_RAW_BINARY),y)
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@echo "CP: nuttx_user.bin"
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$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O binary nuttx_user.elf $(USER_BINFILE)
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endif
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$(TOPDIR)$(DELIM)User.map: nuttx_user.elf
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@echo "MK: User.map"
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$(Q) $(NM) -n nuttx_user.elf >$(TOPDIR)$(DELIM)User.map
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$(Q) $(CROSSDEV)size nuttx_user.elf
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.depend:
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depend: .depend
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clean:
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$(call DELFILE, nuttx_user.elf)
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$(call DELFILE, "$(TOPDIR)$(DELIM)nuttx_user.*")
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||||
$(call DELFILE, "$(TOPDIR)$(DELIM)User.map")
|
||||
$(call CLEAN)
|
||||
|
||||
distclean: clean
|
||||
|
|
@ -0,0 +1,114 @@
|
|||
/****************************************************************************
|
||||
* boards/risc-v/k210/xidatong-riscv64/kernel/k210_userspace.c
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <stdlib.h>
|
||||
|
||||
#include <nuttx/arch.h>
|
||||
#include <nuttx/mm/mm.h>
|
||||
#include <nuttx/wqueue.h>
|
||||
#include <nuttx/userspace.h>
|
||||
|
||||
#if defined(CONFIG_BUILD_PROTECTED) && !defined(__KERNEL__)
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/* Configuration ************************************************************/
|
||||
|
||||
#ifndef CONFIG_NUTTX_USERSPACE
|
||||
# error "CONFIG_NUTTX_USERSPACE not defined"
|
||||
#endif
|
||||
|
||||
#if CONFIG_NUTTX_USERSPACE != 0x80100000
|
||||
# error "CONFIG_NUTTX_USERSPACE must match the value in memory.ld"
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Data
|
||||
****************************************************************************/
|
||||
|
||||
/* These 'addresses' of these values are setup by the linker script.
|
||||
* They are not actual uint32_t storage locations!
|
||||
* They are only used meaningfully in the following way:
|
||||
*
|
||||
* - The linker script defines, for example, the symbol_sdata.
|
||||
* - The declaration extern uint32_t _sdata; makes C happy. C will believe
|
||||
* that the value _sdata is the address of a uint32_t variable _data
|
||||
* (it is not!).
|
||||
* - We can recover the linker value then by simply taking the address of
|
||||
* of _data. like: uint32_t *pdata = &_sdata;
|
||||
*/
|
||||
|
||||
extern uint32_t _stext; /* Start of .text */
|
||||
extern uint32_t _etext; /* End_1 of .text + .rodata */
|
||||
extern const uint32_t _eronly; /* End+1 of read only section */
|
||||
extern uint32_t _sdata; /* Start of .data */
|
||||
extern uint32_t _edata; /* End+1 of .data */
|
||||
extern uint32_t _sbss; /* Start of .bss */
|
||||
extern uint32_t _ebss; /* End+1 of .bss */
|
||||
|
||||
/* This is the user space entry point */
|
||||
|
||||
int CONFIG_INIT_ENTRYPOINT(int argc, char *argv[]);
|
||||
|
||||
const struct userspace_s userspace locate_data(".userspace") =
|
||||
{
|
||||
/* General memory map */
|
||||
|
||||
.us_entrypoint = (main_t)CONFIG_INIT_ENTRYPOINT,
|
||||
.us_textstart = (uintptr_t)&_stext,
|
||||
.us_textend = (uintptr_t)&_etext,
|
||||
.us_datasource = (uintptr_t)&_eronly,
|
||||
.us_datastart = (uintptr_t)&_sdata,
|
||||
.us_dataend = (uintptr_t)&_edata,
|
||||
.us_bssstart = (uintptr_t)&_sbss,
|
||||
.us_bssend = (uintptr_t)&_ebss,
|
||||
|
||||
/* Memory manager heap structure */
|
||||
|
||||
.us_heap = &g_mmheap,
|
||||
|
||||
/* Task/thread startup routines */
|
||||
|
||||
.task_startup = nxtask_startup,
|
||||
|
||||
/* Signal handler trampoline */
|
||||
|
||||
.signal_handler = up_signal_handler,
|
||||
|
||||
/* User-space work queue support (declared in include/nuttx/wqueue.h) */
|
||||
|
||||
#ifdef CONFIG_LIBC_USRWORK
|
||||
.work_usrstart = work_usrstart,
|
||||
#endif
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
#endif /* CONFIG_BUILD_PROTECTED && !__KERNEL__ */
|
||||
|
|
@ -0,0 +1,70 @@
|
|||
############################################################################
|
||||
# boards/risc-v/k210/xidatong-riscv64/scripts/Make.defs
|
||||
#
|
||||
# Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
# contributor license agreements. See the NOTICE file distributed with
|
||||
# this work for additional information regarding copyright ownership. The
|
||||
# ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
# "License"); you may not use this file except in compliance with the
|
||||
# License. You may obtain a copy of the License at
|
||||
#
|
||||
# http://www.apache.org/licenses/LICENSE-2.0
|
||||
#
|
||||
# Unless required by applicable law or agreed to in writing, software
|
||||
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
# License for the specific language governing permissions and limitations
|
||||
# under the License.
|
||||
#
|
||||
############################################################################
|
||||
|
||||
include $(TOPDIR)/.config
|
||||
include $(TOPDIR)/tools/Config.mk
|
||||
include $(TOPDIR)/arch/risc-v/src/common/Toolchain.defs
|
||||
|
||||
LDSCRIPT = ld.script
|
||||
|
||||
ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
|
||||
|
||||
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
|
||||
ARCHOPTIMIZATION = -g
|
||||
ASARCHCPUFLAGS += -Wa,-g
|
||||
endif
|
||||
|
||||
MAXOPTIMIZATION = -Os
|
||||
|
||||
ifneq ($(CONFIG_DEBUG_NOOPT),y)
|
||||
ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing
|
||||
endif
|
||||
|
||||
ARCHCPUFLAGS += -mcmodel=medany -mstrict-align
|
||||
ARCHCFLAGS = -fno-common -ffunction-sections -fdata-sections
|
||||
ARCHCXXFLAGS = -fno-common -fno-exceptions -fcheck-new -fno-rtti
|
||||
ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
|
||||
ARCHWARNINGSXX = -Wall -Wshadow -Wundef
|
||||
|
||||
CFLAGS := $(APPPATHS) $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
|
||||
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
|
||||
CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
|
||||
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
|
||||
CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
|
||||
AFLAGS += $(CFLAGS) -D__ASSEMBLY__ $(ASARCHCPUFLAGS)
|
||||
|
||||
# Loadable module definitions
|
||||
|
||||
CMODULEFLAGS = $(CFLAGS)
|
||||
|
||||
LDMODULEFLAGS = -r -e module_initialize
|
||||
LDMODULEFLAGS += -T $(call CONVERT_PATH,$(TOPDIR)/libs/libc/modlib/gnu-elf.ld)
|
||||
|
||||
# ELF module definitions
|
||||
|
||||
CELFFLAGS = $(CFLAGS)
|
||||
CXXELFFLAGS = $(CXXFLAGS)
|
||||
|
||||
LDELFFLAGS = -r -e main
|
||||
LDELFFLAGS += -T $(call CONVERT_PATH,$(BOARD_DIR)$(DELIM)scripts$(DELIM)gnu-elf.ld)
|
||||
|
||||
# File extensions
|
||||
|
||||
LDFLAGS += --gc-sections -melf64lriscv
|
||||
|
|
@ -0,0 +1,115 @@
|
|||
/****************************************************************************
|
||||
* boards/risc-v/k210/xidatong-riscv64/scripts/gnu-elf.ld
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text 0x00000000 :
|
||||
{
|
||||
_stext = . ;
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.gnu.warning)
|
||||
*(.stub)
|
||||
*(.glue_7)
|
||||
*(.glue_7t)
|
||||
*(.jcr)
|
||||
|
||||
/* C++ support: The .init and .fini sections contain specific logic
|
||||
* to manage static constructors and destructors.
|
||||
*/
|
||||
|
||||
*(.gnu.linkonce.t.*)
|
||||
*(.init) /* Old ABI */
|
||||
*(.fini) /* Old ABI */
|
||||
_etext = . ;
|
||||
}
|
||||
|
||||
.rodata :
|
||||
{
|
||||
_srodata = . ;
|
||||
*(.rodata)
|
||||
*(.rodata1)
|
||||
*(.rodata.*)
|
||||
*(.gnu.linkonce.r*)
|
||||
_erodata = . ;
|
||||
}
|
||||
|
||||
.data :
|
||||
{
|
||||
_sdata = . ;
|
||||
*(.data)
|
||||
*(.data1)
|
||||
*(.data.*)
|
||||
*(.gnu.linkonce.d*)
|
||||
. = ALIGN(4);
|
||||
_edata = . ;
|
||||
}
|
||||
|
||||
/* C++ support. For each global and static local C++ object,
|
||||
* GCC creates a small subroutine to construct the object. Pointers
|
||||
* to these routines (not the routines themselves) are stored as
|
||||
* simple, linear arrays in the .ctors section of the object file.
|
||||
* Similarly, pointers to global/static destructor routines are
|
||||
* stored in .dtors.
|
||||
*/
|
||||
|
||||
.ctors :
|
||||
{
|
||||
_sctors = . ;
|
||||
*(.ctors) /* Old ABI: Unallocated */
|
||||
*(.init_array) /* New ABI: Allocated */
|
||||
_edtors = . ;
|
||||
}
|
||||
|
||||
.dtors :
|
||||
{
|
||||
_sdtors = . ;
|
||||
*(.dtors) /* Old ABI: Unallocated */
|
||||
*(.fini_array) /* New ABI: Allocated */
|
||||
_edtors = . ;
|
||||
}
|
||||
|
||||
.bss :
|
||||
{
|
||||
_sbss = . ;
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(.sbss)
|
||||
*(.sbss.*)
|
||||
*(.gnu.linkonce.b*)
|
||||
*(COMMON)
|
||||
_ebss = . ;
|
||||
}
|
||||
|
||||
/* Stabs debugging sections. */
|
||||
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_info 0 : { *(.debug_info) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
}
|
||||
|
|
@ -0,0 +1,100 @@
|
|||
/****************************************************************************
|
||||
* boards/risc-v/k210/xidatong-riscv64/scripts/ld.script
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/* Reg Access Start addr End addr Size
|
||||
* MEM0 CPU w/ cache 0x80000000 - 0x803fffff : 4MB
|
||||
* MEM1 CPU w/ cache 0x80400000 - 0x805fffff : 2MB
|
||||
* MEM0 CPU w/o cache 0x40000000 - 0x403fffff : 4MB
|
||||
* MEM1 CPU w/o cache 0x40400000 - 0x405fffff : 4MB
|
||||
*/
|
||||
|
||||
MEMORY
|
||||
{
|
||||
progmem (rx) : ORIGIN = 0x80000000, LENGTH = 4096K /* w/ cache */
|
||||
sram (rwx) : ORIGIN = 0x80400000, LENGTH = 2048K /* w/ cache */
|
||||
}
|
||||
|
||||
OUTPUT_ARCH("riscv")
|
||||
|
||||
ENTRY(_stext)
|
||||
EXTERN(_vectors)
|
||||
SECTIONS
|
||||
{
|
||||
.text : {
|
||||
_stext = ABSOLUTE(.);
|
||||
*(.vectors)
|
||||
*(.text .text.*)
|
||||
*(.fixup)
|
||||
*(.gnu.warning)
|
||||
*(.rodata .rodata.* .srodata .srodata.*)
|
||||
*(.gnu.linkonce.t.*)
|
||||
*(.glue_7)
|
||||
*(.glue_7t)
|
||||
*(.got)
|
||||
*(.gcc_except_table)
|
||||
*(.gnu.linkonce.r.*)
|
||||
_etext = ABSOLUTE(.);
|
||||
} > progmem
|
||||
|
||||
.init_section : ALIGN(4) {
|
||||
_sinit = ABSOLUTE(.);
|
||||
KEEP(*(.init_array .init_array.*))
|
||||
_einit = ABSOLUTE(.);
|
||||
} > progmem
|
||||
|
||||
_eronly = ABSOLUTE(.);
|
||||
|
||||
.data : ALIGN(4) {
|
||||
_sdata = ABSOLUTE(.);
|
||||
*(.data .data.*)
|
||||
*(.sdata .sdata.* .sdata2.*)
|
||||
*(.gnu.linkonce.d.*)
|
||||
*(.gnu.linkonce.s.*)
|
||||
CONSTRUCTORS
|
||||
. = ALIGN(4);
|
||||
_edata = ABSOLUTE(.);
|
||||
} > sram AT > progmem
|
||||
|
||||
.bss : ALIGN(4) {
|
||||
_sbss = ABSOLUTE(.);
|
||||
*(.bss .bss.*)
|
||||
*(.sbss .sbss.*)
|
||||
*(.gnu.linkonce.b.*)
|
||||
*(.gnu.linkonce.sb.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(32);
|
||||
_ebss = ABSOLUTE(.);
|
||||
} > sram
|
||||
|
||||
/* Stabs debugging sections. */
|
||||
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_info 0 : { *(.debug_info) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
}
|
||||
|
|
@ -0,0 +1,37 @@
|
|||
/****************************************************************************
|
||||
* boards/risc-v/k210/xidatong-riscv64/scripts/memory.ld
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/* Reg Access Start addr End addr Size
|
||||
* MEM0 CPU w/ cache 0x80000000 - 0x803fffff : 4MB
|
||||
* MEM1 CPU w/ cache 0x80400000 - 0x805fffff : 2MB
|
||||
* MEM0 CPU w/o cache 0x40000000 - 0x403fffff : 4MB
|
||||
* MEM1 CPU w/o cache 0x40400000 - 0x405fffff : 4MB
|
||||
*/
|
||||
|
||||
MEMORY
|
||||
{
|
||||
kflash (rx) : ORIGIN = 0x80000000, LENGTH = 1024K /* w/ cache */
|
||||
uflash (rx) : ORIGIN = 0x80100000, LENGTH = 1024K /* w/ cache */
|
||||
xflash (rx) : ORIGIN = 0x80200000, LENGTH = 2048K /* w/ cache */
|
||||
|
||||
ksram (rwx) : ORIGIN = 0x80400000, LENGTH = 512K /* w/ cache */
|
||||
usram (rwx) : ORIGIN = 0x80480000, LENGTH = 512K /* w/ cache */
|
||||
xsram (rwx) : ORIGIN = 0x80500000, LENGTH = 1024K /* w/ cache */
|
||||
}
|
||||
|
|
@ -0,0 +1,94 @@
|
|||
/****************************************************************************
|
||||
* boards/risc-v/k210/xidatong-riscv64/scripts/user-space.ld
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/* NOTE: This depends on the memory.ld script having been included prior to
|
||||
* this script.
|
||||
*/
|
||||
|
||||
OUTPUT_ARCH("riscv")
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.userspace : {
|
||||
*(.userspace)
|
||||
} > uflash
|
||||
|
||||
.text : {
|
||||
_stext = ABSOLUTE(.);
|
||||
*(.text .text.*)
|
||||
*(.fixup)
|
||||
*(.gnu.warning)
|
||||
*(.rodata .rodata.*)
|
||||
*(.gnu.linkonce.t.*)
|
||||
*(.glue_7)
|
||||
*(.glue_7t)
|
||||
*(.got)
|
||||
*(.gcc_except_table)
|
||||
*(.gnu.linkonce.r.*)
|
||||
_etext = ABSOLUTE(.);
|
||||
} > uflash
|
||||
|
||||
.init_section : {
|
||||
_sinit = ABSOLUTE(.);
|
||||
KEEP(*(.init_array .init_array.*))
|
||||
_einit = ABSOLUTE(.);
|
||||
} > uflash
|
||||
|
||||
__exidx_start = ABSOLUTE(.);
|
||||
|
||||
__exidx_end = ABSOLUTE(.);
|
||||
|
||||
_eronly = ABSOLUTE(.);
|
||||
|
||||
.data : {
|
||||
_sdata = ABSOLUTE(.);
|
||||
*(.data .data.*)
|
||||
*(.sdata .sdata.* .sdata2.*)
|
||||
*(.gnu.linkonce.d.*)
|
||||
CONSTRUCTORS
|
||||
. = ALIGN(4);
|
||||
_edata = ABSOLUTE(.);
|
||||
} > usram AT > uflash
|
||||
|
||||
.bss : {
|
||||
_sbss = ABSOLUTE(.);
|
||||
*(.bss .bss.*)
|
||||
*(.sbss .sbss.*)
|
||||
*(.gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
_ebss = ABSOLUTE(.);
|
||||
} > usram
|
||||
|
||||
/* Stabs debugging sections */
|
||||
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_info 0 : { *(.debug_info) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
}
|
||||
|
|
@ -0,0 +1,41 @@
|
|||
############################################################################
|
||||
# boards/risc-v/k210/xidatong-riscv64/src/Makefile
|
||||
#
|
||||
# Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
# contributor license agreements. See the NOTICE file distributed with
|
||||
# this work for additional information regarding copyright ownership. The
|
||||
# ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
# "License"); you may not use this file except in compliance with the
|
||||
# License. You may obtain a copy of the License at
|
||||
#
|
||||
# http://www.apache.org/licenses/LICENSE-2.0
|
||||
#
|
||||
# Unless required by applicable law or agreed to in writing, software
|
||||
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
# License for the specific language governing permissions and limitations
|
||||
# under the License.
|
||||
#
|
||||
############################################################################
|
||||
|
||||
include $(TOPDIR)/Make.defs
|
||||
|
||||
CSRCS = k210_bringup.c k210_boot.c
|
||||
|
||||
ifeq ($(CONFIG_BOARDCTL),y)
|
||||
CSRCS += k210_appinit.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_ARCH_LEDS),y)
|
||||
CSRCS += k210_leds.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_DEV_GPIO),y)
|
||||
CSRCS += k210_gpio.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_BSP_USING_CH438),y)
|
||||
CSRCS += k210_ch438.c ch438_demo.c
|
||||
endif
|
||||
|
||||
include $(TOPDIR)/boards/Board.mk
|
||||
|
|
@ -0,0 +1,84 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file ch438_demo.c
|
||||
* @brief imxrt board sd card automount
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2022.06.08
|
||||
*/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
#include "k210_ch438.h"
|
||||
#include <sys/ioctl.h>
|
||||
#include <nuttx/ioexpander/gpio.h>
|
||||
|
||||
void CH438Demo(void)
|
||||
{
|
||||
int fd, m0fd, m1fd;
|
||||
int i;
|
||||
char sendbuffer1[4] = {0xC0,0x04,0x01,0x09};
|
||||
char sendbuffer2[6] = {0xC0,0x00,0x03,0x12,0x34,0x61};
|
||||
char sendbuffer3[3] = {0xC1,0x04,0x01};
|
||||
char sendbuffer4[3] = {0xC1,0x00,0x03};
|
||||
char buffer[256];
|
||||
int readlen;
|
||||
|
||||
fd = open("/dev/extuart_dev3", O_RDWR);
|
||||
ioctl(fd, OPE_INT, (unsigned long)9600);
|
||||
m0fd = open("/dev/gpout0", O_RDWR);
|
||||
m1fd = open("/dev/gpout1", O_RDWR);
|
||||
ioctl(m0fd, GPIOC_WRITE, (unsigned long)1);
|
||||
ioctl(m1fd, GPIOC_WRITE, (unsigned long)1);
|
||||
sleep(1);
|
||||
|
||||
write(fd, sendbuffer1,4);
|
||||
sleep(1);
|
||||
readlen = read(fd, buffer, 256);
|
||||
printf("readlen1 = %d\n", readlen);
|
||||
for(i = 0;i< readlen; ++i)
|
||||
{
|
||||
printf("0x%x\n", buffer[i]);
|
||||
}
|
||||
|
||||
write(fd, sendbuffer2,6);
|
||||
sleep(1);
|
||||
readlen = read(fd, buffer, 256);
|
||||
printf("readlen1 = %d\n", readlen);
|
||||
for(i = 0;i< readlen; ++i)
|
||||
{
|
||||
printf("0x%x\n", buffer[i]);
|
||||
}
|
||||
|
||||
write(fd, sendbuffer3,3);
|
||||
sleep(1);
|
||||
readlen = read(fd, buffer, 256);
|
||||
printf("readlen1 = %d\n", readlen);
|
||||
for(i = 0;i< readlen; ++i)
|
||||
{
|
||||
printf("0x%x\n", buffer[i]);
|
||||
}
|
||||
|
||||
write(fd, sendbuffer4,3);
|
||||
sleep(1);
|
||||
readlen = read(fd, buffer, 256);
|
||||
printf("readlen1 = %d\n", readlen);
|
||||
for(i = 0;i< readlen; ++i)
|
||||
{
|
||||
printf("0x%x\n", buffer[i]);
|
||||
}
|
||||
|
||||
close(fd);
|
||||
}
|
||||
|
|
@ -0,0 +1,75 @@
|
|||
/****************************************************************************
|
||||
* boards/risc-v/k210/xidatong-riscv64/src/k210_appinit.c
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <stdbool.h>
|
||||
#include <stdio.h>
|
||||
#include <syslog.h>
|
||||
#include <errno.h>
|
||||
|
||||
#include <nuttx/board.h>
|
||||
|
||||
#include "k210.h"
|
||||
#include "xidatong-riscv64.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: board_app_initialize
|
||||
*
|
||||
* Description:
|
||||
* Perform architecture specific initialization
|
||||
*
|
||||
* Input Parameters:
|
||||
* arg - The boardctl() argument is passed to the board_app_initialize()
|
||||
* implementation without modification. The argument has no
|
||||
* meaning to NuttX; the meaning of the argument is a contract
|
||||
* between the board-specific initialization logic and the
|
||||
* matching application logic. The value could be such things as a
|
||||
* mode enumeration value, a set of DIP switch switch settings, a
|
||||
* pointer to configuration data read from a file or serial FLASH,
|
||||
* or whatever you would like to do with it. Every implementation
|
||||
* should accept zero/NULL as a default configuration.
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero (OK) is returned on success; a negated errno value is returned on
|
||||
* any failure to indicate the nature of the failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int board_app_initialize(uintptr_t arg)
|
||||
{
|
||||
#ifdef CONFIG_BOARD_LATE_INITIALIZE
|
||||
/* Board initialization already performed by board_late_initialize() */
|
||||
|
||||
return OK;
|
||||
#else
|
||||
/* Perform board-specific initialization */
|
||||
|
||||
return k210_bringup();
|
||||
#endif
|
||||
}
|
||||
|
|
@ -0,0 +1,58 @@
|
|||
/****************************************************************************
|
||||
* boards/risc-v/k210/xidatong-riscv64/src/k210_boot.c
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <debug.h>
|
||||
|
||||
#include <nuttx/board.h>
|
||||
#include <arch/board/board.h>
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: k210_boardinitialize
|
||||
*
|
||||
* Description:
|
||||
* All K210 architectures must provide the following entry point.
|
||||
* This entry point is called early in the initialization -- after all
|
||||
* memory has been configured and mapped but before any devices have been
|
||||
* initialized.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void k210_boardinitialize(void)
|
||||
{
|
||||
board_autoled_initialize();
|
||||
}
|
||||
|
|
@ -0,0 +1,78 @@
|
|||
/****************************************************************************
|
||||
* boards/risc-v/k210/xidatong-riscv64/src/k210_bringup.c
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <stdbool.h>
|
||||
#include <stdio.h>
|
||||
#include <debug.h>
|
||||
#include <errno.h>
|
||||
|
||||
#include <nuttx/board.h>
|
||||
#include <nuttx/fs/fs.h>
|
||||
|
||||
#include "k210.h"
|
||||
#include "xidatong-riscv64.h"
|
||||
|
||||
#ifdef CONFIG_BSP_USING_CH438
|
||||
# include "k210_ch438.h"
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: k210_bringup
|
||||
****************************************************************************/
|
||||
|
||||
int k210_bringup(void)
|
||||
{
|
||||
int ret = OK;
|
||||
|
||||
#ifdef CONFIG_FS_PROCFS
|
||||
/* Mount the procfs file system */
|
||||
|
||||
ret = nx_mount(NULL, "/proc", "procfs", 0, NULL);
|
||||
if (ret < 0)
|
||||
{
|
||||
serr("ERROR: Failed to mount procfs at %s: %d\n", "/proc", ret);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_DEV_GPIO
|
||||
ret = k210_gpio_init();
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR, "Failed to initialize GPIO Driver: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BSP_USING_CH438
|
||||
board_ch438_initialize();
|
||||
#endif
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
|
@ -0,0 +1,922 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file k210_ch438.c
|
||||
* @brief K210 board sd card automount
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2022.06.08
|
||||
*/
|
||||
|
||||
#include "k210_ch438.h"
|
||||
|
||||
#define CH438PORTNUM 8
|
||||
#define CH438_BUFFSIZE 256
|
||||
#define CH438_INCREMENT MSEC2TICK(33)
|
||||
|
||||
/****************************************************************************
|
||||
* Private Function Prototypes
|
||||
****************************************************************************/
|
||||
static FAR void getInterruptStatus(FAR void *arg);
|
||||
static void ch438_io_config(void);
|
||||
static void CH438SetOutput(void);
|
||||
static void CH438SetInput(void);
|
||||
static uint8_t ReadCH438Data(uint8_t addr);
|
||||
static void WriteCH438Data(uint8_t addr, const uint8_t dat);
|
||||
static void WriteCH438Block(uint8_t mAddr, uint8_t mLen, const uint8_t *mBuf);
|
||||
static void Ch438UartSend(uint8_t ext_uart_no, const uint8_t *Data, uint16_t Num);
|
||||
uint8_t CH438UARTRcv(uint8_t ext_uart_no, uint8_t *buf, size_t size);
|
||||
static void K210CH438Init(void);
|
||||
static void CH438PortInit(uint8_t ext_uart_no, uint32_t baud_rate);
|
||||
static int K210Ch438WriteData(uint8_t ext_uart_no, const uint8_t *write_buffer, size_t size);
|
||||
static size_t K210Ch438ReadData(uint8_t ext_uart_no, size_t size);
|
||||
static void Ch438InitDefault(void);
|
||||
|
||||
static int ch438_open(FAR struct file *filep);
|
||||
static int ch438_close(FAR struct file *filep);
|
||||
static ssize_t ch438_read(FAR struct file *filep, FAR char *buffer, size_t buflen);
|
||||
static ssize_t ch438_write(FAR struct file *filep, FAR const char *buffer, size_t buflen);
|
||||
static int ch438_ioctl(FAR struct file *filep, int cmd, unsigned long arg);
|
||||
static int ch438_register(FAR const char *devpath, uint8_t ext_uart_no);
|
||||
|
||||
/****************************************************************************
|
||||
* Private type
|
||||
****************************************************************************/
|
||||
struct ch438_dev_s
|
||||
{
|
||||
sem_t devsem; /* ch438 port devsem */
|
||||
uint8_t port; /* ch438 port number*/
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
****************************************************************************/
|
||||
|
||||
/*mutex of corresponding port*/
|
||||
static pthread_mutex_t mutex[CH438PORTNUM] =
|
||||
{
|
||||
PTHREAD_MUTEX_INITIALIZER,
|
||||
PTHREAD_MUTEX_INITIALIZER,
|
||||
PTHREAD_MUTEX_INITIALIZER,
|
||||
PTHREAD_MUTEX_INITIALIZER,
|
||||
PTHREAD_MUTEX_INITIALIZER,
|
||||
PTHREAD_MUTEX_INITIALIZER,
|
||||
PTHREAD_MUTEX_INITIALIZER,
|
||||
PTHREAD_MUTEX_INITIALIZER
|
||||
};
|
||||
|
||||
/* Condition variable of corresponding port */
|
||||
static pthread_cond_t cond[CH438PORTNUM] =
|
||||
{
|
||||
PTHREAD_COND_INITIALIZER,
|
||||
PTHREAD_COND_INITIALIZER,
|
||||
PTHREAD_COND_INITIALIZER,
|
||||
PTHREAD_COND_INITIALIZER,
|
||||
PTHREAD_COND_INITIALIZER,
|
||||
PTHREAD_COND_INITIALIZER,
|
||||
PTHREAD_COND_INITIALIZER,
|
||||
PTHREAD_COND_INITIALIZER
|
||||
};
|
||||
|
||||
/* This array shows whether the current serial port is selected */
|
||||
static bool const g_uart_selected[CH438PORTNUM] =
|
||||
{
|
||||
#ifdef CONFIG_CH438_EXTUART0
|
||||
[0] = true,
|
||||
#endif
|
||||
#ifdef CONFIG_CH438_EXTUART1
|
||||
[1] = true,
|
||||
#endif
|
||||
#ifdef CONFIG_CH438_EXTUART2
|
||||
[2] = true,
|
||||
#endif
|
||||
#ifdef CONFIG_CH438_EXTUART3
|
||||
[3] = true,
|
||||
#endif
|
||||
#ifdef CONFIG_CH438_EXTUART4
|
||||
[4] = true,
|
||||
#endif
|
||||
#ifdef CONFIG_CH438_EXTUART5
|
||||
[5] = true,
|
||||
#endif
|
||||
#ifdef CONFIG_CH438_EXTUART6
|
||||
[6] = true,
|
||||
#endif
|
||||
#ifdef CONFIG_CH438_EXTUART7
|
||||
[7] = true,
|
||||
#endif
|
||||
};
|
||||
|
||||
/* ch438 Callback work queue structure */
|
||||
static struct work_s g_ch438irqwork;
|
||||
|
||||
/* there is data available on the corresponding port */
|
||||
static volatile bool done[CH438PORTNUM] = {false,false,false,false,false,false,false,false};
|
||||
|
||||
/* Eight port data buffer */
|
||||
static uint8_t buff[CH438PORTNUM][CH438_BUFFSIZE];
|
||||
|
||||
/* the value of interrupt number of SSR register */
|
||||
static uint8_t Interruptnum[CH438PORTNUM] = {0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,};
|
||||
|
||||
/* Offset address of serial port number */
|
||||
static uint8_t offsetadd[CH438PORTNUM] = {0x00,0x10,0x20,0x30,0x08,0x18,0x28,0x38,};
|
||||
|
||||
/* port open status global variable */
|
||||
static volatile bool g_ch438open[CH438PORTNUM] = {false,false,false,false,false,false,false,false};
|
||||
|
||||
/* Ch438 POSIX interface */
|
||||
static const struct file_operations g_ch438fops =
|
||||
{
|
||||
ch438_open,
|
||||
ch438_close,
|
||||
ch438_read,
|
||||
ch438_write,
|
||||
NULL,
|
||||
ch438_ioctl,
|
||||
NULL
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
* Name: getInterruptStatus
|
||||
*
|
||||
* Description:
|
||||
* thread task getInterruptStatus
|
||||
*
|
||||
****************************************************************************/
|
||||
static FAR void getInterruptStatus(FAR void *arg)
|
||||
{
|
||||
uint8_t i;
|
||||
uint8_t gInterruptStatus; /* Interrupt register status */
|
||||
|
||||
gInterruptStatus = ReadCH438Data(REG_SSR_ADDR);
|
||||
|
||||
if(gInterruptStatus)
|
||||
{
|
||||
for(i = 0; i < CH438PORTNUM; i++)
|
||||
{
|
||||
if(g_uart_selected[i] && (gInterruptStatus & Interruptnum[i]))
|
||||
{
|
||||
pthread_mutex_lock(&mutex[i]);
|
||||
done[i] = true;
|
||||
pthread_cond_signal(&cond[i]);
|
||||
pthread_mutex_unlock(&mutex[i]);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
work_queue(HPWORK, &g_ch438irqwork, getInterruptStatus, NULL, CH438_INCREMENT);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: Ch438SetPinMode
|
||||
*
|
||||
* Description:
|
||||
* Configure pin mode
|
||||
*
|
||||
* Input Parameters:
|
||||
* hard_io - Hardware IO
|
||||
* soft_io - Software IO mapped to
|
||||
* dir - true for output, false for input
|
||||
*
|
||||
****************************************************************************/
|
||||
static void ch438_io_config(void)
|
||||
{
|
||||
k210_fpioa_config(CH438_NWR_PIN, CH438_FUNC_GPIO(FPIOA_CH438_NWR));
|
||||
k210_fpioa_config(CH438_NRD_PIN, CH438_FUNC_GPIO(FPIOA_CH438_NRD));
|
||||
k210_fpioa_config(CH438_ALE_PIN, CH438_FUNC_GPIO(FPIOA_CH438_ALE));
|
||||
|
||||
k210_fpioa_config(CH438_D0_PIN, CH438_FUNC_GPIO(FPIOA_CH438_D0));
|
||||
k210_fpioa_config(CH438_D1_PIN, CH438_FUNC_GPIO(FPIOA_CH438_D1));
|
||||
k210_fpioa_config(CH438_D2_PIN, CH438_FUNC_GPIO(FPIOA_CH438_D2));
|
||||
k210_fpioa_config(CH438_D3_PIN, CH438_FUNC_GPIO(FPIOA_CH438_D3));
|
||||
k210_fpioa_config(CH438_D4_PIN, CH438_FUNC_GPIO(FPIOA_CH438_D4));
|
||||
k210_fpioa_config(CH438_D5_PIN, CH438_FUNC_GPIO(FPIOA_CH438_D5));
|
||||
k210_fpioa_config(CH438_D6_PIN, CH438_FUNC_GPIO(FPIOA_CH438_D6));
|
||||
k210_fpioa_config(CH438_D7_PIN, CH438_FUNC_GPIO(FPIOA_CH438_D7));
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: CH438SetOutput
|
||||
*
|
||||
* Description:
|
||||
* Configure pin mode to output
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void CH438SetOutput(void)
|
||||
{
|
||||
k210_gpiohs_set_direction(FPIOA_CH438_D0, GPIO_DM_OUTPUT);
|
||||
k210_gpiohs_set_direction(FPIOA_CH438_D1, GPIO_DM_OUTPUT);
|
||||
k210_gpiohs_set_direction(FPIOA_CH438_D2, GPIO_DM_OUTPUT);
|
||||
k210_gpiohs_set_direction(FPIOA_CH438_D3, GPIO_DM_OUTPUT);
|
||||
k210_gpiohs_set_direction(FPIOA_CH438_D4, GPIO_DM_OUTPUT);
|
||||
k210_gpiohs_set_direction(FPIOA_CH438_D5, GPIO_DM_OUTPUT);
|
||||
k210_gpiohs_set_direction(FPIOA_CH438_D6, GPIO_DM_OUTPUT);
|
||||
k210_gpiohs_set_direction(FPIOA_CH438_D7, GPIO_DM_OUTPUT);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: CH438SetInput
|
||||
*
|
||||
* Description:
|
||||
* Configure pin mode to input
|
||||
*
|
||||
****************************************************************************/
|
||||
static void CH438SetInput(void)
|
||||
{
|
||||
k210_gpiohs_set_direction(FPIOA_CH438_D0, GPIO_DM_INPUT_PULL_UP);
|
||||
k210_gpiohs_set_direction(FPIOA_CH438_D1, GPIO_DM_INPUT_PULL_UP);
|
||||
k210_gpiohs_set_direction(FPIOA_CH438_D2, GPIO_DM_INPUT_PULL_UP);
|
||||
k210_gpiohs_set_direction(FPIOA_CH438_D3, GPIO_DM_INPUT_PULL_UP);
|
||||
k210_gpiohs_set_direction(FPIOA_CH438_D4, GPIO_DM_INPUT_PULL_UP);
|
||||
k210_gpiohs_set_direction(FPIOA_CH438_D5, GPIO_DM_INPUT_PULL_UP);
|
||||
k210_gpiohs_set_direction(FPIOA_CH438_D6, GPIO_DM_INPUT_PULL_UP);
|
||||
k210_gpiohs_set_direction(FPIOA_CH438_D7, GPIO_DM_INPUT_PULL_UP);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: ReadCH438Data
|
||||
*
|
||||
* Description:
|
||||
* Read data from ch438 address
|
||||
*
|
||||
****************************************************************************/
|
||||
static uint8_t ReadCH438Data(uint8_t addr)
|
||||
{
|
||||
uint8_t dat = 0;
|
||||
k210_gpiohs_set_value(FPIOA_CH438_NWR, true);
|
||||
k210_gpiohs_set_value(FPIOA_CH438_NRD, true);
|
||||
k210_gpiohs_set_value(FPIOA_CH438_ALE, true);
|
||||
|
||||
CH438SetOutput();
|
||||
up_udelay(1);
|
||||
|
||||
if(addr &0x80) k210_gpiohs_set_value(FPIOA_CH438_D7, true); else k210_gpiohs_set_value(FPIOA_CH438_D7, false);
|
||||
if(addr &0x40) k210_gpiohs_set_value(FPIOA_CH438_D6, true); else k210_gpiohs_set_value(FPIOA_CH438_D6, false);
|
||||
if(addr &0x20) k210_gpiohs_set_value(FPIOA_CH438_D5, true); else k210_gpiohs_set_value(FPIOA_CH438_D5, false);
|
||||
if(addr &0x10) k210_gpiohs_set_value(FPIOA_CH438_D4, true); else k210_gpiohs_set_value(FPIOA_CH438_D4, false);
|
||||
if(addr &0x08) k210_gpiohs_set_value(FPIOA_CH438_D3, true); else k210_gpiohs_set_value(FPIOA_CH438_D3, false);
|
||||
if(addr &0x04) k210_gpiohs_set_value(FPIOA_CH438_D2, true); else k210_gpiohs_set_value(FPIOA_CH438_D2, false);
|
||||
if(addr &0x02) k210_gpiohs_set_value(FPIOA_CH438_D1, true); else k210_gpiohs_set_value(FPIOA_CH438_D1, false);
|
||||
if(addr &0x01) k210_gpiohs_set_value(FPIOA_CH438_D0, true); else k210_gpiohs_set_value(FPIOA_CH438_D0, false);
|
||||
|
||||
up_udelay(1);
|
||||
|
||||
k210_gpiohs_set_value(FPIOA_CH438_ALE, false);
|
||||
up_udelay(1);
|
||||
|
||||
CH438SetInput();
|
||||
up_udelay(1);
|
||||
|
||||
k210_gpiohs_set_value(FPIOA_CH438_NRD, false);
|
||||
up_udelay(1);
|
||||
|
||||
if (k210_gpiohs_get_value(FPIOA_CH438_D7)) dat |= 0x80;
|
||||
if (k210_gpiohs_get_value(FPIOA_CH438_D6)) dat |= 0x40;
|
||||
if (k210_gpiohs_get_value(FPIOA_CH438_D5)) dat |= 0x20;
|
||||
if (k210_gpiohs_get_value(FPIOA_CH438_D4)) dat |= 0x10;
|
||||
if (k210_gpiohs_get_value(FPIOA_CH438_D3)) dat |= 0x08;
|
||||
if (k210_gpiohs_get_value(FPIOA_CH438_D2)) dat |= 0x04;
|
||||
if (k210_gpiohs_get_value(FPIOA_CH438_D1)) dat |= 0x02;
|
||||
if (k210_gpiohs_get_value(FPIOA_CH438_D0)) dat |= 0x01;
|
||||
|
||||
k210_gpiohs_set_value(FPIOA_CH438_NRD, true);
|
||||
k210_gpiohs_set_value(FPIOA_CH438_ALE, true);
|
||||
up_udelay(1);
|
||||
|
||||
return dat;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: WriteCH438Data
|
||||
*
|
||||
* Description:
|
||||
* write data to ch438 address
|
||||
*
|
||||
****************************************************************************/
|
||||
static void WriteCH438Data(uint8_t addr, const uint8_t dat)
|
||||
{
|
||||
k210_gpiohs_set_value(FPIOA_CH438_ALE, true);
|
||||
k210_gpiohs_set_value(FPIOA_CH438_NRD, true);
|
||||
k210_gpiohs_set_value(FPIOA_CH438_NWR, true);
|
||||
|
||||
CH438SetOutput();
|
||||
up_udelay(1);
|
||||
|
||||
if(addr &0x80) k210_gpiohs_set_value(FPIOA_CH438_D7, true); else k210_gpiohs_set_value(FPIOA_CH438_D7, false);
|
||||
if(addr &0x40) k210_gpiohs_set_value(FPIOA_CH438_D6, true); else k210_gpiohs_set_value(FPIOA_CH438_D6, false);
|
||||
if(addr &0x20) k210_gpiohs_set_value(FPIOA_CH438_D5, true); else k210_gpiohs_set_value(FPIOA_CH438_D5, false);
|
||||
if(addr &0x10) k210_gpiohs_set_value(FPIOA_CH438_D4, true); else k210_gpiohs_set_value(FPIOA_CH438_D4, false);
|
||||
if(addr &0x08) k210_gpiohs_set_value(FPIOA_CH438_D3, true); else k210_gpiohs_set_value(FPIOA_CH438_D3, false);
|
||||
if(addr &0x04) k210_gpiohs_set_value(FPIOA_CH438_D2, true); else k210_gpiohs_set_value(FPIOA_CH438_D2, false);
|
||||
if(addr &0x02) k210_gpiohs_set_value(FPIOA_CH438_D1, true); else k210_gpiohs_set_value(FPIOA_CH438_D1, false);
|
||||
if(addr &0x01) k210_gpiohs_set_value(FPIOA_CH438_D0, true); else k210_gpiohs_set_value(FPIOA_CH438_D0, false);
|
||||
|
||||
up_udelay(1);
|
||||
|
||||
k210_gpiohs_set_value(FPIOA_CH438_ALE, false);
|
||||
up_udelay(1);
|
||||
|
||||
if(dat &0x80) k210_gpiohs_set_value(FPIOA_CH438_D7, true); else k210_gpiohs_set_value(FPIOA_CH438_D7, false);
|
||||
if(dat &0x40) k210_gpiohs_set_value(FPIOA_CH438_D6, true); else k210_gpiohs_set_value(FPIOA_CH438_D6, false);
|
||||
if(dat &0x20) k210_gpiohs_set_value(FPIOA_CH438_D5, true); else k210_gpiohs_set_value(FPIOA_CH438_D5, false);
|
||||
if(dat &0x10) k210_gpiohs_set_value(FPIOA_CH438_D4, true); else k210_gpiohs_set_value(FPIOA_CH438_D4, false);
|
||||
if(dat &0x08) k210_gpiohs_set_value(FPIOA_CH438_D3, true); else k210_gpiohs_set_value(FPIOA_CH438_D3, false);
|
||||
if(dat &0x04) k210_gpiohs_set_value(FPIOA_CH438_D2, true); else k210_gpiohs_set_value(FPIOA_CH438_D2, false);
|
||||
if(dat &0x02) k210_gpiohs_set_value(FPIOA_CH438_D1, true); else k210_gpiohs_set_value(FPIOA_CH438_D1, false);
|
||||
if(dat &0x01) k210_gpiohs_set_value(FPIOA_CH438_D0, true); else k210_gpiohs_set_value(FPIOA_CH438_D0, false);
|
||||
|
||||
up_udelay(1);
|
||||
|
||||
k210_gpiohs_set_value(FPIOA_CH438_NWR, false);
|
||||
up_udelay(1);
|
||||
|
||||
k210_gpiohs_set_value(FPIOA_CH438_NWR, true);
|
||||
k210_gpiohs_set_value(FPIOA_CH438_ALE, true);
|
||||
up_udelay(1);
|
||||
|
||||
CH438SetInput();
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: WriteCH438Block
|
||||
*
|
||||
* Description:
|
||||
* Write data block from ch438 address
|
||||
*
|
||||
****************************************************************************/
|
||||
static void WriteCH438Block(uint8_t mAddr, uint8_t mLen, const uint8_t *mBuf)
|
||||
{
|
||||
while(mLen--)
|
||||
WriteCH438Data(mAddr, *mBuf++);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: CH438UARTSend
|
||||
*
|
||||
* Description:
|
||||
* Enable FIFO mode, which is used for ch438 serial port to send multi byte data,
|
||||
* with a maximum of 128 bytes of data sent at a time
|
||||
*
|
||||
****************************************************************************/
|
||||
static void Ch438UartSend(uint8_t ext_uart_no, const uint8_t *Data, uint16_t Num)
|
||||
{
|
||||
uint8_t REG_LSR_ADDR,REG_THR_ADDR;
|
||||
REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR;
|
||||
REG_THR_ADDR = offsetadd[ext_uart_no] | REG_THR0_ADDR;
|
||||
|
||||
while(1)
|
||||
{
|
||||
while((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_TEMT) == 0); /* wait for sending data done, THR and TSR is NULL */
|
||||
if(Num <= 128)
|
||||
{
|
||||
WriteCH438Block(REG_THR_ADDR, Num, Data);
|
||||
break;
|
||||
}
|
||||
else
|
||||
{
|
||||
WriteCH438Block(REG_THR_ADDR, 128, Data);
|
||||
Num -= 128;
|
||||
Data += 128;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: CH438UARTRcv
|
||||
*
|
||||
* Description:
|
||||
* Disable FIFO mode for ch438 serial port to receive multi byte data
|
||||
*
|
||||
****************************************************************************/
|
||||
uint8_t CH438UARTRcv(uint8_t ext_uart_no, uint8_t *buf, size_t size)
|
||||
{
|
||||
uint8_t rcv_num = 0;
|
||||
uint8_t dat = 0;
|
||||
uint8_t REG_LSR_ADDR,REG_RBR_ADDR;
|
||||
uint8_t *read_buffer;
|
||||
size_t buffer_index = 0;
|
||||
|
||||
read_buffer = buf;
|
||||
|
||||
REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR;
|
||||
REG_RBR_ADDR = offsetadd[ext_uart_no] | REG_RBR0_ADDR;
|
||||
|
||||
/* Wait for the data to be ready */
|
||||
while ((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_DATARDY) == 0);
|
||||
|
||||
while (((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_DATARDY) == 0x01) && (size != 0))
|
||||
{
|
||||
dat = ReadCH438Data(REG_RBR_ADDR);
|
||||
*read_buffer = dat;
|
||||
read_buffer++;
|
||||
buffer_index++;
|
||||
if (255 == buffer_index) {
|
||||
buffer_index = 0;
|
||||
read_buffer = buf;
|
||||
}
|
||||
|
||||
++rcv_num;
|
||||
--size;
|
||||
}
|
||||
|
||||
return rcv_num;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: K210CH438Init
|
||||
*
|
||||
* Description:
|
||||
* ch438 initialization
|
||||
*
|
||||
****************************************************************************/
|
||||
static void K210CH438Init(void)
|
||||
{
|
||||
CH438SetOutput();
|
||||
k210_gpiohs_set_direction(FPIOA_CH438_NWR, GPIO_DM_OUTPUT);
|
||||
k210_gpiohs_set_direction(FPIOA_CH438_NRD, GPIO_DM_OUTPUT);
|
||||
k210_gpiohs_set_direction(FPIOA_CH438_ALE, GPIO_DM_OUTPUT);
|
||||
|
||||
k210_gpiohs_set_value(FPIOA_CH438_NWR, true);
|
||||
k210_gpiohs_set_value(FPIOA_CH438_NRD, true);
|
||||
k210_gpiohs_set_value(FPIOA_CH438_ALE, true);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: CH438PortInit
|
||||
*
|
||||
* Description:
|
||||
* ch438 port initialization
|
||||
*
|
||||
****************************************************************************/
|
||||
static void CH438PortInit(uint8_t ext_uart_no, uint32_t baud_rate)
|
||||
{
|
||||
uint32_t div;
|
||||
uint8_t DLL,DLM,dlab;
|
||||
uint8_t REG_LCR_ADDR;
|
||||
uint8_t REG_DLL_ADDR;
|
||||
uint8_t REG_DLM_ADDR;
|
||||
uint8_t REG_IER_ADDR;
|
||||
uint8_t REG_MCR_ADDR;
|
||||
uint8_t REG_FCR_ADDR;
|
||||
|
||||
REG_LCR_ADDR = offsetadd[ext_uart_no] | REG_LCR0_ADDR;
|
||||
REG_DLL_ADDR = offsetadd[ext_uart_no] | REG_DLL0_ADDR;
|
||||
REG_DLM_ADDR = offsetadd[ext_uart_no] | REG_DLM0_ADDR;
|
||||
REG_IER_ADDR = offsetadd[ext_uart_no] | REG_IER0_ADDR;
|
||||
REG_MCR_ADDR = offsetadd[ext_uart_no] | REG_MCR0_ADDR;
|
||||
REG_FCR_ADDR = offsetadd[ext_uart_no] | REG_FCR0_ADDR;
|
||||
|
||||
/* reset the uart */
|
||||
WriteCH438Data(REG_IER_ADDR, BIT_IER_RESET);
|
||||
up_mdelay(50);
|
||||
|
||||
dlab = ReadCH438Data(REG_IER_ADDR);
|
||||
dlab &= 0xDF;
|
||||
WriteCH438Data(REG_IER_ADDR, dlab);
|
||||
|
||||
/* set LCR register DLAB bit 1 */
|
||||
dlab = ReadCH438Data(REG_LCR_ADDR);
|
||||
dlab |= 0x80;
|
||||
WriteCH438Data(REG_LCR_ADDR, dlab);
|
||||
|
||||
div = (Fpclk >> 4) / baud_rate;
|
||||
DLM = div >> 8;
|
||||
DLL = div & 0xff;
|
||||
|
||||
/* set bps */
|
||||
WriteCH438Data(REG_DLL_ADDR, DLL);
|
||||
WriteCH438Data(REG_DLM_ADDR, DLM);
|
||||
|
||||
/* set FIFO mode, 112 bytes */
|
||||
WriteCH438Data(REG_FCR_ADDR, BIT_FCR_RECVTG1 | BIT_FCR_RECVTG0 | BIT_FCR_FIFOEN);
|
||||
|
||||
/* 8 bit word size, 1 bit stop bit, no crc */
|
||||
WriteCH438Data(REG_LCR_ADDR, BIT_LCR_WORDSZ1 | BIT_LCR_WORDSZ0);
|
||||
|
||||
/* enable interrupt */
|
||||
WriteCH438Data(REG_IER_ADDR, BIT_IER_IERECV);
|
||||
|
||||
/* allow interrupt output, DTR and RTS is 1 */
|
||||
WriteCH438Data(REG_MCR_ADDR, BIT_MCR_OUT2);
|
||||
|
||||
/* release the data in FIFO */
|
||||
WriteCH438Data(REG_FCR_ADDR, ReadCH438Data(REG_FCR_ADDR)| BIT_FCR_TFIFORST);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: K210Ch438ReadData
|
||||
*
|
||||
* Description:
|
||||
* Read data from ch438 port
|
||||
*
|
||||
****************************************************************************/
|
||||
static int K210Ch438WriteData(uint8_t ext_uart_no, const uint8_t *write_buffer, size_t size)
|
||||
{
|
||||
int write_len, write_len_continue;
|
||||
int i, write_index;
|
||||
DEBUGASSERT(write_buffer != NULL);
|
||||
|
||||
write_len = size;
|
||||
write_len_continue = size;
|
||||
|
||||
if(write_len > 256)
|
||||
{
|
||||
if(0 == write_len % 256)
|
||||
{
|
||||
write_index = write_len / 256;
|
||||
for(i = 0; i < write_index; i ++)
|
||||
{
|
||||
Ch438UartSend(ext_uart_no, write_buffer + i * 256, 256);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
write_index = 0;
|
||||
while(write_len_continue > 256)
|
||||
{
|
||||
Ch438UartSend(ext_uart_no, write_buffer + write_index * 256, 256);
|
||||
write_index++;
|
||||
write_len_continue = write_len - write_index * 256;
|
||||
}
|
||||
Ch438UartSend(ext_uart_no, write_buffer + write_index * 256, write_len_continue);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
Ch438UartSend(ext_uart_no, write_buffer, write_len);
|
||||
}
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: K210Ch438ReadData
|
||||
*
|
||||
* Description:
|
||||
* Read data from ch438 port
|
||||
*
|
||||
****************************************************************************/
|
||||
static size_t K210Ch438ReadData(uint8_t ext_uart_no, size_t size)
|
||||
{
|
||||
size_t RevLen = 0;
|
||||
uint8_t InterruptStatus;
|
||||
uint8_t REG_IIR_ADDR;
|
||||
uint8_t REG_LSR_ADDR;
|
||||
uint8_t REG_MSR_ADDR;
|
||||
|
||||
pthread_mutex_lock(&mutex[ext_uart_no]);
|
||||
while(done[ext_uart_no] == false)
|
||||
pthread_cond_wait(&cond[ext_uart_no], &mutex[ext_uart_no]);
|
||||
if(done[ext_uart_no] == true)
|
||||
{
|
||||
REG_IIR_ADDR = offsetadd[ext_uart_no] | REG_IIR0_ADDR;
|
||||
REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR;
|
||||
REG_MSR_ADDR = offsetadd[ext_uart_no] | REG_MSR0_ADDR;
|
||||
/* Read the interrupt status of the serial port */
|
||||
InterruptStatus = ReadCH438Data(REG_IIR_ADDR) & 0x0f;
|
||||
ch438info("InterruptStatus is %d\n", InterruptStatus);
|
||||
|
||||
switch(InterruptStatus)
|
||||
{
|
||||
case INT_NOINT: /* no interrupt */
|
||||
break;
|
||||
case INT_THR_EMPTY: /* the transmit hold register is not interrupted */
|
||||
break;
|
||||
case INT_RCV_OVERTIME: /* receive data timeout interrupt */
|
||||
case INT_RCV_SUCCESS: /* receive data available interrupt */
|
||||
RevLen = CH438UARTRcv(ext_uart_no, buff[ext_uart_no], size);
|
||||
break;
|
||||
case INT_RCV_LINES: /* receive line status interrupt */
|
||||
ReadCH438Data(REG_LSR_ADDR);
|
||||
break;
|
||||
case INT_MODEM_CHANGE: /* modem input change interrupt */
|
||||
ReadCH438Data(REG_MSR_ADDR);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
done[ext_uart_no] = false;
|
||||
}
|
||||
pthread_mutex_unlock(&mutex[ext_uart_no]);
|
||||
|
||||
return RevLen;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: Ch438InitDefault
|
||||
*
|
||||
* Description:
|
||||
* Ch438 default initialization function
|
||||
*
|
||||
****************************************************************************/
|
||||
static void Ch438InitDefault(void)
|
||||
{
|
||||
int ret = 0;
|
||||
int i;
|
||||
|
||||
/* Initialize the mutex */
|
||||
for(i = 0; i < CH438PORTNUM; i++)
|
||||
{
|
||||
if(!g_uart_selected[i])
|
||||
{
|
||||
continue;
|
||||
}
|
||||
|
||||
ret = pthread_mutex_init(&mutex[i], NULL);
|
||||
if(ret != 0)
|
||||
{
|
||||
ch438err("pthread_mutex_init failed, status=%d\n", ret);
|
||||
}
|
||||
}
|
||||
|
||||
/* Initialize the condition variable */
|
||||
for(i = 0; i < CH438PORTNUM; i++)
|
||||
{
|
||||
if(!g_uart_selected[i])
|
||||
{
|
||||
continue;
|
||||
}
|
||||
|
||||
ret = pthread_cond_init(&cond[i], NULL);
|
||||
if(ret != 0)
|
||||
{
|
||||
ch438err("pthread_cond_init failed, status=%d\n", ret);
|
||||
}
|
||||
}
|
||||
|
||||
ch438_io_config();
|
||||
K210CH438Init();
|
||||
|
||||
/* If a port is checked, the port will be initialized. Otherwise, the interrupt of the port will be disabled. */
|
||||
|
||||
#ifdef CONFIG_CH438_EXTUART0
|
||||
CH438PortInit(0, CONFIG_CH438_EXTUART0_BAUD);
|
||||
#else
|
||||
WriteCH438Data(REG_IER0_ADDR, 0x00);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CH438_EXTUART1
|
||||
CH438PortInit(1, CONFIG_CH438_EXTUART1_BAUD);
|
||||
#else
|
||||
WriteCH438Data(REG_IER1_ADDR, 0x00);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CH438_EXTUART2
|
||||
CH438PortInit(2, CONFIG_CH438_EXTUART2_BAUD);
|
||||
#else
|
||||
WriteCH438Data(REG_IER2_ADDR, 0x00);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CH438_EXTUART3
|
||||
CH438PortInit(3, CONFIG_CH438_EXTUART3_BAUD);
|
||||
#else
|
||||
WriteCH438Data(REG_IER3_ADDR, 0x00);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CH438_EXTUART4
|
||||
CH438PortInit(4, CONFIG_CH438_EXTUART4_BAUD);
|
||||
#else
|
||||
WriteCH438Data(REG_IER4_ADDR, 0x00);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CH438_EXTUART5
|
||||
CH438PortInit(5, CONFIG_CH438_EXTUART5_BAUD);
|
||||
#else
|
||||
WriteCH438Data(REG_IER5_ADDR, 0x00);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CH438_EXTUART6
|
||||
CH438PortInit(6, CONFIG_CH438_EXTUART6_BAUD);
|
||||
#else
|
||||
WriteCH438Data(REG_IER6_ADDR, 0x00);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CH438_EXTUART7
|
||||
CH438PortInit(7, CONFIG_CH438_EXTUART7_BAUD);
|
||||
#else
|
||||
WriteCH438Data(REG_IER7_ADDR, 0x00);
|
||||
#endif
|
||||
|
||||
up_mdelay(10);
|
||||
|
||||
work_queue(HPWORK, &g_ch438irqwork, getInterruptStatus, NULL, CH438_INCREMENT);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: ch438_open
|
||||
****************************************************************************/
|
||||
static int ch438_open(FAR struct file *filep)
|
||||
{
|
||||
FAR struct inode *inode = filep->f_inode;
|
||||
FAR struct ch438_dev_s *priv = inode->i_private;
|
||||
uint8_t port = priv->port;
|
||||
int ret = OK;
|
||||
|
||||
DEBUGASSERT(port >= 0 && port < CH438PORTNUM);
|
||||
|
||||
ret = nxsem_wait_uninterruptible(&priv->devsem);
|
||||
if (ret < 0)
|
||||
{
|
||||
return ret;
|
||||
}
|
||||
|
||||
if(g_ch438open[port])
|
||||
{
|
||||
ch438err("ERROR: ch438 port %d is opened!\n",port);
|
||||
return -EBUSY;
|
||||
}
|
||||
g_ch438open[port] = true;
|
||||
|
||||
nxsem_post(&priv->devsem);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: ch438_close
|
||||
****************************************************************************/
|
||||
static int ch438_close(FAR struct file *filep)
|
||||
{
|
||||
FAR struct inode *inode = filep->f_inode;
|
||||
FAR struct ch438_dev_s *priv = inode->i_private;
|
||||
uint8_t port = priv->port;
|
||||
int ret = OK;
|
||||
|
||||
DEBUGASSERT(port >= 0 && port < CH438PORTNUM);
|
||||
|
||||
ret = nxsem_wait_uninterruptible(&priv->devsem);
|
||||
if (ret < 0)
|
||||
{
|
||||
return ret;
|
||||
}
|
||||
|
||||
if(!g_ch438open[port])
|
||||
{
|
||||
ch438err("ERROR: ch438 port %d is closed!\n",port);
|
||||
return -EBUSY;
|
||||
}
|
||||
g_ch438open[port] = false;
|
||||
|
||||
nxsem_post(&priv->devsem);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: ch438_read
|
||||
****************************************************************************/
|
||||
static ssize_t ch438_read(FAR struct file *filep, FAR char *buffer, size_t buflen)
|
||||
{
|
||||
size_t length = 0;
|
||||
FAR struct inode *inode = filep->f_inode;
|
||||
FAR struct ch438_dev_s *priv = inode->i_private;
|
||||
uint8_t port = priv->port;
|
||||
|
||||
DEBUGASSERT(port >= 0 && port < CH438PORTNUM);
|
||||
|
||||
length = K210Ch438ReadData(port, buflen);
|
||||
memcpy(buffer, buff[port], length);
|
||||
|
||||
if(length > buflen)
|
||||
{
|
||||
length = buflen;
|
||||
}
|
||||
|
||||
return length;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: ch438_write
|
||||
****************************************************************************/
|
||||
static ssize_t ch438_write(FAR struct file *filep, FAR const char *buffer, size_t buflen)
|
||||
{
|
||||
FAR struct inode *inode = filep->f_inode;
|
||||
FAR struct ch438_dev_s *priv = inode->i_private;
|
||||
uint8_t port = priv->port;
|
||||
|
||||
DEBUGASSERT(port >= 0 && port < CH438PORTNUM);
|
||||
|
||||
K210Ch438WriteData(port, (const uint8_t *)buffer, buflen);
|
||||
|
||||
return buflen;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: ch438_ioctl
|
||||
****************************************************************************/
|
||||
static int ch438_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
|
||||
{
|
||||
FAR struct inode *inode = filep->f_inode;
|
||||
FAR struct ch438_dev_s *priv = inode->i_private;
|
||||
uint8_t port = priv->port;
|
||||
int ret = OK;
|
||||
|
||||
DEBUGASSERT(port >= 0 && port < CH438PORTNUM);
|
||||
|
||||
switch(cmd)
|
||||
{
|
||||
case OPE_INT:
|
||||
case OPE_CFG:
|
||||
CH438PortInit(port, (uint32_t)arg);
|
||||
break;
|
||||
|
||||
default:
|
||||
ch438info("Unrecognized cmd: %d\n", cmd);
|
||||
ret = -ENOTTY;
|
||||
break;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
/****************************************************************************
|
||||
* Name: ch438_register
|
||||
*
|
||||
* Description:
|
||||
* Register /dev/ext_uartN
|
||||
*
|
||||
****************************************************************************/
|
||||
static int ch438_register(FAR const char *devpath, uint8_t port)
|
||||
{
|
||||
FAR struct ch438_dev_s *priv;
|
||||
int ret = 0;
|
||||
|
||||
/* port number check */
|
||||
DEBUGASSERT(port >= 0 && port < CH438PORTNUM);
|
||||
|
||||
priv = (FAR struct ch438_dev_s *)kmm_malloc(sizeof(struct ch438_dev_s));
|
||||
if(priv == NULL)
|
||||
{
|
||||
ch438err("ERROR: Failed to allocate instance\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
priv->port = port;
|
||||
nxsem_init(&priv->devsem, 0, 1);
|
||||
|
||||
/* Register the character driver */
|
||||
ret = register_driver(devpath, &g_ch438fops, 0666, priv);
|
||||
if(ret < 0)
|
||||
{
|
||||
kmm_free(priv);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: board_ch438_initialize
|
||||
*
|
||||
* Description:
|
||||
* ch438 initialize
|
||||
*
|
||||
****************************************************************************/
|
||||
void board_ch438_initialize(void)
|
||||
{
|
||||
Ch438InitDefault();
|
||||
|
||||
#ifdef CONFIG_CH438_EXTUART0
|
||||
ch438_register("/dev/extuart_dev0", 0);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CH438_EXTUART1
|
||||
ch438_register("/dev/extuart_dev1", 1);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CH438_EXTUART2
|
||||
ch438_register("/dev/extuart_dev2", 2);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CH438_EXTUART3
|
||||
ch438_register("/dev/extuart_dev3", 3);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CH438_EXTUART4
|
||||
ch438_register("/dev/extuart_dev4", 4);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CH438_EXTUART5
|
||||
ch438_register("/dev/extuart_dev5", 5);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CH438_EXTUART6
|
||||
ch438_register("/dev/extuart_dev6", 6);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CH438_EXTUART7
|
||||
ch438_register("/dev/extuart_dev7", 7);
|
||||
#endif
|
||||
}
|
||||
|
|
@ -0,0 +1,358 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file imxrt_ch438.h
|
||||
* @brief imxrt board sd card automount
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2022.04.26
|
||||
*/
|
||||
|
||||
#ifndef __BOARDS_ARM_IMXRT_XIDATONG_SRC_IMXRT_CH438_H
|
||||
#define __BOARDS_ARM_IMXRT_XIDATONG_SRC_IMXRT_CH438_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
#include <nuttx/config.h>
|
||||
#include <nuttx/kmalloc.h>
|
||||
#include <nuttx/arch.h>
|
||||
#include <nuttx/irq.h>
|
||||
#include <nuttx/pthread.h>
|
||||
#include <nuttx/semaphore.h>
|
||||
#include <nuttx/wqueue.h>
|
||||
#include <nuttx/wdog.h>
|
||||
#include <nuttx/clock.h>
|
||||
#include <nuttx/time.h>
|
||||
#include <nuttx/fs/fs.h>
|
||||
#include <nuttx/fs/ioctl.h>
|
||||
|
||||
#include <sys/types.h>
|
||||
#include <sys/stat.h>
|
||||
#include <sys/ioctl.h>
|
||||
#include <errno.h>
|
||||
#include <stddef.h>
|
||||
#include <stdint.h>
|
||||
#include <stdio.h>
|
||||
#include <sched.h>
|
||||
#include <debug.h>
|
||||
#include <assert.h>
|
||||
#include <unistd.h>
|
||||
#include <stdbool.h>
|
||||
#include <string.h>
|
||||
#include <stdlib.h>
|
||||
#include <fcntl.h>
|
||||
|
||||
#include <arch/board/board.h>
|
||||
#include "riscv_internal.h"
|
||||
|
||||
#include "k210_config.h"
|
||||
#include "k210_fpioa.h"
|
||||
#include "k210_gpiohs.h"
|
||||
#include "xidatong-riscv64.h"
|
||||
|
||||
/******************************************************************************************/
|
||||
|
||||
/* chip definition */
|
||||
/* CH438serial port0 register address */
|
||||
|
||||
#define REG_RBR0_ADDR 0x00 /* serial port0receive buffer register address */
|
||||
#define REG_THR0_ADDR 0x00 /* serial port0send hold register address */
|
||||
#define REG_IER0_ADDR 0x01 /* serial port0interrupt enable register address */
|
||||
#define REG_IIR0_ADDR 0x02 /* serial port0interrupt identifies register address */
|
||||
#define REG_FCR0_ADDR 0x02 /* serial port0FIFO controls register address */
|
||||
#define REG_LCR0_ADDR 0x03 /* serial port0circuit control register address */
|
||||
#define REG_MCR0_ADDR 0x04 /* serial port0MODEM controls register address */
|
||||
#define REG_LSR0_ADDR 0x05 /* serial port0line status register address */
|
||||
#define REG_MSR0_ADDR 0x06 /* serial port0address of MODEM status register */
|
||||
#define REG_SCR0_ADDR 0x07 /* serial port0the user can define the register address */
|
||||
#define REG_DLL0_ADDR 0x00 /* Baud rate divisor latch low 8-bit byte address */
|
||||
#define REG_DLM0_ADDR 0x01 /* Baud rate divisor latch high 8-bit byte address */
|
||||
|
||||
|
||||
/* CH438serial port1 register address */
|
||||
|
||||
#define REG_RBR1_ADDR 0x10 /* serial port1receive buffer register address */
|
||||
#define REG_THR1_ADDR 0x10 /* serial port1send hold register address */
|
||||
#define REG_IER1_ADDR 0x11 /* serial port1interrupt enable register address */
|
||||
#define REG_IIR1_ADDR 0x12 /* serial port1interrupt identifies register address */
|
||||
#define REG_FCR1_ADDR 0x12 /* serial port1FIFO controls register address */
|
||||
#define REG_LCR1_ADDR 0x13 /* serial port1circuit control register address */
|
||||
#define REG_MCR1_ADDR 0x14 /* serial port1MODEM controls register address */
|
||||
#define REG_LSR1_ADDR 0x15 /* serial port1line status register address */
|
||||
#define REG_MSR1_ADDR 0x16 /* serial port1address of MODEM status register */
|
||||
#define REG_SCR1_ADDR 0x17 /* serial port1the user can define the register address */
|
||||
#define REG_DLL1_ADDR 0x10 /* Baud rate divisor latch low 8-bit byte address */
|
||||
#define REG_DLM1_ADDR 0x11 /* Baud rate divisor latch high 8-bit byte address */
|
||||
|
||||
|
||||
/* CH438serial port2 register address */
|
||||
|
||||
#define REG_RBR2_ADDR 0x20 /* serial port2receive buffer register address */
|
||||
#define REG_THR2_ADDR 0x20 /* serial port2send hold register address */
|
||||
#define REG_IER2_ADDR 0x21 /* serial port2interrupt enable register address */
|
||||
#define REG_IIR2_ADDR 0x22 /* serial port2interrupt identifies register address */
|
||||
#define REG_FCR2_ADDR 0x22 /* serial port2FIFO controls register address */
|
||||
#define REG_LCR2_ADDR 0x23 /* serial port2circuit control register address */
|
||||
#define REG_MCR2_ADDR 0x24 /* serial port2MODEM controls register address */
|
||||
#define REG_LSR2_ADDR 0x25 /* serial port2line status register address */
|
||||
#define REG_MSR2_ADDR 0x26 /* serial port2address of MODEM status register */
|
||||
#define REG_SCR2_ADDR 0x27 /* serial port2the user can define the register address */
|
||||
#define REG_DLL2_ADDR 0x20 /* Baud rate divisor latch low 8-bit byte address */
|
||||
#define REG_DLM2_ADDR 0x21 /* Baud rate divisor latch high 8-bit byte address */
|
||||
|
||||
|
||||
/* CH438serial port3 register address */
|
||||
|
||||
#define REG_RBR3_ADDR 0x30 /* serial port3receive buffer register address */
|
||||
#define REG_THR3_ADDR 0x30 /* serial port3send hold register address */
|
||||
#define REG_IER3_ADDR 0x31 /* serial port3interrupt enable register address */
|
||||
#define REG_IIR3_ADDR 0x32 /* serial port3interrupt identifies register address */
|
||||
#define REG_FCR3_ADDR 0x32 /* serial port3FIFO controls register address */
|
||||
#define REG_LCR3_ADDR 0x33 /* serial port3circuit control register address */
|
||||
#define REG_MCR3_ADDR 0x34 /* serial port3MODEM controls register address */
|
||||
#define REG_LSR3_ADDR 0x35 /* serial port3line status register address */
|
||||
#define REG_MSR3_ADDR 0x36 /* serial port3address of MODEM status register */
|
||||
#define REG_SCR3_ADDR 0x37 /* serial port3the user can define the register address */
|
||||
#define REG_DLL3_ADDR 0x30 /* Baud rate divisor latch low 8-bit byte address */
|
||||
#define REG_DLM3_ADDR 0x31 /* Baud rate divisor latch high 8-bit byte address */
|
||||
|
||||
|
||||
/* CH438serial port4 register address */
|
||||
|
||||
#define REG_RBR4_ADDR 0x08 /* serial port4receive buffer register address */
|
||||
#define REG_THR4_ADDR 0x08 /* serial port4send hold register address */
|
||||
#define REG_IER4_ADDR 0x09 /* serial port4interrupt enable register address */
|
||||
#define REG_IIR4_ADDR 0x0A /* serial port4interrupt identifies register address */
|
||||
#define REG_FCR4_ADDR 0x0A /* serial port4FIFO controls register address */
|
||||
#define REG_LCR4_ADDR 0x0B /* serial port4circuit control register address */
|
||||
#define REG_MCR4_ADDR 0x0C /* serial port4MODEM controls register address */
|
||||
#define REG_LSR4_ADDR 0x0D /* serial port4line status register address */
|
||||
#define REG_MSR4_ADDR 0x0E /* serial port4address of MODEM status register */
|
||||
#define REG_SCR4_ADDR 0x0F /* serial port4the user can define the register address */
|
||||
#define REG_DLL4_ADDR 0x08 /* Baud rate divisor latch low 8-bit byte address */
|
||||
#define REG_DLM4_ADDR 0x09 /* Baud rate divisor latch high 8-bit byte address */
|
||||
|
||||
|
||||
/* CH438serial port5 register address */
|
||||
|
||||
#define REG_RBR5_ADDR 0x18 /* serial port5receive buffer register address */
|
||||
#define REG_THR5_ADDR 0x18 /* serial port5send hold register address */
|
||||
#define REG_IER5_ADDR 0x19 /* serial port5interrupt enable register address */
|
||||
#define REG_IIR5_ADDR 0x1A /* serial port5interrupt identifies register address */
|
||||
#define REG_FCR5_ADDR 0x1A /* serial port5FIFO controls register address */
|
||||
#define REG_LCR5_ADDR 0x1B /* serial port5circuit control register address */
|
||||
#define REG_MCR5_ADDR 0x1C /* serial port5MODEM controls register address */
|
||||
#define REG_LSR5_ADDR 0x1D /* serial port5line status register address */
|
||||
#define REG_MSR5_ADDR 0x1E /* serial port5address of MODEM status register */
|
||||
#define REG_SCR5_ADDR 0x1F /* serial port5the user can define the register address */
|
||||
#define REG_DLL5_ADDR 0x18 /* Baud rate divisor latch low 8-bit byte address */
|
||||
#define REG_DLM5_ADDR 0x19 /* Baud rate divisor latch high 8-bit byte address */
|
||||
|
||||
|
||||
/* CH438serial port6 register address */
|
||||
|
||||
#define REG_RBR6_ADDR 0x28 /* serial port6receive buffer register address */
|
||||
#define REG_THR6_ADDR 0x28 /* serial port6send hold register address */
|
||||
#define REG_IER6_ADDR 0x29 /* serial port6interrupt enable register address */
|
||||
#define REG_IIR6_ADDR 0x2A /* serial port6interrupt identifies register address */
|
||||
#define REG_FCR6_ADDR 0x2A /* serial port6FIFO controls register address */
|
||||
#define REG_LCR6_ADDR 0x2B /* serial port6circuit control register address */
|
||||
#define REG_MCR6_ADDR 0x2C /* serial port6MODEM controls register address */
|
||||
#define REG_LSR6_ADDR 0x2D /* serial port6line status register address */
|
||||
#define REG_MSR6_ADDR 0x2E /* serial port6address of MODEM status register */
|
||||
#define REG_SCR6_ADDR 0x2F /* serial port6the user can define the register address */
|
||||
#define REG_DLL6_ADDR 0x28 /* Baud rate divisor latch low 8-bit byte address */
|
||||
#define REG_DLM6_ADDR 0x29 /* Baud rate divisor latch high 8-bit byte address */
|
||||
|
||||
|
||||
/* CH438serial port7 register address */
|
||||
|
||||
#define REG_RBR7_ADDR 0x38 /* serial port7receive buffer register address */
|
||||
#define REG_THR7_ADDR 0x38 /* serial port7send hold register address */
|
||||
#define REG_IER7_ADDR 0x39 /* serial port7interrupt enable register address */
|
||||
#define REG_IIR7_ADDR 0x3A /* serial port7interrupt identifies register address */
|
||||
#define REG_FCR7_ADDR 0x3A /* serial port7FIFO controls register address */
|
||||
#define REG_LCR7_ADDR 0x3B /* serial port7circuit control register address */
|
||||
#define REG_MCR7_ADDR 0x3C /* serial port7MODEM controls register address */
|
||||
#define REG_LSR7_ADDR 0x3D /* serial port7line status register address */
|
||||
#define REG_MSR7_ADDR 0x3E /* serial port7address of MODEM status register */
|
||||
#define REG_SCR7_ADDR 0x3F /* serial port7the user can define the register address */
|
||||
#define REG_DLL7_ADDR 0x38 /* Baud rate divisor latch low 8-bit byte address */
|
||||
#define REG_DLM7_ADDR 0x39 /* Baud rate divisor latch high 8-bit byte address */
|
||||
|
||||
|
||||
#define REG_SSR_ADDR 0x4F /* pecial status register address */
|
||||
|
||||
|
||||
/* IER register bit */
|
||||
|
||||
#define BIT_IER_RESET 0x80 /* The bit is 1 soft reset serial port */
|
||||
#define BIT_IER_LOWPOWER 0x40 /* The bit is 1 close serial port internal reference clock */
|
||||
#define BIT_IER_SLP 0x20 /* serial port0 is SLP, 1 close clock vibrator */
|
||||
#define BIT_IER1_CK2X 0x20 /* serial port1 is CK2X, 1 force the external clock signal after 2 times as internal */
|
||||
#define BIT_IER_IEMODEM 0x08 /* The bit is 1 allows MODEM input status to interrupt */
|
||||
#define BIT_IER_IELINES 0x04 /* The bit is 1 allow receiving line status to be interrupted */
|
||||
#define BIT_IER_IETHRE 0x02 /* The bit is 1 allows the send hold register to break in mid-air */
|
||||
#define BIT_IER_IERECV 0x01 /* The bit is 1 allows receiving data interrupts */
|
||||
|
||||
/* IIR register bit */
|
||||
|
||||
#define BIT_IIR_FIFOENS1 0x80
|
||||
#define BIT_IIR_FIFOENS0 0x40 /* The two is 1 said use FIFO */
|
||||
|
||||
/* Interrupt type: 0001 has no interrupt, 0110 receiving line status is interrupted, 0100 receiving data can be interrupted,
|
||||
1100 received data timeout interrupt, 0010THR register air interrupt, 0000MODEM input change interrupt */
|
||||
#define BIT_IIR_IID3 0x08
|
||||
#define BIT_IIR_IID2 0x04
|
||||
#define BIT_IIR_IID1 0x02
|
||||
#define BIT_IIR_NOINT 0x01
|
||||
|
||||
/* FCR register bit */
|
||||
|
||||
/* Trigger point: 00 corresponds to 1 byte, 01 corresponds to 16 bytes, 10 corresponds to 64 bytes, 11 corresponds to 112 bytes */
|
||||
#define BIT_FCR_RECVTG1 0x80 /* Set the trigger point for FIFO interruption and automatic hardware flow control */
|
||||
#define BIT_FCR_RECVTG0 0x40 /* Set the trigger point for FIFO interruption and automatic hardware flow control */
|
||||
|
||||
#define BIT_FCR_TFIFORST 0x04 /* The bit is 1 empty the data sent in FIFO */
|
||||
#define BIT_FCR_RFIFORST 0x02 /* The bit is 1 empty the data sent in FIFO */
|
||||
#define BIT_FCR_FIFOEN 0x01 /* The bit is 1 use FIFO, 0 disable FIFO */
|
||||
|
||||
/* LCR register bit */
|
||||
|
||||
#define BIT_LCR_DLAB 0x80 /* To access DLL, DLM, 0 to access RBR/THR/IER */
|
||||
#define BIT_LCR_BREAKEN 0x40 /* 1 forces a BREAK line interval*/
|
||||
|
||||
/* Set the check format: when PAREN is 1, 00 odd check, 01 even check, 10 MARK (set 1), 11 blank (SPACE, clear 0) */
|
||||
#define BIT_LCR_PARMODE1 0x20 /* Sets the parity bit format */
|
||||
#define BIT_LCR_PARMODE0 0x10 /* Sets the parity bit format */
|
||||
|
||||
#define BIT_LCR_PAREN 0x08 /* A value of 1 allows you to generate and receive parity bits when sending */
|
||||
#define BIT_LCR_STOPBIT 0x04 /* If is 1, then two stop bits, is 0, a stop bit */
|
||||
|
||||
/* Set word length: 00 for 5 data bits, 01 for 6 data bits, 10 for 7 data bits and 11 for 8 data bits */
|
||||
#define BIT_LCR_WORDSZ1 0x02 /* Set the word length length */
|
||||
#define BIT_LCR_WORDSZ0 0x01
|
||||
|
||||
/* MCR register bit */
|
||||
|
||||
#define BIT_MCR_AFE 0x20 /* For 1 allows automatic flow control of CTS and RTS hardware */
|
||||
#define BIT_MCR_LOOP 0x10 /* Is the test mode of 1 enabling internal loop */
|
||||
#define BIT_MCR_OUT2 0x08 /* 1 Allows an interrupt request for the serial port output */
|
||||
#define BIT_MCR_OUT1 0x04 /* The MODEM control bit defined for the user */
|
||||
#define BIT_MCR_RTS 0x02 /* The bit is 1 RTS pin output effective */
|
||||
#define BIT_MCR_DTR 0x01 /* The bit is 1 DTR pin output effective */
|
||||
|
||||
/* LSR register bit */
|
||||
|
||||
#define BIT_LSR_RFIFOERR 0x80 /* 1 said There is at least one error in receiving FIFO */
|
||||
#define BIT_LSR_TEMT 0x40 /* 1 said THR and TSR are empty */
|
||||
#define BIT_LSR_THRE 0x20 /* 1 said THR is empty*/
|
||||
#define BIT_LSR_BREAKINT 0x10 /* The bit is 1 said the BREAK line interval was detected*/
|
||||
#define BIT_LSR_FRAMEERR 0x08 /* The bit is 1 said error reading data frame */
|
||||
#define BIT_LSR_PARERR 0x04 /* The bit is 1 said parity error */
|
||||
#define BIT_LSR_OVERR 0x02 /* 1 said receive FIFO buffer overflow */
|
||||
#define BIT_LSR_DATARDY 0x01 /* The bit is 1 said receive data received in FIFO */
|
||||
|
||||
/* MSR register bit */
|
||||
|
||||
#define BIT_MSR_DCD 0x80 /* The bit is 1 said DCD pin effective */
|
||||
#define BIT_MSR_RI 0x40 /* The bit is 1 said RI pin effective */
|
||||
#define BIT_MSR_DSR 0x20 /* The bit is 1 said DSR pin effective */
|
||||
#define BIT_MSR_CTS 0x10 /* The bit is 1 said CTS pin effective */
|
||||
#define BIT_MSR_DDCD 0x08 /* The bit is 1 said DCD pin The input state has changed */
|
||||
#define BIT_MSR_TERI 0x04 /* The bit is 1 said RI pin The input state has changed */
|
||||
#define BIT_MSR_DDSR 0x02 /* The bit is 1 said DSR pin The input state has changed */
|
||||
#define BIT_MSR_DCTS 0x01 /* The bit is 1 said CTS pin The input state has changed */
|
||||
|
||||
/* Interrupt status code */
|
||||
|
||||
#define INT_NOINT 0x01 /* There is no interruption */
|
||||
#define INT_THR_EMPTY 0x02 /* THR empty interruption */
|
||||
#define INT_RCV_OVERTIME 0x0C /* Receive timeout interrupt */
|
||||
#define INT_RCV_SUCCESS 0x04 /* Interrupts are available to receive data */
|
||||
#define INT_RCV_LINES 0x06 /* Receiving line status interrupted */
|
||||
#define INT_MODEM_CHANGE 0x00 /* MODEM input changes interrupt */
|
||||
|
||||
#define CH438_IIR_FIFOS_ENABLED 0xC0 /* use FIFO */
|
||||
|
||||
|
||||
#define Fpclk 1843200 /* Define the internal clock frequency*/
|
||||
|
||||
|
||||
/* Define CH438 PIN NUM */
|
||||
#define CH438_ALE_PIN 24
|
||||
#define CH438_NWR_PIN 25
|
||||
#define CH438_NRD_PIN 26
|
||||
|
||||
#define CH438_D0_PIN 27
|
||||
#define CH438_D1_PIN 28
|
||||
#define CH438_D2_PIN 29
|
||||
#define CH438_D3_PIN 30
|
||||
#define CH438_D4_PIN 31
|
||||
#define CH438_D5_PIN 32
|
||||
#define CH438_D6_PIN 33
|
||||
#define CH438_D7_PIN 34
|
||||
|
||||
#define CH438_INT_PIN 35
|
||||
|
||||
/* Define ch438 FPIOA NUMBER */
|
||||
#define FPIOA_CH438_ALE 11
|
||||
#define FPIOA_CH438_NWR 12
|
||||
#define FPIOA_CH438_NRD 13
|
||||
|
||||
#define FPIOA_CH438_D0 14
|
||||
#define FPIOA_CH438_D1 15
|
||||
#define FPIOA_CH438_D2 16
|
||||
#define FPIOA_CH438_D3 17
|
||||
#define FPIOA_CH438_D4 18
|
||||
#define FPIOA_CH438_D5 19
|
||||
#define FPIOA_CH438_D6 20
|
||||
#define FPIOA_CH438_D7 31
|
||||
|
||||
#define FPIOA_CH438_INT 22
|
||||
|
||||
/* ch438 debug */
|
||||
#ifdef CONFIG_DEBUG_CH438_ERROR
|
||||
# define ch438err _err
|
||||
#else
|
||||
# define ch438err _none
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_DEBUG_CH438_WARN
|
||||
# define ch438warn _warn
|
||||
#else
|
||||
# define ch438warn _none
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_DEBUG_CH438_INFO
|
||||
# define ch438info _info
|
||||
#else
|
||||
# define ch438info _none
|
||||
#endif
|
||||
|
||||
#define CH438_FUNC_GPIO(n) ((K210_IO_FUNC_GPIOHS0 + n) | K210_IOFLAG_GPIOHS)
|
||||
|
||||
/* ioctl cmd */
|
||||
#define OPE_INT 0x0000
|
||||
#define OPE_CFG 0x0001
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
#ifdef CONFIG_BSP_USING_CH438
|
||||
void board_ch438_initialize(void);
|
||||
#endif
|
||||
|
||||
#endif /* __BOARDS_ARM_IMXRT_XIDATONG_SRC_IMXRT_CH438_H */
|
||||
|
||||
|
|
@ -0,0 +1,173 @@
|
|||
/****************************************************************************
|
||||
* boards/risc-v/k210/xidatong-riscv64/src/k210_gpio.c
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <sys/types.h>
|
||||
#include <syslog.h>
|
||||
#include <assert.h>
|
||||
#include <debug.h>
|
||||
#include <errno.h>
|
||||
|
||||
#include <nuttx/irq.h>
|
||||
#include <arch/irq.h>
|
||||
|
||||
#include <nuttx/ioexpander/gpio.h>
|
||||
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#include "k210_fpioa.h"
|
||||
#include "k210_gpiohs.h"
|
||||
|
||||
#if defined(CONFIG_DEV_GPIO) && !defined(CONFIG_GPIO_LOWER_HALF)
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/* Pin 1 and 2 are used for this example as GPIO outputs. */
|
||||
|
||||
#define GPIO_E220_M0 44
|
||||
#define GPIO_E220_M1 45
|
||||
|
||||
/****************************************************************************
|
||||
* Private Types
|
||||
****************************************************************************/
|
||||
|
||||
struct k210gpio_dev_s
|
||||
{
|
||||
struct gpio_dev_s gpio;
|
||||
uint8_t id;
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
* Private Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
#if BOARD_NGPIOOUT > 0
|
||||
static int gpout_read(FAR struct gpio_dev_s *dev, FAR bool *value);
|
||||
static int gpout_write(FAR struct gpio_dev_s *dev, bool value);
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
****************************************************************************/
|
||||
|
||||
#if BOARD_NGPIOOUT > 0
|
||||
static const struct gpio_operations_s gpout_ops =
|
||||
{
|
||||
.go_read = gpout_read,
|
||||
.go_write = gpout_write,
|
||||
.go_attach = NULL,
|
||||
.go_enable = NULL,
|
||||
};
|
||||
|
||||
/* This array maps the GPIO pins used as OUTPUT */
|
||||
|
||||
static const uint32_t g_gpiooutputs[BOARD_NGPIOOUT] =
|
||||
{
|
||||
GPIO_E220_M0, GPIO_E220_M1
|
||||
};
|
||||
|
||||
static struct k210gpio_dev_s g_gpout[BOARD_NGPIOOUT];
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: gpout_read
|
||||
****************************************************************************/
|
||||
|
||||
#if BOARD_NGPIOOUT > 0
|
||||
static int gpout_read(FAR struct gpio_dev_s *dev, FAR bool *value)
|
||||
{
|
||||
FAR struct k210gpio_dev_s *k210gpio =
|
||||
(FAR struct k210gpio_dev_s *)dev;
|
||||
|
||||
DEBUGASSERT(k210gpio != NULL && value != NULL);
|
||||
DEBUGASSERT(k210gpio->id < BOARD_NGPIOOUT);
|
||||
gpioinfo("Reading...\n");
|
||||
|
||||
*value = (int) k210_gpiohs_get_value(k210gpio->id + 1);
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: gpout_write
|
||||
****************************************************************************/
|
||||
|
||||
static int gpout_write(FAR struct gpio_dev_s *dev, bool value)
|
||||
{
|
||||
FAR struct k210gpio_dev_s *k210gpio =
|
||||
(FAR struct k210gpio_dev_s *)dev;
|
||||
|
||||
DEBUGASSERT(k210gpio != NULL);
|
||||
DEBUGASSERT(k210gpio->id < BOARD_NGPIOOUT);
|
||||
gpioinfo("Writing %d\n", (int)value);
|
||||
|
||||
k210_gpiohs_set_value(k210gpio->id + 1, !value);
|
||||
|
||||
return OK;
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: k210_gpio_init
|
||||
****************************************************************************/
|
||||
|
||||
int k210_gpio_init(void)
|
||||
{
|
||||
int i;
|
||||
int pincount = 0;
|
||||
|
||||
#if BOARD_NGPIOOUT > 0
|
||||
for (i = 0; i < BOARD_NGPIOOUT; i++)
|
||||
{
|
||||
/* Setup and register the GPIO pin */
|
||||
|
||||
g_gpout[i].gpio.gp_pintype = GPIO_OUTPUT_PIN;
|
||||
g_gpout[i].gpio.gp_ops = &gpout_ops;
|
||||
g_gpout[i].id = i;
|
||||
gpio_pin_register(&g_gpout[i].gpio, pincount);
|
||||
|
||||
/* Configure the pins that will be used as output */
|
||||
|
||||
k210_fpioa_config(g_gpiooutputs[i],
|
||||
(K210_IO_FUNC_GPIOHS1 + i) | K210_IOFLAG_GPIOHS);
|
||||
k210_gpiohs_set_direction(i + 1, GPIO_DM_OUTPUT);
|
||||
k210_gpiohs_set_value(i + 1, true);
|
||||
|
||||
pincount++;
|
||||
}
|
||||
#endif
|
||||
|
||||
return OK;
|
||||
}
|
||||
#endif /* CONFIG_DEV_GPIO && !CONFIG_GPIO_LOWER_HALF */
|
||||
|
|
@ -0,0 +1,59 @@
|
|||
/****************************************************************************
|
||||
* boards/risc-v/k210/xidatong-riscv64/src/k210_leds.c
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <nuttx/board.h>
|
||||
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#include "k210_fpioa.h"
|
||||
#include "k210_gpiohs.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
void board_autoled_initialize(void)
|
||||
{
|
||||
k210_fpioa_config(BOARD_LED_PAD, BOARD_LED_IO_FUNC | K210_IOFLAG_GPIOHS);
|
||||
k210_gpiohs_set_direction(BOARD_LED_IO, GPIO_DM_OUTPUT);
|
||||
k210_gpiohs_set_value(BOARD_LED_IO, true); /* LED off */
|
||||
}
|
||||
|
||||
void board_autoled_on(int led)
|
||||
{
|
||||
if (led == LED_PANIC)
|
||||
{
|
||||
k210_gpiohs_set_value(BOARD_LED_IO, false);
|
||||
}
|
||||
}
|
||||
|
||||
void board_autoled_off(int led)
|
||||
{
|
||||
if (led == LED_PANIC)
|
||||
{
|
||||
k210_gpiohs_set_value(BOARD_LED_IO, true);
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,36 @@
|
|||
/****************************************************************************
|
||||
* boards/risc-v/k210/xidatong-riscv64/src/xidatong-riscv64.h
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __BOARDS_RISCV_K210_XIDATONG_RISCV64_SRC_XIDATONG_RISCV64_H
|
||||
#define __BOARDS_RISCV_K210_XIDATONG_RISCV64_SRC_XIDATONG_RISCV64_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
int k210_bringup(void);
|
||||
|
||||
#ifdef CONFIG_DEV_GPIO
|
||||
int k210_gpio_init(void);
|
||||
#endif
|
||||
|
||||
#endif /* __BOARDS_RISCV_K210_XIDATONG_RISCV64_SRC_XIDATONG_RISCV64_H */
|
||||
|
|
@ -17,6 +17,7 @@ cp -rf $current/nuttx $nuttx
|
|||
cp -rf $current/apps $nuttx
|
||||
cp -rf $nuttx/aiit_board/aiit-arm32-board $nuttx/nuttx/boards/arm/stm32
|
||||
cp -rf $nuttx/aiit_board/aiit-riscv64-board $nuttx/nuttx/boards/risc-v/k210
|
||||
cp -rf $nuttx/aiit_board/xidatong-riscv64 $nuttx/nuttx/boards/risc-v/k210
|
||||
cp -rf $nuttx/aiit_board/xidatong $nuttx/nuttx/boards/arm/imxrt
|
||||
|
||||
cd ../nuttx
|
||||
|
|
|
|||
|
|
@ -1769,7 +1769,6 @@ void arm_serialinit(void)
|
|||
uart_register("/dev/ttyS8", &g_uart8port);
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_putc
|
||||
|
|
|
|||
|
|
@ -0,0 +1,67 @@
|
|||
############################################################################
|
||||
# arch/risc-v/src/k210/Make.defs
|
||||
#
|
||||
# Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
# contributor license agreements. See the NOTICE file distributed with
|
||||
# this work for additional information regarding copyright ownership. The
|
||||
# ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
# "License"); you may not use this file except in compliance with the
|
||||
# License. You may obtain a copy of the License at
|
||||
#
|
||||
# http://www.apache.org/licenses/LICENSE-2.0
|
||||
#
|
||||
# Unless required by applicable law or agreed to in writing, software
|
||||
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
# License for the specific language governing permissions and limitations
|
||||
# under the License.
|
||||
#
|
||||
############################################################################
|
||||
|
||||
# Specify our HEAD assembly file. This will be linked as
|
||||
# the first object file, so it will appear at address 0
|
||||
HEAD_ASRC = k210_head.S
|
||||
|
||||
# Specify our general Assembly files
|
||||
CMN_ASRCS += riscv_vectors.S riscv_testset.S riscv_exception_common.S
|
||||
|
||||
# Specify C code within the common directory to be included
|
||||
CMN_CSRCS += riscv_initialize.c riscv_swint.c
|
||||
CMN_CSRCS += riscv_createstack.c riscv_exit.c riscv_fault.c
|
||||
CMN_CSRCS += riscv_assert.c riscv_blocktask.c riscv_copystate.c riscv_initialstate.c
|
||||
CMN_CSRCS += riscv_interruptcontext.c riscv_modifyreg32.c riscv_puts.c
|
||||
CMN_CSRCS += riscv_releasepending.c riscv_reprioritizertr.c
|
||||
CMN_CSRCS += riscv_releasestack.c riscv_stackframe.c riscv_schedulesigaction.c
|
||||
CMN_CSRCS += riscv_sigdeliver.c riscv_unblocktask.c riscv_usestack.c
|
||||
CMN_CSRCS += riscv_mdelay.c riscv_udelay.c riscv_copyfullstate.c riscv_idle.c
|
||||
CMN_CSRCS += riscv_tcbinfo.c riscv_cpuidlestack.c
|
||||
|
||||
ifeq ($(CONFIG_SMP), y)
|
||||
CMN_CSRCS += riscv_cpuindex.c riscv_cpupause.c riscv_cpustart.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_SCHED_BACKTRACE),y)
|
||||
CMN_CSRCS += riscv_backtrace.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_STACK_COLORATION),y)
|
||||
CMN_CSRCS += riscv_checkstack.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_ARCH_HAVE_VFORK),y)
|
||||
CMN_CSRCS += riscv_vfork.c
|
||||
endif
|
||||
|
||||
# Specify our C code within this directory to be included
|
||||
CHIP_CSRCS = k210_allocateheap.c k210_clockconfig.c
|
||||
CHIP_CSRCS += k210_irq.c k210_irq_dispatch.c
|
||||
CHIP_CSRCS += k210_lowputc.c k210_serial.c k210_fpioa.c
|
||||
CHIP_CSRCS += k210_start.c k210_timerisr.c k210_gpiohs.c
|
||||
|
||||
ifeq ($(CONFIG_BUILD_PROTECTED),y)
|
||||
CMN_CSRCS += riscv_task_start.c riscv_pthread_start.c
|
||||
CMN_CSRCS += riscv_signal_dispatch.c
|
||||
CMN_UASRCS += riscv_signal_handler.S
|
||||
|
||||
CHIP_CSRCS += k210_userspace.c
|
||||
endif
|
||||
|
|
@ -0,0 +1,92 @@
|
|||
/****************************************************************************
|
||||
* arch/risc-v/src/k210/k210_fpioa.c
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <assert.h>
|
||||
#include <debug.h>
|
||||
|
||||
#include "riscv_internal.h"
|
||||
#include "k210_memorymap.h"
|
||||
#include "k210_fpioa.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
int k210_fpioa_get_io_by_function(uint8_t function)
|
||||
{
|
||||
int index = 0;
|
||||
uint32_t RegValue = 0x0000;
|
||||
uint32_t *fpioa = (uint32_t *)K210_FPIOA_BASE;
|
||||
|
||||
for (index = 0; index < K210_IO_NUMBER; index++)
|
||||
{
|
||||
RegValue = getreg32(&fpioa[index]);
|
||||
if ((RegValue & 0xFF) == function)
|
||||
return index;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
int fpioa_set_io_pull(int number, fpioa_pull_t pull)
|
||||
{
|
||||
/* Check parameters */
|
||||
if (number < 0 || number >= K210_IO_NUMBER || pull >= FPIOA_PULL_MAX)
|
||||
return -1;
|
||||
|
||||
/* read register */
|
||||
uint32_t *fpioa = (uint32_t *)K210_FPIOA_BASE;
|
||||
fpioa_io_config_t cfg = *(fpioa_io_config_t *)(&fpioa[number]);
|
||||
uint32_t ioflags = 0x0000;
|
||||
|
||||
switch (pull)
|
||||
{
|
||||
case FPIOA_PULL_NONE:
|
||||
cfg.pu = 0;
|
||||
cfg.pd = 0;
|
||||
break;
|
||||
case FPIOA_PULL_DOWN:
|
||||
cfg.pu = 0;
|
||||
cfg.pd = 1;
|
||||
break;
|
||||
case FPIOA_PULL_UP:
|
||||
cfg.pu = 1;
|
||||
cfg.pd = 0;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
/* write register */
|
||||
ioflags = *(uint32_t*)(&cfg);
|
||||
putreg32(ioflags, &fpioa[number]);
|
||||
return 0;
|
||||
}
|
||||
|
||||
void k210_fpioa_config(uint32_t io, uint32_t ioflags)
|
||||
{
|
||||
uint32_t *fpioa = (uint32_t *)K210_FPIOA_BASE;
|
||||
DEBUGASSERT(io < K210_IO_NUMBER);
|
||||
putreg32(ioflags, &fpioa[io]);
|
||||
}
|
||||
|
|
@ -0,0 +1,123 @@
|
|||
/****************************************************************************
|
||||
* arch/risc-v/src/k210/k210_fpioa.h
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ARCH_RISCV_SRC_K210_K210_FPIOA_H
|
||||
#define __ARCH_RISCV_SRC_K210_K210_FPIOA_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
#define K210_IO_NUMBER 48
|
||||
#define K210_GPIOHS_MAX_PINNO 32
|
||||
|
||||
#define K210_IO_FUNC_UARTHS_RX 18 /* UART High speed Receiver */
|
||||
#define K210_IO_FUNC_UARTHS_TX 19 /* UART High speed Transmitter */
|
||||
#define K210_IO_FUNC_GPIOHS0 24 /* GPIO High speed 0 */
|
||||
#define K210_IO_FUNC_GPIOHS1 25 /* GPIO High speed 1 */
|
||||
#define K210_IO_FUNC_GPIOHS2 26 /* GPIO High speed 2 */
|
||||
#define K210_IO_FUNC_GPIOHS3 27 /* GPIO High speed 3 */
|
||||
#define K210_IO_FUNC_GPIOHS4 28 /* GPIO High speed 4 */
|
||||
#define K210_IO_FUNC_GPIOHS5 29 /* GPIO High speed 5 */
|
||||
#define K210_IO_FUNC_GPIOHS6 30 /* GPIO High speed 6 */
|
||||
#define K210_IO_FUNC_GPIOHS7 31 /* GPIO High speed 7 */
|
||||
#define K210_IO_FUNC_GPIOHS8 32 /* GPIO High speed 8 */
|
||||
#define K210_IO_FUNC_GPIOHS9 33 /* GPIO High speed 9 */
|
||||
#define K210_IO_FUNC_GPIOHS10 34 /* GPIO High speed 10 */
|
||||
#define K210_IO_FUNC_GPIOHS11 35 /* GPIO High speed 11 */
|
||||
#define K210_IO_FUNC_GPIOHS12 36 /* GPIO High speed 12 */
|
||||
#define K210_IO_FUNC_GPIOHS13 37 /* GPIO High speed 13 */
|
||||
#define K210_IO_FUNC_GPIOHS14 38 /* GPIO High speed 14 */
|
||||
#define K210_IO_FUNC_GPIOHS15 39 /* GPIO High speed 15 */
|
||||
#define K210_IO_FUNC_GPIOHS16 40 /* GPIO High speed 16 */
|
||||
#define K210_IO_FUNC_GPIOHS17 41 /* GPIO High speed 17 */
|
||||
#define K210_IO_FUNC_GPIOHS18 42 /* GPIO High speed 18 */
|
||||
#define K210_IO_FUNC_GPIOHS19 43 /* GPIO High speed 19 */
|
||||
#define K210_IO_FUNC_GPIOHS20 44 /* GPIO High speed 20 */
|
||||
#define K210_IO_FUNC_GPIOHS21 45 /* GPIO High speed 21 */
|
||||
#define K210_IO_FUNC_GPIOHS22 46 /* GPIO High speed 22 */
|
||||
#define K210_IO_FUNC_GPIOHS23 47 /* GPIO High speed 23 */
|
||||
#define K210_IO_FUNC_GPIOHS24 48 /* GPIO High speed 24 */
|
||||
#define K210_IO_FUNC_GPIOHS25 49 /* GPIO High speed 25 */
|
||||
#define K210_IO_FUNC_GPIOHS26 50 /* GPIO High speed 26 */
|
||||
#define K210_IO_FUNC_GPIOHS27 51 /* GPIO High speed 27 */
|
||||
#define K210_IO_FUNC_GPIOHS28 52 /* GPIO High speed 28 */
|
||||
#define K210_IO_FUNC_GPIOHS29 53 /* GPIO High speed 29 */
|
||||
#define K210_IO_FUNC_GPIOHS30 54 /* GPIO High speed 30 */
|
||||
#define K210_IO_FUNC_GPIOHS31 55 /* GPIO High speed 31 */
|
||||
|
||||
#define K210_IO_DS(x) (x << 8) /* Driving Selector */
|
||||
|
||||
#define K210_IO_OUTPUT_ENABLE (1 << 12)
|
||||
#define K210_IO_OUTPUT_INVERT (1 << 13)
|
||||
#define K210_IO_INPUT_ENABLE (1 << 20)
|
||||
#define K210_IO_INPUT_INVERT (1 << 21)
|
||||
#define K210_IO_PULL_DOWN (1 << 16)
|
||||
#define K210_IO_PULL_UP (3 << 16)
|
||||
#define K210_IO_PULL_UP_STRONG (7 << 16)
|
||||
#define K210_IO_SL (1 << 19)
|
||||
#define K210_IO_ST (1 << 23)
|
||||
|
||||
#define K210_IOFLAG_GPIOHS (K210_IO_DS(0xf) | K210_IO_OUTPUT_ENABLE | \
|
||||
K210_IO_INPUT_ENABLE | K210_IO_ST)
|
||||
|
||||
typedef struct _fpioa_io_config
|
||||
{
|
||||
uint32_t ch_sel : 8; /* Channel select from 256 input. */
|
||||
uint32_t ds : 4; /* Driving selector. */
|
||||
uint32_t oe_en : 1; /* Static output enable, will AND with OE_INV. */
|
||||
uint32_t oe_inv : 1; /* Invert output enable. */
|
||||
uint32_t do_sel : 1; /* Data output select: 0 for DO, 1 for OE. */
|
||||
uint32_t do_inv : 1; /* Invert the result of data output select (DO_SEL). */
|
||||
uint32_t pu : 1; /* Pull up enable. 0 for nothing, 1 for pull up. */
|
||||
uint32_t pd : 1; /* Pull down enable. 0 for nothing, 1 for pull down. */
|
||||
uint32_t resv0 : 1; /* Reserved bits. */
|
||||
uint32_t sl : 1; /* Slew rate control enable. */
|
||||
uint32_t ie_en : 1; /* Static input enable, will AND with IE_INV. */
|
||||
uint32_t ie_inv : 1; /* Invert input enable. */
|
||||
uint32_t di_inv : 1; /* Invert Data input. */
|
||||
uint32_t st : 1; /* Schmitt trigger. */
|
||||
uint32_t resv1 : 7; /* Reserved bits. */
|
||||
uint32_t pad_di : 1; /* Read current IO's data input. */
|
||||
} __attribute__((packed, aligned(4))) fpioa_io_config_t;
|
||||
|
||||
typedef enum _fpioa_pull
|
||||
{
|
||||
FPIOA_PULL_NONE, /* No Pull */
|
||||
FPIOA_PULL_DOWN, /* Pull Down */
|
||||
FPIOA_PULL_UP, /* Pull Up */
|
||||
FPIOA_PULL_MAX /* Count of pull settings */
|
||||
} fpioa_pull_t;
|
||||
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions Prototypes
|
||||
****************************************************************************/
|
||||
int k210_fpioa_get_io_by_function(uint8_t function);
|
||||
int fpioa_set_io_pull(int number, fpioa_pull_t pull);
|
||||
void k210_fpioa_config(uint32_t io, uint32_t ioflags);
|
||||
|
||||
#endif /* __ARCH_RISCV_SRC_K210_K210_FPIOA_H */
|
||||
|
|
@ -0,0 +1,111 @@
|
|||
/****************************************************************************
|
||||
* arch/risc-v/src/k210/k210_gpiohs.c
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include <assert.h>
|
||||
#include <debug.h>
|
||||
|
||||
#include "riscv_internal.h"
|
||||
#include "k210_memorymap.h"
|
||||
#include "k210_gpiohs.h"
|
||||
#include "k210_fpioa.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
#define GPIOHS_INPUT_VAL_OFFSET 0x00
|
||||
#define GPIOHS_INPUT_EN_OFFSET 0x04
|
||||
#define GPIOHS_OUTPUT_EN_OFFSET 0x08
|
||||
#define GPIOHS_OUTPUT_VAL_OFFSET 0x0c
|
||||
#define GPIOHS_PULLUP_EN_OFFSET 0x10
|
||||
#define GPIOHS_DRIVE_OFFSET 0x14
|
||||
|
||||
#define GPIOHS_INPUT (K210_GPIOHS_BASE + GPIOHS_INPUT_VAL_OFFSET)
|
||||
#define GPIOHS_INPUT_EN (K210_GPIOHS_BASE + GPIOHS_INPUT_EN_OFFSET)
|
||||
#define GPIOHS_OUTPUT (K210_GPIOHS_BASE + GPIOHS_OUTPUT_VAL_OFFSET)
|
||||
#define GPIOHS_OUTPUT_EN (K210_GPIOHS_BASE + GPIOHS_OUTPUT_EN_OFFSET)
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
void k210_gpiohs_set_direction(uint32_t io, gpio_drive_mode_t mode)
|
||||
{
|
||||
DEBUGASSERT(io < K210_GPIOHS_MAX_PINNO);
|
||||
int io_number = k210_fpioa_get_io_by_function(K210_IO_FUNC_GPIOHS0 + io);
|
||||
DEBUGASSERT(io_number >= 0);
|
||||
|
||||
fpioa_pull_t pull = FPIOA_PULL_NONE;
|
||||
uint32_t dir = 0;
|
||||
|
||||
switch (mode)
|
||||
{
|
||||
case GPIO_DM_INPUT:
|
||||
pull = FPIOA_PULL_NONE;
|
||||
dir = 0;
|
||||
break;
|
||||
case GPIO_DM_INPUT_PULL_DOWN:
|
||||
pull = FPIOA_PULL_DOWN;
|
||||
dir = 0;
|
||||
break;
|
||||
case GPIO_DM_INPUT_PULL_UP:
|
||||
pull = FPIOA_PULL_UP;
|
||||
dir = 0;
|
||||
break;
|
||||
case GPIO_DM_OUTPUT:
|
||||
pull = FPIOA_PULL_DOWN;
|
||||
dir = 1;
|
||||
break;
|
||||
default:
|
||||
DEBUGASSERT(!"GPIO drive mode is not supported.");
|
||||
break;
|
||||
}
|
||||
|
||||
fpioa_set_io_pull(io_number, pull);
|
||||
uint32_t outbit = dir << io;
|
||||
uint32_t inbit = (!dir) << io;
|
||||
modifyreg32(GPIOHS_OUTPUT_EN, inbit, outbit);
|
||||
modifyreg32(GPIOHS_INPUT_EN, outbit, inbit);
|
||||
}
|
||||
|
||||
void k210_gpiohs_set_value(uint32_t io, bool val)
|
||||
{
|
||||
uint32_t setbit = val << io;
|
||||
uint32_t clrbit = (!val) << io;
|
||||
modifyreg32(GPIOHS_OUTPUT, clrbit, setbit);
|
||||
}
|
||||
|
||||
bool k210_gpiohs_get_value(uint32_t io)
|
||||
{
|
||||
uint32_t reg = getreg32(GPIOHS_INPUT);
|
||||
|
||||
if (reg & (1 << io))
|
||||
{
|
||||
return true;
|
||||
}
|
||||
else
|
||||
{
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,87 @@
|
|||
/****************************************************************************
|
||||
* arch/risc-v/src/k210/k210_gpiohs.h
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ARCH_RISCV_SRC_K210_K210_GPIOHS_H
|
||||
#define __ARCH_RISCV_SRC_K210_K210_GPIOHS_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
|
||||
typedef enum _gpio_drive_mode
|
||||
{
|
||||
GPIO_DM_INPUT,
|
||||
GPIO_DM_INPUT_PULL_DOWN,
|
||||
GPIO_DM_INPUT_PULL_UP,
|
||||
GPIO_DM_OUTPUT,
|
||||
} gpio_drive_mode_t;
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: k210_gpiohs_set_direction
|
||||
*
|
||||
* Description:
|
||||
* Set gpiohs direction
|
||||
*
|
||||
* Input Parameters:
|
||||
* io - IO number
|
||||
* dir - true for output, false for input
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void k210_gpiohs_set_direction(uint32_t io, gpio_drive_mode_t mode);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: k210_gpiohs_set_value
|
||||
*
|
||||
* Description:
|
||||
* Set gpiohs direction
|
||||
*
|
||||
* Input Parameters:
|
||||
* io - IO number
|
||||
* dir - true for high level, false for low level
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void k210_gpiohs_set_value(uint32_t io, bool val);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: k210_gpiohs_get_value
|
||||
*
|
||||
* Description:
|
||||
* Get gpiohs level
|
||||
*
|
||||
* Input Parameters:
|
||||
* io - IO number
|
||||
*
|
||||
* Returned Value:
|
||||
* true for high level, false for low level
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
bool k210_gpiohs_get_value(uint32_t io);
|
||||
|
||||
#endif /* __ARCH_RISCV_SRC_K210_K210_GPIOHS_H */
|
||||
|
|
@ -694,6 +694,14 @@ config ARCH_BOARD_AIIT_RISCV64
|
|||
This is the board configuration for the port of NuttX to the
|
||||
aiit-riscv64 board. This board features the RISC-V K210
|
||||
|
||||
config ARCH_BOARD_XIDATONG_RISCV64
|
||||
bool "xidatong riscv64 board"
|
||||
depends on ARCH_CHIP_K210
|
||||
select ARCH_HAVE_LEDS if !K210_WITH_QEMU
|
||||
---help---
|
||||
This is the board configuration for the port of NuttX to the
|
||||
xidatong-riscv64 board. This board features the RISC-V K210
|
||||
|
||||
config ARCH_BOARD_SMARTL_C906
|
||||
bool "smartl evaluation board for C906"
|
||||
depends on ARCH_CHIP_C906
|
||||
|
|
@ -2488,6 +2496,7 @@ config ARCH_BOARD
|
|||
default "lx_cpu" if ARCH_BOARD_LX_CPU
|
||||
default "maix-bit" if ARCH_BOARD_MAIX_BIT
|
||||
default "aiit-riscv64-board" if ARCH_BOARD_AIIT_RISCV64
|
||||
default "xidatong-riscv64" if ARCH_BOARD_XIDATONG_RISCV64
|
||||
default "smartl-c906" if ARCH_BOARD_SMARTL_C906
|
||||
default "icicle" if ARCH_BOARD_ICICLE_MPFS
|
||||
default "m100pfsevp" if ARCH_BOARD_M100PFSEVP_MPFS
|
||||
|
|
@ -3320,6 +3329,9 @@ endif
|
|||
if ARCH_BOARD_AIIT_RISCV64
|
||||
source "boards/risc-v/k210/aiit-riscv64-board/Kconfig"
|
||||
endif
|
||||
if ARCH_BOARD_XIDATONG_RISCV64
|
||||
source "boards/risc-v/k210/xidatong-riscv64/Kconfig"
|
||||
endif
|
||||
if ARCH_BOARD_SMARTL_C906
|
||||
source "boards/risc-v/c906/smartl-c906/Kconfig"
|
||||
endif
|
||||
|
|
|
|||
Loading…
Reference in New Issue