Merge branch 'prepare_for_master' of https://git.trustie.net/xuos/xiuos into develop

This commit is contained in:
wgzAIIT
2022-10-17 18:21:09 +08:00
5274 changed files with 112696 additions and 3848 deletions

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@@ -0,0 +1,70 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
CONFIG_ADD_NUTTX_FETURES=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="xidatong-arm32"
CONFIG_ARCH_BOARD_XIDATONG_ARM32=y
CONFIG_ARCH_CHIP="imxrt"
CONFIG_ARCH_CHIP_IMXRT=y
CONFIG_ARCH_CHIP_MIMXRT1052CVL5B=y
CONFIG_ARCH_INTERRUPTSTACK=10240
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARMV7M_DCACHE=y
CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
CONFIG_ARMV7M_ICACHE=y
CONFIG_ARMV7M_USEBASEPRI=y
CONFIG_BOARD_LOOPSPERMSEC=104926
CONFIG_BUILTIN=y
CONFIG_CLOCK_MONOTONIC=y
CONFIG_EXAMPLES_HELLO=y
CONFIG_IMXRT_GPIO_IRQ=y
CONFIG_IMXRT_GPIO3_0_15_IRQ=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_IMXRT_LPUART1=y
CONFIG_INTELHEX_BINARY=y
CONFIG_LPUART1_SERIAL_CONSOLE=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_DISABLE_IFUPDOWN=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_RAM_SIZE=524288
CONFIG_RAM_START=0x20200000
CONFIG_RAW_BINARY=y
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_WAITPID=y
CONFIG_START_DAY=14
CONFIG_START_MONTH=3
CONFIG_SYSTEM_NSH=y
CONFIG_DEV_GPIO=y
CONFIG_READLINE_CMD_HISTORY=y
CONFIG_READLINE_CMD_HISTORY_LEN=100
CONFIG_READLINE_CMD_HISTORY_LINELEN=120
CONFIG_READLINE_TABCOMPLETION=y
CONFIG_FS_ROMFS=y
CONFIG_NSH_ROMFSETC=y
CONFIG_NSH_ARCHROMFS=y
CONFIG_BOARDCTL_RESET=y
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_IMXRT_SEMC=y
CONFIG_ARM_MPU=y
CONFIG_ARM_MPU_NREGIONS=16
CONFIG_IMXRT_SEMC_SDRAM=y
CONFIG_IMXRT_SDRAM_START=0x80000000
CONFIG_IMXRT_SDRAM_SIZE=31457280
CONFIG_IMXRT_SDRAM_HEAP=y
CONFIG_IMXRT_SDRAM_HEAPOFFSET=0x0
CONFIG_ARCH_USE_MPU=y
CONFIG_MM_REGIONS=2
CONFIG_TESTING_MM=y
CONFIG_TESTING_MM_PROGNAME="mm"
CONFIG_TESTING_MM_PRIORITY=100
CONFIG_TESTING_MM_STACKSIZE=2048
CONFIG_USER_TEST=y
CONFIG_USER_TEST_SEMC=y

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@@ -1466,6 +1466,10 @@ int nsh_foreach_var(FAR struct nsh_vtbl_s *vtbl, nsh_foreach_var_t cb,
int cmd_Lcd(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv);
#endif
#if defined(CONFIG_USER_TEST_SEMC) && !defined(CONFIG_NSH_DISABLE_USER_TEST_SEMC)
int cmd_Extsram(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv);
#endif
#if defined(CONFIG_APPLICATION_SENSOR_HCHO_TB600B_WQ_HCHO1OS) && !defined(CONFIG_NSH_DISABLE_HCHO_TB600B_WQ_HCHO1OS)
int cmd_Hcho1os(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv);
#endif

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@@ -90,6 +90,19 @@ int cmd_Lcd(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv)
}
#endif
/****************************************************************************
* Name: cmd_Extsram
****************************************************************************/
#if defined(CONFIG_USER_TEST_SEMC) && !defined(CONFIG_NSH_DISABLE_USER_TEST_SEMC)
extern int extsram_test(void);
int cmd_Extsram(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv)
{
nsh_output(vtbl, "Hello, extra sdram!\n");
extsram_test();
return OK;
}
#endif
/****************************************************************************
* Name: cmd_Hcho1os
****************************************************************************/

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@@ -612,6 +612,10 @@ static const struct cmdmap_s g_cmdmap[] =
{ "lcd", cmd_Lcd, 1, 1, "[LCD demo cmd.]" },
#endif
#if defined(CONFIG_USER_TEST_SEMC) && !defined(CONFIG_NSH_DISABLE_USER_TEST_SEMC)
{ "sram", cmd_Extsram, 1, 1, "[Extra sdram demo cmd.]" },
#endif
#if defined(CONFIG_APPLICATION_SENSOR_HCHO_TB600B_WQ_HCHO1OS) && !defined(CONFIG_NSH_DISABLE_HCHO_TB600B_WQ_HCHO1OS)
{ "hcho1os", cmd_Hcho1os, 1, 1, "[get the concentration of formaldehyde with sensor tb600b_wq_hcho1os.]" },
#endif

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@@ -0,0 +1,227 @@
/****************************************************************************
* arch/arm/src/imxrt/imxrt_mpuinit.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <assert.h>
#include <nuttx/userspace.h>
#include "mpu.h"
#include "barriers.h"
#include "hardware/imxrt_memorymap.h"
#include "imxrt_mpuinit.h"
#ifdef CONFIG_ARM_MPU
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef MAX
# define MAX(a,b) a > b ? a : b
#endif
#ifndef MIN
# define MIN(a,b) a < b ? a : b
#endif
#ifndef CONFIG_ARMV7M_DCACHE
/* With Dcache off:
* Cacheable (MPU_RASR_C) and Bufferable (MPU_RASR_B) needs to be off
*/
# undef MPU_RASR_B
# define MPU_RASR_B 0
# define RASR_B_VALUE 0
# define RASR_C_VALUE 0
#else
# ifndef CONFIG_ARMV7M_DCACHE_WRITETHROUGH
/* With Dcache on:
* Cacheable (MPU_RASR_C) and Bufferable (MPU_RASR_B) needs to be on
*/
# define RASR_B_VALUE MPU_RASR_B
# define RASR_C_VALUE MPU_RASR_C
# else
/* With Dcache in WRITETHROUGH Bufferable (MPU_RASR_B)
* needs to be off, except for FLASH for alignment leniency
*/
# define RASR_B_VALUE 0
# define RASR_C_VALUE MPU_RASR_C
# endif
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: imxrt_mpu_initialize
*
* Description:
* Configure the MPU to permit user-space access to only restricted i.MXRT
* resources.
*
****************************************************************************/
void imxrt_mpu_initialize(void)
{
#ifdef CONFIG_BUILD_PROTECTED
uintptr_t datastart;
uintptr_t dataend;
#endif
/* Show MPU information */
mpu_showtype();
#ifdef CONFIG_ARMV7M_DCACHE
/* Memory barrier */
ARM_DMB();
#ifdef CONFIG_IMXFT_QSPI
/* Make QSPI memory region strongly ordered */
mpu_priv_stronglyordered(IMXRT_QSPIMEM_BASE, IMXRT_QSPIMEM_SIZE);
#endif
#endif
#ifdef CONFIG_BUILD_PROTECTED
/* Configure user flash and SRAM space */
DEBUGASSERT(USERSPACE->us_textend >= USERSPACE->us_textstart);
mpu_user_flash(USERSPACE->us_textstart,
USERSPACE->us_textend - USERSPACE->us_textstart);
datastart = MIN(USERSPACE->us_datastart, USERSPACE->us_bssstart);
dataend = MAX(USERSPACE->us_dataend, USERSPACE->us_bssend);
DEBUGASSERT(dataend >= datastart);
mpu_user_intsram(datastart, dataend - datastart);
#else
mpu_configure_region(0xc0000000, 512 * 1024 * 1024,
MPU_RASR_TEX_DEV | /* Device
* Not Cacheable
* Not Bufferable
* Not Shareable */
MPU_RASR_AP_RWRW); /* P:RW U:RW
* Instruction access */
mpu_configure_region(IMXRT_EXTMEM_BASE, 1024 * 1024 * 1024,
MPU_RASR_TEX_DEV | /* Device
* Not Cacheable
* Not Bufferable
* Not Shareable */
MPU_RASR_AP_RWRW); /* P:RW U:RW
* Instruction access */
mpu_configure_region(IMXRT_FLEXCIPHER_BASE, 8 * 1024 * 1024,
MPU_RASR_TEX_NOR | /* Normal */
RASR_C_VALUE | /* Cacheable */
MPU_RASR_B | /* Bufferable
* Not Shareable */
MPU_RASR_AP_RORO); /* P:RO U:RO
* Instruction access */
mpu_configure_region(IMXRT_ITCM_BASE, 128 * 1024,
MPU_RASR_TEX_NOR | /* Normal */
RASR_C_VALUE | /* Cacheable */
RASR_B_VALUE | /* Bufferable
* Not Shareable */
MPU_RASR_AP_RWRW); /* P:RW U:RW
* Instruction access */
mpu_configure_region(IMXRT_DTCM_BASE, 128 * 1024,
MPU_RASR_TEX_NOR | /* Normal */
RASR_C_VALUE | /* Cacheable */
RASR_B_VALUE | /* Bufferable
* Not Shareable */
MPU_RASR_AP_RWRW); /* P:RW U:RW
* Instruction access */
#if 0
mpu_configure_region(IMXRT_OCRAM2_BASE, 512 * 1024,
MPU_RASR_TEX_NOR | /* Normal */
RASR_C_VALUE | /* Cacheable */
RASR_B_VALUE | /* Bufferable
* Not Shareable */
MPU_RASR_AP_RWRW); /* P:RW U:RW
* Instruction access */
#endif
mpu_configure_region(IMXRT_OCRAM_BASE, 512 * 1024,
MPU_RASR_TEX_NOR | /* Normal */
RASR_C_VALUE | /* Cacheable */
RASR_B_VALUE | /* Bufferable
* Not Shareable */
MPU_RASR_AP_RWRW); /* P:RW U:RW
* Instruction access */
mpu_configure_region(IMXRT_EXTMEM_BASE, 32 * 1024 * 1024,
MPU_RASR_TEX_SO | /* Ordered */
RASR_C_VALUE | /* Cacheable */
RASR_B_VALUE | /* Bufferable
* Not Shareable */
MPU_RASR_AP_RWRW); /* P:RW U:RW
* Instruction access */
mpu_configure_region(0x81e00000, 2 * 1024 * 1024,
MPU_RASR_TEX_NOR | /* Normal
* Not Cacheable
* Not Bufferable
* Not Shareable */
MPU_RASR_AP_RWRW); /* P:RW U:RW
* Instruction access */
mpu_control(true, true, true);
return;
#endif
/* Then enable the MPU */
mpu_control(true, false, true);
}
/****************************************************************************
* Name: imxrt_mpu_uheap
*
* Description:
* Map the user-heap region.
*
* This logic may need an extension to handle external SDRAM).
*
****************************************************************************/
#ifdef CONFIG_BUILD_PROTECTED
void imxrt_mpu_uheap(uintptr_t start, size_t size)
{
mpu_user_intsram(start, size);
}
#endif
#endif /* CONFIG_ARM_MPU */

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@@ -1,69 +0,0 @@
mainmenu "XiZi Project Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config KERNEL_DIR
string
option env="KERNEL_ROOT"
default "../.."
config BOARD_STM32F407_EVB
bool
select ARCH_ARM
default y
source "$KERNEL_DIR/arch/Kconfig"
menu "aiit-arm32-board feature"
source "$BSP_DIR/third_party_driver/Kconfig"
menu "config default board resources"
menu "config board app name"
config BOARD_APP_NAME
string "config board app name"
default "/XiUOS_aiit-arm32-board_app.bin"
endmenu
menu "config board service table"
config SERVICE_TABLE_ADDRESS
hex "board service table address"
default 0x20000000
endmenu
menu "config hardware resources for connection"
if CONNECTION_INDUSTRIAL_ETHERNET
config ETHERNET_UART_NAME
string "ethernet uart name"
default "/dev/usart3_dev3"
endif
if CONNECTION_COMMUNICATION_WIFI
config WIFI_UART_NAME
string "wifi uart name"
default "/dev/usart3_dev3"
endif
if CONNECTION_COMMUNICATION_LORA
config LORA_SPI_NAME
string "lora spi name"
default "/dev/spi2_lora"
endif
endmenu
menu "config board peripheral"
config MOUNT_SDCARD
bool "mount cd card"
default n
select BSP_USING_SDIO
endmenu
endmenu
endmenu
menu "Hardware feature"
source "$KERNEL_DIR/resources/Kconfig"
endmenu
source "$KERNEL_DIR/Kconfig"

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@@ -1,59 +0,0 @@
mainmenu "XiZi Project Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config KERNEL_DIR
string
option env="KERNEL_ROOT"
default "../.."
config BOARD_CORTEX_M4_EVB
bool
select ARCH_ARM
default y
source "$KERNEL_DIR/arch/Kconfig"
menu "cortex-m4-emulator feature"
source "$BSP_DIR/third_party_driver/Kconfig"
menu "config default board resources"
menu "config board app name"
config BOARD_APP_NAME
string "config board app name"
default "/XiUOS_cortex-m4-emulator_app.bin"
endmenu
menu "config board service table"
config SERVICE_TABLE_ADDRESS
hex "board service table address"
default 0x20000000
endmenu
menu "config hardware resources for connection"
if CONNECTION_INDUSTRIAL_ETHERNET
config ETHERNET_UART_NAME
string "ethernet uart name"
default "/dev/usart3_dev3"
endif
if CONNECTION_COMMUNICATION_WIFI
config WIFI_UART_NAME
string "wifi uart name"
default "/dev/usart3_dev3"
endif
endmenu
endmenu
endmenu
menu "Hardware feature"
source "$KERNEL_DIR/resources/Kconfig"
endmenu
source "$KERNEL_DIR/Kconfig"

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@@ -1,69 +0,0 @@
mainmenu "XiZi Project Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config KERNEL_DIR
string
option env="KERNEL_ROOT"
default "../.."
config BOARD_GAPUINO
bool
select ARCH_RISCV
default y
source "$KERNEL_DIR/arch/Kconfig"
menu "gapuino feature"
source "$BSP_DIR/third_party_driver/Kconfig"
menu "config default board resources"
menu "config board app name"
config BOARD_APP_NAME
string "config board app name"
default "/XiUOS_gapuino_app.bin"
endmenu
menu "config board service table"
config SERVICE_TABLE_ADDRESS
hex "board service table address"
default 0x80100000
endmenu
menu "config hardware resources for connection"
if CONNECTION_INDUSTRIAL_ETHERNET
config ETHERNET_UART_NAME
string "ethernet uart name"
default "/dev/uart3_dev3"
endif
if CONNECTION_COMMUNICATION_WIFI
config WIFI_UART_NAME
string "wifi uart name"
default "/dev/uart3_dev3"
endif
endmenu
endmenu
config __STACKSIZE__
int "stack size for interrupt"
default 4096
endmenu
menu "Hardware feature"
source "$KERNEL_DIR/resources/Kconfig"
endmenu
source "$KERNEL_DIR/Kconfig"

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@@ -1,102 +0,0 @@
/*
* Copyright 2021 NXP
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/**
* @file pin_mux.c
* @brief support imxrt1176-sbc pinmux
* @version 1.0
* @author AIIT XUOS Lab
* @date 2022-08-19
*/
/*************************************************
File name: pin_mux.c
Description: support imxrt1176-sbc pinmux
Others: take SDK_2_11_1_MIMXRT1170-EVK for references
History:
1. Date: 2022-08-19
Author: AIIT XUOS Lab
Modification:
*************************************************/
/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
**********************************************************************************************************************/
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!GlobalInfo
product: Pins v7.0
processor: MIMXRT1176xxxxx
package_id: MIMXRT1176DVMAA
mcu_data: ksdk2_0
processor_version: 0.0.2
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
#include "fsl_common.h"
#include "fsl_iomuxc.h"
#include "pin_mux.h"
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitBootPins
* Description : Calls initialization functions.
*
* END ****************************************************************************************************************/
void BOARD_InitBootPins(void) {
BOARD_InitPins();
}
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitPins:
- options: {callFromInitBoot: 'true', coreID: cm7, enableClock: 'true'}
- pin_list:
- {pin_num: M15, peripheral: LPUART1, signal: RXD, pin_signal: GPIO_AD_25, software_input_on: Disable, pull_up_down_config: Pull_Down, pull_keeper_select: Keeper,
open_drain: Disable, drive_strength: High, slew_rate: Slow}
- {pin_num: L13, peripheral: LPUART1, signal: TXD, pin_signal: GPIO_AD_24, software_input_on: Disable, pull_up_down_config: Pull_Down, pull_keeper_select: Keeper,
open_drain: Disable, drive_strength: High, slew_rate: Slow}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitPins
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
void BOARD_InitPins(void) {
CLOCK_EnableClock(kCLOCK_Iomuxc); /* LPCG on: LPCG is ON. */
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_24_LPUART1_TXD, /* GPIO_AD_24 is configured as LPUART1_TXD */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_25_LPUART1_RXD, /* GPIO_AD_25 is configured as LPUART1_RXD */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinConfig(
IOMUXC_GPIO_AD_24_LPUART1_TXD, /* GPIO_AD_24 PAD functional properties : */
0x02U); /* Slew Rate Field: Slow Slew Rate
Drive Strength Field: high driver
Pull / Keep Select Field: Pull Disable, Highz
Pull Up / Down Config. Field: Weak pull down
Open Drain Field: Disabled */
IOMUXC_SetPinConfig(
IOMUXC_GPIO_AD_25_LPUART1_RXD, /* GPIO_AD_25 PAD functional properties : */
0x02U); /* Slew Rate Field: Slow Slew Rate
Drive Strength Field: high driver
Pull / Keep Select Field: Pull Disable, Highz
Pull Up / Down Config. Field: Weak pull down
Open Drain Field: Disabled */
}
/***********************************************************************************************************************
* EOF
**********************************************************************************************************************/

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@@ -1,81 +0,0 @@
mainmenu "XiZi Project Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config KERNEL_DIR
string
option env="KERNEL_ROOT"
default "../.."
config BOARD_K210_EVB
bool
select ARCH_RISCV
select ARCH_RISCV64
select ARCH_CPU_64BIT
default y
config LED0
int
default 24
config LED1
int
default 25
source "$KERNEL_DIR/arch/Kconfig"
menu "kd233 feature"
source "$BSP_DIR/third_party_driver/Kconfig"
menu "config default board resources"
menu "config board app name"
config BOARD_APP_NAME
string "config board app name"
default "/XiUOS_kd233_app.bin"
endmenu
menu "config board service table"
config SERVICE_TABLE_ADDRESS
hex "board service table address"
default 0x80100000
endmenu
menu "config hardware resources for connection"
if CONNECTION_INDUSTRIAL_ETHERNET
config ETHERNET_UART_NAME
string "ethernet uart name"
default "/dev/uart3_dev3"
endif
if CONNECTION_COMMUNICATION_WIFI
config WIFI_UART_NAME
string "wifi uart name"
default "/dev/uart3_dev3"
endif
endmenu
endmenu
config __STACKSIZE__
int "stack size for interrupt"
default 4096
endmenu
config BSP_USING_QEMU
bool
default y
menu "Hardware feature"
source "$KERNEL_DIR/resources/Kconfig"
endmenu
source "$KERNEL_DIR/Kconfig"

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@@ -1,59 +0,0 @@
mainmenu "XiZi Project Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config KERNEL_DIR
string
option env="KERNEL_ROOT"
default "../.."
config BOARD_STM32F407_EVB
bool
select ARCH_ARM
default y
source "$KERNEL_DIR/arch/Kconfig"
menu "stm32f407-st-discovery feature"
source "$BSP_DIR/third_party_driver/Kconfig"
menu "config default board resources"
menu "config board app name"
config BOARD_APP_NAME
string "config board app name"
default "/XiUOS_stm32f407-st-discovery_app.bin"
endmenu
menu "config board service table"
config SERVICE_TABLE_ADDRESS
hex "board service table address"
default 0x20000000
endmenu
menu "config hardware resources for connection"
if CONNECTION_INDUSTRIAL_ETHERNET
config ETHERNET_UART_NAME
string "ethernet uart name"
default "/dev/usart3_dev3"
endif
if CONNECTION_COMMUNICATION_WIFI
config WIFI_UART_NAME
string "wifi uart name"
default "/dev/usart3_dev3"
endif
endmenu
endmenu
endmenu
menu "Hardware feature"
source "$KERNEL_DIR/resources/Kconfig"
endmenu
source "$KERNEL_DIR/Kconfig"

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@@ -1,57 +0,0 @@
mainmenu "XiZi Project Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config KERNEL_DIR
string
option env="KERNEL_ROOT"
default "../.."
config BOARD_STM32F407_EVB
bool
select ARCH_ARM
default y
source "$KERNEL_DIR/arch/Kconfig"
menu "stm32f407zgt6 feature"
source "$BSP_DIR/third_party_driver/Kconfig"
menu "config default board resources"
menu "config board app name"
config BOARD_APP_NAME
string "config board app name"
default "/XiUOS_stm32f407zgt6_app.bin"
endmenu
menu "config board service table"
config SERVICE_TABLE_ADDRESS
hex "board service table address"
default 0x20000000
endmenu
menu "config hardware resources for connection"
if CONNECTION_INDUSTRIAL_ETHERNET
config ETHERNET_UART_NAME
string "ethernet uart name"
default "/dev/usart3_dev3"
endif
if CONNECTION_COMMUNICATION_WIFI
config WIFI_UART_NAME
string "wifi uart name"
default "/dev/usart3_dev3"
endif
endmenu
endmenu
endmenu
menu "Hardware feature"
source "$KERNEL_DIR/resources/Kconfig"
endmenu
source "$KERNEL_DIR/Kconfig"

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@@ -1,3 +0,0 @@
SRC_FILES := connect_gpio.c fsl_gpio.c
include $(KERNEL_ROOT)/compiler.mk

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@@ -1,75 +0,0 @@
/*
* Copyright (c) 2021 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file lwip_config_demo.c
* @brief Demo for ping function
* @version 1.0
* @author AIIT XUOS Lab
* @date 2021.12.15
*/
#include "board.h"
#include "sys_arch.h"
#include <shell.h>
#include <sys.h>
/******************************************************************************/
static void LwipSetIPTask(void *param)
{
lwip_config_net(lwip_ipaddr, lwip_netmask, lwip_gwaddr);
}
void LwipSetIPTest(int argc, char *argv[])
{
if(argc >= 4)
{
lw_print("lw: [%s] ip %s mask %s gw %s\n", __func__, argv[1], argv[2], argv[3]);
sscanf(argv[1], "%d.%d.%d.%d", &lwip_ipaddr[0], &lwip_ipaddr[1], &lwip_ipaddr[2], &lwip_ipaddr[3]);
sscanf(argv[2], "%d.%d.%d.%d", &lwip_netmask[0], &lwip_netmask[1], &lwip_netmask[2], &lwip_netmask[3]);
sscanf(argv[3], "%d.%d.%d.%d", &lwip_gwaddr[0], &lwip_gwaddr[1], &lwip_gwaddr[2], &lwip_gwaddr[3]);
}
else if(argc == 2)
{
lw_print("lw: [%s] ipaddr %s\n", __func__, argv[1]);
sscanf(argv[1], "%d.%d.%d.%d", &lwip_ipaddr[0], &lwip_ipaddr[1], &lwip_ipaddr[2], &lwip_ipaddr[3]);
}
sys_thread_new("SET ip address", LwipSetIPTask, NULL, LWIP_TASK_STACK_SIZE, LWIP_DEMO_TASK_PRIO);
}
SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0) | SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN) | SHELL_CMD_PARAM_NUM(3),
setip, LwipSetIPTest, SetIp [IP] [Netmask] [Gateway]);
void LwipShowIPTask(int argc, char *argv[])
{
char mac_addr[] = configMAC_ADDR;
lw_notice("\r\n************************************************\r\n");
lw_notice(" Network Configuration\r\n");
lw_notice("************************************************\r\n");
lw_notice(" IPv4 Address : %u.%u.%u.%u\r\n", ((u8_t *)&lwip_ipaddr)[0], ((u8_t *)&lwip_ipaddr)[1],
((u8_t *)&lwip_ipaddr)[2], ((u8_t *)&lwip_ipaddr)[3]);
lw_notice(" IPv4 Subnet mask : %u.%u.%u.%u\r\n", ((u8_t *)&lwip_netmask)[0], ((u8_t *)&lwip_netmask)[1],
((u8_t *)&lwip_netmask)[2], ((u8_t *)&lwip_netmask)[3]);
lw_notice(" IPv4 Gateway : %u.%u.%u.%u\r\n", ((u8_t *)&lwip_gwaddr)[0], ((u8_t *)&lwip_gwaddr)[1],
((u8_t *)&lwip_gwaddr)[2], ((u8_t *)&lwip_gwaddr)[3]);
lw_notice(" MAC Address : %x:%x:%x:%x:%x:%x\r\n", mac_addr[0], mac_addr[1], mac_addr[2],
mac_addr[3], mac_addr[4], mac_addr[5]);
lw_notice("************************************************\r\n");
}
SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0) | SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN) | SHELL_CMD_PARAM_NUM(0),
showip, LwipShowIPTask, GetIp [IP] [Netmask] [Gateway]);

View File

@@ -1,4 +1,12 @@
ifeq ($(CONFIG_BOARD_CORTEX_M4_EVB)_$(CONFIG_BOARD_STM32F407_EVB)),y_y)
ifeq ($(CONFIG_BOARD_CORTEX_M4_EVB),y)
SRC_FILES := interrupt.c system_init.c boot.S interrupt_vector.S coreclock.c svc_entry.S
ifeq ($(CONFIG_TASK_ISOLATION),y)
SRC_FILES += svc_handle.c mpu.c
endif
endif
ifeq ($(CONFIG_BOARD_STM32F407_EVB),y)
SRC_FILES := interrupt.c system_init.c boot.S interrupt_vector.S coreclock.c svc_entry.S
ifeq ($(CONFIG_TASK_ISOLATION),y)

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