diff --git a/APP_Framework/Applications/lv_app/lv_demo.c b/APP_Framework/Applications/lv_app/lv_demo.c index 13536434d..3257b6f7f 100644 --- a/APP_Framework/Applications/lv_app/lv_demo.c +++ b/APP_Framework/Applications/lv_app/lv_demo.c @@ -22,11 +22,11 @@ extern void lv_example_aoteman(void); void* lvgl_thread(void *parameter) { /* display demo; you may replace with your LVGL application at here */ - // lv_demo_calendar(); + lv_demo_calendar(); // lv_example_img_1(); // lv_example_chart_2(); // lv_example_line_1(); - lv_example_aoteman(); + // lv_example_aoteman(); /* handle the tasks of LVGL */ while(1) { diff --git a/APP_Framework/Applications/lv_app/lv_demo_calendar.c b/APP_Framework/Applications/lv_app/lv_demo_calendar.c index 3b4cabb68..2d354fd28 100644 --- a/APP_Framework/Applications/lv_app/lv_demo_calendar.c +++ b/APP_Framework/Applications/lv_app/lv_demo_calendar.c @@ -18,7 +18,7 @@ static void event_handler(lv_event_t * e) void lv_demo_calendar(void) { lv_obj_t * calendar = lv_calendar_create(lv_scr_act()); - lv_obj_set_size(calendar, 320, 240); + lv_obj_set_size(calendar, 480, 272); lv_obj_align(calendar, LV_ALIGN_CENTER, 0, 0); lv_obj_add_event_cb(calendar, event_handler, LV_EVENT_ALL, NULL); diff --git a/Ubiquitous/XiZi/board/xidatong/board.c b/Ubiquitous/XiZi/board/xidatong/board.c index add8b5c4c..8689ded92 100644 --- a/Ubiquitous/XiZi/board/xidatong/board.c +++ b/Ubiquitous/XiZi/board/xidatong/board.c @@ -63,6 +63,10 @@ extern int ExtSramInit(void); extern int ETH_BSP_Config(); #endif +#ifdef BSP_USING_LCD +extern int Imxrt1052HwLcdInit(void); +#endif + void BOARD_SD_Pin_Config(uint32_t speed, uint32_t strength) { IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_00_USDHC1_CMD, @@ -273,6 +277,8 @@ void SysTick_Handler(int irqn, void *arg) } DECLARE_HW_IRQ(SYSTICK_IRQN, SysTick_Handler, NONE); + + /** * This function will initial imxrt1050 board. */ @@ -331,5 +337,8 @@ void InitBoardHardware() Imxrt1052HwSdioInit(); #endif +#ifdef BSP_USING_LCD + Imxrt1052HwLcdInit(); +#endif } diff --git a/Ubiquitous/XiZi/board/xidatong/link.lds b/Ubiquitous/XiZi/board/xidatong/link.lds index 38d111b23..d9db1e140 100644 --- a/Ubiquitous/XiZi/board/xidatong/link.lds +++ b/Ubiquitous/XiZi/board/xidatong/link.lds @@ -61,6 +61,9 @@ MEMORY m_text (RX) : ORIGIN = 0x60002400, LENGTH = 0x03FFDC00 m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000 m_data2 (RW) : ORIGIN = 0x20200000, LENGTH = 0x00060000 + + m_sdram (RW) : ORIGIN = 0x80000000, LENGTH = 0x01E00000 + m_nocache (RW) : ORIGIN = 0x81E00000, LENGTH = 0x00200000 } /* Define output sections */ @@ -217,14 +220,14 @@ SECTIONS *(NonCacheable.init) . = ALIGN(4); __noncachedata_init_end__ = .; /* create a global symbol at initialized ncache data end */ - } > m_data + } > m_nocache . = __noncachedata_init_end__; .ncache : { *(NonCacheable) . = ALIGN(4); __noncachedata_end__ = .; /* define a global symbol at ncache data end */ - } > m_data + } > m_nocache __DATA_END = __NDATA_ROM + (__noncachedata_init_end__ - __noncachedata_start__); text_end = ORIGIN(m_text) + LENGTH(m_text); diff --git a/Ubiquitous/XiZi/board/xidatong/third_party_driver/Kconfig b/Ubiquitous/XiZi/board/xidatong/third_party_driver/Kconfig index 1c4cbea81..df6069f09 100644 --- a/Ubiquitous/XiZi/board/xidatong/third_party_driver/Kconfig +++ b/Ubiquitous/XiZi/board/xidatong/third_party_driver/Kconfig @@ -40,7 +40,13 @@ menuconfig BSP_USING_SDIO if BSP_USING_SDIO source "$BSP_DIR/third_party_driver/sdio/Kconfig" endif - +menuconfig BSP_USING_LCD + bool "Using LCD device" + default n + select RESOURCES_LCD + if BSP_USING_LCD + source "$BSP_DIR/third_party_driver/lcd/Kconfig" + endif menuconfig BSP_USING_USB bool "Using USB device" default n diff --git a/Ubiquitous/XiZi/board/xidatong/third_party_driver/Makefile b/Ubiquitous/XiZi/board/xidatong/third_party_driver/Makefile index b439cc98f..5519ea1fa 100644 --- a/Ubiquitous/XiZi/board/xidatong/third_party_driver/Makefile +++ b/Ubiquitous/XiZi/board/xidatong/third_party_driver/Makefile @@ -24,4 +24,7 @@ ifeq ($(CONFIG_BSP_USING_USB),y) SRC_DIR += usb endif +ifeq ($(CONFIG_BSP_USING_LCD),y) + SRC_DIR += lcd +endif include $(KERNEL_ROOT)/compiler.mk diff --git a/Ubiquitous/XiZi/board/xidatong/third_party_driver/common/pin_mux.c b/Ubiquitous/XiZi/board/xidatong/third_party_driver/common/pin_mux.c index 63eed88b2..b34d446be 100755 --- a/Ubiquitous/XiZi/board/xidatong/third_party_driver/common/pin_mux.c +++ b/Ubiquitous/XiZi/board/xidatong/third_party_driver/common/pin_mux.c @@ -742,18 +742,294 @@ BOARD_InitPins: pull_keeper_select: Pull, pull_keeper_enable: Enable, open_drain: Disable, speed: MHZ_100, drive_strength: R0_4, slew_rate: Fast} * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** */ - +void Lcd_InitPins(void) +{ + IOMUXC_SetPinMux( + IOMUXC_GPIO_B0_00_LCD_CLK, /* GPIO_B0_00 is configured as LCD_CLK */ + 0U); /* Software Input On Field: Input Path is determined by functionality */ + IOMUXC_SetPinMux( + IOMUXC_GPIO_B0_01_LCD_ENABLE, /* GPIO_B0_01 is configured as LCD_ENABLE */ + 0U); /* Software Input On Field: Input Path is determined by functionality */ + IOMUXC_SetPinMux( + IOMUXC_GPIO_B0_02_LCD_HSYNC, /* GPIO_B0_02 is configured as LCD_HSYNC */ + 0U); /* Software Input On Field: Input Path is determined by functionality */ + IOMUXC_SetPinMux( + IOMUXC_GPIO_B0_03_LCD_VSYNC, /* GPIO_B0_03 is configured as LCD_VSYNC */ + 0U); /* Software Input On Field: Input Path is determined by functionality */ + IOMUXC_SetPinMux( + IOMUXC_GPIO_B0_04_LCD_DATA00, /* GPIO_B0_04 is configured as LCD_DATA00 */ + 0U); /* Software Input On Field: Input Path is determined by functionality */ + IOMUXC_SetPinMux( + IOMUXC_GPIO_B0_05_LCD_DATA01, /* GPIO_B0_05 is configured as LCD_DATA01 */ + 0U); /* Software Input On Field: Input Path is determined by functionality */ + IOMUXC_SetPinMux( + IOMUXC_GPIO_B0_06_LCD_DATA02, /* GPIO_B0_06 is configured as LCD_DATA02 */ + 0U); /* Software Input On Field: Input Path is determined by functionality */ + IOMUXC_SetPinMux( + IOMUXC_GPIO_B0_07_LCD_DATA03, /* GPIO_B0_07 is configured as LCD_DATA03 */ + 0U); /* Software Input On Field: Input Path is determined by functionality */ + IOMUXC_SetPinMux( + IOMUXC_GPIO_B0_08_LCD_DATA04, /* GPIO_B0_08 is configured as LCD_DATA04 */ + 0U); /* Software Input On Field: Input Path is determined by functionality */ + IOMUXC_SetPinMux( + IOMUXC_GPIO_B0_09_LCD_DATA05, /* GPIO_B0_09 is configured as LCD_DATA05 */ + 0U); /* Software Input On Field: Input Path is determined by functionality */ + IOMUXC_SetPinMux( + IOMUXC_GPIO_B0_10_LCD_DATA06, /* GPIO_B0_10 is configured as LCD_DATA06 */ + 0U); /* Software Input On Field: Input Path is determined by functionality */ + IOMUXC_SetPinMux( + IOMUXC_GPIO_B0_11_LCD_DATA07, /* GPIO_B0_11 is configured as LCD_DATA07 */ + 0U); /* Software Input On Field: Input Path is determined by functionality */ + IOMUXC_SetPinMux( + IOMUXC_GPIO_B0_12_LCD_DATA08, /* GPIO_B0_12 is configured as LCD_DATA08 */ + 0U); /* Software Input On Field: Input Path is determined by functionality */ + IOMUXC_SetPinMux( + IOMUXC_GPIO_B0_13_LCD_DATA09, /* GPIO_B0_13 is configured as LCD_DATA09 */ + 0U); /* Software Input On Field: Input Path is determined by functionality */ + IOMUXC_SetPinMux( + IOMUXC_GPIO_B0_14_LCD_DATA10, /* GPIO_B0_14 is configured as LCD_DATA10 */ + 0U); /* Software Input On Field: Input Path is determined by functionality */ + IOMUXC_SetPinMux( + IOMUXC_GPIO_B0_15_LCD_DATA11, /* GPIO_B0_15 is configured as LCD_DATA11 */ + 0U); /* Software Input On Field: Input Path is determined by functionality */ + IOMUXC_SetPinMux( + IOMUXC_GPIO_B1_00_LCD_DATA12, /* GPIO_B1_00 is configured as LCD_DATA12 */ + 0U); /* Software Input On Field: Input Path is determined by functionality */ + IOMUXC_SetPinMux( + IOMUXC_GPIO_B1_01_LCD_DATA13, /* GPIO_B1_01 is configured as LCD_DATA13 */ + 0U); /* Software Input On Field: Input Path is determined by functionality */ + IOMUXC_SetPinMux( + IOMUXC_GPIO_B1_02_LCD_DATA14, /* GPIO_B1_02 is configured as LCD_DATA14 */ + 0U); /* Software Input On Field: Input Path is determined by functionality */ + IOMUXC_SetPinMux( + IOMUXC_GPIO_B1_03_LCD_DATA15, /* GPIO_B1_03 is configured as LCD_DATA15 */ + 0U); /* Software Input On Field: Input Path is determined by functionality */ + IOMUXC_SetPinMux( + IOMUXC_GPIO_B1_15_GPIO2_IO31, /* GPIO_B1_15 is configured as GPIO2_IO31 */ + 0U); /* Software Input On Field: Input Path is determined by functionality */ + IOMUXC_SetPinConfig( + IOMUXC_GPIO_B0_00_LCD_CLK, /* GPIO_B0_00 PAD functional properties : */ + 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate + Drive Strength Field: R0/6 + Speed Field: medium(100MHz) + Open Drain Enable Field: Open Drain Disabled + Pull / Keep Enable Field: Pull/Keeper Enabled + Pull / Keep Select Field: Pull + Pull Up / Down Config. Field: 100K Ohm Pull Up + Hyst. Enable Field: Hysteresis Enabled */ + IOMUXC_SetPinConfig( + IOMUXC_GPIO_B0_01_LCD_ENABLE, /* GPIO_B0_01 PAD functional properties : */ + 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate + Drive Strength Field: R0/6 + Speed Field: medium(100MHz) + Open Drain Enable Field: Open Drain Disabled + Pull / Keep Enable Field: Pull/Keeper Enabled + Pull / Keep Select Field: Pull + Pull Up / Down Config. Field: 100K Ohm Pull Up + Hyst. Enable Field: Hysteresis Enabled */ + IOMUXC_SetPinConfig( + IOMUXC_GPIO_B0_02_LCD_HSYNC, /* GPIO_B0_02 PAD functional properties : */ + 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate + Drive Strength Field: R0/6 + Speed Field: medium(100MHz) + Open Drain Enable Field: Open Drain Disabled + Pull / Keep Enable Field: Pull/Keeper Enabled + Pull / Keep Select Field: Pull + Pull Up / Down Config. Field: 100K Ohm Pull Up + Hyst. Enable Field: Hysteresis Enabled */ + IOMUXC_SetPinConfig( + IOMUXC_GPIO_B0_03_LCD_VSYNC, /* GPIO_B0_03 PAD functional properties : */ + 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate + Drive Strength Field: R0/6 + Speed Field: medium(100MHz) + Open Drain Enable Field: Open Drain Disabled + Pull / Keep Enable Field: Pull/Keeper Enabled + Pull / Keep Select Field: Pull + Pull Up / Down Config. Field: 100K Ohm Pull Up + Hyst. Enable Field: Hysteresis Enabled */ + IOMUXC_SetPinConfig( + IOMUXC_GPIO_B0_04_LCD_DATA00, /* GPIO_B0_04 PAD functional properties : */ + 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate + Drive Strength Field: R0/6 + Speed Field: medium(100MHz) + Open Drain Enable Field: Open Drain Disabled + Pull / Keep Enable Field: Pull/Keeper Enabled + Pull / Keep Select Field: Pull + Pull Up / Down Config. Field: 100K Ohm Pull Up + Hyst. Enable Field: Hysteresis Enabled */ + IOMUXC_SetPinConfig( + IOMUXC_GPIO_B0_05_LCD_DATA01, /* GPIO_B0_05 PAD functional properties : */ + 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate + Drive Strength Field: R0/6 + Speed Field: medium(100MHz) + Open Drain Enable Field: Open Drain Disabled + Pull / Keep Enable Field: Pull/Keeper Enabled + Pull / Keep Select Field: Pull + Pull Up / Down Config. Field: 100K Ohm Pull Up + Hyst. Enable Field: Hysteresis Enabled */ + IOMUXC_SetPinConfig( + IOMUXC_GPIO_B0_06_LCD_DATA02, /* GPIO_B0_06 PAD functional properties : */ + 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate + Drive Strength Field: R0/6 + Speed Field: medium(100MHz) + Open Drain Enable Field: Open Drain Disabled + Pull / Keep Enable Field: Pull/Keeper Enabled + Pull / Keep Select Field: Pull + Pull Up / Down Config. Field: 100K Ohm Pull Up + Hyst. Enable Field: Hysteresis Enabled */ + IOMUXC_SetPinConfig( + IOMUXC_GPIO_B0_07_LCD_DATA03, /* GPIO_B0_07 PAD functional properties : */ + 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate + Drive Strength Field: R0/6 + Speed Field: medium(100MHz) + Open Drain Enable Field: Open Drain Disabled + Pull / Keep Enable Field: Pull/Keeper Enabled + Pull / Keep Select Field: Pull + Pull Up / Down Config. Field: 100K Ohm Pull Up + Hyst. Enable Field: Hysteresis Enabled */ + IOMUXC_SetPinConfig( + IOMUXC_GPIO_B0_08_LCD_DATA04, /* GPIO_B0_08 PAD functional properties : */ + 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate + Drive Strength Field: R0/6 + Speed Field: medium(100MHz) + Open Drain Enable Field: Open Drain Disabled + Pull / Keep Enable Field: Pull/Keeper Enabled + Pull / Keep Select Field: Pull + Pull Up / Down Config. Field: 100K Ohm Pull Up + Hyst. Enable Field: Hysteresis Enabled */ + IOMUXC_SetPinConfig( + IOMUXC_GPIO_B0_09_LCD_DATA05, /* GPIO_B0_09 PAD functional properties : */ + 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate + Drive Strength Field: R0/6 + Speed Field: medium(100MHz) + Open Drain Enable Field: Open Drain Disabled + Pull / Keep Enable Field: Pull/Keeper Enabled + Pull / Keep Select Field: Pull + Pull Up / Down Config. Field: 100K Ohm Pull Up + Hyst. Enable Field: Hysteresis Enabled */ + IOMUXC_SetPinConfig( + IOMUXC_GPIO_B0_10_LCD_DATA06, /* GPIO_B0_10 PAD functional properties : */ + 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate + Drive Strength Field: R0/6 + Speed Field: medium(100MHz) + Open Drain Enable Field: Open Drain Disabled + Pull / Keep Enable Field: Pull/Keeper Enabled + Pull / Keep Select Field: Pull + Pull Up / Down Config. Field: 100K Ohm Pull Up + Hyst. Enable Field: Hysteresis Enabled */ + IOMUXC_SetPinConfig( + IOMUXC_GPIO_B0_11_LCD_DATA07, /* GPIO_B0_11 PAD functional properties : */ + 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate + Drive Strength Field: R0/6 + Speed Field: medium(100MHz) + Open Drain Enable Field: Open Drain Disabled + Pull / Keep Enable Field: Pull/Keeper Enabled + Pull / Keep Select Field: Pull + Pull Up / Down Config. Field: 100K Ohm Pull Up + Hyst. Enable Field: Hysteresis Enabled */ + IOMUXC_SetPinConfig( + IOMUXC_GPIO_B0_12_LCD_DATA08, /* GPIO_B0_12 PAD functional properties : */ + 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate + Drive Strength Field: R0/6 + Speed Field: medium(100MHz) + Open Drain Enable Field: Open Drain Disabled + Pull / Keep Enable Field: Pull/Keeper Enabled + Pull / Keep Select Field: Pull + Pull Up / Down Config. Field: 100K Ohm Pull Up + Hyst. Enable Field: Hysteresis Enabled */ + IOMUXC_SetPinConfig( + IOMUXC_GPIO_B0_13_LCD_DATA09, /* GPIO_B0_13 PAD functional properties : */ + 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate + Drive Strength Field: R0/6 + Speed Field: medium(100MHz) + Open Drain Enable Field: Open Drain Disabled + Pull / Keep Enable Field: Pull/Keeper Enabled + Pull / Keep Select Field: Pull + Pull Up / Down Config. Field: 100K Ohm Pull Up + Hyst. Enable Field: Hysteresis Enabled */ + IOMUXC_SetPinConfig( + IOMUXC_GPIO_B0_14_LCD_DATA10, /* GPIO_B0_14 PAD functional properties : */ + 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate + Drive Strength Field: R0/6 + Speed Field: medium(100MHz) + Open Drain Enable Field: Open Drain Disabled + Pull / Keep Enable Field: Pull/Keeper Enabled + Pull / Keep Select Field: Pull + Pull Up / Down Config. Field: 100K Ohm Pull Up + Hyst. Enable Field: Hysteresis Enabled */ + IOMUXC_SetPinConfig( + IOMUXC_GPIO_B0_15_LCD_DATA11, /* GPIO_B0_15 PAD functional properties : */ + 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate + Drive Strength Field: R0/6 + Speed Field: medium(100MHz) + Open Drain Enable Field: Open Drain Disabled + Pull / Keep Enable Field: Pull/Keeper Enabled + Pull / Keep Select Field: Pull + Pull Up / Down Config. Field: 100K Ohm Pull Up + Hyst. Enable Field: Hysteresis Enabled */ + IOMUXC_SetPinConfig( + IOMUXC_GPIO_B1_00_LCD_DATA12, /* GPIO_B1_00 PAD functional properties : */ + 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate + Drive Strength Field: R0/6 + Speed Field: medium(100MHz) + Open Drain Enable Field: Open Drain Disabled + Pull / Keep Enable Field: Pull/Keeper Enabled + Pull / Keep Select Field: Pull + Pull Up / Down Config. Field: 100K Ohm Pull Up + Hyst. Enable Field: Hysteresis Enabled */ + IOMUXC_SetPinConfig( + IOMUXC_GPIO_B1_01_LCD_DATA13, /* GPIO_B1_01 PAD functional properties : */ + 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate + Drive Strength Field: R0/6 + Speed Field: medium(100MHz) + Open Drain Enable Field: Open Drain Disabled + Pull / Keep Enable Field: Pull/Keeper Enabled + Pull / Keep Select Field: Pull + Pull Up / Down Config. Field: 100K Ohm Pull Up + Hyst. Enable Field: Hysteresis Enabled */ + IOMUXC_SetPinConfig( + IOMUXC_GPIO_B1_02_LCD_DATA14, /* GPIO_B1_02 PAD functional properties : */ + 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate + Drive Strength Field: R0/6 + Speed Field: medium(100MHz) + Open Drain Enable Field: Open Drain Disabled + Pull / Keep Enable Field: Pull/Keeper Enabled + Pull / Keep Select Field: Pull + Pull Up / Down Config. Field: 100K Ohm Pull Up + Hyst. Enable Field: Hysteresis Enabled */ + IOMUXC_SetPinConfig( + IOMUXC_GPIO_B1_03_LCD_DATA15, /* GPIO_B1_03 PAD functional properties : */ + 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate + Drive Strength Field: R0/6 + Speed Field: medium(100MHz) + Open Drain Enable Field: Open Drain Disabled + Pull / Keep Enable Field: Pull/Keeper Enabled + Pull / Keep Select Field: Pull + Pull Up / Down Config. Field: 100K Ohm Pull Up + Hyst. Enable Field: Hysteresis Enabled */ + IOMUXC_SetPinConfig( + IOMUXC_GPIO_B1_15_GPIO2_IO31, /* GPIO_B1_15 PAD functional properties : */ + 0x10B0u); /* Slew Rate Field: Slow Slew Rate + Drive Strength Field: R0/6 + Speed Field: medium(100MHz) + Open Drain Enable Field: Open Drain Disabled + Pull / Keep Enable Field: Pull/Keeper Enabled + Pull / Keep Select Field: Keeper + Pull Up / Down Config. Field: 100K Ohm Pull Down + Hyst. Enable Field: Hysteresis Disabled */ +} /* FUNCTION ************************************************************************************************************ * * Function Name : BOARD_InitPins * Description : Configures pin routing and optionally pin electrical features. * * END ****************************************************************************************************************/ -void BOARD_InitPins(void) { +void BOARD_InitPins(void) +{ CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03u */ /* Software Input On Field: Input Path is determined by functionality */ SemcPinmuxConfig(); - + Lcd_InitPins(); IOMUXC_SetPinMux( IOMUXC_GPIO_AD_B0_03_GPIO1_IO03, /* GPIO_AD_B0_09 is configured as GPIO1_IO09 */ 0U); /* Software Input On Field: Input Path is determined by functionality */ diff --git a/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/connect_lcd.h b/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/connect_lcd.h new file mode 100644 index 000000000..20c88eaf8 --- /dev/null +++ b/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/connect_lcd.h @@ -0,0 +1,20 @@ +/** +* @file connect_lcd.h +* @brief define xidatong lcd function +* @version 1.0 +* @author AIIT XiUOS Lab +* @date 2022-04-25 +*/ + +#ifndef CONNECT_LCD_H +#define CONNECT_LCD_H + +#include + +#ifdef BSP_USING_TOUCH +#include "connect_touch.h" +#endif + + +int Imxrt1052HwLcdInit(void); +#endif diff --git a/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_elcdif.h b/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_elcdif.h new file mode 100644 index 000000000..c8e32af13 --- /dev/null +++ b/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_elcdif.h @@ -0,0 +1,750 @@ +/* + * Copyright 2017 NXP + * All rights reserved. + * + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef _FSL_ELCDIF_H_ +#define _FSL_ELCDIF_H_ + +#include "fsl_common.h" + +/*! + * @addtogroup elcdif + * @{ + */ + +/******************************************************************************* + * Definitions + ******************************************************************************/ + +/*! @name Driver version */ +/*@{*/ +/*! @brief eLCDIF driver version */ +#define FSL_ELCDIF_DRIVER_VERSION (MAKE_VERSION(2, 0, 1)) /*!< Version 2.0.1. */ +/*@}*/ + +/* All IRQ flags in CTRL1 register. */ +#define ELCDIF_CTRL1_IRQ_MASK \ + (LCDIF_CTRL1_BM_ERROR_IRQ_MASK | LCDIF_CTRL1_OVERFLOW_IRQ_MASK | LCDIF_CTRL1_UNDERFLOW_IRQ_MASK | \ + LCDIF_CTRL1_CUR_FRAME_DONE_IRQ_MASK | LCDIF_CTRL1_VSYNC_EDGE_IRQ_MASK) + +/* All IRQ enable control bits in CTRL1 register. */ +#define ELCDIF_CTRL1_IRQ_EN_MASK \ + (LCDIF_CTRL1_BM_ERROR_IRQ_EN_MASK | LCDIF_CTRL1_OVERFLOW_IRQ_EN_MASK | LCDIF_CTRL1_UNDERFLOW_IRQ_EN_MASK | \ + LCDIF_CTRL1_CUR_FRAME_DONE_IRQ_EN_MASK | LCDIF_CTRL1_VSYNC_EDGE_IRQ_EN_MASK) + +/* All IRQ flags in AS_CTRL register. */ +#if defined(LCDIF_AS_CTRL_CSI_SYNC_ON_IRQ_MASK) +#define ELCDIF_AS_CTRL_IRQ_MASK (LCDIF_AS_CTRL_CSI_SYNC_ON_IRQ_MASK) +#else +#define ELCDIF_AS_CTRL_IRQ_MASK 0U +#endif + +/* All IRQ enable control bits in AS_CTRL register. */ +#if defined(LCDIF_AS_CTRL_CSI_SYNC_ON_IRQ_EN_MASK) +#define ELCDIF_AS_CTRL_IRQ_EN_MASK (LCDIF_AS_CTRL_CSI_SYNC_ON_IRQ_EN_MASK) +#else +#define ELCDIF_AS_CTRL_IRQ_EN_MASK 0U +#endif + +#if ((ELCDIF_CTRL1_IRQ_MASK & ELCDIF_AS_CTRL_IRQ_MASK) || (ELCDIF_AS_CTRL_IRQ_MASK & ELCDIF_AS_CTRL_IRQ_EN_MASK)) +#error Interrupt bits overlap, need to update the interrupt functions. +#endif + +/* LUT memory entery number. */ +#define ELCDIF_LUT_ENTRY_NUM 256 + +/*! + * @brief eLCDIF signal polarity flags + */ +enum _elcdif_polarity_flags +{ + kELCDIF_VsyncActiveLow = 0U, /*!< VSYNC active low. */ + kELCDIF_VsyncActiveHigh = LCDIF_VDCTRL0_VSYNC_POL_MASK, /*!< VSYNC active high. */ + kELCDIF_HsyncActiveLow = 0U, /*!< HSYNC active low. */ + kELCDIF_HsyncActiveHigh = LCDIF_VDCTRL0_HSYNC_POL_MASK, /*!< HSYNC active high. */ + kELCDIF_DataEnableActiveLow = 0U, /*!< Data enable line active low. */ + kELCDIF_DataEnableActiveHigh = LCDIF_VDCTRL0_ENABLE_POL_MASK, /*!< Data enable line active high. */ + kELCDIF_DriveDataOnFallingClkEdge = 0U, /*!< Drive data on falling clock edge, capture data + on rising clock edge. */ + kELCDIF_DriveDataOnRisingClkEdge = LCDIF_VDCTRL0_DOTCLK_POL_MASK, /*!< Drive data on falling + clock edge, capture data + on rising clock edge. */ +}; + +/*! + * @brief The eLCDIF interrupts to enable. + */ +enum _elcdif_interrupt_enable +{ + kELCDIF_BusMasterErrorInterruptEnable = LCDIF_CTRL1_BM_ERROR_IRQ_EN_MASK, /*!< Bus master error interrupt. */ + kELCDIF_TxFifoOverflowInterruptEnable = LCDIF_CTRL1_OVERFLOW_IRQ_EN_MASK, /*!< TXFIFO overflow interrupt. */ + kELCDIF_TxFifoUnderflowInterruptEnable = LCDIF_CTRL1_UNDERFLOW_IRQ_EN_MASK, /*!< TXFIFO underflow interrupt. */ + kELCDIF_CurFrameDoneInterruptEnable = + LCDIF_CTRL1_CUR_FRAME_DONE_IRQ_EN_MASK, /*!< Interrupt when hardware enters vertical blanking state. */ + kELCDIF_VsyncEdgeInterruptEnable = + LCDIF_CTRL1_VSYNC_EDGE_IRQ_EN_MASK, /*!< Interrupt when hardware encounters VSYNC edge. */ +#if defined(LCDIF_AS_CTRL_CSI_SYNC_ON_IRQ_EN_MASK) + kELCDIF_SciSyncOnInterruptEnable = + LCDIF_AS_CTRL_CSI_SYNC_ON_IRQ_EN_MASK, /*!< Interrupt when eLCDIF lock with CSI input. */ +#endif +}; + +/*! + * @brief The eLCDIF interrupt status flags. + */ +enum _elcdif_interrupt_flags +{ + kELCDIF_BusMasterError = LCDIF_CTRL1_BM_ERROR_IRQ_MASK, /*!< Bus master error interrupt. */ + kELCDIF_TxFifoOverflow = LCDIF_CTRL1_OVERFLOW_IRQ_MASK, /*!< TXFIFO overflow interrupt. */ + kELCDIF_TxFifoUnderflow = LCDIF_CTRL1_UNDERFLOW_IRQ_MASK, /*!< TXFIFO underflow interrupt. */ + kELCDIF_CurFrameDone = + LCDIF_CTRL1_CUR_FRAME_DONE_IRQ_MASK, /*!< Interrupt when hardware enters vertical blanking state. */ + kELCDIF_VsyncEdge = LCDIF_CTRL1_VSYNC_EDGE_IRQ_MASK, /*!< Interrupt when hardware encounters VSYNC edge. */ +#if defined(LCDIF_AS_CTRL_CSI_SYNC_ON_IRQ_MASK) + kELCDIF_SciSyncOn = LCDIF_AS_CTRL_CSI_SYNC_ON_IRQ_MASK, /*!< Interrupt when eLCDIF lock with CSI input. */ +#endif +}; + +/*! + * @brief eLCDIF status flags + */ +enum _elcdif_status_flags +{ + kELCDIF_LFifoFull = LCDIF_STAT_LFIFO_FULL_MASK, /*!< LFIFO full. */ + kELCDIF_LFifoEmpty = LCDIF_STAT_LFIFO_EMPTY_MASK, /*!< LFIFO empty. */ + kELCDIF_TxFifoFull = LCDIF_STAT_TXFIFO_FULL_MASK, /*!< TXFIFO full. */ + kELCDIF_TxFifoEmpty = LCDIF_STAT_TXFIFO_EMPTY_MASK, /*!< TXFIFO empty. */ +#if defined(LCDIF_STAT_BUSY_MASK) + kELCDIF_LcdControllerBusy = LCDIF_STAT_BUSY_MASK, /*!< The external LCD controller busy signal. */ +#endif +#if defined(LCDIF_STAT_DVI_CURRENT_FIELD_MASK) + kELCDIF_CurDviField2 = LCDIF_STAT_DVI_CURRENT_FIELD_MASK, /*!< Current DVI filed, if set, then current filed is 2, + otherwise current filed is 1. */ +#endif +}; + +/*! + * @brief The pixel format. + * + * This enumerator should be defined together with the array s_pixelFormatReg. + * To support new pixel format, enhance this enumerator and s_pixelFormatReg. + */ +typedef enum _elcdif_pixel_format +{ + kELCDIF_PixelFormatRAW8 = 0, /*!< RAW 8 bit, four data use 32 bits. */ + kELCDIF_PixelFormatRGB565 = 1, /*!< RGB565, two pixel use 32 bits. */ + kELCDIF_PixelFormatRGB666 = 2, /*!< RGB666 unpacked, one pixel uses 32 bits, high byte unused, + upper 2 bits of other bytes unused. */ + kELCDIF_PixelFormatXRGB8888 = 3, /*!< XRGB8888 unpacked, one pixel uses 32 bits, high byte unused. */ + kELCDIF_PixelFormatRGB888 = 4, /*!< RGB888 packed, one pixel uses 24 bits. */ +} elcdif_pixel_format_t; + +/*! @brief The LCD data bus type. */ +typedef enum _elcdif_lcd_data_bus +{ + kELCDIF_DataBus8Bit = LCDIF_CTRL_LCD_DATABUS_WIDTH(1), /*!< 8-bit data bus. */ + kELCDIF_DataBus16Bit = LCDIF_CTRL_LCD_DATABUS_WIDTH(0), /*!< 16-bit data bus, support RGB565. */ + kELCDIF_DataBus18Bit = LCDIF_CTRL_LCD_DATABUS_WIDTH(2), /*!< 18-bit data bus, support RGB666. */ + kELCDIF_DataBus24Bit = LCDIF_CTRL_LCD_DATABUS_WIDTH(3), /*!< 24-bit data bus, support RGB888. */ +} elcdif_lcd_data_bus_t; + +/*! + * @brief The register value when using different pixel format. + * + * These register bits control the pixel format: + * - CTRL[DATA_FORMAT_24_BIT] + * - CTRL[DATA_FORMAT_18_BIT] + * - CTRL[DATA_FORMAT_16_BIT] + * - CTRL[WORD_LENGTH] + * - CTRL1[BYTE_PACKING_FORMAT] + */ +typedef struct _elcdif_pixel_format_reg +{ + uint32_t regCtrl; /*!< Value of register CTRL. */ + uint32_t regCtrl1; /*!< Value of register CTRL1. */ +} elcdif_pixel_format_reg_t; + +/*! + * @brief eLCDIF configure structure for RGB mode (DOTCLK mode). + */ +typedef struct _elcdif_rgb_mode_config +{ + uint16_t panelWidth; /*!< Display panel width, pixels per line. */ + uint16_t panelHeight; /*!< Display panel height, how many lines per panel. */ + uint8_t hsw; /*!< HSYNC pulse width. */ + uint8_t hfp; /*!< Horizontal front porch. */ + uint8_t hbp; /*!< Horizontal back porch. */ + uint8_t vsw; /*!< VSYNC pulse width. */ + uint8_t vfp; /*!< Vrtical front porch. */ + uint8_t vbp; /*!< Vertical back porch. */ + uint32_t polarityFlags; /*!< OR'ed value of @ref _elcdif_polarity_flags, used to contol the signal polarity. */ + uint32_t bufferAddr; /*!< Frame buffer address. */ + elcdif_pixel_format_t pixelFormat; /*!< Pixel format. */ + elcdif_lcd_data_bus_t dataBus; /*!< LCD data bus. */ +} elcdif_rgb_mode_config_t; + +/*! + * @brief eLCDIF alpha surface pixel format. + */ +typedef enum _elcdif_as_pixel_format +{ + kELCDIF_AsPixelFormatARGB8888 = 0x0, /*!< 32-bit pixels with alpha. */ + kELCDIF_AsPixelFormatRGB888 = 0x4, /*!< 32-bit pixels without alpha (unpacked 24-bit format) */ + kELCDIF_AsPixelFormatARGB1555 = 0x8, /*!< 16-bit pixels with alpha. */ + kELCDIF_AsPixelFormatARGB4444 = 0x9, /*!< 16-bit pixels with alpha. */ + kELCDIF_AsPixelFormatRGB555 = 0xC, /*!< 16-bit pixels without alpha. */ + kELCDIF_AsPixelFormatRGB444 = 0xD, /*!< 16-bit pixels without alpha. */ + kELCDIF_AsPixelFormatRGB565 = 0xE, /*!< 16-bit pixels without alpha. */ +} elcdif_as_pixel_format_t; + +/*! + * @brief eLCDIF alpha surface buffer configuration. + */ +typedef struct _elcdif_as_buffer_config +{ + uint32_t bufferAddr; /*!< Buffer address. */ + elcdif_as_pixel_format_t pixelFormat; /*!< Pixel format. */ +} elcdif_as_buffer_config_t; + +/*! + * @brief eLCDIF alpha mode during blending. + */ +typedef enum _elcdif_alpha_mode +{ + kELCDIF_AlphaEmbedded, /*!< The alpha surface pixel alpha value will be used for blend. */ + kELCDIF_AlphaOverride, /*!< The user defined alpha value will be used for blend directly. */ + kELCDIF_AlphaMultiply, /*!< The alpha surface pixel alpha value scaled the user defined + alpha value will be used for blend, for example, pixel alpha set + set to 200, user defined alpha set to 100, then the reault alpha + is 200 * 100 / 255. */ + kELCDIF_AlphaRop /*!< Raster operation. */ +} elcdif_alpha_mode_t; + +/*! + * @brief eLCDIF ROP mode during blending. + * + * Explanation: + * - AS: Alpha surface + * - PS: Process surface + * - nAS: Alpha surface NOT value + * - nPS: Process surface NOT value + */ +typedef enum _elcdif_rop_mode +{ + kELCDIF_RopMaskAs = 0x0, /*!< AS AND PS. */ + kELCDIF_RopMaskNotAs = 0x1, /*!< nAS AND PS. */ + kELCDIF_RopMaskAsNot = 0x2, /*!< AS AND nPS. */ + kELCDIF_RopMergeAs = 0x3, /*!< AS OR PS. */ + kELCDIF_RopMergeNotAs = 0x4, /*!< nAS OR PS. */ + kELCDIF_RopMergeAsNot = 0x5, /*!< AS OR nPS. */ + kELCDIF_RopNotCopyAs = 0x6, /*!< nAS. */ + kELCDIF_RopNot = 0x7, /*!< nPS. */ + kELCDIF_RopNotMaskAs = 0x8, /*!< AS NAND PS. */ + kELCDIF_RopNotMergeAs = 0x9, /*!< AS NOR PS. */ + kELCDIF_RopXorAs = 0xA, /*!< AS XOR PS. */ + kELCDIF_RopNotXorAs = 0xB /*!< AS XNOR PS. */ +} elcdif_rop_mode_t; + +/*! + * @brief eLCDIF alpha surface blending configuration. + */ +typedef struct _elcdif_as_blend_config +{ + uint8_t alpha; /*!< User defined alpha value, only used when @ref alphaMode is @ref kELCDIF_AlphaOverride or @ref + kELCDIF_AlphaRop. */ + bool invertAlpha; /*!< Set true to invert the alpha. */ + elcdif_alpha_mode_t alphaMode; /*!< Alpha mode. */ + elcdif_rop_mode_t ropMode; /*!< ROP mode, only valid when @ref alphaMode is @ref kELCDIF_AlphaRop. */ +} elcdif_as_blend_config_t; + +/*! + * @brief eLCDIF LUT + * + * The Lookup Table (LUT) is used to expand the 8 bits pixel to 24 bits pixel + * before output to external displayer. + * + * There are two 256x24 bits LUT memory in LCDIF, the LSB of frame buffer address + * determins which memory to use. + */ +typedef enum _elcdif_lut +{ + kELCDIF_Lut0 = 0, /*!< LUT 0. */ + kELCDIF_Lut1, /*!< LUT 1. */ +} elcdif_lut_t; + +/******************************************************************************* + * APIs + ******************************************************************************/ + +#if defined(__cplusplus) +extern "C" { +#endif /* __cplusplus */ + +/*! + * @name eLCDIF initialization and de-initialization + * @{ + */ + +/*! + * @brief Initializes the eLCDIF to work in RGB mode (DOTCLK mode). + * + * This function ungates the eLCDIF clock and configures the eLCDIF peripheral according + * to the configuration structure. + * + * @param base eLCDIF peripheral base address. + * @param config Pointer to the configuration structure. + */ +void ELCDIF_RgbModeInit(LCDIF_Type *base, const elcdif_rgb_mode_config_t *config); + +/*! + * @brief Gets the eLCDIF default configuration structure for RGB (DOTCLK) mode. + * + * This function sets the configuration structure to default values. + * The default configuration is set to the following values. + * @code + config->panelWidth = 480U; + config->panelHeight = 272U; + config->hsw = 41; + config->hfp = 4; + config->hbp = 8; + config->vsw = 10; + config->vfp = 4; + config->vbp = 2; + config->polarityFlags = kELCDIF_VsyncActiveLow | + kELCDIF_HsyncActiveLow | + kELCDIF_DataEnableActiveLow | + kELCDIF_DriveDataOnFallingClkEdge; + config->bufferAddr = 0U; + config->pixelFormat = kELCDIF_PixelFormatRGB888; + config->dataBus = kELCDIF_DataBus24Bit; + @code + * + * @param config Pointer to the eLCDIF configuration structure. + */ +void ELCDIF_RgbModeGetDefaultConfig(elcdif_rgb_mode_config_t *config); + +/*! + * @brief Deinitializes the eLCDIF peripheral. + * + * @param base eLCDIF peripheral base address. + */ +void ELCDIF_Deinit(LCDIF_Type *base); + +/* @} */ + +/*! + * @name Module operation + * @{ + */ + +/*! + * @brief Set the pixel format in RGB (DOTCLK) mode. + * + * @param base eLCDIF peripheral base address. + * @param pixelFormat The pixel format. + */ +void ELCDIF_RgbModeSetPixelFormat(LCDIF_Type *base, elcdif_pixel_format_t pixelFormat); + +/*! + * @brief Start to display in RGB (DOTCLK) mode. + * + * @param base eLCDIF peripheral base address. + */ +static inline void ELCDIF_RgbModeStart(LCDIF_Type *base) +{ + base->CTRL_SET = LCDIF_CTRL_RUN_MASK | LCDIF_CTRL_DOTCLK_MODE_MASK; +} + +/*! + * @brief Stop display in RGB (DOTCLK) mode and wait until finished. + * + * @param base eLCDIF peripheral base address. + */ +void ELCDIF_RgbModeStop(LCDIF_Type *base); + +/*! + * @brief Set the next frame buffer address to display. + * + * @param base eLCDIF peripheral base address. + * @param bufferAddr The frame buffer address to set. + */ +static inline void ELCDIF_SetNextBufferAddr(LCDIF_Type *base, uint32_t bufferAddr) +{ + base->NEXT_BUF = bufferAddr; +} + +/*! + * @brief Reset the eLCDIF peripheral. + * + * @param base eLCDIF peripheral base address. + */ +void ELCDIF_Reset(LCDIF_Type *base); + +#if !(defined(FSL_FEATURE_LCDIF_HAS_NO_RESET_PIN) && FSL_FEATURE_LCDIF_HAS_NO_RESET_PIN) +/*! + * @brief Pull up or down the reset pin for the externel LCD controller. + * + * @param base eLCDIF peripheral base address. + * @param pullUp True to pull up reset pin, false to pull down. + */ +static inline void ELCDIF_PullUpResetPin(LCDIF_Type *base, bool pullUp) +{ + if (pullUp) + { + base->CTRL1_SET = LCDIF_CTRL1_RESET_MASK; + } + else + { + base->CTRL1_CLR = LCDIF_CTRL1_RESET_MASK; + } +} +#endif + +/*! + * @brief Enable or disable the hand shake with PXP. + * + * @param base eLCDIF peripheral base address. + * @param enable True to enable, false to disable. + */ +static inline void ELCDIF_EnablePxpHandShake(LCDIF_Type *base, bool enable) +{ + if (enable) + { + base->CTRL_SET = LCDIF_CTRL_ENABLE_PXP_HANDSHAKE_MASK; + } + else + { + base->CTRL_CLR = LCDIF_CTRL_ENABLE_PXP_HANDSHAKE_MASK; + } +} + +/* @} */ + +/*! + * @name Status + * @{ + */ + +/*! + * @brief Get the CRC value of the frame sent out. + * + * When a frame is sent complete (the interrupt @ref kELCDIF_CurFrameDone assert), this function + * can be used to get the CRC value of the frame sent. + * + * @param base eLCDIF peripheral base address. + * @return The CRC value. + * + * @note The CRC value is dependent on the LCD_DATABUS_WIDTH. + */ +static inline uint32_t ELCDIF_GetCrcValue(LCDIF_Type *base) +{ + return base->CRC_STAT; +} + +/*! + * @brief Get the bus master error virtual address. + * + * When bus master error occurs (the interrupt kELCDIF_BusMasterError assert), this function + * can get the virtual address at which the AXI master received an error + * response from the slave. + * + * @param base eLCDIF peripheral base address. + * @return The error virtual address. + */ +static inline uint32_t ELCDIF_GetBusMasterErrorAddr(LCDIF_Type *base) +{ + return base->BM_ERROR_STAT; +} + +/*! + * @brief Get the eLCDIF status. + * + * The status flags are returned as a mask value, application could check the + * corresponding bit. Example: + * + * @code + uint32_t statusFlags; + statusFlags = ELCDIF_GetStatus(LCDIF); + + // If LFIFO is full. + if (kELCDIF_LFifoFull & statusFlags) + { + // ...; + } + // If TXFIFO is empty. + if (kELCDIF_TxFifoEmpty & statusFlags) + { + // ...; + } + @endcode + * + * @param base eLCDIF peripheral base address. + * @return The mask value of status flags, it is OR'ed value of @ref _elcdif_status_flags. + */ +static inline uint32_t ELCDIF_GetStatus(LCDIF_Type *base) +{ + return base->STAT & (LCDIF_STAT_LFIFO_FULL_MASK | LCDIF_STAT_LFIFO_EMPTY_MASK | LCDIF_STAT_TXFIFO_FULL_MASK | + LCDIF_STAT_TXFIFO_EMPTY_MASK +#if defined(LCDIF_STAT_BUSY_MASK) + | LCDIF_STAT_BUSY_MASK +#endif +#if defined(LCDIF_STAT_DVI_CURRENT_FIELD_MASK) + | LCDIF_STAT_DVI_CURRENT_FIELD_MASK +#endif + ); +} + +/*! + * @brief Get current count in Latency buffer (LFIFO). + * + * @param base eLCDIF peripheral base address. + * @return The LFIFO current count + */ +static inline uint32_t ELCDIF_GetLFifoCount(LCDIF_Type *base) +{ + return (base->STAT & LCDIF_STAT_LFIFO_COUNT_MASK) >> LCDIF_STAT_LFIFO_COUNT_SHIFT; +} + +/* @} */ + +/*! + * @name Interrupts + * @{ + */ + +/*! + * @brief Enables eLCDIF interrupt requests. + * + * @param base eLCDIF peripheral base address. + * @param mask interrupt source, OR'ed value of _elcdif_interrupt_enable. + */ +static inline void ELCDIF_EnableInterrupts(LCDIF_Type *base, uint32_t mask) +{ + base->CTRL1_SET = (mask & ELCDIF_CTRL1_IRQ_EN_MASK); +#if !(defined(FSL_FEATURE_LCDIF_HAS_NO_AS) && FSL_FEATURE_LCDIF_HAS_NO_AS) + base->AS_CTRL |= (mask & ELCDIF_AS_CTRL_IRQ_EN_MASK); +#endif +} + +/*! + * @brief Disables eLCDIF interrupt requests. + * + * @param base eLCDIF peripheral base address. + * @param mask interrupt source, OR'ed value of _elcdif_interrupt_enable. + */ +static inline void ELCDIF_DisableInterrupts(LCDIF_Type *base, uint32_t mask) +{ + base->CTRL1_CLR = (mask & ELCDIF_CTRL1_IRQ_EN_MASK); +#if !(defined(FSL_FEATURE_LCDIF_HAS_NO_AS) && FSL_FEATURE_LCDIF_HAS_NO_AS) + base->AS_CTRL &= ~(mask & ELCDIF_AS_CTRL_IRQ_EN_MASK); +#endif +} + +/*! + * @brief Get eLCDIF interrupt peding status. + * + * @param base eLCDIF peripheral base address. + * @return Interrupt pending status, OR'ed value of _elcdif_interrupt_flags. + */ +static inline uint32_t ELCDIF_GetInterruptStatus(LCDIF_Type *base) +{ + uint32_t flags; + + flags = (base->CTRL1 & ELCDIF_CTRL1_IRQ_MASK); +#if !(defined(FSL_FEATURE_LCDIF_HAS_NO_AS) && FSL_FEATURE_LCDIF_HAS_NO_AS) + flags |= (base->AS_CTRL & ELCDIF_AS_CTRL_IRQ_MASK); +#endif + + return flags; +} + +/*! + * @brief Clear eLCDIF interrupt peding status. + * + * @param base eLCDIF peripheral base address. + * @param mask of the flags to clear, OR'ed value of _elcdif_interrupt_flags. + */ +static inline void ELCDIF_ClearInterruptStatus(LCDIF_Type *base, uint32_t mask) +{ + base->CTRL1_CLR = (mask & ELCDIF_CTRL1_IRQ_MASK); +#if !(defined(FSL_FEATURE_LCDIF_HAS_NO_AS) && FSL_FEATURE_LCDIF_HAS_NO_AS) + base->AS_CTRL &= ~(mask & ELCDIF_AS_CTRL_IRQ_MASK); +#endif +} + +/* @} */ + +#if !(defined(FSL_FEATURE_LCDIF_HAS_NO_AS) && FSL_FEATURE_LCDIF_HAS_NO_AS) +/*! + * @name Alpha surface + * @{ + */ + +/*! + * @brief Set the configuration for alpha surface buffer. + * + * @param base eLCDIF peripheral base address. + * @param config Pointer to the configuration structure. + */ +void ELCDIF_SetAlphaSurfaceBufferConfig(LCDIF_Type *base, const elcdif_as_buffer_config_t *config); + +/*! + * @brief Set the alpha surface blending configuration. + * + * @param base eLCDIF peripheral base address. + * @param config Pointer to the configuration structure. + */ +void ELCDIF_SetAlphaSurfaceBlendConfig(LCDIF_Type *base, const elcdif_as_blend_config_t *config); + +/*! + * @brief Set the next alpha surface buffer address. + * + * @param base eLCDIF peripheral base address. + * @param bufferAddr Alpha surface buffer address. + */ +static inline void ELCDIF_SetNextAlphaSurfaceBufferAddr(LCDIF_Type *base, uint32_t bufferAddr) +{ + base->AS_NEXT_BUF = bufferAddr; +} + +/*! + * @brief Set the overlay color key. + * + * If a pixel in the current overlay image with a color that falls in the range + * from the @p colorKeyLow to @p colorKeyHigh range, it will use the process surface + * pixel value for that location. + * + * @param base eLCDIF peripheral base address. + * @param colorKeyLow Color key low range. + * @param colorKeyHigh Color key high range. + * + * @note Colorkey operations are higher priority than alpha or ROP operations + */ +static inline void ELCDIF_SetOverlayColorKey(LCDIF_Type *base, uint32_t colorKeyLow, uint32_t colorKeyHigh) +{ + base->AS_CLRKEYLOW = colorKeyLow; + base->AS_CLRKEYHIGH = colorKeyHigh; +} + +/*! + * @brief Enable or disable the color key. + * + * @param base eLCDIF peripheral base address. + * @param enable True to enable, false to disable. + */ +static inline void ELCDIF_EnableOverlayColorKey(LCDIF_Type *base, bool enable) +{ + if (enable) + { + base->AS_CTRL |= LCDIF_AS_CTRL_ENABLE_COLORKEY_MASK; + } + else + { + base->AS_CTRL &= ~LCDIF_AS_CTRL_ENABLE_COLORKEY_MASK; + } +} + +/*! + * @brief Enable or disable the alpha surface. + * + * @param base eLCDIF peripheral base address. + * @param enable True to enable, false to disable. + */ +static inline void ELCDIF_EnableAlphaSurface(LCDIF_Type *base, bool enable) +{ + if (enable) + { + base->AS_CTRL |= LCDIF_AS_CTRL_AS_ENABLE_MASK; + } + else + { + base->AS_CTRL &= ~LCDIF_AS_CTRL_AS_ENABLE_MASK; + } +} + +/*! + * @brief Enable or disable the process surface. + * + * Process surface is the normal frame buffer. The process surface content + * is controlled by @ref ELCDIF_SetNextBufferAddr. + * + * @param base eLCDIF peripheral base address. + * @param enable True to enable, false to disable. + */ +static inline void ELCDIF_EnableProcessSurface(LCDIF_Type *base, bool enable) +{ + if (enable) + { + base->AS_CTRL &= ~LCDIF_AS_CTRL_PS_DISABLE_MASK; + } + else + { + base->AS_CTRL |= LCDIF_AS_CTRL_PS_DISABLE_MASK; + } +} + +/* @} */ +#endif /* FSL_FEATURE_LCDIF_HAS_NO_AS */ + +#if (defined(FSL_FEATURE_LCDIF_HAS_LUT) && FSL_FEATURE_LCDIF_HAS_LUT) +/*! + * @name LUT + * + * The Lookup Table (LUT) is used to expand the 8 bits pixel to 24 bits pixel + * before output to external displayer. + * + * There are two 256x24 bits LUT memory in LCDIF, the LSB of frame buffer address + * determins which memory to use. + * + * @{ + */ + +/*! + * @brief Enable or disable the LUT. + * + * @param base eLCDIF peripheral base address. + * @param enable True to enable, false to disable. + */ +static inline void ELCDIF_EnableLut(LCDIF_Type *base, bool enable) +{ + if (enable) + { + base->LUT_CTRL &= ~LCDIF_LUT_CTRL_LUT_BYPASS_MASK; + } + else + { + base->LUT_CTRL |= LCDIF_LUT_CTRL_LUT_BYPASS_MASK; + } +} + +/*! + * @brief Load the LUT value. + * + * This function loads the LUT value to the specific LUT memory, user can + * specify the start entry index. + * + * @param base eLCDIF peripheral base address. + * @param lut Which LUT to load. + * @param startIndex The start index of the LUT entry to update. + * @param lutData The LUT data to load. + * @param count Count of @p lutData. + * @retval kStatus_Success Initialization success. + * @retval kStatus_InvalidArgument Wrong argument. + */ +status_t ELCDIF_UpdateLut( + LCDIF_Type *base, elcdif_lut_t lut, uint16_t startIndex, const uint32_t *lutData, uint16_t count); + +/* @} */ +#endif /* FSL_FEATURE_LCDIF_HAS_LUT */ + +#if defined(__cplusplus) +} +#endif /* __cplusplus */ + +/* @} */ + +#endif /*_FSL_ELCDIF_H_*/ diff --git a/Ubiquitous/XiZi/board/xidatong/third_party_driver/lcd/Kconfig b/Ubiquitous/XiZi/board/xidatong/third_party_driver/lcd/Kconfig new file mode 100644 index 000000000..3bb8c7daf --- /dev/null +++ b/Ubiquitous/XiZi/board/xidatong/third_party_driver/lcd/Kconfig @@ -0,0 +1,21 @@ +if BSP_USING_LCD + config LCD_BUS_NAME + string "lcd bus name" + default "lcd" + config LCD_DRV_NAME + string "lcd bus driver name" + default "lcd_drv" + config LCD_DEVICE_NAME + string "lcd bus device name" + default "lcd_dev" + config LCD_BL_GPIO_PIN + int "BackLight pin number of rgb565 interface" + default 31 + config BSP_LCD_X_MAX + int "LCD Height" + default 272 + config BSP_LCD_Y_MAX + int "LCD Width" + default 480 + +endif diff --git a/Ubiquitous/XiZi/board/xidatong/third_party_driver/lcd/Makefile b/Ubiquitous/XiZi/board/xidatong/third_party_driver/lcd/Makefile new file mode 100644 index 000000000..55d4b3486 --- /dev/null +++ b/Ubiquitous/XiZi/board/xidatong/third_party_driver/lcd/Makefile @@ -0,0 +1,4 @@ +SRC_FILES := connect_lcd.c fsl_elcdif.c + + +include $(KERNEL_ROOT)/compiler.mk diff --git a/Ubiquitous/XiZi/board/xidatong/third_party_driver/lcd/connect_lcd.c b/Ubiquitous/XiZi/board/xidatong/third_party_driver/lcd/connect_lcd.c new file mode 100644 index 000000000..8095c4c5d --- /dev/null +++ b/Ubiquitous/XiZi/board/xidatong/third_party_driver/lcd/connect_lcd.c @@ -0,0 +1,255 @@ +/** +* @file connect_lcd.c +* @brief support aiit-arm32-board lcd function and register to bus framework +* @version 2.0 +* @author AIIT XiUOS Lab +* @date 2022-04-25 +*/ + +#include +#include "fsl_common.h" +#include "fsl_iomuxc.h" +#include "fsl_elcdif.h" +#include "fsl_gpio.h" + +/* Back light. */ +#define LCD_BL_GPIO GPIO2 +#define LCD_HSW 41 +#define LCD_HFP 8 +#define LCD_HBP 8 +#define LCD_VSW 10 +#define LCD_VFP 4 +#define LCD_VBP 2 + +#define LCD_HEIGHT BSP_LCD_X_MAX +#define LCD_WIDTH BSP_LCD_Y_MAX + + +static uint16_t frame_buffer[LCD_HEIGHT][LCD_WIDTH] SECTION("NonCacheable.init"); +static void InitLcdifPixelClock(void) +{ + /* + * The desired output frame rate is 60Hz. So the pixel clock frequency is: + * (480 + 41 + 4 + 18) * (272 + 10 + 4 + 2) * 60 = 9.2M. + * Here set the LCDIF pixel clock to 9.3M. + */ + + /* + * Initialize the Video PLL. + * Video PLL output clock is OSC24M * (loopDivider + (denominator / numerator)) / postDivider = 93MHz. + */ + clock_video_pll_config_t pll_config; + + pll_config.loopDivider = 31; + pll_config.postDivider = 8; + pll_config.numerator = 0; + pll_config.denominator = 0; + + CLOCK_InitVideoPll(&pll_config); + /* + * 000 derive clock from PLL2 + * 001 derive clock from PLL3 PFD3 + * 010 derive clock from PLL5 + * 011 derive clock from PLL2 PFD0 + * 100 derive clock from PLL2 PFD1 + * 101 derive clock from PLL3 PFD1 + */ + CLOCK_SetMux(kCLOCK_LcdifPreMux, 2); + + CLOCK_SetDiv(kCLOCK_LcdifPreDiv, 4); + + CLOCK_SetDiv(kCLOCK_LcdifDiv, 1); +} +static void InitLcdBacklight(uint8_t level) +{ + gpio_pin_config_t config = { + kGPIO_DigitalOutput, + 0, + }; + + /* Backlight. */ + config.outputLogic = level; + GPIO_PinInit(LCD_BL_GPIO, LCD_BL_GPIO_PIN, &config); +} + +static void ELCDFramebuffSet(void) +{ + /* LCD */ + elcdif_rgb_mode_config_t lcd_config; + + lcd_config.panelWidth = LCD_WIDTH; + lcd_config.panelHeight = LCD_HEIGHT; + lcd_config.hsw = LCD_HSW; + lcd_config.hfp = LCD_HFP; + lcd_config.hbp = LCD_HBP; + lcd_config.vsw = LCD_VSW; + lcd_config.vfp = LCD_VFP; + lcd_config.vbp = LCD_VBP; + + lcd_config.polarityFlags = kELCDIF_DataEnableActiveHigh | + kELCDIF_VsyncActiveLow | + kELCDIF_HsyncActiveLow | + kELCDIF_DriveDataOnRisingClkEdge; + + lcd_config.bufferAddr = (uint32_t)frame_buffer; + lcd_config.pixelFormat = kELCDIF_PixelFormatRGB565; + lcd_config.dataBus = kELCDIF_DataBus16Bit; + + ELCDIF_RgbModeInit (LCDIF, &lcd_config); +} + +static void HwLcdInit() +{ + memset(frame_buffer, 0, sizeof(frame_buffer)); + + /*step1： config PLL clock */ + InitLcdifPixelClock(); + + /*step2: config backlight gpio*/ + InitLcdBacklight(GPIO_HIGH); + + /*step3: fill framebuff*/ + ELCDFramebuffSet(); + + ELCDIF_RgbModeStart(LCDIF); + + // /* LCD DEVICE */ + // xidatong_lcd.lcd_info.width = LCD_WIDTH; + // xidatong_lcd.lcd_info.height = LCD_HEIGHT; + // xidatong_lcd.lcd_info.pixel_format = PIXEL_FORMAT_RGB565; + // xidatong_lcd.lcd_info.bits_per_pixel = 16; + // xidatong_lcd.lcd_info.framebuffer = (void *)frame_buffer; +} +static void DrvLcdSetPixelDot(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2, void* color) +{ + uint16_t i = 0; + uint16_t j = 0; + + for(i = y1; i <= y2; i++) { + for(j = x1; j <= x2; j++) { + frame_buffer[i][j] =(*(uint16_t*)color); + color += sizeof(uint16_t); + } + } + // ELCDIF_SetNextBufferAddr(LCDIF, (uint32_t)frame_buffer); +} + +static uint32 LcdWrite(void *dev, struct BusBlockWriteParam *write_param) +{ + x_err_t ret = EOK; + + if (write_param->buffer) + { + LcdWriteParam *show = (LcdWriteParam *)write_param->buffer; + //output string + if(0 == show->type) { + + } + //output dot + else if (1 == show->type) { + DrvLcdSetPixelDot(show->pixel_info.x_startpos,show->pixel_info.y_startpos, show->pixel_info.x_endpos, show->pixel_info.y_endpos,show->pixel_info.pixel_color); + } else { + KPrintf("LcdWrite donnot support show type(0 string; 1 dot) %u\n", show->type); + ret = -ERROR; + } + } + + return ret; +} + +static uint32 LcdControl(void* drv, struct BusConfigureInfo *configure_info) +{ + x_err_t ret = EOK; + + return ret; +} + +static const struct LcdDevDone dev_done = +{ + NONE, + NONE, + LcdWrite, + NONE, +}; + +static int BoardLcdBusInit(struct LcdBus * lcd_bus, struct LcdDriver * lcd_driver,const char *bus_name, const char *drv_name) +{ + x_err_t ret = EOK; + + /*Init the lcd bus */ + ret = LcdBusInit( lcd_bus, bus_name); + if (EOK != ret) { + KPrintf("Board_lcd_init LcdBusInit error %d\n", ret); + return -ERROR; + } + + /*Init the lcd driver*/ + ret = LcdDriverInit( lcd_driver, drv_name); + if (EOK != ret) { + KPrintf("Board_LCD_init LcdDriverInit error %d\n", ret); + return -ERROR; + } + + /*Attach the lcd driver to the lcd bus*/ + ret = LcdDriverAttachToBus(drv_name, bus_name); + if (EOK != ret) { + KPrintf("Board_LCD_init LcdDriverAttachToBus error %d\n", ret); + return -ERROR; + } + + return ret; +} + +/*Attach the lcd device to the lcd bus*/ +static int BoardLcdDevBend(struct LcdHardwareDevice *lcd_device, void *param, const char *bus_name, const char *dev_name) +{ + x_err_t ret = EOK; + + ret = LcdDeviceRegister(lcd_device, param, dev_name); + if (EOK != ret) { + KPrintf("Board_LCD_init LcdDeviceInit device %s error %d\n", dev_name, ret); + return -ERROR; + } + + ret = LcdDeviceAttachToBus(dev_name, bus_name); + if (EOK != ret) { + KPrintf("Board_LCD_init LcdDeviceAttachToBus device %s error %d\n", dev_name, ret); + return -ERROR; + } + + return ret; +} + +int Imxrt1052HwLcdInit(void) +{ + x_err_t ret = EOK; + + static struct LcdBus lcd_bus; + static struct LcdDriver lcd_drv; + static struct LcdHardwareDevice lcd_dev; + + memset(&lcd_bus, 0, sizeof(struct LcdBus)); + memset(&lcd_drv, 0, sizeof(struct LcdDriver)); + memset(&lcd_dev, 0, sizeof(struct LcdHardwareDevice)); + + + lcd_drv.configure = LcdControl; + + ret = BoardLcdBusInit(&lcd_bus, &lcd_drv, LCD_BUS_NAME, LCD_DRV_NAME); + if (EOK != ret) { + KPrintf("HwLcdInit BoardLcdBusInit error ret %u\n", ret); + return -ERROR; + } + + lcd_dev.dev_done = &dev_done; + + ret = BoardLcdDevBend(&lcd_dev, NONE, LCD_BUS_NAME, LCD_DEVICE_NAME); //init lcd device + if (EOK != ret) { + KPrintf("HwLcdInit BoardLcdDevBend error ret %u\n", ret); + return -ERROR; + } + + HwLcdInit(); + + return ret; +} diff --git a/Ubiquitous/XiZi/board/xidatong/third_party_driver/lcd/fsl_elcdif.c b/Ubiquitous/XiZi/board/xidatong/third_party_driver/lcd/fsl_elcdif.c new file mode 100644 index 000000000..110b6ea07 --- /dev/null +++ b/Ubiquitous/XiZi/board/xidatong/third_party_driver/lcd/fsl_elcdif.c @@ -0,0 +1,371 @@ +/* + * Copyright 2017 NXP + * All rights reserved. + * + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include "fsl_elcdif.h" + +/* Component ID definition, used by tools. */ +#ifndef FSL_COMPONENT_ID +#define FSL_COMPONENT_ID "platform.drivers.elcdif" +#endif + +/******************************************************************************* + * Prototypes + ******************************************************************************/ + +/*! + * @brief Get instance number for ELCDIF module. + * + * @param base ELCDIF peripheral base address + */ +static uint32_t ELCDIF_GetInstance(LCDIF_Type *base); + +/******************************************************************************* + * Variables + ******************************************************************************/ + +/*! @brief Pointers to ELCDIF bases for each instance. */ +static LCDIF_Type *const s_elcdifBases[] = LCDIF_BASE_PTRS; + +#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) +/*! @brief Pointers to eLCDIF apb_clk for each instance. */ +static const clock_ip_name_t s_elcdifApbClocks[] = LCDIF_CLOCKS; +#if defined(LCDIF_PERIPH_CLOCKS) +/*! @brief Pointers to eLCDIF pix_clk for each instance. */ +static const clock_ip_name_t s_elcdifPixClocks[] = LCDIF_PERIPH_CLOCKS; +#endif +#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */ + +/*! @brief The control register value to select different pixel format. */ +elcdif_pixel_format_reg_t s_pixelFormatReg[] = { + /* kELCDIF_PixelFormatRAW8 */ + {/* Register CTRL. */ + LCDIF_CTRL_WORD_LENGTH(1U), + /* Register CTRL1. */ + LCDIF_CTRL1_BYTE_PACKING_FORMAT(0x0FU)}, + /* kELCDIF_PixelFormatRGB565 */ + {/* Register CTRL. */ + LCDIF_CTRL_WORD_LENGTH(0U), + /* Register CTRL1. */ + LCDIF_CTRL1_BYTE_PACKING_FORMAT(0x0FU)}, + /* kELCDIF_PixelFormatRGB666 */ + {/* Register CTRL. */ + LCDIF_CTRL_WORD_LENGTH(3U) | LCDIF_CTRL_DATA_FORMAT_24_BIT(1U), + /* Register CTRL1. */ + LCDIF_CTRL1_BYTE_PACKING_FORMAT(0x07U)}, + /* kELCDIF_PixelFormatXRGB8888 */ + {/* Register CTRL. 24-bit. */ + LCDIF_CTRL_WORD_LENGTH(3U), + /* Register CTRL1. */ + LCDIF_CTRL1_BYTE_PACKING_FORMAT(0x07U)}, + /* kELCDIF_PixelFormatRGB888 */ + {/* Register CTRL. 24-bit. */ + LCDIF_CTRL_WORD_LENGTH(3U), + /* Register CTRL1. */ + LCDIF_CTRL1_BYTE_PACKING_FORMAT(0x0FU)}, +}; + +/******************************************************************************* + * Codes + ******************************************************************************/ +static uint32_t ELCDIF_GetInstance(LCDIF_Type *base) +{ + uint32_t instance; + + /* Find the instance index from base address mappings. */ + for (instance = 0; instance < ARRAY_SIZE(s_elcdifBases); instance++) + { + if (s_elcdifBases[instance] == base) + { + break; + } + } + + assert(instance < ARRAY_SIZE(s_elcdifBases)); + + return instance; +} + +/*! + * brief Initializes the eLCDIF to work in RGB mode (DOTCLK mode). + * + * This function ungates the eLCDIF clock and configures the eLCDIF peripheral according + * to the configuration structure. + * + * param base eLCDIF peripheral base address. + * param config Pointer to the configuration structure. + */ +void ELCDIF_RgbModeInit(LCDIF_Type *base, const elcdif_rgb_mode_config_t *config) +{ + assert(config); + assert(config->pixelFormat < ARRAY_SIZE(s_pixelFormatReg)); + +#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) + uint32_t instance = ELCDIF_GetInstance(base); + /* Enable the clock. */ + CLOCK_EnableClock(s_elcdifApbClocks[instance]); +#if defined(LCDIF_PERIPH_CLOCKS) + CLOCK_EnableClock(s_elcdifPixClocks[instance]); +#endif +#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */ + + /* Reset. */ + ELCDIF_Reset(base); + + base->CTRL = s_pixelFormatReg[(uint32_t)config->pixelFormat].regCtrl | (uint32_t)(config->dataBus) | + LCDIF_CTRL_DOTCLK_MODE_MASK | /* RGB mode. */ + LCDIF_CTRL_BYPASS_COUNT_MASK | /* Keep RUN bit set. */ + LCDIF_CTRL_MASTER_MASK; + + base->CTRL1 = s_pixelFormatReg[(uint32_t)config->pixelFormat].regCtrl1; + + base->TRANSFER_COUNT = ((uint32_t)config->panelHeight << LCDIF_TRANSFER_COUNT_V_COUNT_SHIFT) | + ((uint32_t)config->panelWidth << LCDIF_TRANSFER_COUNT_H_COUNT_SHIFT); + + base->VDCTRL0 = LCDIF_VDCTRL0_ENABLE_PRESENT_MASK | /* Data enable signal. */ + LCDIF_VDCTRL0_VSYNC_PERIOD_UNIT_MASK | /* VSYNC period in the unit of display clock. */ + LCDIF_VDCTRL0_VSYNC_PULSE_WIDTH_UNIT_MASK | /* VSYNC pulse width in the unit of display clock. */ + (uint32_t)config->polarityFlags | (uint32_t)config->vsw; + + base->VDCTRL1 = config->vsw + config->panelHeight + config->vfp + config->vbp; + base->VDCTRL2 = ((uint32_t)config->hsw << LCDIF_VDCTRL2_HSYNC_PULSE_WIDTH_SHIFT) | + ((uint32_t)(config->hfp + config->hbp + config->panelWidth + config->hsw)) + << LCDIF_VDCTRL2_HSYNC_PERIOD_SHIFT; + + base->VDCTRL3 = (((uint32_t)config->hbp + config->hsw) << LCDIF_VDCTRL3_HORIZONTAL_WAIT_CNT_SHIFT) | + (((uint32_t)config->vbp + config->vsw) << LCDIF_VDCTRL3_VERTICAL_WAIT_CNT_SHIFT); + + base->VDCTRL4 = LCDIF_VDCTRL4_SYNC_SIGNALS_ON_MASK | + ((uint32_t)config->panelWidth << LCDIF_VDCTRL4_DOTCLK_H_VALID_DATA_CNT_SHIFT); + + base->CUR_BUF = config->bufferAddr; + base->NEXT_BUF = config->bufferAddr; +} + +/*! + * brief Gets the eLCDIF default configuration structure for RGB (DOTCLK) mode. + * + * This function sets the configuration structure to default values. + * The default configuration is set to the following values. + * code + config->panelWidth = 480U; + config->panelHeight = 272U; + config->hsw = 41; + config->hfp = 4; + config->hbp = 8; + config->vsw = 10; + config->vfp = 4; + config->vbp = 2; + config->polarityFlags = kELCDIF_VsyncActiveLow | + kELCDIF_HsyncActiveLow | + kELCDIF_DataEnableActiveLow | + kELCDIF_DriveDataOnFallingClkEdge; + config->bufferAddr = 0U; + config->pixelFormat = kELCDIF_PixelFormatRGB888; + config->dataBus = kELCDIF_DataBus24Bit; + code + * + * param config Pointer to the eLCDIF configuration structure. + */ +void ELCDIF_RgbModeGetDefaultConfig(elcdif_rgb_mode_config_t *config) +{ + assert(config); + + /* Initializes the configure structure to zero. */ + memset(config, 0, sizeof(*config)); + + config->panelWidth = 480U; + config->panelHeight = 272U; + config->hsw = 41; + config->hfp = 4; + config->hbp = 8; + config->vsw = 10; + config->vfp = 4; + config->vbp = 2; + config->polarityFlags = kELCDIF_VsyncActiveLow | kELCDIF_HsyncActiveLow | kELCDIF_DataEnableActiveLow | + kELCDIF_DriveDataOnFallingClkEdge; + config->bufferAddr = 0U; + config->pixelFormat = kELCDIF_PixelFormatRGB888; + config->dataBus = kELCDIF_DataBus24Bit; +} + +/*! + * brief Set the pixel format in RGB (DOTCLK) mode. + * + * param base eLCDIF peripheral base address. + * param pixelFormat The pixel format. + */ +void ELCDIF_RgbModeSetPixelFormat(LCDIF_Type *base, elcdif_pixel_format_t pixelFormat) +{ + assert(pixelFormat < ARRAY_SIZE(s_pixelFormatReg)); + + base->CTRL = (base->CTRL & ~(LCDIF_CTRL_WORD_LENGTH_MASK | LCDIF_CTRL_DATA_FORMAT_24_BIT_MASK | + LCDIF_CTRL_DATA_FORMAT_18_BIT_MASK | LCDIF_CTRL_DATA_FORMAT_16_BIT_MASK)) | + s_pixelFormatReg[(uint32_t)pixelFormat].regCtrl; + + base->CTRL1 = s_pixelFormatReg[(uint32_t)pixelFormat].regCtrl1; +} + +/*! + * brief Deinitializes the eLCDIF peripheral. + * + * param base eLCDIF peripheral base address. + */ +void ELCDIF_Deinit(LCDIF_Type *base) +{ + ELCDIF_Reset(base); + +#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) + uint32_t instance = ELCDIF_GetInstance(base); +/* Disable the clock. */ +#if defined(LCDIF_PERIPH_CLOCKS) + CLOCK_DisableClock(s_elcdifPixClocks[instance]); +#endif + CLOCK_DisableClock(s_elcdifApbClocks[instance]); +#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */ +} + +/*! + * brief Stop display in RGB (DOTCLK) mode and wait until finished. + * + * param base eLCDIF peripheral base address. + */ +void ELCDIF_RgbModeStop(LCDIF_Type *base) +{ + base->CTRL_CLR = LCDIF_CTRL_DOTCLK_MODE_MASK; + + /* Wait for data transfer finished. */ + while (base->CTRL & LCDIF_CTRL_DOTCLK_MODE_MASK) + { + } +} + +/*! + * brief Reset the eLCDIF peripheral. + * + * param base eLCDIF peripheral base address. + */ +void ELCDIF_Reset(LCDIF_Type *base) +{ + volatile uint32_t i = 0x100; + + /* Disable the clock gate. */ + base->CTRL_CLR = LCDIF_CTRL_CLKGATE_MASK; + /* Confirm the clock gate is disabled. */ + while (base->CTRL & LCDIF_CTRL_CLKGATE_MASK) + { + } + + /* Reset the block. */ + base->CTRL_SET = LCDIF_CTRL_SFTRST_MASK; + /* Confirm the reset bit is set. */ + while (!(base->CTRL & LCDIF_CTRL_SFTRST_MASK)) + { + } + + /* Delay for the reset. */ + while (i--) + { + } + + /* Bring the module out of reset. */ + base->CTRL_CLR = LCDIF_CTRL_SFTRST_MASK; + /* Disable the clock gate. */ + base->CTRL_CLR = LCDIF_CTRL_CLKGATE_MASK; +} + +#if !(defined(FSL_FEATURE_LCDIF_HAS_NO_AS) && FSL_FEATURE_LCDIF_HAS_NO_AS) +/*! + * brief Set the configuration for alpha surface buffer. + * + * param base eLCDIF peripheral base address. + * param config Pointer to the configuration structure. + */ +void ELCDIF_SetAlphaSurfaceBufferConfig(LCDIF_Type *base, const elcdif_as_buffer_config_t *config) +{ + assert(config); + + base->AS_CTRL = (base->AS_CTRL & ~LCDIF_AS_CTRL_FORMAT_MASK) | LCDIF_AS_CTRL_FORMAT(config->pixelFormat); + base->AS_BUF = config->bufferAddr; + base->AS_NEXT_BUF = config->bufferAddr; +} + +/*! + * brief Set the alpha surface blending configuration. + * + * param base eLCDIF peripheral base address. + * param config Pointer to the configuration structure. + */ +void ELCDIF_SetAlphaSurfaceBlendConfig(LCDIF_Type *base, const elcdif_as_blend_config_t *config) +{ + assert(config); + uint32_t reg; + + reg = base->AS_CTRL; + reg &= ~(LCDIF_AS_CTRL_ALPHA_INVERT_MASK | LCDIF_AS_CTRL_ROP_MASK | LCDIF_AS_CTRL_ALPHA_MASK | + LCDIF_AS_CTRL_ALPHA_CTRL_MASK); + reg |= (LCDIF_AS_CTRL_ROP(config->ropMode) | LCDIF_AS_CTRL_ALPHA(config->alpha) | + LCDIF_AS_CTRL_ALPHA_CTRL(config->alphaMode)); + + if (config->invertAlpha) + { + reg |= LCDIF_AS_CTRL_ALPHA_INVERT_MASK; + } + + base->AS_CTRL = reg; +} +#endif /* FSL_FEATURE_LCDIF_HAS_NO_AS */ + +#if (defined(FSL_FEATURE_LCDIF_HAS_LUT) && FSL_FEATURE_LCDIF_HAS_LUT) +/*! + * brief Load the LUT value. + * + * This function loads the LUT value to the specific LUT memory, user can + * specify the start entry index. + * + * param base eLCDIF peripheral base address. + * param lut Which LUT to load. + * param startIndex The start index of the LUT entry to update. + * param lutData The LUT data to load. + * param count Count of p lutData. + * retval kStatus_Success Initialization success. + * retval kStatus_InvalidArgument Wrong argument. + */ +status_t ELCDIF_UpdateLut( + LCDIF_Type *base, elcdif_lut_t lut, uint16_t startIndex, const uint32_t *lutData, uint16_t count) +{ + volatile uint32_t *regLutAddr; + volatile uint32_t *regLutData; + uint32_t i; + + /* Only has 256 entries. */ + if (startIndex + count > ELCDIF_LUT_ENTRY_NUM) + { + return kStatus_InvalidArgument; + } + + if (kELCDIF_Lut0 == lut) + { + regLutAddr = &(base->LUT0_ADDR); + regLutData = &(base->LUT0_DATA); + } + else + { + regLutAddr = &(base->LUT1_ADDR); + regLutData = &(base->LUT1_DATA); + } + + *regLutAddr = startIndex; + + for (i = 0; i < count; i++) + { + *regLutData = lutData[i]; + } + + return kStatus_Success; +} +#endif /* FSL_FEATURE_LCDIF_HAS_LUT */ diff --git a/Ubiquitous/XiZi/board/xidatong/third_party_driver/semc/connect_semc.c b/Ubiquitous/XiZi/board/xidatong/third_party_driver/semc/connect_semc.c index 2477fb2f6..58dbb2e23 100644 --- a/Ubiquitous/XiZi/board/xidatong/third_party_driver/semc/connect_semc.c +++ b/Ubiquitous/XiZi/board/xidatong/third_party_driver/semc/connect_semc.c @@ -5,7 +5,7 @@ #define EXAMPLE_SEMC SEMC #define EXAMPLE_SEMC_START_ADDRESS (0x80000000U) #define EXAMPLE_SEMC_CLK_FREQ CLOCK_GetFreq(kCLOCK_SemcClk) -#define SEMC_SRAM_SIZE (32 * 1024 * 1024) +#define SEMC_SRAM_SIZE (30 * 1024 * 1024) status_t BOARD_InitSEMC(void) {