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fixed merge fault

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This commit is contained in:
wlyu
2022-01-30 23:39:16 +08:00
parent e8fb3ca4fd df0404b4cc
commit 521dc56e15
90 changed files with 15039 additions and 482 deletions
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20
APP_Framework/Framework/control/plc/shared/plc.c
View File

@@ -18,14 +18,20 @@
* @date 2021.12.15
*/
#include "open62541.h"
#include "ua_api.h"
#include "plc.h"
#include "plc_bus.h"
#include "plc_dev.h"
#define PLC_BUS_NAME "plc bus"
#define PLC_DRV_NAME "plc driver"
struct PlcDevice plc_device;
struct PlcBus plc_bus;
struct PlcDriver plc_drv;
static DoubleLinklistType plcdev_list;
@@ -183,3 +189,17 @@ int PlcDeviceAttachToBus(const char *dev_name, const char *bus_name)
return EOK;
}
void PlcTestInit(void)
{
PlcBusInit(&plc_bus, PLC_BUS_NAME);
PlcDriverInit(&plc_drv, PLC_DRV_NAME);
}
void test_plc_bus(int argc, char *argv[])
{
PlcTestInit();
}
SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0) | SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN) | SHELL_CMD_PARAM_NUM(3),
plc, test_plc_bus, test PLC);

12
APP_Framework/Framework/control/plc/shared/plc.h
View File

@@ -15,9 +15,12 @@
* @brief plc relative definition and structure
* @version 1.0
* @author AIIT XUOS Lab
* @date 2021.12.15
* @date 2022-01-24
*/
#ifndef __PLC_H_
#define __PLC_H_
#include "bus.h"
#include "xs_klist.h"
@@ -78,7 +81,7 @@ enum PlcCtlType {
enum PlcIndHybridNet
{
//PLC Field Bus
// PLC Field Bus
PLC_IND_FIELD_MODBUS_485,
PLC_IND_FIELD_PROFIBUS,
PLC_IND_FIELD_CANOPEN,
@@ -92,7 +95,7 @@ enum PlcIndHybridNet
PLC_IND_ENET_SERCOS,
PLC_IND_ENET_OPCUA,
//PLC wireless net
// PLC wireless net
PLC_IND_WIRELESS
};
@@ -112,7 +115,7 @@ struct PlcInterface
// identify PLC device
struct PlcDevice {
char name[PLC_NAME_SIZE]; /* name of the device */
char name[PLC_NAME_SIZE]; /* name of the device */
enum PlcCtlType type; /* PLC Control Type */
enum DevState state;
enum PlcIndHybridNet net;
@@ -125,3 +128,4 @@ struct PlcDevice {
DoubleLinklistType link;/* link list node */
};
#endif

12
APP_Framework/Framework/control/plc/shared/plc_bus.c
View File

@@ -11,11 +11,11 @@
*/
/**
* @file plc_bus.c
* @file bus_plc.c
* @brief register plc bus function using bus driver framework
* @version 1.0
* @version 1.0
* @author AIIT XUOS Lab
* @date 2021-04-24
* @date 2022-01-24
*/
#include "plc_bus.h"
@@ -30,7 +30,6 @@ int PlcBusInit(struct PlcBus *plc_bus, const char *bus_name)
if (BUS_INSTALL != plc_bus->bus.bus_state) {
strncpy(plc_bus->bus.bus_name, bus_name, NAME_NUM_MAX);
plc_bus->bus.bus_type = TYPE_PLC_BUS;
plc_bus->bus.bus_state = BUS_INSTALL;
plc_bus->bus.private_data = plc_bus->private_data;
@@ -41,7 +40,7 @@ int PlcBusInit(struct PlcBus *plc_bus, const char *bus_name)
return ret;
}
} else {
KPrintf("PlcBusInit BusRegister bus has been register state%u\n", plc_bus->bus.bus_state);
KPrintf("PlcBusInit BusRegister bus has been register state%u\n", plc_bus->bus.bus_state);
}
return ret;
@@ -85,7 +84,7 @@ int PlcDriverAttachToBus(const char *drv_name, const char *bus_name)
{
NULL_PARAM_CHECK(drv_name);
NULL_PARAM_CHECK(bus_name);
x_err_t ret = EOK;
struct Bus *bus;
@@ -104,6 +103,7 @@ int PlcDriverAttachToBus(const char *drv_name, const char *bus_name)
return ERROR;
}
if (TYPE_PLC_DRV == driver->driver_type) {
ret = DriverRegisterToBus(bus, driver);
if (EOK != ret) {

6
APP_Framework/Framework/control/plc/shared/plc_bus.h
View File

@@ -13,9 +13,9 @@
/**
* @file plc_bus.h
* @brief define plc bus and drv function using bus driver framework
* @version 1.0
* @version 1.0
* @author AIIT XUOS Lab
* @date 2021-04-24
* @date 2022-01-24
*/
#ifndef __PLC_BUS_H_
@@ -30,14 +30,12 @@ extern "C" {
struct PlcDriver
{
struct Driver driver;
uint32 (*configure) (void *drv, struct BusConfigureInfo *configure_info);
};
struct PlcBus
{
struct Bus bus;
void *private_data;
};

11
APP_Framework/Framework/control/plc/shared/plc_dev.c
View File

@@ -15,7 +15,7 @@
* @brief register plc dev function using bus driver framework
* @version 1.0
* @author AIIT XUOS Lab
* @date 2021-04-24
* @date 2022-01-24
*/
#include "plc_bus.h"
@@ -38,6 +38,7 @@ static uint32 PlcHardwareDevOpen(void *dev)
return EOK;
}
static uint32 PlcHardwareDevClose(void *dev)
{
NULL_PARAM_CHECK(dev);
@@ -47,6 +48,7 @@ static uint32 PlcHardwareDevClose(void *dev)
return EOK;
}
static uint32 PlcHardwareDevWrite(void *dev, struct BusBlockWriteParam *write_param)
{
NULL_PARAM_CHECK(dev);
@@ -84,12 +86,13 @@ static uint32 PlcHardwareDevRead(void *dev, struct BusBlockReadParam *read_param
NULL_PARAM_CHECK(read_param);
int ret;
struct PlcHardwareDevice *plc_dev = (struct PlcHardwareDevice *)dev;
struct PlcDataStandard *plc_msg;
plc_msg = (struct PlcDataStandard *)x_malloc(sizeof(struct PlcDataStandard));
if (NONE == plc_msg) {
KPrintf("PlcHardwareDevRead x_malloc msg error\n");
x_free(plc_msg);
return ERROR;
}
@@ -214,7 +217,7 @@ int PlcHardwareDevConfigureCs(struct HardwareDev *dev, uint8 plc_chip_select, ui
struct PlcDataStandard *msg;
msg = (struct PlcDataStandard *)x_malloc(sizeof(struct PlcDataStandard));
if (NONE == msg) {
if (NONE == msg){
KPrintf("PlcHardwareDevConfigureCs x_malloc msg error\n");
x_free(msg);
return ERROR;
@@ -228,8 +231,10 @@ int PlcHardwareDevConfigureCs(struct HardwareDev *dev, uint8 plc_chip_select, ui
msg->plc_chip_select = plc_chip_select;
msg->plc_cs_release = plc_cs_release;
ret = plc_dev->plc_dev_done->dev_write(plc_dev, msg);
x_free(msg);
return ret;
}

44
APP_Framework/Framework/control/plc/shared/plc_dev.h
View File

@@ -11,44 +11,44 @@
*/
/**
* @file plc_dev.h
* @file dev_plc.h
* @brief define plc dev function using bus driver framework
* @version 1.0
* @author AIIT XUOS Lab
* @date 2021-04-24
* @date 2022-01-24
*/
#ifndef __PLC_DEV_H_
#define __PLC_DEV_H_
#ifndef DEV_PLC_H
#define DEV_PLC_H
#include <bus.h>
#ifdef __cplusplus
#ifdef __cpluspluss
extern "C" {
#endif
#define PLC_MAX_CLOCK 40000000
#define PLC_MAX_CLOCK 40000000
#define plc_device_max_num 4
#define PLC_LINE_CPHA (1<<0)
#define PLC_LINE_CPOL (1<<1)
#define PLC_LINE_CPHA (1 << 0)
#define PLC_LINE_CPOL (1 << 1)
#define PLC_LSB (0<<2)
#define PLC_MSB (1<<2)
#define PLC_LSB (0 << 2)
#define PLC_MSB (1 << 2)
#define PLC_MASTER (0<<3)
#define DEV_PLC_SLAVE (1<<3)
#define PLC_MASTER (0 << 3)
#define DEV_PLC_SLAVE (1 << 3)
#define PLC_MODE_0 (0 | 0)
#define PLC_MODE_1 (0 | PLC_LINE_CPHA)
#define PLC_MODE_2 (PLC_LINE_CPOL | 0)
#define PLC_MODE_3 (PLC_LINE_CPOL | PLC_LINE_CPHA)
#define PLC_MODE_MASK (PLC_LINE_CPHA | PLC_LINE_CPOL | PLC_MSB)
#define PLC_MODE_0 (0 | 0)
#define PLC_MODE_1 (0 | PLC_LINE_CPHA)
#define PLC_MODE_2 (PLC_LINE_CPOL | 0)
#define PLC_MODE_3 (PLC_LINE_CPOL | PLC_LINE_CPHA)
#define PLC_MODE_MASK (PLC_LINE_CPHA | PLC_LINE_CPOL | PLC_MSB)
#define PLC_CS_HIGH (1<<4)
#define PLC_NO_CS (1<<5)
#define PLC_3WIRE (1<<6)
#define PLC_READY (1<<7)
#define PLC_CS_HIGH (1 << 4)
#define PLC_NO_CS (1 << 5)
#define PLC_3WIRE (1 << 6)
#define PLC_READY (1 << 7)
struct PlcDataStandard
{
@@ -70,7 +70,7 @@ struct PlcMasterParam
uint8 plc_work_mode;//CPOL CPHA
uint8 plc_frame_format;//frame format
uint8 plc_data_bit_width;//bit width
uint8 plc_data_endian;//little endian：0，big endian：1
uint8 plc_data_endian;//little endian 0 : big endian 1
uint32 plc_maxfrequency;//work frequency
};

10
APP_Framework/Framework/control/plc/shared/plc_drv.c
View File

@@ -11,13 +11,14 @@
*/
/**
* @file plc_drv.c
* @file drv_plc.c
* @brief register plc drv function using bus driver framework
* @version 1.0
* @version 1.0
* @author AIIT XUOS Lab
* @date 2021-04-24
* @date 2022-01-24
*/
#include "transform.h"
#include "plc_bus.h"
#include "plc_dev.h"
@@ -32,7 +33,7 @@ static void PlcDrvLinkInit()
DriverType PlcDriverFind(const char *drv_name, enum DriverType_e drv_type)
{
NULL_PARAM_CHECK(drv_name);
struct Driver *driver = NONE;
DoubleLinklistType *node = NONE;
@@ -65,3 +66,4 @@ int PlcDriverRegister(struct Driver *driver)
return ret;
}