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support PLC bus and clean codes

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This commit is contained in:
wlyu
2022-02-15 17:40:40 +08:00
parent a101e994ff
commit 5185501d72
16 changed files with 200 additions and 680 deletions
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2
APP_Framework/Framework/control/plc/shared/Makefile
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@@ -1,4 +1,4 @@
SRC_FILES := plc.c plc_dev.c plc_bus.c plc_drv.c
SRC_FILES := plc_dev.c plc_bus.c plc_drv.c
include $(KERNEL_ROOT)/compiler.mk

185
APP_Framework/Framework/control/plc/shared/plc.c
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@@ -1,185 +0,0 @@
/*
* Copyright (c) 2021 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file plc.c
* @brief plc relative activities
* @version 1.0
* @author AIIT XUOS Lab
* @date 2021.12.15
*/
#include "open62541.h"
#include "ua_api.h"
#include "plc.h"
#include "plc_bus.h"
#include "plc_dev.h"
static DoubleLinklistType plcdev_list;
int PlcDevConfigure(struct HardwareDev *dev, uint8 plc_chip_select, uint8 plc_cs_release);
/*Create the plc device linklist*/
static void PlcDeviceLinkInit()
{
InitDoubleLinkList(&plcdev_list);
}
static int PlcDeviceOpen(void *dev)
{
NULL_PARAM_CHECK(dev);
struct PlcDevice *plc_dev = (struct PlcDevice *)dev;
if(plc_dev->net == PLC_IND_ENET_OPCUA)
{
return ua_open(plc_dev->priv_data);
}
return EOK;
}
static void PlcDeviceClose(void *dev)
{
NULL_PARAM_CHECK(dev);
struct PlcDevice *plc_dev = (struct PlcDevice *)dev;
if(plc_dev->net == PLC_IND_ENET_OPCUA)
{
ua_close(plc_dev->priv_data);
}
}
static int PlcDeviceWrite(void *dev, const void *buf, size_t len)
{
NULL_PARAM_CHECK(dev);
NULL_PARAM_CHECK(buf);
int ret;
struct PlcDevice *plc_dev = (struct PlcDevice *)dev;
if(plc_dev->net == PLC_IND_ENET_OPCUA)
{
ret = ua_write(plc_dev->priv_data, buf, len);
}
return ret;
}
static int PlcDeviceRead(void *dev, void *buf, size_t len)
{
NULL_PARAM_CHECK(dev);
NULL_PARAM_CHECK(buf);
int ret;
struct PlcDevice *plc_dev = (struct PlcDevice *)dev;
if(plc_dev->net == PLC_IND_ENET_OPCUA)
{
ret = ua_read(plc_dev->priv_data, buf, len);
}
return ret;
}
static struct PlcOps plc_done =
{
.open = PlcDeviceOpen,
.close = PlcDeviceClose,
.write = PlcDeviceWrite,
.read = PlcDeviceRead,
};
struct PlcDevice *PlcDevFind(const char *dev_name, enum DevType dev_type)
{
NULL_PARAM_CHECK(dev_name);
struct PlcDevice *device = NONE;
DoubleLinklistType *node = NONE;
DoubleLinklistType *head = &plcdev_list;
for (node = head->node_next; node != head; node = node->node_next) {
device = SYS_DOUBLE_LINKLIST_ENTRY(node, struct PlcDevice, link);
if ((!strcmp(device->name, dev_name)) && (dev_type == device->type)) {
return device;
}
}
KPrintf("PlcDevFind cannot find the %s device.return NULL\n", dev_name);
return NONE;
}
int PlcDevRegister(struct PlcDevice *plc_device, void *plc_param, const char *device_name)
{
NULL_PARAM_CHECK(plc_device);
NULL_PARAM_CHECK(device_name);
x_err_t ret = EOK;
static x_bool dev_link_flag = RET_FALSE;
if (!dev_link_flag) {
PlcDeviceLinkInit();
dev_link_flag = RET_TRUE;
}
if (DEV_INSTALL != plc_device->state) {
strncpy(plc_device->name, device_name, strlen(device_name));
plc_device->ops = &plc_done;
DoubleLinkListInsertNodeAfter(&plcdev_list, &(plc_device->link));
plc_device->state = DEV_INSTALL;
} else {
KPrintf("PlcDevRegister device has been register state%u\n", plc_device->type);
}
return ret;
}
int PlcDeviceAttachToBus(const char *dev_name, const char *bus_name)
{
NULL_PARAM_CHECK(dev_name);
NULL_PARAM_CHECK(bus_name);
x_err_t ret = EOK;
struct Bus *bus;
struct HardwareDev *device;
bus = BusFind(bus_name);
if (NONE == bus) {
KPrintf("PlcDeviceAttachToBus find plc bus error!name %s\n", bus_name);
return ERROR;
}
if (TYPE_PLC_BUS == bus->bus_type) {
device = PlcHardwareDevFind(dev_name, TYPE_PLC_DEV);
if (NONE == device) {
KPrintf("PlcDeviceAttachToBus find plc device error!name %s\n", dev_name);
return ERROR;
}
if (TYPE_PLC_DEV == device->dev_type) {
ret = DeviceRegisterToBus(bus, device);
if (EOK != ret) {
KPrintf("PlcDeviceAttachToBus DeviceRegisterToBus error %u\n", ret);
return ERROR;
}
}
}
return EOK;
}

140
APP_Framework/Framework/control/plc/shared/plc.h
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@@ -1,140 +0,0 @@
/*
* Copyright (c) 2021 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file plc.h
* @brief plc relative definition and structure
* @version 1.0
* @author AIIT XUOS Lab
* @date 2022-01-24
*/
#ifndef __PLC_H_
#define __PLC_H_
#include "bus.h"
#include "xs_klist.h"
#define IP_ADDR_SIZE 32
#define PLC_NAME_SIZE 32
// PLC device information
struct PlcInfo {
uint32_t ability; // PLC ability
uint32_t id; // PLC Device ID
uint32_t soft_version; // software version
uint32_t hard_version; // hardware version
uint32_t date; // manufact date
const char *vendor; // vendor
const char *model; // product model
};
enum PlcSerialType {
PLC_SERIAL_232,
PLC_SERIAL_485,
PLC_SERIAL_CAN
};
union PlcCfg {
struct {
char ip_addr[IP_ADDR_SIZE];
uint32_t ip_port;
} PlcIpCfg;
struct {
enum PlcSerialType serial_type;
char station_id;
char serial_port;
} PlcSerialCfg;
};
struct PlcDevice;
#undef open
#undef close
#undef read
#undef write
// operation API
struct PlcOps {
int (*open)(void *dev); // open and connect PLC device
void (*close)(void* dev); // close and disconnect PLC device
int (*read)(void* dev, void *buf, size_t len); // read data from PLC
int (*write)(void* dev, const void *buf, size_t len); // write data from PLC
int (*ioctl)(void* dev, int cmd, void *arg); // send control command to PLC
};
enum PlcCtlType {
PLC_CTRL_TYPE_HSC,
PLC_CTRL_TYPE_PID,
PLC_CTRL_TYPE_PHASING
};
#define PLC_ABILITY_HSC ((uint32_t)(1 << PLC_CTRL_TYPE_HSC))
#define PLC_ABILITY_PID ((uint32_t)(1 << PLC_CTRL_TYPE_PID))
#define PLC_ABILITY_PHASING ((uint32_t)(1 << PLC_CTRL_TYPE_PHASING))
enum PlcIndHybridNet
{
// PLC Field Bus
PLC_IND_FIELD_MODBUS_485,
PLC_IND_FIELD_PROFIBUS,
PLC_IND_FIELD_CANOPEN,
PLC_IND_FIELD_DEVICENET,
PLC_IND_FIELD_CONTROLNET,
// PLC ETHERNET
PLC_IND_ENET_ETHERNET_IP,
PLC_IND_ENET_PROFINET,
PLC_IND_ENET_ETHERCAT,
PLC_IND_ENET_SERCOS,
PLC_IND_ENET_OPCUA,
// PLC wireless net
PLC_IND_WIRELESS
};
enum PlcTransType
{
PLC_TRANS_TCP,
PLC_TRANS_UDP,
PLC_TRANS_SERIAL
};
//communication interface
struct PlcInterface
{
char ip_addr[IP_ADDR_SIZE];
char attrib;
};
// identify PLC device
struct PlcDevice {
char name[PLC_NAME_SIZE]; /* name of the device */
enum PlcCtlType type; /* PLC Control Type */
enum DevState state;
enum PlcIndHybridNet net;
enum PlcTransType trans;
struct PlcInfo info;/* Plc info, such as vendor name and model name */
union PlcCfg cfg;
struct PlcOps *ops; /* filesystem-like APIs for data transferring */
struct PlcInterface interface; /* protocols used for transferring data from program to plc */
void *priv_data;
DoubleLinklistType link;/* link list node */
};
int PlcDevRegister(struct PlcDevice *plc_device, void *plc_param, const char *device_name);
#endif

2
APP_Framework/Framework/control/plc/shared/plc_bus.c
View File

@@ -21,6 +21,8 @@
#include "plc_bus.h"
#include "plc_dev.h"
/******************************************************************************/
int PlcBusInit(struct PlcBus *plc_bus, const char *bus_name)
{
NULL_PARAM_CHECK(plc_bus);

183
APP_Framework/Framework/control/plc/shared/plc_dev.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* Copyright (c) 2021 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
@@ -11,136 +11,117 @@
*/
/**
* @file plc_dev.c
* @brief register plc dev function using bus driver framework
* @version 1.0
* @author AIIT XUOS Lab
* @date 2022-01-24
*/
* @file plc.c
* @brief plc relative activities
* @version 1.0
* @author AIIT XUOS Lab
* @date 2021.12.15
*/
#include "ua_api.h"
#include "plc_bus.h"
#include "plc_dev.h"
static DoubleLinklistType plcdev_linklist;
static DoubleLinklistType plcdev_list;
/******************************************************************************/
/*Create the plc device linklist*/
static void PlcHardwareDevLinkInit()
static void PlcDeviceLinkInit()
{
InitDoubleLinkList(&plcdev_linklist);
InitDoubleLinkList(&plcdev_list);
}
static uint32 PlcHardwareDevOpen(void *dev)
static int PlcDeviceOpen(void *dev)
{
NULL_PARAM_CHECK(dev);
PlcHardwareDevConfigureCs(dev, 1, 0);
struct PlcDevice *plc_dev = (struct PlcDevice *)dev;
if(plc_dev->net == PLC_IND_ENET_OPCUA)
{
return ua_open(plc_dev->priv_data);
}
return EOK;
}
static uint32 PlcHardwareDevClose(void *dev)
static void PlcDeviceClose(void *dev)
{
NULL_PARAM_CHECK(dev);
PlcHardwareDevConfigureCs(dev, 0, 1);
struct PlcDevice *plc_dev = (struct PlcDevice *)dev;
return EOK;
if(plc_dev->net == PLC_IND_ENET_OPCUA)
{
ua_close(plc_dev->priv_data);
}
}
static uint32 PlcHardwareDevWrite(void *dev, struct BusBlockWriteParam *write_param)
static int PlcDeviceWrite(void *dev, const void *buf, size_t len)
{
NULL_PARAM_CHECK(dev);
NULL_PARAM_CHECK(write_param);
NULL_PARAM_CHECK(buf);
int ret;
struct PlcHardwareDevice *plc_dev = (struct PlcHardwareDevice *)dev;
struct PlcDataStandard *plc_msg;
struct PlcDevice *plc_dev = (struct PlcDevice *)dev;
plc_msg = (struct PlcDataStandard *)x_malloc(sizeof(struct PlcDataStandard));
if (NONE == plc_msg) {
KPrintf("PlcHardwareDevWrite x_malloc msg error\n");
x_free(plc_msg);
return ERROR;
if(plc_dev->net == PLC_IND_ENET_OPCUA)
{
ret = ua_write(plc_dev->priv_data, buf, len);
}
//memset(plc_msg, 0, sizeof(struct PlcDataStandard));
plc_msg->tx_buff = (uint8 *)write_param->buffer;
plc_msg->rx_buff = NONE;
plc_msg->length = write_param->size;
plc_msg->plc_chip_select = 0;
plc_msg->plc_cs_release = 0;
plc_msg->next = NONE;
ret = plc_dev->plc_dev_done->dev_write(plc_dev, plc_msg);
x_free(plc_msg);
return ret;
}
static uint32 PlcHardwareDevRead(void *dev, struct BusBlockReadParam *read_param)
static int PlcDeviceRead(void *dev, void *buf, size_t len)
{
NULL_PARAM_CHECK(dev);
NULL_PARAM_CHECK(read_param);
NULL_PARAM_CHECK(buf);
int ret;
struct PlcDevice *plc_dev = (struct PlcDevice *)dev;
struct PlcHardwareDevice *plc_dev = (struct PlcHardwareDevice *)dev;
struct PlcDataStandard *plc_msg;
plc_msg = (struct PlcDataStandard *)x_malloc(sizeof(struct PlcDataStandard));
if (NONE == plc_msg) {
x_free(plc_msg);
return ERROR;
if(plc_dev->net == PLC_IND_ENET_OPCUA)
{
ret = ua_read(plc_dev->priv_data, buf, len);
}
//memset(plc_msg, 0, sizeof(struct PlcDataStandard));
plc_msg->tx_buff = NONE;
plc_msg->rx_buff = (uint8 *)read_param->buffer;
plc_msg->length = read_param->size;
plc_msg->plc_chip_select = 0;
plc_msg->plc_cs_release = 0;
plc_msg->next = NONE;
ret = plc_dev->plc_dev_done->dev_read(plc_dev, plc_msg);
x_free(plc_msg);
return ret;
}
static const struct HalDevDone dev_done =
static struct PlcOps plc_done =
{
.open = PlcHardwareDevOpen,
.close = PlcHardwareDevClose,
.write = PlcHardwareDevWrite,
.read = PlcHardwareDevRead,
.open = PlcDeviceOpen,
.close = PlcDeviceClose,
.write = PlcDeviceWrite,
.read = PlcDeviceRead,
};
HardwareDevType PlcHardwareDevFind(const char *dev_name, enum DevType dev_type)
/* find PLC device with device name */
struct HardwareDev *PlcDevFind(const char *dev_name)
{
NULL_PARAM_CHECK(dev_name);
struct HardwareDev *device = NONE;
struct PlcDevice *device = NONE;
struct HardwareDev *haldev = NONE;
DoubleLinklistType *node = NONE;
DoubleLinklistType *head = &plcdev_linklist;
DoubleLinklistType *head = &plcdev_list;
for (node = head->node_next; node != head; node = node->node_next) {
device = SYS_DOUBLE_LINKLIST_ENTRY(node, struct HardwareDev, dev_link);
if ((!strcmp(device->dev_name, dev_name)) && (dev_type == device->dev_type)) {
return device;
device = SYS_DOUBLE_LINKLIST_ENTRY(node, struct PlcDevice, link);
if (!strcmp(device->name, dev_name)) {
haldev = &device->haldev;
return haldev;
}
}
KPrintf("PlcHardwareDevFind cannot find the %s device.return NULL\n", dev_name);
plc_print("plc: [%s] cannot find the %s device\n", __func__, dev_name);
return NONE;
}
int PlcHardwareDevRegister(struct PlcHardwareDevice *plc_device, void *plc_param, const char *device_name)
int PlcDevRegister(struct PlcDevice *plc_device, void *plc_param, const char *device_name)
{
NULL_PARAM_CHECK(plc_device);
NULL_PARAM_CHECK(device_name);
@@ -149,31 +130,28 @@ int PlcHardwareDevRegister(struct PlcHardwareDevice *plc_device, void *plc_param
static x_bool dev_link_flag = RET_FALSE;
if (!dev_link_flag) {
PlcHardwareDevLinkInit();
PlcDeviceLinkInit();
dev_link_flag = RET_TRUE;
}
if (DEV_INSTALL != plc_device->haldev.dev_state) {
if (DEV_INSTALL != plc_device->state) {
strncpy(plc_device->haldev.dev_name, device_name, NAME_NUM_MAX);
plc_device->haldev.dev_type = TYPE_PLC_DEV;
plc_device->haldev.dev_state = DEV_INSTALL;
//only plc bus dev need to register dev_done
if (RET_TRUE != plc_device->plc_dev_flag) {
plc_device->haldev.dev_done = &dev_done;
}
strncpy(plc_device->name, device_name, strlen(device_name));
plc_device->ops = &plc_done;
plc_device->haldev.private_data = plc_param;
DoubleLinkListInsertNodeAfter(&plcdev_linklist, &(plc_device->haldev.dev_link));
DoubleLinkListInsertNodeAfter(&plcdev_list, &(plc_device->link));
plc_device->state = DEV_INSTALL;
} else {
KPrintf("PlcHardwareDevRegister device has been register state%u\n", plc_device->haldev.dev_state);
KPrintf("PlcDevRegister device has been register state%u\n", plc_device->type);
}
return ret;
}
int PlcHardwareDevAttachToBus(const char *dev_name, const char *bus_name)
int PlcDeviceAttachToBus(const char *dev_name, const char *bus_name)
{
NULL_PARAM_CHECK(dev_name);
NULL_PARAM_CHECK(bus_name);
@@ -185,21 +163,21 @@ int PlcHardwareDevAttachToBus(const char *dev_name, const char *bus_name)
bus = BusFind(bus_name);
if (NONE == bus) {
KPrintf("PlcHardwareDevAttachToBus find plc bus error!name %s\n", bus_name);
KPrintf("PlcDeviceAttachToBus find plc bus error!name %s\n", bus_name);
return ERROR;
}
if (TYPE_PLC_BUS == bus->bus_type) {
device = PlcHardwareDevFind(dev_name, TYPE_PLC_DEV);
device = PlcDevFind(dev_name);
if (NONE == device) {
KPrintf("PlcHardwareDevAttachToBus find plc device error!name %s\n", dev_name);
KPrintf("PlcDeviceAttachToBus find plc device error!name %s\n", dev_name);
return ERROR;
}
if (TYPE_PLC_DEV == device->dev_type) {
ret = DeviceRegisterToBus(bus, device);
if (EOK != ret) {
KPrintf("PlcHardwareDevAttachToBus DeviceRegisterToBus error %u\n", ret);
KPrintf("PlcDeviceAttachToBus DeviceRegisterToBus error %u\n", ret);
return ERROR;
}
}
@@ -208,32 +186,3 @@ int PlcHardwareDevAttachToBus(const char *dev_name, const char *bus_name)
return EOK;
}
int PlcHardwareDevConfigureCs(struct HardwareDev *dev, uint8 plc_chip_select, uint8 plc_cs_release)
{
NULL_PARAM_CHECK(dev);
int ret;
struct PlcHardwareDevice *plc_dev = (struct PlcHardwareDevice *)dev;
struct PlcDataStandard *msg;
msg = (struct PlcDataStandard *)x_malloc(sizeof(struct PlcDataStandard));
if (NONE == msg){
KPrintf("PlcHardwareDevConfigureCs x_malloc msg error\n");
x_free(msg);
return ERROR;
}
//memset(msg, 0, sizeof(struct PlcDataStandard));
msg->length = 0;
msg->rx_buff = NONE;
msg->tx_buff = NONE;
msg->next = NONE;
msg->plc_chip_select = plc_chip_select;
msg->plc_cs_release = plc_cs_release;
ret = plc_dev->plc_dev_done->dev_write(plc_dev, msg);
x_free(msg);
return ret;
}

212
APP_Framework/Framework/control/plc/shared/plc_dev.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* Copyright (c) 2021 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
@@ -11,129 +11,139 @@
*/
/**
* @file dev_plc.h
* @brief define plc dev function using bus driver framework
* @version 1.0
* @author AIIT XUOS Lab
* @date 2022-01-24
*/
* @file plc_dev.h
* @brief plc relative definition and structure
* @version 1.0
* @author AIIT XUOS Lab
* @date 2022-01-24
*/
#ifndef DEV_PLC_H
#define DEV_PLC_H
#ifndef __PLC_DEV_H_
#define __PLC_DEV_H_
#include <bus.h>
#include "bus.h"
#include "xs_klist.h"
#ifdef __cpluspluss
extern "C" {
#endif
#undef open
#undef close
#undef read
#undef write
#define PLC_MAX_CLOCK 40000000
#define plc_device_max_num 4
#define IP_ADDR_SIZE 32
#define PLC_NAME_SIZE 32
#define PLC_LINE_CPHA (1 << 0)
#define PLC_LINE_CPOL (1 << 1)
#define PLC_LSB (0 << 2)
#define PLC_MSB (1 << 2)
#define PLC_MASTER (0 << 3)
#define DEV_PLC_SLAVE (1 << 3)
#define PLC_MODE_0 (0 | 0)
#define PLC_MODE_1 (0 | PLC_LINE_CPHA)
#define PLC_MODE_2 (PLC_LINE_CPOL | 0)
#define PLC_MODE_3 (PLC_LINE_CPOL | PLC_LINE_CPHA)
#define PLC_MODE_MASK (PLC_LINE_CPHA | PLC_LINE_CPOL | PLC_MSB)
#define PLC_CS_HIGH (1 << 4)
#define PLC_NO_CS (1 << 5)
#define PLC_3WIRE (1 << 6)
#define PLC_READY (1 << 7)
struct PlcDataStandard
{
uint8 plc_chip_select;
uint8 plc_cs_release;
const uint8 *tx_buff;
uint32 tx_len;
uint8 *rx_buff;
uint32 rx_len;
uint32 length;
struct PlcDataStandard *next;
// PLC device information
struct PlcInfo {
uint32_t ability; // PLC ability
uint32_t id; // PLC Device ID
uint32_t soft_version; // software version
uint32_t hard_version; // hardware version
uint32_t date; // manufact date
const char *vendor; // vendor
const char *model; // product model
};
struct PlcMasterParam
{
uint8 plc_work_mode;//CPOL CPHA
uint8 plc_frame_format;//frame format
uint8 plc_data_bit_width;//bit width
uint8 plc_data_endian;//little endian 0 : big endian 1
uint32 plc_maxfrequency;//work frequency
enum PlcSerialType {
PLC_SERIAL_232,
PLC_SERIAL_485,
PLC_SERIAL_CAN
};
struct PlcDmaParam
{
uint8 plc_master_id;
uint8 plc_dmac_txchannel;
uint8 plc_dmac_rxchannel;
union PlcCfg {
struct {
char ip_addr[IP_ADDR_SIZE];
uint32_t ip_port;
} PlcIpCfg;
struct {
enum PlcSerialType serial_type;
char station_id;
char serial_port;
} PlcSerialCfg;
};
struct PlcSlaveParam
{
uint8 plc_slave_id;
uint8 plc_cs_gpio_pin;
uint8 plc_cs_select_id;
struct PlcDevice;
// operation API
struct PlcOps {
int (*open)(void *dev); // open and connect PLC device
void (*close)(void* dev); // close and disconnect PLC device
int (*read)(void* dev, void *buf, size_t len); // read data from PLC
int (*write)(void* dev, const void *buf, size_t len); // write data from PLC
int (*ioctl)(void* dev, int cmd, void *arg); // send control command to PLC
};
typedef struct
{
struct PlcDmaParam *plc_dma_param;
struct PlcSlaveParam *plc_slave_param;
struct PlcMasterParam *plc_master_param;
}PlcDeviceParam;
struct PlcHardwareDevice;
struct PlcDevDone
{
uint32 (*dev_open) (struct PlcHardwareDevice *dev);
uint32 (*dev_close) (struct PlcHardwareDevice *dev);
uint32 (*dev_write) (struct PlcHardwareDevice *dev, struct PlcDataStandard *msg);
uint32 (*dev_read) (struct PlcHardwareDevice *dev, struct PlcDataStandard *msg);
enum PlcCtlType {
PLC_CTRL_TYPE_HSC,
PLC_CTRL_TYPE_PID,
PLC_CTRL_TYPE_PHASING
};
struct PlcHardwareDevice
#define PLC_ABILITY_HSC ((uint32_t)(1 << PLC_CTRL_TYPE_HSC))
#define PLC_ABILITY_PID ((uint32_t)(1 << PLC_CTRL_TYPE_PID))
#define PLC_ABILITY_PHASING ((uint32_t)(1 << PLC_CTRL_TYPE_PHASING))
enum PlcIndHybridNet
{
struct HardwareDev haldev;
PlcDeviceParam plc_param;
// PLC Field Bus
PLC_IND_FIELD_MODBUS_485,
PLC_IND_FIELD_PROFIBUS,
PLC_IND_FIELD_CANOPEN,
PLC_IND_FIELD_DEVICENET,
PLC_IND_FIELD_CONTROLNET,
x_bool plc_dev_flag;
// PLC ETHERNET
PLC_IND_ENET_ETHERNET_IP,
PLC_IND_ENET_PROFINET,
PLC_IND_ENET_ETHERCAT,
PLC_IND_ENET_SERCOS,
PLC_IND_ENET_OPCUA,
const struct PlcDevDone *plc_dev_done;
void *private_data;
// PLC wireless net
PLC_IND_WIRELESS
};
/*Register the plc device*/
int PlcHardwareDevRegister(struct PlcHardwareDevice *plc_device, void *plc_param, const char *device_name);
enum PlcTransType
{
PLC_TRANS_TCP,
PLC_TRANS_UDP,
PLC_TRANS_SERIAL
};
/*Register the plc device to the plc bus*/
int PlcHardwareDeviceAttachToBus(const char *dev_name, const char *bus_name);
//communication interface
struct PlcInterface
{
char ip_addr[IP_ADDR_SIZE];
char attrib;
};
/*Find the register plc device*/
HardwareDevType PlcHardwareDevFind(const char *dev_name, enum DevType dev_type);
// identify PLC device
struct PlcDevice {
struct HardwareDev haldev; /* hardware device driver for bus */
char name[PLC_NAME_SIZE]; /* name of the device */
enum PlcCtlType type; /* PLC Control Type */
enum DevState state;
enum PlcIndHybridNet net;
enum PlcTransType trans;
/*Configure the cs pin of plc dev*/
int PlcHardwareDevConfigureCs(struct HardwareDev *dev, uint8 plc_chip_select, uint8 plc_cs_release);
struct PlcInfo info;/* Plc info, such as vendor name and model name */
union PlcCfg cfg;
struct PlcOps *ops; /* filesystem-like APIs for data transferring */
struct PlcInterface interface; /* protocols used for transferring data from program to plc */
#ifdef __cplusplus
}
#endif
void *priv_data; /* private data for different PLC*/
DoubleLinklistType link;/* link list node */
};
#define plc_print KPrintf
/******************************************************************************/
int PlcDevRegister(struct PlcDevice *plc_device, void *plc_param, const char *device_name);
int PlcDeviceAttachToBus(const char *dev_name, const char *bus_name);
/******************************************************************************/
#endif

2
APP_Framework/Framework/control/plc/shared/plc_drv.c
View File

@@ -24,6 +24,8 @@
static DoubleLinklistType plcdrv_linklist;
/******************************************************************************/
/*Create the driver linklist*/
static void PlcDrvLinkInit()
{