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add GPIO_WIFI_EN register and change PrivSerialIoctl

This commit is contained in:
wgzAIIT 2022-09-28 14:32:14 +08:00
parent 3fa418120c
commit 32b54cee33
3 changed files with 27 additions and 3 deletions
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20
APP_Framework/Framework/transform_layer/nuttx/transform.c
View File

@ -139,10 +139,30 @@ static int PrivSerialIoctl(int fd, int cmd, void *args)
{ {
struct SerialDataCfg *serial_cfg = (struct SerialDataCfg *)args; struct SerialDataCfg *serial_cfg = (struct SerialDataCfg *)args;
unsigned long serial_baud_rate = (unsigned long)serial_cfg->serial_baud_rate; unsigned long serial_baud_rate = (unsigned long)serial_cfg->serial_baud_rate;
struct termios term;
/* Extended serial port */
if(serial_cfg->is_ext_uart == 1) if(serial_cfg->is_ext_uart == 1)
{ {
return ioctl(fd, OPE_INT, serial_baud_rate); return ioctl(fd, OPE_INT, serial_baud_rate);
} }
/* Standard serial port,only the baud rate is set */
else if(serial_cfg->is_ext_uart == 0)
{
if(ioctl(fd, TCGETS, (unsigned long)&term) < 0)
{
return -1;
}
if ((cfsetispeed(&term, serial_baud_rate) < 0) ||(cfsetospeed(&term, serial_baud_rate) < 0))
{
return -1;
}
if(ioctl(fd, TCSETS, (unsigned long)&term) < 0)
{
return -1;
}
}
return 0; return 0;
} }

2
Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/include/board.h
View File

@ -57,7 +57,7 @@
/* GPIO pins used by the GPIO Subsystem */ /* GPIO pins used by the GPIO Subsystem */
#define BOARD_NGPIOOUT 3 /* Amount of GPIO Output pins */ #define BOARD_NGPIOOUT 4 /* Amount of GPIO Output pins */
#define BOARD_NGPIOINT 0 /* Amount of GPIO Input */ #define BOARD_NGPIOINT 0 /* Amount of GPIO Input */
/**************************************************************************** /****************************************************************************

8
Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/k210_gpio.c
View File

@ -51,10 +51,12 @@
#define GPIO_E220_M0 44 #define GPIO_E220_M0 44
#define GPIO_E220_M1 45 #define GPIO_E220_M1 45
#define GPIO_E18_MODE 46 #define GPIO_E18_MODE 46
#define GPIO_WIFI_EN 8
#define FPIOA_E220_M0 1 #define FPIOA_E220_M0 1
#define FPIOA_E220_M1 2 #define FPIOA_E220_M1 2
#define FPIOA_E18_MODE 3 #define FPIOA_E18_MODE 3
#define FPIOA_WIFI_EN 4
/**************************************************************************** /****************************************************************************
* Private Types * Private Types
@ -94,14 +96,16 @@ static const uint32_t g_gpiooutputs[BOARD_NGPIOOUT] =
{ {
GPIO_E220_M0, GPIO_E220_M0,
GPIO_E220_M1, GPIO_E220_M1,
GPIO_E18_MODE GPIO_E18_MODE,
GPIO_WIFI_EN
}; };
static const uint32_t g_fpioa[BOARD_NGPIOOUT] = static const uint32_t g_fpioa[BOARD_NGPIOOUT] =
{ {
FPIOA_E220_M0, FPIOA_E220_M0,
FPIOA_E220_M1, FPIOA_E220_M1,
FPIOA_E18_MODE FPIOA_E18_MODE,
FPIOA_WIFI_EN
}; };
static struct k210gpio_dev_s g_gpout[BOARD_NGPIOOUT]; static struct k210gpio_dev_s g_gpout[BOARD_NGPIOOUT];