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move gpio define to board.h on xidatong-riscv64

This commit is contained in:
wgzAIIT 2022-10-14 16:57:21 +08:00
parent b073c38035
commit 256857b6c5
6 changed files with 63 additions and 56 deletions
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2
APP_Framework/Framework/connection/wifi/esp8285_wifi/Kconfig
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@ -5,6 +5,6 @@ config ADAPTER_WIFI_ESP8285
if ADD_NUTTX_FETURES
config ADAPTER_ESP8285_DRIVER
string "ESP8285 device uart driver path"
default "/dev/ttyS2"
default "/dev/ttyS1"
endif

67
Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/include/board.h
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@ -39,12 +39,10 @@
* Pre-processor Definitions
****************************************************************************/
#define BOARD_LED_PAD 14 /* Connected to red led */
/* Map pad 14 to gpiohs io 0 */
#define BOARD_LED_IO_FUNC K210_IO_FUNC_GPIOHS0
#define BOARD_LED_IO 0
#define LED_STARTED 0 /* N/C */
#define LED_HEAPALLOCATE 1 /* N/C */
@ -79,26 +77,75 @@ extern "C"
#define EXTERN extern
#endif
/*************************** GPIO define ***************************/
/* Connected to red led */
#define BOARD_LED_PAD 14
#define GPIO_CAN_RXD 18
#define GPIO_CAN_TXD 19
/* UART IO */
#define GPIO_WIFI_RXD 7
#define GPIO_WIFI_TXD 6
#define GPIO_EC200T_RXD 21
#define GPIO_EC200T_TXD 20
#define GPIO_CH376T_RXD 22
#define GPIO_CH376T_TXD 23
#define GPIO_CH376T_RXD 22
#define GPIO_CH376T_TXD 23
/* ch438 IO */
#define CH438_ALE_PIN 24
#define CH438_NWR_PIN 25
#define CH438_NRD_PIN 26
#define CH438_D0_PIN 27
#define CH438_D1_PIN 28
#define CH438_D2_PIN 29
#define CH438_D3_PIN 30
#define CH438_D4_PIN 31
#define CH438_D5_PIN 32
#define CH438_D6_PIN 33
#define CH438_D7_PIN 34
#define CH438_INT_PIN 35
/* other mode io */
#define GPIO_E220_M0 44
#define GPIO_E220_M1 45
#define GPIO_E18_MODE 46
#define GPIO_WIFI_EN 8
/************************** end GPIO define **************************/
/*************************** FPIOA define ***************************/
#define BOARD_LED_IO 0
/* UART FPOA */
#define FPOA_USART1_RX K210_IO_FUNC_UART1_RX
#define FPOA_USART1_TX K210_IO_FUNC_UART1_TX
#define FPOA_USART2_RX K210_IO_FUNC_UART2_RX
#define FPOA_USART2_TX K210_IO_FUNC_UART2_TX
#define FPOA_USART3_RX K210_IO_FUNC_UART3_RX
#define FPOA_USART3_TX K210_IO_FUNC_UART3_TX
/* ch438 FPIOA */
#define FPIOA_CH438_ALE 11
#define FPIOA_CH438_NWR 12
#define FPIOA_CH438_NRD 13
#define FPIOA_CH438_D0 14
#define FPIOA_CH438_D1 15
#define FPIOA_CH438_D2 16
#define FPIOA_CH438_D3 17
#define FPIOA_CH438_D4 18
#define FPIOA_CH438_D5 29
#define FPIOA_CH438_D6 20
#define FPIOA_CH438_D7 31
#define FPIOA_CH438_INT 22
/* other mode FPIOA */
#define FPIOA_E220_M0 1
#define FPIOA_E220_M1 2
#define FPIOA_E18_MODE 3
#define FPIOA_WIFI_EN 4
/************************** end FPIOA define **************************/
/****************************************************************************
* Public Function Prototypes
****************************************************************************/

4
Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/k210_bringup.c
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@ -90,8 +90,8 @@ int k210_bringup(void)
#ifdef CONFIG_K210_16550_UART1
sysctl_clock_enable(SYSCTL_CLOCK_UART1);
sysctl_reset(SYSCTL_RESET_UART1);
fpioa_set_function(GPIO_CAN_RXD, FPOA_USART1_RX);
fpioa_set_function(GPIO_CAN_TXD, FPOA_USART1_TX);
fpioa_set_function(GPIO_WIFI_RXD, FPOA_USART1_RX);
fpioa_set_function(GPIO_WIFI_TXD, FPOA_USART1_TX);
#endif
#ifdef CONFIG_K210_16550_UART2

34
Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/k210_ch438.h
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@ -53,6 +53,7 @@
#include <stdlib.h>
#include <fcntl.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "riscv_internal.h"
@ -289,39 +290,6 @@
#define Fpclk 1843200 /* Define the internal clock frequency*/
/* Define CH438 PIN NUM */
#define CH438_ALE_PIN 24
#define CH438_NWR_PIN 25
#define CH438_NRD_PIN 26
#define CH438_D0_PIN 27
#define CH438_D1_PIN 28
#define CH438_D2_PIN 29
#define CH438_D3_PIN 30
#define CH438_D4_PIN 31
#define CH438_D5_PIN 32
#define CH438_D6_PIN 33
#define CH438_D7_PIN 34
#define CH438_INT_PIN 35
/* Define ch438 FPIOA NUMBER */
#define FPIOA_CH438_ALE 11
#define FPIOA_CH438_NWR 12
#define FPIOA_CH438_NRD 13
#define FPIOA_CH438_D0 14
#define FPIOA_CH438_D1 15
#define FPIOA_CH438_D2 16
#define FPIOA_CH438_D3 17
#define FPIOA_CH438_D4 18
#define FPIOA_CH438_D5 29
#define FPIOA_CH438_D6 20
#define FPIOA_CH438_D7 31
#define FPIOA_CH438_INT 22
/* ch438 debug */
#ifdef CONFIG_DEBUG_CH438_ERROR
# define ch438err _err

10
Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/k210_gpio.c
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@ -34,7 +34,7 @@
#include <arch/irq.h>
#include <nuttx/ioexpander/gpio.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "k210_fpioa.h"
@ -48,15 +48,7 @@
/* Pin 1 and 2 are used for this example as GPIO outputs. */
#define GPIO_E220_M0 44
#define GPIO_E220_M1 45
#define GPIO_E18_MODE 46
#define GPIO_WIFI_EN 8
#define FPIOA_E220_M0 1
#define FPIOA_E220_M1 2
#define FPIOA_E18_MODE 3
#define FPIOA_WIFI_EN 4
/****************************************************************************
* Private Types

2
Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/k210_leds.c
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@ -25,7 +25,7 @@
#include <nuttx/config.h>
#include <nuttx/board.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "k210_fpioa.h"