From 9ac84e7cb41f155ca0bdc79b96b064fbcd9e7aab Mon Sep 17 00:00:00 2001 From: Liu_Kai Date: Tue, 26 Apr 2022 17:36:34 +0800 Subject: [PATCH 01/46] add ch438 driver and a demo --- .../aiit_board/xidatong/src/Makefile | 2 +- .../aiit_board/xidatong/src/ch438_demo.c | 71 +++ .../aiit_board/xidatong/src/imxrt_ch438.c | 558 ++++++++++++++++++ .../aiit_board/xidatong/src/imxrt_ch438.h | 297 ++++++++++ .../app_match_nuttx/apps/nshlib/nsh.h | 2 + .../apps/nshlib/nsh_Applicationscmd.c | 11 + .../app_match_nuttx/apps/nshlib/nsh_command.c | 2 + 7 files changed, 942 insertions(+), 1 deletion(-) create mode 100644 Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c create mode 100644 Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c create mode 100644 Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/Makefile b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/Makefile index 6ab31a006..78724725c 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/Makefile +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/Makefile @@ -20,7 +20,7 @@ include $(TOPDIR)/Make.defs -CSRCS = imxrt_boot.c imxrt_flexspi_nor_boot.c imxrt_flexspi_nor_flash.c +CSRCS = imxrt_boot.c imxrt_flexspi_nor_boot.c imxrt_flexspi_nor_flash.c imxrt_ch438.c ch438_demo.c ifeq ($(CONFIG_IMXRT_SDRAMC),y) CSRCS += imxrt_sdram.c diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c new file mode 100644 index 000000000..7a976f39e --- /dev/null +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c @@ -0,0 +1,71 @@ +/**************************************************************************** + * apps/examples/sx127x_demo/sx127x_demo.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/** +* @file ch438_demo.c +* @brief nuttx source code +* https://github.com/apache/incubator-nuttx-apps +* @version 10.2.0 +* @author AIIT XUOS Lab +* @date 2022-03-17 +*/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "imxrt_ch438.h" + +#define TMP (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \ + GPIO_PORT3 | GPIO_PIN3) + +void CH438Demo(void) +{ + int i=0; + printf("ch438_main\n"); + Ch438InitDefault(); + ch438_irq_enable(); + up_mdelay(1000); + while(1) + { + CH438UARTSend(2,"AT+BAUD=?",9); + printf("send success\n"); + ImxrtCh438ReadData(NULL); + up_mdelay(2000); + } +} diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c new file mode 100644 index 000000000..9d0fd5495 --- /dev/null +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c @@ -0,0 +1,558 @@ +#include + +#include +#include + +#include +#include +#include + +#include "arm_arch.h" + +#include "imxrt_config.h" +#include "imxrt_irq.h" +#include "imxrt_gpio.h" + +#include "imxrt_ch438.h" +#include "xidatong.h" +#include +#include +#include +#include +#include + + +static pthread_t thr_438; +struct sched_param param; +pthread_attr_t attr = PTHREAD_ATTR_INITIALIZER; + + +static char thr_438_stack[1024]; + + +static sem_t sem_438; /* 用于接收的信号量 */ +/* ch438中断回调函数 */ +static int Ch438Irq(int irq, FAR void *context, FAR void *arg) +{ + sem_post(&sem_438); + up_mdelay(500); + return OK; +} + +void CH438SetOutput(void) +{ + imxrt_config_gpio(CH438_D0_PIN_OUT); + imxrt_config_gpio(CH438_D1_PIN_OUT); + imxrt_config_gpio(CH438_D2_PIN_OUT); + imxrt_config_gpio(CH438_D3_PIN_OUT); + imxrt_config_gpio(CH438_D4_PIN_OUT); + imxrt_config_gpio(CH438_D5_PIN_OUT); + imxrt_config_gpio(CH438_D6_PIN_OUT); + imxrt_config_gpio(CH438_D7_PIN_OUT); + +} +void CH438SetInput(void) +{ + imxrt_config_gpio(CH438_D0_PIN_INPUT); + imxrt_config_gpio(CH438_D1_PIN_INPUT); + imxrt_config_gpio(CH438_D2_PIN_INPUT); + imxrt_config_gpio(CH438_D3_PIN_INPUT); + imxrt_config_gpio(CH438_D4_PIN_INPUT); + imxrt_config_gpio(CH438_D5_PIN_INPUT); + imxrt_config_gpio(CH438_D6_PIN_INPUT); + imxrt_config_gpio(CH438_D7_PIN_INPUT); + +} + + +static uint8_t RevLen ,buff[8][128],buff_ptr[8]; +static uint8_t Interruptnum[8] = {0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,}; /* SSR寄存器中断号对应值 */ +static uint8_t offsetadd[] = {0x00,0x10,0x20,0x30,0x08,0x18,0x28,0x38,}; /* 串口号的偏移地址 */ + +void* ImxrtCh438ReadData(void *parameter) +{ + int result, i; + uint8_t gInterruptStatus; + uint8_t InterruptStatus; + uint8_t ext_uart_no; + static uint8_t dat; + uint8_t REG_LCR_ADDR; + uint8_t REG_DLL_ADDR; + uint8_t REG_DLM_ADDR; + uint8_t REG_IER_ADDR; + uint8_t REG_MCR_ADDR; + uint8_t REG_FCR_ADDR; + uint8_t REG_RBR_ADDR; + uint8_t REG_THR_ADDR; + uint8_t REG_IIR_ADDR; + uint8_t REG_LSR_ADDR; + uint8_t REG_MSR_ADDR; + // struct timespec abstime; + // abstime.tv_sec = 2; + // while (1) + // { + printf("sem_438 is %d\n",sem_438.semcount); + result = sem_wait(&sem_438); + if (result == OK) + { + gInterruptStatus = ReadCH438Data( REG_SSR_ADDR ); + printf("gInterruptStatus is %d\n", gInterruptStatus); + if(!gInterruptStatus) + { + + } + else + { + // for(ext_uart_no=0; ext_uart_no<8; ext_uart_no++) + // { + ext_uart_no = 2; + if( gInterruptStatus & Interruptnum[ext_uart_no] ) /* 检测哪个串口发生中断 */ + { + + REG_LCR_ADDR = offsetadd[ext_uart_no] | REG_LCR0_ADDR; + REG_DLL_ADDR = offsetadd[ext_uart_no] | REG_DLL0_ADDR; + REG_DLM_ADDR = offsetadd[ext_uart_no] | REG_DLM0_ADDR; + REG_IER_ADDR = offsetadd[ext_uart_no] | REG_IER0_ADDR; + REG_MCR_ADDR = offsetadd[ext_uart_no] | REG_MCR0_ADDR; + REG_FCR_ADDR = offsetadd[ext_uart_no] | REG_FCR0_ADDR; + REG_RBR_ADDR = offsetadd[ext_uart_no] | REG_RBR0_ADDR; + REG_THR_ADDR = offsetadd[ext_uart_no] | REG_THR0_ADDR; + REG_IIR_ADDR = offsetadd[ext_uart_no] | REG_IIR0_ADDR; + REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR; + REG_MSR_ADDR = offsetadd[ext_uart_no] | REG_MSR0_ADDR; + + InterruptStatus = ReadCH438Data( REG_IIR_ADDR ) & 0x0f; /* 读串口的中断状态 */ + printf("InterruptStatus is %d\n", InterruptStatus); + + switch( InterruptStatus ) + { + case INT_NOINT: /* 没有中断 */ + break; + case INT_THR_EMPTY: /* THR空中断 */ +// ReadCH438Data( REG_IIR_ADDR ); + break; + case INT_RCV_OVERTIME: /* 接收超时中断，收到数据后一般是触发这个 。在收到一帧数据后4个数据时间没有后续的数据时触发*/ + case INT_RCV_SUCCESS: /* 接收数据可用中断。这是一个数据帧超过缓存了才发生，否则一般是前面的超时中断。处理过程同上面的超时中断 */ + RevLen = CH438UARTRcv(ext_uart_no, buff[ext_uart_no]); + for(i=0;i> 4 ) / baud_rate; + DLM = div >> 8; + DLL = div & 0xff; + WriteCH438Data( REG_DLL_ADDR, DLL ); /* 设置波特率 */ + WriteCH438Data( REG_DLM_ADDR, DLM ); + WriteCH438Data( REG_FCR_ADDR, BIT_FCR_RECVTG1 | BIT_FCR_RECVTG0 | BIT_FCR_FIFOEN ); /* 设置FIFO模式，触发点为112字节 */ + + WriteCH438Data( REG_LCR_ADDR, BIT_LCR_WORDSZ1 | BIT_LCR_WORDSZ0 ); /* 字长8位，1位停止位、无校验 */ + + // if(ext_uart_no==1) + // WriteCH438Data( REG_IER_ADDR, 0x00 ); /* 使能中断 */ + // else + WriteCH438Data( REG_IER_ADDR, /*BIT_IER_IEMODEM | BIT_IER_IETHRE | BIT_IER_IELINES | */BIT_IER_IERECV ); /* 使能中断 */ + + WriteCH438Data( REG_MCR_ADDR, BIT_MCR_OUT2 );// | BIT_MCR_RTS | BIT_MCR_DTR ); /* 允许中断输出,DTR,RTS为1 */ + + WriteCH438Data(REG_FCR_ADDR,ReadCH438Data(REG_FCR_ADDR)| BIT_FCR_TFIFORST); /* 清空FIFO中的数据 */ + +} + + + +/********************************************************************************************************* +** 函数名称: ReadCH438Data +** 功能描述: 接口函数，从CH438地址读取数据 +** 输　入: 地址 +** +** 输　出: 数据 +** +** 日　期: 2011年8月26日 +**------------------------------------------------------------------------------------------------------- +** 修改人: +** 日　期: +**------------------------------------------------------------------------------------------------------- +********************************************************************************************************/ +static uint8_t ReadCH438Data( uint8_t addr ) +{ +//读函数 + +//ALE WR RD线空闲都为高电平，读取数据时候先将地址放在并口，然后拉低ALE锁存地址，延时保持 + +//切换引脚输入，拉低RD读信号线，延时等待，读取并口上数据 + +//撤销RD，撤销ALE + uint8_t dat; + +// imxrt_gpio_write(CH438_NCS_PIN,true); + imxrt_gpio_write(CH438_NWR_PIN, true); + imxrt_gpio_write(CH438_NRD_PIN, true); + imxrt_gpio_write(CH438_ALE_PIN, true); + + CH438SetOutput(); + up_udelay(1); + + if(addr &0x80) imxrt_gpio_write(CH438_D7_PIN_OUT, true); else imxrt_gpio_write(CH438_D7_PIN_OUT, false); + if(addr &0x40) imxrt_gpio_write(CH438_D6_PIN_OUT, true); else imxrt_gpio_write(CH438_D6_PIN_OUT, false); + if(addr &0x20) imxrt_gpio_write(CH438_D5_PIN_OUT, true); else imxrt_gpio_write(CH438_D5_PIN_OUT, false); + if(addr &0x10) imxrt_gpio_write(CH438_D4_PIN_OUT, true); else imxrt_gpio_write(CH438_D4_PIN_OUT, false); + if(addr &0x08) imxrt_gpio_write(CH438_D3_PIN_OUT, true); else imxrt_gpio_write(CH438_D3_PIN_OUT, false); + if(addr &0x04) imxrt_gpio_write(CH438_D2_PIN_OUT, true); else imxrt_gpio_write(CH438_D2_PIN_OUT, false); + if(addr &0x02) imxrt_gpio_write(CH438_D1_PIN_OUT, true); else imxrt_gpio_write(CH438_D1_PIN_OUT, false); + if(addr &0x01) imxrt_gpio_write(CH438_D0_PIN_OUT, true); else imxrt_gpio_write(CH438_D0_PIN_OUT, false); + + up_udelay(1); + + imxrt_gpio_write(CH438_ALE_PIN, false); + + up_udelay(1); + + CH438SetInput(); + up_udelay(1); + + imxrt_gpio_write(CH438_NRD_PIN, false); + + up_udelay(1); + + dat = 0; + if (imxrt_gpio_read(CH438_D7_PIN_INPUT)) dat |= 0x80; + if (imxrt_gpio_read(CH438_D6_PIN_INPUT)) dat |= 0x40; + if (imxrt_gpio_read(CH438_D5_PIN_INPUT)) dat |= 0x20; + if (imxrt_gpio_read(CH438_D4_PIN_INPUT)) dat |= 0x10; + if (imxrt_gpio_read(CH438_D3_PIN_INPUT)) dat |= 0x08; + if (imxrt_gpio_read(CH438_D2_PIN_INPUT)) dat |= 0x04; + if (imxrt_gpio_read(CH438_D1_PIN_INPUT)) dat |= 0x02; + if (imxrt_gpio_read(CH438_D0_PIN_INPUT)) dat |= 0x01; + + imxrt_gpio_write(CH438_NRD_PIN, true); + imxrt_gpio_write(CH438_ALE_PIN, true); + + up_udelay(1); + + return dat; + +} + +static void WriteCH438Data( uint8_t addr, uint8_t dat) +{ + imxrt_gpio_write(CH438_ALE_PIN, true); + imxrt_gpio_write(CH438_NRD_PIN, true); + imxrt_gpio_write(CH438_NWR_PIN, true); + + CH438SetOutput(); + up_udelay(1); + + if(addr &0x80) imxrt_gpio_write(CH438_D7_PIN_OUT, true); else imxrt_gpio_write(CH438_D7_PIN_OUT, false); + if(addr &0x40) imxrt_gpio_write(CH438_D6_PIN_OUT, true); else imxrt_gpio_write(CH438_D6_PIN_OUT, false); + if(addr &0x20) imxrt_gpio_write(CH438_D5_PIN_OUT, true); else imxrt_gpio_write(CH438_D5_PIN_OUT, false); + if(addr &0x10) imxrt_gpio_write(CH438_D4_PIN_OUT, true); else imxrt_gpio_write(CH438_D4_PIN_OUT, false); + if(addr &0x08) imxrt_gpio_write(CH438_D3_PIN_OUT, true); else imxrt_gpio_write(CH438_D3_PIN_OUT, false); + if(addr &0x04) imxrt_gpio_write(CH438_D2_PIN_OUT, true); else imxrt_gpio_write(CH438_D2_PIN_OUT, false); + if(addr &0x02) imxrt_gpio_write(CH438_D1_PIN_OUT, true); else imxrt_gpio_write(CH438_D1_PIN_OUT, false); + if(addr &0x01) imxrt_gpio_write(CH438_D0_PIN_OUT, true); else imxrt_gpio_write(CH438_D0_PIN_OUT, false); + + up_udelay(1); + + imxrt_gpio_write(CH438_ALE_PIN, false); + up_udelay(1); + + if(dat &0x80) imxrt_gpio_write(CH438_D7_PIN_OUT, true); else imxrt_gpio_write(CH438_D7_PIN_OUT, false); + if(dat &0x40) imxrt_gpio_write(CH438_D6_PIN_OUT, true); else imxrt_gpio_write(CH438_D6_PIN_OUT, false); + if(dat &0x20) imxrt_gpio_write(CH438_D5_PIN_OUT, true); else imxrt_gpio_write(CH438_D5_PIN_OUT, false); + if(dat &0x10) imxrt_gpio_write(CH438_D4_PIN_OUT, true); else imxrt_gpio_write(CH438_D4_PIN_OUT, false); + if(dat &0x08) imxrt_gpio_write(CH438_D3_PIN_OUT, true); else imxrt_gpio_write(CH438_D3_PIN_OUT, false); + if(dat &0x04) imxrt_gpio_write(CH438_D2_PIN_OUT, true); else imxrt_gpio_write(CH438_D2_PIN_OUT, false); + if(dat &0x02) imxrt_gpio_write(CH438_D1_PIN_OUT, true); else imxrt_gpio_write(CH438_D1_PIN_OUT, false); + if(dat &0x01) imxrt_gpio_write(CH438_D0_PIN_OUT, true); else imxrt_gpio_write(CH438_D0_PIN_OUT, false); + + up_udelay(1); + + imxrt_gpio_write(CH438_NWR_PIN, false); + + up_udelay(1); + + imxrt_gpio_write(CH438_NWR_PIN, true); + imxrt_gpio_write(CH438_ALE_PIN, true); + + up_udelay(1); + + CH438SetInput(); + + return; +} + + + +/********************************************************************************************************* +** 函数名称: WriteCH438Block +** 功能描述: 接口函数，从CH438地址写入数据块 +** 输　入: CH438寄存器地址,数据块长度,数据缓冲区地址 +** +** 输　出: 无 +** +** 日　期: 2011年8月26日 +**------------------------------------------------------------------------------------------------------- +** 修改人: +** 日　期: +**------------------------------------------------------------------------------------------------------- +********************************************************************************************************/ +static void WriteCH438Block( uint8_t mAddr, uint8_t mLen, uint8_t *mBuf ) +{ + + while ( mLen -- ) + WriteCH438Data( mAddr, *mBuf++ ); + +} + + +///********************************************************************************************************* +//** 函数名称: CH438UARTSend +//** 功能描述: 功能函数，启用FIFO模式, 用于CH438串口0 发送多字节数据 单次最多发送128字节数据 +//** 输　入: 发送数据缓冲区地址, 发送数据块长度 +//** +//** 输　出: 无 +//** +//** 日　期: 2011年8月26日 +//**------------------------------------------------------------------------------------------------------- +//** 修改人: +//** 日　期: +//**------------------------------------------------------------------------------------------------------- +//********************************************************************************************************/ +void CH438UARTSend( uint8_t ext_uart_no, uint8_t *Data, uint8_t Num ) +{ + uint8_t REG_LSR_ADDR,REG_THR_ADDR; + + REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR; + REG_THR_ADDR = offsetadd[ext_uart_no] | REG_THR0_ADDR; + + while( 1 ) + { + + while( ( ReadCH438Data( REG_LSR_ADDR ) & BIT_LSR_TEMT ) == 0 ); /* 等待数据发送完毕，THR,TSR全空 */ + + if( Num <= 128 ) + { + + WriteCH438Block( REG_THR_ADDR, Num, Data ); + + break; + + } + + else + { + + WriteCH438Block( REG_THR_ADDR, 128, Data ); + + Num -= 128; + + Data += 128; + + } + + } +} + + + +/********************************************************************************************************* +** 函数名称: CH438UARTRcv +** 功能描述: 功能函数，禁用FIFO模式, 用于CH438串口0 接收多字节数据 +** 输　入: 接收数据缓冲区地址 +** +** 输　出: 接收数据长度 +** +** 日　期: 2011年8月26日 +**------------------------------------------------------------------------------------------------------- +** 修改人: +** 日　期: +**------------------------------------------------------------------------------------------------------- +********************************************************************************************************/ + +uint8_t CH438UARTRcv( uint8_t ext_uart_no, uint8_t* buf ) +{ + uint8_t RcvNum = 0; + uint8_t dat = 0; + uint8_t REG_LSR_ADDR,REG_RBR_ADDR; + uint8_t *p_rev; + + p_rev = buf; + + REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR; + REG_RBR_ADDR = offsetadd[ext_uart_no] | REG_RBR0_ADDR; + + +// if( !( ReadCH438Data( REG_LSR_ADDR ) & ( BIT_LSR_BREAKINT | BIT_LSR_FRAMEERR | BIT_LSR_PARERR | BIT_LSR_OVERR ) ) ) /* b1-b4无错误 */ + // if( !( dat & ( BIT_LSR_BREAKINT | BIT_LSR_FRAMEERR | BIT_LSR_PARERR | BIT_LSR_OVERR ) ) ) /* b1-b4无错误 */ 不用管这有没有错误，只管 DATAREADY + { + + while( ( ReadCH438Data( REG_LSR_ADDR ) & BIT_LSR_DATARDY ) == 0 ); /* 等待数据准备好 */ + + while( ( ReadCH438Data( REG_LSR_ADDR ) & BIT_LSR_DATARDY ) == 0x01 ) + { + +// *buf++ = ReadCH438Data( REG_RBR_ADDR ); /* 从接收缓冲寄存器读出数据 */ + dat = ReadCH438Data( REG_RBR_ADDR ); + + buff[ext_uart_no][buff_ptr[ext_uart_no]] = dat; + + buff_ptr[ext_uart_no] = buff_ptr[ext_uart_no] + 1; + if (buff_ptr[ext_uart_no] == 128) + buff_ptr[ext_uart_no] = 0; + + RcvNum = RcvNum + 1; + + } + + + + } + +// else ReadCH438Data( REG_RBR_ADDR ); + + return( RcvNum ); +} \ No newline at end of file diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h new file mode 100644 index 000000000..62b6c970c --- /dev/null +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h @@ -0,0 +1,297 @@ +#ifndef __QC_TEST_CH438__ +#define __QC_TEST_CH438__ + +#include "xidatong.h" + +/******************************************************************************************/ + +/* 芯片定义 */ +/* CH438串口0寄存器地址 */ + +#define REG_RBR0_ADDR 0x00 /* 串口0接收缓冲寄存器地址 */ +#define REG_THR0_ADDR 0x00 /* 串口0发送保持寄存器地址 */ +#define REG_IER0_ADDR 0x01 /* 串口0中断使能寄存器地址 */ +#define REG_IIR0_ADDR 0x02 /* 串口0中断识别寄存器地址 */ +#define REG_FCR0_ADDR 0x02 /* 串口0FIFO控制寄存器地址 */ +#define REG_LCR0_ADDR 0x03 /* 串口0线路控制寄存器地址 */ +#define REG_MCR0_ADDR 0x04 /* 串口0MODEM控制寄存器地址 */ +#define REG_LSR0_ADDR 0x05 /* 串口0线路状态寄存器地址 */ +#define REG_MSR0_ADDR 0x06 /* 串口0MODEM状态寄存器地址 */ +#define REG_SCR0_ADDR 0x07 /* 串口0用户可定义寄存器地址 */ +#define REG_DLL0_ADDR 0x00 /* 波特率除数锁存器低8位字节地址 */ +#define REG_DLM0_ADDR 0x01 /* 波特率除数锁存器高8位字节地址 */ + +/* CH438串口1寄存器地址 */ + +#define REG_RBR1_ADDR 0x10 /* 串口1接收缓冲寄存器地址 */ +#define REG_THR1_ADDR 0x10 /* 串口1发送保持寄存器地址 */ +#define REG_IER1_ADDR 0x11 /* 串口1中断使能寄存器地址 */ +#define REG_IIR1_ADDR 0x12 /* 串口1中断识别寄存器地址 */ +#define REG_FCR1_ADDR 0x12 /* 串口1FIFO控制寄存器地址 */ +#define REG_LCR1_ADDR 0x13 /* 串口1线路控制寄存器地址 */ +#define REG_MCR1_ADDR 0x14 /* 串口1MODEM控制寄存器地址 */ +#define REG_LSR1_ADDR 0x15 /* 串口1线路状态寄存器地址 */ +#define REG_MSR1_ADDR 0x16 /* 串口1MODEM状态寄存器地址 */ +#define REG_SCR1_ADDR 0x17 /* 串口1用户可定义寄存器地址 */ +#define REG_DLL1_ADDR 0x10 /* 波特率除数锁存器低8位字节地址 */ +#define REG_DLM1_ADDR 0x11 /* 波特率除数锁存器高8位字节地址 */ + + +/* CH438串口2寄存器地址 */ + +#define REG_RBR2_ADDR 0x20 /* 串口2接收缓冲寄存器地址 */ +#define REG_THR2_ADDR 0x20 /* 串口2发送保持寄存器地址 */ +#define REG_IER2_ADDR 0x21 /* 串口2中断使能寄存器地址 */ +#define REG_IIR2_ADDR 0x22 /* 串口2中断识别寄存器地址 */ +#define REG_FCR2_ADDR 0x22 /* 串口2FIFO控制寄存器地址 */ +#define REG_LCR2_ADDR 0x23 /* 串口2线路控制寄存器地址 */ +#define REG_MCR2_ADDR 0x24 /* 串口2MODEM控制寄存器地址 */ +#define REG_LSR2_ADDR 0x25 /* 串口2线路状态寄存器地址 */ +#define REG_MSR2_ADDR 0x26 /* 串口2MODEM状态寄存器地址 */ +#define REG_SCR2_ADDR 0x27 /* 串口2用户可定义寄存器地址 */ +#define REG_DLL2_ADDR 0x20 /* 波特率除数锁存器低8位字节地址 */ +#define REG_DLM2_ADDR 0x21 /* 波特率除数锁存器高8位字节地址 */ + + + +/* CH438串口3寄存器地址 */ + +#define REG_RBR3_ADDR 0x30 /* 串口3接收缓冲寄存器地址 */ +#define REG_THR3_ADDR 0x30 /* 串口3发送保持寄存器地址 */ +#define REG_IER3_ADDR 0x31 /* 串口3中断使能寄存器地址 */ +#define REG_IIR3_ADDR 0x32 /* 串口3中断识别寄存器地址 */ +#define REG_FCR3_ADDR 0x32 /* 串口3FIFO控制寄存器地址 */ +#define REG_LCR3_ADDR 0x33 /* 串口3线路控制寄存器地址 */ +#define REG_MCR3_ADDR 0x34 /* 串口3MODEM控制寄存器地址 */ +#define REG_LSR3_ADDR 0x35 /* 串口3线路状态寄存器地址 */ +#define REG_MSR3_ADDR 0x36 /* 串口3MODEM状态寄存器地址 */ +#define REG_SCR3_ADDR 0x37 /* 串口3用户可定义寄存器地址 */ +#define REG_DLL3_ADDR 0x30 /* 波特率除数锁存器低8位字节地址 */ +#define REG_DLM3_ADDR 0x31 /* 波特率除数锁存器高8位字节地址 */ + + +/* CH438串口4寄存器地址 */ + +#define REG_RBR4_ADDR 0x08 /* 串口4接收缓冲寄存器地址 */ +#define REG_THR4_ADDR 0x08 /* 串口4发送保持寄存器地址 */ +#define REG_IER4_ADDR 0x09 /* 串口4中断使能寄存器地址 */ +#define REG_IIR4_ADDR 0x0A /* 串口4中断识别寄存器地址 */ +#define REG_FCR4_ADDR 0x0A /* 串口4FIFO控制寄存器地址 */ +#define REG_LCR4_ADDR 0x0B /* 串口4线路控制寄存器地址 */ +#define REG_MCR4_ADDR 0x0C /* 串口4MODEM控制寄存器地址 */ +#define REG_LSR4_ADDR 0x0D /* 串口4线路状态寄存器地址 */ +#define REG_MSR4_ADDR 0x0E /* 串口4MODEM状态寄存器地址 */ +#define REG_SCR4_ADDR 0x0F /* 串口4用户可定义寄存器地址 */ +#define REG_DLL4_ADDR 0x08 /* 波特率除数锁存器低8位字节地址 */ +#define REG_DLM4_ADDR 0x09 /* 波特率除数锁存器高8位字节地址 */ + + + +/* CH438串口5寄存器地址 */ + +#define REG_RBR5_ADDR 0x18 /* 串口5接收缓冲寄存器地址 */ +#define REG_THR5_ADDR 0x18 /* 串口5发送保持寄存器地址 */ +#define REG_IER5_ADDR 0x19 /* 串口5中断使能寄存器地址 */ +#define REG_IIR5_ADDR 0x1A /* 串口5中断识别寄存器地址 */ +#define REG_FCR5_ADDR 0x1A /* 串口5FIFO控制寄存器地址 */ +#define REG_LCR5_ADDR 0x1B /* 串口5线路控制寄存器地址 */ +#define REG_MCR5_ADDR 0x1C /* 串口5MODEM控制寄存器地址 */ +#define REG_LSR5_ADDR 0x1D /* 串口5线路状态寄存器地址 */ +#define REG_MSR5_ADDR 0x1E /* 串口5MODEM状态寄存器地址 */ +#define REG_SCR5_ADDR 0x1F /* 串口5用户可定义寄存器地址 */ +#define REG_DLL5_ADDR 0x18 /* 波特率除数锁存器低8位字节地址 */ +#define REG_DLM5_ADDR 0x19 /* 波特率除数锁存器高8位字节地址 */ + + +/* CH438串口6寄存器地址 */ + +#define REG_RBR6_ADDR 0x28 /* 串口6接收缓冲寄存器地址 */ +#define REG_THR6_ADDR 0x28 /* 串口6发送保持寄存器地址 */ +#define REG_IER6_ADDR 0x29 /* 串口6中断使能寄存器地址 */ +#define REG_IIR6_ADDR 0x2A /* 串口6中断识别寄存器地址 */ +#define REG_FCR6_ADDR 0x2A /* 串口6FIFO控制寄存器地址 */ +#define REG_LCR6_ADDR 0x2B /* 串口6线路控制寄存器地址 */ +#define REG_MCR6_ADDR 0x2C /* 串口6MODEM控制寄存器地址 */ +#define REG_LSR6_ADDR 0x2D /* 串口6线路状态寄存器地址 */ +#define REG_MSR6_ADDR 0x2E /* 串口6MODEM状态寄存器地址 */ +#define REG_SCR6_ADDR 0x2F /* 串口6用户可定义寄存器地址 */ +#define REG_DLL6_ADDR 0x28 /* 波特率除数锁存器低8位字节地址 */ +#define REG_DLM6_ADDR 0x29 /* 波特率除数锁存器高8位字节地址 */ + + +/* CH438串口7寄存器地址 */ + +#define REG_RBR7_ADDR 0x38 /* 串口7接收缓冲寄存器地址 */ +#define REG_THR7_ADDR 0x38 /* 串口7发送保持寄存器地址 */ +#define REG_IER7_ADDR 0x39 /* 串口7中断使能寄存器地址 */ +#define REG_IIR7_ADDR 0x3A /* 串口7中断识别寄存器地址 */ +#define REG_FCR7_ADDR 0x3A /* 串口7FIFO控制寄存器地址 */ +#define REG_LCR7_ADDR 0x3B /* 串口7线路控制寄存器地址 */ +#define REG_MCR7_ADDR 0x3C /* 串口7MODEM控制寄存器地址 */ +#define REG_LSR7_ADDR 0x3D /* 串口7线路状态寄存器地址 */ +#define REG_MSR7_ADDR 0x3E /* 串口7MODEM状态寄存器地址 */ +#define REG_SCR7_ADDR 0x3F /* 串口7用户可定义寄存器地址 */ +#define REG_DLL7_ADDR 0x38 /* 波特率除数锁存器低8位字节地址 */ +#define REG_DLM7_ADDR 0x39 /* 波特率除数锁存器高8位字节地址 */ + + + +/* CH438内部串口0~7 专用状态寄存器 */ +#define REG_SSR_ADDR 0x4F /* 专用状态寄存器地址 */ + + +/* IER寄存器的位 */ + +#define BIT_IER_RESET 0x80 /* 该位置1则软复位该串口 */ +#define BIT_IER_LOWPOWER 0x40 /* 该位为1则关闭该串口的内部基准时钟 */ +#define BIT_IER_SLP 0x20 /* 串口0是SLP,为1则关闭时钟震荡器 */ +#define BIT_IER1_CK2X 0x20 /* 串口1是CK2X,为1则强制将外部时钟信号2倍频后作为内部基准时钟 */ +#define BIT_IER_IEMODEM 0x08 /* 该位为1允许MODEM输入状态变化中断 */ +#define BIT_IER_IELINES 0x04 /* 该位为1允许接收线路状态中断 */ +#define BIT_IER_IETHRE 0x02 /* 该位为1允许发送保持寄存器空中断 */ +#define BIT_IER_IERECV 0x01 /* 该位为1允许接收到数据中断 */ + +/* IIR寄存器的位 */ + +#define BIT_IIR_FIFOENS1 0x80 +#define BIT_IIR_FIFOENS0 0x40 /* 该2位为1表示起用FIFO */ + +/* 中断类型：0001没有中断，0110接收线路状态中断，0100接收数据可用中断， +1100接收数据超时中断，0010THR寄存器空中断，0000MODEM输入变化中断 */ +#define BIT_IIR_IID3 0x08 +#define BIT_IIR_IID2 0x04 +#define BIT_IIR_IID1 0x02 +#define BIT_IIR_NOINT 0x01 + +/* FCR寄存器的位 */ + +/* 触发点： 00对应1个字节，01对应16个字节，10对应64个字节，11对应112个字节 */ +#define BIT_FCR_RECVTG1 0x80 /* 设置FIFO的中断和自动硬件流控制的触发点 */ +#define BIT_FCR_RECVTG0 0x40 /* 设置FIFO的中断和自动硬件流控制的触发点 */ + +#define BIT_FCR_TFIFORST 0x04 /* 该位置1则清空发送FIFO中的数据 */ +#define BIT_FCR_RFIFORST 0x02 /* 该位置1则清空接收FIFO中的数据 */ +#define BIT_FCR_FIFOEN 0x01 /* 该位置1则起用FIFO,为0则禁用FIFO */ + +/* LCR寄存器的位 */ + +#define BIT_LCR_DLAB 0x80 /* 为1才能存取DLL，DLM，为0才能存取RBR/THR/IER */ +#define BIT_LCR_BREAKEN 0x40 /* 为1则强制产生BREAK线路间隔*/ + +/* 设置校验格式：当PAREN为1时，00奇校验，01偶校验，10标志位（MARK，置1)，11空白位（SPACE，清0) */ +#define BIT_LCR_PARMODE1 0x20 /* 设置奇偶校验位格式 */ +#define BIT_LCR_PARMODE0 0x10 /* 设置奇偶校验位格式 */ + +#define BIT_LCR_PAREN 0x08 /* 为1则允许发送时产生和接收校验奇偶校验位 */ +#define BIT_LCR_STOPBIT 0x04 /* 为1则两个停止位,为0一个停止位 */ + +/* 设置字长度：00则5个数据位，01则6个数据位，10则7个数据位，11则8个数据位 */ +#define BIT_LCR_WORDSZ1 0x02 /* 设置字长长度 */ +#define BIT_LCR_WORDSZ0 0x01 + +/* MCR寄存器的位 */ + +#define BIT_MCR_AFE 0x20 /* 为1允许CTS和RTS硬件自动流控制 */ +#define BIT_MCR_LOOP 0x10 /* 为1使能内部回路的测试模式 */ +#define BIT_MCR_OUT2 0x08 /* 为1允许该串口的中断请求输出 */ +#define BIT_MCR_OUT1 0x04 /* 为用户定义的MODEM控制位 */ +#define BIT_MCR_RTS 0x02 /* 该位为1则RTS引脚输出有效 */ +#define BIT_MCR_DTR 0x01 /* 该位为1则DTR引脚输出有效 */ + +/* LSR寄存器的位 */ + +#define BIT_LSR_RFIFOERR 0x80 /* 为1表示在接收FIFO中存在至少一个错误 */ +#define BIT_LSR_TEMT 0x40 /* 为1表示THR和TSR全空 */ +#define BIT_LSR_THRE 0x20 /* 为1表示THR空*/ +#define BIT_LSR_BREAKINT 0x10 /* 该位为1表示检测到BREAK线路间隔 */ +#define BIT_LSR_FRAMEERR 0x08 /* 该位为1表示读取数据帧错误 */ +#define BIT_LSR_PARERR 0x04 /* 该位为1表示奇偶校验错误 */ +#define BIT_LSR_OVERR 0x02 /* 为1表示接收FIFO缓冲区溢出 */ +#define BIT_LSR_DATARDY 0x01 /* 该位为1表示接收FIFO中有接收到的数据 */ + +/* MSR寄存器的位 */ + +#define BIT_MSR_DCD 0x80 /* 该位为1表示DCD引脚有效 */ +#define BIT_MSR_RI 0x40 /* 该位为1表示RI引脚有效 */ +#define BIT_MSR_DSR 0x20 /* 该位为1表示DSR引脚有效 */ +#define BIT_MSR_CTS 0x10 /* 该位为1表示CTS引脚有效 */ +#define BIT_MSR_DDCD 0x08 /* 该位为1表示DCD引脚输入状态发生变化过 */ +#define BIT_MSR_TERI 0x04 /* 该位为1表示RI引脚输入状态发生变化过 */ +#define BIT_MSR_DDSR 0x02 /* 该位为1表示DSR引脚输入状态发生变化过 */ +#define BIT_MSR_DCTS 0x01 /* 该位为1表示CTS引脚输入状态发生变化过 */ + +/* 中断状态码 */ + +#define INT_NOINT 0x01 /* 没有中断 */ +#define INT_THR_EMPTY 0x02 /* THR空中断 */ +#define INT_RCV_OVERTIME 0x0C /* 接收超时中断 */ +#define INT_RCV_SUCCESS 0x04 /* 接收数据可用中断 */ +#define INT_RCV_LINES 0x06 /* 接收线路状态中断 */ +#define INT_MODEM_CHANGE 0x00 /* MODEM输入变化中断 */ + +#define CH438_IIR_FIFOS_ENABLED 0xC0 /* 起用FIFO */ + + +#define Fpclk 1843200 /* 定义内部时钟频率 */ + + +// #define IOMUX_CH438OUT_DEFAULT +#define CH438_D0_PIN_OUT (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \ + GPIO_PORT1 | GPIO_PIN25) +#define CH438_D1_PIN_OUT (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \ + GPIO_PORT1 | GPIO_PIN24) +#define CH438_D2_PIN_OUT (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \ + GPIO_PORT1 | GPIO_PIN20) +#define CH438_D3_PIN_OUT (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \ + GPIO_PORT1 | GPIO_PIN21) +#define CH438_D4_PIN_OUT (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \ + GPIO_PORT1 | GPIO_PIN31) +#define CH438_D5_PIN_OUT (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \ + GPIO_PORT1 | GPIO_PIN28) +#define CH438_D6_PIN_OUT (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \ + GPIO_PORT1 | GPIO_PIN30) +#define CH438_D7_PIN_OUT (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \ + GPIO_PORT1 | GPIO_PIN29) +#define CH438_NWR_PIN (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \ + GPIO_PORT3 | GPIO_PIN4) +#define CH438_NRD_PIN (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \ + GPIO_PORT3 | GPIO_PIN5) +#define CH438_ALE_PIN (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \ + GPIO_PORT3 | GPIO_PIN2) +#define CH438_INT_PIN (GPIO_INTERRUPT | GPIO_INT_FALLINGEDGE | IOMUX_SW_DEFAULT | \ + GPIO_PORT3 | GPIO_PIN3) + +#define CH438_D0_PIN_INPUT (GPIO_INPUT | \ + GPIO_PORT1 | GPIO_PIN25) +#define CH438_D1_PIN_INPUT (GPIO_INPUT | \ + GPIO_PORT1 | GPIO_PIN24) +#define CH438_D2_PIN_INPUT (GPIO_INPUT | \ + GPIO_PORT1 | GPIO_PIN20) +#define CH438_D3_PIN_INPUT (GPIO_INPUT | \ + GPIO_PORT1 | GPIO_PIN21) +#define CH438_D4_PIN_INPUT (GPIO_INPUT | \ + GPIO_PORT1 | GPIO_PIN31) +#define CH438_D5_PIN_INPUT (GPIO_INPUT | \ + GPIO_PORT1 | GPIO_PIN28) +#define CH438_D6_PIN_INPUT (GPIO_INPUT | \ + GPIO_PORT1 | GPIO_PIN30) +#define CH438_D7_PIN_INPUT (GPIO_INPUT | \ + GPIO_PORT1 | GPIO_PIN29) + + +static void ImxrtCH438Init(void); +static void CH438PortInit( uint8_t ext_uart_no,uint32_t baud_rate ); +static void CH438SetOutput(void); +static void CH438SetInput(void); +static uint8_t ReadCH438Data( uint8_t addr ); +static void WriteCH438Data( uint8_t addr, uint8_t dat); +static void WriteCH438Block( uint8_t mAddr, uint8_t mLen, uint8_t *mBuf ) ; + void CH438UARTSend( uint8_t ext_uart_no,uint8_t *Data, uint8_t Num ); +static uint8_t CH438UARTRcv( uint8_t ext_uart_no, uint8_t* buf ); + +void Ch438InitDefault(void); +void ch438_irq_enable(void); + void *ImxrtCh438ReadData(void *parameter); + + +#endif diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h index d46be3f42..11088b6ee 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h @@ -1417,6 +1417,8 @@ int nsh_foreach_var(FAR struct nsh_vtbl_s *vtbl, nsh_foreach_var_t cb, FAR void *arg); #endif +int cmd_Ch438(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv); + #if defined(CONFIG_APPLICATION_SENSOR_HCHO_TB600B_WQ_HCHO1OS) && !defined(CONFIG_NSH_DISABLE_HCHO_TB600B_WQ_HCHO1OS) int cmd_Hcho1os(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv); #endif diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c index 326eb3d75..e8d465b47 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c @@ -38,6 +38,17 @@ extern int FrameworkInit(void); +extern void CH438Demo(void); +int cmd_Ch438(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv) +{ + nsh_output(vtbl, "Hello, world!\n"); + FrameworkInit(); + CH438Demo(); + return OK; +} + + + /**************************************************************************** * Name: cmd_Hcho1os ****************************************************************************/ diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c index d44347b2d..524c32022 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c @@ -590,6 +590,8 @@ static const struct cmdmap_s g_cmdmap[] = { "xd", cmd_xd, 3, 3, " " }, #endif + { "ch438", cmd_Ch438, 1, 1, "[get the concentration of formaldehyde with sensor tb600b_wq_hcho1os.]" }, + #if defined(CONFIG_APPLICATION_SENSOR_HCHO_TB600B_WQ_HCHO1OS) && !defined(CONFIG_NSH_DISABLE_HCHO_TB600B_WQ_HCHO1OS) { "hcho1os", cmd_Hcho1os, 1, 1, "[get the concentration of formaldehyde with sensor tb600b_wq_hcho1os.]" }, #endif From a09caa272f07f8f2eafa27825550aa64350ef47e Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Tue, 26 Apr 2022 18:23:14 +0800 Subject: [PATCH 02/46] support e220 for nuttx on xidatong --- .../Framework/connection/lora/Make.defs | 2 +- .../Framework/connection/lora/e220/Make.defs | 6 ++++ .../transform_layer/nuttx/transform.c | 35 ++----------------- .../transform_layer/nuttx/transform.h | 10 +++--- .../app_match_nuttx/apps/nshlib/Kconfig | 8 +++++ .../app_match_nuttx/apps/nshlib/nsh.h | 8 +++++ .../apps/nshlib/nsh_Applicationscmd.c | 23 +++++++++++- .../app_match_nuttx/apps/nshlib/nsh_command.c | 10 +++++- 8 files changed, 62 insertions(+), 40 deletions(-) create mode 100644 APP_Framework/Framework/connection/lora/e220/Make.defs diff --git a/APP_Framework/Framework/connection/lora/Make.defs b/APP_Framework/Framework/connection/lora/Make.defs index 59f79c833..342ad9396 100644 --- a/APP_Framework/Framework/connection/lora/Make.defs +++ b/APP_Framework/Framework/connection/lora/Make.defs @@ -1,7 +1,7 @@ ############################################################################ # APP_Framework/Framework/connection/lora/Make.defs ############################################################################ -ifneq ($(CONFIG_ADAPTER_SX1278),) +ifneq ($(CONFIG_CONNECTION_ADAPTER_LORA),) CONFIGURED_APPS += $(APPDIR)/../../../APP_Framework/Framework/connection/lora endif include $(wildcard $(APPDIR)/../../../APP_Framework/Framework/connection/lora/*/Make.defs) diff --git a/APP_Framework/Framework/connection/lora/e220/Make.defs b/APP_Framework/Framework/connection/lora/e220/Make.defs new file mode 100644 index 000000000..f6847eeda --- /dev/null +++ b/APP_Framework/Framework/connection/lora/e220/Make.defs @@ -0,0 +1,6 @@ +############################################################################ +# APP_Framework/Framework/connection/lora/e220/Make.defs +############################################################################ +ifneq ($(CONFIG_ADAPTER_E220),) +CONFIGURED_APPS += $(APPDIR)/../../../APP_Framework/Framework/connection/lora/e220 +endif diff --git a/APP_Framework/Framework/transform_layer/nuttx/transform.c b/APP_Framework/Framework/transform_layer/nuttx/transform.c index 45d8d30ec..e8d10d294 100644 --- a/APP_Framework/Framework/transform_layer/nuttx/transform.c +++ b/APP_Framework/Framework/transform_layer/nuttx/transform.c @@ -133,40 +133,9 @@ int PrivWrite(int fd, const void *buf, size_t len) return write(fd, buf, len); } -static int PrivSerialIoctl(int fd, int cmd, void *args) +int PrivIoctl(int fd, int cmd, unsigned long args) { - struct SerialDataCfg *serial_cfg = (struct SerialDataCfg *)args; - return ioctl(fd, cmd, serial_cfg); -} - -static int PrivPinIoctl(int fd, int cmd, void *args) -{ - struct PinParam *pin_cfg = (struct PinParam *)args; - - return ioctl(fd, cmd, pin_cfg); -} - -int PrivIoctl(int fd, int cmd, void *args) -{ - int ret = 0; - struct PrivIoctlCfg *ioctl_cfg = (struct PrivIoctlCfg *)args; - - switch (ioctl_cfg->ioctl_driver_type) - { - case SERIAL_TYPE: - ret = PrivSerialIoctl(fd, cmd, ioctl_cfg->args); - break; - case PIN_TYPE: - ret = PrivPinIoctl(fd, cmd, ioctl_cfg->args); - break; - case I2C_TYPE: - ret = ioctl(fd, cmd, ioctl_cfg->args); - break; - default: - break; - } - - return ret; + return ioctl(fd, cmd, args); } /********************memory api************/ diff --git a/APP_Framework/Framework/transform_layer/nuttx/transform.h b/APP_Framework/Framework/transform_layer/nuttx/transform.h index 1cf6b83fc..4ac1ca2fa 100644 --- a/APP_Framework/Framework/transform_layer/nuttx/transform.h +++ b/APP_Framework/Framework/transform_layer/nuttx/transform.h @@ -28,6 +28,7 @@ #include #include #include +#include typedef uint8_t uint8; typedef uint16_t uint16; @@ -43,10 +44,11 @@ typedef int64_t int64; extern "C" { #endif -#define OPE_INT 0x0000 -#define OPE_CFG 0x0001 +#define OPE_INT 0x0000 +#define OPE_CFG 0x0001 + +#define NAME_NUM_MAX 32 -#define NAME_NUM_MAX 32 /*********************GPIO define*********************/ #define GPIO_LOW 0x00 @@ -201,7 +203,7 @@ int PrivOpen(const char *path, int flags); int PrivRead(int fd, void *buf, size_t len); int PrivWrite(int fd, const void *buf, size_t len); int PrivClose(int fd); -int PrivIoctl(int fd, int cmd, void *args); +int PrivIoctl(int fd, int cmd, unsigned long args); /*********************memory***********************/ diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/Kconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/Kconfig index 3c98cda38..25a54fb13 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/Kconfig +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/Kconfig @@ -659,6 +659,14 @@ config NSH_DISABLE_ADAPTER_4GTEST bool "Disable ec200t Adapter4GTest." default n +config DISABLE_E220_LORATEST + bool "Disable e220 Lora test." + default n + +config DISABLE_E220_LORASEND + bool "Disable e220 Lora send." + default n + config NSH_DISABLE_K210_FFT bool "Disable the K210 fft device." default n diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h index 11088b6ee..f46851a37 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h @@ -1492,6 +1492,14 @@ int cmd_Ch438(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv); int cmd_Adapter4GTest(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv); #endif +#if defined(CONFIG_ADAPTER_LORA_E220) && !defined(CONFIG_NSH_DISABLE_E220_LORATEST) + int cmd_e220loraTest(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv); +#endif + +#if defined(CONFIG_ADAPTER_LORA_E220) && !defined(CONFIG_NSH_DISABLE_E220_LORASEND) + int cmd_e220loraSend(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv); +#endif + #if defined(CONFIG_K210_FFT_TEST) && !defined(CONFIG_NSH_DISABLE_K210_FFT) int cmd_fft(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv); #endif diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c index e8d465b47..47693892d 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c @@ -42,7 +42,6 @@ extern void CH438Demo(void); int cmd_Ch438(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv) { nsh_output(vtbl, "Hello, world!\n"); - FrameworkInit(); CH438Demo(); return OK; } @@ -305,6 +304,28 @@ int cmd_Adapter4GTest(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv) } #endif +#if defined(CONFIG_ADAPTER_LORA_E220) && !defined(CONFIG_NSH_DISABLE_E220_LORATEST) +extern void LoraTest(void); +int cmd_e220loraTest(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv) +{ + nsh_output(vtbl, "Hello, world!\n"); + FrameworkInit(); + LoraTest(); + return OK; +} +#endif + +#if defined(CONFIG_ADAPTER_LORA_E220) && !defined(CONFIG_NSH_DISABLE_E220_LORASEND) +extern void LoraSend(int argc, char *argv[]); +int cmd_e220loraSend(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv) +{ + nsh_output(vtbl, "Hello, world!\n"); + FrameworkInit(); + LoraSend(argc,argv); + return OK; +} +#endif + #if defined(CONFIG_K210_FFT_TEST) && !defined(CONFIG_NSH_DISABLE_K210_FFT) extern void nuttx_k210_fft_test(void); int cmd_fft(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv) diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c index 524c32022..ceecb0f79 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c @@ -590,7 +590,7 @@ static const struct cmdmap_s g_cmdmap[] = { "xd", cmd_xd, 3, 3, " " }, #endif - { "ch438", cmd_Ch438, 1, 1, "[get the concentration of formaldehyde with sensor tb600b_wq_hcho1os.]" }, + { "ch438", cmd_Ch438, 1, 1, "[ch438 demo cmd.]" }, #if defined(CONFIG_APPLICATION_SENSOR_HCHO_TB600B_WQ_HCHO1OS) && !defined(CONFIG_NSH_DISABLE_HCHO_TB600B_WQ_HCHO1OS) { "hcho1os", cmd_Hcho1os, 1, 1, "[get the concentration of formaldehyde with sensor tb600b_wq_hcho1os.]" }, @@ -664,6 +664,14 @@ static const struct cmdmap_s g_cmdmap[] = { "Adapter4GTest", cmd_Adapter4GTest, 1, 1, "[4G ec200t test.]" }, #endif +#if defined(CONFIG_ADAPTER_LORA_E220) && !defined(CONFIG_NSH_DISABLE_E220_LORATEST) + { "e220loraTest", cmd_e220loraTest, 1, 1, "[e220 lora test.]" }, +#endif + +#if defined(CONFIG_ADAPTER_LORA_E220) && !defined(CONFIG_NSH_DISABLE_E220_LORASEND) + { "e220loraSend", cmd_e220loraSend, 1, 2, "[e220loraSend ]" }, +#endif + #if defined(CONFIG_K210_FFT_TEST) && !defined(CONFIG_NSH_DISABLE_K210_FFT) { "fft", cmd_fft, 1, 1, "[K210 fft function.]" }, #endif From e3cb9df9b6acc314e69f93b440814d0dcbcb066c Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Tue, 26 Apr 2022 18:27:15 +0800 Subject: [PATCH 03/46] change printf to syslog on ch438 --- .../aiit_board/xidatong/src/ch438_demo.c | 48 ++++++++----------- .../aiit_board/xidatong/src/imxrt_ch438.c | 33 ++++++++++--- .../aiit_board/xidatong/src/imxrt_ch438.h | 20 ++++++++ 3 files changed, 67 insertions(+), 34 deletions(-) diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c index 7a976f39e..94641eba8 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c @@ -1,31 +1,22 @@ -/**************************************************************************** - * apps/examples/sx127x_demo/sx127x_demo.c - * - * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with - * this work for additional information regarding copyright ownership. The - * ASF licenses this file to you under the Apache License, Version 2.0 (the - * "License"); you may not use this file except in compliance with the - * License. You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the - * License for the specific language governing permissions and limitations - * under the License. - * - ****************************************************************************/ +/* +* Copyright (c) 2020 AIIT XUOS Lab +* XiOS is licensed under Mulan PSL v2. +* You can use this software according to the terms and conditions of the Mulan PSL v2. +* You may obtain a copy of Mulan PSL v2 at: +* http://license.coscl.org.cn/MulanPSL2 +* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, +* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, +* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. +* See the Mulan PSL v2 for more details. +*/ /** -* @file ch438_demo.c -* @brief nuttx source code -* https://github.com/apache/incubator-nuttx-apps -* @version 10.2.0 -* @author AIIT XUOS Lab -* @date 2022-03-17 -*/ + * @file ch438_demo.c + * @brief imxrt board sd card automount + * @version 1.0 + * @author AIIT XUOS Lab + * @date 2022.04.26 + */ /**************************************************************************** * Included Files @@ -48,6 +39,7 @@ #include #include #include +#include #include "imxrt_ch438.h" @@ -57,14 +49,14 @@ void CH438Demo(void) { int i=0; - printf("ch438_main\n"); + syslog(LOG_INFO,"ch438_main\n"); Ch438InitDefault(); ch438_irq_enable(); up_mdelay(1000); while(1) { CH438UARTSend(2,"AT+BAUD=?",9); - printf("send success\n"); + syslog(LOG_INFO,"send success\n"); ImxrtCh438ReadData(NULL); up_mdelay(2000); } diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c index 9d0fd5495..1d6031da4 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c @@ -1,7 +1,28 @@ +/* +* Copyright (c) 2020 AIIT XUOS Lab +* XiOS is licensed under Mulan PSL v2. +* You can use this software according to the terms and conditions of the Mulan PSL v2. +* You may obtain a copy of Mulan PSL v2 at: +* http://license.coscl.org.cn/MulanPSL2 +* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, +* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, +* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. +* See the Mulan PSL v2 for more details. +*/ + +/** + * @file imxrt_ch438.c + * @brief imxrt board sd card automount + * @version 1.0 + * @author AIIT XUOS Lab + * @date 2022.04.26 + */ + #include #include #include +#include #include #include @@ -91,12 +112,12 @@ void* ImxrtCh438ReadData(void *parameter) // abstime.tv_sec = 2; // while (1) // { - printf("sem_438 is %d\n",sem_438.semcount); + syslog(LOG_INFO, "sem_438 is %d\n",sem_438.semcount); result = sem_wait(&sem_438); if (result == OK) { gInterruptStatus = ReadCH438Data( REG_SSR_ADDR ); - printf("gInterruptStatus is %d\n", gInterruptStatus); + syslog(LOG_INFO,"gInterruptStatus is %d\n", gInterruptStatus); if(!gInterruptStatus) { @@ -122,7 +143,7 @@ void* ImxrtCh438ReadData(void *parameter) REG_MSR_ADDR = offsetadd[ext_uart_no] | REG_MSR0_ADDR; InterruptStatus = ReadCH438Data( REG_IIR_ADDR ) & 0x0f; /* 读串口的中断状态 */ - printf("InterruptStatus is %d\n", InterruptStatus); + syslog(LOG_INFO,"InterruptStatus is %d\n", InterruptStatus); switch( InterruptStatus ) { @@ -136,7 +157,7 @@ void* ImxrtCh438ReadData(void *parameter) RevLen = CH438UARTRcv(ext_uart_no, buff[ext_uart_no]); for(i=0;i Date: Wed, 27 Apr 2022 12:15:27 +0800 Subject: [PATCH 04/46] enable CONFIG_IMXRT_GPIO3_0_15_IRQ on xidatong --- .../aiit_board/xidatong/configs/nsh/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/nsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/nsh/defconfig index 1eab6804c..515fb0f2f 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/nsh/defconfig +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/nsh/defconfig @@ -22,6 +22,8 @@ CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILTIN=y CONFIG_CLOCK_MONOTONIC=y CONFIG_EXAMPLES_HELLO=y +CONFIG_IMXRT_GPIO_IRQ=y +CONFIG_IMXRT_GPIO3_0_15_IRQ=y CONFIG_FS_PROCFS=y CONFIG_IDLETHREAD_STACKSIZE=2048 CONFIG_IMXRT_LPUART1=y From 4d898f82106467c336cd0537309857dc9a68f31b Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Wed, 27 Apr 2022 12:21:36 +0800 Subject: [PATCH 05/46] enable CONFIG_IMXRT_GPIO3_0_15_IRQ on xidatong --- .../aiit_board/xidatong/configs/4gnsh/defconfig | 2 ++ .../aiit_board/xidatong/configs/knsh/defconfig | 2 ++ .../aiit_board/xidatong/configs/libcxxtest/defconfig | 2 ++ .../aiit_board/xidatong/configs/netnsh/defconfig | 2 ++ .../aiit_board/xidatong/configs/sdionsh/defconfig | 3 ++- .../aiit_board/xidatong/configs/usbnsh/defconfig | 2 ++ 6 files changed, 12 insertions(+), 1 deletion(-) diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/4gnsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/4gnsh/defconfig index baf142aa9..522c03260 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/4gnsh/defconfig +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/4gnsh/defconfig @@ -22,6 +22,8 @@ CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILTIN=y CONFIG_CLOCK_MONOTONIC=y CONFIG_EXAMPLES_HELLO=y +CONFIG_IMXRT_GPIO_IRQ=y +CONFIG_IMXRT_GPIO3_0_15_IRQ=y CONFIG_FS_PROCFS=y CONFIG_IDLETHREAD_STACKSIZE=2048 CONFIG_IMXRT_LPUART1=y diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/knsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/knsh/defconfig index 03eb965cc..91e9ffddb 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/knsh/defconfig +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/knsh/defconfig @@ -23,6 +23,8 @@ CONFIG_ARMV7M_USEBASEPRI=y CONFIG_ARM_MPU=y CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILD_PROTECTED=y +CONFIG_IMXRT_GPIO_IRQ=y +CONFIG_IMXRT_GPIO3_0_15_IRQ=y CONFIG_FS_PROCFS=y CONFIG_IDLETHREAD_STACKSIZE=2048 CONFIG_IMXRT_LPUART1=y diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/libcxxtest/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/libcxxtest/defconfig index 2737d7971..67e26cf52 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/libcxxtest/defconfig +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/libcxxtest/defconfig @@ -19,6 +19,8 @@ CONFIG_BOARD_LOOPSPERMSEC=20000 CONFIG_BUILTIN=y CONFIG_CLOCK_MONOTONIC=y CONFIG_C99_BOOL8=y +CONFIG_IMXRT_GPIO_IRQ=y +CONFIG_IMXRT_GPIO3_0_15_IRQ=y CONFIG_FS_PROCFS=y CONFIG_HAVE_CXX=y CONFIG_IDLETHREAD_STACKSIZE=2048 diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/netnsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/netnsh/defconfig index c0d86ffac..c1f8cb0be 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/netnsh/defconfig +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/netnsh/defconfig @@ -24,6 +24,8 @@ CONFIG_BUILTIN=y CONFIG_CLOCK_MONOTONIC=y CONFIG_ETH0_PHY_LAN8720=y CONFIG_IMXRT_ENET_PHYINIT=y +CONFIG_IMXRT_GPIO_IRQ=y +CONFIG_IMXRT_GPIO3_0_15_IRQ=y CONFIG_FS_PROCFS=y CONFIG_IDLETHREAD_STACKSIZE=2048 CONFIG_IMXRT_ENET=y diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/sdionsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/sdionsh/defconfig index 3cad4773c..088fc0879 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/sdionsh/defconfig +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/sdionsh/defconfig @@ -27,8 +27,9 @@ CONFIG_FS_FAT=y CONFIG_FS_PROCFS=y CONFIG_IDLETHREAD_STACKSIZE=2048 CONFIG_EXAMPLES_HELLO=y -CONFIG_IMXRT_GPIO2_16_31_IRQ=y CONFIG_IMXRT_GPIO_IRQ=y +CONFIG_IMXRT_GPIO2_16_31_IRQ=y +CONFIG_IMXRT_GPIO3_0_15_IRQ=y CONFIG_DEV_GPIO=y CONFIG_IMXRT_LPUART1=y CONFIG_IMXRT_USDHC1=y diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/usbnsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/usbnsh/defconfig index be725e890..d03a2207e 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/usbnsh/defconfig +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/usbnsh/defconfig @@ -27,6 +27,8 @@ CONFIG_FS_FAT=y CONFIG_FS_PROCFS=y CONFIG_IDLETHREAD_STACKSIZE=2048 CONFIG_EXAMPLES_HELLO=y +CONFIG_IMXRT_GPIO_IRQ=y +CONFIG_IMXRT_GPIO3_0_15_IRQ=y CONFIG_IMXRT_LPUART1=y CONFIG_INTELHEX_BINARY=y CONFIG_IOB_NBUFFERS=24 From 49eaf5fc1090f38a4cefc8abde465bcf0ef7708b Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Fri, 29 Apr 2022 13:39:03 +0800 Subject: [PATCH 06/46] support reboot on xidatong --- .../xidatong/configs/4gnsh/defconfig | 1 + .../xidatong/configs/knsh/defconfig | 1 + .../xidatong/configs/libcxxtest/defconfig | 1 + .../xidatong/configs/netnsh/defconfig | 1 + .../aiit_board/xidatong/configs/nsh/defconfig | 1 + .../xidatong/configs/sdionsh/defconfig | 1 + .../xidatong/configs/usbnsh/defconfig | 1 + .../aiit_board/xidatong/src/Makefile | 4 ++ .../aiit_board/xidatong/src/imxrt_reset.c | 61 +++++++++++++++++++ 9 files changed, 72 insertions(+) create mode 100644 Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_reset.c diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/4gnsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/4gnsh/defconfig index 522c03260..b4b92ee3d 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/4gnsh/defconfig +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/4gnsh/defconfig @@ -65,4 +65,5 @@ CONFIG_READLINE_TABCOMPLETION=y CONFIG_FS_ROMFS=y CONFIG_NSH_ROMFSETC=y CONFIG_NSH_ARCHROMFS=y +CONFIG_BOARDCTL_RESET=y CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/knsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/knsh/defconfig index 91e9ffddb..9a5999de3 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/knsh/defconfig +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/knsh/defconfig @@ -54,4 +54,5 @@ CONFIG_READLINE_TABCOMPLETION=y CONFIG_FS_ROMFS=y CONFIG_NSH_ROMFSETC=y CONFIG_NSH_ARCHROMFS=y +CONFIG_BOARDCTL_RESET=y CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/libcxxtest/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/libcxxtest/defconfig index 67e26cf52..17f308e72 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/libcxxtest/defconfig +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/libcxxtest/defconfig @@ -53,4 +53,5 @@ CONFIG_READLINE_TABCOMPLETION=y CONFIG_FS_ROMFS=y CONFIG_NSH_ROMFSETC=y CONFIG_NSH_ARCHROMFS=y +CONFIG_BOARDCTL_RESET=y CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/netnsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/netnsh/defconfig index c1f8cb0be..bbded7684 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/netnsh/defconfig +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/netnsh/defconfig @@ -76,4 +76,5 @@ CONFIG_READLINE_TABCOMPLETION=y CONFIG_FS_ROMFS=y CONFIG_NSH_ROMFSETC=y CONFIG_NSH_ARCHROMFS=y +CONFIG_BOARDCTL_RESET=y CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/nsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/nsh/defconfig index 515fb0f2f..2919886cf 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/nsh/defconfig +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/nsh/defconfig @@ -51,4 +51,5 @@ CONFIG_READLINE_TABCOMPLETION=y CONFIG_FS_ROMFS=y CONFIG_NSH_ROMFSETC=y CONFIG_NSH_ARCHROMFS=y +CONFIG_BOARDCTL_RESET=y CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/sdionsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/sdionsh/defconfig index 088fc0879..3dd44be80 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/sdionsh/defconfig +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/sdionsh/defconfig @@ -72,4 +72,5 @@ CONFIG_READLINE_TABCOMPLETION=y CONFIG_FS_ROMFS=y CONFIG_NSH_ROMFSETC=y CONFIG_NSH_ARCHROMFS=y +CONFIG_BOARDCTL_RESET=y CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/usbnsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/usbnsh/defconfig index d03a2207e..fa14ad3a9 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/usbnsh/defconfig +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/usbnsh/defconfig @@ -71,4 +71,5 @@ CONFIG_READLINE_TABCOMPLETION=y CONFIG_FS_ROMFS=y CONFIG_NSH_ROMFSETC=y CONFIG_NSH_ARCHROMFS=y +CONFIG_BOARDCTL_RESET=y CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/Makefile b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/Makefile index 78724725c..7f4a76155 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/Makefile +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/Makefile @@ -32,6 +32,10 @@ else ifeq ($(CONFIG_BOARD_LATE_INITIALIZE),y) CSRCS += imxrt_bringup.c endif +ifeq ($(CONFIG_BOARDCTL_RESET),y) +CSRCS += imxrt_reset.c +endif + ifeq ($(CONFIG_ARCH_LEDS),y) CSRCS += imxrt_autoleds.c else diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_reset.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_reset.c new file mode 100644 index 000000000..91769ff54 --- /dev/null +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_reset.c @@ -0,0 +1,61 @@ +/* +* Copyright (c) 2020 AIIT XUOS Lab +* XiOS is licensed under Mulan PSL v2. +* You can use this software according to the terms and conditions of the Mulan PSL v2. +* You may obtain a copy of Mulan PSL v2 at: +* http://license.coscl.org.cn/MulanPSL2 +* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, +* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, +* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. +* See the Mulan PSL v2 for more details. +*/ + +/** + * @file imxrt_reset.c + * @brief imxrt board sd card automount + * @version 1.0 + * @author AIIT XUOS Lab + * @date 2022.04.29 + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include + +#ifdef CONFIG_BOARDCTL_RESET + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_reset + * + * Description: + * Reset board. Support for this function is required by board-level + * logic if CONFIG_BOARDCTL_RESET is selected. + * + * Input Parameters: + * status - Status information provided with the reset event. This + * meaning of this status information is board-specific. If not + * used by a board, the value zero may be provided in calls to + * board_reset(). + * + * Returned Value: + * If this function returns, then it was not possible to power-off the + * board due to some constraints. The return value int this case is a + * board-specific reason for the failure to shutdown. + * + ****************************************************************************/ + +int board_reset(int status) +{ + up_systemreset(); + return 0; +} + +#endif /* CONFIG_BOARDCTL_RESET */ From 465fe2354f5135d4c1da3d34995fee1086010589 Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Fri, 29 Apr 2022 14:01:54 +0800 Subject: [PATCH 07/46] delete defalut support CONFIG_FS_PROCFS --- .../aiit_board/xidatong/configs/4gnsh/defconfig | 1 - .../aiit_board/xidatong/configs/knsh/defconfig | 1 - .../aiit_board/xidatong/configs/libcxxtest/defconfig | 1 - .../aiit_board/xidatong/configs/netnsh/defconfig | 1 - .../Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/nsh/defconfig | 1 - .../aiit_board/xidatong/configs/sdionsh/defconfig | 1 - .../aiit_board/xidatong/configs/usbnsh/defconfig | 1 - 7 files changed, 7 deletions(-) diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/4gnsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/4gnsh/defconfig index b4b92ee3d..6239ffa42 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/4gnsh/defconfig +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/4gnsh/defconfig @@ -24,7 +24,6 @@ CONFIG_CLOCK_MONOTONIC=y CONFIG_EXAMPLES_HELLO=y CONFIG_IMXRT_GPIO_IRQ=y CONFIG_IMXRT_GPIO3_0_15_IRQ=y -CONFIG_FS_PROCFS=y CONFIG_IDLETHREAD_STACKSIZE=2048 CONFIG_IMXRT_LPUART1=y CONFIG_INTELHEX_BINARY=y diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/knsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/knsh/defconfig index 9a5999de3..ed458a723 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/knsh/defconfig +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/knsh/defconfig @@ -25,7 +25,6 @@ CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BUILD_PROTECTED=y CONFIG_IMXRT_GPIO_IRQ=y CONFIG_IMXRT_GPIO3_0_15_IRQ=y -CONFIG_FS_PROCFS=y CONFIG_IDLETHREAD_STACKSIZE=2048 CONFIG_IMXRT_LPUART1=y CONFIG_INTELHEX_BINARY=y diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/libcxxtest/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/libcxxtest/defconfig index 17f308e72..f347bad94 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/libcxxtest/defconfig +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/libcxxtest/defconfig @@ -21,7 +21,6 @@ CONFIG_CLOCK_MONOTONIC=y CONFIG_C99_BOOL8=y CONFIG_IMXRT_GPIO_IRQ=y CONFIG_IMXRT_GPIO3_0_15_IRQ=y -CONFIG_FS_PROCFS=y CONFIG_HAVE_CXX=y CONFIG_IDLETHREAD_STACKSIZE=2048 CONFIG_IMXRT_LPUART1=y diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/netnsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/netnsh/defconfig index bbded7684..901df0b65 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/netnsh/defconfig +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/netnsh/defconfig @@ -26,7 +26,6 @@ CONFIG_ETH0_PHY_LAN8720=y CONFIG_IMXRT_ENET_PHYINIT=y CONFIG_IMXRT_GPIO_IRQ=y CONFIG_IMXRT_GPIO3_0_15_IRQ=y -CONFIG_FS_PROCFS=y CONFIG_IDLETHREAD_STACKSIZE=2048 CONFIG_IMXRT_ENET=y CONFIG_IMXRT_LPUART1=y diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/nsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/nsh/defconfig index 2919886cf..a03e3c01f 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/nsh/defconfig +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/nsh/defconfig @@ -24,7 +24,6 @@ CONFIG_CLOCK_MONOTONIC=y CONFIG_EXAMPLES_HELLO=y CONFIG_IMXRT_GPIO_IRQ=y CONFIG_IMXRT_GPIO3_0_15_IRQ=y -CONFIG_FS_PROCFS=y CONFIG_IDLETHREAD_STACKSIZE=2048 CONFIG_IMXRT_LPUART1=y CONFIG_INTELHEX_BINARY=y diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/sdionsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/sdionsh/defconfig index 3dd44be80..93439f8e9 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/sdionsh/defconfig +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/sdionsh/defconfig @@ -24,7 +24,6 @@ CONFIG_FAT_LCNAMES=y CONFIG_CLOCK_MONOTONIC=y CONFIG_FAT_LFN=y CONFIG_FS_FAT=y -CONFIG_FS_PROCFS=y CONFIG_IDLETHREAD_STACKSIZE=2048 CONFIG_EXAMPLES_HELLO=y CONFIG_IMXRT_GPIO_IRQ=y diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/usbnsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/usbnsh/defconfig index fa14ad3a9..291d9b2c5 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/usbnsh/defconfig +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/usbnsh/defconfig @@ -24,7 +24,6 @@ CONFIG_FAT_LCNAMES=y CONFIG_CLOCK_MONOTONIC=y CONFIG_FAT_LFN=y CONFIG_FS_FAT=y -CONFIG_FS_PROCFS=y CONFIG_IDLETHREAD_STACKSIZE=2048 CONFIG_EXAMPLES_HELLO=y CONFIG_IMXRT_GPIO_IRQ=y From 4c517d283c65e3fc4f3be83c8887a3bd04b61e79 Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Fri, 29 Apr 2022 16:52:17 +0800 Subject: [PATCH 08/46] ch438 Replace sem_t with pthread_cond_t --- .../aiit_board/xidatong/src/ch438_demo.c | 19 +- .../aiit_board/xidatong/src/imxrt_ch438.c | 568 ++++++++---------- .../aiit_board/xidatong/src/imxrt_ch438.h | 15 +- 3 files changed, 265 insertions(+), 337 deletions(-) diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c index 94641eba8..0297b5a6e 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c @@ -22,11 +22,13 @@ * Included Files ****************************************************************************/ + #include #include #include #include +#include #include #include @@ -39,7 +41,6 @@ #include #include #include -#include #include "imxrt_ch438.h" @@ -48,16 +49,22 @@ void CH438Demo(void) { - int i=0; - syslog(LOG_INFO,"ch438_main\n"); + _info("ch438_main\n"); Ch438InitDefault(); - ch438_irq_enable(); up_mdelay(1000); while(1) { CH438UARTSend(2,"AT+BAUD=?",9); - syslog(LOG_INFO,"send success\n"); ImxrtCh438ReadData(NULL); - up_mdelay(2000); + up_mdelay(1000); + CH438UARTSend(2,"AT+NAME=?",9); + ImxrtCh438ReadData(NULL); + up_mdelay(1000); + CH438UARTSend(2,"AT+ADDR=?",9); + ImxrtCh438ReadData(NULL); + up_mdelay(1000); + CH438UARTSend(2,"AT+MODE=?",9); + ImxrtCh438ReadData(NULL); + up_mdelay(1000); } } diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c index 1d6031da4..b88bf353c 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c @@ -22,7 +22,6 @@ #include #include -#include #include #include @@ -41,25 +40,81 @@ #include #include #include +#include +#include +#include + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* Semaphore for receiving data */ + +static pthread_mutex_t mutex = PTHREAD_MUTEX_INITIALIZER;; +static pthread_cond_t cond = PTHREAD_COND_INITIALIZER; +volatile int done = 0; + +static uint8_t RevLen; +static uint8_t buff[8][128]; +static uint8_t buff_ptr[8]; +static uint8_t Interruptnum[8] = {0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,}; /* SSR寄存器中断号对应值 */ +static uint8_t offsetadd[] = {0x00,0x10,0x20,0x30,0x08,0x18,0x28,0x38,}; /* 串口号的偏移地址 */ + +static uint8_t gInterruptStatus; -static pthread_t thr_438; -struct sched_param param; -pthread_attr_t attr = PTHREAD_ATTR_INITIALIZER; +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ +static void ImxrtCH438Init(void); +static void CH438PortInit(uint8_t ext_uart_no,uint32_t baud_rate); +static void CH438SetOutput(void); +static void CH438SetInput(void); +static uint8_t ReadCH438Data(uint8_t addr); +static void WriteCH438Data(uint8_t addr, uint8_t dat); +static void WriteCH438Block(uint8_t mAddr, uint8_t mLen, uint8_t *mBuf); +static uint8_t CH438UARTRcv(uint8_t ext_uart_no, uint8_t* buf); -static char thr_438_stack[1024]; +/**************************************************************************** + * Public and Private Functions + ****************************************************************************/ - -static sem_t sem_438; /* 用于接收的信号量 */ -/* ch438中断回调函数 */ -static int Ch438Irq(int irq, FAR void *context, FAR void *arg) +/**************************************************************************** + * Name: getInterruptStatus + * + * Description: + * thread task getInterruptStatus + * + ****************************************************************************/ +int getInterruptStatus(int argc, char **argv) { - sem_post(&sem_438); - up_mdelay(500); - return OK; + int ext_uart_no = 2; + while(1) + { + pthread_mutex_lock(&mutex); + gInterruptStatus = ReadCH438Data(REG_SSR_ADDR); + if(!gInterruptStatus) + { + pthread_mutex_unlock(&mutex); + continue; + } + if(gInterruptStatus & Interruptnum[ext_uart_no]) + { + done = 1; + pthread_cond_signal(&cond); + pthread_mutex_unlock(&mutex); + } + } } +/**************************************************************************** + * Name: CH438SetOutput + * + * Description: + * Configure pin mode to output + * + ****************************************************************************/ void CH438SetOutput(void) { imxrt_config_gpio(CH438_D0_PIN_OUT); @@ -72,6 +127,14 @@ void CH438SetOutput(void) imxrt_config_gpio(CH438_D7_PIN_OUT); } + +/**************************************************************************** + * Name: CH438SetInput + * + * Description: + * Configure pin mode to input + * + ****************************************************************************/ void CH438SetInput(void) { imxrt_config_gpio(CH438_D0_PIN_INPUT); @@ -81,125 +144,105 @@ void CH438SetInput(void) imxrt_config_gpio(CH438_D4_PIN_INPUT); imxrt_config_gpio(CH438_D5_PIN_INPUT); imxrt_config_gpio(CH438_D6_PIN_INPUT); - imxrt_config_gpio(CH438_D7_PIN_INPUT); - + imxrt_config_gpio(CH438_D7_PIN_INPUT); } - -static uint8_t RevLen ,buff[8][128],buff_ptr[8]; -static uint8_t Interruptnum[8] = {0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,}; /* SSR寄存器中断号对应值 */ -static uint8_t offsetadd[] = {0x00,0x10,0x20,0x30,0x08,0x18,0x28,0x38,}; /* 串口号的偏移地址 */ - -void* ImxrtCh438ReadData(void *parameter) +/**************************************************************************** + * Name: ImxrtCh438ReadData + * + * Description: + * Read data from ch438 port + * + ****************************************************************************/ +void ImxrtCh438ReadData(void *parameter) { int result, i; - uint8_t gInterruptStatus; uint8_t InterruptStatus; uint8_t ext_uart_no; - static uint8_t dat; - uint8_t REG_LCR_ADDR; - uint8_t REG_DLL_ADDR; - uint8_t REG_DLM_ADDR; - uint8_t REG_IER_ADDR; - uint8_t REG_MCR_ADDR; - uint8_t REG_FCR_ADDR; - uint8_t REG_RBR_ADDR; - uint8_t REG_THR_ADDR; uint8_t REG_IIR_ADDR; uint8_t REG_LSR_ADDR; uint8_t REG_MSR_ADDR; - // struct timespec abstime; - // abstime.tv_sec = 2; - // while (1) - // { - syslog(LOG_INFO, "sem_438 is %d\n",sem_438.semcount); - result = sem_wait(&sem_438); - if (result == OK) - { - gInterruptStatus = ReadCH438Data( REG_SSR_ADDR ); - syslog(LOG_INFO,"gInterruptStatus is %d\n", gInterruptStatus); - if(!gInterruptStatus) - { - - } - else - { - // for(ext_uart_no=0; ext_uart_no<8; ext_uart_no++) - // { - ext_uart_no = 2; - if( gInterruptStatus & Interruptnum[ext_uart_no] ) /* 检测哪个串口发生中断 */ - { - - REG_LCR_ADDR = offsetadd[ext_uart_no] | REG_LCR0_ADDR; - REG_DLL_ADDR = offsetadd[ext_uart_no] | REG_DLL0_ADDR; - REG_DLM_ADDR = offsetadd[ext_uart_no] | REG_DLM0_ADDR; - REG_IER_ADDR = offsetadd[ext_uart_no] | REG_IER0_ADDR; - REG_MCR_ADDR = offsetadd[ext_uart_no] | REG_MCR0_ADDR; - REG_FCR_ADDR = offsetadd[ext_uart_no] | REG_FCR0_ADDR; - REG_RBR_ADDR = offsetadd[ext_uart_no] | REG_RBR0_ADDR; - REG_THR_ADDR = offsetadd[ext_uart_no] | REG_THR0_ADDR; - REG_IIR_ADDR = offsetadd[ext_uart_no] | REG_IIR0_ADDR; - REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR; - REG_MSR_ADDR = offsetadd[ext_uart_no] | REG_MSR0_ADDR; - - InterruptStatus = ReadCH438Data( REG_IIR_ADDR ) & 0x0f; /* 读串口的中断状态 */ - syslog(LOG_INFO,"InterruptStatus is %d\n", InterruptStatus); - - switch( InterruptStatus ) - { - case INT_NOINT: /* 没有中断 */ - break; - case INT_THR_EMPTY: /* THR空中断 */ -// ReadCH438Data( REG_IIR_ADDR ); - break; - case INT_RCV_OVERTIME: /* 接收超时中断，收到数据后一般是触发这个 。在收到一帧数据后4个数据时间没有后续的数据时触发*/ - case INT_RCV_SUCCESS: /* 接收数据可用中断。这是一个数据帧超过缓存了才发生，否则一般是前面的超时中断。处理过程同上面的超时中断 */ - RevLen = CH438UARTRcv(ext_uart_no, buff[ext_uart_no]); - for(i=0;i> 4 ) / baud_rate; DLM = div >> 8; DLL = div & 0xff; - WriteCH438Data( REG_DLL_ADDR, DLL ); /* 设置波特率 */ - WriteCH438Data( REG_DLM_ADDR, DLM ); - WriteCH438Data( REG_FCR_ADDR, BIT_FCR_RECVTG1 | BIT_FCR_RECVTG0 | BIT_FCR_FIFOEN ); /* 设置FIFO模式，触发点为112字节 */ - - WriteCH438Data( REG_LCR_ADDR, BIT_LCR_WORDSZ1 | BIT_LCR_WORDSZ0 ); /* 字长8位，1位停止位、无校验 */ - - // if(ext_uart_no==1) - // WriteCH438Data( REG_IER_ADDR, 0x00 ); /* 使能中断 */ - // else - WriteCH438Data( REG_IER_ADDR, /*BIT_IER_IEMODEM | BIT_IER_IETHRE | BIT_IER_IELINES | */BIT_IER_IERECV ); /* 使能中断 */ - - WriteCH438Data( REG_MCR_ADDR, BIT_MCR_OUT2 );// | BIT_MCR_RTS | BIT_MCR_DTR ); /* 允许中断输出,DTR,RTS为1 */ - - WriteCH438Data(REG_FCR_ADDR,ReadCH438Data(REG_FCR_ADDR)| BIT_FCR_TFIFORST); /* 清空FIFO中的数据 */ - + WriteCH438Data(REG_DLL_ADDR, DLL); /* 设置波特率 */ + WriteCH438Data(REG_DLM_ADDR, DLM); + WriteCH438Data(REG_FCR_ADDR, BIT_FCR_RECVTG1 | BIT_FCR_RECVTG0 | BIT_FCR_FIFOEN); /* 设置FIFO模式，触发点为112字节 */ + WriteCH438Data(REG_LCR_ADDR, BIT_LCR_WORDSZ1 | BIT_LCR_WORDSZ0 ); /* 字长8位，1位停止位、无校验 */ + WriteCH438Data(REG_IER_ADDR, BIT_IER_IERECV); /* 使能中断 */ + WriteCH438Data(REG_MCR_ADDR, BIT_MCR_OUT2);// | BIT_MCR_RTS | BIT_MCR_DTR ); /* 允许中断输出,DTR,RTS为1 */ + WriteCH438Data(REG_FCR_ADDR, ReadCH438Data(REG_FCR_ADDR)| BIT_FCR_TFIFORST); /* 清空FIFO中的数据 */ } - - -/********************************************************************************************************* -** 函数名称: ReadCH438Data -** 功能描述: 接口函数，从CH438地址读取数据 -** 输　入: 地址 -** -** 输　出: 数据 -** -** 日　期: 2011年8月26日 -**------------------------------------------------------------------------------------------------------- -** 修改人: -** 日　期: -**------------------------------------------------------------------------------------------------------- -********************************************************************************************************/ -static uint8_t ReadCH438Data( uint8_t addr ) +/**************************************************************************** + * Name: ReadCH438Data + * + * Description: + * Read data from ch438 address + * + ****************************************************************************/ +static uint8_t ReadCH438Data(uint8_t addr) { -//读函数 - -//ALE WR RD线空闲都为高电平，读取数据时候先将地址放在并口，然后拉低ALE锁存地址，延时保持 - -//切换引脚输入，拉低RD读信号线，延时等待，读取并口上数据 - -//撤销RD，撤销ALE - uint8_t dat; - -// imxrt_gpio_write(CH438_NCS_PIN,true); + uint8_t dat = 0; imxrt_gpio_write(CH438_NWR_PIN, true); imxrt_gpio_write(CH438_NRD_PIN, true); imxrt_gpio_write(CH438_ALE_PIN, true); @@ -379,7 +360,6 @@ static uint8_t ReadCH438Data( uint8_t addr ) up_udelay(1); - dat = 0; if (imxrt_gpio_read(CH438_D7_PIN_INPUT)) dat |= 0x80; if (imxrt_gpio_read(CH438_D6_PIN_INPUT)) dat |= 0x40; if (imxrt_gpio_read(CH438_D5_PIN_INPUT)) dat |= 0x20; @@ -397,8 +377,15 @@ static uint8_t ReadCH438Data( uint8_t addr ) return dat; } - -static void WriteCH438Data( uint8_t addr, uint8_t dat) + +/**************************************************************************** + * Name: WriteCH438Data + * + * Description: + * write data to ch438 address + * + ****************************************************************************/ +static void WriteCH438Data(uint8_t addr, uint8_t dat) { imxrt_gpio_write(CH438_ALE_PIN, true); imxrt_gpio_write(CH438_NRD_PIN, true); @@ -447,133 +434,76 @@ static void WriteCH438Data( uint8_t addr, uint8_t dat) } - -/********************************************************************************************************* -** 函数名称: WriteCH438Block -** 功能描述: 接口函数，从CH438地址写入数据块 -** 输　入: CH438寄存器地址,数据块长度,数据缓冲区地址 -** -** 输　出: 无 -** -** 日　期: 2011年8月26日 -**------------------------------------------------------------------------------------------------------- -** 修改人: -** 日　期: -**------------------------------------------------------------------------------------------------------- -********************************************************************************************************/ -static void WriteCH438Block( uint8_t mAddr, uint8_t mLen, uint8_t *mBuf ) +/**************************************************************************** + * Name: WriteCH438Block + * + * Description: + * Write data block from ch438 address + * + ****************************************************************************/ +static void WriteCH438Block(uint8_t mAddr, uint8_t mLen, uint8_t *mBuf) { - - while ( mLen -- ) - WriteCH438Data( mAddr, *mBuf++ ); - + while (mLen--) + WriteCH438Data(mAddr, *mBuf++); } - -///********************************************************************************************************* -//** 函数名称: CH438UARTSend -//** 功能描述: 功能函数，启用FIFO模式, 用于CH438串口0 发送多字节数据 单次最多发送128字节数据 -//** 输　入: 发送数据缓冲区地址, 发送数据块长度 -//** -//** 输　出: 无 -//** -//** 日　期: 2011年8月26日 -//**------------------------------------------------------------------------------------------------------- -//** 修改人: -//** 日　期: -//**------------------------------------------------------------------------------------------------------- -//********************************************************************************************************/ -void CH438UARTSend( uint8_t ext_uart_no, uint8_t *Data, uint8_t Num ) +/**************************************************************************** + * Name: CH438UARTSend + * + * Description: + * Enable FIFO mode, which is used for ch438 serial port to send multi byte data, + * with a maximum of 128 bytes of data sent at a time + * + ****************************************************************************/ +void CH438UARTSend(uint8_t ext_uart_no, uint8_t *Data, uint8_t Num) { uint8_t REG_LSR_ADDR,REG_THR_ADDR; + REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR; + REG_THR_ADDR = offsetadd[ext_uart_no] | REG_THR0_ADDR; - REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR; - REG_THR_ADDR = offsetadd[ext_uart_no] | REG_THR0_ADDR; - - while( 1 ) + while(1) { - - while( ( ReadCH438Data( REG_LSR_ADDR ) & BIT_LSR_TEMT ) == 0 ); /* 等待数据发送完毕，THR,TSR全空 */ - - if( Num <= 128 ) + while((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_TEMT ) == 0); /* 等待数据发送完毕，THR,TSR全空 */ + if(Num <= 128) { - - WriteCH438Block( REG_THR_ADDR, Num, Data ); - + WriteCH438Block(REG_THR_ADDR, Num, Data); break; - } - else { - - WriteCH438Block( REG_THR_ADDR, 128, Data ); - + WriteCH438Block(REG_THR_ADDR, 128, Data); Num -= 128; - Data += 128; - } - } } - - -/********************************************************************************************************* -** 函数名称: CH438UARTRcv -** 功能描述: 功能函数，禁用FIFO模式, 用于CH438串口0 接收多字节数据 -** 输　入: 接收数据缓冲区地址 -** -** 输　出: 接收数据长度 -** -** 日　期: 2011年8月26日 -**------------------------------------------------------------------------------------------------------- -** 修改人: -** 日　期: -**------------------------------------------------------------------------------------------------------- -********************************************************************************************************/ - -uint8_t CH438UARTRcv( uint8_t ext_uart_no, uint8_t* buf ) +/**************************************************************************** + * Name: CH438UARTRcv + * + * Description: + * Disable FIFO mode for ch438 serial port to receive multi byte data + * + ****************************************************************************/ +uint8_t CH438UARTRcv(uint8_t ext_uart_no, uint8_t* buf) { uint8_t RcvNum = 0; uint8_t dat = 0; uint8_t REG_LSR_ADDR,REG_RBR_ADDR; - uint8_t *p_rev; - p_rev = buf; - - REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR; - REG_RBR_ADDR = offsetadd[ext_uart_no] | REG_RBR0_ADDR; - - -// if( !( ReadCH438Data( REG_LSR_ADDR ) & ( BIT_LSR_BREAKINT | BIT_LSR_FRAMEERR | BIT_LSR_PARERR | BIT_LSR_OVERR ) ) ) /* b1-b4无错误 */ - // if( !( dat & ( BIT_LSR_BREAKINT | BIT_LSR_FRAMEERR | BIT_LSR_PARERR | BIT_LSR_OVERR ) ) ) /* b1-b4无错误 */ 不用管这有没有错误，只管 DATAREADY - { + REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR; + REG_RBR_ADDR = offsetadd[ext_uart_no] | REG_RBR0_ADDR; - while( ( ReadCH438Data( REG_LSR_ADDR ) & BIT_LSR_DATARDY ) == 0 ); /* 等待数据准备好 */ - - while( ( ReadCH438Data( REG_LSR_ADDR ) & BIT_LSR_DATARDY ) == 0x01 ) - { - -// *buf++ = ReadCH438Data( REG_RBR_ADDR ); /* 从接收缓冲寄存器读出数据 */ - dat = ReadCH438Data( REG_RBR_ADDR ); - - buff[ext_uart_no][buff_ptr[ext_uart_no]] = dat; - - buff_ptr[ext_uart_no] = buff_ptr[ext_uart_no] + 1; - if (buff_ptr[ext_uart_no] == 128) - buff_ptr[ext_uart_no] = 0; - - RcvNum = RcvNum + 1; - - } - - - - } - -// else ReadCH438Data( REG_RBR_ADDR ); - - return( RcvNum ); + while((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_DATARDY) == 0 ); /* 等待数据准备好 */ + while((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_DATARDY) == 0x01 ) + { + dat = ReadCH438Data(REG_RBR_ADDR); + buff[ext_uart_no][buff_ptr[ext_uart_no]] = dat; + + buff_ptr[ext_uart_no] = buff_ptr[ext_uart_no] + 1; + if (buff_ptr[ext_uart_no] == 128) + buff_ptr[ext_uart_no] = 0; + RcvNum = RcvNum + 1; + } + return RcvNum; } \ No newline at end of file diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h index 05d1593b6..ba94979af 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h @@ -299,19 +299,10 @@ GPIO_PORT1 | GPIO_PIN29) -static void ImxrtCH438Init(void); -static void CH438PortInit( uint8_t ext_uart_no,uint32_t baud_rate ); -static void CH438SetOutput(void); -static void CH438SetInput(void); -static uint8_t ReadCH438Data( uint8_t addr ); -static void WriteCH438Data( uint8_t addr, uint8_t dat); -static void WriteCH438Block( uint8_t mAddr, uint8_t mLen, uint8_t *mBuf ) ; - void CH438UARTSend( uint8_t ext_uart_no,uint8_t *Data, uint8_t Num ); -static uint8_t CH438UARTRcv( uint8_t ext_uart_no, uint8_t* buf ); +void CH438UARTSend(uint8_t ext_uart_no,uint8_t *Data, uint8_t Num); void Ch438InitDefault(void); -void ch438_irq_enable(void); - void *ImxrtCh438ReadData(void *parameter); - +void ImxrtCh438ReadData(void *parameter); +int getInterruptStatus(int argc, char **argv); #endif From 048c1d0ac43a7be2e4d9c87da74de75b9788acfb Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Fri, 29 Apr 2022 17:58:11 +0800 Subject: [PATCH 09/46] ch438 read data by port_NUM --- .../aiit_board/xidatong/src/ch438_demo.c | 8 +- .../aiit_board/xidatong/src/imxrt_ch438.c | 307 +++++++++--------- .../aiit_board/xidatong/src/imxrt_ch438.h | 7 +- 3 files changed, 164 insertions(+), 158 deletions(-) diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c index 0297b5a6e..490f8ec30 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c @@ -55,16 +55,16 @@ void CH438Demo(void) while(1) { CH438UARTSend(2,"AT+BAUD=?",9); - ImxrtCh438ReadData(NULL); + ImxrtCh438ReadData(2); up_mdelay(1000); CH438UARTSend(2,"AT+NAME=?",9); - ImxrtCh438ReadData(NULL); + ImxrtCh438ReadData(2); up_mdelay(1000); CH438UARTSend(2,"AT+ADDR=?",9); - ImxrtCh438ReadData(NULL); + ImxrtCh438ReadData(2); up_mdelay(1000); CH438UARTSend(2,"AT+MODE=?",9); - ImxrtCh438ReadData(NULL); + ImxrtCh438ReadData(2); up_mdelay(1000); } } diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c index b88bf353c..912ad4a46 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c @@ -44,21 +44,24 @@ #include #include +#define CH438PORTNUM 8 +#define BUFFERSIZE 128 + /**************************************************************************** * Private Data ****************************************************************************/ /* Semaphore for receiving data */ -static pthread_mutex_t mutex = PTHREAD_MUTEX_INITIALIZER;; +static pthread_mutex_t mutex = PTHREAD_MUTEX_INITIALIZER; static pthread_cond_t cond = PTHREAD_COND_INITIALIZER; -volatile int done = 0; +volatile int done[CH438PORTNUM] = {0}; static uint8_t RevLen; -static uint8_t buff[8][128]; -static uint8_t buff_ptr[8]; -static uint8_t Interruptnum[8] = {0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,}; /* SSR寄存器中断号对应值 */ -static uint8_t offsetadd[] = {0x00,0x10,0x20,0x30,0x08,0x18,0x28,0x38,}; /* 串口号的偏移地址 */ +static uint8_t buff[CH438PORTNUM][BUFFERSIZE]; +static uint8_t buff_ptr[CH438PORTNUM]; +static uint8_t Interruptnum[CH438PORTNUM] = {0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,}; /* SSR寄存器中断号对应值 */ +static uint8_t offsetadd[CH438PORTNUM] = {0x00,0x10,0x20,0x30,0x08,0x18,0x28,0x38,}; /* 串口号的偏移地址 */ static uint8_t gInterruptStatus; @@ -89,7 +92,7 @@ static uint8_t CH438UARTRcv(uint8_t ext_uart_no, uint8_t* buf); ****************************************************************************/ int getInterruptStatus(int argc, char **argv) { - int ext_uart_no = 2; + uint8_t ext_uart_no = 0; while(1) { pthread_mutex_lock(&mutex); @@ -99,11 +102,15 @@ int getInterruptStatus(int argc, char **argv) pthread_mutex_unlock(&mutex); continue; } - if(gInterruptStatus & Interruptnum[ext_uart_no]) + + for(ext_uart_no = 0; ext_uart_no < CH438PORTNUM; ext_uart_no++) { - done = 1; - pthread_cond_signal(&cond); - pthread_mutex_unlock(&mutex); + if(gInterruptStatus & Interruptnum[ext_uart_no]) + { + done[ext_uart_no] = 1; + pthread_cond_signal(&cond); + pthread_mutex_unlock(&mutex); + } } } } @@ -147,113 +154,6 @@ void CH438SetInput(void) imxrt_config_gpio(CH438_D7_PIN_INPUT); } -/**************************************************************************** - * Name: ImxrtCh438ReadData - * - * Description: - * Read data from ch438 port - * - ****************************************************************************/ -void ImxrtCh438ReadData(void *parameter) -{ - int result, i; - uint8_t InterruptStatus; - uint8_t ext_uart_no; - uint8_t REG_IIR_ADDR; - uint8_t REG_LSR_ADDR; - uint8_t REG_MSR_ADDR; - - pthread_mutex_lock(&mutex); - while(done == 0) - pthread_cond_wait(&cond, &mutex); - if (done == 1) - { - ext_uart_no = 2; - REG_IIR_ADDR = offsetadd[ext_uart_no] | REG_IIR0_ADDR; - REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR; - REG_MSR_ADDR = offsetadd[ext_uart_no] | REG_MSR0_ADDR; - InterruptStatus = ReadCH438Data(REG_IIR_ADDR) & 0x0f; /* 读串口的中断状态 */ - _info("InterruptStatus is %d\n", InterruptStatus); - - switch( InterruptStatus ) - { - case INT_NOINT: /* 没有中断 */ - break; - case INT_THR_EMPTY: /* THR空中断 */ - break; - case INT_RCV_OVERTIME: /* 接收超时中断，收到数据后一般是触发这个 。在收到一帧数据后4个数据时间没有后续的数据时触发*/ - case INT_RCV_SUCCESS: /* 接收数据可用中断。这是一个数据帧超过缓存了才发生，否则一般是前面的超时中断。处理过程同上面的超时中断 */ - RevLen = CH438UARTRcv(ext_uart_no, buff[ext_uart_no]); - for(i=0;i Date: Sat, 30 Apr 2022 07:09:36 +0800 Subject: [PATCH 10/46] Update imxrt_ch438.c --- .../Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c | 1 - 1 file changed, 1 deletion(-) diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c index 912ad4a46..23bc10dc5 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c @@ -429,7 +429,6 @@ void ImxrtCh438ReadData(uint8_t ext_uart_no) pthread_cond_wait(&cond, &mutex); if (done[ext_uart_no] == 1) { - ext_uart_no = 2; REG_IIR_ADDR = offsetadd[ext_uart_no] | REG_IIR0_ADDR; REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR; REG_MSR_ADDR = offsetadd[ext_uart_no] | REG_MSR0_ADDR; From d18eda5f26b4e0dfbabc3b5abbdac4090ec94685 Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Thu, 5 May 2022 16:08:15 +0800 Subject: [PATCH 11/46] Register ch438 to character driver --- .../aiit_board/xidatong/src/ch438_demo.c | 36 +-- .../aiit_board/xidatong/src/imxrt_ch438.c | 228 +++++++++++++----- .../aiit_board/xidatong/src/imxrt_ch438.h | 7 +- 3 files changed, 198 insertions(+), 73 deletions(-) diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c index 490f8ec30..f73be6e83 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c @@ -49,22 +49,30 @@ void CH438Demo(void) { + int fd1,fd2; + int i; + char buffer[256]; + int readlen; _info("ch438_main\n"); Ch438InitDefault(); - up_mdelay(1000); - while(1) + ch438_register("/dev/ext_uart3",2); + ch438_register("/dev/ext_uart2",1); + + fd1 = open("/dev/ext_uart3", O_RDWR); + write(fd1, "AT+BAUD=?",9); + readlen = read(fd1, buffer, 256); + + for(i=0;i - -#include -#include - +#include #include #include -#include - -#include "arm_arch.h" - -#include "imxrt_config.h" -#include "imxrt_irq.h" -#include "imxrt_gpio.h" - -#include "imxrt_ch438.h" -#include "xidatong.h" #include #include #include +#include + +#include +#include #include #include #include #include #include +#include + +#include +#include "arm_arch.h" + +#include "imxrt_config.h" +#include "imxrt_irq.h" +#include "imxrt_gpio.h" +#include "imxrt_ch438.h" +#include "xidatong.h" + #define CH438PORTNUM 8 #define BUFFERSIZE 128 +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ +static void ImxrtCH438Init(void); +static void CH438PortInit(uint8_t ext_uart_no, uint32_t baud_rate); +static void CH438SetOutput(void); +static void CH438SetInput(void); +static uint8_t ReadCH438Data(uint8_t addr); +static void WriteCH438Data(uint8_t addr, uint8_t dat); +static void WriteCH438Block(uint8_t mAddr, uint8_t mLen, char *mBuf); +static uint8_t CH438UARTRcv(uint8_t ext_uart_no, char *buf); +static size_t ImxrtCh438ReadData(uint8_t ext_uart_no); +static void CH438UARTSend(uint8_t ext_uart_no, char *Data, uint8_t Num); + + +static int ch438_open(FAR struct file *filep); +static int ch438_close(FAR struct file *filep); +static ssize_t ch438_read(FAR struct file *filep, FAR char *buffer, size_t buflen); +static ssize_t ch438_write(FAR struct file *filep, FAR const char *buffer, size_t buflen); + +/**************************************************************************** + * Private type + ****************************************************************************/ +struct ch438_dev_s +{ + uint8_t port; /* ch438 port number*/ +}; + /**************************************************************************** * Private Data ****************************************************************************/ -/* Semaphore for receiving data */ - static pthread_mutex_t mutex = PTHREAD_MUTEX_INITIALIZER; static pthread_cond_t cond = PTHREAD_COND_INITIALIZER; volatile int done[CH438PORTNUM] = {0}; -static uint8_t RevLen; -static uint8_t buff[CH438PORTNUM][BUFFERSIZE]; +static char buff[CH438PORTNUM][BUFFERSIZE]; static uint8_t buff_ptr[CH438PORTNUM]; static uint8_t Interruptnum[CH438PORTNUM] = {0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,}; /* SSR寄存器中断号对应值 */ static uint8_t offsetadd[CH438PORTNUM] = {0x00,0x10,0x20,0x30,0x08,0x18,0x28,0x38,}; /* 串口号的偏移地址 */ static uint8_t gInterruptStatus; - -/**************************************************************************** - * Private Function Prototypes - ****************************************************************************/ -static void ImxrtCH438Init(void); -static void CH438PortInit(uint8_t ext_uart_no,uint32_t baud_rate); -static void CH438SetOutput(void); -static void CH438SetInput(void); -static uint8_t ReadCH438Data(uint8_t addr); -static void WriteCH438Data(uint8_t addr, uint8_t dat); -static void WriteCH438Block(uint8_t mAddr, uint8_t mLen, uint8_t *mBuf); -static uint8_t CH438UARTRcv(uint8_t ext_uart_no, uint8_t* buf); - - -/**************************************************************************** - * Public and Private Functions - ****************************************************************************/ +static bool g_ch438open[CH438PORTNUM]; +static const struct file_operations g_ch438fops = +{ + ch438_open, + ch438_close, + ch438_read, + ch438_write, + NULL, + NULL, + NULL +}; /**************************************************************************** * Name: getInterruptStatus @@ -122,7 +143,7 @@ int getInterruptStatus(int argc, char **argv) * Configure pin mode to output * ****************************************************************************/ -void CH438SetOutput(void) +static void CH438SetOutput(void) { imxrt_config_gpio(CH438_D0_PIN_OUT); imxrt_config_gpio(CH438_D1_PIN_OUT); @@ -142,7 +163,7 @@ void CH438SetOutput(void) * Configure pin mode to input * ****************************************************************************/ -void CH438SetInput(void) +static void CH438SetInput(void) { imxrt_config_gpio(CH438_D0_PIN_INPUT); imxrt_config_gpio(CH438_D1_PIN_INPUT); @@ -180,7 +201,7 @@ static void ImxrtCH438Init(void) * ch438 port initialization * ****************************************************************************/ -static void CH438PortInit(uint8_t ext_uart_no,uint32_t baud_rate) +static void CH438PortInit(uint8_t ext_uart_no, uint32_t baud_rate) { uint32_t div; uint8_t DLL,DLM,dlab; @@ -333,7 +354,6 @@ static void WriteCH438Data(uint8_t addr, uint8_t dat) return; } - /**************************************************************************** * Name: WriteCH438Block * @@ -341,7 +361,7 @@ static void WriteCH438Data(uint8_t addr, uint8_t dat) * Write data block from ch438 address * ****************************************************************************/ -static void WriteCH438Block(uint8_t mAddr, uint8_t mLen, uint8_t *mBuf) +static void WriteCH438Block(uint8_t mAddr, uint8_t mLen, char *mBuf) { while (mLen--) WriteCH438Data(mAddr, *mBuf++); @@ -354,7 +374,7 @@ static void WriteCH438Block(uint8_t mAddr, uint8_t mLen, uint8_t *mBuf) * Disable FIFO mode for ch438 serial port to receive multi byte data * ****************************************************************************/ -uint8_t CH438UARTRcv(uint8_t ext_uart_no, uint8_t* buf) +uint8_t CH438UARTRcv(uint8_t ext_uart_no, char* buf) { uint8_t RcvNum = 0; uint8_t dat = 0; @@ -385,7 +405,7 @@ uint8_t CH438UARTRcv(uint8_t ext_uart_no, uint8_t* buf) * with a maximum of 128 bytes of data sent at a time * ****************************************************************************/ -void CH438UARTSend(uint8_t ext_uart_no, uint8_t *Data, uint8_t Num) +static void CH438UARTSend(uint8_t ext_uart_no, char *Data, uint8_t Num) { uint8_t REG_LSR_ADDR,REG_THR_ADDR; REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR; @@ -408,7 +428,6 @@ void CH438UARTSend(uint8_t ext_uart_no, uint8_t *Data, uint8_t Num) } } - /**************************************************************************** * Name: ImxrtCh438ReadData * @@ -416,9 +435,9 @@ void CH438UARTSend(uint8_t ext_uart_no, uint8_t *Data, uint8_t Num) * Read data from ch438 port * ****************************************************************************/ -void ImxrtCh438ReadData(uint8_t ext_uart_no) +static size_t ImxrtCh438ReadData(uint8_t ext_uart_no) { - int result, i; + size_t RevLen = 0; uint8_t InterruptStatus; uint8_t REG_IIR_ADDR; uint8_t REG_LSR_ADDR; @@ -435,7 +454,7 @@ void ImxrtCh438ReadData(uint8_t ext_uart_no) InterruptStatus = ReadCH438Data(REG_IIR_ADDR) & 0x0f; /* 读串口的中断状态 */ _info("InterruptStatus is %d\n", InterruptStatus); - switch( InterruptStatus ) + switch(InterruptStatus) { case INT_NOINT: /* 没有中断 */ break; @@ -444,15 +463,7 @@ void ImxrtCh438ReadData(uint8_t ext_uart_no) case INT_RCV_OVERTIME: /* 接收超时中断，收到数据后一般是触发这个 。在收到一帧数据后4个数据时间没有后续的数据时触发*/ case INT_RCV_SUCCESS: /* 接收数据可用中断。这是一个数据帧超过缓存了才发生，否则一般是前面的超时中断。处理过程同上面的超时中断 */ RevLen = CH438UARTRcv(ext_uart_no, buff[ext_uart_no]); - for(i=0;if_inode; + FAR struct ch438_dev_s *priv = inode->i_private; + uint8_t port = priv->port; + DEBUGASSERT(port >= 0 && port < CH438PORTNUM); + + if (g_ch438open[port]) + { + return -EBUSY; + } + g_ch438open[port] = true; + + return OK; +} + +/**************************************************************************** + * Name: ch438_close + ****************************************************************************/ +static int ch438_close(FAR struct file *filep) +{ + FAR struct inode *inode = filep->f_inode; + FAR struct ch438_dev_s *priv = inode->i_private; + uint8_t port = priv->port; + DEBUGASSERT(port >= 0 && port < CH438PORTNUM); + + g_ch438open[port] = false; + return OK; +} + +/**************************************************************************** + * Name: ch438_read + ****************************************************************************/ +static ssize_t ch438_read(FAR struct file *filep, FAR char *buffer, size_t buflen) +{ + size_t length = 0; + FAR struct inode *inode = filep->f_inode; + FAR struct ch438_dev_s *priv = inode->i_private; + uint8_t port = priv->port; + DEBUGASSERT(port >= 0 && port < CH438PORTNUM); + + length = ImxrtCh438ReadData(port); + memcpy(buffer, buff[port], buflen); + + if (length > buflen) + { + length = buflen; + } + + return length; +} + +/**************************************************************************** + * Name: ch438_write + ****************************************************************************/ +static ssize_t ch438_write(FAR struct file *filep, FAR const char *buffer, size_t buflen) +{ + FAR struct inode *inode = filep->f_inode; + FAR struct ch438_dev_s *priv = inode->i_private; + uint8_t port = priv->port; + DEBUGASSERT(port >= 0 && port < CH438PORTNUM); + + CH438UARTSend(port, buffer, buflen); + + return buflen; +} + + +/**************************************************************************** + * Name: ch438_register + * + * Description: + * Register /dev/ext_uartN + * + ****************************************************************************/ +int ch438_register(FAR const char *devpath, uint8_t port) +{ + FAR struct ch438_dev_s *priv; + int ret = 0; + + /* port number check */ + DEBUGASSERT(port >= 0 && port < CH438PORTNUM); + + priv = (FAR struct ch438_dev_s *)kmm_malloc(sizeof(struct ch438_dev_s)); + if (priv == NULL) + { + return -ENOMEM; + } + + priv->port = port; + + /* Register the character driver */ + ret = register_driver(devpath, &g_ch438fops, 0666, priv); + if (ret < 0) + { + kmm_free(priv); + } + + return ret; } \ No newline at end of file diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h index dbb6a41da..c2cbc4eec 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h @@ -299,9 +299,10 @@ GPIO_PORT1 | GPIO_PIN29) - +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ int getInterruptStatus(int argc, char **argv); -void CH438UARTSend(uint8_t ext_uart_no,uint8_t *Data, uint8_t Num); -void ImxrtCh438ReadData(uint8_t ext_uart_no); void Ch438InitDefault(void); +int ch438_register(FAR const char *devpath,uint8_t port); #endif From e007b5567da1758e9cc1b7ab738fd462749497dc Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Thu, 5 May 2022 18:22:42 +0800 Subject: [PATCH 12/46] Register ch438 to character driver --- .../aiit_board/xidatong/Kconfig | 40 +++++++++++++- .../aiit_board/xidatong/src/Makefile | 6 ++- .../aiit_board/xidatong/src/ch438_demo.c | 16 +++--- .../aiit_board/xidatong/src/imxrt_bringup.c | 8 +++ .../aiit_board/xidatong/src/imxrt_ch438.c | 54 +++++++++++++++++-- .../aiit_board/xidatong/src/imxrt_ch438.h | 19 +++++++ .../app_match_nuttx/apps/nshlib/Kconfig | 5 ++ .../app_match_nuttx/apps/nshlib/nsh.h | 4 +- .../apps/nshlib/nsh_Applicationscmd.c | 9 ++-- .../app_match_nuttx/apps/nshlib/nsh_command.c | 4 +- .../app_match_nuttx/nuttx/Kconfig | 32 +++++++++++ 11 files changed, 177 insertions(+), 20 deletions(-) diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/Kconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/Kconfig index e9b8024af..44d81f49f 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/Kconfig +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/Kconfig @@ -83,5 +83,43 @@ config XIDATONG_USB_AUTOMOUNT_UDELAY endif # XIDATONG_USB_AUTOMOUNT +menuconfig BSP_USING_CH438 + bool "Using CH438 device" + default n -endif +if BSP_USING_CH438 +config CH438_EXTUART0 + bool "using ch438 port 0" + default n + +config CH438_EXTUART1 + bool "using ch438 port 1" + default n + +config CH438_EXTUART2 + bool "using ch438 port 2" + default n + +config CH438_EXTUART3 + bool "using ch438 port 3" + default n + +config CH438_EXTUART4 + bool "using ch438 port 4" + default n + +config CH438_EXTUART5 + bool "using ch438 port 5" + default n + +config CH438_EXTUART6 + bool "using ch438 port 6" + default n + +config CH438_EXTUART7 + bool "using ch438 port 7" + default n + +endif # BSP_USING_CH438 + +endif # ARCH_BOARD_XIDATONG diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/Makefile b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/Makefile index 7f4a76155..45b928370 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/Makefile +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/Makefile @@ -20,7 +20,7 @@ include $(TOPDIR)/Make.defs -CSRCS = imxrt_boot.c imxrt_flexspi_nor_boot.c imxrt_flexspi_nor_flash.c imxrt_ch438.c ch438_demo.c +CSRCS = imxrt_boot.c imxrt_flexspi_nor_boot.c imxrt_flexspi_nor_flash.c ifeq ($(CONFIG_IMXRT_SDRAMC),y) CSRCS += imxrt_sdram.c @@ -82,4 +82,8 @@ ifeq ($(CONFIG_XIDATONG_SDIO_AUTOMOUNT),y) CSRCS += imxrt_mmcsd_automount.c endif +ifeq ($(CONFIG_BSP_USING_CH438),y) +CSRCS += imxrt_ch438.c ch438_demo.c +endif + include $(TOPDIR)/boards/Board.mk diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c index f73be6e83..88861f5d5 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c @@ -53,26 +53,26 @@ void CH438Demo(void) int i; char buffer[256]; int readlen; - _info("ch438_main\n"); - Ch438InitDefault(); - ch438_register("/dev/ext_uart3",2); - ch438_register("/dev/ext_uart2",1); - fd1 = open("/dev/ext_uart3", O_RDWR); + fd1 = open("/dev/extuart_dev2", O_RDWR); write(fd1, "AT+BAUD=?",9); readlen = read(fd1, buffer, 256); for(i=0;i #endif +#ifdef CONFIG_BSP_USING_CH438 +# include "imxrt_ch438.h" +#endif + #include "xidatong.h" #include /* Must always be included last */ @@ -181,6 +185,10 @@ int imxrt_bringup(void) } #endif +#ifdef CONFIG_BSP_USING_CH438 + board_ch438_initialize(); +#endif + UNUSED(ret); return OK; } diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c index 695485f40..e9c169b3f 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c @@ -452,7 +452,7 @@ static size_t ImxrtCh438ReadData(uint8_t ext_uart_no) REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR; REG_MSR_ADDR = offsetadd[ext_uart_no] | REG_MSR0_ADDR; InterruptStatus = ReadCH438Data(REG_IIR_ADDR) & 0x0f; /* 读串口的中断状态 */ - _info("InterruptStatus is %d\n", InterruptStatus); + ch438info("InterruptStatus is %d\n", InterruptStatus); switch(InterruptStatus) { @@ -498,7 +498,7 @@ void Ch438InitDefault(void) ret = pthread_mutex_init(&mutex, NULL); if (ret != 0) { - _info("pthread_mutex_init failed, status=%d\n", ret); + ch438err("pthread_mutex_init failed, status=%d\n", ret); } /* Initialize the condition variable */ @@ -506,13 +506,13 @@ void Ch438InitDefault(void) ret = pthread_cond_init(&cond, NULL); if (ret != 0) { - _info("pthread_cond_init failed, status=%d\n", ret); + ch438err("pthread_cond_init failed, status=%d\n", ret); } ret = task_create("ch438_task", 60, 8192, getInterruptStatus, NULL); if (ret < 0) { - _info("task create failed, status=%d\n", ret); + ch438err("task create failed, status=%d\n", ret); } ImxrtCH438Init(); @@ -615,6 +615,7 @@ int ch438_register(FAR const char *devpath, uint8_t port) priv = (FAR struct ch438_dev_s *)kmm_malloc(sizeof(struct ch438_dev_s)); if (priv == NULL) { + ch438err("ERROR: Failed to allocate instance\n"); return -ENOMEM; } @@ -624,8 +625,53 @@ int ch438_register(FAR const char *devpath, uint8_t port) ret = register_driver(devpath, &g_ch438fops, 0666, priv); if (ret < 0) { + ch438err("ERROR: Failed to register driver: %d\n", ret); kmm_free(priv); } return ret; +} + +/**************************************************************************** + * Name: board_ch438_initialize + * + * Description: + * ch438 initialize + * + ****************************************************************************/ +void board_ch438_initialize(void) +{ + Ch438InitDefault(); + +#ifdef CONFIG_CH438_EXTUART0 + ch438_register("/dev/extuart_dev0", 0); +#endif + +#ifdef CONFIG_CH438_EXTUART1 + ch438_register("/dev/extuart_dev1", 1); +#endif + +#ifdef CONFIG_CH438_EXTUART2 + ch438_register("/dev/extuart_dev2", 2); +#endif + +#ifdef CONFIG_CH438_EXTUART3 + ch438_register("/dev/extuart_dev3", 3); +#endif + +#ifdef CONFIG_CH438_EXTUART4 + ch438_register("/dev/extuart_dev4", 4); +#endif + +#ifdef CONFIG_CH438_EXTUART5 + ch438_register("/dev/extuart_dev5", 5); +#endif + +#ifdef CONFIG_CH438_EXTUART6 + ch438_register("/dev/extuart_dev6", 6); +#endif + +#ifdef CONFIG_CH438_EXTUART7 + ch438_register("/dev/extuart_dev7", 7); +#endif } \ No newline at end of file diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h index c2cbc4eec..834668a26 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h @@ -299,10 +299,29 @@ GPIO_PORT1 | GPIO_PIN29) +#ifdef CONFIG_DEBUG_CH438_ERROR +# define ch438err _err +#else +# define ch438err _none +#endif + +#ifdef CONFIG_DEBUG_CH438_WARN +# define ch438warn _warn +#else +# define ch438warn _none +#endif + +#ifdef CONFIG_DEBUG_CH438_INFO +# define ch438info _info +#else +# define ch438info _none +#endif + /**************************************************************************** * Public Function Prototypes ****************************************************************************/ int getInterruptStatus(int argc, char **argv); void Ch438InitDefault(void); int ch438_register(FAR const char *devpath,uint8_t port); +void board_ch438_initialize(void); #endif diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/Kconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/Kconfig index 25a54fb13..96c5fb6c5 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/Kconfig +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/Kconfig @@ -587,6 +587,11 @@ config NSH_DISABLE_XD bool "Disable xd" default y if DEFAULT_SMALL default n if !DEFAULT_SMALL + +config NSH_DISABLE_CH438 + bool "Disable the ch438 demo." + default n + config NSH_DISABLE_HCHO_TB600B_WQ_HCHO1OS bool "Disable the sensor tb600b_wq_hcho1os." default n diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h index f46851a37..912397b01 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h @@ -1417,7 +1417,9 @@ int nsh_foreach_var(FAR struct nsh_vtbl_s *vtbl, nsh_foreach_var_t cb, FAR void *arg); #endif -int cmd_Ch438(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv); +#if defined(CONFIG_BSP_USING_CH438) && !defined(CONFIG_NSH_DISABLE_CH438) + int cmd_Ch438(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv); +#endif #if defined(CONFIG_APPLICATION_SENSOR_HCHO_TB600B_WQ_HCHO1OS) && !defined(CONFIG_NSH_DISABLE_HCHO_TB600B_WQ_HCHO1OS) int cmd_Hcho1os(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv); diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c index 47693892d..465f21be4 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c @@ -36,8 +36,10 @@ #include "nsh.h" #include "nsh_console.h" -extern int FrameworkInit(void); - +/**************************************************************************** + * Name: cmd_Ch438 + ****************************************************************************/ +#if defined(CONFIG_BSP_USING_CH438) && !defined(CONFIG_NSH_DISABLE_CH438) extern void CH438Demo(void); int cmd_Ch438(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv) { @@ -45,8 +47,7 @@ int cmd_Ch438(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv) CH438Demo(); return OK; } - - +#endif /**************************************************************************** * Name: cmd_Hcho1os diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c index ceecb0f79..efe59c107 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c @@ -590,7 +590,9 @@ static const struct cmdmap_s g_cmdmap[] = { "xd", cmd_xd, 3, 3, " " }, #endif - { "ch438", cmd_Ch438, 1, 1, "[ch438 demo cmd.]" }, +#if defined(CONFIG_BSP_USING_CH438) && !defined(CONFIG_NSH_DISABLE_CH438) + { "ch438", cmd_Ch438, 1, 1, "[ch438 demo cmd.]" }, +#endif #if defined(CONFIG_APPLICATION_SENSOR_HCHO_TB600B_WQ_HCHO1OS) && !defined(CONFIG_NSH_DISABLE_HCHO_TB600B_WQ_HCHO1OS) { "hcho1os", cmd_Hcho1os, 1, 1, "[get the concentration of formaldehyde with sensor tb600b_wq_hcho1os.]" }, diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/Kconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/Kconfig index d12f9651c..e7243e890 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/Kconfig +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/Kconfig @@ -1812,6 +1812,38 @@ config DEBUG_VIDEO_INFO Enable video informational output to SYSLOG. endif # DEBUG_VIDEO + +config DEBUG_CH438 + bool "CH438 Debug Features" + default n + ---help--- + Enable CH438 debug features. + +if DEBUG_CH438 + +config DEBUG_CH438_ERROR + bool "CH438 Error Output" + default n + depends on DEBUG_ERROR + ---help--- + Enable CH438 error output to SYSLOG. + +config DEBUG_CH438_WARN + bool "CH438 Warnings Output" + default n + depends on DEBUG_WARN + ---help--- + Enable CH438 warning output to SYSLOG. + +config DEBUG_CH438_INFO + bool "CH438 Informational Output" + default n + depends on DEBUG_INFO + ---help--- + Enable CH438 informational output to SYSLOG. + +endif # DEBUG_CH438 + endif # DEBUG_FEATURES config ARCH_HAVE_STACKCHECK From 522b8848a20b47382906d4acceccafe004ce625e Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Fri, 6 May 2022 10:18:22 +0800 Subject: [PATCH 13/46] move include files to imxrt_ch438.h on nuttx and change board_ch438_initialize --- .../aiit_board/xidatong/src/ch438_demo.c | 60 ++++-------- .../aiit_board/xidatong/src/imxrt_bringup.c | 9 +- .../aiit_board/xidatong/src/imxrt_ch438.c | 96 +++++++++++-------- .../aiit_board/xidatong/src/imxrt_ch438.h | 47 ++++++++- 4 files changed, 120 insertions(+), 92 deletions(-) diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c index 88861f5d5..a90ee6da2 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c @@ -21,58 +21,30 @@ /**************************************************************************** * Included Files ****************************************************************************/ - - -#include - -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - #include "imxrt_ch438.h" -#define TMP (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \ - GPIO_PORT3 | GPIO_PIN3) - void CH438Demo(void) { - int fd1,fd2; + int fd; int i; char buffer[256]; int readlen; - fd1 = open("/dev/extuart_dev2", O_RDWR); - write(fd1, "AT+BAUD=?",9); - readlen = read(fd1, buffer, 256); - - for(i=0;i -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include "arm_arch.h" - -#include "imxrt_config.h" -#include "imxrt_irq.h" -#include "imxrt_gpio.h" #include "imxrt_ch438.h" -#include "xidatong.h" - #define CH438PORTNUM 8 #define BUFFERSIZE 128 @@ -74,7 +48,7 @@ static ssize_t ch438_write(FAR struct file *filep, FAR const char *buffer, size_ ****************************************************************************/ struct ch438_dev_s { - uint8_t port; /* ch438 port number*/ + uint8_t port; /* ch438 port number*/ }; /**************************************************************************** @@ -271,14 +245,12 @@ static uint8_t ReadCH438Data(uint8_t addr) up_udelay(1); imxrt_gpio_write(CH438_ALE_PIN, false); - up_udelay(1); CH438SetInput(); up_udelay(1); imxrt_gpio_write(CH438_NRD_PIN, false); - up_udelay(1); if (imxrt_gpio_read(CH438_D7_PIN_INPUT)) dat |= 0x80; @@ -292,7 +264,6 @@ static uint8_t ReadCH438Data(uint8_t addr) imxrt_gpio_write(CH438_NRD_PIN, true); imxrt_gpio_write(CH438_ALE_PIN, true); - up_udelay(1); return dat; @@ -341,12 +312,10 @@ static void WriteCH438Data(uint8_t addr, uint8_t dat) up_udelay(1); imxrt_gpio_write(CH438_NWR_PIN, false); - up_udelay(1); imxrt_gpio_write(CH438_NWR_PIN, true); imxrt_gpio_write(CH438_ALE_PIN, true); - up_udelay(1); CH438SetInput(); @@ -639,39 +608,84 @@ int ch438_register(FAR const char *devpath, uint8_t port) * ch438 initialize * ****************************************************************************/ -void board_ch438_initialize(void) +int board_ch438_initialize(void) { + int ret = 0; + Ch438InitDefault(); #ifdef CONFIG_CH438_EXTUART0 - ch438_register("/dev/extuart_dev0", 0); + ret = ch438_register("/dev/extuart_dev0", 0); + if (ret < 0) + { + ch438err("Failed to register /dev/extuart_dev0: %d\n", ret); + goto __exit; + } #endif #ifdef CONFIG_CH438_EXTUART1 - ch438_register("/dev/extuart_dev1", 1); + ret = ch438_register("/dev/extuart_dev1", 1); + if (ret < 0) + { + ch438err("Failed to register /dev/extuart_dev1: %d\n", ret); + goto __exit; + } #endif #ifdef CONFIG_CH438_EXTUART2 - ch438_register("/dev/extuart_dev2", 2); + ret = ch438_register("/dev/extuart_dev2", 2); + if (ret < 0) + { + ch438err("Failed to register /dev/extuart_dev2: %d\n", ret); + goto __exit; + } #endif #ifdef CONFIG_CH438_EXTUART3 - ch438_register("/dev/extuart_dev3", 3); + ret = ch438_register("/dev/extuart_dev3", 3); + if (ret < 0) + { + ch438err("Failed to register /dev/extuart_dev3: %d\n", ret); + goto __exit; + } #endif #ifdef CONFIG_CH438_EXTUART4 - ch438_register("/dev/extuart_dev4", 4); + ret = ch438_register("/dev/extuart_dev4", 4); + if (ret < 0) + { + ch438err("Failed to register /dev/extuart_dev4: %d\n", ret); + goto __exit; + } #endif #ifdef CONFIG_CH438_EXTUART5 - ch438_register("/dev/extuart_dev5", 5); + ret = ch438_register("/dev/extuart_dev5", 5); + if (ret < 0) + { + ch438err("Failed to register /dev/extuart_dev5: %d\n", ret); + goto __exit; + } #endif #ifdef CONFIG_CH438_EXTUART6 - ch438_register("/dev/extuart_dev6", 6); + ret = ch438_register("/dev/extuart_dev6", 6); + if (ret < 0) + { + ch438err("Failed to register /dev/extuart_dev6: %d\n", ret); + goto __exit; + } #endif #ifdef CONFIG_CH438_EXTUART7 - ch438_register("/dev/extuart_dev7", 7); + ret = ch438_register("/dev/extuart_dev7", 7); + if (ret < 0) + { + ch438err("Failed to register /dev/extuart_dev7: %d\n", ret); + goto __exit; + } #endif + +__exit: + return ret; } \ No newline at end of file diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h index 834668a26..7c6c78968 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h @@ -18,9 +18,44 @@ * @date 2022.04.26 */ -#ifndef __QC_TEST_CH438__ -#define __QC_TEST_CH438__ +#ifndef __BOARDS_ARM_IMXRT_XIDATONG_SRC_IMXRT_CH438_H +#define __BOARDS_ARM_IMXRT_XIDATONG_SRC_IMXRT_CH438_H +/**************************************************************************** + * Included Files + ****************************************************************************/ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include "arm_arch.h" + +#include "imxrt_config.h" +#include "imxrt_irq.h" +#include "imxrt_gpio.h" #include "xidatong.h" /******************************************************************************************/ @@ -300,7 +335,7 @@ #ifdef CONFIG_DEBUG_CH438_ERROR -# define ch438err _err +# define ch438err _err #else # define ch438err _none #endif @@ -320,8 +355,12 @@ /**************************************************************************** * Public Function Prototypes ****************************************************************************/ +#ifdef CONFIG_BSP_USING_CH438 int getInterruptStatus(int argc, char **argv); void Ch438InitDefault(void); int ch438_register(FAR const char *devpath,uint8_t port); -void board_ch438_initialize(void); +int board_ch438_initialize(void); #endif + +#endif /* __BOARDS_ARM_IMXRT_XIDATONG_SRC_IMXRT_CH438_H */ + From 30d4201b095ccff3eb8feecfbf5686351970d7ec Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Fri, 6 May 2022 12:06:34 +0800 Subject: [PATCH 14/46] add loraopen to cmd --- .../app_match_nuttx/apps/nshlib/Kconfig | 8 ++++++-- .../app_match_nuttx/apps/nshlib/nsh.h | 4 ++++ .../app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c | 11 +++++++++++ .../app_match_nuttx/apps/nshlib/nsh_command.c | 4 ++++ 4 files changed, 25 insertions(+), 2 deletions(-) diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/Kconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/Kconfig index 96c5fb6c5..4e03b59d8 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/Kconfig +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/Kconfig @@ -664,14 +664,18 @@ config NSH_DISABLE_ADAPTER_4GTEST bool "Disable ec200t Adapter4GTest." default n -config DISABLE_E220_LORATEST +config NSH_DISABLE_E220_LORATEST bool "Disable e220 Lora test." default n -config DISABLE_E220_LORASEND +config NSH_DISABLE_E220_LORASEND bool "Disable e220 Lora send." default n +config NSH_DISABLE_E220_LORAOPEN + bool "Disable e220 Lora open." + default n + config NSH_DISABLE_K210_FFT bool "Disable the K210 fft device." default n diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h index 912397b01..6a950f277 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h @@ -1502,6 +1502,10 @@ int nsh_foreach_var(FAR struct nsh_vtbl_s *vtbl, nsh_foreach_var_t cb, int cmd_e220loraSend(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv); #endif +#if defined(CONFIG_ADAPTER_LORA_E220) && !defined(CONFIG_NSH_DISABLE_E220_LORAOPEN) + int cmd_e220LoraOpen(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv); +#endif + #if defined(CONFIG_K210_FFT_TEST) && !defined(CONFIG_NSH_DISABLE_K210_FFT) int cmd_fft(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv); #endif diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c index 465f21be4..b1d0c3769 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c @@ -327,6 +327,17 @@ int cmd_e220loraSend(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv) } #endif +#if defined(CONFIG_ADAPTER_LORA_E220) && !defined(CONFIG_NSH_DISABLE_E220_LORAOPEN) +extern void LoraOpen(void); +int cmd_e220LoraOpen(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv) +{ + nsh_output(vtbl, "Hello, world!\n"); + FrameworkInit(); + LoraOpen(); + return OK; +} +#endif + #if defined(CONFIG_K210_FFT_TEST) && !defined(CONFIG_NSH_DISABLE_K210_FFT) extern void nuttx_k210_fft_test(void); int cmd_fft(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv) diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c index efe59c107..d4d5e01e2 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c @@ -674,6 +674,10 @@ static const struct cmdmap_s g_cmdmap[] = { "e220loraSend", cmd_e220loraSend, 1, 2, "[e220loraSend ]" }, #endif +#if defined(CONFIG_ADAPTER_LORA_E220) && !defined(CONFIG_NSH_DISABLE_E220_LORAOPEN) + { "e220loraOpen", cmd_e220LoraOpen, 1, 1, "[e220lora open device" }, +#endif + #if defined(CONFIG_K210_FFT_TEST) && !defined(CONFIG_NSH_DISABLE_K210_FFT) { "fft", cmd_fft, 1, 1, "[K210 fft function.]" }, #endif From 2b40ba4d1ad0755ac93f59d2eda48fb823036004 Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Sat, 7 May 2022 09:08:22 +0800 Subject: [PATCH 15/46] ch438 changge mutex and cond --- .../aiit_board/xidatong/src/ch438_demo.c | 67 ++++++++++++++----- .../aiit_board/xidatong/src/imxrt_ch438.c | 60 ++++++++++++----- 2 files changed, 95 insertions(+), 32 deletions(-) diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c index a90ee6da2..a5f02baf6 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c @@ -22,29 +22,66 @@ * Included Files ****************************************************************************/ #include "imxrt_ch438.h" +#include +#include void CH438Demo(void) { - int fd; + int fd,m0fd,m1fd; int i; + char sendbuffer1[4] = {0xC0,0x04,0x01,0x09}; + char sendbuffer2[6] = {0xC0,0x00,0x03,0x12,0x34,0x61}; + char sendbuffer3[3] = {0xC1,0x04,0x01}; + char sendbuffer4[3] = {0xC1,0x00,0x03}; char buffer[256]; int readlen; - while(1) + // while(1) + // { + fd = open("/dev/extuart_dev3", O_RDWR); + m0fd = open("/dev/gpout0", O_RDWR); + m1fd = open("/dev/gpout1", O_RDWR); + ioctl(m0fd, GPIOC_WRITE, (unsigned long)1); + ioctl(m1fd, GPIOC_WRITE, (unsigned long)1); + sleep(1); + + write(fd, sendbuffer1,4); + sleep(1); + readlen = read(fd, buffer, 256); + printf("readlen1 = %d\n", readlen); + for(i = 0;i< readlen; ++i) { - fd = open("/dev/extuart_dev2", O_RDWR); - write(fd, "AT+ADDR=?",9); - sleep(1); - readlen = read(fd, buffer, 256); - - printf("readlen1 = %d\n", readlen); - - for(i = 0;i< readlen; ++i) - { - printf("%c(0x%x)\n", buffer[i], buffer[i]); - } - - close(fd); + printf("0x%x\n", buffer[i]); } + + write(fd, sendbuffer2,6); + sleep(1); + readlen = read(fd, buffer, 256); + printf("readlen1 = %d\n", readlen); + for(i = 0;i< readlen; ++i) + { + printf("0x%x\n", buffer[i]); + } + + write(fd, sendbuffer3,3); + sleep(1); + readlen = read(fd, buffer, 256); + printf("readlen1 = %d\n", readlen); + for(i = 0;i< readlen; ++i) + { + printf("0x%x\n", buffer[i]); + } + + write(fd, sendbuffer4,3); + sleep(1); + readlen = read(fd, buffer, 256); + printf("readlen1 = %d\n", readlen); + for(i = 0;i< readlen; ++i) + { + printf("0x%x\n", buffer[i]); + } + + close(fd); + // } } diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c index d38566437..c859645f9 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c @@ -55,8 +55,29 @@ struct ch438_dev_s * Private Data ****************************************************************************/ -static pthread_mutex_t mutex = PTHREAD_MUTEX_INITIALIZER; -static pthread_cond_t cond = PTHREAD_COND_INITIALIZER; +static pthread_mutex_t mutex[CH438PORTNUM] = +{ + PTHREAD_MUTEX_INITIALIZER, + PTHREAD_MUTEX_INITIALIZER, + PTHREAD_MUTEX_INITIALIZER, + PTHREAD_MUTEX_INITIALIZER, + PTHREAD_MUTEX_INITIALIZER, + PTHREAD_MUTEX_INITIALIZER, + PTHREAD_MUTEX_INITIALIZER, + PTHREAD_MUTEX_INITIALIZER +}; +static pthread_cond_t cond[CH438PORTNUM] = +{ + PTHREAD_COND_INITIALIZER, + PTHREAD_COND_INITIALIZER, + PTHREAD_COND_INITIALIZER, + PTHREAD_COND_INITIALIZER, + PTHREAD_COND_INITIALIZER, + PTHREAD_COND_INITIALIZER, + PTHREAD_COND_INITIALIZER, + PTHREAD_COND_INITIALIZER +}; + volatile int done[CH438PORTNUM] = {0}; static char buff[CH438PORTNUM][BUFFERSIZE]; @@ -90,11 +111,11 @@ int getInterruptStatus(int argc, char **argv) uint8_t ext_uart_no = 0; while(1) { - pthread_mutex_lock(&mutex); + pthread_mutex_lock(&mutex[ext_uart_no]); gInterruptStatus = ReadCH438Data(REG_SSR_ADDR); if(!gInterruptStatus) { - pthread_mutex_unlock(&mutex); + pthread_mutex_unlock(&mutex[ext_uart_no]); continue; } @@ -103,8 +124,8 @@ int getInterruptStatus(int argc, char **argv) if(gInterruptStatus & Interruptnum[ext_uart_no]) { done[ext_uart_no] = 1; - pthread_cond_signal(&cond); - pthread_mutex_unlock(&mutex); + pthread_cond_signal(&cond[ext_uart_no]); + pthread_mutex_unlock(&mutex[ext_uart_no]); } } } @@ -412,9 +433,9 @@ static size_t ImxrtCh438ReadData(uint8_t ext_uart_no) uint8_t REG_LSR_ADDR; uint8_t REG_MSR_ADDR; - pthread_mutex_lock(&mutex); + pthread_mutex_lock(&mutex[ext_uart_no]); while(done[ext_uart_no] == 0) - pthread_cond_wait(&cond, &mutex); + pthread_cond_wait(&cond[ext_uart_no], &mutex[ext_uart_no]); if (done[ext_uart_no] == 1) { REG_IIR_ADDR = offsetadd[ext_uart_no] | REG_IIR0_ADDR; @@ -445,7 +466,7 @@ static size_t ImxrtCh438ReadData(uint8_t ext_uart_no) break; } } - pthread_mutex_unlock(&mutex); + pthread_mutex_unlock(&mutex[ext_uart_no]); return RevLen; } @@ -460,22 +481,27 @@ static size_t ImxrtCh438ReadData(uint8_t ext_uart_no) void Ch438InitDefault(void) { - int ret; + int ret, i; /* Initialize the mutex */ - ret = pthread_mutex_init(&mutex, NULL); - if (ret != 0) + for(i = 0; i < CH438PORTNUM; i++) { - ch438err("pthread_mutex_init failed, status=%d\n", ret); + ret = pthread_mutex_init(&mutex[i], NULL); + if (ret != 0) + { + ch438err("pthread_mutex_init failed, status=%d\n", ret); + } } /* Initialize the condition variable */ - - ret = pthread_cond_init(&cond, NULL); - if (ret != 0) + for(i = 0; i < CH438PORTNUM; i++) { - ch438err("pthread_cond_init failed, status=%d\n", ret); + ret = pthread_cond_init(&cond[i], NULL); + if (ret != 0) + { + ch438err("pthread_cond_init failed, status=%d\n", ret); + } } ret = task_create("ch438_task", 60, 8192, getInterruptStatus, NULL); From 64109b512062d1195fed9204f51c041205fe4c49 Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Sat, 7 May 2022 15:36:23 +0800 Subject: [PATCH 16/46] add ImxrtCh438WriteData for ch438 on nuttx --- .../aiit_board/xidatong/src/imxrt_ch438.c | 274 +++++++++++------- .../aiit_board/xidatong/src/imxrt_ch438.h | 3 - 2 files changed, 168 insertions(+), 109 deletions(-) diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c index c859645f9..3c71e49d4 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c @@ -21,27 +21,30 @@ #include "imxrt_ch438.h" #define CH438PORTNUM 8 -#define BUFFERSIZE 128 +#define CH438_BUFFSIZE 256 /**************************************************************************** * Private Function Prototypes ****************************************************************************/ -static void ImxrtCH438Init(void); -static void CH438PortInit(uint8_t ext_uart_no, uint32_t baud_rate); +static int getInterruptStatus(int argc, char **argv); static void CH438SetOutput(void); static void CH438SetInput(void); static uint8_t ReadCH438Data(uint8_t addr); static void WriteCH438Data(uint8_t addr, uint8_t dat); static void WriteCH438Block(uint8_t mAddr, uint8_t mLen, char *mBuf); -static uint8_t CH438UARTRcv(uint8_t ext_uart_no, char *buf); +static void Ch438UartSend(uint8_t ext_uart_no, char *Data, uint16_t Num); +uint8_t CH438UARTRcv(uint8_t ext_uart_no, char* buf); +static void ImxrtCH438Init(void); +static void CH438PortInit(uint8_t ext_uart_no, uint32_t baud_rate); +static int ImxrtCh438WriteData(uint8_t ext_uart_no, char *write_buffer, size_t size); static size_t ImxrtCh438ReadData(uint8_t ext_uart_no); -static void CH438UARTSend(uint8_t ext_uart_no, char *Data, uint8_t Num); - +static void Ch438InitDefault(void); static int ch438_open(FAR struct file *filep); static int ch438_close(FAR struct file *filep); static ssize_t ch438_read(FAR struct file *filep, FAR char *buffer, size_t buflen); static ssize_t ch438_write(FAR struct file *filep, FAR const char *buffer, size_t buflen); +static int ch438_register(FAR const char *devpath, uint8_t ext_uart_no); /**************************************************************************** * Private type @@ -80,7 +83,7 @@ static pthread_cond_t cond[CH438PORTNUM] = volatile int done[CH438PORTNUM] = {0}; -static char buff[CH438PORTNUM][BUFFERSIZE]; +static char buff[CH438PORTNUM][CH438_BUFFSIZE]; static uint8_t buff_ptr[CH438PORTNUM]; static uint8_t Interruptnum[CH438PORTNUM] = {0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,}; /* SSR寄存器中断号对应值 */ static uint8_t offsetadd[CH438PORTNUM] = {0x00,0x10,0x20,0x30,0x08,0x18,0x28,0x38,}; /* 串口号的偏移地址 */ @@ -106,7 +109,7 @@ static const struct file_operations g_ch438fops = * thread task getInterruptStatus * ****************************************************************************/ -int getInterruptStatus(int argc, char **argv) +static int getInterruptStatus(int argc, char **argv) { uint8_t ext_uart_no = 0; while(1) @@ -148,7 +151,6 @@ static void CH438SetOutput(void) imxrt_config_gpio(CH438_D5_PIN_OUT); imxrt_config_gpio(CH438_D6_PIN_OUT); imxrt_config_gpio(CH438_D7_PIN_OUT); - } /**************************************************************************** @@ -170,73 +172,6 @@ static void CH438SetInput(void) imxrt_config_gpio(CH438_D7_PIN_INPUT); } -/**************************************************************************** - * Name: ImxrtCH438Init - * - * Description: - * ch438 initialization - * - ****************************************************************************/ -static void ImxrtCH438Init(void) -{ - CH438SetOutput(); - imxrt_config_gpio(CH438_NWR_PIN); - imxrt_config_gpio(CH438_NRD_PIN); - imxrt_config_gpio(CH438_ALE_PIN); - - imxrt_gpio_write(CH438_NWR_PIN,true); - imxrt_gpio_write(CH438_NRD_PIN,true); - imxrt_gpio_write(CH438_ALE_PIN,true); -} - -/**************************************************************************** - * Name: CH438PortInit - * - * Description: - * ch438 port initialization - * - ****************************************************************************/ -static void CH438PortInit(uint8_t ext_uart_no, uint32_t baud_rate) -{ - uint32_t div; - uint8_t DLL,DLM,dlab; - uint8_t REG_LCR_ADDR; - uint8_t REG_DLL_ADDR; - uint8_t REG_DLM_ADDR; - uint8_t REG_IER_ADDR; - uint8_t REG_MCR_ADDR; - uint8_t REG_FCR_ADDR; - - REG_LCR_ADDR = offsetadd[ext_uart_no] | REG_LCR0_ADDR; - REG_DLL_ADDR = offsetadd[ext_uart_no] | REG_DLL0_ADDR; - REG_DLM_ADDR = offsetadd[ext_uart_no] | REG_DLM0_ADDR; - REG_IER_ADDR = offsetadd[ext_uart_no] | REG_IER0_ADDR; - REG_MCR_ADDR = offsetadd[ext_uart_no] | REG_MCR0_ADDR; - REG_FCR_ADDR = offsetadd[ext_uart_no] | REG_FCR0_ADDR; - - WriteCH438Data(REG_IER_ADDR, BIT_IER_RESET); /* 复位该串口 */ - up_mdelay(50); - - dlab = ReadCH438Data(REG_IER_ADDR); - dlab &= 0xDF; - WriteCH438Data(REG_IER_ADDR, dlab); - - dlab = ReadCH438Data(REG_LCR_ADDR); - dlab |= 0x80; //置LCR寄存器DLAB位为1 - WriteCH438Data(REG_LCR_ADDR, dlab); - - div = ( Fpclk >> 4 ) / baud_rate; - DLM = div >> 8; - DLL = div & 0xff; - WriteCH438Data(REG_DLL_ADDR, DLL); /* 设置波特率 */ - WriteCH438Data(REG_DLM_ADDR, DLM); - WriteCH438Data(REG_FCR_ADDR, BIT_FCR_RECVTG1 | BIT_FCR_RECVTG0 | BIT_FCR_FIFOEN); /* 设置FIFO模式，触发点为112字节 */ - WriteCH438Data(REG_LCR_ADDR, BIT_LCR_WORDSZ1 | BIT_LCR_WORDSZ0 ); /* 字长8位，1位停止位、无校验 */ - WriteCH438Data(REG_IER_ADDR, BIT_IER_IERECV); /* 使能中断 */ - WriteCH438Data(REG_MCR_ADDR, BIT_MCR_OUT2);// | BIT_MCR_RTS | BIT_MCR_DTR ); /* 允许中断输出,DTR,RTS为1 */ - WriteCH438Data(REG_FCR_ADDR, ReadCH438Data(REG_FCR_ADDR)| BIT_FCR_TFIFORST); /* 清空FIFO中的数据 */ -} - /**************************************************************************** * Name: ReadCH438Data * @@ -288,7 +223,6 @@ static uint8_t ReadCH438Data(uint8_t addr) up_udelay(1); return dat; - } /**************************************************************************** @@ -357,6 +291,37 @@ static void WriteCH438Block(uint8_t mAddr, uint8_t mLen, char *mBuf) WriteCH438Data(mAddr, *mBuf++); } +/**************************************************************************** + * Name: CH438UARTSend + * + * Description: + * Enable FIFO mode, which is used for ch438 serial port to send multi byte data, + * with a maximum of 128 bytes of data sent at a time + * + ****************************************************************************/ +static void Ch438UartSend(uint8_t ext_uart_no, char *Data, uint16_t Num) +{ + uint8_t REG_LSR_ADDR,REG_THR_ADDR; + REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR; + REG_THR_ADDR = offsetadd[ext_uart_no] | REG_THR0_ADDR; + + while(1) + { + while((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_TEMT ) == 0); /* 等待数据发送完毕，THR,TSR全空 */ + if(Num <= CH438_BUFFSIZE) + { + WriteCH438Block(REG_THR_ADDR, Num, Data); + break; + } + else + { + WriteCH438Block(REG_THR_ADDR, 128, Data); + Num -= CH438_BUFFSIZE; + Data += CH438_BUFFSIZE; + } + } +} + /**************************************************************************** * Name: CH438UARTRcv * @@ -373,14 +338,15 @@ uint8_t CH438UARTRcv(uint8_t ext_uart_no, char* buf) REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR; REG_RBR_ADDR = offsetadd[ext_uart_no] | REG_RBR0_ADDR; - while((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_DATARDY) == 0 ); /* 等待数据准备好 */ + /* Wait for the data to be ready */ + while((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_DATARDY) == 0 ); while((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_DATARDY) == 0x01 ) { dat = ReadCH438Data(REG_RBR_ADDR); buff[ext_uart_no][buff_ptr[ext_uart_no]] = dat; buff_ptr[ext_uart_no] = buff_ptr[ext_uart_no] + 1; - if (buff_ptr[ext_uart_no] == BUFFERSIZE) + if (buff_ptr[ext_uart_no] == CH438_BUFFSIZE) buff_ptr[ext_uart_no] = 0; RcvNum = RcvNum + 1; } @@ -388,34 +354,130 @@ uint8_t CH438UARTRcv(uint8_t ext_uart_no, char* buf) } /**************************************************************************** - * Name: CH438UARTSend + * Name: ImxrtCH438Init * * Description: - * Enable FIFO mode, which is used for ch438 serial port to send multi byte data, - * with a maximum of 128 bytes of data sent at a time + * ch438 initialization * - ****************************************************************************/ -static void CH438UARTSend(uint8_t ext_uart_no, char *Data, uint8_t Num) + ****************************************************************************/ +static void ImxrtCH438Init(void) { - uint8_t REG_LSR_ADDR,REG_THR_ADDR; - REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR; - REG_THR_ADDR = offsetadd[ext_uart_no] | REG_THR0_ADDR; + CH438SetOutput(); + imxrt_config_gpio(CH438_NWR_PIN); + imxrt_config_gpio(CH438_NRD_PIN); + imxrt_config_gpio(CH438_ALE_PIN); - while(1) - { - while((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_TEMT ) == 0); /* 等待数据发送完毕，THR,TSR全空 */ - if(Num <= BUFFERSIZE) - { - WriteCH438Block(REG_THR_ADDR, Num, Data); - break; - } - else - { - WriteCH438Block(REG_THR_ADDR, BUFFERSIZE, Data); - Num -= BUFFERSIZE; - Data += BUFFERSIZE; - } - } + imxrt_gpio_write(CH438_NWR_PIN,true); + imxrt_gpio_write(CH438_NRD_PIN,true); + imxrt_gpio_write(CH438_ALE_PIN,true); +} + +/**************************************************************************** + * Name: CH438PortInit + * + * Description: + * ch438 port initialization + * + ****************************************************************************/ +static void CH438PortInit(uint8_t ext_uart_no, uint32_t baud_rate) +{ + uint32_t div; + uint8_t DLL,DLM,dlab; + uint8_t REG_LCR_ADDR; + uint8_t REG_DLL_ADDR; + uint8_t REG_DLM_ADDR; + uint8_t REG_IER_ADDR; + uint8_t REG_MCR_ADDR; + uint8_t REG_FCR_ADDR; + + REG_LCR_ADDR = offsetadd[ext_uart_no] | REG_LCR0_ADDR; + REG_DLL_ADDR = offsetadd[ext_uart_no] | REG_DLL0_ADDR; + REG_DLM_ADDR = offsetadd[ext_uart_no] | REG_DLM0_ADDR; + REG_IER_ADDR = offsetadd[ext_uart_no] | REG_IER0_ADDR; + REG_MCR_ADDR = offsetadd[ext_uart_no] | REG_MCR0_ADDR; + REG_FCR_ADDR = offsetadd[ext_uart_no] | REG_FCR0_ADDR; + + /* reset the uart */ + WriteCH438Data(REG_IER_ADDR, BIT_IER_RESET); + up_mdelay(50); + + dlab = ReadCH438Data(REG_IER_ADDR); + dlab &= 0xDF; + WriteCH438Data(REG_IER_ADDR, dlab); + + /* set LCR register DLAB bit 1 */ + dlab = ReadCH438Data(REG_LCR_ADDR); + dlab |= 0x80; + WriteCH438Data(REG_LCR_ADDR, dlab); + + div = ( Fpclk >> 4 ) / baud_rate; + DLM = div >> 8; + DLL = div & 0xff; + + /* set bps */ + WriteCH438Data(REG_DLL_ADDR, DLL); + WriteCH438Data(REG_DLM_ADDR, DLM); + + /* set FIFO mode, 112 bytes */ + WriteCH438Data(REG_FCR_ADDR, BIT_FCR_RECVTG1 | BIT_FCR_RECVTG0 | BIT_FCR_FIFOEN); + + /* 8 bit word size, 1 bit stop bit, no crc */ + WriteCH438Data(REG_LCR_ADDR, BIT_LCR_WORDSZ1 | BIT_LCR_WORDSZ0); + + /* enable interrupt */ + WriteCH438Data(REG_IER_ADDR, BIT_IER_IERECV); + + /* allow interrupt output, DTR and RTS is 1 */ + WriteCH438Data(REG_MCR_ADDR, BIT_MCR_OUT2); + + /* release the data in FIFO */ + WriteCH438Data(REG_FCR_ADDR, ReadCH438Data(REG_FCR_ADDR)| BIT_FCR_TFIFORST); +} + +/**************************************************************************** + * Name: ImxrtCh438ReadData + * + * Description: + * Read data from ch438 port + * + ****************************************************************************/ +static int ImxrtCh438WriteData(uint8_t ext_uart_no, char *write_buffer, size_t size) +{ + int write_len, write_len_continue; + int i, write_index; + DEBUGASSERT(write_buffer != NULL); + + write_len = size;; + write_len_continue = size; + + if (write_len > CH438_BUFFSIZE) + { + if (0 == write_len % CH438_BUFFSIZE) + { + write_index = write_len / CH438_BUFFSIZE; + for (i = 0; i < write_index; i ++) + { + Ch438UartSend(ext_uart_no, write_buffer + i * CH438_BUFFSIZE, CH438_BUFFSIZE); + } + } + else + { + write_index = 0; + while (write_len_continue > CH438_BUFFSIZE) + { + Ch438UartSend(ext_uart_no, write_buffer + write_index * CH438_BUFFSIZE, CH438_BUFFSIZE); + write_index++; + write_len_continue = write_len - write_index * CH438_BUFFSIZE; + } + Ch438UartSend(ext_uart_no, write_buffer + write_index * CH438_BUFFSIZE, write_len_continue); + } + } + else + { + Ch438UartSend(ext_uart_no, write_buffer, write_len); + } + + return 0; } /**************************************************************************** @@ -478,7 +540,7 @@ static size_t ImxrtCh438ReadData(uint8_t ext_uart_no) * Ch438 default initialization function * ****************************************************************************/ -void Ch438InitDefault(void) +static void Ch438InitDefault(void) { int ret, i; @@ -566,7 +628,7 @@ static ssize_t ch438_read(FAR struct file *filep, FAR char *buffer, size_t bufle DEBUGASSERT(port >= 0 && port < CH438PORTNUM); length = ImxrtCh438ReadData(port); - memcpy(buffer, buff[port], buflen); + memcpy(buffer, buff[port], length); if (length > buflen) { @@ -586,7 +648,7 @@ static ssize_t ch438_write(FAR struct file *filep, FAR const char *buffer, size_ uint8_t port = priv->port; DEBUGASSERT(port >= 0 && port < CH438PORTNUM); - CH438UARTSend(port, buffer, buflen); + ImxrtCh438WriteData(port, buffer, buflen); return buflen; } @@ -599,7 +661,7 @@ static ssize_t ch438_write(FAR struct file *filep, FAR const char *buffer, size_ * Register /dev/ext_uartN * ****************************************************************************/ -int ch438_register(FAR const char *devpath, uint8_t port) +static int ch438_register(FAR const char *devpath, uint8_t port) { FAR struct ch438_dev_s *priv; int ret = 0; diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h index 7c6c78968..f9403db9b 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h @@ -356,9 +356,6 @@ * Public Function Prototypes ****************************************************************************/ #ifdef CONFIG_BSP_USING_CH438 -int getInterruptStatus(int argc, char **argv); -void Ch438InitDefault(void); -int ch438_register(FAR const char *devpath,uint8_t port); int board_ch438_initialize(void); #endif From de273145c36a2085e27dbac3ed2f88e6fa4d12b5 Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Sat, 7 May 2022 18:18:03 +0800 Subject: [PATCH 17/46] change ch438 on nuttx --- .../aiit_board/xidatong/src/imxrt_ch438.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c index 3c71e49d4..fbe3e3179 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c @@ -81,7 +81,7 @@ static pthread_cond_t cond[CH438PORTNUM] = PTHREAD_COND_INITIALIZER }; -volatile int done[CH438PORTNUM] = {0}; +volatile bool done[CH438PORTNUM] = {false,false,false,false,false,false,false,false}; static char buff[CH438PORTNUM][CH438_BUFFSIZE]; static uint8_t buff_ptr[CH438PORTNUM]; @@ -126,7 +126,7 @@ static int getInterruptStatus(int argc, char **argv) { if(gInterruptStatus & Interruptnum[ext_uart_no]) { - done[ext_uart_no] = 1; + done[ext_uart_no] = true; pthread_cond_signal(&cond[ext_uart_no]); pthread_mutex_unlock(&mutex[ext_uart_no]); } @@ -496,9 +496,9 @@ static size_t ImxrtCh438ReadData(uint8_t ext_uart_no) uint8_t REG_MSR_ADDR; pthread_mutex_lock(&mutex[ext_uart_no]); - while(done[ext_uart_no] == 0) + while(done[ext_uart_no] == false) pthread_cond_wait(&cond[ext_uart_no], &mutex[ext_uart_no]); - if (done[ext_uart_no] == 1) + if (done[ext_uart_no] == true) { REG_IIR_ADDR = offsetadd[ext_uart_no] | REG_IIR0_ADDR; REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR; @@ -527,6 +527,9 @@ static size_t ImxrtCh438ReadData(uint8_t ext_uart_no) default: break; } + + done[ext_uart_no] = false; + } pthread_mutex_unlock(&mutex[ext_uart_no]); From ee132df28a7dcc31a8cdb0dedc4541f8fc645e99 Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Mon, 9 May 2022 17:29:49 +0800 Subject: [PATCH 18/46] change ch438 on nuttx --- .../aiit_board/xidatong/src/imxrt_bringup.c | 7 +- .../aiit_board/xidatong/src/imxrt_ch438.c | 790 +++++++++--------- .../aiit_board/xidatong/src/imxrt_ch438.h | 2 +- 3 files changed, 375 insertions(+), 424 deletions(-) diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_bringup.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_bringup.c index a039c203b..7f6b1ee72 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_bringup.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_bringup.c @@ -184,12 +184,7 @@ int imxrt_bringup(void) #endif #ifdef CONFIG_BSP_USING_CH438 - ret = board_ch438_initialize(); - if (ret < 0) - { - syslog(LOG_ERR, "Failed to initialize ch438 Driver: %d\n", ret); - } - + board_ch438_initialize(); #endif UNUSED(ret); diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c index fbe3e3179..668438793 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c @@ -60,33 +60,33 @@ struct ch438_dev_s static pthread_mutex_t mutex[CH438PORTNUM] = { - PTHREAD_MUTEX_INITIALIZER, - PTHREAD_MUTEX_INITIALIZER, - PTHREAD_MUTEX_INITIALIZER, - PTHREAD_MUTEX_INITIALIZER, - PTHREAD_MUTEX_INITIALIZER, - PTHREAD_MUTEX_INITIALIZER, - PTHREAD_MUTEX_INITIALIZER, - PTHREAD_MUTEX_INITIALIZER + PTHREAD_MUTEX_INITIALIZER, + PTHREAD_MUTEX_INITIALIZER, + PTHREAD_MUTEX_INITIALIZER, + PTHREAD_MUTEX_INITIALIZER, + PTHREAD_MUTEX_INITIALIZER, + PTHREAD_MUTEX_INITIALIZER, + PTHREAD_MUTEX_INITIALIZER, + PTHREAD_MUTEX_INITIALIZER }; static pthread_cond_t cond[CH438PORTNUM] = { - PTHREAD_COND_INITIALIZER, - PTHREAD_COND_INITIALIZER, - PTHREAD_COND_INITIALIZER, - PTHREAD_COND_INITIALIZER, - PTHREAD_COND_INITIALIZER, - PTHREAD_COND_INITIALIZER, - PTHREAD_COND_INITIALIZER, - PTHREAD_COND_INITIALIZER + PTHREAD_COND_INITIALIZER, + PTHREAD_COND_INITIALIZER, + PTHREAD_COND_INITIALIZER, + PTHREAD_COND_INITIALIZER, + PTHREAD_COND_INITIALIZER, + PTHREAD_COND_INITIALIZER, + PTHREAD_COND_INITIALIZER, + PTHREAD_COND_INITIALIZER }; volatile bool done[CH438PORTNUM] = {false,false,false,false,false,false,false,false}; -static char buff[CH438PORTNUM][CH438_BUFFSIZE]; -static uint8_t buff_ptr[CH438PORTNUM]; -static uint8_t Interruptnum[CH438PORTNUM] = {0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,}; /* SSR寄存器中断号对应值 */ -static uint8_t offsetadd[CH438PORTNUM] = {0x00,0x10,0x20,0x30,0x08,0x18,0x28,0x38,}; /* 串口号的偏移地址 */ +static char buff[CH438PORTNUM][CH438_BUFFSIZE]; +static uint8_t buff_ptr[CH438PORTNUM]; +static uint8_t Interruptnum[CH438PORTNUM] = {0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,}; /* SSR寄存器中断号对应值 */ +static uint8_t offsetadd[CH438PORTNUM] = {0x00,0x10,0x20,0x30,0x08,0x18,0x28,0x38,}; /* 串口号的偏移地址 */ static uint8_t gInterruptStatus; @@ -111,27 +111,27 @@ static const struct file_operations g_ch438fops = ****************************************************************************/ static int getInterruptStatus(int argc, char **argv) { - uint8_t ext_uart_no = 0; - while(1) - { - pthread_mutex_lock(&mutex[ext_uart_no]); - gInterruptStatus = ReadCH438Data(REG_SSR_ADDR); - if(!gInterruptStatus) - { - pthread_mutex_unlock(&mutex[ext_uart_no]); - continue; - } + uint8_t ext_uart_no = 0; + while(1) + { + pthread_mutex_lock(&mutex[ext_uart_no]); + gInterruptStatus = ReadCH438Data(REG_SSR_ADDR); + if(!gInterruptStatus) + { + pthread_mutex_unlock(&mutex[ext_uart_no]); + continue; + } - for(ext_uart_no = 0; ext_uart_no < CH438PORTNUM; ext_uart_no++) - { - if(gInterruptStatus & Interruptnum[ext_uart_no]) - { - done[ext_uart_no] = true; - pthread_cond_signal(&cond[ext_uart_no]); - pthread_mutex_unlock(&mutex[ext_uart_no]); - } - } - } + for(ext_uart_no = 0; ext_uart_no < CH438PORTNUM; ext_uart_no++) + { + if(gInterruptStatus & Interruptnum[ext_uart_no]) + { + done[ext_uart_no] = true; + pthread_cond_signal(&cond[ext_uart_no]); + pthread_mutex_unlock(&mutex[ext_uart_no]); + } + } + } } /**************************************************************************** @@ -143,14 +143,14 @@ static int getInterruptStatus(int argc, char **argv) ****************************************************************************/ static void CH438SetOutput(void) { - imxrt_config_gpio(CH438_D0_PIN_OUT); - imxrt_config_gpio(CH438_D1_PIN_OUT); - imxrt_config_gpio(CH438_D2_PIN_OUT); - imxrt_config_gpio(CH438_D3_PIN_OUT); - imxrt_config_gpio(CH438_D4_PIN_OUT); - imxrt_config_gpio(CH438_D5_PIN_OUT); - imxrt_config_gpio(CH438_D6_PIN_OUT); - imxrt_config_gpio(CH438_D7_PIN_OUT); + imxrt_config_gpio(CH438_D0_PIN_OUT); + imxrt_config_gpio(CH438_D1_PIN_OUT); + imxrt_config_gpio(CH438_D2_PIN_OUT); + imxrt_config_gpio(CH438_D3_PIN_OUT); + imxrt_config_gpio(CH438_D4_PIN_OUT); + imxrt_config_gpio(CH438_D5_PIN_OUT); + imxrt_config_gpio(CH438_D6_PIN_OUT); + imxrt_config_gpio(CH438_D7_PIN_OUT); } /**************************************************************************** @@ -162,14 +162,14 @@ static void CH438SetOutput(void) ****************************************************************************/ static void CH438SetInput(void) { - imxrt_config_gpio(CH438_D0_PIN_INPUT); - imxrt_config_gpio(CH438_D1_PIN_INPUT); - imxrt_config_gpio(CH438_D2_PIN_INPUT); - imxrt_config_gpio(CH438_D3_PIN_INPUT); - imxrt_config_gpio(CH438_D4_PIN_INPUT); - imxrt_config_gpio(CH438_D5_PIN_INPUT); - imxrt_config_gpio(CH438_D6_PIN_INPUT); - imxrt_config_gpio(CH438_D7_PIN_INPUT); + imxrt_config_gpio(CH438_D0_PIN_INPUT); + imxrt_config_gpio(CH438_D1_PIN_INPUT); + imxrt_config_gpio(CH438_D2_PIN_INPUT); + imxrt_config_gpio(CH438_D3_PIN_INPUT); + imxrt_config_gpio(CH438_D4_PIN_INPUT); + imxrt_config_gpio(CH438_D5_PIN_INPUT); + imxrt_config_gpio(CH438_D6_PIN_INPUT); + imxrt_config_gpio(CH438_D7_PIN_INPUT); } /**************************************************************************** @@ -181,48 +181,48 @@ static void CH438SetInput(void) ****************************************************************************/ static uint8_t ReadCH438Data(uint8_t addr) { - uint8_t dat = 0; - imxrt_gpio_write(CH438_NWR_PIN, true); - imxrt_gpio_write(CH438_NRD_PIN, true); - imxrt_gpio_write(CH438_ALE_PIN, true); + uint8_t dat = 0; + imxrt_gpio_write(CH438_NWR_PIN, true); + imxrt_gpio_write(CH438_NRD_PIN, true); + imxrt_gpio_write(CH438_ALE_PIN, true); - CH438SetOutput(); - up_udelay(1); - - if(addr &0x80) imxrt_gpio_write(CH438_D7_PIN_OUT, true); else imxrt_gpio_write(CH438_D7_PIN_OUT, false); - if(addr &0x40) imxrt_gpio_write(CH438_D6_PIN_OUT, true); else imxrt_gpio_write(CH438_D6_PIN_OUT, false); - if(addr &0x20) imxrt_gpio_write(CH438_D5_PIN_OUT, true); else imxrt_gpio_write(CH438_D5_PIN_OUT, false); - if(addr &0x10) imxrt_gpio_write(CH438_D4_PIN_OUT, true); else imxrt_gpio_write(CH438_D4_PIN_OUT, false); - if(addr &0x08) imxrt_gpio_write(CH438_D3_PIN_OUT, true); else imxrt_gpio_write(CH438_D3_PIN_OUT, false); - if(addr &0x04) imxrt_gpio_write(CH438_D2_PIN_OUT, true); else imxrt_gpio_write(CH438_D2_PIN_OUT, false); - if(addr &0x02) imxrt_gpio_write(CH438_D1_PIN_OUT, true); else imxrt_gpio_write(CH438_D1_PIN_OUT, false); - if(addr &0x01) imxrt_gpio_write(CH438_D0_PIN_OUT, true); else imxrt_gpio_write(CH438_D0_PIN_OUT, false); - - up_udelay(1); + CH438SetOutput(); + up_udelay(1); + + if(addr &0x80) imxrt_gpio_write(CH438_D7_PIN_OUT, true); else imxrt_gpio_write(CH438_D7_PIN_OUT, false); + if(addr &0x40) imxrt_gpio_write(CH438_D6_PIN_OUT, true); else imxrt_gpio_write(CH438_D6_PIN_OUT, false); + if(addr &0x20) imxrt_gpio_write(CH438_D5_PIN_OUT, true); else imxrt_gpio_write(CH438_D5_PIN_OUT, false); + if(addr &0x10) imxrt_gpio_write(CH438_D4_PIN_OUT, true); else imxrt_gpio_write(CH438_D4_PIN_OUT, false); + if(addr &0x08) imxrt_gpio_write(CH438_D3_PIN_OUT, true); else imxrt_gpio_write(CH438_D3_PIN_OUT, false); + if(addr &0x04) imxrt_gpio_write(CH438_D2_PIN_OUT, true); else imxrt_gpio_write(CH438_D2_PIN_OUT, false); + if(addr &0x02) imxrt_gpio_write(CH438_D1_PIN_OUT, true); else imxrt_gpio_write(CH438_D1_PIN_OUT, false); + if(addr &0x01) imxrt_gpio_write(CH438_D0_PIN_OUT, true); else imxrt_gpio_write(CH438_D0_PIN_OUT, false); + + up_udelay(1); - imxrt_gpio_write(CH438_ALE_PIN, false); - up_udelay(1); + imxrt_gpio_write(CH438_ALE_PIN, false); + up_udelay(1); - CH438SetInput(); - up_udelay(1); - - imxrt_gpio_write(CH438_NRD_PIN, false); - up_udelay(1); - - if (imxrt_gpio_read(CH438_D7_PIN_INPUT)) dat |= 0x80; - if (imxrt_gpio_read(CH438_D6_PIN_INPUT)) dat |= 0x40; - if (imxrt_gpio_read(CH438_D5_PIN_INPUT)) dat |= 0x20; - if (imxrt_gpio_read(CH438_D4_PIN_INPUT)) dat |= 0x10; - if (imxrt_gpio_read(CH438_D3_PIN_INPUT)) dat |= 0x08; - if (imxrt_gpio_read(CH438_D2_PIN_INPUT)) dat |= 0x04; - if (imxrt_gpio_read(CH438_D1_PIN_INPUT)) dat |= 0x02; - if (imxrt_gpio_read(CH438_D0_PIN_INPUT)) dat |= 0x01; - - imxrt_gpio_write(CH438_NRD_PIN, true); - imxrt_gpio_write(CH438_ALE_PIN, true); - up_udelay(1); + CH438SetInput(); + up_udelay(1); + + imxrt_gpio_write(CH438_NRD_PIN, false); + up_udelay(1); + + if (imxrt_gpio_read(CH438_D7_PIN_INPUT)) dat |= 0x80; + if (imxrt_gpio_read(CH438_D6_PIN_INPUT)) dat |= 0x40; + if (imxrt_gpio_read(CH438_D5_PIN_INPUT)) dat |= 0x20; + if (imxrt_gpio_read(CH438_D4_PIN_INPUT)) dat |= 0x10; + if (imxrt_gpio_read(CH438_D3_PIN_INPUT)) dat |= 0x08; + if (imxrt_gpio_read(CH438_D2_PIN_INPUT)) dat |= 0x04; + if (imxrt_gpio_read(CH438_D1_PIN_INPUT)) dat |= 0x02; + if (imxrt_gpio_read(CH438_D0_PIN_INPUT)) dat |= 0x01; + + imxrt_gpio_write(CH438_NRD_PIN, true); + imxrt_gpio_write(CH438_ALE_PIN, true); + up_udelay(1); - return dat; + return dat; } /**************************************************************************** @@ -231,51 +231,51 @@ static uint8_t ReadCH438Data(uint8_t addr) * Description: * write data to ch438 address * - ****************************************************************************/ + ****************************************************************************/ static void WriteCH438Data(uint8_t addr, uint8_t dat) { - imxrt_gpio_write(CH438_ALE_PIN, true); - imxrt_gpio_write(CH438_NRD_PIN, true); - imxrt_gpio_write(CH438_NWR_PIN, true); + imxrt_gpio_write(CH438_ALE_PIN, true); + imxrt_gpio_write(CH438_NRD_PIN, true); + imxrt_gpio_write(CH438_NWR_PIN, true); - CH438SetOutput(); - up_udelay(1); - - if(addr &0x80) imxrt_gpio_write(CH438_D7_PIN_OUT, true); else imxrt_gpio_write(CH438_D7_PIN_OUT, false); - if(addr &0x40) imxrt_gpio_write(CH438_D6_PIN_OUT, true); else imxrt_gpio_write(CH438_D6_PIN_OUT, false); - if(addr &0x20) imxrt_gpio_write(CH438_D5_PIN_OUT, true); else imxrt_gpio_write(CH438_D5_PIN_OUT, false); - if(addr &0x10) imxrt_gpio_write(CH438_D4_PIN_OUT, true); else imxrt_gpio_write(CH438_D4_PIN_OUT, false); - if(addr &0x08) imxrt_gpio_write(CH438_D3_PIN_OUT, true); else imxrt_gpio_write(CH438_D3_PIN_OUT, false); - if(addr &0x04) imxrt_gpio_write(CH438_D2_PIN_OUT, true); else imxrt_gpio_write(CH438_D2_PIN_OUT, false); - if(addr &0x02) imxrt_gpio_write(CH438_D1_PIN_OUT, true); else imxrt_gpio_write(CH438_D1_PIN_OUT, false); - if(addr &0x01) imxrt_gpio_write(CH438_D0_PIN_OUT, true); else imxrt_gpio_write(CH438_D0_PIN_OUT, false); - - up_udelay(1); - - imxrt_gpio_write(CH438_ALE_PIN, false); - up_udelay(1); - - if(dat &0x80) imxrt_gpio_write(CH438_D7_PIN_OUT, true); else imxrt_gpio_write(CH438_D7_PIN_OUT, false); - if(dat &0x40) imxrt_gpio_write(CH438_D6_PIN_OUT, true); else imxrt_gpio_write(CH438_D6_PIN_OUT, false); - if(dat &0x20) imxrt_gpio_write(CH438_D5_PIN_OUT, true); else imxrt_gpio_write(CH438_D5_PIN_OUT, false); - if(dat &0x10) imxrt_gpio_write(CH438_D4_PIN_OUT, true); else imxrt_gpio_write(CH438_D4_PIN_OUT, false); - if(dat &0x08) imxrt_gpio_write(CH438_D3_PIN_OUT, true); else imxrt_gpio_write(CH438_D3_PIN_OUT, false); - if(dat &0x04) imxrt_gpio_write(CH438_D2_PIN_OUT, true); else imxrt_gpio_write(CH438_D2_PIN_OUT, false); - if(dat &0x02) imxrt_gpio_write(CH438_D1_PIN_OUT, true); else imxrt_gpio_write(CH438_D1_PIN_OUT, false); - if(dat &0x01) imxrt_gpio_write(CH438_D0_PIN_OUT, true); else imxrt_gpio_write(CH438_D0_PIN_OUT, false); - - up_udelay(1); + CH438SetOutput(); + up_udelay(1); + + if(addr &0x80) imxrt_gpio_write(CH438_D7_PIN_OUT, true); else imxrt_gpio_write(CH438_D7_PIN_OUT, false); + if(addr &0x40) imxrt_gpio_write(CH438_D6_PIN_OUT, true); else imxrt_gpio_write(CH438_D6_PIN_OUT, false); + if(addr &0x20) imxrt_gpio_write(CH438_D5_PIN_OUT, true); else imxrt_gpio_write(CH438_D5_PIN_OUT, false); + if(addr &0x10) imxrt_gpio_write(CH438_D4_PIN_OUT, true); else imxrt_gpio_write(CH438_D4_PIN_OUT, false); + if(addr &0x08) imxrt_gpio_write(CH438_D3_PIN_OUT, true); else imxrt_gpio_write(CH438_D3_PIN_OUT, false); + if(addr &0x04) imxrt_gpio_write(CH438_D2_PIN_OUT, true); else imxrt_gpio_write(CH438_D2_PIN_OUT, false); + if(addr &0x02) imxrt_gpio_write(CH438_D1_PIN_OUT, true); else imxrt_gpio_write(CH438_D1_PIN_OUT, false); + if(addr &0x01) imxrt_gpio_write(CH438_D0_PIN_OUT, true); else imxrt_gpio_write(CH438_D0_PIN_OUT, false); + + up_udelay(1); + + imxrt_gpio_write(CH438_ALE_PIN, false); + up_udelay(1); + + if(dat &0x80) imxrt_gpio_write(CH438_D7_PIN_OUT, true); else imxrt_gpio_write(CH438_D7_PIN_OUT, false); + if(dat &0x40) imxrt_gpio_write(CH438_D6_PIN_OUT, true); else imxrt_gpio_write(CH438_D6_PIN_OUT, false); + if(dat &0x20) imxrt_gpio_write(CH438_D5_PIN_OUT, true); else imxrt_gpio_write(CH438_D5_PIN_OUT, false); + if(dat &0x10) imxrt_gpio_write(CH438_D4_PIN_OUT, true); else imxrt_gpio_write(CH438_D4_PIN_OUT, false); + if(dat &0x08) imxrt_gpio_write(CH438_D3_PIN_OUT, true); else imxrt_gpio_write(CH438_D3_PIN_OUT, false); + if(dat &0x04) imxrt_gpio_write(CH438_D2_PIN_OUT, true); else imxrt_gpio_write(CH438_D2_PIN_OUT, false); + if(dat &0x02) imxrt_gpio_write(CH438_D1_PIN_OUT, true); else imxrt_gpio_write(CH438_D1_PIN_OUT, false); + if(dat &0x01) imxrt_gpio_write(CH438_D0_PIN_OUT, true); else imxrt_gpio_write(CH438_D0_PIN_OUT, false); + + up_udelay(1); - imxrt_gpio_write(CH438_NWR_PIN, false); - up_udelay(1); - - imxrt_gpio_write(CH438_NWR_PIN, true); - imxrt_gpio_write(CH438_ALE_PIN, true); - up_udelay(1); + imxrt_gpio_write(CH438_NWR_PIN, false); + up_udelay(1); + + imxrt_gpio_write(CH438_NWR_PIN, true); + imxrt_gpio_write(CH438_ALE_PIN, true); + up_udelay(1); - CH438SetInput(); + CH438SetInput(); - return; + return; } /**************************************************************************** @@ -284,11 +284,11 @@ static void WriteCH438Data(uint8_t addr, uint8_t dat) * Description: * Write data block from ch438 address * - ****************************************************************************/ + ****************************************************************************/ static void WriteCH438Block(uint8_t mAddr, uint8_t mLen, char *mBuf) { - while (mLen--) - WriteCH438Data(mAddr, *mBuf++); + while (mLen--) + WriteCH438Data(mAddr, *mBuf++); } /**************************************************************************** @@ -298,13 +298,13 @@ static void WriteCH438Block(uint8_t mAddr, uint8_t mLen, char *mBuf) * Enable FIFO mode, which is used for ch438 serial port to send multi byte data, * with a maximum of 128 bytes of data sent at a time * - ****************************************************************************/ + ****************************************************************************/ static void Ch438UartSend(uint8_t ext_uart_no, char *Data, uint16_t Num) { - uint8_t REG_LSR_ADDR,REG_THR_ADDR; - REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR; - REG_THR_ADDR = offsetadd[ext_uart_no] | REG_THR0_ADDR; - + uint8_t REG_LSR_ADDR,REG_THR_ADDR; + REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR; + REG_THR_ADDR = offsetadd[ext_uart_no] | REG_THR0_ADDR; + while(1) { while((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_TEMT ) == 0); /* 等待数据发送完毕，THR,TSR全空 */ @@ -328,28 +328,28 @@ static void Ch438UartSend(uint8_t ext_uart_no, char *Data, uint16_t Num) * Description: * Disable FIFO mode for ch438 serial port to receive multi byte data * - ****************************************************************************/ + ****************************************************************************/ uint8_t CH438UARTRcv(uint8_t ext_uart_no, char* buf) { uint8_t RcvNum = 0; - uint8_t dat = 0; - uint8_t REG_LSR_ADDR,REG_RBR_ADDR; - - REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR; - REG_RBR_ADDR = offsetadd[ext_uart_no] | REG_RBR0_ADDR; + uint8_t dat = 0; + uint8_t REG_LSR_ADDR,REG_RBR_ADDR; + + REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR; + REG_RBR_ADDR = offsetadd[ext_uart_no] | REG_RBR0_ADDR; - /* Wait for the data to be ready */ - while((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_DATARDY) == 0 ); - while((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_DATARDY) == 0x01 ) - { - dat = ReadCH438Data(REG_RBR_ADDR); - buff[ext_uart_no][buff_ptr[ext_uart_no]] = dat; - - buff_ptr[ext_uart_no] = buff_ptr[ext_uart_no] + 1; - if (buff_ptr[ext_uart_no] == CH438_BUFFSIZE) - buff_ptr[ext_uart_no] = 0; - RcvNum = RcvNum + 1; - } + /* Wait for the data to be ready */ + while((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_DATARDY) == 0 ); + while((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_DATARDY) == 0x01 ) + { + dat = ReadCH438Data(REG_RBR_ADDR); + buff[ext_uart_no][buff_ptr[ext_uart_no]] = dat; + + buff_ptr[ext_uart_no] = buff_ptr[ext_uart_no] + 1; + if (buff_ptr[ext_uart_no] == CH438_BUFFSIZE) + buff_ptr[ext_uart_no] = 0; + RcvNum = RcvNum + 1; + } return RcvNum; } @@ -362,15 +362,15 @@ uint8_t CH438UARTRcv(uint8_t ext_uart_no, char* buf) ****************************************************************************/ static void ImxrtCH438Init(void) { - CH438SetOutput(); - imxrt_config_gpio(CH438_NWR_PIN); - imxrt_config_gpio(CH438_NRD_PIN); - imxrt_config_gpio(CH438_ALE_PIN); - - imxrt_gpio_write(CH438_NWR_PIN,true); - imxrt_gpio_write(CH438_NRD_PIN,true); - imxrt_gpio_write(CH438_ALE_PIN,true); -} + CH438SetOutput(); + imxrt_config_gpio(CH438_NWR_PIN); + imxrt_config_gpio(CH438_NRD_PIN); + imxrt_config_gpio(CH438_ALE_PIN); + + imxrt_gpio_write(CH438_NWR_PIN,true); + imxrt_gpio_write(CH438_NRD_PIN,true); + imxrt_gpio_write(CH438_ALE_PIN,true); +} /**************************************************************************** * Name: CH438PortInit @@ -379,59 +379,59 @@ static void ImxrtCH438Init(void) * ch438 port initialization * ****************************************************************************/ -static void CH438PortInit(uint8_t ext_uart_no, uint32_t baud_rate) +static void CH438PortInit(uint8_t ext_uart_no, uint32_t baud_rate) { - uint32_t div; - uint8_t DLL,DLM,dlab; - uint8_t REG_LCR_ADDR; - uint8_t REG_DLL_ADDR; - uint8_t REG_DLM_ADDR; - uint8_t REG_IER_ADDR; - uint8_t REG_MCR_ADDR; - uint8_t REG_FCR_ADDR; - - REG_LCR_ADDR = offsetadd[ext_uart_no] | REG_LCR0_ADDR; - REG_DLL_ADDR = offsetadd[ext_uart_no] | REG_DLL0_ADDR; - REG_DLM_ADDR = offsetadd[ext_uart_no] | REG_DLM0_ADDR; - REG_IER_ADDR = offsetadd[ext_uart_no] | REG_IER0_ADDR; - REG_MCR_ADDR = offsetadd[ext_uart_no] | REG_MCR0_ADDR; - REG_FCR_ADDR = offsetadd[ext_uart_no] | REG_FCR0_ADDR; - - /* reset the uart */ + uint32_t div; + uint8_t DLL,DLM,dlab; + uint8_t REG_LCR_ADDR; + uint8_t REG_DLL_ADDR; + uint8_t REG_DLM_ADDR; + uint8_t REG_IER_ADDR; + uint8_t REG_MCR_ADDR; + uint8_t REG_FCR_ADDR; + + REG_LCR_ADDR = offsetadd[ext_uart_no] | REG_LCR0_ADDR; + REG_DLL_ADDR = offsetadd[ext_uart_no] | REG_DLL0_ADDR; + REG_DLM_ADDR = offsetadd[ext_uart_no] | REG_DLM0_ADDR; + REG_IER_ADDR = offsetadd[ext_uart_no] | REG_IER0_ADDR; + REG_MCR_ADDR = offsetadd[ext_uart_no] | REG_MCR0_ADDR; + REG_FCR_ADDR = offsetadd[ext_uart_no] | REG_FCR0_ADDR; + + /* reset the uart */ WriteCH438Data(REG_IER_ADDR, BIT_IER_RESET); - up_mdelay(50); - - dlab = ReadCH438Data(REG_IER_ADDR); - dlab &= 0xDF; - WriteCH438Data(REG_IER_ADDR, dlab); - - /* set LCR register DLAB bit 1 */ - dlab = ReadCH438Data(REG_LCR_ADDR); - dlab |= 0x80; - WriteCH438Data(REG_LCR_ADDR, dlab); + up_mdelay(50); + + dlab = ReadCH438Data(REG_IER_ADDR); + dlab &= 0xDF; + WriteCH438Data(REG_IER_ADDR, dlab); + + /* set LCR register DLAB bit 1 */ + dlab = ReadCH438Data(REG_LCR_ADDR); + dlab |= 0x80; + WriteCH438Data(REG_LCR_ADDR, dlab); div = ( Fpclk >> 4 ) / baud_rate; DLM = div >> 8; DLL = div & 0xff; - /* set bps */ - WriteCH438Data(REG_DLL_ADDR, DLL); + /* set bps */ + WriteCH438Data(REG_DLL_ADDR, DLL); WriteCH438Data(REG_DLM_ADDR, DLM); - /* set FIFO mode, 112 bytes */ - WriteCH438Data(REG_FCR_ADDR, BIT_FCR_RECVTG1 | BIT_FCR_RECVTG0 | BIT_FCR_FIFOEN); + /* set FIFO mode, 112 bytes */ + WriteCH438Data(REG_FCR_ADDR, BIT_FCR_RECVTG1 | BIT_FCR_RECVTG0 | BIT_FCR_FIFOEN); - /* 8 bit word size, 1 bit stop bit, no crc */ + /* 8 bit word size, 1 bit stop bit, no crc */ WriteCH438Data(REG_LCR_ADDR, BIT_LCR_WORDSZ1 | BIT_LCR_WORDSZ0); - /* enable interrupt */ - WriteCH438Data(REG_IER_ADDR, BIT_IER_IERECV); + /* enable interrupt */ + WriteCH438Data(REG_IER_ADDR, BIT_IER_IERECV); - /* allow interrupt output, DTR and RTS is 1 */ + /* allow interrupt output, DTR and RTS is 1 */ WriteCH438Data(REG_MCR_ADDR, BIT_MCR_OUT2); - /* release the data in FIFO */ - WriteCH438Data(REG_FCR_ADDR, ReadCH438Data(REG_FCR_ADDR)| BIT_FCR_TFIFORST); + /* release the data in FIFO */ + WriteCH438Data(REG_FCR_ADDR, ReadCH438Data(REG_FCR_ADDR)| BIT_FCR_TFIFORST); } /**************************************************************************** @@ -443,41 +443,41 @@ static void CH438PortInit(uint8_t ext_uart_no, uint32_t baud_rate) ****************************************************************************/ static int ImxrtCh438WriteData(uint8_t ext_uart_no, char *write_buffer, size_t size) { - int write_len, write_len_continue; - int i, write_index; - DEBUGASSERT(write_buffer != NULL); + int write_len, write_len_continue; + int i, write_index; + DEBUGASSERT(write_buffer != NULL); - write_len = size;; - write_len_continue = size; + write_len = size;; + write_len_continue = size; - if (write_len > CH438_BUFFSIZE) - { - if (0 == write_len % CH438_BUFFSIZE) - { - write_index = write_len / CH438_BUFFSIZE; - for (i = 0; i < write_index; i ++) - { - Ch438UartSend(ext_uart_no, write_buffer + i * CH438_BUFFSIZE, CH438_BUFFSIZE); - } - } - else - { - write_index = 0; - while (write_len_continue > CH438_BUFFSIZE) - { - Ch438UartSend(ext_uart_no, write_buffer + write_index * CH438_BUFFSIZE, CH438_BUFFSIZE); - write_index++; - write_len_continue = write_len - write_index * CH438_BUFFSIZE; - } - Ch438UartSend(ext_uart_no, write_buffer + write_index * CH438_BUFFSIZE, write_len_continue); - } - } - else - { - Ch438UartSend(ext_uart_no, write_buffer, write_len); - } + if (write_len > CH438_BUFFSIZE) + { + if (0 == write_len % CH438_BUFFSIZE) + { + write_index = write_len / CH438_BUFFSIZE; + for (i = 0; i < write_index; i ++) + { + Ch438UartSend(ext_uart_no, write_buffer + i * CH438_BUFFSIZE, CH438_BUFFSIZE); + } + } + else + { + write_index = 0; + while (write_len_continue > CH438_BUFFSIZE) + { + Ch438UartSend(ext_uart_no, write_buffer + write_index * CH438_BUFFSIZE, CH438_BUFFSIZE); + write_index++; + write_len_continue = write_len - write_index * CH438_BUFFSIZE; + } + Ch438UartSend(ext_uart_no, write_buffer + write_index * CH438_BUFFSIZE, write_len_continue); + } + } + else + { + Ch438UartSend(ext_uart_no, write_buffer, write_len); + } - return 0; + return 0; } /**************************************************************************** @@ -489,51 +489,51 @@ static int ImxrtCh438WriteData(uint8_t ext_uart_no, char *write_buffer, size_t s ****************************************************************************/ static size_t ImxrtCh438ReadData(uint8_t ext_uart_no) { - size_t RevLen = 0; - uint8_t InterruptStatus; - uint8_t REG_IIR_ADDR; - uint8_t REG_LSR_ADDR; - uint8_t REG_MSR_ADDR; + size_t RevLen = 0; + uint8_t InterruptStatus; + uint8_t REG_IIR_ADDR; + uint8_t REG_LSR_ADDR; + uint8_t REG_MSR_ADDR; - pthread_mutex_lock(&mutex[ext_uart_no]); - while(done[ext_uart_no] == false) - pthread_cond_wait(&cond[ext_uart_no], &mutex[ext_uart_no]); - if (done[ext_uart_no] == true) - { - REG_IIR_ADDR = offsetadd[ext_uart_no] | REG_IIR0_ADDR; - REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR; - REG_MSR_ADDR = offsetadd[ext_uart_no] | REG_MSR0_ADDR; - InterruptStatus = ReadCH438Data(REG_IIR_ADDR) & 0x0f; /* 读串口的中断状态 */ - ch438info("InterruptStatus is %d\n", InterruptStatus); - - switch(InterruptStatus) - { - case INT_NOINT: /* 没有中断 */ - break; - case INT_THR_EMPTY: /* THR空中断 */ - break; - case INT_RCV_OVERTIME: /* 接收超时中断，收到数据后一般是触发这个 。在收到一帧数据后4个数据时间没有后续的数据时触发*/ - case INT_RCV_SUCCESS: /* 接收数据可用中断。这是一个数据帧超过缓存了才发生，否则一般是前面的超时中断。处理过程同上面的超时中断 */ - RevLen = CH438UARTRcv(ext_uart_no, buff[ext_uart_no]); - buff_ptr[ext_uart_no] = 0; - break; + pthread_mutex_lock(&mutex[ext_uart_no]); + while(done[ext_uart_no] == false) + pthread_cond_wait(&cond[ext_uart_no], &mutex[ext_uart_no]); + if (done[ext_uart_no] == true) + { + REG_IIR_ADDR = offsetadd[ext_uart_no] | REG_IIR0_ADDR; + REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR; + REG_MSR_ADDR = offsetadd[ext_uart_no] | REG_MSR0_ADDR; + InterruptStatus = ReadCH438Data(REG_IIR_ADDR) & 0x0f; /* 读串口的中断状态 */ + ch438info("InterruptStatus is %d\n", InterruptStatus); + + switch(InterruptStatus) + { + case INT_NOINT: /* 没有中断 */ + break; + case INT_THR_EMPTY: /* THR空中断 */ + break; + case INT_RCV_OVERTIME: /* 接收超时中断，收到数据后一般是触发这个 。在收到一帧数据后4个数据时间没有后续的数据时触发*/ + case INT_RCV_SUCCESS: /* 接收数据可用中断。这是一个数据帧超过缓存了才发生，否则一般是前面的超时中断。处理过程同上面的超时中断 */ + RevLen = CH438UARTRcv(ext_uart_no, buff[ext_uart_no]); + buff_ptr[ext_uart_no] = 0; + break; - case INT_RCV_LINES: /* 接收线路状态中断 */ - ReadCH438Data(REG_LSR_ADDR); - break; - case INT_MODEM_CHANGE: /* MODEM输入变化中断 */ - ReadCH438Data(REG_MSR_ADDR); - break; - default: - break; - } + case INT_RCV_LINES: /* 接收线路状态中断 */ + ReadCH438Data(REG_LSR_ADDR); + break; + case INT_MODEM_CHANGE: /* MODEM输入变化中断 */ + ReadCH438Data(REG_MSR_ADDR); + break; + default: + break; + } - done[ext_uart_no] = false; + done[ext_uart_no] = false; - } - pthread_mutex_unlock(&mutex[ext_uart_no]); + } + pthread_mutex_unlock(&mutex[ext_uart_no]); - return RevLen; + return RevLen; } /**************************************************************************** @@ -545,45 +545,46 @@ static size_t ImxrtCh438ReadData(uint8_t ext_uart_no) ****************************************************************************/ static void Ch438InitDefault(void) { - - int ret, i; + + int ret = 0; + int i; - /* Initialize the mutex */ + /* Initialize the mutex */ - for(i = 0; i < CH438PORTNUM; i++) - { - ret = pthread_mutex_init(&mutex[i], NULL); - if (ret != 0) - { - ch438err("pthread_mutex_init failed, status=%d\n", ret); - } - } + for(i = 0; i < CH438PORTNUM; i++) + { + ret = pthread_mutex_init(&mutex[i], NULL); + if (ret != 0) + { + ch438err("pthread_mutex_init failed, status=%d\n", ret); + } + } - /* Initialize the condition variable */ - for(i = 0; i < CH438PORTNUM; i++) - { - ret = pthread_cond_init(&cond[i], NULL); - if (ret != 0) - { - ch438err("pthread_cond_init failed, status=%d\n", ret); - } - } + /* Initialize the condition variable */ + for(i = 0; i < CH438PORTNUM; i++) + { + ret = pthread_cond_init(&cond[i], NULL); + if (ret != 0) + { + ch438err("pthread_cond_init failed, status=%d\n", ret); + } + } - ret = task_create("ch438_task", 60, 8192, getInterruptStatus, NULL); + ret = task_create("ch438_task", 60, 8192, getInterruptStatus, NULL); if (ret < 0) { ch438err("task create failed, status=%d\n", ret); } - ImxrtCH438Init(); - CH438PortInit(0,115200); - CH438PortInit(1,115200); - CH438PortInit(2,9600); - CH438PortInit(3,9600); - CH438PortInit(4,115200); - CH438PortInit(5,115200); - CH438PortInit(6,115200); - CH438PortInit(7,115200); + ImxrtCH438Init(); + CH438PortInit(0,115200); + CH438PortInit(1,115200); + CH438PortInit(2,9600); + CH438PortInit(3,9600); + CH438PortInit(4,115200); + CH438PortInit(5,115200); + CH438PortInit(6,115200); + CH438PortInit(7,115200); } /**************************************************************************** @@ -591,18 +592,18 @@ static void Ch438InitDefault(void) ****************************************************************************/ static int ch438_open(FAR struct file *filep) { - FAR struct inode *inode = filep->f_inode; - FAR struct ch438_dev_s *priv = inode->i_private; - uint8_t port = priv->port; - DEBUGASSERT(port >= 0 && port < CH438PORTNUM); + FAR struct inode *inode = filep->f_inode; + FAR struct ch438_dev_s *priv = inode->i_private; + uint8_t port = priv->port; + DEBUGASSERT(port >= 0 && port < CH438PORTNUM); - if (g_ch438open[port]) - { - return -EBUSY; - } - g_ch438open[port] = true; + if (g_ch438open[port]) + { + return -EBUSY; + } + g_ch438open[port] = true; - return OK; + return OK; } /**************************************************************************** @@ -610,13 +611,13 @@ static int ch438_open(FAR struct file *filep) ****************************************************************************/ static int ch438_close(FAR struct file *filep) { - FAR struct inode *inode = filep->f_inode; - FAR struct ch438_dev_s *priv = inode->i_private; - uint8_t port = priv->port; - DEBUGASSERT(port >= 0 && port < CH438PORTNUM); + FAR struct inode *inode = filep->f_inode; + FAR struct ch438_dev_s *priv = inode->i_private; + uint8_t port = priv->port; + DEBUGASSERT(port >= 0 && port < CH438PORTNUM); - g_ch438open[port] = false; - return OK; + g_ch438open[port] = false; + return OK; } /**************************************************************************** @@ -624,21 +625,21 @@ static int ch438_close(FAR struct file *filep) ****************************************************************************/ static ssize_t ch438_read(FAR struct file *filep, FAR char *buffer, size_t buflen) { - size_t length = 0; - FAR struct inode *inode = filep->f_inode; - FAR struct ch438_dev_s *priv = inode->i_private; - uint8_t port = priv->port; - DEBUGASSERT(port >= 0 && port < CH438PORTNUM); + size_t length = 0; + FAR struct inode *inode = filep->f_inode; + FAR struct ch438_dev_s *priv = inode->i_private; + uint8_t port = priv->port; + DEBUGASSERT(port >= 0 && port < CH438PORTNUM); - length = ImxrtCh438ReadData(port); + length = ImxrtCh438ReadData(port); memcpy(buffer, buff[port], length); - if (length > buflen) - { - length = buflen; - } + if (length > buflen) + { + length = buflen; + } - return length; + return length; } /**************************************************************************** @@ -646,14 +647,14 @@ static ssize_t ch438_read(FAR struct file *filep, FAR char *buffer, size_t bufle ****************************************************************************/ static ssize_t ch438_write(FAR struct file *filep, FAR const char *buffer, size_t buflen) { - FAR struct inode *inode = filep->f_inode; - FAR struct ch438_dev_s *priv = inode->i_private; - uint8_t port = priv->port; - DEBUGASSERT(port >= 0 && port < CH438PORTNUM); + FAR struct inode *inode = filep->f_inode; + FAR struct ch438_dev_s *priv = inode->i_private; + uint8_t port = priv->port; + DEBUGASSERT(port >= 0 && port < CH438PORTNUM); - ImxrtCh438WriteData(port, buffer, buflen); - - return buflen; + ImxrtCh438WriteData(port, buffer, buflen); + + return buflen; } @@ -666,30 +667,30 @@ static ssize_t ch438_write(FAR struct file *filep, FAR const char *buffer, size_ ****************************************************************************/ static int ch438_register(FAR const char *devpath, uint8_t port) { - FAR struct ch438_dev_s *priv; - int ret = 0; + FAR struct ch438_dev_s *priv; + int ret = 0; - /* port number check */ - DEBUGASSERT(port >= 0 && port < CH438PORTNUM); + /* port number check */ + DEBUGASSERT(port >= 0 && port < CH438PORTNUM); - priv = (FAR struct ch438_dev_s *)kmm_malloc(sizeof(struct ch438_dev_s)); - if (priv == NULL) - { - ch438err("ERROR: Failed to allocate instance\n"); - return -ENOMEM; - } + priv = (FAR struct ch438_dev_s *)kmm_malloc(sizeof(struct ch438_dev_s)); + if (priv == NULL) + { + ch438err("ERROR: Failed to allocate instance\n"); + return -ENOMEM; + } - priv->port = port; + priv->port = port; - /* Register the character driver */ - ret = register_driver(devpath, &g_ch438fops, 0666, priv); - if (ret < 0) - { - ch438err("ERROR: Failed to register driver: %d\n", ret); - kmm_free(priv); - } - - return ret; + /* Register the character driver */ + ret = register_driver(devpath, &g_ch438fops, 0666, priv); + if (ret < 0) + { + ch438err("ERROR: Failed to register driver: %d\n", ret); + kmm_free(priv); + } + + return ret; } /**************************************************************************** @@ -699,84 +700,39 @@ static int ch438_register(FAR const char *devpath, uint8_t port) * ch438 initialize * ****************************************************************************/ -int board_ch438_initialize(void) +void board_ch438_initialize(void) { - int ret = 0; - - Ch438InitDefault(); + Ch438InitDefault(); #ifdef CONFIG_CH438_EXTUART0 - ret = ch438_register("/dev/extuart_dev0", 0); - if (ret < 0) - { - ch438err("Failed to register /dev/extuart_dev0: %d\n", ret); - goto __exit; - } + ch438_register("/dev/extuart_dev0", 0); #endif #ifdef CONFIG_CH438_EXTUART1 - ret = ch438_register("/dev/extuart_dev1", 1); - if (ret < 0) - { - ch438err("Failed to register /dev/extuart_dev1: %d\n", ret); - goto __exit; - } + ch438_register("/dev/extuart_dev1", 1); #endif #ifdef CONFIG_CH438_EXTUART2 - ret = ch438_register("/dev/extuart_dev2", 2); - if (ret < 0) - { - ch438err("Failed to register /dev/extuart_dev2: %d\n", ret); - goto __exit; - } + ch438_register("/dev/extuart_dev2", 2); #endif #ifdef CONFIG_CH438_EXTUART3 - ret = ch438_register("/dev/extuart_dev3", 3); - if (ret < 0) - { - ch438err("Failed to register /dev/extuart_dev3: %d\n", ret); - goto __exit; - } + ch438_register("/dev/extuart_dev3", 3); #endif #ifdef CONFIG_CH438_EXTUART4 - ret = ch438_register("/dev/extuart_dev4", 4); - if (ret < 0) - { - ch438err("Failed to register /dev/extuart_dev4: %d\n", ret); - goto __exit; - } + ch438_register("/dev/extuart_dev4", 4); #endif #ifdef CONFIG_CH438_EXTUART5 - ret = ch438_register("/dev/extuart_dev5", 5); - if (ret < 0) - { - ch438err("Failed to register /dev/extuart_dev5: %d\n", ret); - goto __exit; - } + ch438_register("/dev/extuart_dev5", 5); #endif #ifdef CONFIG_CH438_EXTUART6 - ret = ch438_register("/dev/extuart_dev6", 6); - if (ret < 0) - { - ch438err("Failed to register /dev/extuart_dev6: %d\n", ret); - goto __exit; - } + ch438_register("/dev/extuart_dev6", 6); #endif #ifdef CONFIG_CH438_EXTUART7 - ret = ch438_register("/dev/extuart_dev7", 7); - if (ret < 0) - { - ch438err("Failed to register /dev/extuart_dev7: %d\n", ret); - goto __exit; - } + ch438_register("/dev/extuart_dev7", 7); #endif - -__exit: - return ret; } \ No newline at end of file diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h index f9403db9b..afc9b0ae0 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h @@ -356,7 +356,7 @@ * Public Function Prototypes ****************************************************************************/ #ifdef CONFIG_BSP_USING_CH438 -int board_ch438_initialize(void); +void board_ch438_initialize(void); #endif #endif /* __BOARDS_ARM_IMXRT_XIDATONG_SRC_IMXRT_CH438_H */ From 8d6e9532cf3cfcef687c1247d1a879267fa7531d Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Mon, 9 May 2022 19:33:27 +0800 Subject: [PATCH 19/46] task_create to pthread_create on nuttx for ch438 --- .../aiit_board/xidatong/src/imxrt_ch438.c | 53 ++++++++++--------- 1 file changed, 29 insertions(+), 24 deletions(-) diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c index 668438793..d5bf8d004 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c @@ -26,7 +26,7 @@ /**************************************************************************** * Private Function Prototypes ****************************************************************************/ -static int getInterruptStatus(int argc, char **argv); +static FAR void *getInterruptStatus(FAR void *arg); static void CH438SetOutput(void); static void CH438SetInput(void); static uint8_t ReadCH438Data(uint8_t addr); @@ -83,10 +83,10 @@ static pthread_cond_t cond[CH438PORTNUM] = volatile bool done[CH438PORTNUM] = {false,false,false,false,false,false,false,false}; -static char buff[CH438PORTNUM][CH438_BUFFSIZE]; -static uint8_t buff_ptr[CH438PORTNUM]; -static uint8_t Interruptnum[CH438PORTNUM] = {0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,}; /* SSR寄存器中断号对应值 */ -static uint8_t offsetadd[CH438PORTNUM] = {0x00,0x10,0x20,0x30,0x08,0x18,0x28,0x38,}; /* 串口号的偏移地址 */ +static char buff[CH438PORTNUM][CH438_BUFFSIZE]; +static uint8_t buff_ptr[CH438PORTNUM]; +static uint8_t Interruptnum[CH438PORTNUM] = {0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,}; /* SSR寄存器中断号对应值 */ +static uint8_t offsetadd[CH438PORTNUM] = {0x00,0x10,0x20,0x30,0x08,0x18,0x28,0x38,}; /* 串口号的偏移地址 */ static uint8_t gInterruptStatus; @@ -109,27 +109,25 @@ static const struct file_operations g_ch438fops = * thread task getInterruptStatus * ****************************************************************************/ -static int getInterruptStatus(int argc, char **argv) +static FAR void *getInterruptStatus(FAR void *arg) { - uint8_t ext_uart_no = 0; - while(1) + uint8_t i; + while(1) { - pthread_mutex_lock(&mutex[ext_uart_no]); - gInterruptStatus = ReadCH438Data(REG_SSR_ADDR); - if(!gInterruptStatus) + gInterruptStatus = ReadCH438Data(REG_SSR_ADDR); + if(!gInterruptStatus) + { + continue; + } + for(i = 0; i < CH438PORTNUM; i++) { - pthread_mutex_unlock(&mutex[ext_uart_no]); - continue; - } - - for(ext_uart_no = 0; ext_uart_no < CH438PORTNUM; ext_uart_no++) - { - if(gInterruptStatus & Interruptnum[ext_uart_no]) - { - done[ext_uart_no] = true; - pthread_cond_signal(&cond[ext_uart_no]); - pthread_mutex_unlock(&mutex[ext_uart_no]); - } + if(gInterruptStatus & Interruptnum[i]) + { + pthread_mutex_lock(&mutex[i]); + done[i] = true; + pthread_cond_signal(&cond[i]); + pthread_mutex_unlock(&mutex[i]); + } } } } @@ -548,6 +546,9 @@ static void Ch438InitDefault(void) int ret = 0; int i; + struct sched_param param; + pthread_attr_t attr; + pthread_t thread; /* Initialize the mutex */ @@ -570,7 +571,11 @@ static void Ch438InitDefault(void) } } - ret = task_create("ch438_task", 60, 8192, getInterruptStatus, NULL); + pthread_attr_init(&attr); + param.sched_priority = 60; + pthread_attr_setschedparam(&attr, ¶m); + pthread_attr_setstacksize(&attr, 2048); + ret = pthread_create(&thread, &attr, getInterruptStatus, NULL); if (ret < 0) { ch438err("task create failed, status=%d\n", ret); From cd5686de2ed24f037e7b2ba04ba6b9ef60071e59 Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Tue, 10 May 2022 11:31:59 +0800 Subject: [PATCH 20/46] change ch438 on nuttx --- .../aiit_board/xidatong/src/imxrt_ch438.c | 212 +++++++++--------- 1 file changed, 106 insertions(+), 106 deletions(-) diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c index d5bf8d004..22b2fada4 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c @@ -26,7 +26,7 @@ /**************************************************************************** * Private Function Prototypes ****************************************************************************/ -static FAR void *getInterruptStatus(FAR void *arg); +static FAR void getInterruptStatus(FAR void *arg); static void CH438SetOutput(void); static void CH438SetInput(void); static uint8_t ReadCH438Data(uint8_t addr); @@ -58,7 +58,7 @@ struct ch438_dev_s * Private Data ****************************************************************************/ -static pthread_mutex_t mutex[CH438PORTNUM] = +static pthread_mutex_t mutex[CH438PORTNUM] = { PTHREAD_MUTEX_INITIALIZER, PTHREAD_MUTEX_INITIALIZER, @@ -69,7 +69,7 @@ static pthread_mutex_t mutex[CH438PORTNUM] = PTHREAD_MUTEX_INITIALIZER, PTHREAD_MUTEX_INITIALIZER }; -static pthread_cond_t cond[CH438PORTNUM] = +static pthread_cond_t cond[CH438PORTNUM] = { PTHREAD_COND_INITIALIZER, PTHREAD_COND_INITIALIZER, @@ -109,25 +109,25 @@ static const struct file_operations g_ch438fops = * thread task getInterruptStatus * ****************************************************************************/ -static FAR void *getInterruptStatus(FAR void *arg) +static FAR void getInterruptStatus(FAR void *arg) { uint8_t i; - while(1) + while(1) { - gInterruptStatus = ReadCH438Data(REG_SSR_ADDR); - if(!gInterruptStatus) - { - continue; - } - for(i = 0; i < CH438PORTNUM; i++) + gInterruptStatus = ReadCH438Data(REG_SSR_ADDR); + if(!gInterruptStatus) { - if(gInterruptStatus & Interruptnum[i]) - { - pthread_mutex_lock(&mutex[i]); - done[i] = true; - pthread_cond_signal(&cond[i]); - pthread_mutex_unlock(&mutex[i]); - } + continue; + } + for(i = 0; i < CH438PORTNUM; i++) + { + if(gInterruptStatus & Interruptnum[i]) + { + pthread_mutex_lock(&mutex[i]); + done[i] = true; + pthread_cond_signal(&cond[i]); + pthread_mutex_unlock(&mutex[i]); + } } } } @@ -187,14 +187,14 @@ static uint8_t ReadCH438Data(uint8_t addr) CH438SetOutput(); up_udelay(1); - if(addr &0x80) imxrt_gpio_write(CH438_D7_PIN_OUT, true); else imxrt_gpio_write(CH438_D7_PIN_OUT, false); - if(addr &0x40) imxrt_gpio_write(CH438_D6_PIN_OUT, true); else imxrt_gpio_write(CH438_D6_PIN_OUT, false); - if(addr &0x20) imxrt_gpio_write(CH438_D5_PIN_OUT, true); else imxrt_gpio_write(CH438_D5_PIN_OUT, false); - if(addr &0x10) imxrt_gpio_write(CH438_D4_PIN_OUT, true); else imxrt_gpio_write(CH438_D4_PIN_OUT, false); - if(addr &0x08) imxrt_gpio_write(CH438_D3_PIN_OUT, true); else imxrt_gpio_write(CH438_D3_PIN_OUT, false); - if(addr &0x04) imxrt_gpio_write(CH438_D2_PIN_OUT, true); else imxrt_gpio_write(CH438_D2_PIN_OUT, false); - if(addr &0x02) imxrt_gpio_write(CH438_D1_PIN_OUT, true); else imxrt_gpio_write(CH438_D1_PIN_OUT, false); - if(addr &0x01) imxrt_gpio_write(CH438_D0_PIN_OUT, true); else imxrt_gpio_write(CH438_D0_PIN_OUT, false); + if(addr &0x80) imxrt_gpio_write(CH438_D7_PIN_OUT, true); else imxrt_gpio_write(CH438_D7_PIN_OUT, false); + if(addr &0x40) imxrt_gpio_write(CH438_D6_PIN_OUT, true); else imxrt_gpio_write(CH438_D6_PIN_OUT, false); + if(addr &0x20) imxrt_gpio_write(CH438_D5_PIN_OUT, true); else imxrt_gpio_write(CH438_D5_PIN_OUT, false); + if(addr &0x10) imxrt_gpio_write(CH438_D4_PIN_OUT, true); else imxrt_gpio_write(CH438_D4_PIN_OUT, false); + if(addr &0x08) imxrt_gpio_write(CH438_D3_PIN_OUT, true); else imxrt_gpio_write(CH438_D3_PIN_OUT, false); + if(addr &0x04) imxrt_gpio_write(CH438_D2_PIN_OUT, true); else imxrt_gpio_write(CH438_D2_PIN_OUT, false); + if(addr &0x02) imxrt_gpio_write(CH438_D1_PIN_OUT, true); else imxrt_gpio_write(CH438_D1_PIN_OUT, false); + if(addr &0x01) imxrt_gpio_write(CH438_D0_PIN_OUT, true); else imxrt_gpio_write(CH438_D0_PIN_OUT, false); up_udelay(1); @@ -229,7 +229,7 @@ static uint8_t ReadCH438Data(uint8_t addr) * Description: * write data to ch438 address * - ****************************************************************************/ + ****************************************************************************/ static void WriteCH438Data(uint8_t addr, uint8_t dat) { imxrt_gpio_write(CH438_ALE_PIN, true); @@ -239,36 +239,36 @@ static void WriteCH438Data(uint8_t addr, uint8_t dat) CH438SetOutput(); up_udelay(1); - if(addr &0x80) imxrt_gpio_write(CH438_D7_PIN_OUT, true); else imxrt_gpio_write(CH438_D7_PIN_OUT, false); - if(addr &0x40) imxrt_gpio_write(CH438_D6_PIN_OUT, true); else imxrt_gpio_write(CH438_D6_PIN_OUT, false); - if(addr &0x20) imxrt_gpio_write(CH438_D5_PIN_OUT, true); else imxrt_gpio_write(CH438_D5_PIN_OUT, false); - if(addr &0x10) imxrt_gpio_write(CH438_D4_PIN_OUT, true); else imxrt_gpio_write(CH438_D4_PIN_OUT, false); - if(addr &0x08) imxrt_gpio_write(CH438_D3_PIN_OUT, true); else imxrt_gpio_write(CH438_D3_PIN_OUT, false); - if(addr &0x04) imxrt_gpio_write(CH438_D2_PIN_OUT, true); else imxrt_gpio_write(CH438_D2_PIN_OUT, false); - if(addr &0x02) imxrt_gpio_write(CH438_D1_PIN_OUT, true); else imxrt_gpio_write(CH438_D1_PIN_OUT, false); - if(addr &0x01) imxrt_gpio_write(CH438_D0_PIN_OUT, true); else imxrt_gpio_write(CH438_D0_PIN_OUT, false); + if(addr &0x80) imxrt_gpio_write(CH438_D7_PIN_OUT, true); else imxrt_gpio_write(CH438_D7_PIN_OUT, false); + if(addr &0x40) imxrt_gpio_write(CH438_D6_PIN_OUT, true); else imxrt_gpio_write(CH438_D6_PIN_OUT, false); + if(addr &0x20) imxrt_gpio_write(CH438_D5_PIN_OUT, true); else imxrt_gpio_write(CH438_D5_PIN_OUT, false); + if(addr &0x10) imxrt_gpio_write(CH438_D4_PIN_OUT, true); else imxrt_gpio_write(CH438_D4_PIN_OUT, false); + if(addr &0x08) imxrt_gpio_write(CH438_D3_PIN_OUT, true); else imxrt_gpio_write(CH438_D3_PIN_OUT, false); + if(addr &0x04) imxrt_gpio_write(CH438_D2_PIN_OUT, true); else imxrt_gpio_write(CH438_D2_PIN_OUT, false); + if(addr &0x02) imxrt_gpio_write(CH438_D1_PIN_OUT, true); else imxrt_gpio_write(CH438_D1_PIN_OUT, false); + if(addr &0x01) imxrt_gpio_write(CH438_D0_PIN_OUT, true); else imxrt_gpio_write(CH438_D0_PIN_OUT, false); up_udelay(1); - imxrt_gpio_write(CH438_ALE_PIN, false); + imxrt_gpio_write(CH438_ALE_PIN, false); up_udelay(1); - if(dat &0x80) imxrt_gpio_write(CH438_D7_PIN_OUT, true); else imxrt_gpio_write(CH438_D7_PIN_OUT, false); - if(dat &0x40) imxrt_gpio_write(CH438_D6_PIN_OUT, true); else imxrt_gpio_write(CH438_D6_PIN_OUT, false); - if(dat &0x20) imxrt_gpio_write(CH438_D5_PIN_OUT, true); else imxrt_gpio_write(CH438_D5_PIN_OUT, false); - if(dat &0x10) imxrt_gpio_write(CH438_D4_PIN_OUT, true); else imxrt_gpio_write(CH438_D4_PIN_OUT, false); - if(dat &0x08) imxrt_gpio_write(CH438_D3_PIN_OUT, true); else imxrt_gpio_write(CH438_D3_PIN_OUT, false); - if(dat &0x04) imxrt_gpio_write(CH438_D2_PIN_OUT, true); else imxrt_gpio_write(CH438_D2_PIN_OUT, false); - if(dat &0x02) imxrt_gpio_write(CH438_D1_PIN_OUT, true); else imxrt_gpio_write(CH438_D1_PIN_OUT, false); - if(dat &0x01) imxrt_gpio_write(CH438_D0_PIN_OUT, true); else imxrt_gpio_write(CH438_D0_PIN_OUT, false); + if(dat &0x80) imxrt_gpio_write(CH438_D7_PIN_OUT, true); else imxrt_gpio_write(CH438_D7_PIN_OUT, false); + if(dat &0x40) imxrt_gpio_write(CH438_D6_PIN_OUT, true); else imxrt_gpio_write(CH438_D6_PIN_OUT, false); + if(dat &0x20) imxrt_gpio_write(CH438_D5_PIN_OUT, true); else imxrt_gpio_write(CH438_D5_PIN_OUT, false); + if(dat &0x10) imxrt_gpio_write(CH438_D4_PIN_OUT, true); else imxrt_gpio_write(CH438_D4_PIN_OUT, false); + if(dat &0x08) imxrt_gpio_write(CH438_D3_PIN_OUT, true); else imxrt_gpio_write(CH438_D3_PIN_OUT, false); + if(dat &0x04) imxrt_gpio_write(CH438_D2_PIN_OUT, true); else imxrt_gpio_write(CH438_D2_PIN_OUT, false); + if(dat &0x02) imxrt_gpio_write(CH438_D1_PIN_OUT, true); else imxrt_gpio_write(CH438_D1_PIN_OUT, false); + if(dat &0x01) imxrt_gpio_write(CH438_D0_PIN_OUT, true); else imxrt_gpio_write(CH438_D0_PIN_OUT, false); up_udelay(1); - imxrt_gpio_write(CH438_NWR_PIN, false); + imxrt_gpio_write(CH438_NWR_PIN, false); up_udelay(1); - imxrt_gpio_write(CH438_NWR_PIN, true); - imxrt_gpio_write(CH438_ALE_PIN, true); + imxrt_gpio_write(CH438_NWR_PIN, true); + imxrt_gpio_write(CH438_ALE_PIN, true); up_udelay(1); CH438SetInput(); @@ -282,10 +282,10 @@ static void WriteCH438Data(uint8_t addr, uint8_t dat) * Description: * Write data block from ch438 address * - ****************************************************************************/ + ****************************************************************************/ static void WriteCH438Block(uint8_t mAddr, uint8_t mLen, char *mBuf) { - while (mLen--) + while(mLen--) WriteCH438Data(mAddr, *mBuf++); } @@ -293,31 +293,31 @@ static void WriteCH438Block(uint8_t mAddr, uint8_t mLen, char *mBuf) * Name: CH438UARTSend * * Description: - * Enable FIFO mode, which is used for ch438 serial port to send multi byte data, + * Enable FIFO mode, which is used for ch438 serial port to send multi byte data, * with a maximum of 128 bytes of data sent at a time * - ****************************************************************************/ + ****************************************************************************/ static void Ch438UartSend(uint8_t ext_uart_no, char *Data, uint16_t Num) { - uint8_t REG_LSR_ADDR,REG_THR_ADDR; + uint8_t REG_LSR_ADDR,REG_THR_ADDR; REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR; REG_THR_ADDR = offsetadd[ext_uart_no] | REG_THR0_ADDR; - while(1) - { - while((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_TEMT ) == 0); /* 等待数据发送完毕，THR,TSR全空 */ - if(Num <= CH438_BUFFSIZE) - { - WriteCH438Block(REG_THR_ADDR, Num, Data); - break; - } - else - { - WriteCH438Block(REG_THR_ADDR, 128, Data); - Num -= CH438_BUFFSIZE; - Data += CH438_BUFFSIZE; - } - } + while(1) + { + while((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_TEMT) == 0); /* 等待数据发送完毕，THR,TSR全空 */ + if(Num <= CH438_BUFFSIZE) + { + WriteCH438Block(REG_THR_ADDR, Num, Data); + break; + } + else + { + WriteCH438Block(REG_THR_ADDR, 128, Data); + Num -= CH438_BUFFSIZE; + Data += CH438_BUFFSIZE; + } + } } /**************************************************************************** @@ -326,25 +326,25 @@ static void Ch438UartSend(uint8_t ext_uart_no, char *Data, uint16_t Num) * Description: * Disable FIFO mode for ch438 serial port to receive multi byte data * - ****************************************************************************/ + ****************************************************************************/ uint8_t CH438UARTRcv(uint8_t ext_uart_no, char* buf) { uint8_t RcvNum = 0; - uint8_t dat = 0; - uint8_t REG_LSR_ADDR,REG_RBR_ADDR; + uint8_t dat = 0; + uint8_t REG_LSR_ADDR,REG_RBR_ADDR; REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR; REG_RBR_ADDR = offsetadd[ext_uart_no] | REG_RBR0_ADDR; /* Wait for the data to be ready */ while((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_DATARDY) == 0 ); - while((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_DATARDY) == 0x01 ) + while((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_DATARDY) == 0x01) { dat = ReadCH438Data(REG_RBR_ADDR); buff[ext_uart_no][buff_ptr[ext_uart_no]] = dat; buff_ptr[ext_uart_no] = buff_ptr[ext_uart_no] + 1; - if (buff_ptr[ext_uart_no] == CH438_BUFFSIZE) + if(buff_ptr[ext_uart_no] == CH438_BUFFSIZE) buff_ptr[ext_uart_no] = 0; RcvNum = RcvNum + 1; } @@ -380,13 +380,13 @@ static void ImxrtCH438Init(void) static void CH438PortInit(uint8_t ext_uart_no, uint32_t baud_rate) { uint32_t div; - uint8_t DLL,DLM,dlab; - uint8_t REG_LCR_ADDR; - uint8_t REG_DLL_ADDR; - uint8_t REG_DLM_ADDR; - uint8_t REG_IER_ADDR; - uint8_t REG_MCR_ADDR; - uint8_t REG_FCR_ADDR; + uint8_t DLL,DLM,dlab; + uint8_t REG_LCR_ADDR; + uint8_t REG_DLL_ADDR; + uint8_t REG_DLM_ADDR; + uint8_t REG_IER_ADDR; + uint8_t REG_MCR_ADDR; + uint8_t REG_FCR_ADDR; REG_LCR_ADDR = offsetadd[ext_uart_no] | REG_LCR0_ADDR; REG_DLL_ADDR = offsetadd[ext_uart_no] | REG_DLL0_ADDR; @@ -408,7 +408,7 @@ static void CH438PortInit(uint8_t ext_uart_no, uint32_t baud_rate) dlab |= 0x80; WriteCH438Data(REG_LCR_ADDR, dlab); - div = ( Fpclk >> 4 ) / baud_rate; + div = (Fpclk >> 4) / baud_rate; DLM = div >> 8; DLL = div & 0xff; @@ -448,12 +448,12 @@ static int ImxrtCh438WriteData(uint8_t ext_uart_no, char *write_buffer, size_t s write_len = size;; write_len_continue = size; - if (write_len > CH438_BUFFSIZE) + if(write_len > CH438_BUFFSIZE) { - if (0 == write_len % CH438_BUFFSIZE) + if(0 == write_len % CH438_BUFFSIZE) { write_index = write_len / CH438_BUFFSIZE; - for (i = 0; i < write_index; i ++) + for(i = 0; i < write_index; i ++) { Ch438UartSend(ext_uart_no, write_buffer + i * CH438_BUFFSIZE, CH438_BUFFSIZE); } @@ -461,7 +461,7 @@ static int ImxrtCh438WriteData(uint8_t ext_uart_no, char *write_buffer, size_t s else { write_index = 0; - while (write_len_continue > CH438_BUFFSIZE) + while(write_len_continue > CH438_BUFFSIZE) { Ch438UartSend(ext_uart_no, write_buffer + write_index * CH438_BUFFSIZE, CH438_BUFFSIZE); write_index++; @@ -489,26 +489,26 @@ static size_t ImxrtCh438ReadData(uint8_t ext_uart_no) { size_t RevLen = 0; uint8_t InterruptStatus; - uint8_t REG_IIR_ADDR; - uint8_t REG_LSR_ADDR; - uint8_t REG_MSR_ADDR; + uint8_t REG_IIR_ADDR; + uint8_t REG_LSR_ADDR; + uint8_t REG_MSR_ADDR; pthread_mutex_lock(&mutex[ext_uart_no]); while(done[ext_uart_no] == false) pthread_cond_wait(&cond[ext_uart_no], &mutex[ext_uart_no]); - if (done[ext_uart_no] == true) + if(done[ext_uart_no] == true) { REG_IIR_ADDR = offsetadd[ext_uart_no] | REG_IIR0_ADDR; REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR; REG_MSR_ADDR = offsetadd[ext_uart_no] | REG_MSR0_ADDR; - InterruptStatus = ReadCH438Data(REG_IIR_ADDR) & 0x0f; /* 读串口的中断状态 */ + InterruptStatus = ReadCH438Data(REG_IIR_ADDR) & 0x0f; /* 读串口的中断状态 */ ch438info("InterruptStatus is %d\n", InterruptStatus); switch(InterruptStatus) { - case INT_NOINT: /* 没有中断 */ + case INT_NOINT: /* 没有中断 */ break; - case INT_THR_EMPTY: /* THR空中断 */ + case INT_THR_EMPTY: /* THR空中断 */ break; case INT_RCV_OVERTIME: /* 接收超时中断，收到数据后一般是触发这个 。在收到一帧数据后4个数据时间没有后续的数据时触发*/ case INT_RCV_SUCCESS: /* 接收数据可用中断。这是一个数据帧超过缓存了才发生，否则一般是前面的超时中断。处理过程同上面的超时中断 */ @@ -546,16 +546,16 @@ static void Ch438InitDefault(void) int ret = 0; int i; - struct sched_param param; - pthread_attr_t attr; - pthread_t thread; + struct sched_param param; + pthread_attr_t attr; + pthread_t thread; /* Initialize the mutex */ for(i = 0; i < CH438PORTNUM; i++) { ret = pthread_mutex_init(&mutex[i], NULL); - if (ret != 0) + if(ret != 0) { ch438err("pthread_mutex_init failed, status=%d\n", ret); } @@ -565,18 +565,18 @@ static void Ch438InitDefault(void) for(i = 0; i < CH438PORTNUM; i++) { ret = pthread_cond_init(&cond[i], NULL); - if (ret != 0) + if(ret != 0) { ch438err("pthread_cond_init failed, status=%d\n", ret); } } - pthread_attr_init(&attr); - param.sched_priority = 60; - pthread_attr_setschedparam(&attr, ¶m); - pthread_attr_setstacksize(&attr, 2048); - ret = pthread_create(&thread, &attr, getInterruptStatus, NULL); - if (ret < 0) + pthread_attr_init(&attr); + param.sched_priority = 60; + pthread_attr_setschedparam(&attr, ¶m); + pthread_attr_setstacksize(&attr, 2048); + ret = pthread_create(&thread, &attr, (void*)getInterruptStatus, NULL); + if(ret < 0) { ch438err("task create failed, status=%d\n", ret); } @@ -602,7 +602,7 @@ static int ch438_open(FAR struct file *filep) uint8_t port = priv->port; DEBUGASSERT(port >= 0 && port < CH438PORTNUM); - if (g_ch438open[port]) + if(g_ch438open[port]) { return -EBUSY; } @@ -639,7 +639,7 @@ static ssize_t ch438_read(FAR struct file *filep, FAR char *buffer, size_t bufle length = ImxrtCh438ReadData(port); memcpy(buffer, buff[port], length); - if (length > buflen) + if(length > buflen) { length = buflen; } @@ -679,7 +679,7 @@ static int ch438_register(FAR const char *devpath, uint8_t port) DEBUGASSERT(port >= 0 && port < CH438PORTNUM); priv = (FAR struct ch438_dev_s *)kmm_malloc(sizeof(struct ch438_dev_s)); - if (priv == NULL) + if(priv == NULL) { ch438err("ERROR: Failed to allocate instance\n"); return -ENOMEM; @@ -689,7 +689,7 @@ static int ch438_register(FAR const char *devpath, uint8_t port) /* Register the character driver */ ret = register_driver(devpath, &g_ch438fops, 0666, priv); - if (ret < 0) + if(ret < 0) { ch438err("ERROR: Failed to register driver: %d\n", ret); kmm_free(priv); From 68d30d3df2f32de5079743eb6eb3848e4087fb9d Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Tue, 10 May 2022 13:26:17 +0800 Subject: [PATCH 21/46] add loransh --- .../xidatong/configs/loransh/defconfig | 65 +++++++++++++++++++ 1 file changed, 65 insertions(+) create mode 100644 Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/loransh/defconfig diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/loransh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/loransh/defconfig new file mode 100644 index 000000000..7d41f2298 --- /dev/null +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/loransh/defconfig @@ -0,0 +1,65 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +CONFIG_ADD_NUTTX_FETURES=y +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="xidatong" +CONFIG_ARCH_BOARD_XIDATONG=y +CONFIG_ARCH_CHIP="imxrt" +CONFIG_ARCH_CHIP_IMXRT=y +CONFIG_ARCH_CHIP_MIMXRT1052CVL5B=y +CONFIG_ARCH_INTERRUPTSTACK=10240 +CONFIG_ARCH_STACKDUMP=y +CONFIG_ARMV7M_DCACHE=y +CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y +CONFIG_ARMV7M_ICACHE=y +CONFIG_ARMV7M_USEBASEPRI=y +CONFIG_BOARD_LOOPSPERMSEC=104926 +CONFIG_BUILTIN=y +CONFIG_CLOCK_MONOTONIC=y +CONFIG_EXAMPLES_HELLO=y +CONFIG_IMXRT_GPIO_IRQ=y +CONFIG_IMXRT_GPIO3_0_15_IRQ=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_IMXRT_LPUART1=y +CONFIG_INTELHEX_BINARY=y +CONFIG_LPUART1_SERIAL_CONSOLE=y +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_DISABLE_IFUPDOWN=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_RAM_SIZE=524288 +CONFIG_RAM_START=0x20200000 +CONFIG_RAW_BINARY=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_WAITPID=y +CONFIG_START_DAY=14 +CONFIG_START_MONTH=3 +CONFIG_SYSTEM_NSH=y +CONFIG_DEV_GPIO=y +CONFIG_READLINE_CMD_HISTORY=y +CONFIG_READLINE_CMD_HISTORY_LEN=100 +CONFIG_READLINE_CMD_HISTORY_LINELEN=120 +CONFIG_READLINE_TABCOMPLETION=y +CONFIG_FS_ROMFS=y +CONFIG_NSH_ROMFSETC=y +CONFIG_NSH_ARCHROMFS=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BSP_USING_CH438=y +CONFIG_CH438_EXTUART3=y +CONFIG_SUPPORT_CONNECTION_FRAMEWORK=y +CONFIG_CONNECTION_FRAMEWORK_DEBUG=y +CONFIG_CONNECTION_ADAPTER_LORA=y +CONFIG_ADAPTER_E220=y +CONFIG_ADAPTER_LORA_E220="e220" +CONFIG_ADAPTER_E220_DRIVER_EXTUART=y +CONFIG_ADAPTER_E220_DRIVER="/dev/extuart_dev3" +CONFIG_ADAPTER_E220_M0_PATH="/dev/gpout0" +CONFIG_ADAPTER_E220_M1_PATH="/dev/gpout1" +CONFIG_USER_ENTRYPOINT="nsh_main" From 87910b03a4b8a56a191989dccdc01b6becd7d387 Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Tue, 10 May 2022 16:39:54 +0800 Subject: [PATCH 22/46] add ch438_ioctl --- .../aiit_board/xidatong/src/imxrt_ch438.c | 85 ++++++++++++++++--- .../aiit_board/xidatong/src/imxrt_ch438.h | 6 +- 2 files changed, 80 insertions(+), 11 deletions(-) diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c index 22b2fada4..f6b64d683 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c @@ -44,6 +44,7 @@ static int ch438_open(FAR struct file *filep); static int ch438_close(FAR struct file *filep); static ssize_t ch438_read(FAR struct file *filep, FAR char *buffer, size_t buflen); static ssize_t ch438_write(FAR struct file *filep, FAR const char *buffer, size_t buflen); +static int ch438_ioctl(FAR struct file *filep, int cmd, unsigned long arg); static int ch438_register(FAR const char *devpath, uint8_t ext_uart_no); /**************************************************************************** @@ -51,6 +52,7 @@ static int ch438_register(FAR const char *devpath, uint8_t ext_uart_no); ****************************************************************************/ struct ch438_dev_s { + sem_t devsem; uint8_t port; /* ch438 port number*/ }; @@ -90,7 +92,6 @@ static uint8_t offsetadd[CH438PORTNUM] = {0x00,0x10,0x20,0x30,0x08,0x18,0x28,0x3 static uint8_t gInterruptStatus; -static bool g_ch438open[CH438PORTNUM]; static const struct file_operations g_ch438fops = { ch438_open, @@ -98,7 +99,7 @@ static const struct file_operations g_ch438fops = ch438_read, ch438_write, NULL, - NULL, + ch438_ioctl, NULL }; @@ -377,7 +378,7 @@ static void ImxrtCH438Init(void) * ch438 port initialization * ****************************************************************************/ -static void CH438PortInit(uint8_t ext_uart_no, uint32_t baud_rate) +static void CH438PortInit(uint8_t ext_uart_no, uint32_t baud_rate) { uint32_t div; uint8_t DLL,DLM,dlab; @@ -600,15 +601,18 @@ static int ch438_open(FAR struct file *filep) FAR struct inode *inode = filep->f_inode; FAR struct ch438_dev_s *priv = inode->i_private; uint8_t port = priv->port; + int ret = OK; + DEBUGASSERT(port >= 0 && port < CH438PORTNUM); - if(g_ch438open[port]) + ret = nxsem_wait_uninterruptible(&priv->devsem); + if (ret < 0) { - return -EBUSY; + return ret; } - g_ch438open[port] = true; + nxsem_post(&priv->devsem); - return OK; + return ret; } /**************************************************************************** @@ -619,10 +623,18 @@ static int ch438_close(FAR struct file *filep) FAR struct inode *inode = filep->f_inode; FAR struct ch438_dev_s *priv = inode->i_private; uint8_t port = priv->port; + int ret = OK; + DEBUGASSERT(port >= 0 && port < CH438PORTNUM); - g_ch438open[port] = false; - return OK; + ret = nxsem_wait_uninterruptible(&priv->devsem); + if (ret < 0) + { + return ret; + } + + nxsem_post(&priv->devsem); + return ret; } /**************************************************************************** @@ -634,8 +646,16 @@ static ssize_t ch438_read(FAR struct file *filep, FAR char *buffer, size_t bufle FAR struct inode *inode = filep->f_inode; FAR struct ch438_dev_s *priv = inode->i_private; uint8_t port = priv->port; + int ret = OK; + DEBUGASSERT(port >= 0 && port < CH438PORTNUM); + ret = nxsem_wait_uninterruptible(&priv->devsem); + if (ret < 0) + { + return (ssize_t)ret; + } + length = ImxrtCh438ReadData(port); memcpy(buffer, buff[port], length); @@ -643,6 +663,7 @@ static ssize_t ch438_read(FAR struct file *filep, FAR char *buffer, size_t bufle { length = buflen; } + nxsem_post(&priv->devsem); return length; } @@ -655,13 +676,57 @@ static ssize_t ch438_write(FAR struct file *filep, FAR const char *buffer, size_ FAR struct inode *inode = filep->f_inode; FAR struct ch438_dev_s *priv = inode->i_private; uint8_t port = priv->port; + int ret = OK; + DEBUGASSERT(port >= 0 && port < CH438PORTNUM); + ret = nxsem_wait_uninterruptible(&priv->devsem); + if (ret < 0) + { + return (ssize_t)ret; + } ImxrtCh438WriteData(port, buffer, buflen); + nxsem_post(&priv->devsem); return buflen; } +/**************************************************************************** + * Name: ch438_ioctl + ****************************************************************************/ +static int ch438_ioctl(FAR struct file *filep, int cmd, unsigned long arg) +{ + FAR struct inode *inode = filep->f_inode; + FAR struct ch438_dev_s *priv = inode->i_private; + uint8_t port = priv->port; + int ret = OK; + + DEBUGASSERT(port >= 0 && port < CH438PORTNUM); + + /* Get exclusive access */ + ret = nxsem_wait_uninterruptible(&priv->devsem); + if (ret < 0) + { + return ret; + } + + switch(cmd) + { + case OPE_CFG: + case OPE_INT: + CH438PortInit(port, (uint32_t)arg); + break; + + default: + ch438info("Unrecognized cmd: %d\n", cmd); + ret = -ENOTTY; + break; + } + + nxsem_post(&priv->devsem); + return ret; +} + /**************************************************************************** * Name: ch438_register @@ -686,12 +751,12 @@ static int ch438_register(FAR const char *devpath, uint8_t port) } priv->port = port; + nxsem_init(&priv->devsem, 0, 1); /* Register the character driver */ ret = register_driver(devpath, &g_ch438fops, 0666, priv); if(ret < 0) { - ch438err("ERROR: Failed to register driver: %d\n", ret); kmm_free(priv); } diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h index afc9b0ae0..42c5919fa 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h @@ -32,6 +32,7 @@ #include #include #include +#include #include #include @@ -333,7 +334,6 @@ #define CH438_D7_PIN_INPUT (GPIO_INPUT | \ GPIO_PORT1 | GPIO_PIN29) - #ifdef CONFIG_DEBUG_CH438_ERROR # define ch438err _err #else @@ -352,6 +352,10 @@ # define ch438info _none #endif + +#define OPE_INT 0x0000 +#define OPE_CFG 0x0001 + /**************************************************************************** * Public Function Prototypes ****************************************************************************/ From f106ac7c4375ed32f64e89df0d9aaae0996c0f76 Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Tue, 10 May 2022 17:54:07 +0800 Subject: [PATCH 23/46] add loraopen to cmd --- .../app_match_nuttx/apps/nshlib/Kconfig | 10 +++---- .../app_match_nuttx/apps/nshlib/nsh.h | 12 +++------ .../apps/nshlib/nsh_Applicationscmd.c | 27 ++++++------------- .../app_match_nuttx/apps/nshlib/nsh_command.c | 11 +++----- 4 files changed, 19 insertions(+), 41 deletions(-) diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/Kconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/Kconfig index 4e03b59d8..215fedfe3 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/Kconfig +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/Kconfig @@ -664,18 +664,14 @@ config NSH_DISABLE_ADAPTER_4GTEST bool "Disable ec200t Adapter4GTest." default n -config NSH_DISABLE_E220_LORATEST - bool "Disable e220 Lora test." +config NSH_DISABLE_E220_LORA_RECEIVE + bool "Disable e220 Lora receive." default n -config NSH_DISABLE_E220_LORASEND +config NSH_DISABLE_E220_LORA_SEND bool "Disable e220 Lora send." default n -config NSH_DISABLE_E220_LORAOPEN - bool "Disable e220 Lora open." - default n - config NSH_DISABLE_K210_FFT bool "Disable the K210 fft device." default n diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h index 6a950f277..9574506eb 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h @@ -1494,16 +1494,12 @@ int nsh_foreach_var(FAR struct nsh_vtbl_s *vtbl, nsh_foreach_var_t cb, int cmd_Adapter4GTest(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv); #endif -#if defined(CONFIG_ADAPTER_LORA_E220) && !defined(CONFIG_NSH_DISABLE_E220_LORATEST) - int cmd_e220loraTest(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv); +#if defined(CONFIG_ADAPTER_LORA_E220) && !defined(CONFIG_NSH_DISABLE_E220_LORA_RECEIVE) + int cmd_E220LoraReceive(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv); #endif -#if defined(CONFIG_ADAPTER_LORA_E220) && !defined(CONFIG_NSH_DISABLE_E220_LORASEND) - int cmd_e220loraSend(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv); -#endif - -#if defined(CONFIG_ADAPTER_LORA_E220) && !defined(CONFIG_NSH_DISABLE_E220_LORAOPEN) - int cmd_e220LoraOpen(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv); +#if defined(CONFIG_ADAPTER_LORA_E220) && !defined(CONFIG_NSH_DISABLE_E220_LORA_SEND) + int cmd_E220LoraSend(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv); #endif #if defined(CONFIG_K210_FFT_TEST) && !defined(CONFIG_NSH_DISABLE_K210_FFT) diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c index b1d0c3769..9357d46ae 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c @@ -305,35 +305,24 @@ int cmd_Adapter4GTest(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv) } #endif -#if defined(CONFIG_ADAPTER_LORA_E220) && !defined(CONFIG_NSH_DISABLE_E220_LORATEST) -extern void LoraTest(void); -int cmd_e220loraTest(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv) +#if defined(CONFIG_ADAPTER_LORA_E220) && !defined(CONFIG_NSH_DISABLE_E220_LORA_RECEIVE) +void E220LoraReceive(void); +int cmd_E220LoraReceive(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv) { nsh_output(vtbl, "Hello, world!\n"); FrameworkInit(); - LoraTest(); + E220LoraReceive(); return OK; } #endif -#if defined(CONFIG_ADAPTER_LORA_E220) && !defined(CONFIG_NSH_DISABLE_E220_LORASEND) -extern void LoraSend(int argc, char *argv[]); -int cmd_e220loraSend(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv) +#if defined(CONFIG_ADAPTER_LORA_E220) && !defined(CONFIG_NSH_DISABLE_E220_LORA_SEND) +extern void E220LoraSend(int argc, char *argv[]); +int cmd_E220LoraSend(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv) { nsh_output(vtbl, "Hello, world!\n"); FrameworkInit(); - LoraSend(argc,argv); - return OK; -} -#endif - -#if defined(CONFIG_ADAPTER_LORA_E220) && !defined(CONFIG_NSH_DISABLE_E220_LORAOPEN) -extern void LoraOpen(void); -int cmd_e220LoraOpen(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv) -{ - nsh_output(vtbl, "Hello, world!\n"); - FrameworkInit(); - LoraOpen(); + E220LoraSend(argc,argv); return OK; } #endif diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c index d4d5e01e2..042c44105 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c @@ -666,17 +666,14 @@ static const struct cmdmap_s g_cmdmap[] = { "Adapter4GTest", cmd_Adapter4GTest, 1, 1, "[4G ec200t test.]" }, #endif -#if defined(CONFIG_ADAPTER_LORA_E220) && !defined(CONFIG_NSH_DISABLE_E220_LORATEST) - { "e220loraTest", cmd_e220loraTest, 1, 1, "[e220 lora test.]" }, +#if defined(CONFIG_ADAPTER_LORA_E220) && !defined(CONFIG_NSH_DISABLE_E220_LORA_RECEIVE) + { "E220Receive", cmd_E220LoraReceive, 1, 1, "[e220 lora receive.]" }, #endif -#if defined(CONFIG_ADAPTER_LORA_E220) && !defined(CONFIG_NSH_DISABLE_E220_LORASEND) - { "e220loraSend", cmd_e220loraSend, 1, 2, "[e220loraSend ]" }, +#if defined(CONFIG_ADAPTER_LORA_E220) && !defined(CONFIG_NSH_DISABLE_E220_LORA_SEND) + { "e220Send", cmd_E220LoraSend, 1, 2, "[e220loraSend ]" }, #endif -#if defined(CONFIG_ADAPTER_LORA_E220) && !defined(CONFIG_NSH_DISABLE_E220_LORAOPEN) - { "e220loraOpen", cmd_e220LoraOpen, 1, 1, "[e220lora open device" }, -#endif #if defined(CONFIG_K210_FFT_TEST) && !defined(CONFIG_NSH_DISABLE_K210_FFT) { "fft", cmd_fft, 1, 1, "[K210 fft function.]" }, From cfebd3357b051feea96a91399c71f2539a9e38a1 Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Wed, 11 May 2022 09:01:53 +0800 Subject: [PATCH 24/46] change ch438 on nuttx --- .../aiit_board/xidatong/src/imxrt_ch438.c | 32 +++++++++---------- .../app_match_nuttx/apps/nshlib/nsh_command.c | 2 +- 2 files changed, 16 insertions(+), 18 deletions(-) diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c index f6b64d683..43ccc8c9c 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c @@ -307,7 +307,7 @@ static void Ch438UartSend(uint8_t ext_uart_no, char *Data, uint16_t Num) while(1) { while((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_TEMT) == 0); /* 等待数据发送完毕，THR,TSR全空 */ - if(Num <= CH438_BUFFSIZE) + if(Num <= 128) { WriteCH438Block(REG_THR_ADDR, Num, Data); break; @@ -315,8 +315,8 @@ static void Ch438UartSend(uint8_t ext_uart_no, char *Data, uint16_t Num) else { WriteCH438Block(REG_THR_ADDR, 128, Data); - Num -= CH438_BUFFSIZE; - Data += CH438_BUFFSIZE; + Num -= 128; + Data += 128; } } } @@ -345,7 +345,7 @@ uint8_t CH438UARTRcv(uint8_t ext_uart_no, char* buf) buff[ext_uart_no][buff_ptr[ext_uart_no]] = dat; buff_ptr[ext_uart_no] = buff_ptr[ext_uart_no] + 1; - if(buff_ptr[ext_uart_no] == CH438_BUFFSIZE) + if(buff_ptr[ext_uart_no] == 256) buff_ptr[ext_uart_no] = 0; RcvNum = RcvNum + 1; } @@ -446,29 +446,29 @@ static int ImxrtCh438WriteData(uint8_t ext_uart_no, char *write_buffer, size_t s int i, write_index; DEBUGASSERT(write_buffer != NULL); - write_len = size;; + write_len = size; write_len_continue = size; - if(write_len > CH438_BUFFSIZE) + if(write_len > 256) { - if(0 == write_len % CH438_BUFFSIZE) + if(0 == write_len % 256) { - write_index = write_len / CH438_BUFFSIZE; + write_index = write_len / 256; for(i = 0; i < write_index; i ++) { - Ch438UartSend(ext_uart_no, write_buffer + i * CH438_BUFFSIZE, CH438_BUFFSIZE); + Ch438UartSend(ext_uart_no, write_buffer + i * 256, 256); } } else { write_index = 0; - while(write_len_continue > CH438_BUFFSIZE) + while(write_len_continue > 256) { - Ch438UartSend(ext_uart_no, write_buffer + write_index * CH438_BUFFSIZE, CH438_BUFFSIZE); + Ch438UartSend(ext_uart_no, write_buffer + write_index * 256, 256); write_index++; - write_len_continue = write_len - write_index * CH438_BUFFSIZE; + write_len_continue = write_len - write_index * 256; } - Ch438UartSend(ext_uart_no, write_buffer + write_index * CH438_BUFFSIZE, write_len_continue); + Ch438UartSend(ext_uart_no, write_buffer + write_index * 256, write_len_continue); } } else @@ -543,8 +543,7 @@ static size_t ImxrtCh438ReadData(uint8_t ext_uart_no) * ****************************************************************************/ static void Ch438InitDefault(void) -{ - +{ int ret = 0; int i; struct sched_param param; @@ -552,7 +551,6 @@ static void Ch438InitDefault(void) pthread_t thread; /* Initialize the mutex */ - for(i = 0; i < CH438PORTNUM; i++) { ret = pthread_mutex_init(&mutex[i], NULL); @@ -712,8 +710,8 @@ static int ch438_ioctl(FAR struct file *filep, int cmd, unsigned long arg) switch(cmd) { - case OPE_CFG: case OPE_INT: + case OPE_CFG: CH438PortInit(port, (uint32_t)arg); break; diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c index 042c44105..c1714e701 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c @@ -671,7 +671,7 @@ static const struct cmdmap_s g_cmdmap[] = #endif #if defined(CONFIG_ADAPTER_LORA_E220) && !defined(CONFIG_NSH_DISABLE_E220_LORA_SEND) - { "e220Send", cmd_E220LoraSend, 1, 2, "[e220loraSend ]" }, + { "E220Send", cmd_E220LoraSend, 1, 2, "[e220loraSend ]" }, #endif From 88ef0ad96c081c11fb1c746f1f7737bb0ec116f5 Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Wed, 11 May 2022 10:33:02 +0800 Subject: [PATCH 25/46] change ch438 on nuttx --- .../aiit_board/xidatong/src/imxrt_ch438.c | 46 ++++++++----------- 1 file changed, 19 insertions(+), 27 deletions(-) diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c index 43ccc8c9c..e5aa5535f 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c @@ -52,8 +52,8 @@ static int ch438_register(FAR const char *devpath, uint8_t ext_uart_no); ****************************************************************************/ struct ch438_dev_s { - sem_t devsem; - uint8_t port; /* ch438 port number*/ + sem_t devsem; /* ch438 port devsem */ + uint8_t port; /* ch438 port number*/ }; /**************************************************************************** @@ -83,7 +83,7 @@ static pthread_cond_t cond[CH438PORTNUM] = PTHREAD_COND_INITIALIZER }; -volatile bool done[CH438PORTNUM] = {false,false,false,false,false,false,false,false}; +static volatile bool done[CH438PORTNUM] = {false,false,false,false,false,false,false,false}; static char buff[CH438PORTNUM][CH438_BUFFSIZE]; static uint8_t buff_ptr[CH438PORTNUM]; @@ -92,6 +92,7 @@ static uint8_t offsetadd[CH438PORTNUM] = {0x00,0x10,0x20,0x30,0x08,0x18,0x28,0x3 static uint8_t gInterruptStatus; +static volatile bool g_ch438open[CH438PORTNUM] = {false,false,false,false,false,false,false,false}; static const struct file_operations g_ch438fops = { ch438_open, @@ -608,6 +609,14 @@ static int ch438_open(FAR struct file *filep) { return ret; } + + if(g_ch438open[port]) + { + ch438err("ERROR: ch438 port %d is opened!\n",port); + return -EBUSY; + } + g_ch438open[port] = true; + nxsem_post(&priv->devsem); return ret; @@ -631,6 +640,13 @@ static int ch438_close(FAR struct file *filep) return ret; } + if(!g_ch438open[port]) + { + ch438err("ERROR: ch438 port %d is closed!\n",port); + return -EBUSY; + } + g_ch438open[port] = false; + nxsem_post(&priv->devsem); return ret; } @@ -644,16 +660,9 @@ static ssize_t ch438_read(FAR struct file *filep, FAR char *buffer, size_t bufle FAR struct inode *inode = filep->f_inode; FAR struct ch438_dev_s *priv = inode->i_private; uint8_t port = priv->port; - int ret = OK; DEBUGASSERT(port >= 0 && port < CH438PORTNUM); - ret = nxsem_wait_uninterruptible(&priv->devsem); - if (ret < 0) - { - return (ssize_t)ret; - } - length = ImxrtCh438ReadData(port); memcpy(buffer, buff[port], length); @@ -661,7 +670,6 @@ static ssize_t ch438_read(FAR struct file *filep, FAR char *buffer, size_t bufle { length = buflen; } - nxsem_post(&priv->devsem); return length; } @@ -674,17 +682,10 @@ static ssize_t ch438_write(FAR struct file *filep, FAR const char *buffer, size_ FAR struct inode *inode = filep->f_inode; FAR struct ch438_dev_s *priv = inode->i_private; uint8_t port = priv->port; - int ret = OK; DEBUGASSERT(port >= 0 && port < CH438PORTNUM); - ret = nxsem_wait_uninterruptible(&priv->devsem); - if (ret < 0) - { - return (ssize_t)ret; - } ImxrtCh438WriteData(port, buffer, buflen); - nxsem_post(&priv->devsem); return buflen; } @@ -701,13 +702,6 @@ static int ch438_ioctl(FAR struct file *filep, int cmd, unsigned long arg) DEBUGASSERT(port >= 0 && port < CH438PORTNUM); - /* Get exclusive access */ - ret = nxsem_wait_uninterruptible(&priv->devsem); - if (ret < 0) - { - return ret; - } - switch(cmd) { case OPE_INT: @@ -720,8 +714,6 @@ static int ch438_ioctl(FAR struct file *filep, int cmd, unsigned long arg) ret = -ENOTTY; break; } - - nxsem_post(&priv->devsem); return ret; } From 5873feb44271dda2aaa0736717f2e7389079e839 Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Wed, 11 May 2022 14:40:52 +0800 Subject: [PATCH 26/46] support e220 for xidatong on nuttx --- .../Framework/connection/lora/e220/Kconfig | 24 ++++ .../Framework/connection/lora/e220/Makefile | 14 +- .../Framework/connection/lora/e220/e220.c | 115 +++++++++++++++- .../aiit_board/xidatong/src/imxrt_ch438.c | 124 ++++++++++-------- 4 files changed, 222 insertions(+), 55 deletions(-) diff --git a/APP_Framework/Framework/connection/lora/e220/Kconfig b/APP_Framework/Framework/connection/lora/e220/Kconfig index 050a8ea9b..b03aee0cc 100644 --- a/APP_Framework/Framework/connection/lora/e220/Kconfig +++ b/APP_Framework/Framework/connection/lora/e220/Kconfig @@ -37,6 +37,30 @@ endif if ADD_NUTTX_FETURES + config ADAPTER_E220_M0_PATH + string "E220 M0 pin device" + default "/dev/gpout0" + + config ADAPTER_E220_M1_PATH + string "E220 M1 pin device" + default "/dev/gpout1" + + config ADAPTER_E220_DRIVER_EXTUART + bool "Using extra uart to support lora" + default y + + config ADAPTER_E220_DRIVER + string "E220 device uart driver path" + default "/dev/ttyS3" + depends on !ADAPTER_E220_DRIVER_EXTUART + + if ADAPTER_E220_DRIVER_EXTUART + config ADAPTER_E220_DRIVER + string "E220 device extra uart driver path" + default "/dev/extuart_dev3" + + endif + endif if ADD_RTTHREAD_FETURES diff --git a/APP_Framework/Framework/connection/lora/e220/Makefile b/APP_Framework/Framework/connection/lora/e220/Makefile index 734805688..71d5454a0 100644 --- a/APP_Framework/Framework/connection/lora/e220/Makefile +++ b/APP_Framework/Framework/connection/lora/e220/Makefile @@ -1,3 +1,13 @@ -SRC_FILES := e220.c +include $(KERNEL_ROOT)/.config +ifeq ($(CONFIG_ADD_NUTTX_FETURES),y) + include $(APPDIR)/Make.defs + CSRCS += e220.c + include $(APPDIR)/Application.mk -include $(KERNEL_ROOT)/compiler.mk +endif + +ifeq ($(CONFIG_ADD_XIZI_FETURES),y) + SRC_FILES := e220.c + include $(KERNEL_ROOT)/compiler.mk + +endif \ No newline at end of file diff --git a/APP_Framework/Framework/connection/lora/e220/e220.c b/APP_Framework/Framework/connection/lora/e220/e220.c index 0d9d530ea..880ba9e48 100644 --- a/APP_Framework/Framework/connection/lora/e220/e220.c +++ b/APP_Framework/Framework/connection/lora/e220/e220.c @@ -21,7 +21,7 @@ #include #define E220_GATEWAY_ADDRESS 0xFFFF -#define E220_CHANNEL 0x04 +#define E220_CHANNEL 0x05 #ifdef AS_LORA_GATEWAY_ROLE #define E220_ADDRESS E220_GATEWAY_ADDRESS @@ -46,6 +46,60 @@ enum E220LoraMode * @param mode Lora working mode * @return NULL */ +#ifdef ADD_NUTTX_FETURES +static void E220LoraModeConfig(enum E220LoraMode mode) +{ + int m0_fd, m1_fd; + + //delay 1s , wait AUX ready + PrivTaskDelay(1000); + m0_fd = PrivOpen(ADAPTER_E220_M0_PATH, O_RDWR); + if (m0_fd < 0) { + printf("open %s error\n", ADAPTER_E220_M0_PATH); + return; + } + + m1_fd = PrivOpen(ADAPTER_E220_M1_PATH, O_RDWR); + if (m1_fd < 0) { + printf("open %s error\n", ADAPTER_E220_M1_PATH); + return; + } + + //Both M0 and M1 GPIO are outputs mode, set M0 and M1 high or low + switch (mode) + { + case DATA_TRANSFER_MODE: + PrivIoctl(m1_fd, GPIOC_WRITE, (unsigned long)GPIO_LOW); + PrivIoctl(m0_fd, GPIOC_WRITE, (unsigned long)GPIO_LOW); + break; + + case WOR_SEND_MODE: + PrivIoctl(m1_fd, GPIOC_WRITE, (unsigned long)GPIO_LOW); + PrivIoctl(m0_fd, GPIOC_WRITE, (unsigned long)GPIO_HIGH); + break; + + case WOR_RECEIVE_MODE: + PrivIoctl(m1_fd, GPIOC_WRITE, (unsigned long)GPIO_HIGH); + + PrivIoctl(m0_fd, GPIOC_WRITE,(unsigned long)GPIO_LOW); + break; + + case CONFIGURE_MODE_MODE: + PrivIoctl(m1_fd, GPIOC_WRITE, (unsigned long)GPIO_HIGH); + PrivIoctl(m0_fd, GPIOC_WRITE, (unsigned long)GPIO_HIGH); + break; + + default: + break; + } + + PrivClose(m0_fd); + PrivClose(m1_fd); + + //delay 20ms , wait mode switch done + PrivTaskDelay(20); +} +#else static void E220LoraModeConfig(enum E220LoraMode mode) { //delay 1s , wait AUX ready @@ -126,6 +180,7 @@ static void E220LoraModeConfig(enum E220LoraMode mode) //delay 20ms , wait mode switch done PrivTaskDelay(20); } +#endif /** * @description: Switch baud rate to register bit @@ -263,6 +318,25 @@ static int E220GetRegisterParam(uint8 *buf) * @param adapter - Lora device pointer * @return success: 0, failure: -1 */ +#ifdef ADD_NUTTX_FETURES +static int E220Open(struct Adapter *adapter) +{ + /*step1: open e220 uart port*/ + adapter->fd = PrivOpen(ADAPTER_E220_DRIVER, O_RDWR); + if (adapter->fd < 0) { + printf("E220Open get uart %s fd error\n", ADAPTER_E220_DRIVER); + return -1; + } + + PrivIoctl(adapter->fd, OPE_INT, (unsigned long)BAUD_RATE_9600); + E220SetRegisterParam(adapter, E220_ADDRESS, E220_CHANNEL, E220_UART_BAUD_RATE); + PrivIoctl(adapter->fd, OPE_INT, (unsigned long)E220_UART_BAUD_RATE); + + ADAPTER_DEBUG("E220Open done\n"); + + return 0; +} +#else static int E220Open(struct Adapter *adapter) { /*step1: open e220 uart port*/ @@ -316,6 +390,7 @@ static int E220Open(struct Adapter *adapter) return 0; } +#endif /** * @description: Close E220 uart function @@ -520,6 +595,7 @@ static void LoraRead(void *parameter) } } +#ifdef ADD_XIZI_FETURES static void LoraTest(void) { int ret; @@ -554,3 +630,40 @@ static void LoraSend(int argc, char *argv[]) } SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN), LoraSend, LoraSend, lora send message); +#endif + +#ifdef ADD_NUTTX_FETURES +void E220LoraReceive(void) +{ + int ret; + pthread_t thread; + pthread_attr_t attr = PTHREAD_ATTR_INITIALIZER; + attr.priority = 80; + attr.stacksize = 2048; + + LoraOpen(); + + ret = PrivTaskCreate(&thread, &attr, (void*)LoraRead, NULL); + if (ret < 0) { + printf("task lora read create failed, status=%d\n", ret); + return; + } +} +void E220LoraSend(int argc, char *argv[]) +{ + struct Adapter *adapter = AdapterDeviceFindByName(ADAPTER_LORA_NAME); + if (NULL == adapter) { + printf("LoraRead find lora adapter error\n"); + return; + } + + if (argc == 2) { + char Msg[256] = {0}; + strncpy(Msg, argv[1], 256); + + E220Open(adapter); + E220Send(adapter, Msg, strlen(Msg)); + E220Close(adapter); + } +} +#endif diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c index e5aa5535f..ee062f02d 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c @@ -33,11 +33,11 @@ static uint8_t ReadCH438Data(uint8_t addr); static void WriteCH438Data(uint8_t addr, uint8_t dat); static void WriteCH438Block(uint8_t mAddr, uint8_t mLen, char *mBuf); static void Ch438UartSend(uint8_t ext_uart_no, char *Data, uint16_t Num); -uint8_t CH438UARTRcv(uint8_t ext_uart_no, char* buf); +uint8_t CH438UARTRcv(uint8_t ext_uart_no, char *buf, size_t size); static void ImxrtCH438Init(void); static void CH438PortInit(uint8_t ext_uart_no, uint32_t baud_rate); static int ImxrtCh438WriteData(uint8_t ext_uart_no, char *write_buffer, size_t size); -static size_t ImxrtCh438ReadData(uint8_t ext_uart_no); +static size_t ImxrtCh438ReadData(uint8_t ext_uart_no, size_t size); static void Ch438InitDefault(void); static int ch438_open(FAR struct file *filep); @@ -52,7 +52,7 @@ static int ch438_register(FAR const char *devpath, uint8_t ext_uart_no); ****************************************************************************/ struct ch438_dev_s { - sem_t devsem; /* ch438 port devsem */ + sem_t devsem; /* ch438 port devsem */ uint8_t port; /* ch438 port number*/ }; @@ -60,6 +60,7 @@ struct ch438_dev_s * Private Data ****************************************************************************/ +/*mutex of corresponding port*/ static pthread_mutex_t mutex[CH438PORTNUM] = { PTHREAD_MUTEX_INITIALIZER, @@ -71,6 +72,8 @@ static pthread_mutex_t mutex[CH438PORTNUM] = PTHREAD_MUTEX_INITIALIZER, PTHREAD_MUTEX_INITIALIZER }; + +/* Condition variable of corresponding port */ static pthread_cond_t cond[CH438PORTNUM] = { PTHREAD_COND_INITIALIZER, @@ -83,25 +86,35 @@ static pthread_cond_t cond[CH438PORTNUM] = PTHREAD_COND_INITIALIZER }; +/* there is data available on the corresponding port */ static volatile bool done[CH438PORTNUM] = {false,false,false,false,false,false,false,false}; +/* Eight port data buffer */ static char buff[CH438PORTNUM][CH438_BUFFSIZE]; -static uint8_t buff_ptr[CH438PORTNUM]; -static uint8_t Interruptnum[CH438PORTNUM] = {0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,}; /* SSR寄存器中断号对应值 */ -static uint8_t offsetadd[CH438PORTNUM] = {0x00,0x10,0x20,0x30,0x08,0x18,0x28,0x38,}; /* 串口号的偏移地址 */ +/* the value of interrupt number of SSR register */ +static uint8_t Interruptnum[CH438PORTNUM] = {0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,}; + +/* Offset address of serial port number */ +static uint8_t offsetadd[CH438PORTNUM] = {0x00,0x10,0x20,0x30,0x08,0x18,0x28,0x38,}; + +/* Interrupt register status global variable */ static uint8_t gInterruptStatus; + +/* port open status global variable */ static volatile bool g_ch438open[CH438PORTNUM] = {false,false,false,false,false,false,false,false}; + +/* Ch438 POSIX interface */ static const struct file_operations g_ch438fops = { - ch438_open, - ch438_close, - ch438_read, - ch438_write, - NULL, - ch438_ioctl, - NULL + ch438_open, + ch438_close, + ch438_read, + ch438_write, + NULL, + ch438_ioctl, + NULL }; /**************************************************************************** @@ -182,9 +195,9 @@ static void CH438SetInput(void) static uint8_t ReadCH438Data(uint8_t addr) { uint8_t dat = 0; - imxrt_gpio_write(CH438_NWR_PIN, true); - imxrt_gpio_write(CH438_NRD_PIN, true); - imxrt_gpio_write(CH438_ALE_PIN, true); + imxrt_gpio_write(CH438_NWR_PIN, true); + imxrt_gpio_write(CH438_NRD_PIN, true); + imxrt_gpio_write(CH438_ALE_PIN, true); CH438SetOutput(); up_udelay(1); @@ -234,9 +247,9 @@ static uint8_t ReadCH438Data(uint8_t addr) ****************************************************************************/ static void WriteCH438Data(uint8_t addr, uint8_t dat) { - imxrt_gpio_write(CH438_ALE_PIN, true); - imxrt_gpio_write(CH438_NRD_PIN, true); - imxrt_gpio_write(CH438_NWR_PIN, true); + imxrt_gpio_write(CH438_ALE_PIN, true); + imxrt_gpio_write(CH438_NRD_PIN, true); + imxrt_gpio_write(CH438_NWR_PIN, true); CH438SetOutput(); up_udelay(1); @@ -285,10 +298,10 @@ static void WriteCH438Data(uint8_t addr, uint8_t dat) * Write data block from ch438 address * ****************************************************************************/ -static void WriteCH438Block(uint8_t mAddr, uint8_t mLen, char *mBuf) +static void WriteCH438Block(uint8_t mAddr, uint8_t mLen, char *mBuf) { - while(mLen--) - WriteCH438Data(mAddr, *mBuf++); + while(mLen--) + WriteCH438Data(mAddr, *mBuf++); } /**************************************************************************** @@ -307,7 +320,7 @@ static void Ch438UartSend(uint8_t ext_uart_no, char *Data, uint16_t Num) while(1) { - while((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_TEMT) == 0); /* 等待数据发送完毕，THR,TSR全空 */ + while((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_TEMT) == 0); /* wait for sending data done, THR and TSR is NULL */ if(Num <= 128) { WriteCH438Block(REG_THR_ADDR, Num, Data); @@ -329,28 +342,38 @@ static void Ch438UartSend(uint8_t ext_uart_no, char *Data, uint16_t Num) * Disable FIFO mode for ch438 serial port to receive multi byte data * ****************************************************************************/ -uint8_t CH438UARTRcv(uint8_t ext_uart_no, char* buf) +uint8_t CH438UARTRcv(uint8_t ext_uart_no, char *buf, size_t size) { - uint8_t RcvNum = 0; + uint8_t rcv_num = 0; uint8_t dat = 0; uint8_t REG_LSR_ADDR,REG_RBR_ADDR; - + char *read_buffer; + size_t buffer_index = 0; + + read_buffer = buf; + REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR; REG_RBR_ADDR = offsetadd[ext_uart_no] | REG_RBR0_ADDR; - /* Wait for the data to be ready */ - while((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_DATARDY) == 0 ); - while((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_DATARDY) == 0x01) + /* Wait for the data to be ready */ + while ((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_DATARDY) == 0); + + while (((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_DATARDY) == 0x01) && (size != 0)) { - dat = ReadCH438Data(REG_RBR_ADDR); - buff[ext_uart_no][buff_ptr[ext_uart_no]] = dat; - - buff_ptr[ext_uart_no] = buff_ptr[ext_uart_no] + 1; - if(buff_ptr[ext_uart_no] == 256) - buff_ptr[ext_uart_no] = 0; - RcvNum = RcvNum + 1; + dat = ReadCH438Data(REG_RBR_ADDR); + *read_buffer = dat; + read_buffer++; + buffer_index++; + if (255 == buffer_index) { + buffer_index = 0; + read_buffer = buf; + } + + ++rcv_num; + --size; } - return RcvNum; + + return rcv_num; } /**************************************************************************** @@ -477,7 +500,7 @@ static int ImxrtCh438WriteData(uint8_t ext_uart_no, char *write_buffer, size_t s Ch438UartSend(ext_uart_no, write_buffer, write_len); } - return 0; + return OK; } /**************************************************************************** @@ -487,7 +510,7 @@ static int ImxrtCh438WriteData(uint8_t ext_uart_no, char *write_buffer, size_t s * Read data from ch438 port * ****************************************************************************/ -static size_t ImxrtCh438ReadData(uint8_t ext_uart_no) +static size_t ImxrtCh438ReadData(uint8_t ext_uart_no, size_t size) { size_t RevLen = 0; uint8_t InterruptStatus; @@ -503,33 +526,30 @@ static size_t ImxrtCh438ReadData(uint8_t ext_uart_no) REG_IIR_ADDR = offsetadd[ext_uart_no] | REG_IIR0_ADDR; REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR; REG_MSR_ADDR = offsetadd[ext_uart_no] | REG_MSR0_ADDR; - InterruptStatus = ReadCH438Data(REG_IIR_ADDR) & 0x0f; /* 读串口的中断状态 */ + /* Read the interrupt status of the serial port */ + InterruptStatus = ReadCH438Data(REG_IIR_ADDR) & 0x0f; ch438info("InterruptStatus is %d\n", InterruptStatus); switch(InterruptStatus) { - case INT_NOINT: /* 没有中断 */ + case INT_NOINT: /* no interrupt */ break; - case INT_THR_EMPTY: /* THR空中断 */ + case INT_THR_EMPTY: /* the transmit hold register is not interrupted */ break; - case INT_RCV_OVERTIME: /* 接收超时中断，收到数据后一般是触发这个 。在收到一帧数据后4个数据时间没有后续的数据时触发*/ - case INT_RCV_SUCCESS: /* 接收数据可用中断。这是一个数据帧超过缓存了才发生，否则一般是前面的超时中断。处理过程同上面的超时中断 */ - RevLen = CH438UARTRcv(ext_uart_no, buff[ext_uart_no]); - buff_ptr[ext_uart_no] = 0; + case INT_RCV_OVERTIME: /* receive data timeout interrupt */ + case INT_RCV_SUCCESS: /* receive data available interrupt */ + RevLen = CH438UARTRcv(ext_uart_no, buff[ext_uart_no], size); break; - - case INT_RCV_LINES: /* 接收线路状态中断 */ + case INT_RCV_LINES: /* receive line status interrupt */ ReadCH438Data(REG_LSR_ADDR); break; - case INT_MODEM_CHANGE: /* MODEM输入变化中断 */ + case INT_MODEM_CHANGE: /* modem input change interrupt */ ReadCH438Data(REG_MSR_ADDR); break; default: break; } - done[ext_uart_no] = false; - } pthread_mutex_unlock(&mutex[ext_uart_no]); @@ -663,7 +683,7 @@ static ssize_t ch438_read(FAR struct file *filep, FAR char *buffer, size_t bufle DEBUGASSERT(port >= 0 && port < CH438PORTNUM); - length = ImxrtCh438ReadData(port); + length = ImxrtCh438ReadData(port, buflen); memcpy(buffer, buff[port], length); if(length > buflen) From 52aa3c5abde3ab68518c3beaaff56ade4ad1e72e Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Wed, 11 May 2022 18:14:41 +0800 Subject: [PATCH 27/46] use work_queue instead of pthread_create on ch438 to get Interrupt status --- .../aiit_board/xidatong/src/imxrt_ch438.c | 44 ++++++++----------- .../aiit_board/xidatong/src/imxrt_ch438.h | 3 ++ 2 files changed, 21 insertions(+), 26 deletions(-) diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c index ee062f02d..fa1d573f9 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c @@ -20,8 +20,9 @@ #include "imxrt_ch438.h" -#define CH438PORTNUM 8 -#define CH438_BUFFSIZE 256 +#define CH438PORTNUM 8 +#define CH438_BUFFSIZE 256 +#define CH438_INCREMENT MSEC2TICK(33) /**************************************************************************** * Private Function Prototypes @@ -86,6 +87,9 @@ static pthread_cond_t cond[CH438PORTNUM] = PTHREAD_COND_INITIALIZER }; +/* ch438 Callback work queue structure */ +static struct work_s g_ch438irqwork; + /* there is data available on the corresponding port */ static volatile bool done[CH438PORTNUM] = {false,false,false,false,false,false,false,false}; @@ -98,10 +102,6 @@ static uint8_t Interruptnum[CH438PORTNUM] = {0x01,0x02,0x04,0x08,0x10,0x20,0x40, /* Offset address of serial port number */ static uint8_t offsetadd[CH438PORTNUM] = {0x00,0x10,0x20,0x30,0x08,0x18,0x28,0x38,}; -/* Interrupt register status global variable */ -static uint8_t gInterruptStatus; - - /* port open status global variable */ static volatile bool g_ch438open[CH438PORTNUM] = {false,false,false,false,false,false,false,false}; @@ -127,13 +127,12 @@ static const struct file_operations g_ch438fops = static FAR void getInterruptStatus(FAR void *arg) { uint8_t i; - while(1) + uint8_t gInterruptStatus; /* Interrupt register status */ + + gInterruptStatus = ReadCH438Data(REG_SSR_ADDR); + + if(gInterruptStatus) { - gInterruptStatus = ReadCH438Data(REG_SSR_ADDR); - if(!gInterruptStatus) - { - continue; - } for(i = 0; i < CH438PORTNUM; i++) { if(gInterruptStatus & Interruptnum[i]) @@ -145,6 +144,8 @@ static FAR void getInterruptStatus(FAR void *arg) } } } + + work_queue(HPWORK, &g_ch438irqwork, getInterruptStatus, NULL, CH438_INCREMENT); } /**************************************************************************** @@ -567,9 +568,6 @@ static void Ch438InitDefault(void) { int ret = 0; int i; - struct sched_param param; - pthread_attr_t attr; - pthread_t thread; /* Initialize the mutex */ for(i = 0; i < CH438PORTNUM; i++) @@ -590,17 +588,7 @@ static void Ch438InitDefault(void) ch438err("pthread_cond_init failed, status=%d\n", ret); } } - - pthread_attr_init(&attr); - param.sched_priority = 60; - pthread_attr_setschedparam(&attr, ¶m); - pthread_attr_setstacksize(&attr, 2048); - ret = pthread_create(&thread, &attr, (void*)getInterruptStatus, NULL); - if(ret < 0) - { - ch438err("task create failed, status=%d\n", ret); - } - + ImxrtCH438Init(); CH438PortInit(0,115200); CH438PortInit(1,115200); @@ -610,6 +598,10 @@ static void Ch438InitDefault(void) CH438PortInit(5,115200); CH438PortInit(6,115200); CH438PortInit(7,115200); + + up_mdelay(10); + + work_queue(HPWORK, &g_ch438irqwork, getInterruptStatus, NULL, CH438_INCREMENT); } /**************************************************************************** diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h index 42c5919fa..92ffaa459 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h @@ -30,6 +30,9 @@ #include #include #include +#include +#include +#include #include #include #include From 00e0a48ee7bf76a352933a264b732b3d8c851381 Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Thu, 12 May 2022 11:00:55 +0800 Subject: [PATCH 28/46] add g_uart_selected array for ch438 --- .../aiit_board/xidatong/src/ch438_demo.c | 3 - .../aiit_board/xidatong/src/imxrt_ch438.c | 125 ++++++++++++------ 2 files changed, 82 insertions(+), 46 deletions(-) diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c index a5f02baf6..c64f2d61c 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c @@ -36,8 +36,6 @@ void CH438Demo(void) char buffer[256]; int readlen; - // while(1) - // { fd = open("/dev/extuart_dev3", O_RDWR); m0fd = open("/dev/gpout0", O_RDWR); m1fd = open("/dev/gpout1", O_RDWR); @@ -82,6 +80,5 @@ void CH438Demo(void) } close(fd); - // } } diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c index fa1d573f9..f63652848 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c @@ -53,8 +53,8 @@ static int ch438_register(FAR const char *devpath, uint8_t ext_uart_no); ****************************************************************************/ struct ch438_dev_s { - sem_t devsem; /* ch438 port devsem */ - uint8_t port; /* ch438 port number*/ + sem_t devsem; /* ch438 port devsem */ + uint8_t port; /* ch438 port number*/ }; /**************************************************************************** @@ -64,27 +64,56 @@ struct ch438_dev_s /*mutex of corresponding port*/ static pthread_mutex_t mutex[CH438PORTNUM] = { - PTHREAD_MUTEX_INITIALIZER, - PTHREAD_MUTEX_INITIALIZER, - PTHREAD_MUTEX_INITIALIZER, - PTHREAD_MUTEX_INITIALIZER, - PTHREAD_MUTEX_INITIALIZER, - PTHREAD_MUTEX_INITIALIZER, - PTHREAD_MUTEX_INITIALIZER, - PTHREAD_MUTEX_INITIALIZER + PTHREAD_MUTEX_INITIALIZER, + PTHREAD_MUTEX_INITIALIZER, + PTHREAD_MUTEX_INITIALIZER, + PTHREAD_MUTEX_INITIALIZER, + PTHREAD_MUTEX_INITIALIZER, + PTHREAD_MUTEX_INITIALIZER, + PTHREAD_MUTEX_INITIALIZER, + PTHREAD_MUTEX_INITIALIZER }; /* Condition variable of corresponding port */ static pthread_cond_t cond[CH438PORTNUM] = { - PTHREAD_COND_INITIALIZER, - PTHREAD_COND_INITIALIZER, - PTHREAD_COND_INITIALIZER, - PTHREAD_COND_INITIALIZER, - PTHREAD_COND_INITIALIZER, - PTHREAD_COND_INITIALIZER, - PTHREAD_COND_INITIALIZER, - PTHREAD_COND_INITIALIZER + PTHREAD_COND_INITIALIZER, + PTHREAD_COND_INITIALIZER, + PTHREAD_COND_INITIALIZER, + PTHREAD_COND_INITIALIZER, + PTHREAD_COND_INITIALIZER, + PTHREAD_COND_INITIALIZER, + PTHREAD_COND_INITIALIZER, + PTHREAD_COND_INITIALIZER +}; + +/* This array shows whether the current serial port is selected */ +static bool const g_uart_selected[CH438PORTNUM] = +{ +#ifdef CONFIG_CH438_EXTUART0 + [0] = true, +#endif +#ifdef CONFIG_CH438_EXTUART1 + [1] = true, +#endif +#ifdef CONFIG_CH438_EXTUART2 + [2] = true, +#endif +#ifdef CONFIG_CH438_EXTUART3 + [3] = true, +#endif +#ifdef CONFIG_CH438_EXTUART4 + [4] = true, +#endif +#ifdef CONFIG_CH438_EXTUART5 + [5] = true, +#endif +#ifdef CONFIG_CH438_EXTUART6 + [6] = true, +#endif +#ifdef CONFIG_CH438_EXTUART7 + [7] = true, +#endif }; /* ch438 Callback work queue structure */ @@ -108,13 +137,13 @@ static volatile bool g_ch438open[CH438PORTNUM] = {false,false,false,false,false, /* Ch438 POSIX interface */ static const struct file_operations g_ch438fops = { - ch438_open, - ch438_close, - ch438_read, - ch438_write, - NULL, - ch438_ioctl, - NULL + ch438_open, + ch438_close, + ch438_read, + ch438_write, + NULL, + ch438_ioctl, + NULL }; /**************************************************************************** @@ -135,7 +164,7 @@ static FAR void getInterruptStatus(FAR void *arg) { for(i = 0; i < CH438PORTNUM; i++) { - if(gInterruptStatus & Interruptnum[i]) + if(g_uart_selected[i] && (gInterruptStatus & Interruptnum[i])) { pthread_mutex_lock(&mutex[i]); done[i] = true; @@ -183,7 +212,7 @@ static void CH438SetInput(void) imxrt_config_gpio(CH438_D4_PIN_INPUT); imxrt_config_gpio(CH438_D5_PIN_INPUT); imxrt_config_gpio(CH438_D6_PIN_INPUT); - imxrt_config_gpio(CH438_D7_PIN_INPUT); + imxrt_config_gpio(CH438_D7_PIN_INPUT); } /**************************************************************************** @@ -214,13 +243,13 @@ static uint8_t ReadCH438Data(uint8_t addr) up_udelay(1); - imxrt_gpio_write(CH438_ALE_PIN, false); + imxrt_gpio_write(CH438_ALE_PIN, false); up_udelay(1); CH438SetInput(); up_udelay(1); - imxrt_gpio_write(CH438_NRD_PIN, false); + imxrt_gpio_write(CH438_NRD_PIN, false); up_udelay(1); if (imxrt_gpio_read(CH438_D7_PIN_INPUT)) dat |= 0x80; @@ -232,8 +261,8 @@ static uint8_t ReadCH438Data(uint8_t addr) if (imxrt_gpio_read(CH438_D1_PIN_INPUT)) dat |= 0x02; if (imxrt_gpio_read(CH438_D0_PIN_INPUT)) dat |= 0x01; - imxrt_gpio_write(CH438_NRD_PIN, true); - imxrt_gpio_write(CH438_ALE_PIN, true); + imxrt_gpio_write(CH438_NRD_PIN, true); + imxrt_gpio_write(CH438_ALE_PIN, true); up_udelay(1); return dat; @@ -263,12 +292,12 @@ static void WriteCH438Data(uint8_t addr, uint8_t dat) if(addr &0x04) imxrt_gpio_write(CH438_D2_PIN_OUT, true); else imxrt_gpio_write(CH438_D2_PIN_OUT, false); if(addr &0x02) imxrt_gpio_write(CH438_D1_PIN_OUT, true); else imxrt_gpio_write(CH438_D1_PIN_OUT, false); if(addr &0x01) imxrt_gpio_write(CH438_D0_PIN_OUT, true); else imxrt_gpio_write(CH438_D0_PIN_OUT, false); - + up_udelay(1); imxrt_gpio_write(CH438_ALE_PIN, false); up_udelay(1); - + if(dat &0x80) imxrt_gpio_write(CH438_D7_PIN_OUT, true); else imxrt_gpio_write(CH438_D7_PIN_OUT, false); if(dat &0x40) imxrt_gpio_write(CH438_D6_PIN_OUT, true); else imxrt_gpio_write(CH438_D6_PIN_OUT, false); if(dat &0x20) imxrt_gpio_write(CH438_D5_PIN_OUT, true); else imxrt_gpio_write(CH438_D5_PIN_OUT, false); @@ -394,7 +423,7 @@ static void ImxrtCH438Init(void) imxrt_gpio_write(CH438_NWR_PIN,true); imxrt_gpio_write(CH438_NRD_PIN,true); imxrt_gpio_write(CH438_ALE_PIN,true); -} +} /**************************************************************************** * Name: CH438PortInit @@ -413,18 +442,18 @@ static void CH438PortInit(uint8_t ext_uart_no, uint32_t baud_rate) uint8_t REG_IER_ADDR; uint8_t REG_MCR_ADDR; uint8_t REG_FCR_ADDR; - + REG_LCR_ADDR = offsetadd[ext_uart_no] | REG_LCR0_ADDR; REG_DLL_ADDR = offsetadd[ext_uart_no] | REG_DLL0_ADDR; REG_DLM_ADDR = offsetadd[ext_uart_no] | REG_DLM0_ADDR; REG_IER_ADDR = offsetadd[ext_uart_no] | REG_IER0_ADDR; REG_MCR_ADDR = offsetadd[ext_uart_no] | REG_MCR0_ADDR; REG_FCR_ADDR = offsetadd[ext_uart_no] | REG_FCR0_ADDR; - + /* reset the uart */ WriteCH438Data(REG_IER_ADDR, BIT_IER_RESET); up_mdelay(50); - + dlab = ReadCH438Data(REG_IER_ADDR); dlab &= 0xDF; WriteCH438Data(REG_IER_ADDR, dlab); @@ -455,7 +484,7 @@ static void CH438PortInit(uint8_t ext_uart_no, uint32_t baud_rate) WriteCH438Data(REG_MCR_ADDR, BIT_MCR_OUT2); /* release the data in FIFO */ - WriteCH438Data(REG_FCR_ADDR, ReadCH438Data(REG_FCR_ADDR)| BIT_FCR_TFIFORST); + WriteCH438Data(REG_FCR_ADDR, ReadCH438Data(REG_FCR_ADDR)| BIT_FCR_TFIFORST); } /**************************************************************************** @@ -483,8 +512,8 @@ static int ImxrtCh438WriteData(uint8_t ext_uart_no, char *write_buffer, size_t s { Ch438UartSend(ext_uart_no, write_buffer + i * 256, 256); } - } - else + } + else { write_index = 0; while(write_len_continue > 256) @@ -496,7 +525,7 @@ static int ImxrtCh438WriteData(uint8_t ext_uart_no, char *write_buffer, size_t s Ch438UartSend(ext_uart_no, write_buffer + write_index * 256, write_len_continue); } } - else + else { Ch438UartSend(ext_uart_no, write_buffer, write_len); } @@ -530,7 +559,7 @@ static size_t ImxrtCh438ReadData(uint8_t ext_uart_no, size_t size) /* Read the interrupt status of the serial port */ InterruptStatus = ReadCH438Data(REG_IIR_ADDR) & 0x0f; ch438info("InterruptStatus is %d\n", InterruptStatus); - + switch(InterruptStatus) { case INT_NOINT: /* no interrupt */ @@ -572,6 +601,11 @@ static void Ch438InitDefault(void) /* Initialize the mutex */ for(i = 0; i < CH438PORTNUM; i++) { + if(!g_uart_selected[i]) + { + continue; + } + ret = pthread_mutex_init(&mutex[i], NULL); if(ret != 0) { @@ -582,13 +616,18 @@ static void Ch438InitDefault(void) /* Initialize the condition variable */ for(i = 0; i < CH438PORTNUM; i++) { + if(!g_uart_selected[i]) + { + continue; + } + ret = pthread_cond_init(&cond[i], NULL); if(ret != 0) { ch438err("pthread_cond_init failed, status=%d\n", ret); } } - + ImxrtCH438Init(); CH438PortInit(0,115200); CH438PortInit(1,115200); From b6407cb68bbdd5c89a8a6bb583e1d200c1831279 Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Thu, 12 May 2022 13:39:27 +0800 Subject: [PATCH 29/46] add CH438_EXTUART_BAUD to menuconfig --- .../aiit_board/xidatong/Kconfig | 184 +++++++++++++----- .../aiit_board/xidatong/src/ch438_demo.c | 1 + .../aiit_board/xidatong/src/imxrt_ch438.c | 40 +++- 3 files changed, 165 insertions(+), 60 deletions(-) diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/Kconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/Kconfig index 44d81f49f..e729e70d3 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/Kconfig +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/Kconfig @@ -6,80 +6,80 @@ if ARCH_BOARD_XIDATONG choice - prompt "Boot Flash" - default XIDATONG_QSPI_FLASH + prompt "Boot Flash" + default XIDATONG_QSPI_FLASH config XIDATONG_HYPER_FLASH - bool "HYPER Flash" + bool "HYPER Flash" config XIDATONG_QSPI_FLASH - bool "QSPI Flash" + bool "QSPI Flash" endchoice # Boot Flash config XIDATONG_SDRAM - bool "Enable SDRAM" - default y - select IMXRT_SEMC_INIT_DONE - ---help--- - Activate DCD configuration of SDRAM + bool "Enable SDRAM" + default y + select IMXRT_SEMC_INIT_DONE + ---help--- + Activate DCD configuration of SDRAM config XIDATONG_SDIO_AUTOMOUNT - bool "SD card automounter" - default n - depends on FS_AUTOMOUNTER && IMXRT_USDHC + bool "SD card automounter" + default n + depends on FS_AUTOMOUNTER && IMXRT_USDHC if XIDATONG_SDIO_AUTOMOUNT config XIDATONG_SDIO_AUTOMOUNT_FSTYPE - string "SD card file system type" - default "vfat" + string "SD card file system type" + default "vfat" config XIDATONG_SDIO_AUTOMOUNT_BLKDEV - string "SD card block device" - default "/dev/mmcsd0" + string "SD card block device" + default "/dev/mmcsd0" config XIDATONG_SDIO_AUTOMOUNT_MOUNTPOINT - string "SD card mount point" - default "/mnt/sdcard" + string "SD card mount point" + default "/mnt/sdcard" config XIDATONG_SDIO_AUTOMOUNT_DDELAY - int "SD card debounce delay (milliseconds)" - default 1000 + int "SD card debounce delay (milliseconds)" + default 1000 config XIDATONG_SDIO_AUTOMOUNT_UDELAY - int "SD card unmount retry delay (milliseconds)" - default 2000 + int "SD card unmount retry delay (milliseconds)" + default 2000 endif # XIDATONG_SDIO_AUTOMOUNT config XIDATONG_USB_AUTOMOUNT - bool "USB Mass Storage automounter" - default n - depends on USBHOST_MSC && USBHOST_MSC_NOTIFIER + bool "USB Mass Storage automounter" + default n + depends on USBHOST_MSC && USBHOST_MSC_NOTIFIER if XIDATONG_USB_AUTOMOUNT config XIDATONG_USB_AUTOMOUNT_FSTYPE - string "USB file system type" - default "vfat" + string "USB file system type" + default "vfat" config XIDATONG_USB_AUTOMOUNT_BLKDEV - string "USB block device prefix" - default "/dev/sd" + string "USB block device prefix" + default "/dev/sd" config XIDATONG_USB_AUTOMOUNT_MOUNTPOINT - string "USB mount point prefix" - default "/mnt/usb" + string "USB mount point prefix" + default "/mnt/usb" config XIDATONG_USB_AUTOMOUNT_NUM_BLKDEV - int "Number of block devices to monitor." - range 1 26 - default 4 + int "Number of block devices to monitor." + range 1 26 + default 4 config XIDATONG_USB_AUTOMOUNT_UDELAY - int "USB unmount retry delay (milliseconds)" - default 2000 + int "USB unmount retry delay (milliseconds)" + default 2000 endif # XIDATONG_USB_AUTOMOUNT @@ -89,36 +89,116 @@ menuconfig BSP_USING_CH438 if BSP_USING_CH438 config CH438_EXTUART0 - bool "using ch438 port 0" - default n + bool "Using Ch438 Port 0" + default n + +menu "Ch438 Port 0 Configuration" + depends on CH438_EXTUART0 + + config CH438_EXTUART0_BAUD + int "Ch438 Port 0 Baud Rate." + default 115200 + ---help--- + The configured BAUD of the CH438 EXTUART0. +endmenu config CH438_EXTUART1 - bool "using ch438 port 1" - default n + bool "Using Ch438 Port 1" + default n + +menu "Ch438 Port 1 Configuration" + depends on CH438_EXTUART1 + + config CH438_EXTUART1_BAUD + int "Ch438 Port 1 Baud Rate." + default 115200 + ---help--- + The configured BAUD of the CH438 EXTUART1. +endmenu config CH438_EXTUART2 - bool "using ch438 port 2" - default n + bool "Using Ch438 Port 2" + default n + +menu "Ch438 Port 2 Configuration" + depends on CH438_EXTUART2 + + config CH438_EXTUART2_BAUD + int "Ch438 Port 2 Baud Rate." + default 115200 + ---help--- + The configured BAUD of the CH438 EXTUART2. +endmenu config CH438_EXTUART3 - bool "using ch438 port 3" - default n + bool "Using Ch438 Port 3" + default n + +menu "Ch438 Port 3 Configuration" + depends on CH438_EXTUART3 + + config CH438_EXTUART3_BAUD + int "Ch438 Port 3 Baud Rate." + default 115200 + ---help--- + The configured BAUD of the CH438 EXTUART3. +endmenu config CH438_EXTUART4 - bool "using ch438 port 4" - default n + bool "Using Ch438 Port 4" + default n + +menu "Ch438 Port 4 Configuration" + depends on CH438_EXTUART4 + + config CH438_EXTUART4_BAUD + int "Ch438 Port 4 Baud Rate." + default 115200 + ---help--- + The configured BAUD of the CH438 EXTUART4. +endmenu config CH438_EXTUART5 - bool "using ch438 port 5" - default n + bool "Using Ch438 Port 5" + default n + +menu "Ch438 Port 5 Configuration" + depends on CH438_EXTUART5 + + config CH438_EXTUART5_BAUD + int "Ch438 Port 5 Baud Rate." + default 115200 + ---help--- + The configured BAUD of the CH438 EXTUART5. +endmenu config CH438_EXTUART6 - bool "using ch438 port 6" - default n + bool "Using Ch438 Port 6" + default n + +menu "Ch438 Port 6 Configuration" + depends on CH438_EXTUART6 + + config CH438_EXTUART6_BAUD + int "Ch438 Port 6 Baud Rate." + default 115200 + ---help--- + The configured BAUD of the CH438 EXTUART6. +endmenu config CH438_EXTUART7 - bool "using ch438 port 7" - default n + bool "Using Ch438 Port 7" + default n + +menu "Ch438 Port 7 Configuration" + depends on CH438_EXTUART7 + + config CH438_EXTUART7_BAUD + int "Ch438 Port 7 Baud Rate." + default 115200 + ---help--- + The configured BAUD of the CH438 EXTUART7. +endmenu endif # BSP_USING_CH438 diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c index c64f2d61c..c3b574e18 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c @@ -37,6 +37,7 @@ void CH438Demo(void) int readlen; fd = open("/dev/extuart_dev3", O_RDWR); + ioctl(fd, OPE_INT, (unsigned long)9600); m0fd = open("/dev/gpout0", O_RDWR); m1fd = open("/dev/gpout1", O_RDWR); ioctl(m0fd, GPIOC_WRITE, (unsigned long)1); diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c index f63652848..3fa376a0a 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c @@ -629,14 +629,38 @@ static void Ch438InitDefault(void) } ImxrtCH438Init(); - CH438PortInit(0,115200); - CH438PortInit(1,115200); - CH438PortInit(2,9600); - CH438PortInit(3,9600); - CH438PortInit(4,115200); - CH438PortInit(5,115200); - CH438PortInit(6,115200); - CH438PortInit(7,115200); + +#ifdef CONFIG_CH438_EXTUART0 + CH438PortInit(0, CONFIG_CH438_EXTUART0_BAUD); +#endif + +#ifdef CONFIG_CH438_EXTUART1 + CH438PortInit(1, CONFIG_CH438_EXTUART1_BAUD); +#endif + +#ifdef CONFIG_CH438_EXTUART2 + CH438PortInit(2, CONFIG_CH438_EXTUART2_BAUD); +#endif + +#ifdef CONFIG_CH438_EXTUART3 + CH438PortInit(3, CONFIG_CH438_EXTUART3_BAUD); +#endif + +#ifdef CONFIG_CH438_EXTUART4 + CH438PortInit(4, CONFIG_CH438_EXTUART4_BAUD); +#endif + +#ifdef CONFIG_CH438_EXTUART5 + CH438PortInit(5, CONFIG_CH438_EXTUART5_BAUD); +#endif + +#ifdef CONFIG_CH438_EXTUART6 + CH438PortInit(6, CONFIG_CH438_EXTUART6_BAUD); +#endif + +#ifdef CONFIG_CH438_EXTUART7 + CH438PortInit(7, CONFIG_CH438_EXTUART7_BAUD); +#endif up_mdelay(10); From 1334d0e4b2210e23b725ea5b8f374f64967f5727 Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Thu, 12 May 2022 16:01:05 +0800 Subject: [PATCH 30/46] Change the Chinese Notes to English notes in imxrt_ch438.h --- .../aiit_board/xidatong/src/imxrt_ch438.h | 441 +++++++++--------- 1 file changed, 220 insertions(+), 221 deletions(-) diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h index 92ffaa459..866bdde0a 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h @@ -64,283 +64,281 @@ /******************************************************************************************/ -/* 芯片定义 */ -/* CH438串口0寄存器地址 */ +/* chip definition */ +/* CH438serial port0 register address */ -#define REG_RBR0_ADDR 0x00 /* 串口0接收缓冲寄存器地址 */ -#define REG_THR0_ADDR 0x00 /* 串口0发送保持寄存器地址 */ -#define REG_IER0_ADDR 0x01 /* 串口0中断使能寄存器地址 */ -#define REG_IIR0_ADDR 0x02 /* 串口0中断识别寄存器地址 */ -#define REG_FCR0_ADDR 0x02 /* 串口0FIFO控制寄存器地址 */ -#define REG_LCR0_ADDR 0x03 /* 串口0线路控制寄存器地址 */ -#define REG_MCR0_ADDR 0x04 /* 串口0MODEM控制寄存器地址 */ -#define REG_LSR0_ADDR 0x05 /* 串口0线路状态寄存器地址 */ -#define REG_MSR0_ADDR 0x06 /* 串口0MODEM状态寄存器地址 */ -#define REG_SCR0_ADDR 0x07 /* 串口0用户可定义寄存器地址 */ -#define REG_DLL0_ADDR 0x00 /* 波特率除数锁存器低8位字节地址 */ -#define REG_DLM0_ADDR 0x01 /* 波特率除数锁存器高8位字节地址 */ - -/* CH438串口1寄存器地址 */ - -#define REG_RBR1_ADDR 0x10 /* 串口1接收缓冲寄存器地址 */ -#define REG_THR1_ADDR 0x10 /* 串口1发送保持寄存器地址 */ -#define REG_IER1_ADDR 0x11 /* 串口1中断使能寄存器地址 */ -#define REG_IIR1_ADDR 0x12 /* 串口1中断识别寄存器地址 */ -#define REG_FCR1_ADDR 0x12 /* 串口1FIFO控制寄存器地址 */ -#define REG_LCR1_ADDR 0x13 /* 串口1线路控制寄存器地址 */ -#define REG_MCR1_ADDR 0x14 /* 串口1MODEM控制寄存器地址 */ -#define REG_LSR1_ADDR 0x15 /* 串口1线路状态寄存器地址 */ -#define REG_MSR1_ADDR 0x16 /* 串口1MODEM状态寄存器地址 */ -#define REG_SCR1_ADDR 0x17 /* 串口1用户可定义寄存器地址 */ -#define REG_DLL1_ADDR 0x10 /* 波特率除数锁存器低8位字节地址 */ -#define REG_DLM1_ADDR 0x11 /* 波特率除数锁存器高8位字节地址 */ +#define REG_RBR0_ADDR 0x00 /* serial port0receive buffer register address */ +#define REG_THR0_ADDR 0x00 /* serial port0send hold register address */ +#define REG_IER0_ADDR 0x01 /* serial port0interrupt enable register address */ +#define REG_IIR0_ADDR 0x02 /* serial port0interrupt identifies register address */ +#define REG_FCR0_ADDR 0x02 /* serial port0FIFO controls register address */ +#define REG_LCR0_ADDR 0x03 /* serial port0circuit control register address */ +#define REG_MCR0_ADDR 0x04 /* serial port0MODEM controls register address */ +#define REG_LSR0_ADDR 0x05 /* serial port0line status register address */ +#define REG_MSR0_ADDR 0x06 /* serial port0address of MODEM status register */ +#define REG_SCR0_ADDR 0x07 /* serial port0the user can define the register address */ +#define REG_DLL0_ADDR 0x00 /* Baud rate divisor latch low 8-bit byte address */ +#define REG_DLM0_ADDR 0x01 /* Baud rate divisor latch high 8-bit byte address */ -/* CH438串口2寄存器地址 */ +/* CH438serial port1 register address */ -#define REG_RBR2_ADDR 0x20 /* 串口2接收缓冲寄存器地址 */ -#define REG_THR2_ADDR 0x20 /* 串口2发送保持寄存器地址 */ -#define REG_IER2_ADDR 0x21 /* 串口2中断使能寄存器地址 */ -#define REG_IIR2_ADDR 0x22 /* 串口2中断识别寄存器地址 */ -#define REG_FCR2_ADDR 0x22 /* 串口2FIFO控制寄存器地址 */ -#define REG_LCR2_ADDR 0x23 /* 串口2线路控制寄存器地址 */ -#define REG_MCR2_ADDR 0x24 /* 串口2MODEM控制寄存器地址 */ -#define REG_LSR2_ADDR 0x25 /* 串口2线路状态寄存器地址 */ -#define REG_MSR2_ADDR 0x26 /* 串口2MODEM状态寄存器地址 */ -#define REG_SCR2_ADDR 0x27 /* 串口2用户可定义寄存器地址 */ -#define REG_DLL2_ADDR 0x20 /* 波特率除数锁存器低8位字节地址 */ -#define REG_DLM2_ADDR 0x21 /* 波特率除数锁存器高8位字节地址 */ +#define REG_RBR1_ADDR 0x10 /* serial port1receive buffer register address */ +#define REG_THR1_ADDR 0x10 /* serial port1send hold register address */ +#define REG_IER1_ADDR 0x11 /* serial port1interrupt enable register address */ +#define REG_IIR1_ADDR 0x12 /* serial port1interrupt identifies register address */ +#define REG_FCR1_ADDR 0x12 /* serial port1FIFO controls register address */ +#define REG_LCR1_ADDR 0x13 /* serial port1circuit control register address */ +#define REG_MCR1_ADDR 0x14 /* serial port1MODEM controls register address */ +#define REG_LSR1_ADDR 0x15 /* serial port1line status register address */ +#define REG_MSR1_ADDR 0x16 /* serial port1address of MODEM status register */ +#define REG_SCR1_ADDR 0x17 /* serial port1the user can define the register address */ +#define REG_DLL1_ADDR 0x10 /* Baud rate divisor latch low 8-bit byte address */ +#define REG_DLM1_ADDR 0x11 /* Baud rate divisor latch high 8-bit byte address */ +/* CH438serial port2 register address */ -/* CH438串口3寄存器地址 */ - -#define REG_RBR3_ADDR 0x30 /* 串口3接收缓冲寄存器地址 */ -#define REG_THR3_ADDR 0x30 /* 串口3发送保持寄存器地址 */ -#define REG_IER3_ADDR 0x31 /* 串口3中断使能寄存器地址 */ -#define REG_IIR3_ADDR 0x32 /* 串口3中断识别寄存器地址 */ -#define REG_FCR3_ADDR 0x32 /* 串口3FIFO控制寄存器地址 */ -#define REG_LCR3_ADDR 0x33 /* 串口3线路控制寄存器地址 */ -#define REG_MCR3_ADDR 0x34 /* 串口3MODEM控制寄存器地址 */ -#define REG_LSR3_ADDR 0x35 /* 串口3线路状态寄存器地址 */ -#define REG_MSR3_ADDR 0x36 /* 串口3MODEM状态寄存器地址 */ -#define REG_SCR3_ADDR 0x37 /* 串口3用户可定义寄存器地址 */ -#define REG_DLL3_ADDR 0x30 /* 波特率除数锁存器低8位字节地址 */ -#define REG_DLM3_ADDR 0x31 /* 波特率除数锁存器高8位字节地址 */ +#define REG_RBR2_ADDR 0x20 /* serial port2receive buffer register address */ +#define REG_THR2_ADDR 0x20 /* serial port2send hold register address */ +#define REG_IER2_ADDR 0x21 /* serial port2interrupt enable register address */ +#define REG_IIR2_ADDR 0x22 /* serial port2interrupt identifies register address */ +#define REG_FCR2_ADDR 0x22 /* serial port2FIFO controls register address */ +#define REG_LCR2_ADDR 0x23 /* serial port2circuit control register address */ +#define REG_MCR2_ADDR 0x24 /* serial port2MODEM controls register address */ +#define REG_LSR2_ADDR 0x25 /* serial port2line status register address */ +#define REG_MSR2_ADDR 0x26 /* serial port2address of MODEM status register */ +#define REG_SCR2_ADDR 0x27 /* serial port2the user can define the register address */ +#define REG_DLL2_ADDR 0x20 /* Baud rate divisor latch low 8-bit byte address */ +#define REG_DLM2_ADDR 0x21 /* Baud rate divisor latch high 8-bit byte address */ -/* CH438串口4寄存器地址 */ +/* CH438serial port3 register address */ -#define REG_RBR4_ADDR 0x08 /* 串口4接收缓冲寄存器地址 */ -#define REG_THR4_ADDR 0x08 /* 串口4发送保持寄存器地址 */ -#define REG_IER4_ADDR 0x09 /* 串口4中断使能寄存器地址 */ -#define REG_IIR4_ADDR 0x0A /* 串口4中断识别寄存器地址 */ -#define REG_FCR4_ADDR 0x0A /* 串口4FIFO控制寄存器地址 */ -#define REG_LCR4_ADDR 0x0B /* 串口4线路控制寄存器地址 */ -#define REG_MCR4_ADDR 0x0C /* 串口4MODEM控制寄存器地址 */ -#define REG_LSR4_ADDR 0x0D /* 串口4线路状态寄存器地址 */ -#define REG_MSR4_ADDR 0x0E /* 串口4MODEM状态寄存器地址 */ -#define REG_SCR4_ADDR 0x0F /* 串口4用户可定义寄存器地址 */ -#define REG_DLL4_ADDR 0x08 /* 波特率除数锁存器低8位字节地址 */ -#define REG_DLM4_ADDR 0x09 /* 波特率除数锁存器高8位字节地址 */ +#define REG_RBR3_ADDR 0x30 /* serial port3receive buffer register address */ +#define REG_THR3_ADDR 0x30 /* serial port3send hold register address */ +#define REG_IER3_ADDR 0x31 /* serial port3interrupt enable register address */ +#define REG_IIR3_ADDR 0x32 /* serial port3interrupt identifies register address */ +#define REG_FCR3_ADDR 0x32 /* serial port3FIFO controls register address */ +#define REG_LCR3_ADDR 0x33 /* serial port3circuit control register address */ +#define REG_MCR3_ADDR 0x34 /* serial port3MODEM controls register address */ +#define REG_LSR3_ADDR 0x35 /* serial port3line status register address */ +#define REG_MSR3_ADDR 0x36 /* serial port3address of MODEM status register */ +#define REG_SCR3_ADDR 0x37 /* serial port3the user can define the register address */ +#define REG_DLL3_ADDR 0x30 /* Baud rate divisor latch low 8-bit byte address */ +#define REG_DLM3_ADDR 0x31 /* Baud rate divisor latch high 8-bit byte address */ +/* CH438serial port4 register address */ -/* CH438串口5寄存器地址 */ - -#define REG_RBR5_ADDR 0x18 /* 串口5接收缓冲寄存器地址 */ -#define REG_THR5_ADDR 0x18 /* 串口5发送保持寄存器地址 */ -#define REG_IER5_ADDR 0x19 /* 串口5中断使能寄存器地址 */ -#define REG_IIR5_ADDR 0x1A /* 串口5中断识别寄存器地址 */ -#define REG_FCR5_ADDR 0x1A /* 串口5FIFO控制寄存器地址 */ -#define REG_LCR5_ADDR 0x1B /* 串口5线路控制寄存器地址 */ -#define REG_MCR5_ADDR 0x1C /* 串口5MODEM控制寄存器地址 */ -#define REG_LSR5_ADDR 0x1D /* 串口5线路状态寄存器地址 */ -#define REG_MSR5_ADDR 0x1E /* 串口5MODEM状态寄存器地址 */ -#define REG_SCR5_ADDR 0x1F /* 串口5用户可定义寄存器地址 */ -#define REG_DLL5_ADDR 0x18 /* 波特率除数锁存器低8位字节地址 */ -#define REG_DLM5_ADDR 0x19 /* 波特率除数锁存器高8位字节地址 */ +#define REG_RBR4_ADDR 0x08 /* serial port4receive buffer register address */ +#define REG_THR4_ADDR 0x08 /* serial port4send hold register address */ +#define REG_IER4_ADDR 0x09 /* serial port4interrupt enable register address */ +#define REG_IIR4_ADDR 0x0A /* serial port4interrupt identifies register address */ +#define REG_FCR4_ADDR 0x0A /* serial port4FIFO controls register address */ +#define REG_LCR4_ADDR 0x0B /* serial port4circuit control register address */ +#define REG_MCR4_ADDR 0x0C /* serial port4MODEM controls register address */ +#define REG_LSR4_ADDR 0x0D /* serial port4line status register address */ +#define REG_MSR4_ADDR 0x0E /* serial port4address of MODEM status register */ +#define REG_SCR4_ADDR 0x0F /* serial port4the user can define the register address */ +#define REG_DLL4_ADDR 0x08 /* Baud rate divisor latch low 8-bit byte address */ +#define REG_DLM4_ADDR 0x09 /* Baud rate divisor latch high 8-bit byte address */ -/* CH438串口6寄存器地址 */ +/* CH438serial port5 register address */ -#define REG_RBR6_ADDR 0x28 /* 串口6接收缓冲寄存器地址 */ -#define REG_THR6_ADDR 0x28 /* 串口6发送保持寄存器地址 */ -#define REG_IER6_ADDR 0x29 /* 串口6中断使能寄存器地址 */ -#define REG_IIR6_ADDR 0x2A /* 串口6中断识别寄存器地址 */ -#define REG_FCR6_ADDR 0x2A /* 串口6FIFO控制寄存器地址 */ -#define REG_LCR6_ADDR 0x2B /* 串口6线路控制寄存器地址 */ -#define REG_MCR6_ADDR 0x2C /* 串口6MODEM控制寄存器地址 */ -#define REG_LSR6_ADDR 0x2D /* 串口6线路状态寄存器地址 */ -#define REG_MSR6_ADDR 0x2E /* 串口6MODEM状态寄存器地址 */ -#define REG_SCR6_ADDR 0x2F /* 串口6用户可定义寄存器地址 */ -#define REG_DLL6_ADDR 0x28 /* 波特率除数锁存器低8位字节地址 */ -#define REG_DLM6_ADDR 0x29 /* 波特率除数锁存器高8位字节地址 */ +#define REG_RBR5_ADDR 0x18 /* serial port5receive buffer register address */ +#define REG_THR5_ADDR 0x18 /* serial port5send hold register address */ +#define REG_IER5_ADDR 0x19 /* serial port5interrupt enable register address */ +#define REG_IIR5_ADDR 0x1A /* serial port5interrupt identifies register address */ +#define REG_FCR5_ADDR 0x1A /* serial port5FIFO controls register address */ +#define REG_LCR5_ADDR 0x1B /* serial port5circuit control register address */ +#define REG_MCR5_ADDR 0x1C /* serial port5MODEM controls register address */ +#define REG_LSR5_ADDR 0x1D /* serial port5line status register address */ +#define REG_MSR5_ADDR 0x1E /* serial port5address of MODEM status register */ +#define REG_SCR5_ADDR 0x1F /* serial port5the user can define the register address */ +#define REG_DLL5_ADDR 0x18 /* Baud rate divisor latch low 8-bit byte address */ +#define REG_DLM5_ADDR 0x19 /* Baud rate divisor latch high 8-bit byte address */ -/* CH438串口7寄存器地址 */ +/* CH438serial port6 register address */ -#define REG_RBR7_ADDR 0x38 /* 串口7接收缓冲寄存器地址 */ -#define REG_THR7_ADDR 0x38 /* 串口7发送保持寄存器地址 */ -#define REG_IER7_ADDR 0x39 /* 串口7中断使能寄存器地址 */ -#define REG_IIR7_ADDR 0x3A /* 串口7中断识别寄存器地址 */ -#define REG_FCR7_ADDR 0x3A /* 串口7FIFO控制寄存器地址 */ -#define REG_LCR7_ADDR 0x3B /* 串口7线路控制寄存器地址 */ -#define REG_MCR7_ADDR 0x3C /* 串口7MODEM控制寄存器地址 */ -#define REG_LSR7_ADDR 0x3D /* 串口7线路状态寄存器地址 */ -#define REG_MSR7_ADDR 0x3E /* 串口7MODEM状态寄存器地址 */ -#define REG_SCR7_ADDR 0x3F /* 串口7用户可定义寄存器地址 */ -#define REG_DLL7_ADDR 0x38 /* 波特率除数锁存器低8位字节地址 */ -#define REG_DLM7_ADDR 0x39 /* 波特率除数锁存器高8位字节地址 */ +#define REG_RBR6_ADDR 0x28 /* serial port6receive buffer register address */ +#define REG_THR6_ADDR 0x28 /* serial port6send hold register address */ +#define REG_IER6_ADDR 0x29 /* serial port6interrupt enable register address */ +#define REG_IIR6_ADDR 0x2A /* serial port6interrupt identifies register address */ +#define REG_FCR6_ADDR 0x2A /* serial port6FIFO controls register address */ +#define REG_LCR6_ADDR 0x2B /* serial port6circuit control register address */ +#define REG_MCR6_ADDR 0x2C /* serial port6MODEM controls register address */ +#define REG_LSR6_ADDR 0x2D /* serial port6line status register address */ +#define REG_MSR6_ADDR 0x2E /* serial port6address of MODEM status register */ +#define REG_SCR6_ADDR 0x2F /* serial port6the user can define the register address */ +#define REG_DLL6_ADDR 0x28 /* Baud rate divisor latch low 8-bit byte address */ +#define REG_DLM6_ADDR 0x29 /* Baud rate divisor latch high 8-bit byte address */ +/* CH438serial port7 register address */ -/* CH438内部串口0~7 专用状态寄存器 */ -#define REG_SSR_ADDR 0x4F /* 专用状态寄存器地址 */ +#define REG_RBR7_ADDR 0x38 /* serial port7receive buffer register address */ +#define REG_THR7_ADDR 0x38 /* serial port7send hold register address */ +#define REG_IER7_ADDR 0x39 /* serial port7interrupt enable register address */ +#define REG_IIR7_ADDR 0x3A /* serial port7interrupt identifies register address */ +#define REG_FCR7_ADDR 0x3A /* serial port7FIFO controls register address */ +#define REG_LCR7_ADDR 0x3B /* serial port7circuit control register address */ +#define REG_MCR7_ADDR 0x3C /* serial port7MODEM controls register address */ +#define REG_LSR7_ADDR 0x3D /* serial port7line status register address */ +#define REG_MSR7_ADDR 0x3E /* serial port7address of MODEM status register */ +#define REG_SCR7_ADDR 0x3F /* serial port7the user can define the register address */ +#define REG_DLL7_ADDR 0x38 /* Baud rate divisor latch low 8-bit byte address */ +#define REG_DLM7_ADDR 0x39 /* Baud rate divisor latch high 8-bit byte address */ -/* IER寄存器的位 */ +#define REG_SSR_ADDR 0x4F /* pecial status register address */ -#define BIT_IER_RESET 0x80 /* 该位置1则软复位该串口 */ -#define BIT_IER_LOWPOWER 0x40 /* 该位为1则关闭该串口的内部基准时钟 */ -#define BIT_IER_SLP 0x20 /* 串口0是SLP,为1则关闭时钟震荡器 */ -#define BIT_IER1_CK2X 0x20 /* 串口1是CK2X,为1则强制将外部时钟信号2倍频后作为内部基准时钟 */ -#define BIT_IER_IEMODEM 0x08 /* 该位为1允许MODEM输入状态变化中断 */ -#define BIT_IER_IELINES 0x04 /* 该位为1允许接收线路状态中断 */ -#define BIT_IER_IETHRE 0x02 /* 该位为1允许发送保持寄存器空中断 */ -#define BIT_IER_IERECV 0x01 /* 该位为1允许接收到数据中断 */ -/* IIR寄存器的位 */ +/* IER register bit */ + +#define BIT_IER_RESET 0x80 /* The bit is 1 soft reset serial port */ +#define BIT_IER_LOWPOWER 0x40 /* The bit is 1 close serial port internal reference clock */ +#define BIT_IER_SLP 0x20 /* serial port0 is SLP, 1 close clock vibrator */ +#define BIT_IER1_CK2X 0x20 /* serial port1 is CK2X, 1 force the external clock signal after 2 times as internal */ +#define BIT_IER_IEMODEM 0x08 /* The bit is 1 allows MODEM input status to interrupt */ +#define BIT_IER_IELINES 0x04 /* The bit is 1 allow receiving line status to be interrupted */ +#define BIT_IER_IETHRE 0x02 /* The bit is 1 allows the send hold register to break in mid-air */ +#define BIT_IER_IERECV 0x01 /* The bit is 1 allows receiving data interrupts */ + +/* IIR register bit */ #define BIT_IIR_FIFOENS1 0x80 -#define BIT_IIR_FIFOENS0 0x40 /* 该2位为1表示起用FIFO */ +#define BIT_IIR_FIFOENS0 0x40 /* The two is 1 said use FIFO */ -/* 中断类型：0001没有中断，0110接收线路状态中断，0100接收数据可用中断， -1100接收数据超时中断，0010THR寄存器空中断，0000MODEM输入变化中断 */ +/* Interrupt type: 0001 has no interrupt, 0110 receiving line status is interrupted, 0100 receiving data can be interrupted, +1100 received data timeout interrupt, 0010THR register air interrupt, 0000MODEM input change interrupt */ #define BIT_IIR_IID3 0x08 #define BIT_IIR_IID2 0x04 #define BIT_IIR_IID1 0x02 #define BIT_IIR_NOINT 0x01 -/* FCR寄存器的位 */ +/* FCR register bit */ -/* 触发点： 00对应1个字节，01对应16个字节，10对应64个字节，11对应112个字节 */ -#define BIT_FCR_RECVTG1 0x80 /* 设置FIFO的中断和自动硬件流控制的触发点 */ -#define BIT_FCR_RECVTG0 0x40 /* 设置FIFO的中断和自动硬件流控制的触发点 */ +/* Trigger point: 00 corresponds to 1 byte, 01 corresponds to 16 bytes, 10 corresponds to 64 bytes, 11 corresponds to 112 bytes */ +#define BIT_FCR_RECVTG1 0x80 /* Set the trigger point for FIFO interruption and automatic hardware flow control */ +#define BIT_FCR_RECVTG0 0x40 /* Set the trigger point for FIFO interruption and automatic hardware flow control */ + +#define BIT_FCR_TFIFORST 0x04 /* The bit is 1 empty the data sent in FIFO */ +#define BIT_FCR_RFIFORST 0x02 /* The bit is 1 empty the data sent in FIFO */ +#define BIT_FCR_FIFOEN 0x01 /* The bit is 1 use FIFO, 0 disable FIFO */ -#define BIT_FCR_TFIFORST 0x04 /* 该位置1则清空发送FIFO中的数据 */ -#define BIT_FCR_RFIFORST 0x02 /* 该位置1则清空接收FIFO中的数据 */ -#define BIT_FCR_FIFOEN 0x01 /* 该位置1则起用FIFO,为0则禁用FIFO */ +/* LCR register bit */ -/* LCR寄存器的位 */ +#define BIT_LCR_DLAB 0x80 /* To access DLL, DLM, 0 to access RBR/THR/IER */ +#define BIT_LCR_BREAKEN 0x40 /* 1 forces a BREAK line interval*/ -#define BIT_LCR_DLAB 0x80 /* 为1才能存取DLL，DLM，为0才能存取RBR/THR/IER */ -#define BIT_LCR_BREAKEN 0x40 /* 为1则强制产生BREAK线路间隔*/ +/* Set the check format: when PAREN is 1, 00 odd check, 01 even check, 10 MARK (set 1), 11 blank (SPACE, clear 0) */ +#define BIT_LCR_PARMODE1 0x20 /* Sets the parity bit format */ +#define BIT_LCR_PARMODE0 0x10 /* Sets the parity bit format */ + +#define BIT_LCR_PAREN 0x08 /* A value of 1 allows you to generate and receive parity bits when sending */ +#define BIT_LCR_STOPBIT 0x04 /* If is 1, then two stop bits, is 0, a stop bit */ -/* 设置校验格式：当PAREN为1时，00奇校验，01偶校验，10标志位（MARK，置1)，11空白位（SPACE，清0) */ -#define BIT_LCR_PARMODE1 0x20 /* 设置奇偶校验位格式 */ -#define BIT_LCR_PARMODE0 0x10 /* 设置奇偶校验位格式 */ - -#define BIT_LCR_PAREN 0x08 /* 为1则允许发送时产生和接收校验奇偶校验位 */ -#define BIT_LCR_STOPBIT 0x04 /* 为1则两个停止位,为0一个停止位 */ - -/* 设置字长度：00则5个数据位，01则6个数据位，10则7个数据位，11则8个数据位 */ -#define BIT_LCR_WORDSZ1 0x02 /* 设置字长长度 */ +/* Set word length: 00 for 5 data bits, 01 for 6 data bits, 10 for 7 data bits and 11 for 8 data bits */ +#define BIT_LCR_WORDSZ1 0x02 /* Set the word length length */ #define BIT_LCR_WORDSZ0 0x01 -/* MCR寄存器的位 */ +/* MCR register bit */ -#define BIT_MCR_AFE 0x20 /* 为1允许CTS和RTS硬件自动流控制 */ -#define BIT_MCR_LOOP 0x10 /* 为1使能内部回路的测试模式 */ -#define BIT_MCR_OUT2 0x08 /* 为1允许该串口的中断请求输出 */ -#define BIT_MCR_OUT1 0x04 /* 为用户定义的MODEM控制位 */ -#define BIT_MCR_RTS 0x02 /* 该位为1则RTS引脚输出有效 */ -#define BIT_MCR_DTR 0x01 /* 该位为1则DTR引脚输出有效 */ +#define BIT_MCR_AFE 0x20 /* For 1 allows automatic flow control of CTS and RTS hardware */ +#define BIT_MCR_LOOP 0x10 /* Is the test mode of 1 enabling internal loop */ +#define BIT_MCR_OUT2 0x08 /* 1 Allows an interrupt request for the serial port output */ +#define BIT_MCR_OUT1 0x04 /* The MODEM control bit defined for the user */ +#define BIT_MCR_RTS 0x02 /* The bit is 1 RTS pin output effective */ +#define BIT_MCR_DTR 0x01 /* The bit is 1 DTR pin output effective */ -/* LSR寄存器的位 */ +/* LSR register bit */ -#define BIT_LSR_RFIFOERR 0x80 /* 为1表示在接收FIFO中存在至少一个错误 */ -#define BIT_LSR_TEMT 0x40 /* 为1表示THR和TSR全空 */ -#define BIT_LSR_THRE 0x20 /* 为1表示THR空*/ -#define BIT_LSR_BREAKINT 0x10 /* 该位为1表示检测到BREAK线路间隔 */ -#define BIT_LSR_FRAMEERR 0x08 /* 该位为1表示读取数据帧错误 */ -#define BIT_LSR_PARERR 0x04 /* 该位为1表示奇偶校验错误 */ -#define BIT_LSR_OVERR 0x02 /* 为1表示接收FIFO缓冲区溢出 */ -#define BIT_LSR_DATARDY 0x01 /* 该位为1表示接收FIFO中有接收到的数据 */ +#define BIT_LSR_RFIFOERR 0x80 /* 1 said There is at least one error in receiving FIFO */ +#define BIT_LSR_TEMT 0x40 /* 1 said THR and TSR are empty */ +#define BIT_LSR_THRE 0x20 /* 1 said THR is empty*/ +#define BIT_LSR_BREAKINT 0x10 /* The bit is 1 said the BREAK line interval was detected*/ +#define BIT_LSR_FRAMEERR 0x08 /* The bit is 1 said error reading data frame */ +#define BIT_LSR_PARERR 0x04 /* The bit is 1 said parity error */ +#define BIT_LSR_OVERR 0x02 /* 1 said receive FIFO buffer overflow */ +#define BIT_LSR_DATARDY 0x01 /* The bit is 1 said receive data received in FIFO */ -/* MSR寄存器的位 */ +/* MSR register bit */ -#define BIT_MSR_DCD 0x80 /* 该位为1表示DCD引脚有效 */ -#define BIT_MSR_RI 0x40 /* 该位为1表示RI引脚有效 */ -#define BIT_MSR_DSR 0x20 /* 该位为1表示DSR引脚有效 */ -#define BIT_MSR_CTS 0x10 /* 该位为1表示CTS引脚有效 */ -#define BIT_MSR_DDCD 0x08 /* 该位为1表示DCD引脚输入状态发生变化过 */ -#define BIT_MSR_TERI 0x04 /* 该位为1表示RI引脚输入状态发生变化过 */ -#define BIT_MSR_DDSR 0x02 /* 该位为1表示DSR引脚输入状态发生变化过 */ -#define BIT_MSR_DCTS 0x01 /* 该位为1表示CTS引脚输入状态发生变化过 */ +#define BIT_MSR_DCD 0x80 /* The bit is 1 said DCD pin effective */ +#define BIT_MSR_RI 0x40 /* The bit is 1 said RI pin effective */ +#define BIT_MSR_DSR 0x20 /* The bit is 1 said DSR pin effective */ +#define BIT_MSR_CTS 0x10 /* The bit is 1 said CTS pin effective */ +#define BIT_MSR_DDCD 0x08 /* The bit is 1 said DCD pin The input state has changed */ +#define BIT_MSR_TERI 0x04 /* The bit is 1 said RI pin The input state has changed */ +#define BIT_MSR_DDSR 0x02 /* The bit is 1 said DSR pin The input state has changed */ +#define BIT_MSR_DCTS 0x01 /* The bit is 1 said CTS pin The input state has changed */ -/* 中断状态码 */ +/* Interrupt status code */ -#define INT_NOINT 0x01 /* 没有中断 */ -#define INT_THR_EMPTY 0x02 /* THR空中断 */ -#define INT_RCV_OVERTIME 0x0C /* 接收超时中断 */ -#define INT_RCV_SUCCESS 0x04 /* 接收数据可用中断 */ -#define INT_RCV_LINES 0x06 /* 接收线路状态中断 */ -#define INT_MODEM_CHANGE 0x00 /* MODEM输入变化中断 */ +#define INT_NOINT 0x01 /* There is no interruption */ +#define INT_THR_EMPTY 0x02 /* THR empty interruption */ +#define INT_RCV_OVERTIME 0x0C /* Receive timeout interrupt */ +#define INT_RCV_SUCCESS 0x04 /* Interrupts are available to receive data */ +#define INT_RCV_LINES 0x06 /* Receiving line status interrupted */ +#define INT_MODEM_CHANGE 0x00 /* MODEM input changes interrupt */ -#define CH438_IIR_FIFOS_ENABLED 0xC0 /* 起用FIFO */ +#define CH438_IIR_FIFOS_ENABLED 0xC0 /* use FIFO */ -#define Fpclk 1843200 /* 定义内部时钟频率 */ +#define Fpclk 1843200 /* Define the internal clock frequency*/ // #define IOMUX_CH438OUT_DEFAULT -#define CH438_D0_PIN_OUT (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \ - GPIO_PORT1 | GPIO_PIN25) -#define CH438_D1_PIN_OUT (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \ - GPIO_PORT1 | GPIO_PIN24) -#define CH438_D2_PIN_OUT (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \ - GPIO_PORT1 | GPIO_PIN20) -#define CH438_D3_PIN_OUT (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \ - GPIO_PORT1 | GPIO_PIN21) -#define CH438_D4_PIN_OUT (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \ - GPIO_PORT1 | GPIO_PIN31) -#define CH438_D5_PIN_OUT (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \ - GPIO_PORT1 | GPIO_PIN28) -#define CH438_D6_PIN_OUT (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \ - GPIO_PORT1 | GPIO_PIN30) -#define CH438_D7_PIN_OUT (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \ - GPIO_PORT1 | GPIO_PIN29) -#define CH438_NWR_PIN (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \ - GPIO_PORT3 | GPIO_PIN4) -#define CH438_NRD_PIN (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \ - GPIO_PORT3 | GPIO_PIN5) -#define CH438_ALE_PIN (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \ - GPIO_PORT3 | GPIO_PIN2) -#define CH438_INT_PIN (GPIO_INTERRUPT | GPIO_INT_FALLINGEDGE | IOMUX_SW_DEFAULT | \ - GPIO_PORT3 | GPIO_PIN3) +#define CH438_D0_PIN_OUT (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \ + GPIO_PORT1 | GPIO_PIN25) +#define CH438_D1_PIN_OUT (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \ + GPIO_PORT1 | GPIO_PIN24) +#define CH438_D2_PIN_OUT (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \ + GPIO_PORT1 | GPIO_PIN20) +#define CH438_D3_PIN_OUT (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \ + GPIO_PORT1 | GPIO_PIN21) +#define CH438_D4_PIN_OUT (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \ + GPIO_PORT1 | GPIO_PIN31) +#define CH438_D5_PIN_OUT (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \ + GPIO_PORT1 | GPIO_PIN28) +#define CH438_D6_PIN_OUT (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \ + GPIO_PORT1 | GPIO_PIN30) +#define CH438_D7_PIN_OUT (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \ + GPIO_PORT1 | GPIO_PIN29) +#define CH438_NWR_PIN (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \ + GPIO_PORT3 | GPIO_PIN4) +#define CH438_NRD_PIN (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \ + GPIO_PORT3 | GPIO_PIN5) +#define CH438_ALE_PIN (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \ + GPIO_PORT3 | GPIO_PIN2) +#define CH438_INT_PIN (GPIO_INTERRUPT | GPIO_INT_FALLINGEDGE | IOMUX_SW_DEFAULT | \ + GPIO_PORT3 | GPIO_PIN3) -#define CH438_D0_PIN_INPUT (GPIO_INPUT | \ - GPIO_PORT1 | GPIO_PIN25) -#define CH438_D1_PIN_INPUT (GPIO_INPUT | \ - GPIO_PORT1 | GPIO_PIN24) -#define CH438_D2_PIN_INPUT (GPIO_INPUT | \ - GPIO_PORT1 | GPIO_PIN20) -#define CH438_D3_PIN_INPUT (GPIO_INPUT | \ - GPIO_PORT1 | GPIO_PIN21) -#define CH438_D4_PIN_INPUT (GPIO_INPUT | \ - GPIO_PORT1 | GPIO_PIN31) -#define CH438_D5_PIN_INPUT (GPIO_INPUT | \ - GPIO_PORT1 | GPIO_PIN28) -#define CH438_D6_PIN_INPUT (GPIO_INPUT | \ - GPIO_PORT1 | GPIO_PIN30) -#define CH438_D7_PIN_INPUT (GPIO_INPUT | \ - GPIO_PORT1 | GPIO_PIN29) +#define CH438_D0_PIN_INPUT (GPIO_INPUT | \ + GPIO_PORT1 | GPIO_PIN25) +#define CH438_D1_PIN_INPUT (GPIO_INPUT | \ + GPIO_PORT1 | GPIO_PIN24) +#define CH438_D2_PIN_INPUT (GPIO_INPUT | \ + GPIO_PORT1 | GPIO_PIN20) +#define CH438_D3_PIN_INPUT (GPIO_INPUT | \ + GPIO_PORT1 | GPIO_PIN21) +#define CH438_D4_PIN_INPUT (GPIO_INPUT | \ + GPIO_PORT1 | GPIO_PIN31) +#define CH438_D5_PIN_INPUT (GPIO_INPUT | \ + GPIO_PORT1 | GPIO_PIN28) +#define CH438_D6_PIN_INPUT (GPIO_INPUT | \ + GPIO_PORT1 | GPIO_PIN30) +#define CH438_D7_PIN_INPUT (GPIO_INPUT | \ + GPIO_PORT1 | GPIO_PIN29) +/* ch438 debug */ #ifdef CONFIG_DEBUG_CH438_ERROR -# define ch438err _err +# define ch438err _err #else -# define ch438err _none +# define ch438err _none #endif #ifdef CONFIG_DEBUG_CH438_WARN @@ -356,8 +354,9 @@ #endif -#define OPE_INT 0x0000 -#define OPE_CFG 0x0001 +/* ioctl cmd */ +#define OPE_INT 0x0000 +#define OPE_CFG 0x0001 /**************************************************************************** * Public Function Prototypes From 43e8a941e2940416705a4731250e1bb7acb120a7 Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Thu, 12 May 2022 17:57:20 +0800 Subject: [PATCH 31/46] change char to uint8_t on ch438 --- .../aiit_board/xidatong/src/imxrt_ch438.c | 26 +++++++++---------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c index 3fa376a0a..b568d3ae1 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c @@ -31,13 +31,13 @@ static FAR void getInterruptStatus(FAR void *arg); static void CH438SetOutput(void); static void CH438SetInput(void); static uint8_t ReadCH438Data(uint8_t addr); -static void WriteCH438Data(uint8_t addr, uint8_t dat); -static void WriteCH438Block(uint8_t mAddr, uint8_t mLen, char *mBuf); -static void Ch438UartSend(uint8_t ext_uart_no, char *Data, uint16_t Num); -uint8_t CH438UARTRcv(uint8_t ext_uart_no, char *buf, size_t size); +static void WriteCH438Data(uint8_t addr, const uint8_t dat); +static void WriteCH438Block(uint8_t mAddr, uint8_t mLen, const uint8_t *mBuf); +static void Ch438UartSend(uint8_t ext_uart_no, const uint8_t *Data, uint16_t Num); +uint8_t CH438UARTRcv(uint8_t ext_uart_no, uint8_t *buf, size_t size); static void ImxrtCH438Init(void); static void CH438PortInit(uint8_t ext_uart_no, uint32_t baud_rate); -static int ImxrtCh438WriteData(uint8_t ext_uart_no, char *write_buffer, size_t size); +static int ImxrtCh438WriteData(uint8_t ext_uart_no, const uint8_t *write_buffer, size_t size); static size_t ImxrtCh438ReadData(uint8_t ext_uart_no, size_t size); static void Ch438InitDefault(void); @@ -123,7 +123,7 @@ static struct work_s g_ch438irqwork; static volatile bool done[CH438PORTNUM] = {false,false,false,false,false,false,false,false}; /* Eight port data buffer */ -static char buff[CH438PORTNUM][CH438_BUFFSIZE]; +static uint8_t buff[CH438PORTNUM][CH438_BUFFSIZE]; /* the value of interrupt number of SSR register */ static uint8_t Interruptnum[CH438PORTNUM] = {0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,}; @@ -275,7 +275,7 @@ static uint8_t ReadCH438Data(uint8_t addr) * write data to ch438 address * ****************************************************************************/ -static void WriteCH438Data(uint8_t addr, uint8_t dat) +static void WriteCH438Data(uint8_t addr, const uint8_t dat) { imxrt_gpio_write(CH438_ALE_PIN, true); imxrt_gpio_write(CH438_NRD_PIN, true); @@ -328,7 +328,7 @@ static void WriteCH438Data(uint8_t addr, uint8_t dat) * Write data block from ch438 address * ****************************************************************************/ -static void WriteCH438Block(uint8_t mAddr, uint8_t mLen, char *mBuf) +static void WriteCH438Block(uint8_t mAddr, uint8_t mLen, const uint8_t *mBuf) { while(mLen--) WriteCH438Data(mAddr, *mBuf++); @@ -342,7 +342,7 @@ static void WriteCH438Block(uint8_t mAddr, uint8_t mLen, char *mBuf) * with a maximum of 128 bytes of data sent at a time * ****************************************************************************/ -static void Ch438UartSend(uint8_t ext_uart_no, char *Data, uint16_t Num) +static void Ch438UartSend(uint8_t ext_uart_no, const uint8_t *Data, uint16_t Num) { uint8_t REG_LSR_ADDR,REG_THR_ADDR; REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR; @@ -372,12 +372,12 @@ static void Ch438UartSend(uint8_t ext_uart_no, char *Data, uint16_t Num) * Disable FIFO mode for ch438 serial port to receive multi byte data * ****************************************************************************/ -uint8_t CH438UARTRcv(uint8_t ext_uart_no, char *buf, size_t size) +uint8_t CH438UARTRcv(uint8_t ext_uart_no, uint8_t *buf, size_t size) { uint8_t rcv_num = 0; uint8_t dat = 0; uint8_t REG_LSR_ADDR,REG_RBR_ADDR; - char *read_buffer; + uint8_t *read_buffer; size_t buffer_index = 0; read_buffer = buf; @@ -494,7 +494,7 @@ static void CH438PortInit(uint8_t ext_uart_no, uint32_t baud_rate) * Read data from ch438 port * ****************************************************************************/ -static int ImxrtCh438WriteData(uint8_t ext_uart_no, char *write_buffer, size_t size) +static int ImxrtCh438WriteData(uint8_t ext_uart_no, const uint8_t *write_buffer, size_t size) { int write_len, write_len_continue; int i, write_index; @@ -760,7 +760,7 @@ static ssize_t ch438_write(FAR struct file *filep, FAR const char *buffer, size_ DEBUGASSERT(port >= 0 && port < CH438PORTNUM); - ImxrtCh438WriteData(port, buffer, buflen); + ImxrtCh438WriteData(port, (const uint8_t *)buffer, buflen); return buflen; } From 36f59810368cca3e334c0247da144524b886708f Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Fri, 13 May 2022 14:00:01 +0800 Subject: [PATCH 32/46] ch438 on nuttx: If a port is checked, the port will be initialized. Otherwise, the interrupt of the port will be disabled. --- .../aiit_board/xidatong/src/imxrt_ch438.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c index b568d3ae1..2b651eedd 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c @@ -630,36 +630,54 @@ static void Ch438InitDefault(void) ImxrtCH438Init(); +/* If a port is checked, the port will be initialized. Otherwise, the interrupt of the port will be disabled. */ + #ifdef CONFIG_CH438_EXTUART0 CH438PortInit(0, CONFIG_CH438_EXTUART0_BAUD); +#else + WriteCH438Data(REG_IER0_ADDR, 0x00); #endif #ifdef CONFIG_CH438_EXTUART1 CH438PortInit(1, CONFIG_CH438_EXTUART1_BAUD); +#else + WriteCH438Data(REG_IER1_ADDR, 0x00); #endif #ifdef CONFIG_CH438_EXTUART2 CH438PortInit(2, CONFIG_CH438_EXTUART2_BAUD); +#else + WriteCH438Data(REG_IER2_ADDR, 0x00); #endif #ifdef CONFIG_CH438_EXTUART3 CH438PortInit(3, CONFIG_CH438_EXTUART3_BAUD); +#else + WriteCH438Data(REG_IER3_ADDR, 0x00); #endif #ifdef CONFIG_CH438_EXTUART4 CH438PortInit(4, CONFIG_CH438_EXTUART4_BAUD); +#else + WriteCH438Data(REG_IER4_ADDR, 0x00); #endif #ifdef CONFIG_CH438_EXTUART5 CH438PortInit(5, CONFIG_CH438_EXTUART5_BAUD); +#else + WriteCH438Data(REG_IER5_ADDR, 0x00); #endif #ifdef CONFIG_CH438_EXTUART6 CH438PortInit(6, CONFIG_CH438_EXTUART6_BAUD); +#else + WriteCH438Data(REG_IER6_ADDR, 0x00); #endif #ifdef CONFIG_CH438_EXTUART7 CH438PortInit(7, CONFIG_CH438_EXTUART7_BAUD); +#else + WriteCH438Data(REG_IER7_ADDR, 0x00); #endif up_mdelay(10); From 7056725c66d9b7b796af51935feb6611d171eddf Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Fri, 13 May 2022 16:19:30 +0800 Subject: [PATCH 33/46] support hc08 on xidatong --- .../Framework/connection/bluetooth/Make.defs | 7 ++ .../Framework/connection/bluetooth/Makefile | 18 +++-- .../connection/bluetooth/hc08/Kconfig | 19 +++++ .../connection/bluetooth/hc08/Make.defs | 6 ++ .../connection/bluetooth/hc08/Makefile | 14 +++- .../connection/bluetooth/hc08/hc08.c | 72 ++++++++++++++----- .../xidatong/configs/btnsh/defconfig | 65 +++++++++++++++++ .../app_match_nuttx/apps/nshlib/Kconfig | 4 ++ .../app_match_nuttx/apps/nshlib/nsh.h | 4 ++ .../apps/nshlib/nsh_Applicationscmd.c | 11 +++ .../app_match_nuttx/apps/nshlib/nsh_command.c | 3 + 11 files changed, 199 insertions(+), 24 deletions(-) create mode 100644 APP_Framework/Framework/connection/bluetooth/Make.defs create mode 100644 APP_Framework/Framework/connection/bluetooth/hc08/Make.defs create mode 100644 Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/btnsh/defconfig diff --git a/APP_Framework/Framework/connection/bluetooth/Make.defs b/APP_Framework/Framework/connection/bluetooth/Make.defs new file mode 100644 index 000000000..630d914f0 --- /dev/null +++ b/APP_Framework/Framework/connection/bluetooth/Make.defs @@ -0,0 +1,7 @@ +############################################################################ +# APP_Framework/Framework/connection/bluetooth/Make.defs +############################################################################ +ifneq ($(CONFIG_CONNECTION_ADAPTER_BLUETOOTH),) +CONFIGURED_APPS += $(APPDIR)/../../../APP_Framework/Framework/connection/bluetooth +endif +include $(wildcard $(APPDIR)/../../../APP_Framework/Framework/connection/bluetooth/*/Make.defs) diff --git a/APP_Framework/Framework/connection/bluetooth/Makefile b/APP_Framework/Framework/connection/bluetooth/Makefile index bb367019f..bc7d736cd 100644 --- a/APP_Framework/Framework/connection/bluetooth/Makefile +++ b/APP_Framework/Framework/connection/bluetooth/Makefile @@ -1,7 +1,17 @@ -SRC_FILES := adapter_bluetooth.c +include $(KERNEL_ROOT)/.config +ifeq ($(CONFIG_ADD_NUTTX_FETURES),y) + include $(APPDIR)/Make.defs + CSRCS += adapter_bluetooth.c + include $(APPDIR)/Application.mk -ifeq ($(CONFIG_ADAPTER_HC08),y) - SRC_DIR += hc08 endif -include $(KERNEL_ROOT)/compiler.mk +ifeq ($(CONFIG_ADD_XIZI_FETURES),y) + SRC_FILES := adapter_bluetooth.c + + ifeq ($(CONFIG_ADAPTER_HC08),y) + SRC_DIR += hc08 + endif + + include $(KERNEL_ROOT)/compiler.mk +endif diff --git a/APP_Framework/Framework/connection/bluetooth/hc08/Kconfig b/APP_Framework/Framework/connection/bluetooth/hc08/Kconfig index 8b17e83dd..6e1f3f0fe 100644 --- a/APP_Framework/Framework/connection/bluetooth/hc08/Kconfig +++ b/APP_Framework/Framework/connection/bluetooth/hc08/Kconfig @@ -33,6 +33,25 @@ endif if ADD_NUTTX_FETURES + config ADAPTER_HC08_WORK_ROLE + string "HC08 work role M(MASTER) or S(SLAVER)" + default "M" + + config ADAPTER_HC08_DRIVER_EXTUART + bool "Using extra uart to support bluetooth" + default y + + config ADAPTER_HC08_DRIVER + string "HC08 device uart driver path" + default "/dev/ttyS2" + depends on !ADAPTER_HC08_DRIVER_EXTUART + + if ADAPTER_HC08_DRIVER_EXTUART + config ADAPTER_HC08_DRIVER + string "HC08 device extra uart driver path" + default "/dev/extuart_dev2" + endif + endif if ADD_RTTHREAD_FETURES diff --git a/APP_Framework/Framework/connection/bluetooth/hc08/Make.defs b/APP_Framework/Framework/connection/bluetooth/hc08/Make.defs new file mode 100644 index 000000000..b66a351fb --- /dev/null +++ b/APP_Framework/Framework/connection/bluetooth/hc08/Make.defs @@ -0,0 +1,6 @@ +############################################################################ +# APP_Framework/Framework/connection/bluetooth/hc08/Make.defs +############################################################################ +ifneq ($(CONFIG_ADAPTER_HC08),) +CONFIGURED_APPS += $(APPDIR)/../../../APP_Framework/Framework/connection/bluetooth/hc08 +endif diff --git a/APP_Framework/Framework/connection/bluetooth/hc08/Makefile b/APP_Framework/Framework/connection/bluetooth/hc08/Makefile index 60932ced2..e437a114f 100644 --- a/APP_Framework/Framework/connection/bluetooth/hc08/Makefile +++ b/APP_Framework/Framework/connection/bluetooth/hc08/Makefile @@ -1,3 +1,13 @@ -SRC_FILES := hc08.c +include $(KERNEL_ROOT)/.config +ifeq ($(CONFIG_ADD_NUTTX_FETURES),y) + include $(APPDIR)/Make.defs + CSRCS += hc08.c + include $(APPDIR)/Application.mk -include $(KERNEL_ROOT)/compiler.mk +endif + +ifeq ($(CONFIG_ADD_XIZI_FETURES),y) + SRC_FILES := hc08.c + include $(KERNEL_ROOT)/compiler.mk + +endif diff --git a/APP_Framework/Framework/connection/bluetooth/hc08/hc08.c b/APP_Framework/Framework/connection/bluetooth/hc08/hc08.c index bc20ef8bc..4df84550f 100644 --- a/APP_Framework/Framework/connection/bluetooth/hc08/hc08.c +++ b/APP_Framework/Framework/connection/bluetooth/hc08/hc08.c @@ -21,27 +21,27 @@ #include #include -#define HC08_DETECT_CMD "AT" -#define HC08_DEFAULT_CMD "AT+DEFAULT" -#define HC08_RESET_CMD "AT+RESET" -#define HC08_CLEAR_CMD "AT+CLEAR" -#define HC08_GET_DEVICE_INFO "AT+RX" +#define HC08_DETECT_CMD "AT" +#define HC08_DEFAULT_CMD "AT+DEFAULT" +#define HC08_RESET_CMD "AT+RESET" +#define HC08_CLEAR_CMD "AT+CLEAR" +#define HC08_GET_DEVICE_INFO "AT+RX" -#define HC08_GET_BAUDRATE_CMD "AT+BAUD=?" -#define HC08_SET_BAUDRATE_CMD "AT+BAUD=%u" -#define HC08_GET_CONNECTABLE "AT+CONT=?" -#define HC08_SET_CONNECTABLE "AT+CONT=%s" -#define HC08_GET_ROLE_CMD "AT+ROLE=?" -#define HC08_SET_ROLE_CMD "AT+ROLE=%s" -#define HC08_GET_ADDR_CMD "AT+ADDR=?" -#define HC08_SET_ADDR_CMD "AT+ADDR=%s" +#define HC08_GET_BAUDRATE_CMD "AT+BAUD=?" +#define HC08_SET_BAUDRATE_CMD "AT+BAUD=%u" +#define HC08_GET_CONNECTABLE "AT+CONT=?" +#define HC08_SET_CONNECTABLE "AT+CONT=%s" +#define HC08_GET_ROLE_CMD "AT+ROLE=?" +#define HC08_SET_ROLE_CMD "AT+ROLE=%s" +#define HC08_GET_ADDR_CMD "AT+ADDR=?" +#define HC08_SET_ADDR_CMD "AT+ADDR=%s" #define HC08_GET_NAME_CMD "AT+NAME=%s" #define HC08_SET_NAME_CMD "AT+NAME=?" -#define HC08_OK_RESP "OK" +#define HC08_OK_RESP "OK" -#define HC08_CMD_STR_DEFAULT_SIZE 64 -#define HC08_RESP_DEFAULT_SIZE 64 +#define HC08_CMD_STR_DEFAULT_SIZE 64 +#define HC08_RESP_DEFAULT_SIZE 64 enum Hc08AtCmd { @@ -232,6 +232,41 @@ static int Hc08Close(struct Adapter *adapter) return 0; } +#ifdef ADD_NUTTX_FETURES +static int Hc08Ioctl(struct Adapter *adapter, int cmd, void *args) +{ + if (OPE_INT != cmd) { + printf("Hc08Ioctl only support OPE_INT, do not support %d\n", cmd); + return -1; + } + + uint32_t baud_rate = *((uint32_t *)args); + + PrivIoctl(adapter->fd, OPE_INT, baud_rate); + + //Step1 : detect hc08 serial function + if (Hc08AtConfigure(adapter->agent, HC08_AT_CMD_DETECT, NULL, NULL) < 0) { + return -1; + } + + //Step2 : set hc08 device serial baud, hc08_set_baud send "AT+BAUD=%s" + if (Hc08AtConfigure(adapter->agent, HC08_AT_CMD_SET_BAUDRATE, args, NULL) < 0) { + return -1; + } + + PrivTaskDelay(200); + + //Step3 : show hc08 device info, hc08_get send "AT+RX" response device info + char device_info[HC08_RESP_DEFAULT_SIZE * 2] = {0}; + if (Hc08AtConfigure(adapter->agent, HC08_AT_CMD_GET_DEVICE_INFO, NULL, device_info) < 0) { + return -1; + } + + ADAPTER_DEBUG("Hc08 ioctl done\n"); + + return 0; +} +#else static int Hc08Ioctl(struct Adapter *adapter, int cmd, void *args) { if (OPE_INT != cmd) { @@ -283,6 +318,7 @@ static int Hc08Ioctl(struct Adapter *adapter, int cmd, void *args) return 0; } +#endif static int Hc08SetAddr(struct Adapter *adapter, const char *ip, const char *gateway, const char *netmask) { @@ -348,7 +384,7 @@ static int Hc08Send(struct Adapter *adapter, const void *buf, size_t len) EntmSend(adapter->agent, (const char *)buf, len); } else { printf("Hc08Send can not find agent\n"); - } + } return 0; } @@ -358,7 +394,7 @@ static int Hc08Recv(struct Adapter *adapter, void *buf, size_t len) return EntmRecv(adapter->agent, (char *)buf, len, 40); } else { printf("Hc08Recv can not find agent\n"); - } + } return -1; } diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/btnsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/btnsh/defconfig new file mode 100644 index 000000000..fff76d485 --- /dev/null +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/btnsh/defconfig @@ -0,0 +1,65 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +CONFIG_ADD_NUTTX_FETURES=y +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="xidatong" +CONFIG_ARCH_BOARD_XIDATONG=y +CONFIG_ARCH_CHIP="imxrt" +CONFIG_ARCH_CHIP_IMXRT=y +CONFIG_ARCH_CHIP_MIMXRT1052CVL5B=y +CONFIG_ARCH_INTERRUPTSTACK=10240 +CONFIG_ARCH_STACKDUMP=y +CONFIG_ARMV7M_DCACHE=y +CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y +CONFIG_ARMV7M_ICACHE=y +CONFIG_ARMV7M_USEBASEPRI=y +CONFIG_BOARD_LOOPSPERMSEC=104926 +CONFIG_BUILTIN=y +CONFIG_CLOCK_MONOTONIC=y +CONFIG_EXAMPLES_HELLO=y +CONFIG_IMXRT_GPIO_IRQ=y +CONFIG_IMXRT_GPIO3_0_15_IRQ=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_IMXRT_LPUART1=y +CONFIG_INTELHEX_BINARY=y +CONFIG_LPUART1_SERIAL_CONSOLE=y +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_DISABLE_IFUPDOWN=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_RAM_SIZE=524288 +CONFIG_RAM_START=0x20200000 +CONFIG_RAW_BINARY=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_WAITPID=y +CONFIG_START_DAY=14 +CONFIG_START_MONTH=3 +CONFIG_SYSTEM_NSH=y +CONFIG_DEV_GPIO=y +CONFIG_READLINE_CMD_HISTORY=y +CONFIG_READLINE_CMD_HISTORY_LEN=100 +CONFIG_READLINE_CMD_HISTORY_LINELEN=120 +CONFIG_READLINE_TABCOMPLETION=y +CONFIG_FS_ROMFS=y +CONFIG_NSH_ROMFSETC=y +CONFIG_NSH_ARCHROMFS=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BSP_USING_CH438=y +CONFIG_CH438_EXTUART2=y +CONFIG_CH438_EXTUART2_BAUD=9600 +CONFIG_SUPPORT_CONNECTION_FRAMEWORK=y +CONFIG_CONNECTION_FRAMEWORK_DEBUG=y +CONFIG_CONNECTION_ADAPTER_BLUETOOTH=y +CONFIG_ADAPTER_HC08=y +CONFIG_ADAPTER_BLUETOOTH_HC08="hc08" +CONFIG_ADAPTER_HC08_WORK_ROLE="M" +CONFIG_ADAPTER_HC08_DRIVER_EXTUART=y +CONFIG_ADAPTER_HC08_DRIVER="/dev/extuart_dev2" +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/Kconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/Kconfig index 215fedfe3..1e689be28 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/Kconfig +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/Kconfig @@ -672,6 +672,10 @@ config NSH_DISABLE_E220_LORA_SEND bool "Disable e220 Lora send." default n +config NSH_DISABLE_ADAPTER_BLUETOOTH_TEST + bool "Disable hc08 AdapterBlueToothTest." + default n + config NSH_DISABLE_K210_FFT bool "Disable the K210 fft device." default n diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h index 9574506eb..81c1fceae 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h @@ -1502,6 +1502,10 @@ int nsh_foreach_var(FAR struct nsh_vtbl_s *vtbl, nsh_foreach_var_t cb, int cmd_E220LoraSend(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv); #endif +#if defined(CONFIG_ADAPTER_BLUETOOTH_HC08) && !defined(CONFIG_NSH_DISABLE_ADAPTER_BLUETOOTH_TEST) + int cmd_AdapterBlueToothTest(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv); +#endif + #if defined(CONFIG_K210_FFT_TEST) && !defined(CONFIG_NSH_DISABLE_K210_FFT) int cmd_fft(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv); #endif diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c index 9357d46ae..6329d7e6e 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c @@ -327,6 +327,17 @@ int cmd_E220LoraSend(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv) } #endif +#if defined(CONFIG_ADAPTER_BLUETOOTH_HC08) && !defined(CONFIG_NSH_DISABLE_ADAPTER_BLUETOOTH_TEST) +extern int AdapterBlueToothTest(void); +int cmd_AdapterBlueToothTest(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv) +{ + nsh_output(vtbl, "Hello, world!\n"); + FrameworkInit(); + AdapterBlueToothTest(); + return OK; +} +#endif + #if defined(CONFIG_K210_FFT_TEST) && !defined(CONFIG_NSH_DISABLE_K210_FFT) extern void nuttx_k210_fft_test(void); int cmd_fft(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv) diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c index c1714e701..641662dd5 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c @@ -674,6 +674,9 @@ static const struct cmdmap_s g_cmdmap[] = { "E220Send", cmd_E220LoraSend, 1, 2, "[e220loraSend ]" }, #endif +#if defined(CONFIG_ADAPTER_BLUETOOTH_HC08) && !defined(CONFIG_NSH_DISABLE_ADAPTER_BLUETOOTH_TEST) + { "AdapterBlueToothTest", cmd_AdapterBlueToothTest, 1, 1, "[BlueTooth hc08 test.]" }, +#endif #if defined(CONFIG_K210_FFT_TEST) && !defined(CONFIG_NSH_DISABLE_K210_FFT) { "fft", cmd_fft, 1, 1, "[K210 fft function.]" }, From 07723b25ef444e10de456fa76a31f3aad1cbc657 Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Mon, 16 May 2022 10:33:50 +0800 Subject: [PATCH 34/46] Modify comments of adapter_4g.c --- APP_Framework/Framework/connection/4g/adapter_4g.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/APP_Framework/Framework/connection/4g/adapter_4g.c b/APP_Framework/Framework/connection/4g/adapter_4g.c index 9877e10b2..80b76b682 100644 --- a/APP_Framework/Framework/connection/4g/adapter_4g.c +++ b/APP_Framework/Framework/connection/4g/adapter_4g.c @@ -89,7 +89,7 @@ int Adapter4GTest(void) struct Adapter* adapter = AdapterDeviceFindByName(ADAPTER_4G_NAME); #ifdef ADAPTER_EC200T - //Using Hang Xiao server to test 4G Socket connection + /* Using Public TCP server to test 4G Socket connection */ uint8 server_addr[64] = "120.76.100.197"; uint8 server_port[64] = "10002"; From 36f4e3bfb8351b6b11977815f77bbc84f2eb89e7 Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Mon, 16 May 2022 14:28:04 +0800 Subject: [PATCH 35/46] sd card and usb delete romfs on xidatong --- .../aiit_board/xidatong/configs/sdionsh/defconfig | 3 --- .../aiit_board/xidatong/configs/usbnsh/defconfig | 3 --- 2 files changed, 6 deletions(-) diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/sdionsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/sdionsh/defconfig index 93439f8e9..905f43d15 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/sdionsh/defconfig +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/sdionsh/defconfig @@ -68,8 +68,5 @@ CONFIG_READLINE_CMD_HISTORY=y CONFIG_READLINE_CMD_HISTORY_LEN=100 CONFIG_READLINE_CMD_HISTORY_LINELEN=120 CONFIG_READLINE_TABCOMPLETION=y -CONFIG_FS_ROMFS=y -CONFIG_NSH_ROMFSETC=y -CONFIG_NSH_ARCHROMFS=y CONFIG_BOARDCTL_RESET=y CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/usbnsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/usbnsh/defconfig index 291d9b2c5..5f0409e29 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/usbnsh/defconfig +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/usbnsh/defconfig @@ -67,8 +67,5 @@ CONFIG_READLINE_CMD_HISTORY=y CONFIG_READLINE_CMD_HISTORY_LEN=100 CONFIG_READLINE_CMD_HISTORY_LINELEN=120 CONFIG_READLINE_TABCOMPLETION=y -CONFIG_FS_ROMFS=y -CONFIG_NSH_ROMFSETC=y -CONFIG_NSH_ARCHROMFS=y CONFIG_BOARDCTL_RESET=y CONFIG_USER_ENTRYPOINT="nsh_main" From 85374ebcd022968c45fbda581f66549e5953e22e Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Mon, 16 May 2022 17:56:04 +0800 Subject: [PATCH 36/46] set CONFIG_NSH_FILEIOSIZE=32768 for usb and sdcard --- .../aiit_board/xidatong/configs/sdionsh/defconfig | 3 ++- .../aiit_board/xidatong/configs/usbnsh/defconfig | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/sdionsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/sdionsh/defconfig index 905f43d15..8f33ec725 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/sdionsh/defconfig +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/sdionsh/defconfig @@ -45,7 +45,7 @@ CONFIG_NSH_ARCHINIT=y CONFIG_NSH_BUILTIN_APPS=y CONFIG_NSH_CMDOPT_DD_STATS=y CONFIG_NSH_DISABLE_IFUPDOWN=y -CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_FILEIOSIZE=32768 CONFIG_NSH_LINELEN=64 CONFIG_NSH_READLINE=y CONFIG_RAM_SIZE=524288 @@ -63,6 +63,7 @@ CONFIG_START_MONTH=3 CONFIG_SYSTEM_CLE_CMD_HISTORY=y CONFIG_SYSTEM_COLOR_CLE=y CONFIG_FS_AUTOMOUNTER=y +CONFIG_XIDATONG_SDIO_AUTOMOUNT=y CONFIG_SYSTEM_NSH=y CONFIG_READLINE_CMD_HISTORY=y CONFIG_READLINE_CMD_HISTORY_LEN=100 diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/usbnsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/usbnsh/defconfig index 5f0409e29..0b3687f87 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/usbnsh/defconfig +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/usbnsh/defconfig @@ -39,7 +39,7 @@ CONFIG_NSH_ARCHINIT=y CONFIG_NSH_BUILTIN_APPS=y CONFIG_NSH_CMDOPT_DD_STATS=y CONFIG_NSH_DISABLE_IFUPDOWN=y -CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_FILEIOSIZE=32768 CONFIG_NSH_LINELEN=64 CONFIG_NSH_READLINE=y CONFIG_RAM_SIZE=524288 @@ -62,6 +62,7 @@ CONFIG_USBDEV=y CONFIG_USBHOST=y CONFIG_USBHOST_MSC=y CONFIG_USBHOST_MSC_NOTIFIER=y +CONFIG_XIDATONG_USB_AUTOMOUNT=y CONFIG_DEV_GPIO=y CONFIG_READLINE_CMD_HISTORY=y CONFIG_READLINE_CMD_HISTORY_LEN=100 From 04ec9ca069cff0f52a6b52a70bdc34dc31578aaf Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Wed, 18 May 2022 13:36:39 +0800 Subject: [PATCH 37/46] test e220 lora with AdapterLoraTest --- Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h | 2 +- .../app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c | 2 +- .../app_match_nuttx/apps/nshlib/nsh_command.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h index 81c1fceae..771b8b4de 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h @@ -1486,7 +1486,7 @@ int nsh_foreach_var(FAR struct nsh_vtbl_s *vtbl, nsh_foreach_var_t cb, int cmd_recvzigbee(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv); #endif -#if defined(CONFIG_ADAPTER_SX1278) && !defined(CONFIG_NSH_DISABLE_ADAPTER_LORATEST) +#if (defined(CONFIG_ADAPTER_LORA_SX1278) || defined(CONFIG_ADAPTER_LORA_E220)) && !defined(CONFIG_NSH_DISABLE_ADAPTER_LORATEST) int cmd_AdapterLoraTest(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv); #endif diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c index 6329d7e6e..961c524c8 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c @@ -283,7 +283,7 @@ int cmd_recvzigbee(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv) } #endif -#if defined(CONFIG_ADAPTER_SX1278) && !defined(CONFIG_NSH_DISABLE_ADAPTER_LORATEST) +#if (defined(CONFIG_ADAPTER_LORA_SX1278) || defined(CONFIG_ADAPTER_LORA_E220)) && !defined(CONFIG_NSH_DISABLE_ADAPTER_LORATEST) extern int AdapterLoraTest(void); int cmd_AdapterLoraTest(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv) { diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c index 641662dd5..6526c2b70 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c @@ -658,7 +658,7 @@ static const struct cmdmap_s g_cmdmap[] = { "recvzigbee", cmd_recvzigbee, 1, 1, "[receive message.]" }, #endif -#if defined(CONFIG_ADAPTER_SX1278) && !defined(CONFIG_NSH_DISABLE_ADAPTER_LORATEST) +#if (defined(CONFIG_ADAPTER_LORA_SX1278) || defined(CONFIG_ADAPTER_LORA_E220)) && !defined(CONFIG_NSH_DISABLE_ADAPTER_LORATEST) { "AdapterLoraTest", cmd_AdapterLoraTest, 1, 1, "[Lora sx128 test.]" }, #endif From 60e35914a5b6a13588a843de4ea3e7c862cb002b Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Wed, 18 May 2022 17:19:47 +0800 Subject: [PATCH 38/46] fix sem bug in function PrivSemaphoreObtainWait for nuttx --- .../Framework/transform_layer/nuttx/transform.c | 12 +++++++----- .../Framework/transform_layer/nuttx/transform.h | 1 - 2 files changed, 7 insertions(+), 6 deletions(-) diff --git a/APP_Framework/Framework/transform_layer/nuttx/transform.c b/APP_Framework/Framework/transform_layer/nuttx/transform.c index e8d10d294..d01176541 100644 --- a/APP_Framework/Framework/transform_layer/nuttx/transform.c +++ b/APP_Framework/Framework/transform_layer/nuttx/transform.c @@ -55,17 +55,19 @@ int PrivSemaphoreDelete(sem_t *sem) int PrivSemaphoreObtainWait(sem_t *sem, const struct timespec *abstime) { + /* if the timeout is not set, it will be blocked all the time. */ + if(!abstime) + { + return sem_wait(sem); + } + + /* if the timeout time is set, it will be executed downward after the timeout, and will not be blocked. */ struct timespec timeout; clock_gettime(CLOCK_REALTIME, &timeout); timeout.tv_sec += abstime->tv_sec; return sem_timedwait(sem, &timeout); } -int PrivSemaphoreObtainWaitForever(sem_t *sem) -{ - return sem_wait(sem); -} - int PrivSemaphoreObtainNoWait(sem_t *sem) { return sem_trywait(sem); diff --git a/APP_Framework/Framework/transform_layer/nuttx/transform.h b/APP_Framework/Framework/transform_layer/nuttx/transform.h index 4ac1ca2fa..39e868a8b 100644 --- a/APP_Framework/Framework/transform_layer/nuttx/transform.h +++ b/APP_Framework/Framework/transform_layer/nuttx/transform.h @@ -182,7 +182,6 @@ int PrivMutexAbandon(pthread_mutex_t *p_mutex); int PrivSemaphoreCreate(sem_t *sem, int pshared, unsigned int value); int PrivSemaphoreDelete(sem_t *sem); int PrivSemaphoreObtainWait(sem_t *sem, const struct timespec *abstime); -int PrivSemaphoreObtainWaitForever(sem_t *sem); int PrivSemaphoreObtainNoWait(sem_t *sem); int PrivSemaphoreAbandon(sem_t *sem); int32_t PrivSemaphoreSetValue(int32_t sem, uint16_t val); From a9410bd9b1e37d83711e4f3b5dbd354cbec1c76f Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Tue, 24 May 2022 16:29:46 +0800 Subject: [PATCH 39/46] add timeout for adapter_lora.c PrivSemaphoreObtainWait function --- .../Framework/connection/lora/adapter_lora.c | 11 ++++++++-- .../transform_layer/nuttx/transform.h | 20 +++++++++---------- 2 files changed, 18 insertions(+), 13 deletions(-) diff --git a/APP_Framework/Framework/connection/lora/adapter_lora.c b/APP_Framework/Framework/connection/lora/adapter_lora.c index 5a5f268e4..0051bb487 100644 --- a/APP_Framework/Framework/connection/lora/adapter_lora.c +++ b/APP_Framework/Framework/connection/lora/adapter_lora.c @@ -50,6 +50,8 @@ extern AdapterProductInfoType E220Attach(struct Adapter *adapter); #define ADAPTER_LORA_RECEIVE_ERROR_CNT 1 +#define DEFAULT_SEM_TIMEOUT 10 + //need to change status if the lora client wants to quit the net when timeout or a certain event //eg.can also use sem to trigger quit function static int g_adapter_lora_quit_flag = 0; @@ -453,7 +455,10 @@ static int LoraClientDataAnalyze(struct Adapter *adapter, void *send_buf, int le int ret = 0; uint8_t client_id = adapter->net_role_id; - ret = PrivSemaphoreObtainWait(&adapter->sem, NULL); + struct timespec abstime; + abstime.tv_sec = DEFAULT_SEM_TIMEOUT; + + ret = PrivSemaphoreObtainWait(&adapter->sem, &abstime); if (0 == ret) { //only handle this client_id information from gateway if ((client_recv_data_format[client_id - 1].client_id == adapter->net_role_id) && @@ -681,6 +686,8 @@ static void *LoraReceiveTask(void *parameter) void LoraGatewayProcess(struct Adapter *lora_adapter, struct LoraGatewayParam *gateway) { int i, ret = 0; + struct timespec abstime; + abstime.tv_sec = DEFAULT_SEM_TIMEOUT; #ifdef GATEWAY_CMD_MODE for (i = 0; i < gateway->client_num; i ++) { @@ -692,7 +699,7 @@ void LoraGatewayProcess(struct Adapter *lora_adapter, struct LoraGatewayParam *g continue; } - ret = PrivSemaphoreObtainWait(&gateway_recv_data_sem, NULL); + ret = PrivSemaphoreObtainWait(&gateway_recv_data_sem, &abstime); if (0 == ret) { printf("LoraGatewayProcess receive client %d data done\n", gateway->client_id[i]); } diff --git a/APP_Framework/Framework/transform_layer/nuttx/transform.h b/APP_Framework/Framework/transform_layer/nuttx/transform.h index 39e868a8b..71b4f48e7 100644 --- a/APP_Framework/Framework/transform_layer/nuttx/transform.h +++ b/APP_Framework/Framework/transform_layer/nuttx/transform.h @@ -29,6 +29,7 @@ #include #include #include +#include typedef uint8_t uint8; typedef uint16_t uint16; @@ -44,23 +45,23 @@ typedef int64_t int64; extern "C" { #endif -#define OPE_INT 0x0000 -#define OPE_CFG 0x0001 +#define OPE_INT 0x0000 +#define OPE_CFG 0x0001 -#define NAME_NUM_MAX 32 +#define NAME_NUM_MAX 32 /*********************GPIO define*********************/ #define GPIO_LOW 0x00 #define GPIO_HIGH 0x01 -#define GPIO_CFG_OUTPUT 0x00 -#define GPIO_CFG_INPUT 0x01 -#define GPIO_CFG_INPUT_PULLUP 0x02 +#define GPIO_CFG_OUTPUT 0x00 +#define GPIO_CFG_INPUT 0x01 +#define GPIO_CFG_INPUT_PULLUP 0x02 #define GPIO_CFG_INPUT_PULLDOWN 0x03 -#define GPIO_CFG_OUTPUT_OD 0x04 +#define GPIO_CFG_OUTPUT_OD 0x04 -#define GPIO_CONFIG_MODE 0xffffffff +#define GPIO_CONFIG_MODE 0xffffffff /********************SERIAL define*******************/ #define BAUD_RATE_2400 2400 @@ -174,9 +175,6 @@ int PrivMutexDelete(pthread_mutex_t *p_mutex); int PrivMutexObtain(pthread_mutex_t *p_mutex); int PrivMutexAbandon(pthread_mutex_t *p_mutex); - - - /*********************semaphore**********************/ int PrivSemaphoreCreate(sem_t *sem, int pshared, unsigned int value); From 7ea3b595c2756edcadc7a6023c35b364d31e2eef Mon Sep 17 00:00:00 2001 From: wlyu Date: Wed, 1 Jun 2022 14:54:42 +0800 Subject: [PATCH 40/46] support lcd and touchscreen --- .../xidatong/configs/lcdnsh/defconfig | 109 ++ .../aiit_board/xidatong/src/Makefile | 4 + .../aiit_board/xidatong/src/imxrt_bringup.c | 17 + .../aiit_board/xidatong/src/imxrt_gt9xx.c | 328 ++++ .../aiit_board/xidatong/src/imxrt_gt9xx.h | 27 + .../app_match_nuttx/build.sh | 0 .../nuttx/drivers/input/Kconfig | 570 +++++++ .../nuttx/drivers/input/Make.defs | 100 ++ .../nuttx/drivers/input/gt9xx.c | 1417 +++++++++++++++++ .../nuttx/include/nuttx/input/gt9xx.h | 165 ++ 10 files changed, 2737 insertions(+) create mode 100755 Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/lcdnsh/defconfig create mode 100755 Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_gt9xx.c create mode 100755 Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_gt9xx.h mode change 100644 => 100755 Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/build.sh create mode 100755 Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/input/Kconfig create mode 100755 Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/input/Make.defs create mode 100755 Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/input/gt9xx.c create mode 100755 Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/include/nuttx/input/gt9xx.h diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/lcdnsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/lcdnsh/defconfig new file mode 100755 index 000000000..7083d8a39 --- /dev/null +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/lcdnsh/defconfig @@ -0,0 +1,109 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +CONFIG_ADD_NUTTX_FETURES=y +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="xidatong" +CONFIG_ARCH_BOARD_XIDATONG=y +CONFIG_ARCH_CHIP="imxrt" +CONFIG_ARCH_CHIP_IMXRT=y +CONFIG_ARCH_CHIP_MIMXRT1052CVL5B=y +CONFIG_ARCH_INTERRUPTSTACK=10240 +CONFIG_ARCH_STACKDUMP=y +CONFIG_ARMV7M_DCACHE=y +CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y +CONFIG_ARMV7M_ICACHE=y +CONFIG_ARMV7M_USEBASEPRI=y +CONFIG_BOARD_LOOPSPERMSEC=104926 +CONFIG_BUILTIN=y +CONFIG_CLOCK_MONOTONIC=y +CONFIG_EXAMPLES_HELLO=y +CONFIG_IMXRT_GPIO_IRQ=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_IMXRT_LPUART1=y +CONFIG_INTELHEX_BINARY=y +CONFIG_LPUART1_SERIAL_CONSOLE=y +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_DISABLE_IFUPDOWN=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_RAM_SIZE=524288 +CONFIG_RAM_START=0x20200000 +CONFIG_RAW_BINARY=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_WAITPID=y +CONFIG_START_DAY=14 +CONFIG_START_MONTH=3 +CONFIG_SYSTEM_NSH=y +CONFIG_DEV_GPIO=y +CONFIG_READLINE_CMD_HISTORY=y +CONFIG_READLINE_CMD_HISTORY_LEN=100 +CONFIG_READLINE_CMD_HISTORY_LINELEN=120 +CONFIG_READLINE_TABCOMPLETION=y + +CONFIG_USER_ENTRYPOINT="nsh_main" + +CONFIG_IMXRT_LPI2C=y +CONFIG_IMXRT_LCD=y +CONFIG_IMXRT_LPI2C1=y +CONFIG_LPI2C1_BUSYIDLE=0 +CONFIG_LPI2C1_FILTSCL=0 +CONFIG_LPI2C1_FILTSDA=0 +CONFIG_IMXRT_GPIO2_16_31_IRQ=y + +CONFIG_IMXRT_LPI2C_DYNTIMEO=y +CONFIG_IMXRT_LPI2C_DYNTIMEO_USECPERBYTE=500 +CONFIG_IMXRT_LPI2C_DYNTIMEO_STARTSTOP=1000 +CONFIG_IMXRT_LPI2C_TIMEOSEC=0 +CONFIG_IMXRT_LCD_VIDEO_PLL_FREQ=92000000 +CONFIG_IMXRT_LCD_VRAMBASE=0x80000000 +CONFIG_IMXRT_LCD_REFRESH_FREQ=60 +CONFIG_IMXRT_LCD_BACKLIGHT=y +CONFIG_IMXRT_LCD_INPUT_BPP16=y +CONFIG_IMXRT_LCD_OUTPUT_16=y +CONFIG_IMXRT_LCD_BACKCOLOR=0x0 +CONFIG_IMXRT_LCD_HWIDTH=480 +CONFIG_IMXRT_LCD_HPULSE=41 +CONFIG_IMXRT_LCD_HFRONTPORCH=4 +CONFIG_IMXRT_LCD_HBACKPORCH=8 +CONFIG_IMXRT_LCD_VHEIGHT=272 +CONFIG_IMXRT_LCD_VPULSE=10 +CONFIG_IMXRT_LCD_VFRONTPORCH=4 +CONFIG_IMXRT_LCD_VBACKPORCH=2 +CONFIG_IMXRT_DATAEN_ACTIVE_HIGH=y +CONFIG_IMXRT_DATA_RISING_EDGE=y + +CONFIG_I2C=y +CONFIG_I2C_DRIVER=y +CONFIG_ARCH_HAVE_SPI_CS_CONTROL=y +CONFIG_SPI=y +CONFIG_SPI_EXCHANGE=y + +CONFIG_FB_MODULEINFO=y +CONFIG_DRIVERS_VIDEO=y +CONFIG_VIDEO_FB=y +CONFIG_INPUT=y +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_INPUT_GT9XX=y + +CONFIG_FS_PROCFS=y +CONFIG_FS_PROCFS_MAX_TASKS=128 +CONFIG_FS_PROCFS_EXCLUDE_ENVIRON=y + +CONFIG_EXAMPLES_FB=y +CONFIG_EXAMPLES_FB_DEFAULTFB="/dev/fb0" +CONFIG_EXAMPLES_FB_PROGNAME="fb" +CONFIG_EXAMPLES_FB_PRIORITY=100 +CONFIG_EXAMPLES_FB_STACKSIZE=2048 + +CONFIG_EXAMPLES_TOUCHSCREEN=y +CONFIG_EXAMPLES_TOUCHSCREEN_MINOR=0 +CONFIG_EXAMPLES_TOUCHSCREEN_DEVPATH="/dev/input0" +CONFIG_EXAMPLES_TOUCHSCREEN_NSAMPLES=0 + diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/Makefile b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/Makefile index 45b928370..528b9f1cc 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/Makefile +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/Makefile @@ -82,6 +82,10 @@ ifeq ($(CONFIG_XIDATONG_SDIO_AUTOMOUNT),y) CSRCS += imxrt_mmcsd_automount.c endif +ifeq ($(CONFIG_INPUT_GT9XX),y) +CSRCS += imxrt_gt9xx.c +endif + ifeq ($(CONFIG_BSP_USING_CH438),y) CSRCS += imxrt_ch438.c ch438_demo.c endif diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_bringup.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_bringup.c index 7f6b1ee72..18922681b 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_bringup.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_bringup.c @@ -51,6 +51,10 @@ # include "imxrt_ch438.h" #endif +#ifdef CONFIG_INPUT_GT9XX +#include "imxrt_gt9xx.h" +#endif + #include "xidatong.h" #include /* Must always be included last */ @@ -187,6 +191,19 @@ int imxrt_bringup(void) board_ch438_initialize(); #endif +#ifdef CONFIG_INPUT_GT9XX + /* Initialize the GT9XX touchscreen driver */ + + ret = imxrt_gt9xx_register(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: imxrt_ft5x06_register() failed: %d\n", ret); + } + + syslog(LOG_NOTICE, "Start initialize %d ok ...\n", ret); + +#endif + UNUSED(ret); return OK; } diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_gt9xx.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_gt9xx.c new file mode 100755 index 000000000..427f79a9c --- /dev/null +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_gt9xx.c @@ -0,0 +1,328 @@ +/**************************************************************************** + * boards/arm/imxrt/xidatong/src/imxrt_gt9xx.c + * + * Copyright 2019 ElFaro LAB S.L. All rights reserved. + * Author: Fabio Balzano + * + * Based on boards/arm/lpc54xx/lpcxpresso-lpc54628/src/lpc54_ft5x06.c + * Copyright (C) 2017 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/** + * @file imxrt_gt9xx.c + * @brief gt9xx touch driver refer to imxrt_ft5x06.c + * @version 1.0 + * @author AIIT XUOS Lab + * @date 2022.5.31 + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include + +#include "imxrt_config.h" +#include "imxrt_gpio.h" +#include "imxrt_lpi2c.h" + +#include "arch/chip/irq.h" +#include "imxrt_iomuxc.h" + +#define gt_print printf + +#define GT9XX_I2C_ADDRESS 0x5D + +#define GPIO_GT9XX_INTR IMXRT_IRQ_GPIO2_30 + +#define IOMUX_GT9XX_RST (IOMUX_PULL_NONE | IOMUX_CMOS_OUTPUT | \ + IOMUX_DRIVE_40OHM | IOMUX_SPEED_MEDIUM | \ + IOMUX_SLEW_SLOW) + +#define GPIO_GT9XX_CTRSTN (GPIO_OUTPUT | GPIO_OUTPUT_ZERO | \ + GPIO_PORT2 | GPIO_PIN30 | IOMUX_GT9XX_RST) + +#define GPIO_GT9XX_CTINTN (GPIO_INTERRUPT | GPIO_INT_RISINGEDGE | \ + IOMUX_SW_DEFAULT | GPIO_PORT2 | GPIO_PIN30 ) + +#ifdef CONFIG_INPUT_GT9XX + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define GT9XX_FREQUENCY 400000 + +/**************************************************************************** + * Private Function Ptototypes + ****************************************************************************/ + +#ifndef CONFIG_GT9XX_POLLMODE +static int imxrt_gt9xx_attach(FAR const struct gt9xx_config_s *config, + xcpt_t isr, FAR void *arg); +static void imxrt_gt9xx_enable(FAR const struct gt9xx_config_s *config, + bool enable); +static void imxrt_gt9xx_clear(FAR const struct gt9xx_config_s *config); +#endif + +static void imxrt_gt9xx_wakeup(FAR const struct gt9xx_config_s *config); +static void imxrt_gt9xx_nreset(FAR const struct gt9xx_config_s *config, + bool state); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const struct gt9xx_config_s g_gt9xx_config = +{ + .address = GT9XX_I2C_ADDRESS, + .frequency = GT9XX_FREQUENCY, +#ifndef CONFIG_GT9XX_POLLMODE + .attach = imxrt_gt9xx_attach, + .enable = imxrt_gt9xx_enable, + .clear = imxrt_gt9xx_clear, +#endif + .wakeup = imxrt_gt9xx_wakeup, + .nreset = imxrt_gt9xx_nreset +}; + +#ifndef CONFIG_GT9XX_POLLMODE +static uint8_t g_gt9xx_irq; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: imxrt_gt9xx_attach + * + * Description: + * Attach an GT9XX interrupt handler to a GPIO interrupt + * + ****************************************************************************/ + +#ifndef CONFIG_GT9XX_POLLMODE +static int imxrt_gt9xx_attach(FAR const struct gt9xx_config_s *config, + xcpt_t isr, FAR void *arg) +{ + return irq_attach(g_gt9xx_irq, isr, arg); +} +#endif + +/**************************************************************************** + * Name: imxrt_gt9xx_enable + * + * Description: + * Enable or disable a GPIO interrupt + * + ****************************************************************************/ + +#ifndef CONFIG_GT9XX_POLLMODE +static void imxrt_gt9xx_enable(FAR const struct gt9xx_config_s *config, + bool enable) +{ + if (enable) + { + up_enable_irq(g_gt9xx_irq); + } + else + { + up_disable_irq(g_gt9xx_irq); + } +} +#endif + +/**************************************************************************** + * Name: imxrt_gt9xx_clear + * + * Description: + * Acknowledge/clear any pending GPIO interrupt + * + ****************************************************************************/ + +#ifndef CONFIG_GT9XX_POLLMODE +static void imxrt_gt9xx_clear(FAR const struct gt9xx_config_s *config) +{ + imxrt_gpioirq_disable(g_gt9xx_irq); +} +#endif + +/**************************************************************************** + * Name: imxrt_gt9xx_wakeup + * + * Description: + * Issue WAKE interrupt to GT9XX to change the GT9XX from Hibernate to + * Active mode. + * + ****************************************************************************/ + +static void imxrt_gt9xx_wakeup(FAR const struct gt9xx_config_s *config) +{ + /* We do not have access to the WAKE pin in the implementation */ +} + +/**************************************************************************** + * Name: imxrt_gt9xx_nreset + * + * Description: + * Control the chip reset pin (active low) + * + ****************************************************************************/ + +static void imxrt_gt9xx_nreset(FAR const struct gt9xx_config_s *config, + bool nstate) +{ + imxrt_gpio_write(GPIO_GT9XX_CTRSTN, nstate); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#define IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_MASK (0x7U) +#define IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_SHIFT (0U) + +#define IOMUXC_SW_MUX_CTL_PAD_MUX_MODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_SHIFT)) & IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_MASK) +#define IOMUXC_SW_MUX_CTL_PAD_SION_MASK (0x10U) +#define IOMUXC_SW_MUX_CTL_PAD_SION_SHIFT (4U) + +#define IOMUXC_SW_MUX_CTL_PAD_SION(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_MUX_CTL_PAD_SION_SHIFT)) & IOMUXC_SW_MUX_CTL_PAD_SION_MASK) + +#define IOMUXC_GPIO_B1_14_GPIO2_IO30 0x401F81B4U, 0x5U, 0, 0, 0x401F83A4U + +static inline void IOMUXC_SetPinMux(uint32_t muxRegister, + uint32_t muxMode, + uint32_t inputRegister, + uint32_t inputDaisy, + uint32_t configRegister, + uint32_t inputOnfield) +{ + *((volatile uint32_t *)muxRegister) = + IOMUXC_SW_MUX_CTL_PAD_MUX_MODE(muxMode) | IOMUXC_SW_MUX_CTL_PAD_SION(inputOnfield); + + if (inputRegister) + { + *((volatile uint32_t *)inputRegister) = inputDaisy; + } +} + +static inline void IOMUXC_SetPinConfig(uint32_t muxRegister, + uint32_t muxMode, + uint32_t inputRegister, + uint32_t inputDaisy, + uint32_t configRegister, + uint32_t configValue) +{ + if (configRegister) + { + *((volatile uint32_t *)configRegister) = configValue; + } +} + +void imxrt_config_gt9xx_pins(void) +{ + IOMUXC_SetPinMux( + IOMUXC_GPIO_B1_14_GPIO2_IO30, /* WAKEUP is configured as GPIO5_IO00 */ + 0U); /* Software Input On Field: Input Path is determined by functionality */ + + IOMUXC_SetPinConfig( + IOMUXC_GPIO_B1_14_GPIO2_IO30, + 0x10B0u); +} + +/**************************************************************************** + * Name: imxrt_gt9xx_register + * + * Description: + * Register the GT9XX touch panel driver + * + ****************************************************************************/ + +int imxrt_gt9xx_register(void) +{ + FAR struct i2c_master_s *i2c; + int ret; + + /* Initialize CTRSTN pin */ + imxrt_config_gpio(GPIO_GT9XX_CTRSTN); + imxrt_gpio_write(GPIO_GT9XX_CTRSTN, false); + +#ifndef CONFIG_GT9XX_POLLMODE + int irq; + + /* Initialize GPIO interrupt pin. */ + imxrt_config_gpio(GPIO_GT9XX_CTINTN); + + irq = GPIO_GT9XX_INTR; + DEBUGASSERT(irq > 0 && irq < UINT8_MAX); + g_gt9xx_irq = (uint8_t)irq; + + /* Make sure that the interrupt is disabled at the NVIC */ + imxrt_gpioirq_disable(irq); + up_disable_irq(irq); +#endif + + /* Take the GT9XX out of reset */ + + /* The GT9XX is on LPI2C1. Get the handle and register the GT9XX device */ + + i2c = imxrt_i2cbus_initialize(1); + if (i2c == NULL) + { + syslog(LOG_ERR, "ERROR: Failed to get LPI2C1 interface\n"); + return -ENODEV; + } + else + { + ret = gt9xx_register(i2c, &g_gt9xx_config, 0); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to register GT9XX driver: %d\n", ret); + imxrt_gpio_write(GPIO_GT9XX_CTRSTN, false); + imxrt_i2cbus_uninitialize(i2c); + return ret; + } + } + + return OK; +} + +#endif /* CONFIG_INPUT_GT9XX*/ diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_gt9xx.h b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_gt9xx.h new file mode 100755 index 000000000..073c044ba --- /dev/null +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_gt9xx.h @@ -0,0 +1,27 @@ +/* + * Copyright (c) 2022 AIIT XUOS Lab + * XiUOS is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * http://license.coscl.org.cn/MulanPSL2 + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, + * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, + * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ + +/** + * @file imxrt_gt9xx.h + * @brief API for imxrt gt9xx. + * @version 1.0 + * @author AIIT XUOS Lab + * @date 2022.5.31 + */ + +#ifndef __IMXRT_GT9XX_H_ +#define __IMXRT_GT9XX_H_ + +int imxrt_gt9xx_register(void); + +#endif /* __IMXRT_GT9XX_H__ */ + diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/build.sh b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/build.sh old mode 100644 new mode 100755 diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/input/Kconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/input/Kconfig new file mode 100755 index 000000000..68504001c --- /dev/null +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/input/Kconfig @@ -0,0 +1,570 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +menuconfig INPUT + bool "Input Device Support" + default n + ---help--- + This directory holds implementations of input device drivers. + This includes such things as touchscreen and keypad drivers. + See include/nuttx/input/*.h for registration information. + +if INPUT + +config INPUT_MOUSE + bool "Enable mouse support" + default n + ---help--- + Enable support for mouse devices. + +if INPUT_MOUSE + +config INPUT_MOUSE_WHEEL + bool "Enable mouse wheel support" + default n + ---help--- + Enable support for a 4-button mouse report that includes a while + position. + +endif # INPUT_MOUSE + +config INPUT_TOUCHSCREEN + bool + default n + +config INPUT_MAX11802 + bool "MAX11802 touchscreen controller" + default n + select SPI + select INPUT_TOUCHSCREEN + ---help--- + Enable support for the MAX11802 touchscreen controller + +config INPUT_TSC2007 + bool "TI TSC2007 touchscreen controller" + default n + select I2C + select INPUT_TOUCHSCREEN + ---help--- + Enable support for the TI TSC2007 touchscreen controller + +if INPUT_TSC2007 + +config TSC2007_8BIT + bool "TSC2007 8-bit Conversions" + default n + ---help--- + Use faster, but less accurate, 8-bit conversions. Default: 12-bit conversions. + +config TSC2007_MULTIPLE + bool "Multiple TSC2007 Devices" + default n + ---help--- + Can be defined to support multiple TSC2007 devices on board. + +config TSC2007_NPOLLWAITERS + int "Number TSC2007 poll waiters" + default 4 + ---help--- + Maximum number of threads that can be waiting on poll() + +endif # INPUT_TSC2007 + +config INPUT_FT5X06 + bool "FocalTech FT5x06 multi-touch, capacitive touch panel controller" + default n + select I2C + select INPUT_TOUCHSCREEN + ---help--- + Enable support for the FocalTech FT5x06 multi-touch, capacitive + touch panel controller + +config INPUT_GT9XX + bool "Goodix GT9XX touch panel controller" + default n + select I2C + select INPUT_TOUCHSCREEN + ---help--- + Enable support for the Goodix GT9XX multi-touch, capacitive + touch panel controller + +config INPUT_FT5336 + bool "FocalTech FT5336 multi-touch, capacitive touch panel controller" + default n + select I2C + select INPUT_FT5X06 + select INPUT_TOUCHSCREEN + depends on EXPERIMENTAL + ---help--- + Enable support for the FocalTech FT5x06 multi-touch, capacitive + touch panel controller + +if INPUT_FT5X06 + +config FT5X06_POLLMODE + bool "Polled mode" + default n + ---help--- + Run the FT5x06 in a non-interrupt driven polled mode. Events will + not be driven by interrupts but rather based on a timed poll. + + This is a non-optimal design both because (1) it will lead to delays + in detecting touch related events and (2) it will consume a + significant amount of CPU time to perform the polling. + +config FT5X06_SWAPXY + bool "Swap X/Y" + default n + ---help--- + Reverse the meaning of X and Y to handle different LCD orientations. + +config FT5X06_SINGLEPOINT + bool "Single point" + default n + ---help--- + Do no report multi-touch events + +if FT5X06_SINGLEPOINT + +config FT5X06_THRESHX + int "X threshold" + default 12 + ---help--- + New touch positions will only be reported when the X or Y data changes by these + thresholds. This trades reduced data rates for some loss in dragging accuracy. For + 12-bit values the raw ranges are 0-4095. So for example, if your display is + 320x240, then THRESHX=13 and THRESHY=17 would correspond to one pixel. Default: 12 + +config FT5X06_THRESHY + int "Y threshold" + default 12 + ---help--- + New touch positions will only be reported when the X or Y data changes by these + thresholds. This trades reduced data rates for some loss in dragging accuracy. For + 12-bit values the raw ranges are 0-4095. So for example, if your display is + 320x240, then THRESHX=13 and THRESHY=17 would correspond to one pixel. Default: 12 + +endif # FT5X06_SINGLEPOINT + +config FT5X06_NPOLLWAITERS + int "Number FT5336/FT5x06 poll waiters" + default 4 + ---help--- + Maximum number of threads that can be waiting on poll() + +endif # INPUT_FT5X06 + +config INPUT_ADS7843E + bool "TI ADS7843/TSC2046 touchscreen controller" + default n + select SPI + select INPUT_TOUCHSCREEN + ---help--- + Enable support for the TI/Burr-Brown ADS7842 touchscreen controller. I believe + that driver should be compatible with the TI/Burr-Brown TSC2046 and XPT2046 + touchscreen controllers as well. + +if INPUT_ADS7843E + +config ADS7843E_MULTIPLE + bool "Multiple ADS7843E Devices" + default n + ---help--- + Can be defined to support multiple ADS7843E devices on board. + +config ADS7843E_NPOLLWAITERS + int "Number poll waiters" + default 4 + ---help--- + Maximum number of threads that can be waiting on poll() + +config ADS7843E_SPIDEV + int "SPI bus number" + default 0 + ---help--- + Selects the SPI bus number identifying that SPI interface that + connects the ADS843E to the MCU. + +config ADS7843E_DEVMINOR + int "Input device minor number" + default 0 + ---help--- + The ADS7843E device will be registered as /dev/inputN where N is the + value provided by this setting. + +config ADS7843E_SPIMODE + int "SPI mode" + default 0 + range 0 3 + ---help--- + Controls the SPI mode. The device should work in mode 0, but + sometimes you need to experiment. + +config ADS7843E_FREQUENCY + int "SPI frequency" + default 100000 + ---help--- + Define to use a different SPI bus frequency. + +config ADS7843E_SWAPXY + bool "Swap X/Y" + default n + ---help--- + Reverse the meaning of X and Y to handle different LCD orientations. + +config ADS7843E_THRESHX + int "X threshold" + default 12 + ---help--- + New touch positions will only be reported when the X or Y data changes by these + thresholds. This trades reduced data rates for some loss in dragging accuracy. For + 12-bit values the raw ranges are 0-4095. So for example, if your display is + 320x240, then THRESHX=13 and THRESHY=17 would correspond to one pixel. Default: 12 + +config ADS7843E_THRESHY + int "Y threshold" + default 12 + ---help--- + New touch positions will only be reported when the X or Y data changes by these + thresholds. This trades reduced data rates for some loss in dragging accuracy. For + 12-bit values the raw ranges are 0-4095. So for example, if your display is + 320x240, then THRESHX=13 and THRESHY=17 would correspond to one pixel. Default: 12 + +endif # INPUT_ADS7843E + +config INPUT_MXT + bool "Atmel maXTouch Driver" + select INPUT_TOUCHSCREEN + default n + ---help--- + Enables support for the Atmel maXTouch driver + +if INPUT_MXT + +config MXT_THRESHX + int "X threshold" + default 5 + ---help--- + New touch positions will only be reported when the X or Y data + changes by these thresholds. This trades reduced data rates for some + loss in dragging accuracy. For 12-bit values the raw ranges are + 0-4095. So for example, if your display is 800x480, then THRESHX=5 + and THRESHY=8 would correspond to a one pixel change. Default: 5 + + NOTE: This does nothing to reduce the interrupt rate. It only + reduces the rate at which touch events are reports. + +config MXT_THRESHY + int "Y threshold" + default 8 + ---help--- + New touch positions will only be reported when the X or Y data + changes by these thresholds. This trades reduced data rates for some + loss in dragging accuracy. For 12-bit values the raw ranges are + 0-4095. So for example, if your display is 800x480, then THRESHX=5 + and THRESHY=8 would correspond to a one pixel change. Default: 8 + + NOTE: This does nothing to reduce the interrupt rate. It only + reduces the rate at which touch events are reports. + +config MXT_NPOLLWAITERS + int "Number poll waiters" + default 4 + ---help--- + Maximum number of threads that can be waiting on poll() + +config MXT_DISABLE_CONFIG_DEBUG_INFO + bool "Disable verbose debug output" + default y + depends on DEBUG_INPUT_INFO + ---help--- + The maXTouch tends to generate interrupts at a high rate during the + contact. If verbose debug is enabled in this driver, you may not + be able to get anything done because of the high debug output rate. + + This setting will allow you to keep verbose touchscreen debug output + in other modules, but to specifically suppress the debug out from + the MXT driver. Debug (non-verbose) errors will still be generated, + but the chit-chat level will be eliminated. + +endif # INPUT_MXT + +config INPUT_STMPE811 + bool "STMicro STMPE811 Driver" + default n + select INPUT_TOUCHSCREEN + ---help--- + Enables support for the STMPE811 driver + +if INPUT_STMPE811 + +choice + prompt "STMPE Interface" + default STMPE811_I2C + +config STMPE811_SPI + bool "SPI Interface" + select SPI + ---help--- + Enables support for the SPI interface (not currently supported) + +config STMPE811_I2C + bool "STMPE811 I2C Interface" + select I2C + ---help--- + Enables support for the I2C interface + +endchoice + +config STMPE811_ACTIVELOW + bool "Active Low Interrupt" + default n + ---help--- + The STMPE811 interrupt is provided by a discrete input (usually a + GPIO interrupt on most MCU architectures). This setting determines + whether the interrupt is active high (or rising edge triggered) or + active low (or falling edge triggered). Default: Active + high/rising edge. + +config STMPE811_EDGE + bool "Edge triggered Interrupt" + default n + ---help--- + The STMPE811 interrupt is provided by a discrete input (usually a + GPIO interrupt on most MCU architectures). This setting determines + whether the interrupt is edge or level triggered. Default: Level + triggered. + +config STMPE811_MULTIPLE + bool "Multiple STMPE811 Devices" + default n + ---help--- + Can be defined to support multiple STMPE811 devices on board. + +config STMPE811_NPOLLWAITERS + int "Number poll waiters" + default 4 + ---help--- + Maximum number of threads that can be waiting on poll() + +config STMPE811_TSC_DISABLE + bool "Disable STMPE811 Touchscreen Support" + default n + ---help--- + Disable driver touchscreen functionality. + +config STMPE811_SWAPXY + bool "Swap X/Y" + default n + depends on !STMPE811_TSC_DISABLE + ---help--- + Reverse the meaning of X and Y to handle different LCD orientations. + +config STMPE811_THRESHX + int "X threshold" + default 12 + depends on !STMPE811_TSC_DISABLE + ---help--- + STMPE811 touchscreen data comes in a a very high rate. New touch positions + will only be reported when the X or Y data changes by these thresholds. + This trades reduced data rates for some loss in dragging accuracy. The + STMPE811 is configure for 12-bit values the raw ranges are 0-4095. So + for example, if your display is 320x240, then THRESHX=13 and THRESHY=17 + would correspond to one pixel. Default: 12 + +config STMPE811_THRESHY + int "Y threshold" + default 12 + depends on !STMPE811_TSC_DISABLE + ---help--- + STMPE811 touchscreen data comes in a a very high rate. New touch positions + will only be reported when the X or Y data changes by these thresholds. + This trades reduced data rates for some loss in dragging accuracy. The + STMPE811 is configure for 12-bit values the raw ranges are 0-4095. So + for example, if your display is 320x240, then THRESHX=13 and THRESHY=17 + would correspond to one pixel. Default: 12 + +config STMPE811_ADC_DISABLE + bool "Disable STMPE811 ADC Support" + default y + ---help--- + Disable driver ADC functionality. + +config STMPE811_GPIO_DISABLE + bool "Disable STMPE811 GPIO Support" + default y + ---help--- + Disable driver GPIO functionality. + +config STMPE811_GPIOINT_DISABLE + bool "Disable STMPE811 GPIO Interrupt Support" + default y + depends on !STMPE811_GPIO_DISABLE + ---help--- + Disable driver GPIO interrupt functionality (ignored if GPIO functionality is + disabled). + +config STMPE811_TEMP_DISABLE + bool "Disable STMPE811 Temperature Sensor Support" + default y + ---help--- + Disable driver temperature sensor functionality. + +config STMPE811_REGDEBUG + bool "Enable Register-Level STMPE811 Debug" + default n + depends on DEBUG_FEATURES + ---help--- + Enable very low register-level debug output. + +endif # INPUT_STMPE811 + +config INPUT_CYPRESS_MBR3108 + bool "Enable Cypress MBR3108 CapSense driver" + default n + select INPUT_TOUCHSCREEN + ---help--- + Enable support for Cypress MBR3108 CapSense touch button & proximity + input sensor. + +if INPUT_CYPRESS_MBR3108 + +config INPUT_CYPRESS_MBR3108_DEBUG + bool "Enable debug support for Cypress sensor" + default n + depends on DEBUG_FEATURES + ---help--- + Enable debugging traces for MBR3108 driver + +config INPUT_CYPRESS_MBR3108_NPOLLWAITERS + int "Number of waiters to poll" + default 1 + ---help--- + Maximum number of threads that can be waiting on poll() + +endif # INPUT_CYPRESS_MBR3108 + +config INPUT_BUTTONS + bool "Button Inputs" + default n + ---help--- + Enable standard button upper half driver. + +if INPUT_BUTTONS + +config INPUT_BUTTONS_LOWER + bool "Generic Lower Half Button Driver" + default n + depends on ARCH_BUTTONS && ARCH_IRQBUTTONS + ---help--- + If the board supports the standard button interfaces as + defined in include/nuttx/board.h header file, then this + standard button lower half driver might be usable. + + In order for this generic driver to be usable: + + 1. The board implementation must provide the button + interfaces as defined in include/nuttx/board.h + 2. The board implementation must support interrupts for each + button. + + If your board does not meet these requirements, then the + button_lower.c file can still be copied to your your + board src/ directory and modified for your specific board + requirements. + +config INPUT_BUTTONS_NPOLLWAITERS + int "Max Number of Poll Waiters" + default 2 + +endif # INPUT_BUTTONS + +config INPUT_DJOYSTICK + bool "Discrete Joystick" + default n + ---help--- + Enable standard discrete joystick upper half driver. A discrete + joystick refers to a joystick that could be implemented entirely + with GPIO input pins. So up, down, left, and right are all discrete + values like buttons (as opposed to integer values like you might + obtain from an analog joystick). + +if INPUT_DJOYSTICK + +config INPUT_DJOYSTICK_NPOLLWAITERS + int "Max Number of Poll Waiters" + default 2 + +endif # INPUT_DJOYSTICK + +config INPUT_AJOYSTICK + bool "Analog Joystick" + default n + ---help--- + Enable standard analog joystick upper half driver. An analog + joystick refers to a joystick that provides position data as an + integer value that might have been obtained through Analog- + to-Digital Conversion (ADC). The analog positional data may also + be accompanied by discrete button data. + +if INPUT_AJOYSTICK + +config INPUT_AJOYSTICK_NPOLLWAITERS + int "Max Number of Poll Waiters" + default 2 + +endif # INPUT_AJOYSTICK + +config INPUT_NUNCHUCK + bool "Nintendo Wii Nunchuck Joystick (White Model)" + default n + select I2C + ---help--- + Enable a Nintendo Wii Nunchuck joystick upper half driver. The + nunchuck joystick provides position data as an integer value.The + analog positional data may also be accompanied by discrete + button data. + +if INPUT_NUNCHUCK + +config NUNCHUCK_NPOLLWAITERS + int "Max Number of Poll Waiters" + default 2 + +endif # INPUT_NUNCHUCK + +config INPUT_SPQ10KBD + bool "Solder Party Q10 BlackBerry Keyboard" + default n + select I2C + ---help--- + Enable the Solder Party Q10 BlackBerry Keyboard support. This + exposes itself as a standard keyboard at /dev/kbdN. + This keyboard exists both as a standalone module and integrated + into the Solder Party Keyboard FeatherWing. Information on this + can be found at https://www.solder.party/docs/keyboard-pmod/ + +if INPUT_SPQ10KBD + +config SPQ10KBD_DJOY + bool "Joystick Interface for Buttons" + select INPUT_DJOYSTICK + default n + +config SPQ10KBD_REGDBG + bool "Keyboard Register Debug" + default n + +config SPQ10KBD_BUFSIZE + int "Keyboard Buffer Size" + default 10 + +config SPQ10KBD_NPOLLWAITERS + int "Max Number of Poll Waiters" + default 2 + +endif # INPUT_SPQ10KBD + +endif # INPUT diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/input/Make.defs b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/input/Make.defs new file mode 100755 index 000000000..605f6ae3b --- /dev/null +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/input/Make.defs @@ -0,0 +1,100 @@ +############################################################################ +# drivers/input/Make.defs +# +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. +# +############################################################################ + +# Don't build anything if there is no support for input devices + +ifeq ($(CONFIG_INPUT),y) + +# Include the selected touchscreen drivers + +ifeq ($(CONFIG_INPUT_TSC2007),y) + CSRCS += tsc2007.c +endif + +ifeq ($(CONFIG_INPUT_FT5X06),y) + CSRCS += ft5x06.c +endif + +ifeq ($(CONFIG_INPUT_GT9XX),y) + CSRCS += gt9xx.c +endif + +ifeq ($(CONFIG_INPUT_ADS7843E),y) + CSRCS += ads7843e.c +endif + +ifeq ($(CONFIG_INPUT_MAX11802),y) + CSRCS += max11802.c +endif + +ifeq ($(CONFIG_INPUT_MXT),y) + CSRCS += mxt.c +endif + +ifeq ($(CONFIG_INPUT_STMPE811),y) + CSRCS += stmpe811_base.c +ifneq ($(CONFIG_INPUT_STMPE811_TSC_DISABLE),y) + CSRCS += stmpe811_tsc.c +endif +ifneq ($(CONFIG_INPUT_STMPE811_GPIO_DISABLE),y) + CSRCS += stmpe811_gpio.c +endif +ifneq ($(CONFIG_INPUT_STMPE811_ADC_DISABLE),y) + CSRCS += stmpe811_adc.c +endif +ifneq ($(CONFIG_INPUT_STMPE811_TEMP_DISABLE),y) + CSRCS += stmpe811_temp.c +endif +endif + +ifeq ($(CONFIG_INPUT_CYPRESS_MBR3108),y) + CSRCS += cypress_mbr3108.c +endif + +ifeq ($(CONFIG_INPUT_BUTTONS),y) + CSRCS += button_upper.c +ifeq ($(CONFIG_INPUT_BUTTONS_LOWER),y) + CSRCS += button_lower.c +endif + +endif + +ifeq ($(CONFIG_INPUT_DJOYSTICK),y) + CSRCS += djoystick.c +endif + +ifeq ($(CONFIG_INPUT_AJOYSTICK),y) + CSRCS += ajoystick.c +endif + +ifeq ($(CONFIG_INPUT_NUNCHUCK),y) + CSRCS += nunchuck.c +endif + +ifeq ($(CONFIG_INPUT_SPQ10KBD),y) + CSRCS += spq10kbd.c +endif + +# Include input device driver build support + +DEPPATH += --dep-path input +VPATH += :input +CFLAGS += ${shell $(INCDIR) "$(CC)" $(TOPDIR)$(DELIM)drivers$(DELIM)input} +endif diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/input/gt9xx.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/input/gt9xx.c new file mode 100755 index 000000000..77496d9cf --- /dev/null +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/input/gt9xx.c @@ -0,0 +1,1417 @@ +/**************************************************************************** + * drivers/input/gt9xx.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* References: + * Dec. 18, 2012 + */ + +/* The FT5x06 Series ICs are single-chip capacitive touch panel controller + * ICs with a built-in 8 bit Micro-controller unit (MCU). They adopt the + * mutual capacitance approach, which supports true multi-touch capability. + * In conjunction with a mutual capacitive touch panel, the FT5x06 have + * user-friendly input functions, which can be applied on many portable + * devices, such as cellular phones, MIDs, netbook and notebook personal + * computers. + */ + +/** + * @file gt9xx.c + * @brief refer to imxrt_gt9xx.c codes. + * @version 1.0 + * @author AIIT XUOS Lab + * @date 2022.5.31 + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Driver support ***********************************************************/ + +/* This format is used to construct the /dev/input[n] device driver path. It + * defined here so that it will be used consistently in all places. + */ + +#define DEV_FORMAT "/dev/input%d" +#define DEV_NAMELEN 16 + +#define GT9XX_VER_LEN 8 +#define GT9XX_INF_LEN 6 +#define GT9XX_CFG_LEN 3 + +/* In polled mode, the polling rate will decrease when there is no touch + * activity. These definitions represent the maximum and the minimum + * polling rates. + */ + +#define POLL_MINDELAY MSEC2TICK(50) +#define POLL_MAXDELAY MSEC2TICK(200) +#define POLL_INCREMENT MSEC2TICK(10) + +#define gt_print printf + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/* This structure describes the state of one GT9xx driver instance */ + +struct gt9xx_dev_s +{ + uint8_t crefs; /* Number of times the device + * has been opened */ + uint8_t nwaiters; /* Number of threads waiting for + * GT9xx data */ + volatile bool valid; /* True: New, valid touch data + * in touchbuf[] */ +#ifdef CONFIG_GT9XX_SINGLEPOINT + uint8_t lastid; /* Last reported touch id */ + uint8_t lastevent; /* Last reported event */ + int16_t lastx; /* Last reported X position */ + int16_t lasty; /* Last reported Y position */ +#endif + sem_t devsem; /* Manages exclusive access to + * this structure */ + sem_t waitsem; /* Used to wait for the + * availability of data */ + uint32_t frequency; /* Current I2C frequency */ +#ifdef CONFIG_GT9XX_POLLMODE + uint32_t delay; /* Current poll delay */ +#endif + + FAR const struct gt9xx_config_s *config; /* Board configuration data */ + FAR struct i2c_master_s *i2c; /* Saved I2C driver instance */ + struct work_s work; /* Supports the interrupt + * handling "bottom half" */ +#ifdef CONFIG_GT9XX_POLLMODE + struct wdog_s polltimer; /* Poll timer */ +#endif + uint8_t touchbuf[GT9XX_TOUCH_DATA_LEN]; /* Raw touch data */ + + /* The following is a list if poll structures of threads waiting for + * driver events. The 'struct pollfd' reference for each open is also + * retained in the f_priv field of the 'struct file'. + */ + + struct pollfd *fds[CONFIG_GT9XX_NPOLLWAITERS]; +}; + +// support 480 * 272 +uint8_t gt9xx_cfg_data[] = { + 0x5B, 0xE0, 0x01, 0x10, 0x01, 0x0A, 0x0D, 0x00, 0x01, 0x0A, + 0x28, 0x0F, 0x5A, 0x3C, 0x03, 0x05, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x87, 0x28, 0x09, + 0x32, 0x34, 0x0C, 0x08, 0x00, 0x00, 0x00, 0x02, 0x02, 0x1D, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x28, 0x55, 0x94, 0xC5, 0x02, 0x07, 0x00, 0x00, 0x04, + 0x8D, 0x2B, 0x00, 0x80, 0x32, 0x00, 0x75, 0x3A, 0x00, 0x6C, + 0x43, 0x00, 0x64, 0x4F, 0x00, 0x64, 0x00, 0x00, 0x00, 0x00, + 0xF0, 0x4A, 0x3A, 0xFF, 0xFF, 0x27, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x06, 0x08, 0x0A, 0x0C, 0x0E, 0x10, 0x12, + 0x14, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x26, 0x24, 0x22, 0x21, 0x20, 0x1F, 0x1E, 0x1D, + 0x0C, 0x0A, 0x08, 0x06, 0x04, 0x02, 0x00, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x81, 0x01 +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static void gt9xx_notify(FAR struct gt9xx_dev_s *priv); +static void gt9xx_data_worker(FAR void *arg); +#ifdef CONFIG_GT9XX_POLLMODE +static void gt9xx_poll_timeout(wdparm_t arg); +#else +static int gt9xx_data_interrupt(int irq, FAR void *context, FAR void *arg); +#endif +static ssize_t gt9xx_sample(FAR struct gt9xx_dev_s *priv, FAR char *buffer, + size_t len); +static ssize_t gt9xx_waitsample(FAR struct gt9xx_dev_s *priv, + FAR char *buffer, size_t len); +static int gt9xx_bringup(FAR struct gt9xx_dev_s *priv); +static void gt9xx_shutdown(FAR struct gt9xx_dev_s *priv); + +/* Character driver methods */ + +static int gt9xx_open(FAR struct file *filep); +static int gt9xx_close(FAR struct file *filep); +static ssize_t gt9xx_read(FAR struct file *filep, FAR char *buffer, + size_t len); +static int gt9xx_ioctl(FAR struct file *filep, int cmd, + unsigned long arg); +static int gt9xx_poll(FAR struct file *filep, struct pollfd *fds, + bool setup); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* This the vtable that supports the character driver interface */ + +static const struct file_operations gt9xx_fops = +{ + gt9xx_open, /* open */ + gt9xx_close, /* close */ + gt9xx_read, /* read */ + NULL, /* write */ + NULL, /* seek */ + gt9xx_ioctl, /* ioctl */ + gt9xx_poll /* poll */ +#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS + , NULL /* unlink */ +#endif +}; + +/* Maps GT9xx touch events into bit encoded representation used by NuttX */ + +static const uint8_t g_event_map[4] = +{ + (TOUCH_DOWN | TOUCH_ID_VALID | TOUCH_POS_VALID), /* GT9XX_DOWN */ + (TOUCH_UP | TOUCH_ID_VALID), /* GT9XX_UP */ + (TOUCH_MOVE | TOUCH_ID_VALID | TOUCH_POS_VALID), /* GT9XX_CONTACT */ + TOUCH_ID_VALID /* GT9XX_INVALID */ +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static int gt9xx_write_reg(FAR struct gt9xx_dev_s *priv, uint8_t *reg_val, uint16_t len) +{ + FAR const struct gt9xx_config_s *config; + struct i2c_msg_s msg[2]; + int ret; + int retries = 0; + + config = priv->config; + DEBUGASSERT(config != NULL); + + msg[0].frequency = priv->frequency; + msg[0].addr = config->address; + msg[0].flags = 0; + msg[0].buffer = reg_val; + msg[0].length = len; + + while(retries < 5) + { + ret = I2C_TRANSFER(priv->i2c, msg, 1); + if(ret == 2) break; + retries ++; + } + if (ret < 0) + { + ierr("gt: [%s] failed freq %ld addr %x ret %d\n", __func__, priv->frequency, config->address, ret); + return ret; + } + return ret; +} + +static int gt9xx_read_reg(FAR struct gt9xx_dev_s *priv, uint8_t *reg_addr, uint8_t *reg_val, uint16_t len) +{ + FAR const struct gt9xx_config_s *config; + struct i2c_msg_s msg[2]; + int ret; + int retries = 0; + + config = priv->config; + DEBUGASSERT(config != NULL); + + msg[0].frequency = priv->frequency; + msg[0].addr = config->address; + msg[0].flags = 0; + msg[0].buffer = reg_addr; + msg[0].length = GT9XX_ADDR_LENGTH; + + msg[1].frequency = priv->frequency; + msg[1].addr = config->address; + msg[1].flags = I2C_M_READ; + msg[1].buffer = reg_val; + msg[1].length = len - GT9XX_ADDR_LENGTH; + while(retries < 5) + { + ret = I2C_TRANSFER(priv->i2c, msg, 2); + if(ret == 2) break; + retries ++; + } + if (ret < 0) + { + ierr("gt: [%s] failed freq %ld addr %x ret %d\n", __func__, priv->frequency, config->address, ret); + return ret; + } + return ret; +} + +/**************************************************************************** + * Name: gt9xx_write_config + ****************************************************************************/ + +static int gt9xx_write_config(FAR struct gt9xx_dev_s *priv) +{ + int i, ret = -1; + uint8_t check_sum = 0; + uint8_t offet = 0x80FE - 0x8047 + 1 ; + + const uint8_t* cfg_info = gt9xx_cfg_data; + uint8_t cfg_info_len = sizeof(gt9xx_cfg_data) / sizeof(gt9xx_cfg_data[0]); + + uint8_t reg_data[GT9XX_CONFIG_MAX_LENGTH + GT9XX_ADDR_LENGTH] + = {GT9XX_REG_CONFIG_DATA >> 8, GT9XX_REG_CONFIG_DATA & 0xff}; + + memset(®_data[GT9XX_ADDR_LENGTH], 0, GT9XX_CONFIG_MAX_LENGTH); + memcpy(®_data[GT9XX_ADDR_LENGTH], cfg_info, cfg_info_len); + + check_sum = 0; + + for (i = GT9XX_ADDR_LENGTH; i < offet + GT9XX_ADDR_LENGTH; i++) + { + check_sum += reg_data[i]; + } + + reg_data[offet + GT9XX_ADDR_LENGTH] = (~check_sum) + 1; //checksum + reg_data[offet + GT9XX_ADDR_LENGTH + 1] = 1; //refresh + + gt_print("Driver send config."); + + ret = gt9xx_write_reg(priv, reg_data, offet + GT9XX_ADDR_LENGTH + 2); + + return ret; +} + + +/**************************************************************************** + * Name: gt9xx_notify + ****************************************************************************/ + +static void gt9xx_notify(FAR struct gt9xx_dev_s *priv) +{ + int i; + + /* If there are threads waiting on poll() for GT9xx data to become + * available, then wake them up now. NOTE: we wake up all waiting threads + * because we do not know that they are going to do. If they all try to + * read the data, then some make end up blocking after all. + */ + + for (i = 0; i < CONFIG_GT9XX_NPOLLWAITERS; i++) + { + struct pollfd *fds = priv->fds[i]; + if (fds) + { + fds->revents |= POLLIN; + iinfo("Report events: %02x\n", fds->revents); + nxsem_post(fds->sem); + } + } + + /* If there are threads waiting for read data, then signal one of them + * that the read data is available. + */ + + if (priv->nwaiters > 0) + { + /* After posting this semaphore, we need to exit because the GT9xx + * is no longer available. + */ + + nxsem_post(&priv->waitsem); + } +} + +/**************************************************************************** + * Name: gt9xx_data_worker + ****************************************************************************/ + +static void gt9xx_data_worker(FAR void *arg) +{ + FAR struct gt9xx_dev_s *priv = (FAR struct gt9xx_dev_s *)arg; + FAR const struct gt9xx_config_s *config; + FAR struct gt9xx_touch_data_s *sample; + uint8_t regaddr[3]; + int ret; + + /* Get a pointer the callbacks for convenience */ + + DEBUGASSERT(priv != NULL && priv->config != NULL); + config = priv->config; + + /* We need to have exclusive access to the touchbuf so that we do not + * corrupt any read operation that is in place. + */ + do + { + ret = nxsem_wait_uninterruptible(&priv->devsem); + + /* This would only fail if something canceled the worker thread? + * That is not expected. + */ + + DEBUGASSERT(ret == OK || ret == -ECANCELED); + } + while (ret < 0); + + /* Read touch data */ + + /* Set up the address write operation */ + + regaddr[0] = GT9XX_REG_READ_COOR >> 8; + regaddr[1] = GT9XX_REG_READ_COOR & 0xFF; + + ret = gt9xx_read_reg(priv, regaddr, priv->touchbuf, GT9XX_TOUCH_DATA_LEN); + + if (ret >= 0) + { + /* In polled mode, we may read invalid touch data. If there is + * no touch data, the GT9xx returns all 0xff the very first time. + * After that, it returns the same old stale data when there is + * no touch data. + */ + + if(priv->touchbuf[0] & 0xf) + { + gt_print("gt: [%s] get i2c %x reg %x %x ret %d\n", __func__, config->address, regaddr[0], regaddr[1], ret); + for(int i = 0; i < 10; i ++) + { + gt_print("%x ", priv->touchbuf[i]); + } + gt_print("\n"); + } + + sample = (FAR struct gt9xx_touch_data_s *)priv->touchbuf; + + /* Notify waiters (only if we ready some valid data). + * + * REVISIT: For improved performance consider moving the duplicate + * report and thresholding logic from gt9xx_sample() to here. That + * would save a context switch. + */ + sample->tdstatus &= 0xf; + + if (sample->tdstatus <= GT9XX_MAX_TOUCHES) + { + /* Notify any waiters that new GT9xx data is available */ + + priv->valid = true; + gt9xx_notify(priv); + } + +#ifdef CONFIG_GT9XX_POLLMODE + /* Update the poll rate */ + + if (sample->tdstatus > 0 && sample->tdstatus <= GT9XX_MAX_TOUCHES) + { + /* Keep it at the minimum if touches are detected. */ + + priv->delay = POLL_MINDELAY; + } + else if (priv->delay < POLL_MAXDELAY) + { + /* Otherwise, let the poll rate rise gradually up to the maximum + * if there is no touch. + */ + + priv->delay += POLL_INCREMENT; + } +#endif + } + + /* cmd end */ + gt9xx_write_reg(priv, regaddr, 3); + +#ifdef CONFIG_GT9XX_POLLMODE + /* Exit, re-starting the poll. */ + + wd_start(&priv->polltimer, priv->delay, + gt9xx_poll_timeout, (wdparm_t)priv); + +#else + /* Exit, re-enabling GT9xx interrupts */ + config->enable(config, true); +#endif + + nxsem_post(&priv->devsem); +} + +/**************************************************************************** + * Name: gt9xx_poll_timeout + ****************************************************************************/ + +#ifdef CONFIG_GT9XX_POLLMODE +static void gt9xx_poll_timeout(wdparm_t arg) +{ + FAR struct gt9xx_dev_s *priv = (FAR struct gt9xx_dev_s *)arg; + int ret; + + /* Transfer processing to the worker thread. Since GT9xx poll timer is + * disabled while the work is pending, no special action should be + * required to protected the work queue. + */ + + DEBUGASSERT(priv->work.worker == NULL); + ret = work_queue(HPWORK, &priv->work, gt9xx_data_worker, priv, 0); + if (ret != 0) + { + ierr("ERROR: Failed to queue work: %d\n", ret); + } +} +#endif + +/**************************************************************************** + * Name: gt9xx_data_interrupt + ****************************************************************************/ + +#ifndef CONFIG_GT9XX_POLLMODE +static int gt9xx_data_interrupt(int irq, FAR void *context, FAR void *arg) +{ + FAR struct gt9xx_dev_s *priv = (FAR struct gt9xx_dev_s *)arg; + FAR const struct gt9xx_config_s *config; + int ret; + + /* Get a pointer the callbacks for convenience (and so the code is not so + * ugly). + */ + + config = priv->config; + DEBUGASSERT(config != NULL); + + /* Disable further interrupts */ + + config->enable(config, false); + + /* Transfer processing to the worker thread. Since GT9xx interrupts are + * disabled while the work is pending, no special action should be required + * to protected the work queue. + */ + + DEBUGASSERT(priv->work.worker == NULL); + ret = work_queue(HPWORK, &priv->work, gt9xx_data_worker, priv, 0); + if (ret != 0) + { + ierr("ERROR: Failed to queue work: %d\n", ret); + } + + /* Clear any pending interrupts and return success */ + + config->clear(config); + return OK; +} +#endif + +/**************************************************************************** + * Name: gt9xx_sample + ****************************************************************************/ + +#ifdef CONFIG_GT9XX_SINGLEPOINT +static ssize_t gt9xx_sample(FAR struct gt9xx_dev_s *priv, FAR char *buffer, + size_t len) +{ + FAR struct gt9xx_touch_data_s *raw; + FAR struct gt9xx_touch_point_s *touch; + FAR struct touch_sample_s *sample; + FAR struct touch_point_s *point; + int16_t x; + int16_t y; + uint8_t event; + uint8_t id; + uint8_t finger; + + if (!priv->valid) + { + return 0; /* Nothing to read */ + } + + /* Raw data pointers (source) */ + + raw = (FAR struct gt9xx_touch_data_s *)priv->touchbuf; + touch = raw->touch; + + finger = priv->touchbuf[0]; + + if(finger == 0x0) + { + goto reset_and_drop; + } + + if((finger & 0x80) == 0) + { + goto reset_and_drop; + } + + if((finger & 0xf) == 0) + { + goto reset_and_drop; + } + + /* Get the reported X and Y positions */ +#ifdef CONFIG_GT9XX_SWAPXY + y = TOUCH_POINT_GET_X(touch[0]); + x = TOUCH_POINT_GET_Y(touch[0]); +#else + x = TOUCH_POINT_GET_X(touch[0]); + y = TOUCH_POINT_GET_Y(touch[0]); +#endif + + /* Get the touch point ID and event */ + + event = GT9XX_DOWN; + id = TOUCH_POINT_GET_ID(touch[0]); + + if (event == GT9XX_INVALID) + { + priv->lastevent = GT9XX_INVALID; + goto reset_and_drop; + } + + gt_print("gt: [%s] event %d id %d\n", __func__, event, id); + + if (id == priv->lastid && event == priv->lastevent) + { + /* Same ID and event.. Is there positional data? */ + + if (raw->tdstatus == 0 || event == GT9XX_UP) + { + /* No... no new touch data */ + + goto reset_and_drop; + } + else + { + int16_t deltax; + int16_t deltay; + + /* Compare the change in position from the last report. */ + + deltax = (x - priv->lastx); + if (deltax < 0) + { + deltax = -deltax; + } + + if (deltax < CONFIG_GT9XX_THRESHX) + { + /* There as been no significant change in X, try Y */ + + deltay = (y - priv->lasty); + if (deltay < 0) + { + deltay = -deltay; + } + + if (deltax < CONFIG_GT9XX_THRESHX) + { + /* Ignore... no significant change in Y either */ + + goto drop; + } + } + } + } + + priv->lastid = id; + priv->lastevent = event; + priv->lastx = x; + priv->lasty = y; + + /* User data buffer points (sink) */ + + /* Return the number of touches read */ + + sample = (FAR struct touch_sample_s *)buffer; + sample->npoints = 1; + + /* Decode and return the single touch point */ + + point = sample->point; + point[0].id = id; + point[0].flags = g_event_map[event]; + point[0].x = x; + point[0].y = y; + point[0].h = 0; + point[0].w = 0; + point[0].pressure = 0; + + priv->valid = false; + return SIZEOF_TOUCH_SAMPLE_S(1); + +reset_and_drop: + priv->lastx = 0; + priv->lasty = 0; +drop: + priv->valid = false; + return 0; /* No new touches read. */ +} +#else +static ssize_t gt9xx_sample(FAR struct gt9xx_dev_s *priv, FAR char *buffer, + size_t len) +{ + FAR struct gt9xx_touch_data_s *raw; + FAR struct gt9xx_touch_point_s *touch; + FAR struct touch_sample_s *sample; + FAR struct touch_point_s *point; + unsigned int maxtouches; + unsigned int ntouches; + int i; + + maxtouches = (len - sizeof(int)) / sizeof(struct touch_point_s); + DEBUGASSERT(maxtouches > 0); /* Already verified */ + + if (!priv->valid) + { + return 0; /* Nothing to read */ + } + + /* Raw data pointers (source) */ + + raw = (FAR struct gt9xx_touch_data_s *)priv->touchbuf; + touch = raw->touch; + + /* Decode number of touches */ + + ntouches = raw->tdstatus; + DEBUGASSERT(ntouches <= GT9XX_MAX_TOUCHES); + + if (ntouches > maxtouches) + { + ntouches = maxtouches; + } + + if (ntouches < 1) + { + priv->valid = false; + return 0; /* No touches read. */ + } + + /* User data buffer points (sink) */ + + sample = (FAR struct touch_sample_s *)buffer; + point = sample->point; + + /* Return the number of touches read */ + + sample->npoints = ntouches; + + /* Decode and return the touch points */ + + for (i = 0; i < ntouches; i++) + { + int event = TOUCH_POINT_GET_EVENT(touch[i]); + + point[i].id = TOUCH_POINT_GET_ID(touch[i]); + point[i].flags = g_event_map[event]; +#ifdef CONFIG_GT9XX_SWAPXY + point[i].y = TOUCH_POINT_GET_X(touch[i]); + point[i].x = TOUCH_POINT_GET_Y(touch[i]); +#else + point[i].x = TOUCH_POINT_GET_X(touch[i]); + point[i].y = TOUCH_POINT_GET_Y(touch[i]); +#endif + point[i].h = 0; + point[i].w = 0; + point[i].pressure = 0; + +// gt_print("gt: [%s] %d - touch %x %x %x %x id %d flags %x x %d y %d\n", __func__, +// i, +// touch[i].xl, touch[i].xh, touch[i].yl, touch[i].yh, +// point[i].id, point[i].flags, +// point[i].x, point[i].y); + + } + + priv->valid = false; + return SIZEOF_TOUCH_SAMPLE_S(ntouches); +} +#endif /* CONFIG_GT9XX_SINGLEPOINT */ + +/**************************************************************************** + * Name: gt9xx_waitsample + ****************************************************************************/ + +static ssize_t gt9xx_waitsample(FAR struct gt9xx_dev_s *priv, + FAR char *buffer, size_t len) +{ + int ret; + + /* Disable pre-emption to prevent other threads from getting control while + * we muck with the semaphores. + */ + + sched_lock(); + + /* Now release the semaphore that manages mutually exclusive access to + * the device structure. This may cause other tasks to become ready to + * run, but they cannot run yet because pre-emption is disabled. + */ + + nxsem_post(&priv->devsem); + + /* Try to get the a sample... if we cannot, then wait on the semaphore + * that is posted when new sample data is available. + */ + + while (!priv->valid) + { + /* Increment the count of waiters */ + + priv->nwaiters++; + + /* Wait for a change in the GT9xx state */ + + ret = nxsem_wait(&priv->waitsem); + priv->nwaiters--; + + if (ret < 0) + { + ierr("ERROR: nxsem_wait failed: %d\n", ret); + goto errout; + } + } + + /* Re-acquire the semaphore that manages mutually exclusive access to + * the device structure. We may have to wait here. But we have our + * sample. Interrupts and pre-emption will be re-enabled while we wait. + */ + + ret = nxsem_wait(&priv->devsem); + if (ret >= 0) + { + /* Now sample the data. + * + * REVISIT: Is it safe to assume that priv->valid will always be + * true? I think that sched_lock() would protect the setting. + */ + + ret = gt9xx_sample(priv, buffer, len); + } + +errout: + /* Restore pre-emption. We might get suspended here but that is okay + * because we already have our sample. Note: this means that if there + * were two threads reading from the GT9xx for some reason, the data + * might be read out of order. + */ + + sched_unlock(); + return ret; +} + +int gt9xx_get_version(FAR struct gt9xx_dev_s *priv) +{ + FAR const struct gt9xx_config_s *config; + int ret; + uint8_t reg_addr[2]; + uint8_t reg_val[GT9XX_VER_LEN] = {0}; + + config = priv->config; + DEBUGASSERT(config != NULL); + + reg_addr[0] = (GT9XX_REG_VERSION) >> 8; /* config address */ + reg_addr[1] = (GT9XX_REG_VERSION) & 0xFF; + + ret = gt9xx_read_reg(priv, reg_addr, reg_val, GT9XX_VER_LEN); + + if (ret < 0) + { + ierr("gt: [%s] failed freq %ld addr %x ret %d\n", __func__, priv->frequency, config->address, ret); + return ret; + } + + gt_print("IC version: %s_%x%x\n", reg_val, reg_val[4], reg_val[5]); + + return OK; +} + +int gt9xx_get_info(FAR struct gt9xx_dev_s *priv) +{ + FAR const struct gt9xx_config_s *config; + int ret; + uint8_t reg_addr[2]; + uint8_t reg_val[GT9XX_INF_LEN] = {0}; + uint16_t abs_x_max = GT9XX_MAX_WIDTH; + uint16_t abs_y_max = GT9XX_MAX_HEIGHT; + uint8_t int_trigger_type = GT9XX_INT_TRIGGER; + + config = priv->config; + DEBUGASSERT(config != NULL); + + reg_addr[0] = (GT9XX_REG_CONFIG_DATA + 1) >> 8; /* config address */ + reg_addr[1] = (GT9XX_REG_CONFIG_DATA + 1) & 0xFF; + + ret = gt9xx_read_reg(priv, reg_addr, reg_val, GT9XX_INF_LEN); + + if (ret < 0) + { + ierr("gt: [%s] failed freq %ld addr %x ret %d\n", __func__, priv->frequency, config->address, ret); + return ret; + } + + abs_x_max = (reg_val[1] << 8) + reg_val[0]; + abs_y_max = (reg_val[3] << 8) + reg_val[2]; + + reg_addr[0] = (GT9XX_REG_CONFIG_DATA + 6) >> 8; /* config address */ + reg_addr[1] = (GT9XX_REG_CONFIG_DATA + 6) & 0xFF; + + ret = gt9xx_read_reg(priv, reg_addr, reg_val, GT9XX_CFG_LEN); + + if (ret < 0) + { + ierr("gt: [%s] failed freq %ld addr %x ret %d\n", __func__, priv->frequency, config->address, ret); + return ret; + } + + int_trigger_type = reg_val[0] & 0x03; + + iinfo("X_MAX = %d, Y_MAX = %d, TRIGGER = 0x%02x\n", + abs_x_max, abs_y_max, int_trigger_type); + + return OK; +} + + +/**************************************************************************** + * Name: gt9xx_bringup + ****************************************************************************/ + +static int gt9xx_bringup(FAR struct gt9xx_dev_s *priv) +{ + FAR const struct gt9xx_config_s *config; + config = priv->config; + DEBUGASSERT(config != NULL); + +#ifndef CONFIG_GT9XX_POLLMODE + /* Enable GT9xx interrupts */ + config->clear(config); + config->enable(config, true); +#endif + gt9xx_get_version(priv); + gt9xx_get_info(priv); + return OK; +} + +/**************************************************************************** + * Name: gt9xx_shutdown + ****************************************************************************/ + +static void gt9xx_shutdown(FAR struct gt9xx_dev_s *priv) +{ +#ifdef CONFIG_GT9XX_POLLMODE + /* Stop the poll timer */ + + wd_cancel(&priv->polltimer); + +#else + FAR const struct gt9xx_config_s *config = priv->config; + + /* Make sure that the GT9xx interrupt is disabled */ + + config->clear(config); + config->enable(config, false); +#endif +} + +/**************************************************************************** + * Name: gt9xx_open + ****************************************************************************/ + +static int gt9xx_open(FAR struct file *filep) +{ + FAR struct inode *inode; + FAR struct gt9xx_dev_s *priv; + uint8_t tmp; + int ret; + + DEBUGASSERT(filep); + inode = filep->f_inode; + + DEBUGASSERT(inode && inode->i_private); + priv = (FAR struct gt9xx_dev_s *)inode->i_private; + + /* Get exclusive access to the driver data structure */ + + ret = nxsem_wait(&priv->devsem); + if (ret < 0) + { + ierr("ERROR: nxsem_wait failed: %d\n", ret); + return ret; + } + + /* Increment the reference count */ + + tmp = priv->crefs + 1; + if (tmp == 0) + { + /* More than 255 opens; uint8_t overflows to zero */ + + ret = -EMFILE; + goto errout_with_sem; + } + + /* When the reference increments to 1, this is the first open event + * on the driver.. and the time when we must initialize the driver. + */ + + if (tmp == 1) + { + ret = gt9xx_bringup(priv); + if (ret < 0) + { + ierr("ERROR: gt9xx_bringup failed: %d\n", ret); + goto errout_with_sem; + } + + ret = gt9xx_write_config(priv); + if (ret < 0) + { + ierr("ERROR: gt9xx_write_config failed: %d\n", ret); + goto errout_with_sem; + } + } + + /* Save the new open count on success */ + + priv->crefs = tmp; + +errout_with_sem: + nxsem_post(&priv->devsem); + return ret; +} + +/**************************************************************************** + * Name: gt9xx_close + ****************************************************************************/ + +static int gt9xx_close(FAR struct file *filep) +{ + FAR struct inode *inode; + FAR struct gt9xx_dev_s *priv; + int ret; + + DEBUGASSERT(filep); + inode = filep->f_inode; + + DEBUGASSERT(inode && inode->i_private); + priv = (FAR struct gt9xx_dev_s *)inode->i_private; + + /* Get exclusive access to the driver data structure */ + + ret = nxsem_wait(&priv->devsem); + if (ret < 0) + { + ierr("ERROR: nxsem_wait failed: %d\n", ret); + return ret; + } + + /* Decrement the reference count unless it would decrement a negative + * value. + */ + + if (priv->crefs >= 1) + { + priv->crefs--; + } + + /* When the count decrements to zero, there are no further open references + * to the driver and it can be uninitialized. + */ + + if (priv->crefs == 0) + { + gt9xx_shutdown(priv); + } + + nxsem_post(&priv->devsem); + return OK; +} + +/**************************************************************************** + * Name: gt9xx_read + ****************************************************************************/ + +static ssize_t gt9xx_read(FAR struct file *filep, FAR char *buffer, + size_t len) +{ + FAR struct inode *inode; + FAR struct gt9xx_dev_s *priv; + int ret; + + DEBUGASSERT(filep); + inode = filep->f_inode; + + DEBUGASSERT(inode && inode->i_private); + priv = (FAR struct gt9xx_dev_s *)inode->i_private; + + /* Verify that the caller has provided a buffer large enough to receive + * the touch data. + */ + + if (len < SIZEOF_TOUCH_SAMPLE_S(1)) + { + /* We could provide logic to break up a touch report into segments and + * handle smaller reads... but why? + */ + + return -ENOSYS; + } + + /* Get exclusive access to the driver data structure */ + + ret = nxsem_wait(&priv->devsem); + if (ret < 0) + { + ierr("ERROR: nxsem_wait failed: %d\n", ret); + return ret; + } + + /* Try to read sample data. */ + + ret = gt9xx_sample(priv, buffer, len); + while (ret == 0) + { + /* Sample data is not available now. We would have to wait to receive + * sample data. If the user has specified the O_NONBLOCK option, then + * just return an error. + */ + + if (filep->f_oflags & O_NONBLOCK) + { + ret = -EAGAIN; + goto errout; + } + + /* Wait for sample data */ + + ret = gt9xx_waitsample(priv, buffer, len); + if (ret < 0) + { + /* We might have been awakened by a signal */ + + goto errout; + } + } + + ret = SIZEOF_TOUCH_SAMPLE_S(1); + +errout: + nxsem_post(&priv->devsem); + return ret; +} + +/**************************************************************************** + * Name: gt9xx_ioctl + ****************************************************************************/ + +static int gt9xx_ioctl(FAR struct file *filep, int cmd, unsigned long arg) +{ + FAR struct inode *inode; + FAR struct gt9xx_dev_s *priv; + int ret; + + iinfo("cmd: %d arg: %ld\n", cmd, arg); + DEBUGASSERT(filep); + inode = filep->f_inode; + + DEBUGASSERT(inode && inode->i_private); + priv = (FAR struct gt9xx_dev_s *)inode->i_private; + + /* Get exclusive access to the driver data structure */ + + ret = nxsem_wait(&priv->devsem); + if (ret < 0) + { + ierr("ERROR: nxsem_wait failed: %d\n", ret); + return ret; + } + + /* Process the IOCTL by command */ + + switch (cmd) + { + case TSIOC_SETFREQUENCY: /* arg: Pointer to uint32_t frequency value */ + { + FAR uint32_t *ptr = (FAR uint32_t *)((uintptr_t)arg); + DEBUGASSERT(priv->config != NULL && ptr != NULL); + priv->frequency = *ptr; + } + break; + + case TSIOC_GETFREQUENCY: /* arg: Pointer to uint32_t frequency value */ + { + FAR uint32_t *ptr = (FAR uint32_t *)((uintptr_t)arg); + DEBUGASSERT(priv->config != NULL && ptr != NULL); + *ptr = priv->frequency; + } + break; + + default: + ret = -ENOTTY; + break; + } + + nxsem_post(&priv->devsem); + return ret; +} + +/**************************************************************************** + * Name: gt9xx_poll + ****************************************************************************/ + +static int gt9xx_poll(FAR struct file *filep, FAR struct pollfd *fds, + bool setup) +{ + FAR struct inode *inode; + FAR struct gt9xx_dev_s *priv; + int ret; + int i; + + iinfo("setup: %d\n", (int)setup); + DEBUGASSERT(filep && fds); + inode = filep->f_inode; + + DEBUGASSERT(inode && inode->i_private); + priv = (FAR struct gt9xx_dev_s *)inode->i_private; + + /* Are we setting up the poll? Or tearing it down? */ + + ret = nxsem_wait(&priv->devsem); + if (ret < 0) + { + ierr("ERROR: nxsem_wait failed: %d\n", ret); + return ret; + } + + if (setup) + { + /* Ignore waits that do not include POLLIN */ + + if ((fds->events & POLLIN) == 0) + { + ierr("ERROR: Missing POLLIN: revents: %08x\n", fds->revents); + ret = -EDEADLK; + goto errout; + } + + /* This is a request to set up the poll. Find an available + * slot for the poll structure reference + */ + + for (i = 0; i < CONFIG_GT9XX_NPOLLWAITERS; i++) + { + /* Find an available slot */ + + if (!priv->fds[i]) + { + /* Bind the poll structure and this slot */ + + priv->fds[i] = fds; + fds->priv = &priv->fds[i]; + break; + } + } + + if (i >= CONFIG_GT9XX_NPOLLWAITERS) + { + ierr("ERROR: No available slot found: %d\n", i); + fds->priv = NULL; + ret = -EBUSY; + goto errout; + } + + /* Should we immediately notify on any of the requested events? */ + + if (priv->valid) + { + gt9xx_notify(priv); + } + } + else if (fds->priv) + { + /* This is a request to tear down the poll. */ + + struct pollfd **slot = (struct pollfd **)fds->priv; + DEBUGASSERT(slot != NULL); + + /* Remove all memory of the poll setup */ + + *slot = NULL; + fds->priv = NULL; + } + +errout: + nxsem_post(&priv->devsem); + return ret; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: gt9xx_register + * + * Description: + * Configure the GT9xx to use the provided I2C device instance. This + * will register the driver as /dev/inputN where N is the minor device + * number + * + * Input Parameters: + * dev - An I2C driver instance + * config - Persistent board configuration data + * minor - The input device minor number + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +int gt9xx_register(FAR struct i2c_master_s *i2c, + FAR const struct gt9xx_config_s *config, int minor) +{ + FAR struct gt9xx_dev_s *priv; + char devname[DEV_NAMELEN]; + int ret; + + iinfo("i2c: %p minor: %d\n", i2c, minor); + + /* Debug-only sanity checks */ + + DEBUGASSERT(i2c != NULL && config != NULL && minor >= 0 && minor < 100); +#ifdef CONFIG_GT9XX_POLLMODE + DEBUGASSERT(config->wakeup != NULL && config->nreset != NULL); +#else + DEBUGASSERT(config->attach != NULL && config->enable != NULL && + config->clear != NULL && config->wakeup != NULL && + config->nreset != NULL); +#endif + + /* Create and initialize a GT9xx device driver instance */ + + priv = (FAR struct gt9xx_dev_s *)kmm_zalloc(sizeof(struct gt9xx_dev_s)); + if (!priv) + { + ierr("ERROR: kmm_zalloc(%d) failed\n", sizeof(struct gt9xx_dev_s)); + return -ENOMEM; + } + + /* Initialize the GT9xx device driver instance */ + + priv->i2c = i2c; /* Save the I2C device handle */ + priv->config = config; /* Save the board configuration */ + priv->frequency = config->frequency; /* Set the current I2C frequency */ + + nxsem_init(&priv->devsem, 0, 1); /* Initialize device structure semaphore */ + nxsem_init(&priv->waitsem, 0, 0); /* Initialize pen event wait semaphore */ + + /* The event wait semaphore is used for signaling and, hence, should not + * have priority inheritance enabled. + */ + + nxsem_set_protocol(&priv->waitsem, SEM_PRIO_NONE); + +#ifdef CONFIG_GT9XX_POLLMODE + /* Allocate a timer for polling the GT9xx */ + priv->delay = POLL_MAXDELAY; +#else + /* Make sure that the GT9xx interrupt interrupt is disabled */ + + config->clear(config); + config->enable(config, false); + + /* Attach the interrupt handler */ + + ret = config->attach(config, gt9xx_data_interrupt, + priv); + if (ret < 0) + { + ierr("ERROR: Failed to attach interrupt\n"); + goto errout_with_priv; + } +#endif + + /* Register the device as an input device */ + + snprintf(devname, DEV_NAMELEN, DEV_FORMAT, minor); + iinfo("Registering %s\n", devname); + + ret = register_driver(devname, >9xx_fops, 0666, priv); + if (ret < 0) + { + ierr("ERROR: register_driver() failed: %d\n", ret); + goto errout_with_priv; + } + + /* Schedule work to perform the initial sampling and to set the data + * availability conditions. + */ + + ret = work_queue(HPWORK, &priv->work, gt9xx_data_worker, priv, 0); + if (ret < 0) + { + ierr("ERROR: Failed to queue work: %d\n", ret); + goto errout_with_priv; + } + + /* And return success */ + + return OK; + +errout_with_priv: + nxsem_destroy(&priv->devsem); + kmm_free(priv); + return ret; +} diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/include/nuttx/input/gt9xx.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/include/nuttx/input/gt9xx.h new file mode 100755 index 000000000..1d723fa53 --- /dev/null +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/include/nuttx/input/gt9xx.h @@ -0,0 +1,165 @@ +/* + * Copyright (c) 2022 AIIT XUOS Lab + * XiUOS is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * http://license.coscl.org.cn/MulanPSL2 + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, + * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, + * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ + +/** + * @file gt9xx.h + * @brief API for gt9xx. + * @version 1.0 + * @author AIIT XUOS Lab + * @date 2022.5.31 + */ + + +#ifndef __GT9XX_H_ +#define __GT9XX_H_ + +#define GT9XX_MAX_TOUCHES (1) +#define GT9XX_TOUCH_DATA_LEN (8 * GT9XX_MAX_TOUCHES + 4) + +#define TOUCH_POINT_GET_EVENT(t) ((t).xh >> 6) +#define TOUCH_POINT_GET_ID(t) ((t).yh >> 4) +#define TOUCH_POINT_GET_X(t) ((((t).xh & 0x0f) << 8) | (t).xl) +#define TOUCH_POINT_GET_Y(t) ((((t).yh & 0x0f) << 8) | (t).yl) + + +#define GT9XX_MAX_HEIGHT 272 +#define GT9XX_MAX_WIDTH 480 +#define GT9XX_INT_TRIGGER 0 + +#define GT9XX_ADDR_LENGTH 2 +#define GT9XX_CONFIG_MIN_LENGTH 186 +#define GT9XX_CONFIG_MAX_LENGTH 240 + +#define GT9XX_REG_BAK_REF 0x99D0 +#define GT9XX_REG_MAIN_CLK 0x8020 +#define GT9XX_REG_CHIP_TYPE 0x8000 +#define GT9XX_REG_HAVE_KEY 0x804E +#define GT9XX_REG_MATRIX_DRVNUM 0x8069 +#define GT9XX_REG_MATRIX_SENNUM 0x806A +#define GT9XX_REG_COMMAND 0x8040 + +#define GT9XX_COMMAND_READSTATUS 0 +#define GT9XX_COMMAND_DIFFERENCE 1 +#define GT9XX_COMMAND_SOFTRESET 2 +#define GT9XX_COMMAND_UPDATE 3 +#define GT9XX_COMMAND_CALCULATE 4 +#define GT9XX_COMMAND_TURNOFF 5 + +#define GT9XX_REG_READ_COOR 0x814E +#define GT9XX_REG_SLEEP 0x8040 +#define GT9XX_REG_SENSOR_ID 0x814A +#define GT9XX_REG_CONFIG_DATA 0x8047 +#define GT9XX_REG_VERSION 0x8140 + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +enum touch_event_e +{ + GT9XX_DOWN = 0, /* The state changed to touched */ + GT9XX_UP = 1, /* The state changed to not touched */ + GT9XX_CONTACT = 2, /* There is a continuous touch being detected */ + GT9XX_INVALID = 3 /* No touch information available */ +}; + +/* Describes on touchpoint returned by the GT9xx */ + +struct gt9xx_touch_point_s +{ + uint8_t xl; + uint8_t xh; + uint8_t yl; + uint8_t yh; + uint8_t weight; + uint8_t area; +}; + +/* Describes all touch data returned by the GT9xx */ + +struct gt9xx_touch_data_s +{ + uint8_t tdstatus; /* Touch status */ + struct gt9xx_touch_point_s touch[GT9XX_MAX_TOUCHES]; +}; + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +/* Maximum number of threads than can be waiting for POLL events */ + +#ifndef CONFIG_GT9XX_NPOLLWAITERS +# define CONFIG_GT9XX_NPOLLWAITERS 2 +#endif + +/* Check for some required settings. This can save the user a lot of time + * in getting the right configuration. + */ + +#ifndef CONFIG_SCHED_WORKQUEUE +# error "Work queue support required. CONFIG_SCHED_WORKQUEUE must be selected." +#endif + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/* A reference to a structure of this type must be passed to the GT9XX + * driver. This structure provides information about the configuration + * of the FT5x06 and provides some board-specific hooks. + * + * Memory for this structure is provided by the caller. It is not copied + * by the driver and is presumed to persist while the driver is active. The + * memory must be writeable because, under certain circumstances, the driver + * may modify frequency or X plate resistance values. + */ + +struct gt9xx_config_s +{ + /* Device characterization */ + + uint8_t address; /* 7-bit I2C address (only bits 0-6 used) */ + uint32_t frequency; /* Default I2C frequency */ + + /* IRQ/GPIO access callbacks. These operations all hidden behind + * callbacks to isolate the GT9XX driver from differences in GPIO + * interrupt handling by varying boards and MCUs. + * + * attach - Attach an FT5x06 interrupt handler to a GPIO interrupt + * enable - Enable or disable a GPIO interrupt + * clear - Acknowledge/clear any pending GPIO interrupt + * wakeup - Issue WAKE interrupt to FT5x06 to change the FT5x06 from + * Hibernate to Active mode. + * nreset - Control the chip reset pin (active low) + + */ + +#ifndef CONFIG_GT9XX_POLLMODE + int (*attach)(FAR const struct gt9xx_config_s *config, xcpt_t isr, + FAR void *arg); + void (*enable)(FAR const struct gt9xx_config_s *config, bool enable); + void (*clear)(FAR const struct gt9xx_config_s *config); +#endif + void (*wakeup)(FAR const struct gt9xx_config_s *config); + void (*nreset)(FAR const struct gt9xx_config_s *config, + bool state); +}; + + +int gt9xx_register(FAR struct i2c_master_s *i2c, + FAR const struct gt9xx_config_s *config, int minor); + + +#endif /* __GT9XX_H__ */ From 7be59f84177fa00eb55fa91b3e3944885c4b5dfd Mon Sep 17 00:00:00 2001 From: wlyu Date: Thu, 2 Jun 2022 19:00:51 +0800 Subject: [PATCH 41/46] fixed touchscreen x y wrong value and optimize codes --- .../nuttx/drivers/input/gt9xx.c | 26 +- .../nuttx/include/nuttx/input/gt9xx.h | 250 +++++++----------- 2 files changed, 111 insertions(+), 165 deletions(-) diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/input/gt9xx.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/input/gt9xx.c index 77496d9cf..6d97db654 100755 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/input/gt9xx.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/input/gt9xx.c @@ -287,10 +287,10 @@ static int gt9xx_read_reg(FAR struct gt9xx_dev_s *priv, uint8_t *reg_addr, uint8 retries ++; } if (ret < 0) - { + { ierr("gt: [%s] failed freq %ld addr %x ret %d\n", __func__, priv->frequency, config->address, ret); return ret; - } + } return ret; } @@ -302,7 +302,7 @@ static int gt9xx_write_config(FAR struct gt9xx_dev_s *priv) { int i, ret = -1; uint8_t check_sum = 0; - uint8_t offet = 0x80FE - 0x8047 + 1 ; + uint8_t offet = GT9XX_REG_CONFIG_CHKSUM - GT9XX_REG_CONFIG_DATA; const uint8_t* cfg_info = gt9xx_cfg_data; uint8_t cfg_info_len = sizeof(gt9xx_cfg_data) / sizeof(gt9xx_cfg_data[0]); @@ -313,8 +313,6 @@ static int gt9xx_write_config(FAR struct gt9xx_dev_s *priv) memset(®_data[GT9XX_ADDR_LENGTH], 0, GT9XX_CONFIG_MAX_LENGTH); memcpy(®_data[GT9XX_ADDR_LENGTH], cfg_info, cfg_info_len); - check_sum = 0; - for (i = GT9XX_ADDR_LENGTH; i < offet + GT9XX_ADDR_LENGTH; i++) { check_sum += reg_data[i]; @@ -323,7 +321,7 @@ static int gt9xx_write_config(FAR struct gt9xx_dev_s *priv) reg_data[offet + GT9XX_ADDR_LENGTH] = (~check_sum) + 1; //checksum reg_data[offet + GT9XX_ADDR_LENGTH + 1] = 1; //refresh - gt_print("Driver send config."); + gt_print("Driver send config.\n"); ret = gt9xx_write_reg(priv, reg_data, offet + GT9XX_ADDR_LENGTH + 2); @@ -420,14 +418,14 @@ static void gt9xx_data_worker(FAR void *arg) */ if(priv->touchbuf[0] & 0xf) - { - gt_print("gt: [%s] get i2c %x reg %x %x ret %d\n", __func__, config->address, regaddr[0], regaddr[1], ret); - for(int i = 0; i < 10; i ++) - { - gt_print("%x ", priv->touchbuf[i]); - } - gt_print("\n"); - } + { + gt_print("get i2c %x reg %x %x ret %d ", config->address, regaddr[0], regaddr[1], ret); + for(int i = 0; i < GT9XX_TOUCH_DATA_LEN; i ++) + { + gt_print("%x ", priv->touchbuf[i]); + } + gt_print("\n"); + } sample = (FAR struct gt9xx_touch_data_s *)priv->touchbuf; diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/include/nuttx/input/gt9xx.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/include/nuttx/input/gt9xx.h index 1d723fa53..7a518c8c0 100755 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/include/nuttx/input/gt9xx.h +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/include/nuttx/input/gt9xx.h @@ -1,165 +1,113 @@ -/* - * Copyright (c) 2022 AIIT XUOS Lab - * XiUOS is licensed under Mulan PSL v2. - * You can use this software according to the terms and conditions of the Mulan PSL v2. - * You may obtain a copy of Mulan PSL v2 at: - * http://license.coscl.org.cn/MulanPSL2 - * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, - * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, - * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. - * See the Mulan PSL v2 for more details. - */ - -/** - * @file gt9xx.h - * @brief API for gt9xx. - * @version 1.0 - * @author AIIT XUOS Lab - * @date 2022.5.31 - */ - - -#ifndef __GT9XX_H_ -#define __GT9XX_H_ - -#define GT9XX_MAX_TOUCHES (1) -#define GT9XX_TOUCH_DATA_LEN (8 * GT9XX_MAX_TOUCHES + 4) - -#define TOUCH_POINT_GET_EVENT(t) ((t).xh >> 6) -#define TOUCH_POINT_GET_ID(t) ((t).yh >> 4) -#define TOUCH_POINT_GET_X(t) ((((t).xh & 0x0f) << 8) | (t).xl) -#define TOUCH_POINT_GET_Y(t) ((((t).yh & 0x0f) << 8) | (t).yl) - - -#define GT9XX_MAX_HEIGHT 272 -#define GT9XX_MAX_WIDTH 480 -#define GT9XX_INT_TRIGGER 0 - -#define GT9XX_ADDR_LENGTH 2 -#define GT9XX_CONFIG_MIN_LENGTH 186 -#define GT9XX_CONFIG_MAX_LENGTH 240 - -#define GT9XX_REG_BAK_REF 0x99D0 -#define GT9XX_REG_MAIN_CLK 0x8020 -#define GT9XX_REG_CHIP_TYPE 0x8000 -#define GT9XX_REG_HAVE_KEY 0x804E -#define GT9XX_REG_MATRIX_DRVNUM 0x8069 -#define GT9XX_REG_MATRIX_SENNUM 0x806A -#define GT9XX_REG_COMMAND 0x8040 - -#define GT9XX_COMMAND_READSTATUS 0 -#define GT9XX_COMMAND_DIFFERENCE 1 -#define GT9XX_COMMAND_SOFTRESET 2 -#define GT9XX_COMMAND_UPDATE 3 -#define GT9XX_COMMAND_CALCULATE 4 -#define GT9XX_COMMAND_TURNOFF 5 - -#define GT9XX_REG_READ_COOR 0x814E -#define GT9XX_REG_SLEEP 0x8040 -#define GT9XX_REG_SENSOR_ID 0x814A -#define GT9XX_REG_CONFIG_DATA 0x8047 -#define GT9XX_REG_VERSION 0x8140 - -/**************************************************************************** - * Public Types - ****************************************************************************/ - -enum touch_event_e -{ - GT9XX_DOWN = 0, /* The state changed to touched */ - GT9XX_UP = 1, /* The state changed to not touched */ - GT9XX_CONTACT = 2, /* There is a continuous touch being detected */ - GT9XX_INVALID = 3 /* No touch information available */ -}; - -/* Describes on touchpoint returned by the GT9xx */ - -struct gt9xx_touch_point_s -{ - uint8_t xl; - uint8_t xh; - uint8_t yl; - uint8_t yh; - uint8_t weight; - uint8_t area; -}; - -/* Describes all touch data returned by the GT9xx */ - -struct gt9xx_touch_data_s -{ - uint8_t tdstatus; /* Touch status */ - struct gt9xx_touch_point_s touch[GT9XX_MAX_TOUCHES]; -}; - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ +/* + * Copyright (c) 2022 AIIT XUOS Lab + * XiUOS is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * http://license.coscl.org.cn/MulanPSL2 + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, + * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, + * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ -/* Configuration ************************************************************/ +/** + * @file gt9xx.h + * @brief API for gt9xx. + * @version 1.0 + * @author AIIT XUOS Lab + * @date 2022.5.31 + */ + + +#ifndef __GT9XX_H_ +#define __GT9XX_H_ + +#define GT9XX_MAX_TOUCHES (1) +#define GT9XX_TOUCH_DATA_LEN (8 * GT9XX_MAX_TOUCHES + 4) + +#define TOUCH_POINT_GET_EVENT(t) ((t).xh >> 6) +#define TOUCH_POINT_GET_ID(t) ((t).yh >> 4) +#define TOUCH_POINT_GET_X(t) ((((t).xh & 0x0f) << 8) | (t).xl) +#define TOUCH_POINT_GET_Y(t) ((((t).yh & 0x0f) << 8) | (t).yl) + + +#define GT9XX_MAX_HEIGHT 272 +#define GT9XX_MAX_WIDTH 480 +#define GT9XX_INT_TRIGGER 0 + +#define GT9XX_ADDR_LENGTH 2 +#define GT9XX_CONFIG_MIN_LENGTH 186 +#define GT9XX_CONFIG_MAX_LENGTH 240 + +#define GT9XX_REG_BAK_REF 0x99D0 +#define GT9XX_REG_CHIP_TYPE 0x8000 +#define GT9XX_REG_MAIN_CLK 0x8020 +#define GT9XX_REG_COMMAND 0x8040 +#define GT9XX_REG_CONFIG_DATA 0x8047 +#define GT9XX_REG_CONFIG_CHKSUM 0x80FF +#define GT9XX_REG_VERSION 0x8140 +#define GT9XX_REG_SENSOR_ID 0x814A +#define GT9XX_REG_READ_COOR 0x814E + +#define GT9XX_COMMAND_READSTATUS 0 +#define GT9XX_COMMAND_DIFFERENCE 1 +#define GT9XX_COMMAND_SOFTRESET 2 +#define GT9XX_COMMAND_UPDATE 3 +#define GT9XX_COMMAND_CALCULATE 4 +#define GT9XX_COMMAND_TURNOFF 5 + +enum touch_event_e +{ + GT9XX_DOWN = 0, /* The state changed to touched */ + GT9XX_UP = 1, /* The state changed to not touched */ + GT9XX_CONTACT = 2, /* There is a continuous touch being detected */ + GT9XX_INVALID = 3 /* No touch information available */ +}; + +/* Describes on touchpoint returned by the GT9xx */ + +struct gt9xx_touch_point_s +{ + uint8_t xh; + uint8_t xl; + uint8_t yh; + uint8_t yl; + uint8_t weight; + uint8_t area; +}; + +/* Describes all touch data returned by the GT9xx */ + +struct gt9xx_touch_data_s +{ + uint8_t tdstatus; /* Touch status */ + struct gt9xx_touch_point_s touch[GT9XX_MAX_TOUCHES]; +}; /* Maximum number of threads than can be waiting for POLL events */ -#ifndef CONFIG_GT9XX_NPOLLWAITERS -# define CONFIG_GT9XX_NPOLLWAITERS 2 +#ifndef CONFIG_GT9XX_NPOLLWAITERS +# define CONFIG_GT9XX_NPOLLWAITERS 2 #endif -/* Check for some required settings. This can save the user a lot of time - * in getting the right configuration. - */ - -#ifndef CONFIG_SCHED_WORKQUEUE -# error "Work queue support required. CONFIG_SCHED_WORKQUEUE must be selected." -#endif - -/**************************************************************************** - * Public Types - ****************************************************************************/ - -/* A reference to a structure of this type must be passed to the GT9XX - * driver. This structure provides information about the configuration - * of the FT5x06 and provides some board-specific hooks. - * - * Memory for this structure is provided by the caller. It is not copied - * by the driver and is presumed to persist while the driver is active. The - * memory must be writeable because, under certain circumstances, the driver - * may modify frequency or X plate resistance values. - */ - -struct gt9xx_config_s +struct gt9xx_config_s { - /* Device characterization */ - uint8_t address; /* 7-bit I2C address (only bits 0-6 used) */ uint32_t frequency; /* Default I2C frequency */ - /* IRQ/GPIO access callbacks. These operations all hidden behind - * callbacks to isolate the GT9XX driver from differences in GPIO - * interrupt handling by varying boards and MCUs. - * - * attach - Attach an FT5x06 interrupt handler to a GPIO interrupt - * enable - Enable or disable a GPIO interrupt - * clear - Acknowledge/clear any pending GPIO interrupt - * wakeup - Issue WAKE interrupt to FT5x06 to change the FT5x06 from - * Hibernate to Active mode. - * nreset - Control the chip reset pin (active low) - - */ - -#ifndef CONFIG_GT9XX_POLLMODE - int (*attach)(FAR const struct gt9xx_config_s *config, xcpt_t isr, +#ifndef CONFIG_GT9XX_POLLMODE + int (*attach)(FAR const struct gt9xx_config_s *config, xcpt_t isr, FAR void *arg); - void (*enable)(FAR const struct gt9xx_config_s *config, bool enable); - void (*clear)(FAR const struct gt9xx_config_s *config); + void (*enable)(FAR const struct gt9xx_config_s *config, bool enable); + void (*clear)(FAR const struct gt9xx_config_s *config); #endif - void (*wakeup)(FAR const struct gt9xx_config_s *config); - void (*nreset)(FAR const struct gt9xx_config_s *config, + void (*wakeup)(FAR const struct gt9xx_config_s *config); + void (*nreset)(FAR const struct gt9xx_config_s *config, bool state); -}; - +}; -int gt9xx_register(FAR struct i2c_master_s *i2c, - FAR const struct gt9xx_config_s *config, int minor); - - -#endif /* __GT9XX_H__ */ +int gt9xx_register(FAR struct i2c_master_s *i2c, + FAR const struct gt9xx_config_s *config, int minor); + + +#endif /* __GT9XX_H__ */ From e0a47613c308733ebe49ce36c687f4eb2098aaa1 Mon Sep 17 00:00:00 2001 From: wlyu Date: Tue, 7 Jun 2022 09:58:19 +0800 Subject: [PATCH 42/46] support E18 zigbee for nuttx --- .../Framework/connection/zigbee/e18/Kconfig | 32 ++++++++-- .../Framework/connection/zigbee/e18/e18.c | 12 ++-- .../xidatong/configs/zbnsh/defconfig | 64 +++++++++++++++++++ 3 files changed, 97 insertions(+), 11 deletions(-) create mode 100755 Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/zbnsh/defconfig diff --git a/APP_Framework/Framework/connection/zigbee/e18/Kconfig b/APP_Framework/Framework/connection/zigbee/e18/Kconfig index 643d07acb..06bdec8c7 100644 --- a/APP_Framework/Framework/connection/zigbee/e18/Kconfig +++ b/APP_Framework/Framework/connection/zigbee/e18/Kconfig @@ -1,8 +1,8 @@ config ADAPTER_ZIGBEE_E18 string "E18 adapter name" default "e18" - -choice + +choice prompt "E18 adapter select net role type " default AS_END_DEVICE_ROLE @@ -11,7 +11,7 @@ choice config AS_ROUTER_ROLE bool "config as a router" - + config AS_END_DEVICE_ROLE bool "config as an end device" endchoice @@ -22,8 +22,8 @@ if ADD_XIZI_FETURES int "E18 MODE pin number" default "61" - config ADAPTER_BC28_PIN_DRIVER - string "BC28 device pin driver path" + config ADAPTER_E18_PIN_DRIVER + string "E18 device pin driver path" default "/dev/pin_dev" config ADAPTER_E18_DRIVER_EXTUART @@ -35,7 +35,7 @@ if ADD_XIZI_FETURES default "/dev/uart2_dev2" depends on !ADAPTER_E18_DRIVER_EXTUART - if ADAPTER_E18_DRIVER_EXTUART + if ADAPTER_E18_DRIVER_EXTUART config ADAPTER_E18_DRIVER string "E18 device extra uart driver path" default "/dev/extuart_dev0" @@ -47,11 +47,31 @@ if ADD_XIZI_FETURES endif if ADD_NUTTX_FETURES + config ADAPTER_E18_MODEPIN + int "E18 MODE pin number" + default "61" + + config ADAPTER_E18_PIN_DRIVER + string "E18 device pin driver path" + default "/dev/pin_dev" + config ADAPTER_E18_DRIVER string "E18 device uart driver path" default "/dev/ttyS1" + depends on !ADAPTER_E18_DRIVER_EXTUART ---help--- If USART1 is selected, then fill in /dev/ttyS1 here. + + if ADAPTER_E18_DRIVER_EXTUART + config ADAPTER_E18_DRIVER + string "E18 device extra uart driver path" + default "/dev/extuart_dev1" + + config ADAPTER_E18_DRIVER_EXT_PORT + int "if E18 device using extuart, choose port" + default "1" + endif + endif if ADD_RTTHREAD_FETURES diff --git a/APP_Framework/Framework/connection/zigbee/e18/e18.c b/APP_Framework/Framework/connection/zigbee/e18/e18.c index bd8d5ef92..6638a988b 100644 --- a/APP_Framework/Framework/connection/zigbee/e18/e18.c +++ b/APP_Framework/Framework/connection/zigbee/e18/e18.c @@ -45,7 +45,7 @@ static int E18HardwareModeGet() int ret = 0; int pin_fd; - pin_fd = PrivOpen(ADAPTER_BC28_PIN_DRIVER, O_RDWR); + pin_fd = PrivOpen(ADAPTER_E18_PIN_DRIVER, O_RDWR); struct PinStat pin_stat; pin_stat.pin = ADAPTER_E18_MODEPIN; @@ -175,7 +175,7 @@ static int E18NetworkModeConfig(struct Adapter *adapter) } out: - if(E18_AS_HEX_MODE == mode){ + if(E18_AS_AT_MODE == mode){ AtCmdConfigAndCheck(adapter->agent, cmd_exit, "+OK"); } @@ -203,7 +203,9 @@ static int E18NetRoleConfig(struct Adapter *adapter) goto out; } } - + + //wait 2second + PrivTaskDelay(2000); switch (adapter->net_role) { @@ -240,7 +242,7 @@ static int E18NetRoleConfig(struct Adapter *adapter) } out: - if(E18_AS_HEX_MODE == mode) { + if(E18_AS_AT_MODE == mode) { AtCmdConfigAndCheck(adapter->agent, cmd_exit, "+OK"); } @@ -382,7 +384,7 @@ static int E18Join(struct Adapter *adapter, unsigned char *priv_net_group) // } if(!ret){ - if(E18_AS_HEX_MODE == mode) { + if(E18_AS_AT_MODE == mode) { ret = AtCmdConfigAndCheck(adapter->agent, cmd_exit, "+OK"); if(ret < 0) { printf("%s %d cmd[%s] config failed!\n",__func__,__LINE__,cmd_exit); diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/zbnsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/zbnsh/defconfig new file mode 100755 index 000000000..deb156dfa --- /dev/null +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/zbnsh/defconfig @@ -0,0 +1,64 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +CONFIG_ADD_NUTTX_FETURES=y +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="xidatong" +CONFIG_ARCH_BOARD_XIDATONG=y +CONFIG_ARCH_CHIP="imxrt" +CONFIG_ARCH_CHIP_IMXRT=y +CONFIG_ARCH_CHIP_MIMXRT1052CVL5B=y +CONFIG_ARCH_INTERRUPTSTACK=10240 +CONFIG_ARCH_STACKDUMP=y +CONFIG_ARMV7M_DCACHE=y +CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y +CONFIG_ARMV7M_ICACHE=y +CONFIG_ARMV7M_USEBASEPRI=y +CONFIG_BOARD_LOOPSPERMSEC=104926 +CONFIG_BUILTIN=y +CONFIG_CLOCK_MONOTONIC=y +CONFIG_EXAMPLES_HELLO=y +CONFIG_IMXRT_GPIO_IRQ=y +CONFIG_IMXRT_GPIO3_0_15_IRQ=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_IMXRT_LPUART1=y +CONFIG_INTELHEX_BINARY=y +CONFIG_LPUART1_SERIAL_CONSOLE=y +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_DISABLE_IFUPDOWN=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_RAM_SIZE=524288 +CONFIG_RAM_START=0x20200000 +CONFIG_RAW_BINARY=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_WAITPID=y +CONFIG_START_DAY=14 +CONFIG_START_MONTH=3 +CONFIG_SYSTEM_NSH=y +CONFIG_DEV_GPIO=y +CONFIG_READLINE_CMD_HISTORY=y +CONFIG_READLINE_CMD_HISTORY_LEN=100 +CONFIG_READLINE_CMD_HISTORY_LINELEN=120 +CONFIG_READLINE_TABCOMPLETION=y +CONFIG_FS_ROMFS=y +CONFIG_NSH_ROMFSETC=y +CONFIG_NSH_ARCHROMFS=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BSP_USING_CH438=y +CONFIG_CH438_EXTUART1=y +CONFIG_SUPPORT_CONNECTION_FRAMEWORK=y +CONFIG_CONNECTION_FRAMEWORK_DEBUG=y +CONFIG_SUPPORT_CONNECTION_FRAMEWORK=y +CONFIG_CONNECTION_ADAPTER_ZIGBEE=y +CONFIG_ADAPTER_E18=y +CONFIG_ADAPTER_ZIGBEE_E18="e18" +CONFIG_AS_END_DEVICE_ROLE=y +CONFIG_ADAPTER_E18_DRIVER="/dev/extuart_dev1" +CONFIG_USER_ENTRYPOINT="nsh_main" From 44e0057f2d42f3513b7e1b870d852a12ce5e6d04 Mon Sep 17 00:00:00 2001 From: wlyu Date: Thu, 9 Jun 2022 18:48:13 +0800 Subject: [PATCH 43/46] support wifi module for nuttx on xidatong --- .../Framework/connection/wifi/Make.defs | 7 + .../Framework/connection/wifi/Makefile | 10 ++ .../Framework/connection/wifi/adapter_wifi.c | 160 +++++++++++++++--- .../connection/wifi/esp07s_wifi/Kconfig | 19 ++- .../connection/wifi/esp07s_wifi/Makefile | 10 ++ .../connection/wifi/esp07s_wifi/esp07s_wifi.c | 47 ++--- .../xidatong/configs/wifinsh/defconfig | 54 ++++++ .../app_match_nuttx/apps/nshlib/Kconfig | 4 + .../app_match_nuttx/apps/nshlib/nsh.h | 6 +- .../apps/nshlib/nsh_Applicationscmd.c | 11 ++ .../app_match_nuttx/apps/nshlib/nsh_command.c | 6 +- 11 files changed, 286 insertions(+), 48 deletions(-) create mode 100755 APP_Framework/Framework/connection/wifi/Make.defs create mode 100755 Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/wifinsh/defconfig diff --git a/APP_Framework/Framework/connection/wifi/Make.defs b/APP_Framework/Framework/connection/wifi/Make.defs new file mode 100755 index 000000000..cf51e4a1d --- /dev/null +++ b/APP_Framework/Framework/connection/wifi/Make.defs @@ -0,0 +1,7 @@ +############################################################################ +# APP_Framework/Framework/connection/zigbee/Make.defs +############################################################################ +ifneq ($(CONFIG_CONNECTION_ADAPTER_WIFI),) +CONFIGURED_APPS += $(APPDIR)/../../../APP_Framework/Framework/connection/wifi +endif +include $(wildcard $(APPDIR)/../../../APP_Framework/Framework/connection/wifi/*/Make.defs) diff --git a/APP_Framework/Framework/connection/wifi/Makefile b/APP_Framework/Framework/connection/wifi/Makefile index 2930fd977..cfa6cac9f 100644 --- a/APP_Framework/Framework/connection/wifi/Makefile +++ b/APP_Framework/Framework/connection/wifi/Makefile @@ -1,3 +1,12 @@ +include $(KERNEL_ROOT)/.config +ifeq ($(CONFIG_ADD_NUTTX_FETURES),y) + include $(APPDIR)/Make.defs + CSRCS += adapter_wifi.c + include $(APPDIR)/Application.mk + +endif + +ifeq ($(CONFIG_ADD_XIZI_FETURES),y) SRC_FILES := adapter_wifi.c ifeq ($(CONFIG_ADAPTER_HFA21_WIFI),y) @@ -9,3 +18,4 @@ ifeq ($(CONFIG_ADAPTER_ESP07S_WIFI),y) endif include $(KERNEL_ROOT)/compiler.mk +endif diff --git a/APP_Framework/Framework/connection/wifi/adapter_wifi.c b/APP_Framework/Framework/connection/wifi/adapter_wifi.c index 039f96598..fe5461d71 100644 --- a/APP_Framework/Framework/connection/wifi/adapter_wifi.c +++ b/APP_Framework/Framework/connection/wifi/adapter_wifi.c @@ -100,6 +100,7 @@ int AdapterWifiInit(void) } /******************wifi TEST*********************/ +#ifdef ADD_XIZI_FETURES int AdapterWifiTest(void) { char cmd[64]; @@ -107,29 +108,28 @@ int AdapterWifiTest(void) struct Adapter* adapter = AdapterDeviceFindByName(ADAPTER_WIFI_NAME); - #ifdef ADAPTER_HFA21_DRIVER_EXT_PORT static BusType ch438_pin; ch438_pin = PinBusInitGet(); - struct PinParam pin_cfg; - int ret = 0; + struct PinParam pin_cfg; + int ret = 0; - struct BusConfigureInfo configure_info; - configure_info.configure_cmd = OPE_CFG; - configure_info.private_data = (void *)&pin_cfg; + struct BusConfigureInfo configure_info; + configure_info.configure_cmd = OPE_CFG; + configure_info.private_data = (void *)&pin_cfg; pin_cfg.cmd = GPIO_CONFIG_MODE; pin_cfg.pin = 22; pin_cfg.mode = GPIO_CFG_OUTPUT; - ret = BusDrvConfigure(ch438_pin->owner_driver, &configure_info); + ret = BusDrvConfigure(ch438_pin->owner_driver, &configure_info); struct PinStat pin_stat; - struct BusBlockWriteParam write_param; - struct BusBlockReadParam read_param; - write_param.buffer = (void *)&pin_stat; - - pin_stat.val = GPIO_HIGH; + struct BusBlockWriteParam write_param; + struct BusBlockReadParam read_param; + write_param.buffer = (void *)&pin_stat; + + pin_stat.val = GPIO_HIGH; pin_stat.pin = 22; BusDevWriteData(ch438_pin->owner_haldev, &write_param); @@ -155,7 +155,6 @@ int AdapterWifiTest(void) PrivClose(pin_fd); #endif - AdapterDeviceOpen(adapter); // AdapterDeviceControl(adapter, OPE_INT, &baud_rate); @@ -182,8 +181,8 @@ int AdapterWifiTest(void) AdapterDeviceRecv(adapter, wifi_recv_msg, 128); PrivTaskDelay(1000); } - } +#endif #ifdef ADD_RTTHREAD_FETURES MSH_CMD_EXPORT(AdapterWifiTest,a wifi adpter sample); @@ -195,8 +194,7 @@ SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_FUNC)|SHE int wifiopen(void) { struct Adapter* adapter = AdapterDeviceFindByName(ADAPTER_WIFI_NAME); - - AdapterDeviceOpen(adapter); + return AdapterDeviceOpen(adapter); } #ifdef ADD_XIZI_FETURES SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_FUNC)|SHELL_CMD_PARAM_NUM(0)|SHELL_CMD_DISABLE_RETURN, wifiopen, wifiopen, open adapter wifi ); @@ -204,8 +202,7 @@ SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_FUNC)|SHE int wificlose(void) { struct Adapter* adapter = AdapterDeviceFindByName(ADAPTER_WIFI_NAME); - - AdapterDeviceClose(adapter); + return AdapterDeviceClose(adapter); } #ifdef ADD_XIZI_FETURES SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_FUNC)|SHELL_CMD_PARAM_NUM(0)|SHELL_CMD_DISABLE_RETURN, wificlose, wificlose, close adapter wifi ); @@ -215,12 +212,12 @@ int wifisetup(int argc, char *argv[]) struct Adapter* adapter = AdapterDeviceFindByName(ADAPTER_WIFI_NAME); struct WifiParam param; memset(¶m,0,sizeof(struct WifiParam)); - strncpy(param.wifi_ssid, argv[1], strlen(argv[1])); - strncpy(param.wifi_pwd, argv[2], strlen(argv[2])); + strncpy((char *)param.wifi_ssid, argv[1], strlen(argv[1])); + strncpy((char *)param.wifi_pwd, argv[2], strlen(argv[2])); adapter->adapter_param = ¶m; - AdapterDeviceSetUp(adapter); + return AdapterDeviceSetUp(adapter); } #ifdef ADD_XIZI_FETURES SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN)|SHELL_CMD_PARAM_NUM(3)|SHELL_CMD_DISABLE_RETURN, wifisetup, wifisetup, setup adapter wifi ); @@ -234,7 +231,7 @@ int wifiaddrset(int argc, char *argv[]) AdapterDeviceSetAddr(adapter, ip, gateway, netmask); AdapterDevicePing(adapter, "36.152.44.95");///< ping www.baidu.com - AdapterDeviceNetstat(adapter); + return AdapterDeviceNetstat(adapter); } #ifdef ADD_XIZI_FETURES SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN)|SHELL_CMD_PARAM_NUM(4)|SHELL_CMD_DISABLE_RETURN, wifiaddrset, wifiaddrset, addrset adapter wifi); @@ -243,7 +240,7 @@ int wifiping(int argc, char *argv[]) { struct Adapter* adapter = AdapterDeviceFindByName(ADAPTER_WIFI_NAME); printf("ping %s\n",argv[1]); - AdapterDevicePing(adapter, argv[1]); + return AdapterDevicePing(adapter, argv[1]); } #ifdef ADD_XIZI_FETURES SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN)|SHELL_CMD_PARAM_NUM(3), wifiping, wifiping, wifiping adapter ); @@ -264,7 +261,7 @@ int wificonnect(int argc, char *argv[]) adapter->socket.protocal = SOCKET_PROTOCOL_UDP; } - AdapterDeviceConnect(adapter, net_role, ip, port, ip_type); + return AdapterDeviceConnect(adapter, net_role, ip, port, ip_type); } #ifdef ADD_XIZI_FETURES SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN)|SHELL_CMD_PARAM_NUM(4)|SHELL_CMD_DISABLE_RETURN, wificonnect, wificonnect, wificonnect adapter); @@ -279,6 +276,7 @@ int wifisend(int argc, char *argv[]) AdapterDeviceSend(adapter, wifi_msg, len); PrivTaskDelay(1000); } + return 0; } #ifdef ADD_XIZI_FETURES SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN)|SHELL_CMD_PARAM_NUM(3)|SHELL_CMD_DISABLE_RETURN, wifisend, wifisend, wifisend adapter wifi information); @@ -297,3 +295,117 @@ int wifirecv(int argc, char *argv[]) #ifdef ADD_XIZI_FETURES SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN)|SHELL_CMD_PARAM_NUM(3)|SHELL_CMD_DISABLE_RETURN, wifirecv, wifirecv, wifirecv adapter wifi information); #endif + +#ifdef ADD_NUTTX_FETURES + +enum +{ + APT_WIFI_PARAM_IP, + APT_WIFI_PARAM_PORT, + APT_WIFI_PARAM_SSID, + APT_WIFI_PARAM_PWD, + APT_WIFI_PARAM_GW, + APT_WIFI_PARAM_SERVER, + APT_WIFI_PARAM_MASK, + APT_WIFI_PARAM_PING, + APT_WIFI_PARAM_NUM +}; + +#define APT_WIFI_PARAM_LEN 20 + +char wifi_param[APT_WIFI_PARAM_NUM][APT_WIFI_PARAM_LEN] = {0}; + +#define CHECK_RET(__func) \ +ret = __func; \ +if(ret != 0){ \ + printf("%s %d failed\n", __func__, __LINE__); \ + AdapterDeviceClose(adapter); \ + return ret; \ +}; + +void AdapterWifiGetParam(int argc, char *argv[]) +{ + int i, j; + char *param_str[] = {"ip", "port", "ssid", "pwd", "gw", "server", "mask", "ping"}; + char *default_str[] = + {"192.168.137.34", "12345", "test", "tttttttt", "192.168.137.71", "192.168.137.1", "255.255.255.0", "220.181.38.251"}; + + for(i = 0; i < APT_WIFI_PARAM_NUM; i ++) + { + memset(wifi_param[i], 0, APT_WIFI_PARAM_LEN); + strcpy(wifi_param[i], default_str[i]); + } + + for(i = 0; i < argc; i ++) + { + for(j = 0; j < APT_WIFI_PARAM_NUM; j ++) + { + if(strncmp(argv[i], param_str[j], strlen(param_str[j])) == 0) + { + printf("wifi %d: %s\n", j, argv[i] + strlen(param_str[j]) + 1); + strcpy(wifi_param[j], argv[i] + strlen(param_str[j]) + 1); + } + } + } + + printf("--- wifi parameter ---\n"); + for(i = 0; i < APT_WIFI_PARAM_NUM; i ++) + { + printf("%7.7s = %s\n", param_str[i], wifi_param[i]); + } + printf("----------------------\n"); +} + + +int AdapterWifiTest(int argc, char *argv[]) +{ + int i, ret; + + struct Adapter* adapter = AdapterDeviceFindByName(ADAPTER_WIFI_NAME); + AdapterWifiGetParam(argc, argv); + + enum NetRoleType net_role = CLIENT; + enum IpType ip_type = IPV4; + struct WifiParam param; + memset(¶m, 0, sizeof(struct WifiParam)); + strncpy((char *)param.wifi_ssid, wifi_param[APT_WIFI_PARAM_SSID], strlen(wifi_param[APT_WIFI_PARAM_SSID])); + strncpy((char *)param.wifi_pwd, wifi_param[APT_WIFI_PARAM_PWD], strlen(wifi_param[APT_WIFI_PARAM_PWD])); + + adapter->adapter_param = ¶m; + + CHECK_RET(AdapterDeviceOpen(adapter)); + CHECK_RET(AdapterDeviceSetUp(adapter)); + + CHECK_RET(AdapterDeviceSetAddr(adapter, wifi_param[APT_WIFI_PARAM_IP], wifi_param[APT_WIFI_PARAM_GW], + wifi_param[APT_WIFI_PARAM_MASK])); + + CHECK_RET(AdapterDeviceNetstat(adapter)); + + adapter->socket.protocal = SOCKET_PROTOCOL_TCP; + CHECK_RET(AdapterDeviceConnect(adapter, net_role, wifi_param[APT_WIFI_PARAM_SERVER], + wifi_param[APT_WIFI_PARAM_PORT], ip_type)); + + const char *wifi_msg = "Wifi Test"; + for(i = 0; i < 10; i++) + { + AdapterDeviceSend(adapter, wifi_msg, strlen(wifi_msg)); + PrivTaskDelay(4000); + } + + char wifi_recv_msg[128]; + for(i = 0; i < 10; i ++) + { + AdapterDeviceRecv(adapter, wifi_recv_msg, 128); + PrivTaskDelay(1000); + } + +// printf("ping %s\n", wifi_param[APT_WIFI_PARAM_PING]); +// +// CHECK_RET(AdapterDevicePing(adapter, wifi_param[APT_WIFI_PARAM_PING])); +// AdapterDeviceDisconnect(adapter, NULL); + ret = AdapterDeviceClose(adapter); + return ret; +} + +#endif + diff --git a/APP_Framework/Framework/connection/wifi/esp07s_wifi/Kconfig b/APP_Framework/Framework/connection/wifi/esp07s_wifi/Kconfig index a54223b9b..354d80907 100755 --- a/APP_Framework/Framework/connection/wifi/esp07s_wifi/Kconfig +++ b/APP_Framework/Framework/connection/wifi/esp07s_wifi/Kconfig @@ -13,7 +13,7 @@ if ADD_XIZI_FETURES default "/dev/uart2_dev2" depends on !ADAPTER_ESP07S_DRIVER_EXTUART - if ADAPTER_ESP07S_DRIVER_EXTUART + if ADAPTER_ESP07S_DRIVER_EXTUART config ADAPTER_ESP07S_DRIVER string "ESP07S device extra uart driver path" default "/dev/extuart_dev6" @@ -25,7 +25,24 @@ if ADD_XIZI_FETURES endif if ADD_NUTTX_FETURES + config ADAPTER_ESP07S_DRIVER_EXTUART + bool "Using extra uart to support wifi" + default n + config ADAPTER_ESP07S_DRIVER + string "ESP07S device uart driver path" + default "/dev/uart2_dev2" + depends on !ADAPTER_ESP07S_DRIVER_EXTUART + + if ADAPTER_ESP07S_DRIVER_EXTUART + config ADAPTER_ESP07S_DRIVER + string "ESP07S device extra uart driver path" + default "/dev/extuart_dev6" + + config ADAPTER_ESP07S_DRIVER_EXT_PORT + int "if ESP07S device using extuart, choose port" + default "6" + endif endif if ADD_RTTHREAD_FETURES diff --git a/APP_Framework/Framework/connection/wifi/esp07s_wifi/Makefile b/APP_Framework/Framework/connection/wifi/esp07s_wifi/Makefile index e0ce0a8ac..53493604e 100755 --- a/APP_Framework/Framework/connection/wifi/esp07s_wifi/Makefile +++ b/APP_Framework/Framework/connection/wifi/esp07s_wifi/Makefile @@ -1,3 +1,13 @@ +include $(KERNEL_ROOT)/.config +ifeq ($(CONFIG_ADD_NUTTX_FETURES),y) + include $(APPDIR)/Make.defs + CSRCS += esp07s_wifi.c + include $(APPDIR)/Application.mk + +endif + +ifeq ($(CONFIG_ADD_XIZI_FETURES),y) SRC_FILES := esp07s_wifi.c include $(KERNEL_ROOT)/compiler.mk +endif diff --git a/APP_Framework/Framework/connection/wifi/esp07s_wifi/esp07s_wifi.c b/APP_Framework/Framework/connection/wifi/esp07s_wifi/esp07s_wifi.c index b634f7d6e..36c943b73 100755 --- a/APP_Framework/Framework/connection/wifi/esp07s_wifi/esp07s_wifi.c +++ b/APP_Framework/Framework/connection/wifi/esp07s_wifi/esp07s_wifi.c @@ -25,6 +25,11 @@ #define LEN_PARA_BUF 128 +#ifdef ADD_NUTTX_FETURES +#define EOK 0 +#define x_err_t int +#endif + static int Esp07sWifiSetDown(struct Adapter *adapter_at); /** @@ -116,7 +121,7 @@ static int Esp07sWifiOpen(struct Adapter *adapter) AtSetReplyEndChar(adapter->agent,'O','K'); - ADAPTER_DEBUG("Esp07sWifi open done\n"); + ADAPTER_DEBUG("Esp07sWifi open done\n"); return 0; } @@ -196,13 +201,13 @@ static int Esp07sWifiSetUp(struct Adapter *adapter) } PrivTaskDelay(2000); /* config as softAP+station mode */ - ret = AtCmdConfigAndCheck(agent, "AT+CWMODE=3\r\n", "OK"); + ret = AtCmdConfigAndCheck(agent, "AT+CWMODE=3\r\n", "OK"); if(ret < 0) { printf("%s %d cmd[AT+CWMODE=3] config failed!\n",__func__,__LINE__); return -1; } PrivTaskDelay(2000); - /* connect the router */ + /* connect the router */ memset(cmd,0,sizeof(cmd)); strncpy(cmd,"AT+CWJAP=",strlen("AT+CWJAP=")); strncat(cmd,"\"",1); @@ -222,7 +227,7 @@ static int Esp07sWifiSetUp(struct Adapter *adapter) return -1; } - /* check the wifi ip address */ + /* check the wifi ip address */ ATReplyType reply = CreateATReply(256); if (NULL == reply) { printf("%s %d at_create_resp failed!\n",__func__,__LINE__); @@ -291,7 +296,7 @@ static int Esp07sWifiSetAddr(struct Adapter *adapter, const char *ip, const char strncat(cmd,"\"",1); strcat(cmd,"\r\n"); - ret = AtCmdConfigAndCheck(adapter->agent, cmd, "OK"); + ret = AtCmdConfigAndCheck(adapter->agent, cmd, "OK"); if(ret < 0) { printf("%s %d cmd[%s] config ip failed!\n",__func__,__LINE__,cmd); return -1; @@ -339,7 +344,7 @@ static int Esp07sWifiNetstat(struct Adapter *adapter) int ret = 0; char *result = NULL; - /* check the wifi ip address */ + /* check the wifi ip address */ ATReplyType reply = CreateATReply(256); if (NULL == reply) { printf("%s %d at_create_resp failed!\n",__func__,__LINE__); @@ -359,7 +364,7 @@ static int Esp07sWifiNetstat(struct Adapter *adapter) goto __exit; } printf("[%s]\n", result); - + __exit: DeleteATReply(reply); @@ -380,7 +385,7 @@ static int Esp07sWifiConnect(struct Adapter *adapter, enum NetRoleType net_role, int ret = EOK; char cmd[LEN_PARA_BUF]; struct ATAgent *agent = adapter->agent; - + memset(cmd,0,sizeof(cmd)); if(adapter->socket.protocal == SOCKET_PROTOCOL_TCP && net_role == CLIENT) //esp07s as tcp client to connect server { @@ -397,13 +402,13 @@ static int Esp07sWifiConnect(struct Adapter *adapter, enum NetRoleType net_role, strncat(cmd, port, strlen(port)); strcat(cmd,"\r\n"); - ret = AtCmdConfigAndCheck(agent, cmd, "OK"); + ret = AtCmdConfigAndCheck(agent, cmd, "OK"); if(ret < 0) { printf("%s %d tcp connect [%s] failed!\n",__func__,__LINE__,ip); return -1; } - } - else if(adapter->socket.protocal == SOCKET_PROTOCOL_UDP) + } + else if(adapter->socket.protocal == SOCKET_PROTOCOL_UDP) { //e.g. AT+CIPSTART="UDP","192.168.3.116",8080,2233,0 UDP protocol, server IP, port,local port,udp mode strncpy(cmd,"AT+CIPSTART=",strlen("AT+CIPSTART=")); @@ -422,7 +427,7 @@ static int Esp07sWifiConnect(struct Adapter *adapter, enum NetRoleType net_role, strncat(cmd, "0", 1); ///< udp transparent transmission mode must be 0 strcat(cmd,"\r\n"); - ret = AtCmdConfigAndCheck(agent, cmd, "OK"); + ret = AtCmdConfigAndCheck(agent, cmd, "OK"); if(ret < 0) { printf("%s %d udp connect [%s] failed!\n",__func__,__LINE__,ip); return -1; @@ -455,17 +460,17 @@ static int Esp07sWifiDisconnect(struct Adapter *adapter) memset(cmd,0,sizeof(cmd)); /* step1: stop transparent transmission mode */ - ATOrderSend(agent, REPLY_TIME_OUT, NULL, "+++\r\n"); + ATOrderSend(agent, REPLY_TIME_OUT, NULL, "+++\r\n"); /* step2: exit transparent transmission mode */ - ret = AtCmdConfigAndCheck(agent, "AT+CIPMODE=0\r\n", "OK"); + ret = AtCmdConfigAndCheck(agent, "AT+CIPMODE=0\r\n", "OK"); if(ret < 0) { printf("%s %d cmd[AT+CIPMODE=0] exit failed!\n",__func__,__LINE__); return -1; } /* step3: disconnect */ - ret = AtCmdConfigAndCheck(agent, "AT+CIPCLOSE\r\n", "OK"); + ret = AtCmdConfigAndCheck(agent, "AT+CIPCLOSE\r\n", "OK"); if(ret < 0) { printf("%s %d cmd [AT+CIPCLOSE] disconnect failed!\n",__func__,__LINE__); return -1; @@ -490,7 +495,7 @@ static int Esp07sWifiIoctl(struct Adapter *adapter, int cmd, void *args) case CONFIG_WIFI_RESTORE: /* resore wifi */ ATOrderSend(adapter->agent, REPLY_TIME_OUT, NULL, "AT+RESTORE\r\n"); break; - case CONFIG_WIFI_BAUDRATE: + case CONFIG_WIFI_BAUDRATE: /* step1: config mcu uart*/ baud_rate = *((uint32_t *)args); @@ -525,14 +530,14 @@ static int Esp07sWifiIoctl(struct Adapter *adapter, int cmd, void *args) strncat(at_cmd, ",", 1); strncat(at_cmd, "8", 1); strncat(at_cmd, ",", 1); - strncat(at_cmd, "1", 1); + strncat(at_cmd, "1", 1); strncat(at_cmd, ",", 1); strncat(at_cmd, "0", 1); strncat(at_cmd, ",", 1); strncat(at_cmd, "3", 1); strcat(at_cmd,"\r\n"); - ret = AtCmdConfigAndCheck(adapter->agent, at_cmd, "OK"); + ret = AtCmdConfigAndCheck(adapter->agent, at_cmd, "OK"); if(ret < 0) { printf("%s %d cmd [%s] config uart failed!\n",__func__,__LINE__,at_cmd); ret = -1; @@ -541,7 +546,7 @@ static int Esp07sWifiIoctl(struct Adapter *adapter, int cmd, void *args) break; default: ret = -1; - break; + break; } return ret; @@ -572,7 +577,7 @@ static const struct IpProtocolDone esp07s_wifi_done = AdapterProductInfoType Esp07sWifiAttach(struct Adapter *adapter) { struct AdapterProductInfo *product_info = PrivMalloc(sizeof(struct AdapterProductInfo)); - if (!product_info) + if (!product_info) { printf("Esp07sWifiAttach Attach malloc product_info error\n"); PrivFree(product_info); @@ -584,4 +589,4 @@ AdapterProductInfoType Esp07sWifiAttach(struct Adapter *adapter) product_info->model_done = (void *)&esp07s_wifi_done; return product_info; -} \ No newline at end of file +} diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/wifinsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/wifinsh/defconfig new file mode 100755 index 000000000..a03e3c01f --- /dev/null +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/wifinsh/defconfig @@ -0,0 +1,54 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +CONFIG_ADD_NUTTX_FETURES=y +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="xidatong" +CONFIG_ARCH_BOARD_XIDATONG=y +CONFIG_ARCH_CHIP="imxrt" +CONFIG_ARCH_CHIP_IMXRT=y +CONFIG_ARCH_CHIP_MIMXRT1052CVL5B=y +CONFIG_ARCH_INTERRUPTSTACK=10240 +CONFIG_ARCH_STACKDUMP=y +CONFIG_ARMV7M_DCACHE=y +CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y +CONFIG_ARMV7M_ICACHE=y +CONFIG_ARMV7M_USEBASEPRI=y +CONFIG_BOARD_LOOPSPERMSEC=104926 +CONFIG_BUILTIN=y +CONFIG_CLOCK_MONOTONIC=y +CONFIG_EXAMPLES_HELLO=y +CONFIG_IMXRT_GPIO_IRQ=y +CONFIG_IMXRT_GPIO3_0_15_IRQ=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_IMXRT_LPUART1=y +CONFIG_INTELHEX_BINARY=y +CONFIG_LPUART1_SERIAL_CONSOLE=y +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_DISABLE_IFUPDOWN=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_RAM_SIZE=524288 +CONFIG_RAM_START=0x20200000 +CONFIG_RAW_BINARY=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_WAITPID=y +CONFIG_START_DAY=14 +CONFIG_START_MONTH=3 +CONFIG_SYSTEM_NSH=y +CONFIG_DEV_GPIO=y +CONFIG_READLINE_CMD_HISTORY=y +CONFIG_READLINE_CMD_HISTORY_LEN=100 +CONFIG_READLINE_CMD_HISTORY_LINELEN=120 +CONFIG_READLINE_TABCOMPLETION=y +CONFIG_FS_ROMFS=y +CONFIG_NSH_ROMFSETC=y +CONFIG_NSH_ARCHROMFS=y +CONFIG_BOARDCTL_RESET=y +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/Kconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/Kconfig index 1e689be28..a482d7db1 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/Kconfig +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/Kconfig @@ -676,6 +676,10 @@ config NSH_DISABLE_ADAPTER_BLUETOOTH_TEST bool "Disable hc08 AdapterBlueToothTest." default n +config NSH_DISABLE_ADAPTER_WIFI_TEST + bool "Disable esp07s AdapterWIFITest." + default n + config NSH_DISABLE_K210_FFT bool "Disable the K210 fft device." default n diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h index 771b8b4de..cfa6b1afc 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h @@ -22,7 +22,7 @@ * @file nsh.h * @brief nuttx source code * https://github.com/apache/incubator-nuttx-apps -* @version 10.2.0 +* @version 10.2.0 * @author AIIT XUOS Lab * @date 2022-03-17 */ @@ -1506,6 +1506,10 @@ int nsh_foreach_var(FAR struct nsh_vtbl_s *vtbl, nsh_foreach_var_t cb, int cmd_AdapterBlueToothTest(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv); #endif +#if defined(CONFIG_ADAPTER_ESP07S_WIFI) && !defined(CONFIG_NSH_DISABLE_ADAPTER_WIFI_TEST) + int cmd_AdapterWifiTest(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv); +#endif + #if defined(CONFIG_K210_FFT_TEST) && !defined(CONFIG_NSH_DISABLE_K210_FFT) int cmd_fft(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv); #endif diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c index 961c524c8..34fb18629 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c @@ -283,6 +283,17 @@ int cmd_recvzigbee(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv) } #endif +#if defined(CONFIG_ADAPTER_ESP07S_WIFI) && !defined(CONFIG_NSH_DISABLE_ADAPTER_WIFI_TEST) +extern int AdapterWifiTest(int argc, char *argv[]); +int cmd_AdapterWifiTest(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv) +{ + nsh_output(vtbl, "Hello, world!\n"); + FrameworkInit(); + AdapterWifiTest(argc, argv); + return OK; +} +#endif + #if (defined(CONFIG_ADAPTER_LORA_SX1278) || defined(CONFIG_ADAPTER_LORA_E220)) && !defined(CONFIG_NSH_DISABLE_ADAPTER_LORATEST) extern int AdapterLoraTest(void); int cmd_AdapterLoraTest(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv) diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c index 6526c2b70..acc04fb15 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c @@ -22,7 +22,7 @@ * @file nsh_command.c * @brief nuttx source code * https://github.com/apache/incubator-nuttx-apps -* @version 10.2.0 +* @version 10.2.0 * @author AIIT XUOS Lab * @date 2022-03-17 */ @@ -678,6 +678,10 @@ static const struct cmdmap_s g_cmdmap[] = { "AdapterBlueToothTest", cmd_AdapterBlueToothTest, 1, 1, "[BlueTooth hc08 test.]" }, #endif +#if defined(CONFIG_ADAPTER_ESP07S_WIFI) && !defined(CONFIG_NSH_DISABLE_ADAPTER_WIFI_TEST) + { "wifitest", cmd_AdapterWifiTest, 1, 8, "[WIFI test.]" }, +#endif + #if defined(CONFIG_K210_FFT_TEST) && !defined(CONFIG_NSH_DISABLE_K210_FFT) { "fft", cmd_fft, 1, 1, "[K210 fft function.]" }, #endif From a6f5a5f79d085a7e5758e382656499134e8f0927 Mon Sep 17 00:00:00 2001 From: wlyu Date: Thu, 9 Jun 2022 18:48:13 +0800 Subject: [PATCH 44/46] support wifi module for nuttx on xidatong --- .../Framework/connection/wifi/Make.defs | 7 + .../Framework/connection/wifi/Makefile | 10 ++ .../Framework/connection/wifi/adapter_wifi.c | 160 +++++++++++++++--- .../connection/wifi/esp07s_wifi/Kconfig | 21 ++- .../connection/wifi/esp07s_wifi/Make.defs | 6 + .../connection/wifi/esp07s_wifi/Makefile | 10 ++ .../connection/wifi/esp07s_wifi/esp07s_wifi.c | 47 ++--- .../xidatong/configs/wifinsh/defconfig | 61 +++++++ .../app_match_nuttx/apps/nshlib/Kconfig | 4 + .../app_match_nuttx/apps/nshlib/nsh.h | 6 +- .../apps/nshlib/nsh_Applicationscmd.c | 11 ++ .../app_match_nuttx/apps/nshlib/nsh_command.c | 6 +- 12 files changed, 300 insertions(+), 49 deletions(-) create mode 100755 APP_Framework/Framework/connection/wifi/Make.defs create mode 100755 APP_Framework/Framework/connection/wifi/esp07s_wifi/Make.defs create mode 100755 Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/wifinsh/defconfig diff --git a/APP_Framework/Framework/connection/wifi/Make.defs b/APP_Framework/Framework/connection/wifi/Make.defs new file mode 100755 index 000000000..cf51e4a1d --- /dev/null +++ b/APP_Framework/Framework/connection/wifi/Make.defs @@ -0,0 +1,7 @@ +############################################################################ +# APP_Framework/Framework/connection/zigbee/Make.defs +############################################################################ +ifneq ($(CONFIG_CONNECTION_ADAPTER_WIFI),) +CONFIGURED_APPS += $(APPDIR)/../../../APP_Framework/Framework/connection/wifi +endif +include $(wildcard $(APPDIR)/../../../APP_Framework/Framework/connection/wifi/*/Make.defs) diff --git a/APP_Framework/Framework/connection/wifi/Makefile b/APP_Framework/Framework/connection/wifi/Makefile index 2930fd977..cfa6cac9f 100644 --- a/APP_Framework/Framework/connection/wifi/Makefile +++ b/APP_Framework/Framework/connection/wifi/Makefile @@ -1,3 +1,12 @@ +include $(KERNEL_ROOT)/.config +ifeq ($(CONFIG_ADD_NUTTX_FETURES),y) + include $(APPDIR)/Make.defs + CSRCS += adapter_wifi.c + include $(APPDIR)/Application.mk + +endif + +ifeq ($(CONFIG_ADD_XIZI_FETURES),y) SRC_FILES := adapter_wifi.c ifeq ($(CONFIG_ADAPTER_HFA21_WIFI),y) @@ -9,3 +18,4 @@ ifeq ($(CONFIG_ADAPTER_ESP07S_WIFI),y) endif include $(KERNEL_ROOT)/compiler.mk +endif diff --git a/APP_Framework/Framework/connection/wifi/adapter_wifi.c b/APP_Framework/Framework/connection/wifi/adapter_wifi.c index 039f96598..fe5461d71 100644 --- a/APP_Framework/Framework/connection/wifi/adapter_wifi.c +++ b/APP_Framework/Framework/connection/wifi/adapter_wifi.c @@ -100,6 +100,7 @@ int AdapterWifiInit(void) } /******************wifi TEST*********************/ +#ifdef ADD_XIZI_FETURES int AdapterWifiTest(void) { char cmd[64]; @@ -107,29 +108,28 @@ int AdapterWifiTest(void) struct Adapter* adapter = AdapterDeviceFindByName(ADAPTER_WIFI_NAME); - #ifdef ADAPTER_HFA21_DRIVER_EXT_PORT static BusType ch438_pin; ch438_pin = PinBusInitGet(); - struct PinParam pin_cfg; - int ret = 0; + struct PinParam pin_cfg; + int ret = 0; - struct BusConfigureInfo configure_info; - configure_info.configure_cmd = OPE_CFG; - configure_info.private_data = (void *)&pin_cfg; + struct BusConfigureInfo configure_info; + configure_info.configure_cmd = OPE_CFG; + configure_info.private_data = (void *)&pin_cfg; pin_cfg.cmd = GPIO_CONFIG_MODE; pin_cfg.pin = 22; pin_cfg.mode = GPIO_CFG_OUTPUT; - ret = BusDrvConfigure(ch438_pin->owner_driver, &configure_info); + ret = BusDrvConfigure(ch438_pin->owner_driver, &configure_info); struct PinStat pin_stat; - struct BusBlockWriteParam write_param; - struct BusBlockReadParam read_param; - write_param.buffer = (void *)&pin_stat; - - pin_stat.val = GPIO_HIGH; + struct BusBlockWriteParam write_param; + struct BusBlockReadParam read_param; + write_param.buffer = (void *)&pin_stat; + + pin_stat.val = GPIO_HIGH; pin_stat.pin = 22; BusDevWriteData(ch438_pin->owner_haldev, &write_param); @@ -155,7 +155,6 @@ int AdapterWifiTest(void) PrivClose(pin_fd); #endif - AdapterDeviceOpen(adapter); // AdapterDeviceControl(adapter, OPE_INT, &baud_rate); @@ -182,8 +181,8 @@ int AdapterWifiTest(void) AdapterDeviceRecv(adapter, wifi_recv_msg, 128); PrivTaskDelay(1000); } - } +#endif #ifdef ADD_RTTHREAD_FETURES MSH_CMD_EXPORT(AdapterWifiTest,a wifi adpter sample); @@ -195,8 +194,7 @@ SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_FUNC)|SHE int wifiopen(void) { struct Adapter* adapter = AdapterDeviceFindByName(ADAPTER_WIFI_NAME); - - AdapterDeviceOpen(adapter); + return AdapterDeviceOpen(adapter); } #ifdef ADD_XIZI_FETURES SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_FUNC)|SHELL_CMD_PARAM_NUM(0)|SHELL_CMD_DISABLE_RETURN, wifiopen, wifiopen, open adapter wifi ); @@ -204,8 +202,7 @@ SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_FUNC)|SHE int wificlose(void) { struct Adapter* adapter = AdapterDeviceFindByName(ADAPTER_WIFI_NAME); - - AdapterDeviceClose(adapter); + return AdapterDeviceClose(adapter); } #ifdef ADD_XIZI_FETURES SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_FUNC)|SHELL_CMD_PARAM_NUM(0)|SHELL_CMD_DISABLE_RETURN, wificlose, wificlose, close adapter wifi ); @@ -215,12 +212,12 @@ int wifisetup(int argc, char *argv[]) struct Adapter* adapter = AdapterDeviceFindByName(ADAPTER_WIFI_NAME); struct WifiParam param; memset(¶m,0,sizeof(struct WifiParam)); - strncpy(param.wifi_ssid, argv[1], strlen(argv[1])); - strncpy(param.wifi_pwd, argv[2], strlen(argv[2])); + strncpy((char *)param.wifi_ssid, argv[1], strlen(argv[1])); + strncpy((char *)param.wifi_pwd, argv[2], strlen(argv[2])); adapter->adapter_param = ¶m; - AdapterDeviceSetUp(adapter); + return AdapterDeviceSetUp(adapter); } #ifdef ADD_XIZI_FETURES SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN)|SHELL_CMD_PARAM_NUM(3)|SHELL_CMD_DISABLE_RETURN, wifisetup, wifisetup, setup adapter wifi ); @@ -234,7 +231,7 @@ int wifiaddrset(int argc, char *argv[]) AdapterDeviceSetAddr(adapter, ip, gateway, netmask); AdapterDevicePing(adapter, "36.152.44.95");///< ping www.baidu.com - AdapterDeviceNetstat(adapter); + return AdapterDeviceNetstat(adapter); } #ifdef ADD_XIZI_FETURES SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN)|SHELL_CMD_PARAM_NUM(4)|SHELL_CMD_DISABLE_RETURN, wifiaddrset, wifiaddrset, addrset adapter wifi); @@ -243,7 +240,7 @@ int wifiping(int argc, char *argv[]) { struct Adapter* adapter = AdapterDeviceFindByName(ADAPTER_WIFI_NAME); printf("ping %s\n",argv[1]); - AdapterDevicePing(adapter, argv[1]); + return AdapterDevicePing(adapter, argv[1]); } #ifdef ADD_XIZI_FETURES SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN)|SHELL_CMD_PARAM_NUM(3), wifiping, wifiping, wifiping adapter ); @@ -264,7 +261,7 @@ int wificonnect(int argc, char *argv[]) adapter->socket.protocal = SOCKET_PROTOCOL_UDP; } - AdapterDeviceConnect(adapter, net_role, ip, port, ip_type); + return AdapterDeviceConnect(adapter, net_role, ip, port, ip_type); } #ifdef ADD_XIZI_FETURES SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN)|SHELL_CMD_PARAM_NUM(4)|SHELL_CMD_DISABLE_RETURN, wificonnect, wificonnect, wificonnect adapter); @@ -279,6 +276,7 @@ int wifisend(int argc, char *argv[]) AdapterDeviceSend(adapter, wifi_msg, len); PrivTaskDelay(1000); } + return 0; } #ifdef ADD_XIZI_FETURES SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN)|SHELL_CMD_PARAM_NUM(3)|SHELL_CMD_DISABLE_RETURN, wifisend, wifisend, wifisend adapter wifi information); @@ -297,3 +295,117 @@ int wifirecv(int argc, char *argv[]) #ifdef ADD_XIZI_FETURES SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN)|SHELL_CMD_PARAM_NUM(3)|SHELL_CMD_DISABLE_RETURN, wifirecv, wifirecv, wifirecv adapter wifi information); #endif + +#ifdef ADD_NUTTX_FETURES + +enum +{ + APT_WIFI_PARAM_IP, + APT_WIFI_PARAM_PORT, + APT_WIFI_PARAM_SSID, + APT_WIFI_PARAM_PWD, + APT_WIFI_PARAM_GW, + APT_WIFI_PARAM_SERVER, + APT_WIFI_PARAM_MASK, + APT_WIFI_PARAM_PING, + APT_WIFI_PARAM_NUM +}; + +#define APT_WIFI_PARAM_LEN 20 + +char wifi_param[APT_WIFI_PARAM_NUM][APT_WIFI_PARAM_LEN] = {0}; + +#define CHECK_RET(__func) \ +ret = __func; \ +if(ret != 0){ \ + printf("%s %d failed\n", __func__, __LINE__); \ + AdapterDeviceClose(adapter); \ + return ret; \ +}; + +void AdapterWifiGetParam(int argc, char *argv[]) +{ + int i, j; + char *param_str[] = {"ip", "port", "ssid", "pwd", "gw", "server", "mask", "ping"}; + char *default_str[] = + {"192.168.137.34", "12345", "test", "tttttttt", "192.168.137.71", "192.168.137.1", "255.255.255.0", "220.181.38.251"}; + + for(i = 0; i < APT_WIFI_PARAM_NUM; i ++) + { + memset(wifi_param[i], 0, APT_WIFI_PARAM_LEN); + strcpy(wifi_param[i], default_str[i]); + } + + for(i = 0; i < argc; i ++) + { + for(j = 0; j < APT_WIFI_PARAM_NUM; j ++) + { + if(strncmp(argv[i], param_str[j], strlen(param_str[j])) == 0) + { + printf("wifi %d: %s\n", j, argv[i] + strlen(param_str[j]) + 1); + strcpy(wifi_param[j], argv[i] + strlen(param_str[j]) + 1); + } + } + } + + printf("--- wifi parameter ---\n"); + for(i = 0; i < APT_WIFI_PARAM_NUM; i ++) + { + printf("%7.7s = %s\n", param_str[i], wifi_param[i]); + } + printf("----------------------\n"); +} + + +int AdapterWifiTest(int argc, char *argv[]) +{ + int i, ret; + + struct Adapter* adapter = AdapterDeviceFindByName(ADAPTER_WIFI_NAME); + AdapterWifiGetParam(argc, argv); + + enum NetRoleType net_role = CLIENT; + enum IpType ip_type = IPV4; + struct WifiParam param; + memset(¶m, 0, sizeof(struct WifiParam)); + strncpy((char *)param.wifi_ssid, wifi_param[APT_WIFI_PARAM_SSID], strlen(wifi_param[APT_WIFI_PARAM_SSID])); + strncpy((char *)param.wifi_pwd, wifi_param[APT_WIFI_PARAM_PWD], strlen(wifi_param[APT_WIFI_PARAM_PWD])); + + adapter->adapter_param = ¶m; + + CHECK_RET(AdapterDeviceOpen(adapter)); + CHECK_RET(AdapterDeviceSetUp(adapter)); + + CHECK_RET(AdapterDeviceSetAddr(adapter, wifi_param[APT_WIFI_PARAM_IP], wifi_param[APT_WIFI_PARAM_GW], + wifi_param[APT_WIFI_PARAM_MASK])); + + CHECK_RET(AdapterDeviceNetstat(adapter)); + + adapter->socket.protocal = SOCKET_PROTOCOL_TCP; + CHECK_RET(AdapterDeviceConnect(adapter, net_role, wifi_param[APT_WIFI_PARAM_SERVER], + wifi_param[APT_WIFI_PARAM_PORT], ip_type)); + + const char *wifi_msg = "Wifi Test"; + for(i = 0; i < 10; i++) + { + AdapterDeviceSend(adapter, wifi_msg, strlen(wifi_msg)); + PrivTaskDelay(4000); + } + + char wifi_recv_msg[128]; + for(i = 0; i < 10; i ++) + { + AdapterDeviceRecv(adapter, wifi_recv_msg, 128); + PrivTaskDelay(1000); + } + +// printf("ping %s\n", wifi_param[APT_WIFI_PARAM_PING]); +// +// CHECK_RET(AdapterDevicePing(adapter, wifi_param[APT_WIFI_PARAM_PING])); +// AdapterDeviceDisconnect(adapter, NULL); + ret = AdapterDeviceClose(adapter); + return ret; +} + +#endif + diff --git a/APP_Framework/Framework/connection/wifi/esp07s_wifi/Kconfig b/APP_Framework/Framework/connection/wifi/esp07s_wifi/Kconfig index a54223b9b..4a28b44a7 100755 --- a/APP_Framework/Framework/connection/wifi/esp07s_wifi/Kconfig +++ b/APP_Framework/Framework/connection/wifi/esp07s_wifi/Kconfig @@ -10,10 +10,10 @@ if ADD_XIZI_FETURES config ADAPTER_ESP07S_DRIVER string "ESP07S device uart driver path" - default "/dev/uart2_dev2" + default "/dev/ttyS2" depends on !ADAPTER_ESP07S_DRIVER_EXTUART - if ADAPTER_ESP07S_DRIVER_EXTUART + if ADAPTER_ESP07S_DRIVER_EXTUART config ADAPTER_ESP07S_DRIVER string "ESP07S device extra uart driver path" default "/dev/extuart_dev6" @@ -25,7 +25,24 @@ if ADD_XIZI_FETURES endif if ADD_NUTTX_FETURES + config ADAPTER_ESP07S_DRIVER_EXTUART + bool "Using extra uart to support wifi" + default n + config ADAPTER_ESP07S_DRIVER + string "ESP07S device uart driver path" + default "/dev/uart2_dev2" + depends on !ADAPTER_ESP07S_DRIVER_EXTUART + + if ADAPTER_ESP07S_DRIVER_EXTUART + config ADAPTER_ESP07S_DRIVER + string "ESP07S device extra uart driver path" + default "/dev/extuart_dev6" + + config ADAPTER_ESP07S_DRIVER_EXT_PORT + int "if ESP07S device using extuart, choose port" + default "6" + endif endif if ADD_RTTHREAD_FETURES diff --git a/APP_Framework/Framework/connection/wifi/esp07s_wifi/Make.defs b/APP_Framework/Framework/connection/wifi/esp07s_wifi/Make.defs new file mode 100755 index 000000000..400550a50 --- /dev/null +++ b/APP_Framework/Framework/connection/wifi/esp07s_wifi/Make.defs @@ -0,0 +1,6 @@ +############################################################################ +# APP_Framework/Framework/connection/zigbee/e18/Make.defs +############################################################################ +ifneq ($(CONFIG_ADAPTER_ESP07S_WIFI),) +CONFIGURED_APPS += $(APPDIR)/../../../APP_Framework/Framework/connection/wifi/esp07s_wifi +endif diff --git a/APP_Framework/Framework/connection/wifi/esp07s_wifi/Makefile b/APP_Framework/Framework/connection/wifi/esp07s_wifi/Makefile index e0ce0a8ac..53493604e 100755 --- a/APP_Framework/Framework/connection/wifi/esp07s_wifi/Makefile +++ b/APP_Framework/Framework/connection/wifi/esp07s_wifi/Makefile @@ -1,3 +1,13 @@ +include $(KERNEL_ROOT)/.config +ifeq ($(CONFIG_ADD_NUTTX_FETURES),y) + include $(APPDIR)/Make.defs + CSRCS += esp07s_wifi.c + include $(APPDIR)/Application.mk + +endif + +ifeq ($(CONFIG_ADD_XIZI_FETURES),y) SRC_FILES := esp07s_wifi.c include $(KERNEL_ROOT)/compiler.mk +endif diff --git a/APP_Framework/Framework/connection/wifi/esp07s_wifi/esp07s_wifi.c b/APP_Framework/Framework/connection/wifi/esp07s_wifi/esp07s_wifi.c index b634f7d6e..36c943b73 100755 --- a/APP_Framework/Framework/connection/wifi/esp07s_wifi/esp07s_wifi.c +++ b/APP_Framework/Framework/connection/wifi/esp07s_wifi/esp07s_wifi.c @@ -25,6 +25,11 @@ #define LEN_PARA_BUF 128 +#ifdef ADD_NUTTX_FETURES +#define EOK 0 +#define x_err_t int +#endif + static int Esp07sWifiSetDown(struct Adapter *adapter_at); /** @@ -116,7 +121,7 @@ static int Esp07sWifiOpen(struct Adapter *adapter) AtSetReplyEndChar(adapter->agent,'O','K'); - ADAPTER_DEBUG("Esp07sWifi open done\n"); + ADAPTER_DEBUG("Esp07sWifi open done\n"); return 0; } @@ -196,13 +201,13 @@ static int Esp07sWifiSetUp(struct Adapter *adapter) } PrivTaskDelay(2000); /* config as softAP+station mode */ - ret = AtCmdConfigAndCheck(agent, "AT+CWMODE=3\r\n", "OK"); + ret = AtCmdConfigAndCheck(agent, "AT+CWMODE=3\r\n", "OK"); if(ret < 0) { printf("%s %d cmd[AT+CWMODE=3] config failed!\n",__func__,__LINE__); return -1; } PrivTaskDelay(2000); - /* connect the router */ + /* connect the router */ memset(cmd,0,sizeof(cmd)); strncpy(cmd,"AT+CWJAP=",strlen("AT+CWJAP=")); strncat(cmd,"\"",1); @@ -222,7 +227,7 @@ static int Esp07sWifiSetUp(struct Adapter *adapter) return -1; } - /* check the wifi ip address */ + /* check the wifi ip address */ ATReplyType reply = CreateATReply(256); if (NULL == reply) { printf("%s %d at_create_resp failed!\n",__func__,__LINE__); @@ -291,7 +296,7 @@ static int Esp07sWifiSetAddr(struct Adapter *adapter, const char *ip, const char strncat(cmd,"\"",1); strcat(cmd,"\r\n"); - ret = AtCmdConfigAndCheck(adapter->agent, cmd, "OK"); + ret = AtCmdConfigAndCheck(adapter->agent, cmd, "OK"); if(ret < 0) { printf("%s %d cmd[%s] config ip failed!\n",__func__,__LINE__,cmd); return -1; @@ -339,7 +344,7 @@ static int Esp07sWifiNetstat(struct Adapter *adapter) int ret = 0; char *result = NULL; - /* check the wifi ip address */ + /* check the wifi ip address */ ATReplyType reply = CreateATReply(256); if (NULL == reply) { printf("%s %d at_create_resp failed!\n",__func__,__LINE__); @@ -359,7 +364,7 @@ static int Esp07sWifiNetstat(struct Adapter *adapter) goto __exit; } printf("[%s]\n", result); - + __exit: DeleteATReply(reply); @@ -380,7 +385,7 @@ static int Esp07sWifiConnect(struct Adapter *adapter, enum NetRoleType net_role, int ret = EOK; char cmd[LEN_PARA_BUF]; struct ATAgent *agent = adapter->agent; - + memset(cmd,0,sizeof(cmd)); if(adapter->socket.protocal == SOCKET_PROTOCOL_TCP && net_role == CLIENT) //esp07s as tcp client to connect server { @@ -397,13 +402,13 @@ static int Esp07sWifiConnect(struct Adapter *adapter, enum NetRoleType net_role, strncat(cmd, port, strlen(port)); strcat(cmd,"\r\n"); - ret = AtCmdConfigAndCheck(agent, cmd, "OK"); + ret = AtCmdConfigAndCheck(agent, cmd, "OK"); if(ret < 0) { printf("%s %d tcp connect [%s] failed!\n",__func__,__LINE__,ip); return -1; } - } - else if(adapter->socket.protocal == SOCKET_PROTOCOL_UDP) + } + else if(adapter->socket.protocal == SOCKET_PROTOCOL_UDP) { //e.g. AT+CIPSTART="UDP","192.168.3.116",8080,2233,0 UDP protocol, server IP, port,local port,udp mode strncpy(cmd,"AT+CIPSTART=",strlen("AT+CIPSTART=")); @@ -422,7 +427,7 @@ static int Esp07sWifiConnect(struct Adapter *adapter, enum NetRoleType net_role, strncat(cmd, "0", 1); ///< udp transparent transmission mode must be 0 strcat(cmd,"\r\n"); - ret = AtCmdConfigAndCheck(agent, cmd, "OK"); + ret = AtCmdConfigAndCheck(agent, cmd, "OK"); if(ret < 0) { printf("%s %d udp connect [%s] failed!\n",__func__,__LINE__,ip); return -1; @@ -455,17 +460,17 @@ static int Esp07sWifiDisconnect(struct Adapter *adapter) memset(cmd,0,sizeof(cmd)); /* step1: stop transparent transmission mode */ - ATOrderSend(agent, REPLY_TIME_OUT, NULL, "+++\r\n"); + ATOrderSend(agent, REPLY_TIME_OUT, NULL, "+++\r\n"); /* step2: exit transparent transmission mode */ - ret = AtCmdConfigAndCheck(agent, "AT+CIPMODE=0\r\n", "OK"); + ret = AtCmdConfigAndCheck(agent, "AT+CIPMODE=0\r\n", "OK"); if(ret < 0) { printf("%s %d cmd[AT+CIPMODE=0] exit failed!\n",__func__,__LINE__); return -1; } /* step3: disconnect */ - ret = AtCmdConfigAndCheck(agent, "AT+CIPCLOSE\r\n", "OK"); + ret = AtCmdConfigAndCheck(agent, "AT+CIPCLOSE\r\n", "OK"); if(ret < 0) { printf("%s %d cmd [AT+CIPCLOSE] disconnect failed!\n",__func__,__LINE__); return -1; @@ -490,7 +495,7 @@ static int Esp07sWifiIoctl(struct Adapter *adapter, int cmd, void *args) case CONFIG_WIFI_RESTORE: /* resore wifi */ ATOrderSend(adapter->agent, REPLY_TIME_OUT, NULL, "AT+RESTORE\r\n"); break; - case CONFIG_WIFI_BAUDRATE: + case CONFIG_WIFI_BAUDRATE: /* step1: config mcu uart*/ baud_rate = *((uint32_t *)args); @@ -525,14 +530,14 @@ static int Esp07sWifiIoctl(struct Adapter *adapter, int cmd, void *args) strncat(at_cmd, ",", 1); strncat(at_cmd, "8", 1); strncat(at_cmd, ",", 1); - strncat(at_cmd, "1", 1); + strncat(at_cmd, "1", 1); strncat(at_cmd, ",", 1); strncat(at_cmd, "0", 1); strncat(at_cmd, ",", 1); strncat(at_cmd, "3", 1); strcat(at_cmd,"\r\n"); - ret = AtCmdConfigAndCheck(adapter->agent, at_cmd, "OK"); + ret = AtCmdConfigAndCheck(adapter->agent, at_cmd, "OK"); if(ret < 0) { printf("%s %d cmd [%s] config uart failed!\n",__func__,__LINE__,at_cmd); ret = -1; @@ -541,7 +546,7 @@ static int Esp07sWifiIoctl(struct Adapter *adapter, int cmd, void *args) break; default: ret = -1; - break; + break; } return ret; @@ -572,7 +577,7 @@ static const struct IpProtocolDone esp07s_wifi_done = AdapterProductInfoType Esp07sWifiAttach(struct Adapter *adapter) { struct AdapterProductInfo *product_info = PrivMalloc(sizeof(struct AdapterProductInfo)); - if (!product_info) + if (!product_info) { printf("Esp07sWifiAttach Attach malloc product_info error\n"); PrivFree(product_info); @@ -584,4 +589,4 @@ AdapterProductInfoType Esp07sWifiAttach(struct Adapter *adapter) product_info->model_done = (void *)&esp07s_wifi_done; return product_info; -} \ No newline at end of file +} diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/wifinsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/wifinsh/defconfig new file mode 100755 index 000000000..9f77feaf2 --- /dev/null +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/wifinsh/defconfig @@ -0,0 +1,61 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +CONFIG_ADD_NUTTX_FETURES=y +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="xidatong" +CONFIG_ARCH_BOARD_XIDATONG=y +CONFIG_ARCH_CHIP="imxrt" +CONFIG_ARCH_CHIP_IMXRT=y +CONFIG_ARCH_CHIP_MIMXRT1052CVL5B=y +CONFIG_ARCH_INTERRUPTSTACK=10240 +CONFIG_ARCH_STACKDUMP=y +CONFIG_ARMV7M_DCACHE=y +CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y +CONFIG_ARMV7M_ICACHE=y +CONFIG_ARMV7M_USEBASEPRI=y +CONFIG_BOARD_LOOPSPERMSEC=104926 +CONFIG_BUILTIN=y +CONFIG_CLOCK_MONOTONIC=y +CONFIG_EXAMPLES_HELLO=y +CONFIG_IMXRT_GPIO_IRQ=y +CONFIG_IMXRT_GPIO3_0_15_IRQ=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_IMXRT_LPUART1=y +CONFIG_IMXRT_LPUART2=y +CONFIG_INTELHEX_BINARY=y +CONFIG_LPUART1_SERIAL_CONSOLE=y +CONFIG_LPUART2_SERIALDRIVER=y +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_DISABLE_IFUPDOWN=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_RAM_SIZE=524288 +CONFIG_RAM_START=0x20200000 +CONFIG_RAW_BINARY=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_WAITPID=y +CONFIG_START_DAY=14 +CONFIG_START_MONTH=3 +CONFIG_SYSTEM_NSH=y +CONFIG_DEV_GPIO=y +CONFIG_READLINE_CMD_HISTORY=y +CONFIG_READLINE_CMD_HISTORY_LEN=100 +CONFIG_READLINE_CMD_HISTORY_LINELEN=120 +CONFIG_READLINE_TABCOMPLETION=y +CONFIG_FS_ROMFS=y +CONFIG_NSH_ROMFSETC=y +CONFIG_NSH_ARCHROMFS=y +CONFIG_BOARDCTL_RESET=y +CONFIG_CONNECTION_FRAMEWORK_DEBUG=y +CONFIG_CONNECTION_ADAPTER_WIFI=y +CONFIG_ADAPTER_ESP07S_WIFI=y +CONFIG_ADAPTER_WIFI_ESP07S="esp07s_wifi" +CONFIG_ADAPTER_ESP07S_DRIVER="/dev/ttyS2" +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/Kconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/Kconfig index 1e689be28..a482d7db1 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/Kconfig +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/Kconfig @@ -676,6 +676,10 @@ config NSH_DISABLE_ADAPTER_BLUETOOTH_TEST bool "Disable hc08 AdapterBlueToothTest." default n +config NSH_DISABLE_ADAPTER_WIFI_TEST + bool "Disable esp07s AdapterWIFITest." + default n + config NSH_DISABLE_K210_FFT bool "Disable the K210 fft device." default n diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h index 771b8b4de..cfa6b1afc 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h @@ -22,7 +22,7 @@ * @file nsh.h * @brief nuttx source code * https://github.com/apache/incubator-nuttx-apps -* @version 10.2.0 +* @version 10.2.0 * @author AIIT XUOS Lab * @date 2022-03-17 */ @@ -1506,6 +1506,10 @@ int nsh_foreach_var(FAR struct nsh_vtbl_s *vtbl, nsh_foreach_var_t cb, int cmd_AdapterBlueToothTest(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv); #endif +#if defined(CONFIG_ADAPTER_ESP07S_WIFI) && !defined(CONFIG_NSH_DISABLE_ADAPTER_WIFI_TEST) + int cmd_AdapterWifiTest(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv); +#endif + #if defined(CONFIG_K210_FFT_TEST) && !defined(CONFIG_NSH_DISABLE_K210_FFT) int cmd_fft(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv); #endif diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c index 961c524c8..34fb18629 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c @@ -283,6 +283,17 @@ int cmd_recvzigbee(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv) } #endif +#if defined(CONFIG_ADAPTER_ESP07S_WIFI) && !defined(CONFIG_NSH_DISABLE_ADAPTER_WIFI_TEST) +extern int AdapterWifiTest(int argc, char *argv[]); +int cmd_AdapterWifiTest(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv) +{ + nsh_output(vtbl, "Hello, world!\n"); + FrameworkInit(); + AdapterWifiTest(argc, argv); + return OK; +} +#endif + #if (defined(CONFIG_ADAPTER_LORA_SX1278) || defined(CONFIG_ADAPTER_LORA_E220)) && !defined(CONFIG_NSH_DISABLE_ADAPTER_LORATEST) extern int AdapterLoraTest(void); int cmd_AdapterLoraTest(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv) diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c index 6526c2b70..acc04fb15 100644 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c @@ -22,7 +22,7 @@ * @file nsh_command.c * @brief nuttx source code * https://github.com/apache/incubator-nuttx-apps -* @version 10.2.0 +* @version 10.2.0 * @author AIIT XUOS Lab * @date 2022-03-17 */ @@ -678,6 +678,10 @@ static const struct cmdmap_s g_cmdmap[] = { "AdapterBlueToothTest", cmd_AdapterBlueToothTest, 1, 1, "[BlueTooth hc08 test.]" }, #endif +#if defined(CONFIG_ADAPTER_ESP07S_WIFI) && !defined(CONFIG_NSH_DISABLE_ADAPTER_WIFI_TEST) + { "wifitest", cmd_AdapterWifiTest, 1, 8, "[WIFI test.]" }, +#endif + #if defined(CONFIG_K210_FFT_TEST) && !defined(CONFIG_NSH_DISABLE_K210_FFT) { "fft", cmd_fft, 1, 1, "[K210 fft function.]" }, #endif From e67810a7f698df0fefac7f1f0f0ffe36c5b6ece3 Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Fri, 10 Jun 2022 14:45:45 +0800 Subject: [PATCH 45/46] change submodule on nuttx --- .gitmodules | 3 --- Ubiquitous/Nuttx_Fusion_XiUOS/nuttx | 1 - 2 files changed, 4 deletions(-) delete mode 160000 Ubiquitous/Nuttx_Fusion_XiUOS/nuttx diff --git a/.gitmodules b/.gitmodules index dcc3b8dd1..7a182c41d 100644 --- a/.gitmodules +++ b/.gitmodules @@ -10,9 +10,6 @@ [submodule "Ubiquitous/Nuttx_Fusion_XiUOS/apps"] path = Ubiquitous/Nuttx_Fusion_XiUOS/apps url = https://code.gitlink.org.cn/wgzAIIT/incubator-nuttx-apps.git -[submodule "Ubiquitous/Nuttx_Fusion_XiUOS/nuttx"] - path = Ubiquitous/Nuttx_Fusion_XiUOS/nuttx - url = https://code.gitlink.org.cn/wgzAIIT/incubator-nuttx.git [submodule "Ubiquitous/XiZi/fs/lwext4/lwext4_submodule"] path = Ubiquitous/XiZi/fs/lwext4/lwext4_submodule url = https://gitlink.org.cn/xuos/lwext4_filesystem_support_XiUOS.git diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/nuttx b/Ubiquitous/Nuttx_Fusion_XiUOS/nuttx deleted file mode 160000 index 3fede4209..000000000 --- a/Ubiquitous/Nuttx_Fusion_XiUOS/nuttx +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 3fede42098e5883f336d846ac30edfe749899494 From b0b4ea61bb875f12a87d1e7b4e9e90a3f41d33ec Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Fri, 10 Jun 2022 14:55:47 +0800 Subject: [PATCH 46/46] Re add submodule for nuttx --- .gitmodules | 9 ++++++--- Ubiquitous/Nuttx_Fusion_XiUOS/nuttx | 1 + 2 files changed, 7 insertions(+), 3 deletions(-) create mode 160000 Ubiquitous/Nuttx_Fusion_XiUOS/nuttx diff --git a/.gitmodules b/.gitmodules index 7a182c41d..59ee5c1d2 100644 --- a/.gitmodules +++ b/.gitmodules @@ -7,9 +7,12 @@ [submodule "Ubiquitous/RT-Thread_Fusion_XiUOS/aiit_board/aiit-riscv64-board/kendryte-sdk/kendryte-sdk-source"] path = Ubiquitous/RT-Thread_Fusion_XiUOS/aiit_board/aiit-riscv64-board/kendryte-sdk/kendryte-sdk-source url = https://code.gitlink.org.cn/chunyexixiaoyu/kendryte-sdk-source.git -[submodule "Ubiquitous/Nuttx_Fusion_XiUOS/apps"] - path = Ubiquitous/Nuttx_Fusion_XiUOS/apps - url = https://code.gitlink.org.cn/wgzAIIT/incubator-nuttx-apps.git [submodule "Ubiquitous/XiZi/fs/lwext4/lwext4_submodule"] path = Ubiquitous/XiZi/fs/lwext4/lwext4_submodule url = https://gitlink.org.cn/xuos/lwext4_filesystem_support_XiUOS.git +[submodule "Ubiquitous/Nuttx_Fusion_XiUOS/nuttx"] + path = Ubiquitous/Nuttx_Fusion_XiUOS/nuttx + url = https://code.gitlink.org.cn/wgzAIIT/incubator-nuttx.git +[submodule "Ubiquitous/Nuttx_Fusion_XiUOS/apps"] + path = Ubiquitous/Nuttx_Fusion_XiUOS/apps + url = https://code.gitlink.org.cn/wgzAIIT/incubator-nuttx-apps.git diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/nuttx b/Ubiquitous/Nuttx_Fusion_XiUOS/nuttx new file mode 160000 index 000000000..3fede4209 --- /dev/null +++ b/Ubiquitous/Nuttx_Fusion_XiUOS/nuttx @@ -0,0 +1 @@ +Subproject commit 3fede42098e5883f336d846ac30edfe749899494