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Merge branch 'prepare_for_master' of https://git.trustie.net/xuos/xiuos into develop

This commit is contained in:
Wang_Weigen 2023-02-28 17:20:51 +08:00
parent 5ae31a37f3 779444f998
commit 179c894840
97 changed files with 5890 additions and 172 deletions
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26
APP_Framework/Applications/app_test/Kconfig
View File

@ -111,6 +111,9 @@ menu "test app"
default n
if USER_TEST_HWTIMER
if ADD_XIZI_FETURES
config HWTIMER_TIMER_DEV_DRIVER
string "Set pin dev path"
default "/dev/timer0_dev0"
config HWTIMER_PIN_DEV_DRIVER
string "Set pin dev path"
default "/dev/pin_dev"
@ -168,6 +171,18 @@ menu "test app"
endif
endif
menuconfig USER_TEST_CAN
select BSP_USING_CAN
bool "Config test can"
default n
if USER_TEST_CAN
if ADD_XIZI_FETURES
config CAN_DEV_DRIVER
string "Set can dev path"
default "/dev/can2_dev1"
endif
endif
menuconfig USER_TEST_CAMERA
select BSP_USING_CAMERA
select BSP_USING_LCD
@ -209,6 +224,17 @@ menu "test app"
endchoice
endif
endif
menuconfig USER_TEST_FLASH
bool "Config test w25q128 device"
default n
if USER_TEST_FLASH
if ADD_XIZI_FETURES
config FLASH_DEV_DRIVER
string "Set flash dev path"
default "/dev/qspi_W25Q128"
endif
endif
endif
endmenu

10
APP_Framework/Applications/app_test/Makefile
View File

@ -87,7 +87,15 @@ ifeq ($(CONFIG_ADD_XIZI_FETURES),y)
ifeq ($(CONFIG_USER_TEST_ETHERNET),y)
SRC_FILES += test_ethernet.c
endif
endif
ifeq ($(CONFIG_USER_TEST_FLASH),y)
SRC_FILES += test_flash.c
endif
ifeq ($(CONFIG_USER_TEST_CAN),y)
SRC_FILES += test_can.c
endif
include $(KERNEL_ROOT)/compiler.mk
endif

66
APP_Framework/Applications/app_test/test_can.c Normal file
View File

@ -0,0 +1,66 @@
#include <stdio.h>
#include <string.h>
#include <transform.h>
void TestCAN(void)
{
// config CAN pin(SCL:34.SDA:35) in menuconfig
int can_fd = PrivOpen(CAN_DEV_DRIVER, O_RDWR);
if (can_fd < 0)
{
printf("open can_fd fd error:%d\n", can_fd);
return;
}
printf("CAN open successful!\n");
struct PrivIoctlCfg ioctl_cfg;
ioctl_cfg.ioctl_driver_type = CAN_TYPE;
struct CanDriverConfigure can_config;
can_config.brp = 8U;
can_config.tbs1 = 1U + 8U;
can_config.tbs2 = 4U;
can_config.tsjw = 4U;
can_config.mode = 0U;
ioctl_cfg.args = (void *)&can_config;
if (0 != PrivIoctl(can_fd, OPE_INT, &ioctl_cfg))
{
printf("init can fd error %d\n", can_fd);
PrivClose(can_fd);
return;
}
printf("CAN configure successful!\n");
uint8_t data_buff[64u] = {1,2,3,4,4,3,2,1};
struct CanSendConfigure frame_send;
frame_send.ide=0;
frame_send.stdid = 0x55;
frame_send.rtr=0;
frame_send.data_lenth=8;
frame_send.data = data_buff;
struct CanSendConfigure frame_recv;
uint8_t recv_buff[65U] = {0};
frame_recv.data = recv_buff;
// CAN write
while (1)
{
PrivTaskDelay(500);
PrivWrite(can_fd, &frame_send, NONE);
PrivTaskDelay(500);
PrivRead(can_fd, &frame_recv, NONE);
// if any data has received,Then printf message
if(frame_recv.data_lenth > 0){
printf("ID %08x:%s\n",frame_recv.exdid,frame_recv.data);
}
}
PrivClose(can_fd);
return;
}
PRIV_SHELL_CMD_FUNCTION(TestCAN, a can test sample, PRIV_SHELL_CMD_MAIN_ATTR);

35
APP_Framework/Applications/app_test/test_flash.c Normal file
View File

@ -0,0 +1,35 @@
#include <stdio.h>
#include <string.h>
#include <transform.h>
void TestFlash(void)
{
int fd = open(FLASH_DEV_DRIVER,O_RDWR);
if(fd<0){
printf("fs fd open error:%d\n",fd);
return;
}
struct BusBlockWriteParam flash_writer;
uint8_t read_buff[8] = {1,2,3,4,5,6,7,8};
flash_writer.pos = 0x000000L;
flash_writer.size = 8;
flash_writer.buffer = read_buff;
struct BusBlockReadParam flash_reader;
flash_reader.pos = 0x000000L;
flash_reader.size = 8;
flash_reader.buffer = read_buff;
PrivRead(fd,&flash_reader,NONE);
printf("Read data is:");
for(int i=0;i<flash_writer.size;i++){
printf("%02x ",read_buff[i]);
read_buff[i]++;
}
printf("\n");
PrivWrite(fd,&flash_writer,NONE);
return;
}
PRIV_SHELL_CMD_FUNCTION(TestFlash, a flash test sample, PRIV_SHELL_CMD_MAIN_ATTR);

43
APP_Framework/Applications/app_test/test_hwtimer.c
View File

@ -2,25 +2,22 @@
#include <string.h>
#include <transform.h>
#define BSP_LED_PIN 29
#define BSP_LED_PIN 134
#define NULL_PARAMETER 0
static uint16_t pinval=0;
static uint16_t pin_fd=0;
static struct PinStat pin_led;
void ledflip(void *parameter)
{
struct PinStat pin_led;
pin_led.pin = BSP_LED_PIN;
pin_led.val = !pinval;
pinval = !pinval;
pin_led.val = !pin_led.val;
PrivWrite(pin_fd,&pin_led,NULL_PARAMETER);
// printf("Timer has callback once:%d\n",pinval);
}
void TestHwTimer(void)
{
x_ticks_t period = 100;//uint:10ms
x_ticks_t period = 100000;
pin_fd = PrivOpen(HWTIMER_PIN_DEV_DRIVER, O_RDWR);
if(pin_fd<0){
@ -28,6 +25,12 @@ void TestHwTimer(void)
return;
}
int timer_fd = PrivOpen(HWTIMER_TIMER_DEV_DRIVER, O_RDWR);
if(timer_fd<0){
printf("open timer fd error:%d\n",timer_fd);
return;
}
//config led pin in board
struct PinParam parameter;
parameter.cmd = GPIO_CONFIG_MODE;
@ -44,10 +47,30 @@ void TestHwTimer(void)
return;
}
int32 timer_handle = KCreateTimer("LED on and off by 1s",&ledflip,&pin_fd,period,TIMER_TRIGGER_PERIODIC);
KTimerStartRun(timer_handle);
ioctl_cfg.ioctl_driver_type = TIME_TYPE;
ioctl_cfg.args = (void *)&ledflip;
if (0 != PrivIoctl(timer_fd, OPE_INT, &ioctl_cfg)) {
printf("timer pin fd error %d\n", pin_fd);
PrivClose(pin_fd);
return;
}
ioctl_cfg.args = (void *)&period;
if (0 != PrivIoctl(timer_fd, OPE_CFG, &ioctl_cfg)) {
printf("timer pin fd error %d\n", pin_fd);
PrivClose(pin_fd);
return;
}
while(1){
}
// int32 timer_handle = KCreateTimer("LED on and off by 1s",&ledflip,&pin_fd,period,TIMER_TRIGGER_PERIODIC);
// KTimerStartRun(timer_handle);
PrivClose(pin_fd);
PrivClose(timer_fd);
}
PRIV_SHELL_CMD_FUNCTION(TestHwTimer, a timer test sample, PRIV_SHELL_CMD_MAIN_ATTR);

7
APP_Framework/Applications/app_test/test_rtc.c
View File

@ -11,16 +11,19 @@ void TestRTC(int argc,char *argv[])
}
if(argc>1){
int times = atoi(argv[1]);
printf("Time will be printf %d times\n",times);
struct RtcDrvConfigureParam rtc_para;
time_t my_time=0;
rtc_para.rtc_operation_cmd = OPER_RTC_SET_TIME;
*(rtc_para.time) = 0;
rtc_para.time = &my_time;
struct PrivIoctlCfg ioctl_cfg;
ioctl_cfg.ioctl_driver_type = RTC_TYPE;
ioctl_cfg.args = (void *)&rtc_para;
PrivIoctl(rtc_fd,0,&ioctl_cfg);
rtc_para.rtc_operation_cmd = OPER_RTC_GET_TIME;

1
APP_Framework/Applications/app_test/test_touch.c
View File

@ -105,6 +105,7 @@ void TestTouch(void)
graph_param.pixel_info.y_endpos = touch_pixel.y+10;
PrivWrite(lcd_fd, &graph_param, NULL_PARAMETER);
}
PrivClose(lcd_fd);
PrivClose(touch_fd);
}

14
APP_Framework/Applications/knowing_app/Makefile
View File

@ -1,3 +1,15 @@
SRC_DIR := mnist
SRC_DIR :=
ifeq ($(CONFIG_APP_MNIST),y)
SRC_DIR += mnist
endif
ifeq ($(CONFIG_USING_NNOM_DEMOAPP),y)
SRC_DIR += nnom_demo
endif
ifeq ($(CONFIG_USING_CMSIS_5_DEMOAPP),y)
SRC_DIR += cmsis_5_demo
endif
include $(KERNEL_ROOT)/compiler.mk

11
APP_Framework/Applications/knowing_app/cmsis_5_demo/Makefile Executable file
View File

@ -0,0 +1,11 @@
SRC_DIR :=
ifeq ($(CONFIG_USING_CMSIS_5_NN_DEMOAPP),y)
SRC_DIR += cmsisnn-cifar10
endif
ifeq ($(CONFIG_USING_CMSIS_5_NN_DEMOAPP_VEG_CLASSIFY),y)
SRC_DIR += cmsisnn_vegetable_classify
endif
include $(KERNEL_ROOT)/compiler.mk

3
APP_Framework/Applications/knowing_app/cmsis_5_demo/cmsisnn-cifar10/Makefile Executable file
View File

@ -0,0 +1,3 @@
SRC_FILES := demo/cmsisnn_demo.c demo/tjpgd.c model/m4/nn.c
include $(KERNEL_ROOT)/compiler.mk

3
APP_Framework/Applications/knowing_app/cmsis_5_demo/cmsisnn_vegetable_classify/Makefile Executable file
View File

@ -0,0 +1,3 @@
SRC_FILES := cmsisnn_vegetable_classify.c
include $(KERNEL_ROOT)/compiler.mk

4
APP_Framework/Applications/knowing_app/mnist/Makefile
View File

@ -1,7 +1,9 @@
SRC_FILES :=
ifeq ($(CONFIG_APP_MNIST),y)
SRC_FILES := \
main.cpp \
mnistmain.c
CPPPATHS += -I.
endif
include $(KERNEL_ROOT)/compiler.mk

5
APP_Framework/Applications/knowing_app/nnom_demo/Makefile Executable file
View File

@ -0,0 +1,5 @@
ifeq ($(CONFIG_USING_NNOM_DEMOAPP),y)
SRC_DIR := mnist_nnom
endif
include $(KERNEL_ROOT)/compiler.mk

3
APP_Framework/Applications/knowing_app/nnom_demo/mnist_nnom/Makefile Executable file
View File

@ -0,0 +1,3 @@
SRC_FILES := main.c
include $(KERNEL_ROOT)/compiler.mk

4
APP_Framework/Applications/knowing_app/nnom_demo/mnist_nnom/main.c
View File

@ -71,7 +71,9 @@ void mnist_nnom(int argc, char **argv)
printf("Predicted label: %d\n", predic_label);
printf("Probability: %d%%\n", (int)(prob * 100));
}
#ifdef ADD_XIZI_FETURES
PRIV_SHELL_CMD_FUNCTION(mnist_nnom, a mnist_nnom test sample, PRIV_SHELL_CMD_MAIN_ATTR);
#endif
#ifdef __RT_THREAD_H__
MSH_CMD_EXPORT(mnist_nnom, nnom mnist demo and image number should be followed);
#endif

2
APP_Framework/Framework/knowing/Makefile
View File

@ -1,4 +1,4 @@
SRC_DIR := kpu tensorflow-lite
SRC_DIR := cmsis_5 filter image_processing kpu nnom ota tensorflow-lite
include $(KERNEL_ROOT)/compiler.mk

8
APP_Framework/Framework/knowing/cmsis_5/Makefile Normal file
View File

@ -0,0 +1,8 @@
ifeq ($(CONFIG_USING_CMSIS_5),y)
SRC_FILES := $(wildcard NN/Source/ActivationFunctions/*.c) $(wildcard NN/Source/BasicMathFunctions/*.c) $(wildcard NN/Source/ConcatenationFunctions/*.c)\
$(wildcard NN/Source/ConvolutionFunctions/*.c) $(wildcard NN/Source/FullyConnectedFunctions/*.c) $(wildcard NN/Source/NNSupportFunctions/*.c) \
$(wildcard NN/Source/PoolingFunctions/*.c) $(wildcard NN/Source/ReshapeFunctions/*.c) $(wildcard NN/Source/SoftmaxFunctions/*.c) $(wildcard NN/Source/SVDFunctions/*.c)
endif
include $(KERNEL_ROOT)/compiler.mk

2
APP_Framework/Framework/knowing/kpu/Kconfig
View File

@ -1,6 +1,6 @@
menuconfig USING_KPU_PROCESSING
bool "kpu model processing"
default y
default n
if USING_KPU_PROCESSING
source "$APP_DIR/Framework/knowing/kpu/yolov2/Kconfig"
source "$APP_DIR/Framework/knowing/kpu/yolov2_json/Kconfig"

6
APP_Framework/Framework/knowing/kpu/Makefile
View File

@ -1,3 +1,7 @@
SRC_DIR := k210_yolov2_detect_procedure yolov2 yolov2_json
SRC_DIR :=
ifeq ($(CONFIG_USING_KPU_PROCESSING),y)
SRC_DIR += k210_yolov2_detect_procedure yolov2 yolov2_json
endif
include $(KERNEL_ROOT)/compiler.mk

6
APP_Framework/Framework/knowing/nnom/Makefile Normal file
View File

@ -0,0 +1,6 @@
SRC_DIR :=
ifeq ($(CONFIG_USING_NNOM),y)
SRC_FILES := $(wildcard src/backends/*.c) $(wildcard src/core/*.c) $(wildcard src/layers/*.c)
endif
include $(KERNEL_ROOT)/compiler.mk

2
APP_Framework/Framework/knowing/nnom/src/layers/nnom_reshape.c
View File

@ -45,7 +45,7 @@ nnom_layer_t *reshape_s(const nnom_reshape_config_t *config)
// config
//nnom_memcpy(layer->dim, config->dim, config->num_dim * sizeof(nnom_shape_data_t));
layer->super.config = config;
layer->super.config = (void*)config;
layer->dim = config->dim; // temporary use the config directly. (not preferable.)
layer->num_dim = config->num_dim;

6
APP_Framework/Framework/knowing/tensorflow-lite/Makefile
View File

@ -1,3 +1,7 @@
SRC_DIR := tensorflow-lite-for-mcu
SRC_DIR :=
ifeq ($(CONFIG_USING_TENSORFLOWLITEMICRO),y)
SRC_DIR += tensorflow-lite-for-mcu
endif
include $(KERNEL_ROOT)/compiler.mk

14
APP_Framework/Framework/sensor/winddirection/qs-fx/qs-fx.c
View File

@ -69,6 +69,7 @@ static int SensorDeviceOpen(struct SensorDevice *sdev)
return result;
}
#ifdef ADD_XIZI_FETURES
static int PinOpen(void){
int pin_fd = PrivOpen(SENSOR_DEVICE_QS_FX_PIN_DEV, O_RDWR);
if (pin_fd < 0) {
@ -95,6 +96,7 @@ static int PinOpen(void){
return pin_fd;
}
#endif
/**
* @description: Read sensor device
@ -104,22 +106,26 @@ static int PinOpen(void){
*/
static int SensorDeviceRead(struct SensorDevice *sdev, size_t len)
{
#ifdef ADD_XIZI_FETURES
int pin_fd=PinOpen();
struct PinStat pin_dir;
pin_dir.pin = SENSOR_DEVICE_QS_FX_PIN_NUMBER;
pin_dir.val = GPIO_HIGH;
if (PrivWrite(pin_fd,&pin_dir,0) < 0) // pull-up pin to configure as tx mode
return -1;
#endif
PrivTaskDelay(20);
if (PrivWrite(sdev->fd, instructions, sizeof(instructions)) < 0)
return -1;
PrivTaskDelay(20);
#ifdef ADD_XIZI_FETURES
pin_dir.val = GPIO_LOW;
if (PrivWrite(pin_fd,&pin_dir,0) < 0) // pull-down pin to configure as rx mode
return -1;
return -1;
#endif
if (PrivRead(sdev->fd, sdev->buffer, len) < 0)
return -1;
PrivClose(pin_fd);

13
APP_Framework/Framework/sensor/windspeed/qs-fs/qs-fs.c
View File

@ -68,7 +68,7 @@ static int SensorDeviceOpen(struct SensorDevice *sdev)
return result;
}
#ifdef ADD_XIZI_FETURES
static int PinOpen(void){
int pin_fd = PrivOpen(SENSOR_DEVICE_QS_FS_PIN_DEV, O_RDWR);
if (pin_fd < 0) {
@ -96,6 +96,8 @@ static int PinOpen(void){
return pin_fd;
}
#endif
/**
* @description: Read sensor device
* @param sdev - sensor device pointer
@ -104,6 +106,7 @@ static int PinOpen(void){
*/
static int SensorDeviceRead(struct SensorDevice *sdev, size_t len)
{
#ifdef ADD_XIZI_FETURES
int pin_fd=PinOpen();
struct PinStat pin_dir;
pin_dir.pin = SENSOR_DEVICE_QS_FS_PIN_NUMBER;
@ -111,16 +114,19 @@ static int SensorDeviceRead(struct SensorDevice *sdev, size_t len)
pin_dir.val = GPIO_HIGH;
if (PrivWrite(pin_fd,&pin_dir,0) < 0) // pull-up pin to configure as tx mode
return -1;
#endif
PrivTaskDelay(20);
if (PrivWrite(sdev->fd, instructions, sizeof(instructions)) < 0)
return -1;
PrivTaskDelay(20);
#ifdef ADD_XIZI_FETURES
pin_dir.val = GPIO_LOW;
if (PrivWrite(pin_fd,&pin_dir,0) < 0) // pull-down pin to configure as rx mode
return -1;
#endif
if (PrivRead(sdev->fd, sdev->buffer, len) < 0)
return -1;
@ -128,6 +134,7 @@ static int SensorDeviceRead(struct SensorDevice *sdev, size_t len)
return 0;
}
static struct SensorDone done =
{
SensorDeviceOpen,

3
APP_Framework/Framework/transform_layer/xizi/transform.c
View File

@ -172,6 +172,9 @@ int PrivIoctl(int fd, int cmd, void *args)
case WDT_TYPE:
case CAMERA_TYPE:
case KPU_TYPE:
case TIME_TYPE:
case FLASH_TYPE:
case CAN_TYPE:
ret = ioctl(fd, cmd, ioctl_cfg->args);
break;
default:

22
APP_Framework/Framework/transform_layer/xizi/transform.h
View File

@ -151,7 +151,10 @@ enum IoctlDriverType
WDT_TYPE,
RTC_TYPE,
CAMERA_TYPE,
CAN_TYPE,
KPU_TYPE,
FLASH_TYPE,
TIME_TYPE,
DEFAULT_TYPE,
};
@ -252,6 +255,25 @@ enum TCP_OPTION {
RECV_DATA,
};
struct CanDriverConfigure
{
uint8 tsjw;
uint8 tbs2 ;
uint8 tbs1;
uint8 mode;
uint16 brp;
};
struct CanSendConfigure
{
uint32 stdid;
uint32 exdid;
uint8 ide;
uint8 rtr;
uint8 data_lenth;
uint8 *data;
};
typedef struct
{
uint8_t *buffer;

5
Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/edu-riscv64/include/board.h
View File

@ -97,7 +97,8 @@ extern "C"
#define SOFT_SPI_MISO 25
#define SOFT_SPI_SCK 26
#define SOFT_SPI_MOSI 27
#define SOFT_SPI_CS0_PIN 28
#define SOFT_SPI_CS 28
/* I2C */
#define BSP_IIC_SDA 15
@ -133,7 +134,7 @@ extern "C"
#define FPIOA_SOFT_SPI_MISO 4
#define FPIOA_SOFT_SPI_SCK 5
#define FPIOA_SOFT_SPI_MOSI 6
#define FPIOA_SOFT_SPI_CS0_PIN 7
#define FPIOA_SOFT_SPI_CS 7
/* other mode FPIOA */
#define FPIOA_E220_M0 1

474
Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/edu-riscv64/src/spi_sdcard.c Normal file
View File

@ -0,0 +1,474 @@
/*
* Copyright (c) 2022 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file soft_spi.h
* @brief edu-riscv64 soft_spi.h
* @version 1.0
* @author AIIT XUOS Lab
* @date 2022-1-3
*/
#include "spi_sdcard.h"
static uint16_t cyc = 64;
static uint8_t SD_Type = 0;
/* When the SD card is initialized, it needs a low speed. */
static void SD_SPI_SpeedLow(void)
{
cyc = 512;
}
/* When the SD card is working normally, it can be at high speed.*/
static void SD_SPI_SpeedHigh(void)
{
cyc = 8;
}
/* spi bus delay function */
static void delay(void)
{
uint16_t i;
for(i = 0;i < cyc; i++);
}
/* spi io initialization function */
static void SPI_IoInit(void)
{
/* config simluate SPI bus */
k210_fpioa_config(SOFT_SPI_CS, HS_GPIO(FPIOA_SOFT_SPI_CS) | K210_IOFLAG_GPIOHS);
k210_fpioa_config(SOFT_SPI_SCK, HS_GPIO(FPIOA_SOFT_SPI_SCK) | K210_IOFLAG_GPIOHS);
k210_fpioa_config(SOFT_SPI_MOSI, HS_GPIO(FPIOA_SOFT_SPI_MOSI) | K210_IOFLAG_GPIOHS);
k210_fpioa_config(SOFT_SPI_MISO, HS_GPIO(FPIOA_SOFT_SPI_MISO) | K210_IOFLAG_GPIOHS);
k210_gpiohs_set_direction(FPIOA_SOFT_SPI_CS, GPIO_DM_INPUT);
k210_gpiohs_set_direction(FPIOA_SOFT_SPI_SCK, GPIO_DM_OUTPUT);
k210_gpiohs_set_direction(FPIOA_SOFT_SPI_MOSI, GPIO_DM_OUTPUT);
k210_gpiohs_set_direction(FPIOA_SOFT_SPI_MISO, GPIO_DM_OUTPUT);
k210_gpiohs_set_value(FPIOA_SOFT_SPI_CS, GPIO_PV_HIGH);
k210_gpiohs_set_value(FPIOA_SOFT_SPI_SCK, GPIO_PV_LOW);
}
/* spi writes a byte */
static void SoftSpiWriteByte(uint8_t data)
{
int8_t i = 0;
uint8_t temp = 0;
for (i = 0; i < 8; i++)
{
temp = ((data & 0x80) == 0x80) ? 1 : 0;
data = data << 1;
SPI_SCK_0;
delay();
if (temp)
{
SPI_MOSI_1;
}
else
{
SPI_MOSI_0;
}
delay();
SPI_SCK_1;
delay();
}
SPI_SCK_0;
}
/* spi read a byte */
static uint8_t SoftSpiReadByte(void)
{
uint8_t i = 0, read_data = 0xFF;
for (i = 0; i < 8; i++)
{
read_data = read_data << 1;
SPI_SCK_0;
delay();
SPI_SCK_1;
delay();
if (SPI_READ_MISO)
{
read_data |= 0x01;
}
delay();
}
SPI_SCK_0;
return read_data;
}
/****************************************************************************
* Name: SD_DisSelect
* Description: Deselect, release SPI bus
* Input: None
* Output: None
* return: None
****************************************************************************/
void SD_DisSelect(void)
{
SPI_CS_1;
SoftSpiWriteByte(0xFF);
}
/****************************************************************************
* Name: SD_Select
* Description: Select the SD card and wait for the SD card to be ready
* Input: None
* Output: None
* return: Return value: 0, success; 1, failure
****************************************************************************/
uint8_t SD_Select(void)
{
SPI_CS_0;
if (SD_WaitReady() == 0)
{
return 0; //waiting for success
}
SD_DisSelect();
return 1; // wait for failure
}
/****************************************************************************
* Name: SD_WaitReady
* Description: wait for the card to be ready
* Input: None
* Output: None
* return: 0, ready; 1, not ready
****************************************************************************/
uint8_t SD_WaitReady(void)
{
uint16_t count = 0;
do
{
if (SoftSpiReadByte() == 0xFF)
{
return 0;
}
count++;
}while (count < 0xFFF0);
return 1;
}
/****************************************************************************
* Name: SD_GetResponse
* Description: Wait for the SD card to respond
* Input: Response: the response value to get
* Output: None
* return: 0, successfully obtained the response value,Others,
failed to get the response value
****************************************************************************/
uint8_t SD_GetResponse(uint8_t Response)
{
uint16_t count = 0x1FFF; //Wait times
while ((SoftSpiReadByte() != Response) && count)
count--; //waiting for an accurate response
if (count == 0)
return MSD_RESPONSE_FAILURE; //Response failed
else
return MSD_RESPONSE_NO_ERROR; //Respond successfully
}
/****************************************************************************
* Name: SD_RecvData
* Description: Read the content of a data packet from the sd card
* Input: buff:data buffer,len: The length of the data to be read.
* Output: None
* return:0, success; 1, failure
****************************************************************************/
uint8_t SD_RecvData(uint8_t *buff, uint32_t len)
{
if (SD_GetResponse(0xFE) != MSD_RESPONSE_NO_ERROR) // Wait for the SD card to send back the data start command 0xFE
return 1; //read failure
while (len--) //start receiving data
{
*buff = SoftSpiReadByte();
buff++;
}
SoftSpiWriteByte(0xFF);
SoftSpiWriteByte(0xFF);
return 0; //read success
}
/****************************************************************************
* Name: SD_SendBlock
* Description: Write the content of a data packet to the sd card 512 bytes
* Input: buff:data buffer,cmd: instruction.
* Output: None
* return:0, success; others, failure
****************************************************************************/
uint8_t SD_SendBlock(uint8_t *buff, uint8_t cmd)
{
uint8_t retval;
if (SD_WaitReady() == 1)
return 1; //wait for readiness to fail
SoftSpiWriteByte(cmd);
if (cmd != 0xFD) //not end command
{
uint16_t count;
for (count = 0; count < 512; count++)
SoftSpiWriteByte(buff[count]); //send data
SoftSpiWriteByte(0xFF);
SoftSpiWriteByte(0xFF);
retval = SoftSpiReadByte(); //receive response
if ((retval & 0x1F) != MSD_DATA_OK)
return 2; //response error
/* Delay and wait for the completion of writing the internal data of the SD card. */
if (SD_WaitReady() == 1)
return 1; //wait for readiness to fail
}
return 0;
}
/****************************************************************************
* Name: SD_SendCmd
* Description: Send a command to the SD card
* Input: cmd:command,arg:command parameter,crc:CRC check value.
* Output: None
* return:the response returned by the SD card;
****************************************************************************/
uint8_t SD_SendCmd(uint8_t cmd, uint32_t arg, uint8_t crc)
{
uint8_t retval;
uint8_t count = 0xFF;
SD_DisSelect();//Cancel the last chip selection
if (SD_Select() == 1)
return 0xFF; //chip select failure
SoftSpiWriteByte(cmd | 0x40); //Write commands separately
SoftSpiWriteByte(arg >> 24);
SoftSpiWriteByte(arg >> 16);
SoftSpiWriteByte(arg >> 8);
SoftSpiWriteByte(arg);
SoftSpiWriteByte(crc);
if (cmd == TF_CMD12)
SoftSpiWriteByte(0xFF); // Skip a stuff byte when stop reading
do
{
retval = SoftSpiReadByte();
}while ((retval & 0x80) && count--);
return retval;//return status value
}
/****************************************************************************
* Name: SD_GetCID
* Description: Get the CID information of the SD card, including manufacturer information
* Input: cid:memory for storing CID, at least 16Byte
* Output: None
* return:0: no error,1:error;
****************************************************************************/
uint8_t SD_GetCID(uint8_t *cid)
{
uint8_t retval;
retval = SD_SendCmd(TF_CMD10, 0, 0x39); //send CMD10, read CID
if (retval == 0x00)
{
retval = SD_RecvData(cid, 16); //receiver 16 bytes data
}
SD_DisSelect(); //Cancel chip selection
if (retval)
return 1;
else
return 0;
}
/****************************************************************************
* Name: SD_GetCSD
* Description: Get the CSD information of the SD card, including capacity and speed information
* Input: csd:memory for storing CSD, at least 16Byte
* Output: None
* return:0: no error,1:error;
****************************************************************************/
uint8_t SD_GetCSD(uint8_t *csd)
{
uint8_t retval;
retval = SD_SendCmd(TF_CMD9, 0, 0xAF); //send CMD10, read CID
if (retval == 0)
{
retval = SD_RecvData(csd, 16); //receiver 16 bytes data
}
SD_DisSelect(); //Cancel chip selection
if (retval)
return 1;
else
return 0;
}
/****************************************************************************
* Name: SD_GetSectorCount
* Description: Get the total number of sectors of the SD card (number of sectors)
* Input: None
* Output: None
* return:0: get capacity error,Others: SD card capacity (number of sectors/512 bytes)
****************************************************************************/
uint32_t SD_GetSectorCount(void)
{
uint8_t csd[16];
uint32_t capacity, csize, n;
// Get CSD information
if (SD_GetCSD(csd) != 0)
return 0;
//If it is an SDHC card, calculate it as follows
if((csd[0] & 0xC0) == 0x40) //SDV2.0
{
csize = csd[9] + ((uint32_t)csd[8] << 8) + ((uint32_t)(csd[7] & 63) << 16) + 1;
capacity = csize << 9;
}
else //SDV1.0
{
n = (csd[5] & 15) + ((csd[10] & 128) >> 7) + ((csd[9] & 3) << 1) + 2;
csize = (csd[8] >> 6) + ((uint16_t)csd[7] << 2) + ((uint16_t)(csd[6] & 3) << 10) + 1;
capacity= (uint32_t)csize << (n - 9); //get sector number
}
capacity = SD_GetCapacity() / 512;
return capacity;
}
/****************************************************************************
* Name: SD_GetCapacity
* Description: Get the capacity of the SD card
* Input: None
* Output: None
* return:SD card capacity
****************************************************************************/
uint32_t SD_GetCapacity(void)
{
uint8_t csd[16];
uint32_t capacity;
uint16_t n;
uint32_t csize;
if (SD_GetCSD(csd) != 0)
return 0;
if ((csd[0] & 0xC0) == 0x40)
{
csize = csd[9] + ((uint32_t)csd[8] << 8) + ((uint32_t)(csd[7] & 63) << 16) + 1;
capacity = csize << 9;
}
else
{
n = (csd[5] & 0x0F) + ((csd[10] & 0x80) >> 7) + ((csd[9] & 0x03) << 1) + 2;
csize = (csd[8] >> 6) + ((uint16_t)csd[7] << 2) + ((uint16_t)(csd[6] & 0x03) << 10) + 1;
capacity = (uint32_t)csize << (n - 10);
}
return capacity;
}
/****************************************************************************
* Name: SD_Card_Init
* Description: Initialize SD card
* Input: None
* Output: None
* return:SD card capacity
****************************************************************************/
uint8_t SD_Card_Init(void)
{
uint8_t r1;
uint16_t retry;
uint8_t buf[4];
uint16_t i;
SPI_IoInit();
SPI_MOSI_1;
SPI_SCK_1;
SPI_CS_1;
SD_SPI_SpeedLow();
for(i = 0;i < 10;i++)
SoftSpiWriteByte(0xFF);
retry=20;
do
{
r1=SD_SendCmd(TF_CMD0,0,0x95);
}while((r1!=0x01) && retry--);
SD_Type = 0;
if(r1 == 0X01)
{
if(SD_SendCmd(TF_CMD8,0x1AA,0x87) == 1) //SD V2.0
{
for(i =0;i < 4;i++)
{
buf[i] = SoftSpiReadByte();
}
if(buf[2] == 0X01 && buf[3] == 0XAA)
{
retry = 0XFFFE;
do
{
SD_SendCmd(TF_CMD55,0,0X01);
r1 = SD_SendCmd(TF_CMD41,0x40000000,0X01);
}while(r1 && retry--);
if(retry && SD_SendCmd(TF_CMD58,0,0X01) == 0)
{
for(i = 0;i < 4;i++)
buf[i] = SoftSpiReadByte();
if(buf[0] & 0x40)
SD_Type = TF_TYPE_SDHC;
else
SD_Type = TF_TYPE_SDV2;
}
}
}
else //SDV1.0 MMC V3
{
SD_SendCmd(TF_CMD55,0,0X01); //send CMD55
r1 = SD_SendCmd(TF_CMD41,0,0X01); //send CMD41
if(r1 <= 1)
{
SD_Type = TF_TYPE_SDV1;
retry = 0XFFFE;
do //wait exit IDLE
{
SD_SendCmd(TF_CMD55,0,0X01); //send CMD55
r1 = SD_SendCmd(TF_CMD41,0,0X01); //send CMD41
}while(r1 && retry--);
}else
{
SD_Type = TF_TYPE_MMC; //MMC
retry = 0XFFFE;
do //wait exit IDLE
{
r1 = SD_SendCmd(TF_CMD1,0,0X01); //send CMD1
}while(r1&&retry--);
}
if(retry == 0 || SD_SendCmd(TF_CMD16,512,0X01) != 0)
SD_Type = TF_TYPE_ERROR;
}
}
SD_DisSelect();
SD_SPI_SpeedHigh();
if(SD_Type)
return 0;
else if(r1)
return r1;
return 0xaa;
}

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/*
* Copyright (c) 2022 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file soft_spi.h
* @brief edu-riscv64 soft_spi.h
* @version 1.0
* @author AIIT XUOS Lab
* @date 2022-1-3
*/
#ifndef SPI_SDCARD_H
#define SPI_SDCARD_H
#include <nuttx/config.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include <errno.h>
#include <stddef.h>
#include <stdint.h>
#include <stdio.h>
#include <debug.h>
#include <assert.h>
#include <nuttx/time.h>
#include <nuttx/fs/fs.h>
#include "k210_config.h"
#include "k210_fpioa.h"
#include "k210_gpiohs.h"
#include "nuttx/arch.h"
#include "k210_gpio_common.h"
#define SPI_SCK_1 k210_gpiohs_set_value(FPIOA_SOFT_SPI_SCK, GPIO_PV_HIGH) /* SCK = 1 */
#define SPI_SCK_0 k210_gpiohs_set_value(FPIOA_SOFT_SPI_SCK, GPIO_PV_LOW) /* SCK = 0 */
#define SPI_MOSI_1 k210_gpiohs_set_value(FPIOA_SOFT_SPI_MOSI, GPIO_PV_HIGH) /* MOSI = 1 */
#define SPI_MOSI_0 k210_gpiohs_set_value(FPIOA_SOFT_SPI_MOSI, GPIO_PV_LOW) /* MOSI = 0 */
#define SPI_READ_MISO k210_gpiohs_get_value(FPIOA_SOFT_SPI_MISO) /* get MISO status */
#define SPI_CS_1 k210_gpiohs_set_value(FPIOA_SOFT_SPI_CS, GPIO_PV_HIGH) /* CS = 1 */
#define SPI_CS_0 k210_gpiohs_set_value(FPIOA_SOFT_SPI_CS, GPIO_PV_LOW) /* CS = 1 */
#define SPI_DMA_READ_SECTOR // 定义SPI使用DMA进行数据读扇区
#define SPI_DMA_WRITE_SECTOR // 定义SPI使用DMA进行数据写扇区
#define SPI_DMA_SEND_CMD // 定义SPI使用DMA进行数据发送CMD
// TF卡类型定义
#define TF_TYPE_ERROR 0x00
#define TF_TYPE_MMC 0x01
#define TF_TYPE_SDV1 0x02
#define TF_TYPE_SDV2 0x04
#define TF_TYPE_SDHC 0x06
#define TF_TYPE_SDXC 0x08
// TF卡指令表
#define TF_CMD0 0 // 命令0 ，SD卡进入空闲状态
#define TF_CMD1 1 // 命令1 ，SD卡进入工作状态
#define TF_CMD6 6 // 命令6 ，SD卡进入高速模式50MHz
#define TF_CMD8 8 // 命令8 ，SEND_IF_COND
#define TF_CMD9 9 // 命令9 ，读CSD数据
#define TF_CMD10 10 // 命令10，读CID数据
#define TF_CMD12 12 // 命令12，停止数据传输
#define TF_CMD13 13 // 命令13，读状态
#define TF_CMD16 16 // 命令16，设置块大小 应返回0x00
#define TF_CMD17 17 // 命令17，读单个扇区
#define TF_CMD18 18 // 命令18，读多个扇区
#define TF_CMD23 23 // 命令23，设置多sector写入前预先擦除N个block
#define TF_CMD24 24 // 命令24，写单个扇区
#define TF_CMD25 25 // 命令25，写多个扇区
#define TF_CMD32 32 // 命令32，设置要擦除的起始地址
#define TF_CMD33 33 // 命令33，设置要擦除的结束地址
#define TF_CMD38 38 // 命令38，擦除指定区间的内容
#define TF_CMD41 41 // 命令41，应返回0x00
#define TF_CMD55 55 // 命令55，应返回0x01
#define TF_CMD58 58 // 命令58，读OCR信息
#define TF_CMD59 59 // 命令59，使能/禁止CRC，应返回0x00
// 数据写入回应字意义
#define MSD_DATA_OK 0x05
#define MSD_DATA_CRC_ERROR 0x0B
#define MSD_DATA_WRITE_ERROR 0x0D
#define MSD_DATA_OTHER_ERROR 0xFF
// TF卡回应标记字
#define MSD_RESPONSE_NO_ERROR 0x00
#define MSD_IN_IDLE_STATE 0x01
#define MSD_ERASE_RESET 0x02
#define MSD_ILLEGAL_COMMAND 0x04
#define MSD_COM_CRC_ERROR 0x08
#define MSD_ERASE_SEQUENCE_ERROR 0x10
#define MSD_ADDRESS_ERROR 0x20
#define MSD_PARAMETER_ERROR 0x40
#define MSD_RESPONSE_FAILURE 0xFF
/* SD卡信息 */
typedef struct
{
uint8_t Card_Type;
uint32_t Card_Capacity;
} SDCard_Information_typedef;
/* SD卡API */
uint8_t SD_WaitReady(void); // 等待SD卡准备
uint8_t SD_GetResponse(uint8_t Response); // 获取SD卡响应
uint8_t SD_SendCmd(uint8_t cmd, uint32_t arg, uint8_t crc); // CMD指令发送
uint8_t SD_RecvData(uint8_t *buff, uint32_t len);
uint8_t SD_SendBlock(uint8_t *buff, uint8_t cmd);
uint8_t SD_GetCID(uint8_t *cid_data); // 获取SD卡CID
uint8_t SD_GetCSD(uint8_t *csd_data); // 获取SD卡CSD
uint32_t SD_GetSectorCount(void); // 获取SD卡扇区数
uint32_t SD_GetCapacity(void); // 获取SD卡容量
uint8_t SD_Set_IdleMode(void); // SD卡进入空闲模式
uint8_t SD_Set_HighSpeedMode(void); // SD卡进入高速模式
uint8_t SD_Information_Printf(void); // 打印SD卡的类型和容量信息
uint8_t SD_GetCardState(void); // 获取SD卡状态
uint8_t SD_Card_Init(void); // SD卡初始化
uint8_t SD_ReadSector(uint8_t *buff, uint32_t sector, uint8_t cnt); // 按扇区读取SD卡数据
uint8_t SD_WriteSector(uint8_t *buff, uint32_t sector, uint32_t cnt); // 按扇区写入SD卡数据
#endif

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#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
if ARCH_BOARD_SABRE6QUAD
endif

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README.txt
==========
This directory holds a port of NuttX to the NXP/Freescale Sabre board
featuring the iMX 6Quad CPU.
This is a minimal port, used primarily for verifying SMP operation. More
recently, a port to the i.MX RT was added. This port has gotten more
support since it is better aligned with usage in embedded systems. The
i.MX6 and the i.MX6 share IOMUXing and some peripherals. It ought to be
a simple matter to backport some of the common drivers from i.MXRT to i.MX6.
Contents
========
- Status
- Platform Features
- Serial Console
- LEDs and Buttons
- Using U-Boot to Run NuttX
- Debugging with the Segger J-Link
- SMP
- Configurations
Status
======
2016-02-28: The i.MX6Q port is just beginning. A few files have been
populated with the port is a long way from being complete or even ready to
begin any kind of testing.
2016-03-12: The i.MX6Q port is code complete including initial
implementation of logic needed for CONFIG_SMP=y . There is no clock
configuration logic. This is probably not an issue if we are loaded into
SDRAM by a bootloader (because we cannot change the clocking anyway in
that case).
There is a lot of testing that could be done but, unfortunately, I still
have no i.MX6 hardware to test on.
In additional to the unexpected issues, I do expect to run into some
cache coherency issues when I get to testing an SMP configuration.
2016-03-28: I now have a used MCIMX6Q-SDB which is similar to the target
configuration described below except that it does not have the 10.1" LVDS
display. Next step: Figure out how to run a copy of NuttX using U-Boot.
2016-03-31: Most all of the boot of the NSH configuration seems to be
working. It gets to NSH and NSH appears to run normally. Non-interrupt
driver serial output to the VCOM console is working (llsyslog). However,
there does not appear to be any interrupt activity: No timer interrupts,
no interrupt driver serial console output (syslog, printf).
2016-05-16: I now get serial interrupts (but not timer interrupts). This
involves a few changes to GIC bit settings that I do not fully understand.
With this change, the NSH serial console works:
MX6Q SABRESD U-Boot > ABEFGHILMN
NuttShell (NSH)
nsh>
But there are still no timer interrupts. LEDs do not appear to be working.
2016-05-17: Timer interrupts now work. This turned out to be just a minor
bit setting error in the timer configuration. LEDs were not working simply
because board_autoled_initialize() was not being called in the board startup
logic.
At this point, I would say that the basic NSH port is complete.
2016-05-18: Started looking at the SMP configuration. Initially, I verfied
that the NSH configuration works with CONFIG_SMP_NCPUS=1. Not a very
interesting case, but this does exercise a lot of the basic SMP logic.
When more than one CPU is configured, then there are certain failures that
appear to be stack corruption problem. See the open issues below under
SMP.
2016-05-22: In a simple NSH case, SMP does not seem to be working. But there
are known SMP open issues so I assume if the tasking were stressed more there
would be additional failures. See the open issues below under SMP.
An smp configuration was added. This is not quite the same as the
configuration that I used for testing. I enabled DEBUG output, ran with
only 2 CPUS, and disabled the RAMLOG:
+CONFIG_DEBUG_FEATURES=y
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_SCHED=y
+CONFIG_DEBUG_SYMBOLS=y
-CONFIG_DEBUG_FULLOPT=y
+CONFIG_DEBUG_NOOPT=y
-CONFIG_SMP_NCPUS=4
+CONFIG_SMP_NCPUS=2
-CONFIG_RAMLOG=y
-CONFIG_RAMLOG_SYSLOG=y
-CONFIG_RAMLOG_BUFSIZE=16384
-CONFIG_RAMLOG_NONBLOCKING=y
-CONFIG_RAMLOG_NPOLLWAITERS=4
I would also disable debug output from CPU0 so that I could better see the
debug output from CPU1. In drivers/syslog/vsyslog.c:
+if (up_cpu_index() == 0) return 17; // REMOVE ME
2016-11-26: With regard to SMP, the major issue is cache coherency. I added
some special build logic to move spinlock data into the separate, non-
cached section. That gives an improvement in performance but there are
still hangs. These, I have determined, are to other kinds of cache
coherency problems. Semaphores, message queues, etc. basically all
shared data must be made coherent.
I also added some SCU controls that should enable cache consistency for SMP
CPUs, but I don't think I have that working right yet. See the SMP section
below for more information.
2016-11-28: SMP is unusable until the SCU cache coherency logic is fixed.
I do not know how to do that now.
2016-12-01: I committed a completely untested SPI driver. This was taken
directly from the i.MX1 and is most certainly not ready for use yet.
2016-12-07: Just a note to remind myself. The PL310 L2 cache has *not*
yet been enabled.
2018-02-06: Revisited SMP to see how much has been broken due to bit rot.
Several fixes were needed mostly due to: (1) The new version of
this_task() that calls sched_lock() and sched_unlock(), and (2) to
deferred setting g_cpu_irqlock(). That latter setting is now deferred
until nxsched_resume_scheduler() runs. These commits were made:
commit 50ab5d638a37b539775d1e60085f182bf26be57f
sched/task: It is not appropriate for logic in nxtask_exit() to call
the new version of this_task(). sched/irq: Remove redundant fetch
of CPU index; boards/sabre-lite: update README.
commit 0ba78530164814360eb09ed9805137b934c6f03b
sched/irq: Fix a infinite recursion problem that a recent change
introduced into the i.MX6 SMP implementation.
commit 8aa15385060bf705bbca2c22a5682128740e55a8
arch/arm/src/armv7-a: Found some additional places were the new
this_task() function cannot be called in the i.MX6 SMP configuration.
commit de34b4523fc33c6f2f20619349af8fa081a3bfcd
sched/ and arch/arm/src/armv7-a: Replace a few more occurrences
of this_task() with current_task(cpu) in an effort to get the i.MX6
working in SMP mode again. It does not yet work, sadly.
commit cce21bef3292a40dcd97b6176ea016e2b559de8b
sched/sched: sched_lock() and sched_unlock().. back out some changes
I made recently. The seemed correct but apparently not. Also
reorder to logic so that g_global_lockcount is incremented for the very
minimum amount of time.
With these changes, basic SMP functionality is restored and there are no
known issues (Configuration 'smp' with 4 CPUs and data cache disabled).
It is possible, however, that additional changes similar to the above will
be required in other areas of the OS, but none such are known as of this
writing. Insufficient stress testing has been done to prove that the
solution is stable.
2018-06-08: Again revisited SMP. There appears to be a memory corruption problem.
This is rarely seen with the SMP test but you enable the OS test in the smp
configuration, you will see a crash due to memory corruption consistently,
specially in the nested signal test (apps/examples/ostest/signest.c).
2018-06-20: There was a problem with the Interrupt Stack for SMP in
arch/arm/src/armv7-a/arm_vectors.S: There is only one interrupt stack for
all CPUs! A fix for this was put in place on 2018-06-21. Big Improvement!
But this does not completely eliminate instabilities which seem to be
related to memory corruption -- mm_mallinfo() asserts.
Platform Features
=================
Processor:
- i.MX 6Quad or 6DualLite 1 GHz ARM Cortex-A9 processor
Memory/storage:
- 1 GB DDR3 SDRAM up to 533 MHz (1066 MTPS) memory
- 8 GB eMMC flash
- 4 MB SPI NOR flash
Display:
- 10.1" 1024 x 768 LVDS display with integrated P-cap sensing
- HDMI connector
- LVDS connector (for optional second display)
- LCD expansion connector (parallel, 24-bit)
- EPDC expansion connector (for 6DualLite only)
- MIPI DSI connector (two data lanes, 1 GHz each)
User Interface:
- 10.1" capacitive multitouch display
- Buttons: power, reset, volume
Power Management:
- Proprietary PF0100 PMIC
Audio:
- Audio codec
- 2x digital microphones
- 2x 3.5 mm audio ports
- Dual 1 watt speakers
Expansion Connector:
- Camera MIPI CSI port
- I2C, SPI signals
Connectivity:
- 2x full-size SD/MMC card slots
- 7-pin SATA data connector
- 10/100/1000 Ethernet port
- 1x USB 2.0 OTG port (micro USB)
Debug:
- JTAG connector (20-pin)
- 1x Serial-to-USB connector (for JTAG)
OS Support:
- Linux® and Android™ from NXP/Freescale
- Others supported via third party (QNX, Windows Embedded)
Tools Support:
- Manufacturing tool from NXP/Freescale
- IOMUX tool from NXP/Freescale
- Lauterbach, ARM (DS-5), IAR and Macraigor
Additional Features:
- Proprietary 3-axis accelerometer
- Proprietary 3D magnetometer
- Ambient light sensor
- GPS receiver module
- 2x 5MP cameras
- Battery charger
- Battery connectors (battery not included)
Serial Console
==============
A DEBUG VCOM is available MICRO USB AB 5 J509. This corresponds to UART1
from the i.MX6. UART1 connects to J509 via the CSIO_DAT10 and CSIO_DAT11
pins
LEDs and Buttons
================
LEDs
----
A single LED is available driven GPIO1_IO02. On the schematic this is
USR_DEF_RED_LED signal to pin T1 (GPIO_2). This signal is shared with
KEY_ROW6 (ALT2). A high value illuminates the LED.
This LED is not used by the board port unless CONFIG_ARCH_LEDS is
defined. In that case, the usage by the board port is defined in
include/board.h and src/sam_autoleds.c. The LED is used to encode
OS-related events as follows:
------------------- ----------------------- ------
SYMBOL Meaning LED
------------------- ----------------------- ------
LED_STARTED NuttX has been started OFF
LED_HEAPALLOCATE Heap has been allocated OFF
LED_IRQSENABLED Interrupts enabled OFF
LED_STACKCREATED Idle stack created ON
LED_INIRQ In an interrupt N/C
LED_SIGNAL In a signal handler N/C
LED_ASSERTION An assertion failed N/C
LED_PANIC The system has crashed FLASH
Thus if the LED is statically on, NuttX has successfully booted and is,
apparently, running normally. If the LED is flashing at approximately
2Hz, then a fatal error has been detected and the system has halted.
Buttons
-------
Using U-Boot to Run NuttX
=========================
The MCIMX6Q-SDB comes with a 8GB SD card containing the U-Boot and Android.
You simply put the SD card in the SD card slot SD3 (on the bottom of the
board next to the HDMI connect) and Android 4.2.2.1 will boot.
But we need some other way to boot NuttX. Here are some things that I have
experimented with.
Building U-Boot (Failed Attempt #1)
-----------------------------------
I have been unsuccessful getting building a working version of u-boot from
scratch. It builds, but it does not run. Here are the things I did:
1. Get a copy of the u-boot i.MX6 code and Android GCC toolchain
$ git clone https://source.codeaurora.org/external/imx/uboot-imx.git -b nxp/imx_v2009.08
$ git clone https://android.googlesource.com/platform/prebuilts/gcc/linux-x86/arm/arm-eabi-4.6
2. Build U-Boot for the i.MX6Q Sabre using the following steps. This
assumes that you have the path to the above toolchain at the
beginning of your PATH variable:
$ cd uboot-imx
$ export ARCH=arm
$ export CROSS_COMPILE=arm-eabi-
$ make mx6q_sabresd_android_config
$ make
This should create a number of files, including u-boot.bin
3. Format an SD card
Create a FAT16 partition at an offset of about 1MB into the SD card.
This is where we will put nuttx.bin.
4. Put U-Boot on SD.
$ dd if=u-boot.bin of=/dev/<your-sd-card> bs=1k
$ sync
Your SD card device is typically something in /dev/sd<X> or
/dev/mmcblk<X>. Note that you need write permissions on the SD card
for the command to succeed, so you might need to su - as root, or use
sudo, or do a chmod a+w as root on the SD card device node to grant
permissions to users.
Using the Other SD Card Slot (Failed Attempt #2)
------------------------------------------------
Another option is to use the version u-boot that came on the 8GB but put
NuttX on another SD card inserted in the other SD card slot at the opposite
corner of the board.
To make a long story short: This doesn't work. As far as I can tell,
U-Boot does not support any other other SC card except for mmc 2 with is the
boot SD card slot.
Replace Boot SD Card (Successful Attempt #3)
--------------------------------------------
What if you remove the SD card after U-boot has booted, then then insert
another SD card containing the nuttx.bin image?
1. Build nuttx.bin and copy it only a FAT formatted SD card. Insert the SD
card containing NuttX into the "other" SD card slot. Insert the 8GB SD
card with U-boot already on it in the normal, boot SD card slot.
2. Connect the VCOM port using the USB port next to the boot SD card slot.
3. Start a console at 11500 8N1 on the VCOM port
4. Power up the board with the 8GB SD card in place. U-Boot will start and
countdown before starting Linux. Press enter to break into U-Boot before
Linux is started.
5. Remove the 8GB U-Boot SD card; insert in its place.
6. Rescan the SD card:
MX6Q SABRESD U-Boot > mmc dev 2
mmc2 is current device
MX6Q SABRESD U-Boot > mmc rescan
MX6Q SABRESD U-Boot > fatls mmc 2
system volume information/
87260 nuttx.bin
1 file(s), 1 dir(s)
7. Then we can boot NuttX off the rescanned SD card:
MX6Q SABRESD U-Boot > fatload mmc 2 0x10800000 nuttx.bin
reading nuttx.bin
87260 bytes read
MX6Q SABRESD U-Boot > go 0x10800040
## Starting application at 0x10800040 ...
That seems to work okay.
Use the FAT Partition on the 8GB SD Card (Untested Idea #4)
-----------------------------------------------------------
Partition 4 on the SD card is an Android FAT file system. So one thing you
could do would be put the nuttx.bin file on that partition, then boot like:
MX6Q SABRESD U-Boot > fatload mmc 2:4 0x10800000 nuttx.bin
SD Card Image Copy (Successful Attempt #5)
------------------------------------------
You can use the 'dd' command to copy the first couple of megabytes from the
8GB SD card and copy that to another SD card. You then have to use 'fdisk'
to fix the partition table and to add a single FAT16 partition at an offset
of 1MB or so.
1. Insert the 8GB boot SD card into your PC: Copy the first 2Mb from the SD
card to a file:
$ dd if=/dev/sdh of=sdh.img bs=512 count=4096
2. Remove the 8GB boot SD card and replace it with a fresh SD card. Copy the
saved file to the first the new SD card:
$ dd of=/dev/sdh if=sdh.img bs=512 count=4096
3. Then use 'fdisk' to:
- Remove all of the non-existent partitions created by the 'dd' copy.
- Make a single FAT16 partition at the end of the SD card.
You will also need to format the partion for FAT.
4. You can put nuttx.bin here and then boot very simply with:
MX6Q SABRESD U-Boot > fatload mmc 2:1 0x10800000 nuttx.bin
MX6Q SABRESD U-Boot > go 0x10800040
A little hokey, but not such a bad solution.
TFTPBOOT (Successful Attempt #6)
------------------------------------------
If you can prepare tftp server, this approach would be easy
1. Copy nuttx.bin to the tftp server (e.g. /var/lib/tftpboot/ )
2. Load nuttx.bin from the server and boot
MX6Q SABRESD U-Boot > setenv ipaddr 192.168.10.103
MX6Q SABRESD U-Boot > setenv serverip 192.168.10.16
MX6Q SABRESD U-Boot > setenv image nuttx.bin
MX6Q SABRESD U-Boot > tftp ${loadaddr} ${image}
PHY indentify @ 0x1 = 0x004dd074
FEC: Link is Up 796d
Using FEC0 device
TFTP from server 192.168.10.16; our IP address is 192.168.10.103
Filename 'nuttx.bin'.
Load address: 0x10800000
Loading: ###############
done
Bytes transferred = 217856 (35300 hex)
MX6Q SABRESD U-Boot > go ${loadaddr}
## Starting application at 0x10800000 ...
NuttShell (NSH) NuttX-10.0.1
nsh>
Debugging with the Segger J-Link
================================
These procedures work for debugging the boot-up sequence when there is a
single CPU running and not much else going on. If you want to do higher
level debugger, you will need something more capable. NXP/Freescale suggest
some other debuggers that you might want to consider.
These instructions all assume that you have built NuttX with debug symbols
enabled. When debugging the nuttx.bin file on the SD card, it is also
assumed the nuttx ELF file with the debug symbol addresses is from the
same build so that the symbols match up.
Debugging the NuttX image on the SD card
----------------------------------------
1. Connect the J-Link to the 20-pin JTAG connector.
2. Connect the "USB TO UART" USB VCOM port to the host PC. Start a
terminal emulation program like TeraTerm on Minicom. Select the USB
VCOM serial port at 115200 8N1.
When you apply power to the board, you should see the U-Boot messages in
the terminal window. Stop the U-Boot countdown to get to the U-Boot
prompt.
3. Start the Segger GDB server:
Target: MCIMX6Q6
Target Interface: JTAG
If the GDB server starts correctly you should see the following in the
Log output:
Waiting for GDB Connection
4. In another Xterm terminal window, start arm-none-eabi-gdb and connect to
the GDB server.
From the Xterm Window:
$ arm-none-eabi-gdb
You will need to have the path to the arm-none-eabi-gdb program in your
PATH variable.
Then from GDB:
gdb> target connect localhost:2331
gdb> mon halt
5. Start U-boot under GDB control:
From GDB:
gdb> mon reset
gdb> mon go
Again stop the U-Boot countdown to get to the U-Boot prompt.
6. Load NuttX from the SD card into RAM
From U-Boot:
MX6Q SABRESD U-Boot > fatload mmc 2:1 0x10800000 nuttx.bin
7. Load symbols and set a breakpoint
From GDB:
gdb> mon halt
gdb> file nuttx
gdb> b __start
gdb> c
__start is the entry point into the NuttX binary at 0x10800040. You can,
of course, use a different symbol if you want to start debugging later
in the boot sequence.
8. Start NuttX
From U-Boot:
MX6Q SABRESD U-Boot > go 0x10800040
9. You should hit the breakpoint that you set above and be off and
debugging.
Debugging a Different NuttX Image
---------------------------------
Q: What if I want do run a different version of nuttx than the nuttx.bin
file on the SD card. I just want to build and debug without futzing with
the SD card. Can I do that?
A: Yes with the following modifications to the procedure above.
- Follow steps 1-5, i.e.,
1. Connect the J-Link to the 20-pin JTAG connector.
2. Connect the "USB TO UART" USB VCOM port to the host PC and start a
terminal emulation program.
3. Start the Segger GDB server.
4. Start arm-none-eabi-gdb and connect to the GDB server.
5. Start U-boot under GDB control, stopping the countdown to get
the U-boot prompt.
- Skip step 6, don't bother to load NuttX into RAM
- In step 7, load NuttX into RAM like this:
gdb> mon halt
gdb> load nuttx <-- Loads NuttX into RAM at 0x010800000
gdb> file nuttx
gdb> b __start
gdb> c
- Then after step 7, you should hit the breakpoint at the instruction you
just loaded at address 0x10800040.
- Or, in step 6, instead of continuing ('c') which will resume U-Boot,
even just:
gdb> mon halt
gdb> load nuttx <-- Loads NuttX into RAM at 0x010800000
gdb> file nuttx
gdb> mon reg pc 0x10800040
gdb> s
The final single will then step into the freshly loaded program.
You can then forget about steps 8 and 9.
This is, in fact, my preferred way to debug.
NOTE: Setting the PC to 0x10800040 is a superstituous step. The PC
will be set 0x10800040 by the 'load nuttx' command.
You can restart the debug session at any time at the gdb> prompt by:
gdb> mon reset
gdb> mon go
That will restart U-Boot and you have to press ENTER in the terminal
window to stop U-Boot. Restarting U-Boot is a necessary part of the
restart process because you need to put the hardware back in its initial
state before running NuttX.
Then this will restart the debug session just as before:
gdb> mon halt
gdb> load nuttx <-- Loads NuttX into RAM at 0x010800000
gdb> file nuttx
gdb> mon reg pc 0x10800040
gdb> s
Debugging with QEMU
================================
The nuttx ELF image can be debugged with QEMU.
1. To debug the nuttx (ELF) with symbols, following change must
be applied to defconfig.
diff --git a/boards/arm/imx6/sabre-lite/configs/nsh/defconfig b/boards/arm/imx6/sabre-lite/configs/nsh/defconfig
index b15becbb51..3ad4d13ad7 100644
--- a/boards/arm/imx6/sabre-lite/configs/nsh/defconfig
+++ b/boards/arm/imx6/sabre-lite/configs/nsh/defconfig
@@ -21,11 +21,12 @@ CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARD_LOOPSPERMSEC=99369
CONFIG_BOOT_RUNFROMSDRAM=y
CONFIG_BUILTIN=y
+CONFIG_DEBUG_FULLOPT=y
+CONFIG_DEBUG_SYMBOLS=y
CONFIG_DEV_ZERO=y
2. Please note that QEMU does not report PL310 (L2CC) related
registers correctly, so if you enable CONFIG_DEBUG_ASSERTION
the nuttx will stop with DEBUGASSERT(). To avoid this,
comment out the following lines.
--- a/arch/arm/src/armv7-a/arm_l2cc_pl310.c
+++ b/arch/arm/src/armv7-a/arm_l2cc_pl310.c
@@ -333,7 +333,7 @@ void arm_l2ccinitialize(void)
#if defined(CONFIG_ARMV7A_ASSOCIATIVITY_8WAY)
DEBUGASSERT((getreg32(L2CC_ACR) & L2CC_ACR_ASS) == 0);
#elif defined(CONFIG_ARMV7A_ASSOCIATIVITY_16WAY)
- DEBUGASSERT((getreg32(L2CC_ACR) & L2CC_ACR_ASS) == L2CC_ACR_ASS);
+ //DEBUGASSERT((getreg32(L2CC_ACR) & L2CC_ACR_ASS) == L2CC_ACR_ASS);
#else
# error No associativity selected
#endif
@@ -345,8 +345,8 @@ void arm_l2ccinitialize(void)
DEBUGASSERT((getreg32(L2CC_ACR) & L2CC_ACR_WAYSIZE_MASK) ==
L2CC_ACR_WAYSIZE_32KB);
#elif defined(CONFIG_ARMV7A_WAYSIZE_64KB)
- DEBUGASSERT((getreg32(L2CC_ACR) & L2CC_ACR_WAYSIZE_MASK) ==
- L2CC_ACR_WAYSIZE_64KB);
+ // DEBUGASSERT((getreg32(L2CC_ACR) & L2CC_ACR_WAYSIZE_MASK) ==
+ // L2CC_ACR_WAYSIZE_64KB);
#elif defined(CONFIG_ARMV7A_WAYSIZE_128KB)
DEBUGASSERT((getreg32(L2CC_ACR) & L2CC_ACR_WAYSIZE_MASK) ==
L2CC_ACR_WAYSIZE_128KB);
3. Run QEMU
Run qemu with following options, these options do not load nuttx.
Instead, just stops the emulated CPU like "reset halt" with OpenOCD.
$ qemu-system-arm -M sabrelite -smp 4 -nographic -s -S
NOTE: -smp 4 option should be used for both nsh configuration
(non-SMP) and smp configuration (regardless of CONFIG_SMP_NCPUS)
To quit QEMU, type Ctrl-A + X
3. Run gdb, connect to QEMU, load nuttx and continue
$ arm-none-eabi-gdb ./nuttx
(gdb) target extended-remote :1234
Remote debugging using :1234
0x00000000 in ?? ()
(gdb) load nuttx
Loading section .text, size 0x17f6b lma 0x10800000
Loading section .ARM.exidx, size 0x8 lma 0x10817f6c
Loading section .data, size 0x98 lma 0x10817f74
Start address 0x10800040, load size 98315
Transfer rate: 8728 KB/sec, 1927 bytes/write.
(gdb) c
Continuing.
^C
Thread 1 received signal SIGINT, Interrupt.
up_idle () at common/up_idle.c:78
78 }
(gdb) where
#0 up_idle () at common/up_idle.c:78
#1 0x10801ba4 in nx_start () at init/nx_start.c:874
#2 0x00000000 in ?? ()
(gdb) info threads
Id Target Id Frame
* 1 Thread 1 (CPU#0 [halted ]) up_idle () at common/up_idle.c:78
2 Thread 2 (CPU#1 [halted ]) 0x00000000 in ?? ()
3 Thread 3 (CPU#2 [halted ]) 0x00000000 in ?? ()
4 Thread 4 (CPU#3 [halted ]) 0x00000000 in ?? ()
SMP
===
The i.MX6 6Quad has 4 CPUs. Support is included for testing an SMP
configuration. That configuration is still not yet ready for usage but can
be enabled with the following configuration settings:
RTOS Features -> Tasks and Scheduling
CONFIG_SPINLOCK=y
CONFIG_SMP=y
CONFIG_SMP_NCPUS=4
Open Issues:
1. Currently all device interrupts are handled on CPU0 only. Critical sections will
attempt to disable interrupts but will now disable interrupts only on the current
CPU (which may not be CPU0). There is a spinlock to prohibit entrance into these
critical sections in interrupt handlers of other CPUs.
When the critical section is used to lock a resource that is also used by
interrupt handling, the interrupt handling logic must also take the spinlock.
This will cause the interrupt handlers on other CPUs to spin until
leave_critical_section() is called. More verification is needed.
2. Recent redesigns to SMP of another ARMv7-M platform have made changes to the OS
SMP support. There are no known problem but the changes have not been verified
fully (see STATUS above for 2019-02-06).
Configurations
==============
Information Common to All Configurations
----------------------------------------
Each Sabre-Lite configuration is maintained in a sub-directory and
can be selected as follow:
tools/configure.sh sabre-lite:<subdir>
Before building, make sure the PATH environment variable includes the
correct path to the directory than holds your toolchain binaries.
And then build NuttX by simply typing the following. At the conclusion of
the make, the nuttx binary will reside in an ELF file called, simply, nuttx.
make oldconfig
make
The <subdir> that is provided above as an argument to the tools/configure.sh
must be is one of the following.
NOTES:
1. These configurations use the mconf-based configuration tool. To
change any of these configurations using that tool, you should:
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
see additional README.txt files in the NuttX tools repository.
b. Execute 'make menuconfig' in nuttx/ in order to start the
reconfiguration process.
2. Unless stated otherwise, all configurations generate console
output on UART1 which is a available to the host PC from the USB
micro AB as a VCOM part.
3. All of these configurations are set up to build under Windows using the
"GNU Tools for ARM Embedded Processors" that is maintained by ARM
(unless stated otherwise in the description of the configuration).
https://developer.arm.com/open-source/gnu-toolchain/gnu-rm
That toolchain selection can easily be reconfigured using
'make menuconfig'. Here are the relevant current settings:
Build Setup:
CONFIG_HOST_WINDOWS=y : Window environment
CONFIG_WINDOWS_CYGWIN=y : Cywin under Windows
System Type -> Toolchain:
CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : GNU ARM EABI toolchain
Configuration sub-directories
-----------------------------
nsh
---
This is a NuttShell (NSH) configuration that uses the NSH library
at apps/nshlib with the start logic at apps/examples/nsh.
NOTES:
1. This configuration assumes that we are loaded into SDRAM and
started via U-Boot.
2. The serial console is configured by default for use UART1, the
USB VCOM port (UART1), same as the serial port used by U-Boot.
You will need to reconfigure if you want to use a different UART.
3. NSH built-in applications are supported, but no built-in
applications are enabled.
Binary Formats:
CONFIG_BUILTIN=y : Enable support for built-in programs
Application Configuration:
CONFIG_NSH_BUILTIN_APPS=y : Enable starting apps from NSH command line
4. The RAMLOG is enabled. All SYSLOG (DEBUG) output will go to the
RAMLOG and will not be visible unless you use the nsh 'dmesg'
command. To disable this RAMLOG feature, disable the following:
Device Drivers: CONFIG_RAMLOG
smp
---
This is a configuration of testing the SMP configuration. It is
essentially equivalent to the nsh configuration except has SMP enabled
and supports apps/testing/smp.
Sample output of the SMP test is show below (Configuration all 4 CPUs
but with data cache disabled):
NuttShell (NSH) NuttX-7.23
nsh> smp
Main[0]: Running on CPU0
Main[0]: Initializing barrier
Thread[1]: Started
Main[0]: Thread 1 created
Thread[1]: Running on CPU0
Main[0]: Now running on CPU1
Thread[2]: Started
Main[0]: Thread 2 created
Thread[2]: Running on CPU1
Main[0]: Now running on CPU2
Thread[3]: Started
Main[0]: Thread 3 created
Thread[3]: Running on CPU2
Main[0]: Now running on CPU3
Thread[4]: Started
Thread[4]: Running on CPU3
Main[0]: Thread 4 created
Main[0]: Now running on CPU0
Thread[5]: Started
Thread[5]: Running on CPU0
Main[0]: Thread 5 created
Thread[6]: Started
Thread[6]: Running on CPU0
Main[0]: Thread 6 created
Thread[7]: Started
Thread[7]: Running on CPU0
Main[0]: Thread 7 created
Thread[8]: Started
Thread[8]: Running on CPU0
Main[0]: Thread 8 created
Thread[2]: Now running on CPU0
Thread[3]: Now running on CPU0
Thread[4]: Now running on CPU0
Thread[3]: Now running on CPU2
Thread[3]: Now running on CPU0
Thread[5]: Now running on CPU1
Thread[5]: Now running on CPU0
Thread[6]: Calling pthread_barrier_wait()
Thread[8]: Calling pthread_barrier_wait()
Thread[3]: Calling pthread_barrier_wait()
Thread[5]: Calling pthread_barrier_wait()
Thread[1]: Calling pthread_barrier_wait()
Thread[2]: Now running on CPU2
Thread[2]: Calling pthread_barrier_wait()
Thread[7]: Now running on CPU3
Thread[4]: Now running on CPU1
Thread[4]: Calling pthread_barrier_wait()
Thread[7]: Calling pthread_barrier_wait()
Thread[7]: Back with ret=PTHREAD_BARRIER_SERIAL_THREAD (I AM SPECIAL)
Thread[6]: Back with ret=0 (I am not special)
Thread[8]: Back with ret=0 (I am not special)
Thread[3]: Back with ret=0 (I am not special)
Thread[5]: Back with ret=0 (I am not special)
Thread[1]: Back with ret=0 (I am not special)
Thread[2]: Back with ret=0 (I am not special)
Thread[4]: Back with ret=0 (I am not special)
Thread[7]: Now running on CPU1
Thread[6]: Now running on CPU2
Thread[3]: Now running on CPU1
Thread[5]: Now running on CPU2
Thread[1]: Now running on CPU1
Thread[4]: Now running on CPU3
Thread[2]: Now running on CPU0
Thread[7]: Now running on CPU0
Thread[6]: Now running on CPU0
Thread[3]: Now running on CPU0
Thread[4]: Now running on CPU0
Thread[1]: Now running on CPU0
Thread[5]: Now running on CPU0
Thread[3]: Now running on CPU3
Thread[3]: Now running on CPU0
Thread[4]: Now running on CPU2
Thread[3]: Done
Thread[4]: Now running on CPU0
Thread[4]: Done
Thread[7]: Done
Thread[2]: Done
Thread[5]: Now running on CPU2
Thread[8]: Now running on CPU1
Thread[8]: Done
Thread[6]: Now running on CPU3
Thread[5]: Done
Thread[1]: Done
Main[0]: Now running on CPU1
Main[0]: Thread 1 completed with result=0
Main[0]: Thread 2 completed with result=0
Main[0]: Thread 3 completed with result=0
Main[0]: Thread 4 completed with result=0
Main[0]: Thread 5 completed with result=0
Thread[6]: Done
Main[0]: Now running on CPU0
Main[0]: Thread 6 completed with result=0
Main[0]: Thread 7 completed with result=0
Main[0]: Thread 8 completed with result=0
nsh>
NOTES:
1. See the notes for the nsh configuration. Since this configuration
is essentially the same all of those comments apply.
2. See the STATUS and SMP sections above for detailed SMP-related
issues. There are a some major problems with the current SMP
implementation.
knsh
---
This is a configuration of testing the BUILD_KERNEL configuration.
$ cd nuttx
$ ./tools/configure.sh sabre-lite:knsh
$ make V=1 -j7
$ make export V=1
$ cd ../apps
$ ./tools/mkimport.sh -x ../nuttx/nuttx-export-*.zip
$ make import V=1
$ cd ../nuttx
$ qemu-system-arm -semihosting -M sabrelite -m 1024 -smp 4 -nographic -kernel ./nuttx
NuttShell (NSH) NuttX-10.2.0
nsh> uname -a
NuttX 10.2.0 31283faf71 Mar 1 2022 19:52:48 arm sabre-lite
nsh> ps
PID GROUP PRI POLICY TYPE NPX STATE EVENT SIGMASK STACK USED FILLED COMMAND
0 0 0 FIFO Kthread N-- Ready 00000000 002024 000984 48.6% Idle Task
1 1 100 RR Task --- Running 00000000 002016 001232 61.1% /system/bin/init
nsh> free
total used free largest nused nfree
Umem: 1048224 3728 1044496 1038304 6 2
Kmem: 1065201424 10720 1065190704 1065190704 30 1
Page: 134217728 1122304 133095424 133095424
nsh> /system/bin/hello
Hello, World!!
nsh> /system/bin/getprime
Set thread priority to 10
Set thread policy to SCHED_RR
Start thread #0
thread #0 started, looking for primes < 10000, doing 10 run(s)
thread #0 finished, found 1230 primes, last one was 9973
Done
/system/bin/getprime took 1850 msec

58
Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/sabre-lite/configs/elf/defconfig Normal file
View File

@ -0,0 +1,58 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
CONFIG_ADD_NUTTX_FETURES=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="sabre-lite"
CONFIG_ARCH_BOARD_SABRE_LITE=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="imx6"
CONFIG_ARCH_CHIP_IMX6=y
CONFIG_ARCH_CHIP_IMX6_6QUAD=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQBUTTONS=y
CONFIG_ARCH_LOWVECTORS=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARMV7A_ASSOCIATIVITY_16WAY=y
CONFIG_ARMV7A_L2CC_PL310=y
CONFIG_ARMV7A_WAYSIZE_64KB=y
CONFIG_BOARDCTL=y
CONFIG_BOARDCTL_ROMDISK=y
CONFIG_BOARD_LOOPSPERMSEC=99369
CONFIG_BOOT_RUNFROMSDRAM=y
CONFIG_BUILTIN=y
CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_DEV_ZERO=y
CONFIG_ELF=y
CONFIG_EXAMPLES_ELF=y
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_FS_PROCFS_REGISTER=y
CONFIG_FS_ROMFS=y
CONFIG_HAVE_CXX=y
CONFIG_IMX6_UART2=y
CONFIG_IMX_DDR_SIZE=1073741824
CONFIG_INIT_ENTRYPOINT="elf_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_PL310_LOCKDOWN_BY_LINE=y
CONFIG_PL310_LOCKDOWN_BY_MASTER=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=1073741824
CONFIG_RAM_START=0x10000000
CONFIG_RAM_VSTART=0x10000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_WAITPID=y
CONFIG_STACK_COLORATION=y
CONFIG_START_DAY=17
CONFIG_START_MONTH=5
CONFIG_START_YEAR=2021
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_UART2_SERIAL_CONSOLE=y
CONFIG_READLINE_CMD_HISTORY=y
CONFIG_READLINE_TABCOMPLETION=y

86
Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/sabre-lite/configs/knsh/defconfig Normal file
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@ -0,0 +1,86 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_ADD_NUTTX_FETURES=y
CONFIG_ARCH="arm"
CONFIG_ARCH_ADDRENV=y
CONFIG_ARCH_BOARD="sabre-lite"
CONFIG_ARCH_BOARD_SABRE_LITE=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="imx6"
CONFIG_ARCH_CHIP_IMX6=y
CONFIG_ARCH_CHIP_IMX6_6QUAD=y
CONFIG_ARCH_DATA_NPAGES=256
CONFIG_ARCH_DATA_VBASE=0x80100000
CONFIG_ARCH_HEAP_NPAGES=256
CONFIG_ARCH_HEAP_VBASE=0x80200000
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQBUTTONS=y
CONFIG_ARCH_KERNEL_STACKSIZE=3072
CONFIG_ARCH_LOWVECTORS=y
CONFIG_ARCH_PGPOOL_MAPPING=y
CONFIG_ARCH_PGPOOL_PBASE=0x18000000
CONFIG_ARCH_PGPOOL_SIZE=134217728
CONFIG_ARCH_PGPOOL_VBASE=0x18000000
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARCH_TEXT_NPAGES=256
CONFIG_ARCH_TEXT_VBASE=0x80000000
CONFIG_ARM_SEMIHOSTING_HOSTFS=y
CONFIG_BOARD_LOOPSPERMSEC=99369
CONFIG_BOOT_RUNFROMSDRAM=y
CONFIG_BUILD_KERNEL=y
CONFIG_DEBUG_ASSERTIONS=y
CONFIG_DEBUG_FEATURES=y
CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_DEV_ZERO=y
CONFIG_DISABLE_ENVIRON=y
CONFIG_ELF=y
CONFIG_EXAMPLES_HELLO=m
CONFIG_FS_HOSTFS=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_IMX6_DDRCS_PGHEAP_OFFSET=0x08000000
CONFIG_IMX6_DDRCS_PGHEAP_SIZE=134217728
CONFIG_IMX6_UART2=y
CONFIG_IMX_DDR_SIZE=1073741824
CONFIG_INIT_FILEPATH="/system/bin/init"
CONFIG_INIT_MOUNT=y
CONFIG_INIT_MOUNT_DATA="fs=../apps"
CONFIG_INIT_MOUNT_FLAGS=0x1
CONFIG_INIT_MOUNT_FSTYPE="hostfs"
CONFIG_INIT_MOUNT_SOURCE=""
CONFIG_INIT_MOUNT_TARGET="/system"
CONFIG_INIT_STACKSIZE=3072
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_EXECFUNCS=y
CONFIG_MM_PGALLOC=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_FILE_APPS=y
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=1073741824
CONFIG_RAM_START=0x10000000
CONFIG_RAM_VSTART=0x10000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_WAITPID=y
CONFIG_STACK_COLORATION=y
CONFIG_START_MONTH=3
CONFIG_START_YEAR=2022
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_SYSLOG_TIMESTAMP=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_NSH_PROGNAME="init"
CONFIG_TESTING_GETPRIME=y
CONFIG_UART2_SERIAL_CONSOLE=y
CONFIG_READLINE_CMD_HISTORY=y
CONFIG_READLINE_TABCOMPLETION=y

104
Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/sabre-lite/configs/netnsh/defconfig Normal file
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@ -0,0 +1,104 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_ADD_NUTTX_FETURES=y
CONFIG_ALLOW_BSD_COMPONENTS=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="sabre-lite"
CONFIG_ARCH_BOARD_SABRE_LITE=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="imx6"
CONFIG_ARCH_CHIP_IMX6=y
CONFIG_ARCH_CHIP_IMX6_6QUAD=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQBUTTONS=y
CONFIG_ARCH_LOWVECTORS=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARD_LOOPSPERMSEC=99369
CONFIG_BOOT_RUNFROMSDRAM=y
CONFIG_BUILTIN=y
CONFIG_CODECS_HASH_MD5=y
CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_DEV_ZERO=y
CONFIG_ELF=y
CONFIG_ETH0_PHY_KSZ8081=y
CONFIG_EXAMPLES_HELLO=m
CONFIG_EXAMPLES_TCPBLASTER=y
CONFIG_EXAMPLES_TCPBLASTER_GROUPSIZE=500
CONFIG_EXAMPLES_TCPBLASTER_SERVER=y
CONFIG_EXAMPLES_TCPBLASTER_SERVERIP=0x2b1f4d32
CONFIG_EXAMPLES_TCPBLASTER_TARGET2=y
CONFIG_EXAMPLES_UDPBLASTER=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_IMX6_ENET=y
CONFIG_IMX6_UART2=y
CONFIG_IMX_DDR_SIZE=1073741824
CONFIG_IMX_ENET_NTXBUFFERS=1
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INIT_STACKSIZE=3072
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_ENVPATH=y
CONFIG_LIBC_EXECFUNCS=y
CONFIG_NET=y
CONFIG_NETDB_DNSCLIENT=y
CONFIG_NETDB_DNSCLIENT_ENTRIES=4
CONFIG_NETDB_DNSSERVER_NOADDR=y
CONFIG_NETINIT_DRIPADDR=0x0a000202
CONFIG_NETINIT_IPADDR=0x0a00020f
CONFIG_NETINIT_NOMAC=y
CONFIG_NETUTILS_CODECS=y
CONFIG_NETUTILS_IPERF=y
CONFIG_NETUTILS_IPERFTEST_DEVNAME="eth0"
CONFIG_NETUTILS_TELNETD=y
CONFIG_NETUTILS_TFTPC=y
CONFIG_NETUTILS_WEBCLIENT=y
CONFIG_NET_BROADCAST=y
CONFIG_NET_ETH_PKTSIZE=1514
CONFIG_NET_ICMP=y
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_MAX_LISTENPORTS=8
CONFIG_NET_STATISTICS=y
CONFIG_NET_TCP=y
CONFIG_NET_UDP=y
CONFIG_NET_UDP_CHECKSUMS=y
CONFIG_NFS=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_PATH_INITIAL="/mnt/nfs/bin"
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=1073741824
CONFIG_RAM_START=0x10000000
CONFIG_RAM_VSTART=0x10000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_LPWORK=y
CONFIG_SCHED_WAITPID=y
CONFIG_STACK_COLORATION=y
CONFIG_START_DAY=23
CONFIG_START_MONTH=12
CONFIG_START_YEAR=2020
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_SYSLOG_TIMESTAMP=y
CONFIG_SYSTEM_DHCPC_RENEW=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_NSH_SYMTAB=y
CONFIG_SYSTEM_NSH_SYMTAB_ARRAYNAME="g_symtab"
CONFIG_SYSTEM_NSH_SYMTAB_COUNTNAME="g_nsymbols"
CONFIG_SYSTEM_PING=y
CONFIG_TESTING_GETPRIME=y
CONFIG_TESTING_OSTEST=y
CONFIG_TESTING_OSTEST_FPUTESTDISABLE=y
CONFIG_UART2_SERIAL_CONSOLE=y
CONFIG_READLINE_CMD_HISTORY=y
CONFIG_READLINE_TABCOMPLETION=y

107
Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/sabre-lite/configs/netnsh_smp/defconfig Normal file
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#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_ADD_NUTTX_FETURES=y
CONFIG_ALLOW_BSD_COMPONENTS=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="sabre-lite"
CONFIG_ARCH_BOARD_SABRE_LITE=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="imx6"
CONFIG_ARCH_CHIP_IMX6=y
CONFIG_ARCH_CHIP_IMX6_6QUAD=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQBUTTONS=y
CONFIG_ARCH_LOWVECTORS=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARD_LOOPSPERMSEC=99369
CONFIG_BOOT_RUNFROMSDRAM=y
CONFIG_BUILTIN=y
CONFIG_CODECS_HASH_MD5=y
CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_DEV_ZERO=y
CONFIG_ELF=y
CONFIG_ETH0_PHY_KSZ8081=y
CONFIG_EXAMPLES_HELLO=m
CONFIG_EXAMPLES_TCPBLASTER=y
CONFIG_EXAMPLES_TCPBLASTER_GROUPSIZE=500
CONFIG_EXAMPLES_TCPBLASTER_SERVER=y
CONFIG_EXAMPLES_TCPBLASTER_SERVERIP=0x2b1f4d32
CONFIG_EXAMPLES_TCPBLASTER_TARGET2=y
CONFIG_EXAMPLES_UDPBLASTER=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_IMX6_ENET=y
CONFIG_IMX6_UART2=y
CONFIG_IMX_DDR_SIZE=1073741824
CONFIG_IMX_ENET_NTXBUFFERS=1
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INIT_STACKSIZE=3072
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_ENVPATH=y
CONFIG_LIBC_EXECFUNCS=y
CONFIG_NET=y
CONFIG_NETDB_DNSCLIENT=y
CONFIG_NETDB_DNSCLIENT_ENTRIES=4
CONFIG_NETDB_DNSSERVER_NOADDR=y
CONFIG_NETINIT_DRIPADDR=0x0a000202
CONFIG_NETINIT_IPADDR=0x0a00020f
CONFIG_NETINIT_NOMAC=y
CONFIG_NETUTILS_CODECS=y
CONFIG_NETUTILS_IPERF=y
CONFIG_NETUTILS_IPERFTEST_DEVNAME="eth0"
CONFIG_NETUTILS_TELNETD=y
CONFIG_NETUTILS_TFTPC=y
CONFIG_NETUTILS_WEBCLIENT=y
CONFIG_NET_BROADCAST=y
CONFIG_NET_ETH_PKTSIZE=1514
CONFIG_NET_ICMP=y
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_MAX_LISTENPORTS=8
CONFIG_NET_STATISTICS=y
CONFIG_NET_TCP=y
CONFIG_NET_UDP=y
CONFIG_NET_UDP_CHECKSUMS=y
CONFIG_NFS=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_PATH_INITIAL="/mnt/nfs/bin"
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=1073741824
CONFIG_RAM_START=0x10000000
CONFIG_RAM_VSTART=0x10000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_LPWORK=y
CONFIG_SMP=y
CONFIG_STACK_COLORATION=y
CONFIG_START_DAY=8
CONFIG_START_MONTH=3
CONFIG_START_YEAR=2021
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_SYSLOG_TIMESTAMP=y
CONFIG_SYSTEM_DHCPC_RENEW=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_NSH_SYMTAB=y
CONFIG_SYSTEM_NSH_SYMTAB_ARRAYNAME="g_symtab"
CONFIG_SYSTEM_NSH_SYMTAB_COUNTNAME="g_nsymbols"
CONFIG_SYSTEM_PING=y
CONFIG_SYSTEM_SYSTEM=y
CONFIG_SYSTEM_TASKSET=y
CONFIG_TESTING_GETPRIME=y
CONFIG_TESTING_OSTEST=y
CONFIG_TESTING_OSTEST_FPUTESTDISABLE=y
CONFIG_TESTING_SMP=y
CONFIG_UART2_SERIAL_CONSOLE=y
CONFIG_READLINE_CMD_HISTORY=y
CONFIG_READLINE_TABCOMPLETION=y

68
Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/sabre-lite/configs/nsh/defconfig Normal file
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@ -0,0 +1,68 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_ADD_NUTTX_FETURES=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="sabre-lite"
CONFIG_ARCH_BOARD_SABRE_LITE=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="imx6"
CONFIG_ARCH_CHIP_IMX6=y
CONFIG_ARCH_CHIP_IMX6_6QUAD=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQBUTTONS=y
CONFIG_ARCH_LOWVECTORS=y
CONFIG_ARCH_SETJMP_H=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARMV7A_ASSOCIATIVITY_16WAY=y
CONFIG_ARMV7A_L2CC_PL310=y
CONFIG_ARMV7A_WAYSIZE_64KB=y
CONFIG_BOARD_LOOPSPERMSEC=99369
CONFIG_BOOT_RUNFROMSDRAM=y
CONFIG_BUILTIN=y
CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_DEV_ZERO=y
CONFIG_EXAMPLES_HELLO=y
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_IMX6_UART2=y
CONFIG_IMX_DDR_SIZE=1073741824
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_PL310_LOCKDOWN_BY_LINE=y
CONFIG_PL310_LOCKDOWN_BY_MASTER=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAMLOG=y
CONFIG_RAMLOG_BUFSIZE=16384
CONFIG_RAMLOG_SYSLOG=y
CONFIG_RAM_SIZE=1073741824
CONFIG_RAM_START=0x10000000
CONFIG_RAM_VSTART=0x10000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_HPWORKPRIORITY=192
CONFIG_SCHED_WAITPID=y
CONFIG_STACK_COLORATION=y
CONFIG_START_MONTH=3
CONFIG_START_YEAR=2016
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_SYSTEM_NSH=y
CONFIG_TESTING_GETPRIME=y
CONFIG_TESTING_OSTEST=y
CONFIG_TESTING_OSTEST_FPUTESTDISABLE=y
CONFIG_UART2_SERIAL_CONSOLE=y
CONFIG_READLINE_CMD_HISTORY=y
CONFIG_READLINE_TABCOMPLETION=y

63
Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/sabre-lite/configs/posix_spawn/defconfig Normal file
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#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
CONFIG_ADD_NUTTX_FETURES=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="sabre-lite"
CONFIG_ARCH_BOARD_SABRE_LITE=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="imx6"
CONFIG_ARCH_CHIP_IMX6=y
CONFIG_ARCH_CHIP_IMX6_6QUAD=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQBUTTONS=y
CONFIG_ARCH_LOWVECTORS=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARMV7A_ASSOCIATIVITY_16WAY=y
CONFIG_ARMV7A_L2CC_PL310=y
CONFIG_ARMV7A_WAYSIZE_64KB=y
CONFIG_BOARDCTL=y
CONFIG_BOARDCTL_APP_SYMTAB=y
CONFIG_BOARDCTL_ROMDISK=y
CONFIG_BOARD_LOOPSPERMSEC=99369
CONFIG_BOOT_RUNFROMSDRAM=y
CONFIG_BUILTIN=y
CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_DEV_ZERO=y
CONFIG_ELF=y
CONFIG_EXAMPLES_POSIXSPAWN=y
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_FS_PROCFS_REGISTER=y
CONFIG_FS_ROMFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_IMX6_UART2=y
CONFIG_IMX_DDR_SIZE=1073741824
CONFIG_INIT_ENTRYPOINT="posix_spawn_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_ENVPATH=y
CONFIG_LIBC_EXECFUNCS=y
CONFIG_PATH_INITIAL="/mnt/romfs"
CONFIG_PL310_LOCKDOWN_BY_LINE=y
CONFIG_PL310_LOCKDOWN_BY_MASTER=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=1073741824
CONFIG_RAM_START=0x10000000
CONFIG_RAM_VSTART=0x10000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_WAITPID=y
CONFIG_STACK_COLORATION=y
CONFIG_START_DAY=17
CONFIG_START_MONTH=5
CONFIG_START_YEAR=2021
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_UART2_SERIAL_CONSOLE=y
CONFIG_READLINE_CMD_HISTORY=y
CONFIG_READLINE_TABCOMPLETION=y

70
Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/sabre-lite/configs/smp/defconfig Normal file
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@ -0,0 +1,70 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
CONFIG_ADD_NUTTX_FETURES=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="sabre-lite"
CONFIG_ARCH_BOARD_SABRE_LITE=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="imx6"
CONFIG_ARCH_CHIP_IMX6=y
CONFIG_ARCH_CHIP_IMX6_6QUAD=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQBUTTONS=y
CONFIG_ARCH_LOWVECTORS=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARMV7A_ASSOCIATIVITY_16WAY=y
CONFIG_ARMV7A_L2CC_PL310=y
CONFIG_ARMV7A_WAYSIZE_64KB=y
CONFIG_BOARD_LOOPSPERMSEC=99369
CONFIG_BOOT_RUNFROMSDRAM=y
CONFIG_BUILTIN=y
CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_DEV_ZERO=y
CONFIG_EXAMPLES_HELLO=y
CONFIG_EXPERIMENTAL=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_IMX6_UART2=y
CONFIG_IMX_DDR_SIZE=1073741824
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_PL310_LOCKDOWN_BY_LINE=y
CONFIG_PL310_LOCKDOWN_BY_MASTER=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAMLOG=y
CONFIG_RAMLOG_BUFSIZE=16384
CONFIG_RAMLOG_SYSLOG=y
CONFIG_RAM_SIZE=1073741824
CONFIG_RAM_START=0x10000000
CONFIG_RAM_VSTART=0x10000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_HPWORKPRIORITY=192
CONFIG_SMP=y
CONFIG_STACK_COLORATION=y
CONFIG_START_MONTH=3
CONFIG_START_YEAR=2016
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_SYSTEM=y
CONFIG_SYSTEM_TASKSET=y
CONFIG_TESTING_GETPRIME=y
CONFIG_TESTING_OSTEST=y
CONFIG_TESTING_OSTEST_FPUTESTDISABLE=y
CONFIG_TESTING_SMP=y
CONFIG_UART2_SERIAL_CONSOLE=y
CONFIG_READLINE_CMD_HISTORY=y
CONFIG_READLINE_TABCOMPLETION=y

162
Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/sabre-lite/include/board.h Normal file
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@ -0,0 +1,162 @@
/****************************************************************************
* boards/arm/imx6/sabre-lite/include/board.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_ARM_IMX6_SABRE_LITE_INCLUDE_BOARD_H
#define __BOARDS_ARM_IMX6_SABRE_LITE_INCLUDE_BOARD_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Clocking *****************************************************************/
/* The Sabre-Lite board has two crystals:
*
* Y1 24 MHz CPU_XTALI/CPU_XTALO
* QZ500 32.768 KHz RTC_XTALI/RTC_XTALO
*/
#define BOARD_CPUXTAL_FREQUENCY 24000000
#define BAORD_RTCXTAL_FREQUENCY 32768
/* Clocking will be configured at 792 MHz initially when started via U-Boot.
* The Linux kernel will use the CPU frequency scaling code which will switch
* the processor frequency between 400 MHz and 1GHz based on load and
* temperature.
*
* These are the frequencies reported with U-Boot starts up:
*
* mx6q pll1 : 792MHz
* mx6q pll2 : 528MHz
* mx6q pll3 : 480MHz
* mx6q pll8 : 50MHz
*
* ipg clock : 66000000Hz
* ipg per clock : 66000000Hz
* uart clock : 80000000Hz
* cspi clock : 60000000Hz
* ahb clock : 132000000Hz
* axi clock : 264000000Hz
* emi_slow clock : 29333333Hz
* ddr clock : 528000000Hz
* usdhc1 clock : 198000000Hz
* usdhc2 clock : 198000000Hz
* usdhc3 clock : 198000000Hz
* usdhc4 clock : 198000000Hz
* nfc clock : 24000000Hz
*
* For now, NuttX simply leaves the clocking at 792MHz.
*/
/* LED definitions **********************************************************/
/* LEDs
*
* A single LED is available driven GPIO1_IO02.
* On the schematic this is USR_DEF_RED_LED signal to pin T1 (GPIO_2).
* This signal is shared with KEY_ROW6 (ALT2).
* A high value illuminates the LED.
*/
/* LED index values for use with board_userled() */
#define BOARD_LED 0
#define BOARD_NLEDS 1
/* LED bits for use with board_userled_all() */
#define BOARD_LED_BIT (1 << BOARD_LED)
/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is
* defined. In that case, the usage by the board port is defined in
* include/board.h and src/sam_autoleds.c. The LEDs are used to encode
* OS-related events as follows:
*
* ---------------------- ---------------------------- ------
* SYMBOL Meaning LED
* ---------------------- ---------------------------- ------
*/
#define LED_STARTED 0 /* NuttX has been started OFF */
#define LED_HEAPALLOCATE 0 /* Heap has been allocated OFF */
#define LED_IRQSENABLED 0 /* Interrupts enabled OFF */
#define LED_STACKCREATED 1 /* Idle stack created ON */
#define LED_INIRQ 2 /* In an interrupt N/C */
#define LED_SIGNAL 2 /* In a signal handler N/C */
#define LED_ASSERTION 2 /* An assertion failed N/C */
#define LED_PANIC 3 /* The system has crashed FLASH */
#undef LED_IDLE /* MCU is is sleep mode Not used */
/* Thus is LED is statically on, NuttX has successfully booted and is,
* apparently, running normally. If LED is flashing at approximately
* 2Hz, then a fatal error has been detected and the system has halted.
*/
/* Button definitions *******************************************************/
/* GPIO Disambiguation ******************************************************/
/* A DEBUG VCOM is available MICRO USB AB 5 J509.
* This corresponds to UART1 from the i.MX6.
* UART1 connects to J509 via the CSIO_DAT10 and CSIO_DAT11 pins:
*/
#define GPIO_UART1_RX_DATA GPIO_UART1_RX_DATA_2
#define GPIO_UART1_TX_DATA GPIO_UART1_TX_DATA_2
#define GPIO_UART2_RX_DATA GPIO_UART2_RX_DATA_2
#define GPIO_UART2_TX_DATA GPIO_UART2_TX_DATA_2
/****************************************************************************
* Public Types
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Functions Definitions
****************************************************************************/
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_ARM_IMX6_SABRE_LITE_INCLUDE_BOARD_H */

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/****************************************************************************
* boards/arm/imx6/sabre-lite/include/board_memorymap.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_ARM_IMX6_SABRE_LITE_INCLUDE_BOARD_MEMORYMAP_H
#define __BOARDS_ARM_IMX6_SABRE_LITE_INCLUDE_BOARD_MEMORYMAP_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_ARM_IMX6_SABRE_LITE_INCLUDE_BOARD_MEMORYMAP_H */

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############################################################################
# boards/arm/imx6/sabre-lite/scripts/Make.defs
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/.config
include $(TOPDIR)/tools/Config.mk
include $(TOPDIR)/arch/arm/src/armv7-a/Toolchain.defs
LDSCRIPT = dramboot.ld
ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
ARCHOPTIMIZATION = -g
endif
ifneq ($(CONFIG_DEBUG_NOOPT),y)
ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing
endif
ARCHCPUFLAGS = -mcpu=cortex-a9 -mfpu=vfpv4-d16 -mthumb
ARCHCFLAGS = -fno-common -ffunction-sections -fdata-sections
ARCHCXXFLAGS = -fno-common -fno-exceptions -fcheck-new -fno-rtti
ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
ARCHWARNINGSXX = -Wall -Wshadow -Wundef
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS := $(APPPATHS) $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
AFLAGS := $(CFLAGS) -D__ASSEMBLY__
# NXFLAT module definitions
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048
# ELF module definitions
CELFFLAGS = $(CFLAGS) -mlong-calls # --target1-abs
CXXELFFLAGS = $(CXXFLAGS) -mlong-calls # --target1-abs
LDELFFLAGS = -r -e main
LDELFFLAGS += -T $(call CONVERT_PATH,$(BOARD_DIR)$(DELIM)scripts$(DELIM)gnu-elf.ld)
LDFLAGS += --gc-sections
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
LDFLAGS += -g
endif

124
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/****************************************************************************
* boards/arm/imx6/sabre-lite/scripts/dramboot.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* The i.MX6 has 256 KB of OCRAM beginning at virtual address 0x0090:0000
* This memory configuration, however, loads into the 1GB DDR3 on board
* the Sabre 6Quad K which lies at 0x1000:0000. Code is positioned at
* 0x10800000 which the standard load address of Linux when used with uBoot.
*
* Vectors in low memory are assumed and 16KB of OCRAM is reserved at the
* high end of OCRAM for the page table.
*/
MEMORY
{
oscram (W!RX) : ORIGIN = 0x00900000, LENGTH = 256K - 16K
ddr3 (W!RX) : ORIGIN = 0x10800000, LENGTH = 1024M - 8M
}
ENTRY(entry)
ENTRY(_stext)
SECTIONS
{
.text :
{
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
*(.ARM.extab*)
*(.gnu.linkonce.armextab.*)
_etext = ABSOLUTE(.);
} > ddr3
.init_section :
{
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > ddr3
.ARM.extab :
{
*(.ARM.extab*)
} > ddr3
/* .ARM.exidx is sorted, so has to go in its own output section. */
PROVIDE_HIDDEN (__exidx_start = .);
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > ddr3
PROVIDE_HIDDEN (__exidx_end = .);
/* Uninitialized data */
.data :
{
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
. = ALIGN(4);
_edata = ABSOLUTE(.);
} > ddr3
.bss :
{
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
_ebss = ABSOLUTE(.);
} > ddr3
.noinit :
{
_snoinit = ABSOLUTE(.);
*(.noinit*)
_enoinit = ABSOLUTE(.);
} > ddr3
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}

125
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/****************************************************************************
* boards/arm/imx6/sabre-lite/scripts/gnu-elf.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
SECTIONS
{
.text 0x00000000 :
{
_stext = . ;
*(.text)
*(.text.*)
*(.gnu.warning)
*(.stub)
*(.glue_7)
*(.glue_7t)
*(.jcr)
/* C++ support: The .init and .fini sections contain specific logic
* to manage static constructors and destructors.
*/
*(.gnu.linkonce.t.*)
*(.init) /* Old ABI */
*(.fini) /* Old ABI */
_etext = . ;
}
.ARM.extab :
{
*(.ARM.extab*)
}
.ARM.exidx :
{
*(.ARM.exidx*)
}
.rodata :
{
_srodata = . ;
*(.rodata)
*(.rodata1)
*(.rodata.*)
*(.gnu.linkonce.r*)
_erodata = . ;
}
.data :
{
_sdata = . ;
*(.data)
*(.data1)
*(.data.*)
*(.gnu.linkonce.d*)
. = ALIGN(4);
_edata = . ;
}
/* C++ support. For each global and static local C++ object,
* GCC creates a small subroutine to construct the object. Pointers
* to these routines (not the routines themselves) are stored as
* simple, linear arrays in the .ctors section of the object file.
* Similarly, pointers to global/static destructor routines are
* stored in .dtors.
*/
.ctors :
{
_sctors = . ;
*(.ctors) /* Old ABI: Unallocated */
*(.init_array) /* New ABI: Allocated */
_edtors = . ;
}
.dtors :
{
_sdtors = . ;
*(.dtors) /* Old ABI: Unallocated */
*(.fini_array) /* New ABI: Allocated */
_edtors = . ;
}
.bss :
{
_sbss = . ;
*(.bss)
*(.bss.*)
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.b*)
*(COMMON)
_ebss = . ;
}
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}

35
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############################################################################
# boards/arm/imx6/sabre-lite/src/Makefile
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/Make.defs
CSRCS = imx_boardinit.c imx_bringup.c
ifeq ($(CONFIG_BOARDCTL),y)
CSRCS += imx_appinit.c
endif
ifeq ($(CONFIG_ARCH_LEDS),y)
CSRCS += imx_autoleds.c
else
CSRCS += imx_userleds.c
endif
include $(TOPDIR)/boards/Board.mk

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/****************************************************************************
* boards/arm/imx6/sabre-lite/src/imx_appinit.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <nuttx/board.h>
#include "sabre-lite.h"
#ifdef CONFIG_BOARDCTL
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_app_initialize
*
* Description:
* Perform application specific initialization. This function is never
* called directly from application code, but only indirectly via the
* (non-standard) boardctl() interface using the command BOARDIOC_INIT.
*
* Input Parameters:
* arg - The boardctl() argument is passed to the board_app_initialize()
* implementation without modification. The argument has no
* meaning to NuttX; the meaning of the argument is a contract
* between the board-specific initialization logic and the
* matching application logic. The value could be such things as a
* mode enumeration value, a set of DIP switch switch settings, a
* pointer to configuration data read from a file or serial FLASH,
* or whatever you would like to do with it. Every implementation
* should accept zero/NULL as a default configuration.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned on
* any failure to indicate the nature of the failure.
*
****************************************************************************/
int board_app_initialize(uintptr_t arg)
{
#ifndef CONFIG_BOARD_LATE_INITIALIZE
/* Perform board initialization */
return imx_bringup();
#else
return OK;
#endif
}
#endif /* CONFIG_BOARDCTL */

105
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/****************************************************************************
* boards/arm/imx6/sabre-lite/src/imx_autoleds.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* LEDs
*
* A single LED is available driven by USR_DEF_RED_LED.
*
* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is
* defined. In that case, the usage by the board port is defined in
* include/board.h and src/imx_autoleds.c. The LEDs are used to encode
* OS-related events as follows:
*
* ------------------- ----------------------- ------
* SYMBOL Meaning LED
* ------------------- ----------------------- ------
* LED_STARTED NuttX has been started OFF
* LED_HEAPALLOCATE Heap has been allocated OFF
* LED_IRQSENABLED Interrupts enabled OFF
* LED_STACKCREATED Idle stack created ON
* LED_INIRQ In an interrupt N/C
* LED_SIGNAL In a signal handler N/C
* LED_ASSERTION An assertion failed N/C
* LED_PANIC The system has crashed FLASH
*
* Thus is LED is statically on, NuttX has successfully booted and is,
* apparently, running normally. If LED is flashing at approximately
* 2Hz, then a fatal error has been detected and the system has halted.
*/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "arm_internal.h"
#include "imx_gpio.h"
#include "sabre-lite.h"
#ifdef CONFIG_ARCH_LEDS
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_autoled_initialize
****************************************************************************/
void board_autoled_initialize(void)
{
/* Configure LED PIOs for output */
imx_config_gpio(GPIO_LED);
}
/****************************************************************************
* Name: board_autoled_on
****************************************************************************/
void board_autoled_on(int led)
{
if (led == 1 || led == 3)
{
imx_gpio_write(GPIO_LED, true); /* High illuminates */
}
}
/****************************************************************************
* Name: board_autoled_off
****************************************************************************/
void board_autoled_off(int led)
{
if (led == 3)
{
imx_gpio_write(GPIO_LED, false); /* Low extinguishes */
}
}
#endif /* CONFIG_ARCH_LEDS */

121
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/****************************************************************************
* boards/arm/imx6/sabre-lite/src/imx_boardinit.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "chip.h"
#include "arm_internal.h"
#include "imx_boot.h"
#include "sabre-lite.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: imx_memory_initialize
*
* Description:
* All i.MX6 architectures must provide the following entry point. This
* entry point is called early in the initialization before memory has
* been configured. This board-specific function is responsible for
* configuring any on-board memories.
*
* Logic in imx_memory_initialize must be careful to avoid using any
* global variables because those will be uninitialized at the time this
* function is called.
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
void imx_memory_initialize(void)
{
/* SDRAM was initialized by a bootloader in the supported configurations. */
}
/****************************************************************************
* Name: imx_board_initialize
*
* Description:
* All i.MX6 architectures must provide the following entry point. This
* entry point is called in the initialization phase -- after
* imx_memory_initialize and after all memory has been configured and
* mapped but before any devices have been initialized.
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
void imx_board_initialize(void)
{
#ifdef CONFIG_ARCH_LEDS
/* Configure on-board LEDs if LED support has been selected. */
board_autoled_initialize();
#endif
}
/****************************************************************************
* Name: board_late_initialize
*
* Description:
* If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
* initialization call will be performed in the boot-up sequence to a
* function called board_late_initialize(). board_late_initialize() will be
* called immediately after up_intitialize() is called and just before the
* initial application is started. This additional initialization phase
* may be used, for example, to initialize board-specific device drivers.
*
****************************************************************************/
#ifdef CONFIG_BOARD_LATE_INITIALIZE
void board_late_initialize(void)
{
/* Perform board initialization */
imx_bringup();
}
#endif /* CONFIG_BOARD_LATE_INITIALIZE */

62
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/****************************************************************************
* boards/arm/imx6/sabre-lite/src/imx_bringup.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <syslog.h>
#include <nuttx/fs/fs.h>
#include "sabre-lite.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: imx_bringup
*
* Description:
* Bring up board features
*
****************************************************************************/
int imx_bringup(void)
{
int ret;
#ifdef CONFIG_FS_PROCFS
/* Mount the procfs file system */
ret = nx_mount(NULL, "/proc", "procfs", 0, NULL);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to mount procfs at /proc: %d\n", ret);
}
#endif
UNUSED(ret);
return OK;
}

72
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/****************************************************************************
* boards/arm/imx6/sabre-lite/src/imx_userleds.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <arch/board/board.h>
#include "sabre-lite.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_userled_initialize
****************************************************************************/
uint32_t board_userled_initialize(void)
{
/* Configure LED PIOs for output */
imx_config_gpio(GPIO_LED);
return BOARD_NLEDS;
}
/****************************************************************************
* Name: board_userled
****************************************************************************/
void board_userled(int led, bool ledon)
{
if (led == BOARD_LED)
{
imx_gpio_write(GPIO_LED, !ledon); /* Low illuminates */
}
}
/****************************************************************************
* Name: board_userled_all
****************************************************************************/
void board_userled_all(uint32_t ledset)
{
/* Low illuminates */
imx_gpio_write(GPIO_LED, (ledset & BOARD_LED_BIT) == 0);
}

85
Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/sabre-lite/src/sabre-lite.h Normal file
View File

@ -0,0 +1,85 @@
/****************************************************************************
* boards/arm/imx6/sabre-lite/src/sabre-lite.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_ARM_IMX6_SABRE_LITE_SRC_SABRE_LITE_H
#define __BOARDS_ARM_IMX6_SABRE_LITE_SRC_SABRE_LITE_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include "imx_gpio.h"
#include "imx_iomuxc.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
/* Sabre-Lite GPIO Pin Definitions *****************************************/
/* LED
*
* A single LED is available driven GPIO1_IO02.
* On the schematic this is USR_DEF_RED_LED signal to pin T1 (GPIO_2).
* This signal is shared with KEY_ROW6 (ALT2).
* A high value illuminates the LED.
*/
#define IOMUX_LED (IOMUX_PULL_NONE | IOMUX_CMOS_OUTPUT | \
IOMUX_DRIVE_40OHM | \
IOMUX_SPEED_MEDIUM | IOMUX_SLEW_SLOW)
#define GPIO_LED (GPIO_OUTPUT | GPIO_OUTPUT_ZERO | \
GPIO_PORT1 | GPIO_PIN2 | \
IOMUX_LED)
/****************************************************************************
* Public Types
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Functions Definitions
****************************************************************************/
/****************************************************************************
* Name: imx_bringup
*
* Description:
* Bring up board features
*
****************************************************************************/
#if defined(CONFIG_BOARDCTL) || defined(CONFIG_BOARD_LATE_INITIALIZE)
int imx_bringup(void);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_ARM_SABRE_LITE_SRC_SABRE_LITE_H */

1
Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/build.sh
View File

@ -21,5 +21,6 @@ cp -rf $nuttx/aiit_board/xidatong-riscv64 $nuttx/nuttx/boards/risc-v/k210
cp -rf $nuttx/aiit_board/edu-riscv64 $nuttx/nuttx/boards/risc-v/k210
cp -rf $nuttx/aiit_board/xidatong-arm32 $nuttx/nuttx/boards/arm/imxrt
cp -rf $nuttx/aiit_board/hc32f4a0 $nuttx/nuttx/boards/arm/hc32
cp -rf $nuttx/aiit_board/sabre-lite $nuttx/nuttx/boards/arm/imx6
cd ../nuttx

16
Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/boards/Kconfig
View File

@ -1563,6 +1563,16 @@ config ARCH_BOARD_SABRE_6QUAD
This options selects support for NuttX on the NXP/Freescale Sabre
board featuring the iMX 6Quad CPU.
config ARCH_BOARD_SABRE_LITE
bool "NXP/Freescale i.MX6 Sabre Lite board"
depends on ARCH_CHIP_IMX6_6QUAD
select ARCH_HAVE_LEDS
select ARCH_HAVE_BUTTONS
select ARCH_HAVE_IRQBUTTONS
---help---
This options selects support for NuttX on the NXP/Freescale Sabre
board featuring the iMX 6Quad CPU.
config ARCH_BOARD_SAMA5D2_XULT
bool "Atmel SAMA5D2 Xplained Ultra development board"
depends on ARCH_CHIP_ATSAMA5D27
@ -2485,7 +2495,7 @@ config ARCH_BOARD
default "hymini-stm32v" if ARCH_BOARD_HYMINI_STM32V
default "imxrt1020-evk" if ARCH_BOARD_IMXRT1020_EVK
default "imxrt1050-evk" if ARCH_BOARD_IMXRT1050_EVK
default "xidatong-arm32" if ARCH_BOARD_XIDATONG_ARM32
default "xidatong-arm32" if ARCH_BOARD_XIDATONG_ARM32
default "imxrt1060-evk" if ARCH_BOARD_IMXRT1060_EVK
default "imxrt1064-evk" if ARCH_BOARD_IMXRT1064_EVK
default "kwikstik-k40" if ARCH_BOARD_KWIKSTIK_K40
@ -2596,6 +2606,7 @@ config ARCH_BOARD
default "s32k146evb" if ARCH_BOARD_S32K146EVB
default "s32k148evb" if ARCH_BOARD_S32K148EVB
default "sabre-6quad" if ARCH_BOARD_SABRE_6QUAD
default "sabre-lite" if ARCH_BOARD_SABRE_LITE
default "sama5d2-xult" if ARCH_BOARD_SAMA5D2_XULT
default "giant-board" if ARCH_BOARD_GIANT_BOARD
default "sama5d3x-ek" if ARCH_BOARD_SAMA5D3X_EK
@ -2768,6 +2779,9 @@ endif
if ARCH_BOARD_SABRE_6QUAD
source "boards/arm/imx6/sabre-6quad/Kconfig"
endif
if ARCH_BOARD_SABRE_LITE
source "boards/arm/imx6/sabre-lite/Kconfig"
endif
if ARCH_BOARD_IMXRT1020_EVK
source "boards/arm/imxrt/imxrt1020-evk/Kconfig"
endif

4
Ubiquitous/XiZi_IIoT/arch/arm/cortex-m4/hc32f4a0/interrupt.c
View File

@ -20,6 +20,7 @@
#include <xs_base.h>
#include <xs_isr.h>
#include <hc32f4xx.h>
x_base __attribute__((naked)) DisableLocalInterrupt()
{
@ -36,6 +37,9 @@ void __attribute__((naked)) EnableLocalInterrupt(x_base level)
int32 ArchEnableHwIrq(uint32 irq_num)
{
NVIC_ClearPendingIRQ(irq_num);
NVIC_SetPriority(irq_num, 0);
NVIC_EnableIRQ(irq_num);
return EOK;
}

92
Ubiquitous/XiZi_IIoT/arch/arm/cortex-m4/hc32f4a0/interrupt_vector.S
View File

@ -61,52 +61,52 @@ InterruptVectors:
.long SysTick_Handler /* -1 SysTick Handler */
/* Interrupts */
.long IRQ000_Handler
.long IRQ001_Handler
.long IRQ002_Handler
.long IRQ003_Handler
.long IRQ004_Handler
.long IRQ005_Handler
.long IRQ006_Handler
.long IRQ007_Handler
.long IRQ008_Handler
.long IRQ009_Handler
.long IRQ010_Handler
.long IRQ011_Handler
.long IRQ012_Handler
.long IRQ013_Handler
.long IRQ014_Handler
.long IRQ015_Handler
.long IRQ016_Handler
.long IRQ017_Handler
.long IRQ018_Handler
.long IRQ019_Handler
.long IRQ020_Handler
.long IRQ021_Handler
.long IRQ022_Handler
.long IRQ023_Handler
.long IRQ024_Handler
.long IRQ025_Handler
.long IRQ026_Handler
.long IRQ027_Handler
.long IRQ028_Handler
.long IRQ029_Handler
.long IRQ030_Handler
.long IRQ031_Handler
.long IRQ032_Handler
.long IRQ033_Handler
.long IRQ034_Handler
.long IRQ035_Handler
.long IRQ036_Handler
.long IRQ037_Handler
.long IRQ038_Handler
.long IRQ039_Handler
.long IRQ040_Handler
.long IRQ041_Handler
.long IRQ042_Handler
.long IRQ043_Handler
.long IRQ044_Handler
.long IRQ045_Handler
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IRQ046_Handler
.long IRQ047_Handler
.long IRQ048_Handler

2
Ubiquitous/XiZi_IIoT/board/edu-riscv64/board.c
View File

@ -91,7 +91,7 @@ int MountUsb(void) {
}
#endif
#if defined(FS_VFS) && defined(MOUNT_SDCARD)
#if defined(MOUNT_SDCARD)
#include <iot-vfs.h>
#include <sd_spi.h>
extern SpiSdDeviceType SpiSdInit(struct Bus *bus, const char *dev_name,

4
Ubiquitous/XiZi_IIoT/board/edu-riscv64/third_party_driver/Kconfig
View File

@ -17,11 +17,11 @@ menuconfig BSP_USING_SPI
endif
menuconfig BSP_USING_SOFT_SPI
bool "Using SOFT_SPI device"
bool "Using TFcard device"
default n
select BSP_USING_SPI
select MOUNT_SDCARD
select FS_VFS
select RESOURCES_SPI_SD
if BSP_USING_SOFT_SPI
source "$BSP_DIR/third_party_driver/soft_spi/Kconfig"
endif

72
Ubiquitous/XiZi_IIoT/board/edu-riscv64/third_party_driver/ethernet/connect_w5500.c
View File

@ -6,6 +6,7 @@
#include <drv_io_config.h>
#include <fpioa.h>
#include <string.h>
#include <stdlib.h>
#include <xs_base.h>
#include "gpio_common.h"
@ -305,34 +306,50 @@ uint32_t wiz_client_op(uint8_t sn, uint8_t *buf, uint32_t buf_size,
}
}
void wiz_client_op_test(char *addr, uint16_t port, char *msg) {
/* argv[1]: ip
* argv[2]: port
* argv[3]: msg
void wiz_client_op_test(int argc, char *argv[]) {
/* argv[1]: ip ip addr
* argv[2]: port port number
* argv[3]: msg send msg
* argv[4]: count test times,if no this parameter,default 10 times
*/
uint8_t client_sock = 2;
uint8_t ip[4] = {192, 168, 31, 127};
uint32_t tmp_ip[4];
KPrintf("wiz client to %s", addr);
sscanf(addr, "%d.%d.%d.%d", &tmp_ip[0], &tmp_ip[1], &tmp_ip[2], &tmp_ip[3]);
for (int i = 0; i < 4; ++i) {
ip[i] = (uint8_t)tmp_ip[i];
if (argc < 4)
{
KPrintf("wiz_client_op_test error\n");
return;
}
uint8_t client_sock = 2;
uint32_t tmp_ip[4];
uint8_t ip[4];
uint64_t pCount = 10;
uint8_t buf[g_wiznet_buf_size];
KPrintf("wiz_server, send to %d.%d.%d.%d %d\n", // tip info
uint16_t port;
sscanf(argv[1], "%d.%d.%d.%d", &tmp_ip[0], &tmp_ip[1], &tmp_ip[2], &tmp_ip[3]);
ip[0] = (uint8_t)tmp_ip[0];
ip[1] = (uint8_t)tmp_ip[1];
ip[2] = (uint8_t)tmp_ip[2];
ip[3] = (uint8_t)tmp_ip[3];
port = atoi(argv[2]);
KPrintf("wiz client to wiz_server, send to %d.%d.%d.%d %d\n", // tip info
ip[0], ip[1], ip[2], ip[3], port);
sscanf(msg, "%s", buf);
wiz_client_op(client_sock, buf, g_wiznet_buf_size, ip, port, SEND_DATA);
MdelayKTask(10);
memset(buf, 0, g_wiznet_buf_size);
// waiting for a responding.
wiz_client_op(client_sock, buf, g_wiznet_buf_size, ip, port, RECV_DATA);
KPrintf("received msg: %s\n", buf);
if (argc >= 5){
pCount = atoi(argv[4]);
}
for(uint64_t i = 0; i < pCount; i++)
{
wiz_client_op(client_sock, argv[3], strlen(argv[3]), ip, port, SEND_DATA);
MdelayKTask(10);
// waiting for a responding.
wiz_client_op(client_sock, buf, g_wiznet_buf_size, ip, port, RECV_DATA);
KPrintf("received msg: %s\n", buf);
memset(buf, 0, g_wiznet_buf_size);
}
}
SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0) | SHELL_CMD_TYPE(SHELL_TYPE_CMD_FUNC) |
SHELL_CMD_PARAM_NUM(3),
wiz_client_op, wiz_client_op_test,
SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0) | SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN),
wiz_client_op, wiz_client_op_test,
wiz_sock_recv or wiz_sock_send data as tcp client);
int32_t wiz_server_op(uint8_t sn, uint8_t *buf, uint32_t buf_size,
@ -387,11 +404,20 @@ void wiz_server(void *param) {
uint8_t buf[g_wiznet_buf_size];
memset(buf, 0, g_wiznet_buf_size);
int ret = 0;
uint32_t size = 0;
while (1) {
ret = wiz_server_op(0, buf, g_wiznet_buf_size, port, RECV_DATA);
while(buf[size] != 0){
size ++;
}
if (ret > 0) {
KPrintf("received %d bytes: %s\n", size, buf);
wiz_server_op(0, buf, g_wiznet_buf_size, port, SEND_DATA);
};
memset(buf, 0, g_wiznet_buf_size);
}
size = 0;
}
}

8
Ubiquitous/XiZi_IIoT/board/edu-riscv64/third_party_driver/ethernet/wiz_ping.c
View File

@ -3,6 +3,7 @@
#include <shell.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <xs_base.h>
#include <xs_ktask.h>
@ -235,6 +236,8 @@ uint8_t ping_reply(uint8_t sn, uint8_t *addr, uint16_t rlen) {
void wiz_ping_test(int argc, char *argv[]) {
uint32_t tmp_ip[4];
uint8_t target_ip[4];
uint16_t pCount = 5; //默认ping 5次
if (argc >= 2) {
KPrintf("This is a Ping test: %s\n", argv[1]);
sscanf(argv[1], "%d.%d.%d.%d", &tmp_ip[0], &tmp_ip[1], &tmp_ip[2],
@ -243,7 +246,10 @@ void wiz_ping_test(int argc, char *argv[]) {
target_ip[1] = (uint8_t)tmp_ip[1];
target_ip[2] = (uint8_t)tmp_ip[2];
target_ip[3] = (uint8_t)tmp_ip[3];
ping_count(ping_socket, 5, target_ip);
if (argc >= 3){
pCount = atoi(argv[2]); //如果ip后面跟具体的数字,代表ping的次数
}
ping_count(ping_socket, pCount, target_ip);
}
}
SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0) | SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN),

42
Ubiquitous/XiZi_IIoT/board/hc32f4a0/board.c
View File

@ -38,6 +38,14 @@ Modification:
#include <connect_gpio.h>
#endif
#ifdef BSP_USING_ADC
#include <connect_adc.h>
#endif
#ifdef BSP_USING_DAC
#include <connect_dac.h>
#endif
#ifdef BSP_USING_SDIO
#include <connect_sdio.h>
#endif
@ -54,6 +62,22 @@ Modification:
#include <connect_usb.h>
#endif
#ifdef BSP_USING_RTC
#include <connect_rtc.h>
#endif
#ifdef BSP_USING_WDT
#include <connect_wdt.h>
#endif
#ifdef BSP_USING_TIMER
#include <connect_hwtimer.h>
#endif
#ifdef BSP_USING_CAN
#include <connect_can.h>
#endif
extern void entry(void);
extern int HwUsartInit();
@ -165,8 +189,26 @@ struct InitSequenceDesc _board_init[] =
#ifdef BSP_USING_I2C
{ "i2c", HwI2cInit },
#endif
#ifdef BSP_USING_ADC
{"hw adc init", HwAdcInit},
#endif
#ifdef BSP_USING_DAC
{"hw dac init", HwDacInit},
#endif
#ifdef BSP_USING_USB
{ "usb", HwUsbHostInit },
#endif
#ifdef BSP_USING_RTC
{ "rtc", HwRtcInit },
#endif
#ifdef BSP_USING_WDT
{ "wdt", HwWdtInit },
#endif
#ifdef BSP_USING_TIMER
{ "tmr", HwTimerInit },
#endif
#ifdef BSP_USING_CAN
{ "can", HwCanInit },
#endif
{ " NONE ", NONE },
};

7
Ubiquitous/XiZi_IIoT/board/hc32f4a0/link.lds
View File

@ -87,6 +87,13 @@ SECTIONS
_shell_command_end = .;
. = ALIGN(4);
PROVIDE(__ctors_start__ = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
PROVIDE(__ctors_end__ = .);
. = ALIGN(4);
__isrtbl_idx_start = .;
KEEP(*(.isrtbl.idx))
__isrtbl_start = .;

49
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/Kconfig
View File

@ -6,6 +6,23 @@ menuconfig BSP_USING_UART
source "$BSP_DIR/third_party_driver/usart/Kconfig"
endif
menuconfig BSP_USING_ADC
bool "Using ADC device"
default n
select RESOURCES_ADC
if BSP_USING_ADC
source "$BSP_DIR/third_party_driver/adc/Kconfig"
endif
menuconfig BSP_USING_DAC
bool "Using DAC device"
default n
select RESOURCES_DAC
if BSP_USING_DAC
source "$BSP_DIR/third_party_driver/dac/Kconfig"
endif
menuconfig BSP_USING_GPIO
bool "Using GPIO device "
default y
@ -53,3 +70,35 @@ menuconfig BSP_USING_USB
if BSP_USING_USB
source "$BSP_DIR/third_party_driver/usb/Kconfig"
endif
menuconfig BSP_USING_RTC
bool "Using RTC device"
default n
select RESOURCES_RTC
if BSP_USING_RTC
source "$BSP_DIR/third_party_driver/rtc/Kconfig"
endif
menuconfig BSP_USING_WDT
bool "Using WDT device"
default n
select RESOURCES_WDT
if BSP_USING_WDT
source "$BSP_DIR/third_party_driver/watchdog/Kconfig"
endif
menuconfig BSP_USING_TIMER
bool "Using TIMER device"
default n
select RESOURCES_TIMER
if BSP_USING_TIMER
source "$BSP_DIR/third_party_driver/timer/Kconfig"
endif
menuconfig BSP_USING_CAN
bool "Using CAN device"
default n
select RESOURCES_CAN
if BSP_USING_CAN
source "$BSP_DIR/third_party_driver/can/Kconfig"
endif

24
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/Makefile
View File

@ -4,6 +4,14 @@ ifeq ($(CONFIG_BSP_USING_UART),y)
SRC_DIR += usart
endif
ifeq ($(CONFIG_BSP_USING_ADC),y)
SRC_DIR += adc
endif
ifeq ($(CONFIG_BSP_USING_DAC),y)
SRC_DIR += dac
endif
ifeq ($(CONFIG_BSP_USING_GPIO),y)
SRC_DIR += gpio
endif
@ -28,4 +36,20 @@ ifeq ($(CONFIG_BSP_USING_USB),y)
SRC_DIR += usb
endif
ifeq ($(CONFIG_BSP_USING_RTC),y)
SRC_DIR += rtc
endif
ifeq ($(CONFIG_BSP_USING_WDT),y)
SRC_DIR += watchdog
endif
ifeq ($(CONFIG_BSP_USING_TIMER),y)
SRC_DIR += timer
endif
ifeq ($(CONFIG_BSP_USING_CAN),y)
SRC_DIR += can
endif
include $(KERNEL_ROOT)/compiler.mk

74
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/adc/Kconfig Normal file
View File

@ -0,0 +1,74 @@
menuconfig BSP_USING_ADC1
bool "Enable ADC1"
default y
if BSP_USING_ADC1
config ADC1_BUS_NAME
string "adc 1 bus name"
default "adc1"
config ADC1_DRIVER_NAME
string "adc 1 driver name"
default "adc1_drv"
config ADC1_DEVICE_NAME
string "adc 1 bus device name"
default "adc1_dev"
config ADC1_GPIO_NUM
int "adc 1 gpio pin num"
default "0"
config ADC1_GPIO_DEF
string "adc 1 gpio define type"
default "A"
endif
menuconfig BSP_USING_ADC2
bool "Enable ADC2"
default y
if BSP_USING_ADC2
config ADC2_BUS_NAME
string "adc 2 bus name"
default "adc2"
config ADC2_DRIVER_NAME
string "adc 2 driver name"
default "adc2_drv"
config ADC2_DEVICE_NAME
string "adc 2 bus device name"
default "adc2_dev"
config ADC2_GPIO_NUM
int "adc 2 gpio pin num"
default "6"
config ADC2_GPIO_DEF
string "adc 2 gpio define type"
default "A"
endif
menuconfig BSP_USING_ADC3
bool "Enable ADC3"
default y
if BSP_USING_ADC3
config ADC3_BUS_NAME
string "adc 3 bus name"
default "adc3"
config ADC3_DRIVER_NAME
string "adc 3 driver name"
default "adc3_drv"
config ADC3_DEVICE_NAME
string "adc 3 bus device name"
default "adc3_dev"
config ADC3_GPIO_NUM
int "adc 3 gpio pin num"
default "0"
config ADC3_GPIO_DEF
string "adc 3 gpio define type"
default "A"
endif

3
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/adc/Makefile Normal file
View File

@ -0,0 +1,3 @@
SRC_FILES := connect_adc.c
include $(KERNEL_ROOT)/compiler.mk

289
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/adc/connect_adc.c Normal file
View File

@ -0,0 +1,289 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file connect_adc.c
* @brief support to register ADC pointer and function
* @version 1.1
* @author AIIT XUOS Lab
* @date 2023-02-09
*/
#include <connect_adc.h>
#define _ADC_CONS(string1, string2) string1##string2
#define ADC_CONS(string1, string2) _ADC_CONS(string1, string2)
#ifdef BSP_USING_ADC1
#define ADC1_GPIO ADC_CONS(GPIO_Pin_, ADC1_GPIO_NUM)
#endif
#ifdef BSP_USING_ADC2
#define ADC2_GPIO ADC_CONS(GPIO_Pin_, ADC2_GPIO_NUM)
#endif
#ifdef BSP_USING_ADC3
#define ADC3_GPIO ADC_CONS(GPIO_Pin_, ADC3_GPIO_NUM)
#endif
static int AdcUdelay(uint32 us)
{
uint32 ticks;
uint32 told, tnow, tcnt = 0;
uint32 reload = SysTick->LOAD;
ticks = us * reload / (1000000 / TICK_PER_SECOND);
told = SysTick->VAL;
while (1) {
tnow = SysTick->VAL;
if (tnow != told) {
if (tnow < told) {
tcnt += told - tnow;
} else {
tcnt += reload - tnow + told;
}
told = tnow;
if (tcnt >= ticks) {
return 0;
break;
}
}
}
}
static uint16 GetAdcAverageValue(CM_ADC_TypeDef *ADCx, uint8 channel, uint8 times)
{
uint32 temp_val = 0;
int i;
for(i = 0;i < times;i ++) {
temp_val += ADC_GetValue(ADCx, channel) & 0x0FFF;
KPrintf("GetAdcAverageValue val %u\n", ADC_GetValue(ADCx, channel));
AdcUdelay(5000);
}
return temp_val / times;
}
static uint32 AdcOpen(void *dev)
{
x_err_t ret = EOK;
stc_adc_init_t stcAdcInit;
ADC_StructInit(&stcAdcInit);
struct AdcHardwareDevice* adc_dev = (struct AdcHardwareDevice*)dev;
CM_ADC_TypeDef *ADCx= (CM_ADC_TypeDef *)adc_dev->private_data;
ADC_Init((ADCx),&stcAdcInit);
return ret;
}
static uint32 AdcClose(void *dev)
{
// CM_ADC_TypeDef *adc_dev = (CM_ADC_TypeDef*)dev;
struct AdcHardwareDevice* adc_dev = (struct AdcHardwareDevice*)dev;
CM_ADC_TypeDef *ADCx= (CM_ADC_TypeDef *)adc_dev->private_data;
ADC_DeInit(ADCx);
return EOK;
}
static uint32 AdcRead(void *dev, struct BusBlockReadParam *read_param)
{
struct AdcHardwareDevice *adc_dev = (struct AdcHardwareDevice *)dev;
struct HwAdc *adc_cfg = (struct HwAdc *)adc_dev->haldev.private_data;
uint16 adc_average_value = 0;
uint8 times = 20;
adc_average_value = GetAdcAverageValue(adc_cfg->ADCx, adc_cfg->adc_channel, times);
*(uint16 *)read_param->buffer = adc_average_value;
read_param->read_length = 2;
return read_param->read_length;
}
static uint32 AdcDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
{
NULL_PARAM_CHECK(drv);
NULL_PARAM_CHECK(configure_info);
x_err_t ret = EOK;
uint8 adc_channel;
struct AdcDriver *adc_drv = (struct AdcDriver *)drv;
struct AdcHardwareDevice *adc_dev = (struct AdcHardwareDevice *)adc_drv->driver.owner_bus->owner_haldev;
struct HwAdc *adc_cfg = (struct HwAdc *)adc_dev->haldev.private_data;
switch (configure_info->configure_cmd)
{
case OPE_CFG:
adc_cfg->adc_channel = *(uint8 *)configure_info->private_data;
if (adc_cfg->adc_channel > 18) {
KPrintf("AdcDrvConfigure set adc channel(0-18) %u error!", adc_cfg->adc_channel);
adc_cfg->adc_channel = 0;
ret = ERROR;
}
break;
default:
break;
}
return ret;
}
static const struct AdcDevDone dev_done =
{
AdcOpen,
AdcClose,
NONE,
AdcRead,
};
int HwAdcInit(void)
{
x_err_t ret = EOK;
#ifdef BSP_USING_ADC1
static struct AdcBus adc1_bus;
static struct AdcDriver adc1_drv;
static struct AdcHardwareDevice adc1_dev;
static struct HwAdc adc1_cfg;
adc1_drv.configure = AdcDrvConfigure;
ret = AdcBusInit(&adc1_bus, ADC1_BUS_NAME);
if (ret != EOK) {
KPrintf("ADC1 bus init error %d\n", ret);
return ERROR;
}
ret = AdcDriverInit(&adc1_drv, ADC1_DRIVER_NAME);
if (ret != EOK) {
KPrintf("ADC1 driver init error %d\n", ret);
return ERROR;
}
ret = AdcDriverAttachToBus(ADC1_DRIVER_NAME, ADC1_BUS_NAME);
if (ret != EOK) {
KPrintf("ADC1 driver attach error %d\n", ret);
return ERROR;
}
adc1_dev.adc_dev_done = &dev_done;
adc1_cfg.ADCx = CM_ADC1;
adc1_cfg.adc_channel = 0;
ret = AdcDeviceRegister(&adc1_dev, (void *)&adc1_cfg, ADC1_DEVICE_NAME);
if (ret != EOK) {
KPrintf("ADC1 device register error %d\n", ret);
return ERROR;
}
ret = AdcDeviceAttachToBus(ADC1_DEVICE_NAME, ADC1_BUS_NAME);
if (ret != EOK) {
KPrintf("ADC1 device register error %d\n", ret);
return ERROR;
}
#endif
#ifdef BSP_USING_ADC2
static struct AdcBus adc2_bus;
static struct AdcDriver adc2_drv;
static struct AdcHardwareDevice adc2_dev;
static struct HwAdc adc2_cfg;
adc2_drv.configure = AdcDrvConfigure;
ret = AdcBusInit(&adc2_bus, ADC2_BUS_NAME);
if (ret != EOK) {
KPrintf("ADC2 bus init error %d\n", ret);
return ERROR;
}
ret = AdcDriverInit(&adc2_drv, ADC2_DRIVER_NAME);
if (ret != EOK) {
KPrintf("ADC2 driver init error %d\n", ret);
return ERROR;
}
ret = AdcDriverAttachToBus(ADC2_DRIVER_NAME, ADC2_BUS_NAME);
if (ret != EOK) {
KPrintf("ADC2 driver attach error %d\n", ret);
return ERROR;
}
adc2_dev.adc_dev_done = &dev_done;
adc2_cfg.ADCx = CM_ADC2;
adc2_cfg.adc_channel = 0;
ret = AdcDeviceRegister(&adc2_dev, (void *)&adc2_cfg, ADC2_DEVICE_NAME);
if (ret != EOK) {
KPrintf("ADC2 device register error %d\n", ret);
return ERROR;
}
ret = AdcDeviceAttachToBus(ADC2_DEVICE_NAME, ADC2_BUS_NAME);
if (ret != EOK) {
KPrintf("ADC2 device register error %d\n", ret);
return ERROR;
}
#endif
#ifdef BSP_USING_ADC3
static struct AdcBus adc3_bus;
static struct AdcDriver adc3_drv;
static struct AdcHardwareDevice adc3_dev;
static struct HwAdc adc3_cfg;
adc3_drv.configure = AdcDrvConfigure;
ret = AdcBusInit(&adc3_bus, ADC3_BUS_NAME);
if (ret != EOK) {
KPrintf("ADC3 bus init error %d\n", ret);
return ERROR;
}
ret = AdcDriverInit(&adc3_drv, ADC3_DRIVER_NAME);
if (ret != EOK) {
KPrintf("ADC3 driver init error %d\n", ret);
return ERROR;
}
ret = AdcDriverAttachToBus(ADC3_DRIVER_NAME, ADC3_BUS_NAME);
if (ret != EOK) {
KPrintf("ADC3 driver attach error %d\n", ret);
return ERROR;
}
adc3_dev.adc_dev_done = &dev_done;
adc3_cfg.ADCx = CM_ADC3;
adc3_cfg.adc_channel = 0;
ret = AdcDeviceRegister(&adc3_dev, (void *)&adc3_cfg, ADC3_DEVICE_NAME);
if (ret != EOK) {
KPrintf("ADC3 device register error %d\n", ret);
return ERROR;
}
ret = AdcDeviceAttachToBus(ADC3_DEVICE_NAME, ADC3_BUS_NAME);
if (ret != EOK) {
KPrintf("ADC3 device register error %d\n", ret);
return ERROR;
}
#endif
return ret;
}

15
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/can/Kconfig Normal file
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@ -0,0 +1,15 @@
config CAN_BUS_NAME_2
string "can bus name"
default "can2"
config CAN_DRIVER_NAME_2
string "can driver name"
default "can2_drv"
config CAN_2_DEVICE_NAME_1
string "can bus 1 device 1 name"
default "can2_dev1"
config CAN_USING_INTERRUPT
bool "can interrupt open"
default n

4
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/can/Makefile Normal file
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@ -0,0 +1,4 @@
SRC_FILES := connect_can.c
include $(KERNEL_ROOT)/compiler.mk

297
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/can/connect_can.c Normal file
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@ -0,0 +1,297 @@
/*
* Copyright (c) Guangzhou Xingyi Electronic Technology Co., Ltd
*
* Change Logs:
* Date Author Notes
* 2014-7-4 alientek first version
*/
/**
* @file connect_can.c
* @brief support hc32f4a0 can function and register to bus framework
* @version 1.0
* @author AIIT XUOS Lab
* @date 2023-02-20
*/
/*************************************************
File name: connect_can.c
Description: support can configure and spi bus register function for hc32f4a0
Others: connect_can.c for references
*************************************************/
#include "connect_can.h"
#define CAN_X (CM_CAN2)
#define CAN_TX_PORT (GPIO_PORT_D)
#define CAN_TX_PIN (GPIO_PIN_07)
#define CAN_RX_PORT (GPIO_PORT_D)
#define CAN_RX_PIN (GPIO_PIN_06)
#define CAN_TX_PIN_FUNC (GPIO_FUNC_62)
#define CAN_RX_PIN_FUNC (GPIO_FUNC_63)
#define INTSEL_REG ((uint32_t)(&CM_INTC->SEL0))
#define CANX_IRQ_SRC INT_SRC_CAN2_HOST
#define CANX_IRQ_NUM 17
#define IRQ_NUM_OFFSET 16
#define CAN_AF1_ID (0x123UL)
#define CAN_AF1_ID_MSK (0xFFFUL)
#define CAN_AF1_MSK_TYPE CAN_ID_STD
#define CAN_AF2_ID (0x005UL)
#define CAN_AF2_ID_MSK (0x00FUL)
#define CAN_AF2_MSK_TYPE CAN_ID_STD
#define CAN_AF3_ID (0x23UL)
#define CAN_AF3_ID_MSK (0xFFUL)
#define CAN_AF3_MSK_TYPE CAN_ID_STD
#ifdef CAN_USING_INTERRUPT
void CanIrqHandler(int vector, void *param)
{
stc_can_error_info_t err_info;
uint32_t status = CAN_GetStatusValue(CAN_X);
uint32_t error = CAN_GetErrorInfo(CAN_X,&err_info);
KPrintf("Irq entered\n");
CAN_ClearStatus(CAN_X, status);
}
static void CanIrqConfig(void)
{
// register IRQ src in IRQn
__IO uint32_t *INTC_SELx = (__IO uint32_t *)(INTSEL_REG+ 4U * (uint32_t)(CANX_IRQ_NUM));
WRITE_REG32(*INTC_SELx, CANX_IRQ_SRC);
isrManager.done->registerIrq(CANX_IRQ_NUM+IRQ_NUM_OFFSET,CanIrqHandler,NULL);
isrManager.done->enableIrq(CANX_IRQ_NUM);
}
#endif
static void CanInit(struct CanDriverConfigure *can_drv_config)
{
stc_can_init_t stcInit;
stc_can_filter_config_t astcAFCfg[] = { \
{CAN_AF1_ID, CAN_AF1_ID_MSK, CAN_AF1_MSK_TYPE}, \
{CAN_AF2_ID, CAN_AF2_ID_MSK, CAN_AF2_MSK_TYPE}, \
{CAN_AF3_ID, CAN_AF3_ID_MSK, CAN_AF3_MSK_TYPE}, \
};
CLK_SetCANClockSrc(CLK_CAN2,CLK_CANCLK_SYSCLK_DIV4);
/* Set the function of CAN pins. */
GPIO_SetFunc(CAN_TX_PORT, CAN_TX_PIN, CAN_TX_PIN_FUNC);
GPIO_SetFunc(CAN_RX_PORT, CAN_RX_PIN, CAN_RX_PIN_FUNC);
/* Initializes CAN. */
(void)CAN_StructInit(&stcInit);
stcInit.pstcFilter = astcAFCfg;
stcInit.u16FilterSelect = (CAN_FILTER1 | CAN_FILTER2 | CAN_FILTER3);
// Driver's config
stcInit.stcBitCfg.u32SJW = can_drv_config->tsjw;
stcInit.stcBitCfg.u32Prescaler = can_drv_config->brp;
stcInit.stcBitCfg.u32TimeSeg1 = can_drv_config->tbs1;
stcInit.stcBitCfg.u32TimeSeg2 = can_drv_config->tbs2;
stcInit.u8WorkMode = can_drv_config->mode;
#ifdef CAN_USING_FD
stcInit.stcFDCfg.u8TDCSSP = 16U;
stcInit.stcFDCfg.u8CANFDMode = CAN_FD_MODE_ISO_11898;
stcInit.stcFDCfg.stcFBT.u32SEG1 = 16U;
stcInit.stcFDCfg.stcFBT.u32SEG2 = 4U;
stcInit.stcFDCfg.stcFBT.u32SJW = 4U;
stcInit.stcFDCfg.stcFBT.u32Prescaler = 1U;
(void)CAN_FD_Init(APP_CAN_UNIT, &stcInit);
#else
FCG_Fcg1PeriphClockCmd(PWC_FCG1_CAN2, ENABLE);
(void)CAN_Init(CAN_X, &stcInit);
#endif
CAN_ClearStatus(CAN_X, 0xFFFFFFFFU);
#ifdef CAN_USING_INTERRUPT
/* Configures the interrupts if needed. */
CAN_IntCmd(CAN_X, CAN_INT_RX, ENABLE);
CanIrqConfig();
#endif
}
static uint32 CanConfig(void *can_drv_config)
{
x_err_t ret = EOK;
return ret;
}
static uint32 CanDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
{
x_err_t ret = EOK;
NULL_PARAM_CHECK(drv);
NULL_PARAM_CHECK(configure_info);
struct CanDriverConfigure *can_drv_config;
switch (configure_info->configure_cmd)
{
case OPE_INT: // can basic init
can_drv_config = (struct CanDriverConfigure *)configure_info->private_data;
CanInit(can_drv_config);
break;
case OPE_CFG:
CanConfig(configure_info->private_data);
break;
default:
break;
}
return ret;
}
static uint32 CanWriteData(void * dev , struct BusBlockWriteParam *write_param)
{
x_err_t ret=EOK;
NULL_PARAM_CHECK(dev);
NULL_PARAM_CHECK(write_param);
struct CanSendConfigure *p_can_config = (struct CanSendConfigure*)write_param->buffer;
stc_can_tx_frame_t can_frame_obj;
memset(&can_frame_obj,0,sizeof(stc_can_tx_frame_t));
// configure CAN's flag bit
can_frame_obj.IDE = p_can_config->ide;
if(1==p_can_config->ide){
can_frame_obj.u32ID = p_can_config->exdid;
}else{
can_frame_obj.u32ID = p_can_config->stdid;
}
can_frame_obj.RTR = p_can_config->rtr;
memcpy(can_frame_obj.au8Data,p_can_config->data,p_can_config->data_lenth);
can_frame_obj.DLC = p_can_config->data_lenth;
//put frame_buffer in message queue
if(can_frame_obj.DLC){
ret = CAN_FillTxFrame(CAN_X,CAN_TX_BUF_STB,&can_frame_obj);
if(EOK != ret){
KPrintf("CAN fill tx frame failed(CODE:%d)!\n",ret);
return ERROR;
}
CAN_StartTx(CAN_X,CAN_TX_REQ_STB_ONE);
}
return ret;
}
static uint32 CanReadData(void *dev , struct BusBlockReadParam *databuf)
{
NULL_PARAM_CHECK(dev);
NULL_PARAM_CHECK(databuf);
x_err_t ret=EOK;
stc_can_rx_frame_t frame_received;
struct CanSendConfigure *p_can_config = (struct CanSendConfigure*)databuf->buffer;
memset(&frame_received,0,sizeof(stc_can_rx_frame_t));
ret = CAN_GetRxFrame(CAN_X, &frame_received);
if(EOK != ret){
// KPrintf("CAN recv frame failed(CODE:%d)!\n",ret);
p_can_config->data_lenth = 0;
return ERROR;
}
//put message in frame_buffer
p_can_config->ide = frame_received.IDE;
p_can_config->rtr = frame_received.RTR;
if(p_can_config->ide==1){
p_can_config->exdid = frame_received.u32ID ;
}else{
p_can_config->stdid = frame_received.u32ID;
p_can_config->exdid = frame_received.u32ID ;
}
p_can_config->data_lenth = frame_received.DLC;
for(int i=0;i<p_can_config->data_lenth;i++){
p_can_config->data[i] = frame_received.au8Data[i];
}
return frame_received.DLC;
}
static struct CanDevDone can_dev_done =
{
.open = NONE,
.close = NONE,
.write = CanWriteData,
.read = CanReadData
};
static int BoardCanBusInit(struct CanBus *can_bus, struct CanDriver *can_driver)
{
x_err_t ret = EOK;
/*Init the can bus */
ret = CanBusInit(can_bus, CAN_BUS_NAME_2);
if (EOK != ret) {
KPrintf("Board_can_init canBusInit error %d\n", ret);
return ERROR;
}
/*Init the can driver*/
ret = CanDriverInit(can_driver, CAN_DRIVER_NAME_2);
if (EOK != ret) {
KPrintf("Board_can_init canDriverInit error %d\n", ret);
return ERROR;
}
/*Attach the can driver to the can bus*/
ret = CanDriverAttachToBus(CAN_DRIVER_NAME_2, CAN_BUS_NAME_2);
if (EOK != ret) {
KPrintf("Board_can_init CanDriverAttachToBus error %d\n", ret);
return ERROR;
}
return ret;
}
/* Attach the can device to the can bus*/
static int BoardCanDevBend(void)
{
x_err_t ret = EOK;
static struct CanHardwareDevice can_device0;
memset(&can_device0, 0, sizeof(struct CanHardwareDevice));
can_device0.dev_done = &can_dev_done;
ret = CanDeviceRegister(&can_device0, NONE, CAN_2_DEVICE_NAME_1);
if (EOK != ret) {
KPrintf("board_can_init CanDeviceInit device %s error %d\n", CAN_2_DEVICE_NAME_1, ret);
return ERROR;
}
ret = CanDeviceAttachToBus(CAN_2_DEVICE_NAME_1, CAN_BUS_NAME_2);
if (EOK != ret) {
KPrintf("board_can_init CanDeviceAttachToBus device %s error %d\n", CAN_2_DEVICE_NAME_1, ret);
return ERROR;
}
return ret;
}
int HwCanInit(void)
{
x_err_t ret = EOK;
static struct CanBus can_bus;
memset(&can_bus, 0, sizeof(struct CanBus));
static struct CanDriver can_driver;
memset(&can_driver, 0, sizeof(struct CanDriver));
can_driver.configure = &(CanDrvConfigure);
ret = BoardCanBusInit(&can_bus, &can_driver);
if (EOK != ret) {
KPrintf(" can_bus_init %s error ret %u\n", CAN_BUS_NAME_2, ret);
return ERROR;
}
ret = BoardCanDevBend();
if (EOK != ret) {
KPrintf("board_can_init error ret %u\n", ret);
return ERROR;
}
return EOK;
}

24
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/common/hc32_ll_driver/src/Makefile
View File

@ -4,6 +4,14 @@ ifeq ($(CONFIG_BSP_USING_UART),y)
SRC_FILES += hc32_ll_usart.c
endif
ifeq ($(CONFIG_BSP_USING_ADC),y)
SRC_FILES += hc32_ll_adc.c
endif
ifeq ($(CONFIG_BSP_USING_DAC),y)
SRC_FILES += hc32_ll_dac.c
endif
ifeq ($(CONFIG_BSP_USING_SDIO),y)
SRC_FILES += hc32_ll_sdioc.c
endif
@ -12,6 +20,10 @@ ifeq ($(CONFIG_BSP_USING_SPI),y)
SRC_FILES += hc32_ll_spi.c
endif
ifeq ($(CONFIG_BSP_USING_QSPI_FLASH),y)
SRC_FILES += hc32_ll_qspi.c
endif
ifeq ($(CONFIG_BSP_USING_I2C),y)
SRC_FILES += hc32_ll_i2c.c
endif
@ -24,4 +36,16 @@ ifeq ($(CONFIG_BSP_USING_USB),y)
SRC_FILES += hc32_ll_usb.c
endif
ifeq ($(CONFIG_BSP_USING_RTC),y)
SRC_FILES += hc32_ll_rtc.c
endif
ifeq ($(CONFIG_BSP_USING_WDT),y)
SRC_FILES += hc32_ll_wdt.c
endif
ifeq ($(CONFIG_BSP_USING_CAN),y)
SRC_FILES += hc32_ll_can.c
endif
include $(KERNEL_ROOT)/compiler.mk

17
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/dac/Kconfig Normal file
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@ -0,0 +1,17 @@
if BSP_USING_DAC
config DAC_BUS_NAME
string "dac bus name"
default "dac"
config DAC_DRIVER_NAME
string "dac driver name"
default "dac_drv"
config DAC_DEVICE_NAME
string "dac bus device name"
default "dac_dev"
config DAC_GPIO_NUM
int "dac gpio pin num(only support 4 or 5)"
default "4"
endif

3
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/dac/Makefile Normal file
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@ -0,0 +1,3 @@
SRC_FILES := connect_dac.c
include $(KERNEL_ROOT)/compiler.mk

155
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/dac/connect_dac.c Normal file
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@ -0,0 +1,155 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file connect_dac.c
* @brief support to register DAC pointer and function
* @version 2.0
* @author AIIT XUOS Lab
* @date 2023-02-09
*/
#include <connect_dac.h>
#define _DAC_CONS(string1, string2) string1##string2
#define DAC_CONS(string1, string2) _DAC_CONS(string1, string2)
#ifdef BSP_USING_DAC
#define DAC_GPIO DAC_CONS(GPIO_Pin_, DAC_GPIO_NUM)
#endif
static uint32 DacOpen(void *dev)
{
struct DacHardwareDevice *dac_dev = (struct DacHardwareDevice *)dev;
CM_DAC_TypeDef *DACx = (CM_DAC_TypeDef *)dac_dev->private_data;
stc_dac_init_t pstcDacInit;
DAC_StructInit(&pstcDacInit);
DAC_Init(DACx,DAC_CH1,&pstcDacInit);
return EOK;
}
static uint32 DacClose(void *dev)
{
struct DacHardwareDevice *dac_dev = (struct DacHardwareDevice *)dev;
CM_DAC_TypeDef *DACx = (CM_DAC_TypeDef *)dac_dev->private_data;
DAC_DeInit(DACx);
return EOK;
}
static uint32 DacRead(void *dev, struct BusBlockReadParam *read_param)
{
struct DacHardwareDevice *dac_dev = (struct DacHardwareDevice *)dev;
CM_DAC_TypeDef *DACx = (CM_DAC_TypeDef *)dac_dev->private_data;
uint16 dac_set_value = 0;
dac_set_value = DAC_GetChConvertState(DACx,DAC_CH1);
*(uint16 *)read_param->buffer = dac_set_value;
read_param->read_length = 2;
return read_param->read_length;
return EOK;
}
static uint32 DacDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
{
NULL_PARAM_CHECK(drv);
NULL_PARAM_CHECK(configure_info);
x_err_t ret = EOK;
struct DacDriver *dac_drv = (struct DacDriver *)drv;
struct DacHardwareDevice *dac_dev = (struct DacHardwareDevice *)dac_drv->driver.owner_bus->owner_haldev;
struct HwDac *dac_cfg = (struct HwDac *)dac_dev->haldev.private_data;
switch (configure_info->configure_cmd)
{
case OPE_CFG:
dac_cfg->digital_data = *(uint16 *)configure_info->private_data;
// DAC_SetChannel1Data(DAC_Align_12b_R, dac_cfg->digital_data);//12 bits、R-Align data format, digital data
DAC_SetChData(dac_cfg->DACx,DAC_CH1,dac_cfg->digital_data);
break;
default:
break;
}
return ret;
}
static const struct DacDevDone dev_done =
{
DacOpen,
DacClose,
NONE,
DacRead,
};
int HwDacInit(void)
{
x_err_t ret = EOK;
#ifdef BSP_USING_DAC
static struct DacBus dac_bus;
static struct DacDriver dac_drv;
static struct DacHardwareDevice dac_dev;
static struct HwDac dac_cfg;
dac_drv.configure = DacDrvConfigure;
ret = DacBusInit(&dac_bus, DAC_BUS_NAME);
if (ret != EOK) {
KPrintf("DAC bus init error %d\n", ret);
return ERROR;
}
ret = DacDriverInit(&dac_drv, DAC_DRIVER_NAME);
if (ret != EOK) {
KPrintf("DAC driver init error %d\n", ret);
return ERROR;
}
ret = DacDriverAttachToBus(DAC_DRIVER_NAME, DAC_BUS_NAME);
if (ret != EOK) {
KPrintf("DAC driver attach error %d\n", ret);
return ERROR;
}
dac_dev.dac_dev_done = &dev_done;
dac_cfg.DACx = CM_DAC1;
dac_cfg.digital_data = 0;
ret = DacDeviceRegister(&dac_dev, (void *)&dac_cfg, DAC_DEVICE_NAME);
if (ret != EOK) {
KPrintf("DAC device register error %d\n", ret);
return ERROR;
}
ret = DacDeviceAttachToBus(DAC_DEVICE_NAME, DAC_BUS_NAME);
if (ret != EOK) {
KPrintf("DAC device register error %d\n", ret);
return ERROR;
}
#endif
return ret;
}

88
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/gpio/connect_gpio.c
View File

@ -33,9 +33,8 @@ Modification:
#include <connect_gpio.h>
#define GPIO_PIN_INDEX(pin) ((uint8_t)((pin) & 0x0F))
#define ITEM_NUM(items) sizeof(items) / sizeof(items[0])
#define IRQ_INT(callback)
#ifndef HC32_PIN_CONFIG
#define HC32_PIN_CONFIG(pin, callback, config) \
@ -48,6 +47,9 @@ Modification:
#define __HC32_PIN(index, gpio_port, gpio_pin) { 0, GPIO_PORT_##gpio_port, GPIO_PIN_##gpio_pin}
#define __HC32_PIN_DEFAULT {-1, 0, 0}
#define MAX_PIN_INDEX 15
#define INT_VECTOR_OFFSET 16
#define INTSEL_REG (uint32_t)(&CM_INTC->SEL0)
struct PinIndex
{
@ -294,6 +296,17 @@ struct PinIrqHdr pin_irq_hdr_tab[] =
{-1, 0, NONE, NONE}
};
static int GpioPinIndex(uint16_t pin){
int ret = 0;
for(;ret<=MAX_PIN_INDEX;ret++){ //ret must be 16-bit
if((0x0001U<<ret)&pin){
KPrintf("the int pin is %d\n",ret);
return ret;
}
};
return -1;
}
static void PinIrqHandler(uint16_t pinbit)
{
int32_t irqindex = -1;
@ -418,6 +431,7 @@ static int32 GpioConfigMode(int mode, const struct PinIndex* index)
break;
case GPIO_CFG_INPUT:
stcGpioInit.u16PinDir = PIN_DIR_IN;
stcGpioInit.u16ExtInt = PIN_EXTINT_ON;
break;
case GPIO_CFG_INPUT_PULLUP:
stcGpioInit.u16PinDir = PIN_DIR_IN;
@ -434,8 +448,7 @@ static int32 GpioConfigMode(int mode, const struct PinIndex* index)
default:
break;
}
GPIO_Init(index->pin, index->pin, &stcGpioInit);
GPIO_Init(index->port, index->pin, &stcGpioInit);
}
static int32 GpioIrqRegister(int32 pin, int32 mode, void (*hdr)(void *args), void *args)
@ -443,7 +456,9 @@ static int32 GpioIrqRegister(int32 pin, int32 mode, void (*hdr)(void *args), voi
const struct PinIndex *index = GetPin(pin);
int32 irqindex = -1;
irqindex = GPIO_PIN_INDEX(index->pin);
stc_extint_init_t stcExtIntInit;
irqindex = GpioPinIndex(index->pin); // start from 0
if (irqindex >= ITEM_NUM(pin_irq_map)) {
return -ENONESYS;
}
@ -465,8 +480,31 @@ static int32 GpioIrqRegister(int32 pin, int32 mode, void (*hdr)(void *args), voi
pin_irq_hdr_tab[irqindex].hdr = hdr;
pin_irq_hdr_tab[irqindex].mode = mode;
pin_irq_hdr_tab[irqindex].args = args;
/* Extint config */
EXTINT_StructInit(&stcExtIntInit);
switch (mode)
{
case GPIO_IRQ_EDGE_RISING:
stcExtIntInit.u32Edge = EXTINT_TRIG_RISING;
break;
case GPIO_IRQ_EDGE_FALLING:
stcExtIntInit.u32Edge = EXTINT_TRIG_FALLING;
break;
case GPIO_IRQ_EDGE_BOTH:
stcExtIntInit.u32Edge = EXTINT_TRIG_BOTH;
break;
case GPIO_IRQ_LEVEL_LOW:
stcExtIntInit.u32Edge = EXTINT_TRIG_LOW;
break;
}
EXTINT_Init(index->pin, &stcExtIntInit);
__IO uint32_t *INTC_SELx = (__IO uint32_t *)(INTSEL_REG + (4U * (uint32_t)(irqindex)));
WRITE_REG32(*INTC_SELx, irqindex);
isrManager.done->registerIrq(irqindex+INT_VECTOR_OFFSET, (void(*)(int vector,void *))hdr, args);
CriticalAreaUnLock(level);
return EOK;
}
@ -475,7 +513,7 @@ static uint32 GpioIrqFree(x_base pin)
const struct PinIndex* index = GetPin(pin);
int32 irqindex = -1;
irqindex = GPIO_PIN_INDEX(index->pin);
irqindex = GpioPinIndex(index->pin);
if (irqindex >= ITEM_NUM(pin_irq_map)) {
return -ENONESYS;
}
@ -485,6 +523,7 @@ static uint32 GpioIrqFree(x_base pin)
CriticalAreaUnLock(level);
return EOK;
}
isrManager.done->freeIrq(pin_irq_hdr_tab[irqindex].pin);
pin_irq_hdr_tab[irqindex].pin = -1;
pin_irq_hdr_tab[irqindex].hdr = NONE;
pin_irq_hdr_tab[irqindex].mode = 0;
@ -509,9 +548,8 @@ static int32 GpioIrqEnable(x_base pin)
struct Hc32PinIrqMap *irq_map;
const struct PinIndex* index = GetPin(pin);
int32 irqindex = -1;
stc_extint_init_t stcExtIntInit;
irqindex = GPIO_PIN_INDEX(index->pin);
irqindex = GpioPinIndex(index->pin);
if (irqindex >= ITEM_NUM(pin_irq_map)) {
return -ENONESYS;
}
@ -522,26 +560,8 @@ static int32 GpioIrqEnable(x_base pin)
return -ENONESYS;
}
/* Extint config */
EXTINT_StructInit(&stcExtIntInit);
switch (pin_irq_hdr_tab[irqindex].mode)
{
case GPIO_IRQ_EDGE_RISING:
stcExtIntInit.u32Edge = EXTINT_TRIG_RISING;
break;
case GPIO_IRQ_EDGE_FALLING:
stcExtIntInit.u32Edge = EXTINT_TRIG_FALLING;
break;
case GPIO_IRQ_EDGE_BOTH:
stcExtIntInit.u32Edge = EXTINT_TRIG_BOTH;
break;
case GPIO_IRQ_LEVEL_LOW:
stcExtIntInit.u32Edge = EXTINT_TRIG_LOW;
break;
}
EXTINT_Init(index->pin, &stcExtIntInit);
NVIC_EnableIRQ(irq_map->irq_config.irq_num);
GpioIrqConfig(index->pin, index->pin, PIN_EXTINT_ON);
GpioIrqConfig(index->port, index->pin, PIN_EXTINT_ON);
isrManager.done->enableIrq(GpioPinIndex(index->pin));
CriticalAreaUnLock(level);
return EOK;
@ -554,8 +574,8 @@ static int32 GpioIrqDisable(x_base pin)
x_base level = CriticalAreaLock();
GpioIrqConfig(index->pin, index->pin, PIN_EXTINT_OFF);
NVIC_DisableIRQ(irq_map->irq_config.irq_num);
GpioIrqConfig(index->port, index->pin, PIN_EXTINT_OFF);
isrManager.done->disableIrq(GpioPinIndex(index->pin));
CriticalAreaUnLock(level);
return EOK;
@ -637,9 +657,9 @@ uint32 Hc32PinWrite(void *dev, struct BusBlockWriteParam *write_param)
NULL_PARAM_CHECK(index);
if (GPIO_LOW == pinstat->val) {
GPIO_ResetPins(index->pin, index->pin);
GPIO_ResetPins(index->port, index->pin);
} else {
GPIO_SetPins(index->pin, index->pin);
GPIO_SetPins(index->port, index->pin);
}
return EOK;
@ -653,7 +673,7 @@ uint32 Hc32PinRead(void *dev, struct BusBlockReadParam *read_param)
const struct PinIndex* index = GetPin(pinstat->pin);
NULL_PARAM_CHECK(index);
if(GPIO_ReadInputPins(index->pin, index->pin) == PIN_RESET) {
if(GPIO_ReadInputPins(index->port, index->pin) == PIN_RESET) {
pinstat->val = GPIO_LOW;
} else {
pinstat->val = GPIO_HIGH;

42
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/include/connect_adc.h Normal file
View File

@ -0,0 +1,42 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file connect_uart.h
* @brief define hc32f4a0-board usart function and struct
* @version 2.0
* @author AIIT XUOS Lab
* @date 2023-02-09
*/
#include <device.h>
#include <hardware_irq.h>
#include <hc32_ll_adc.h>
#ifdef __cplusplus
extern "C" {
#endif
struct HwAdc
{
CM_ADC_TypeDef *ADCx;
uint8 adc_channel;
};
int HwAdcInit(void);
#ifdef __cplusplus
}
#endif

40
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/include/connect_can.h Normal file
View File

@ -0,0 +1,40 @@
/*
* Copyright (c) 2021 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file connect_can.h
* @brief define hc32f4a0-board can function and struct
* @version 2.0
* @author AIIT XUOS Lab
* @date 2023-02-21
*/
#ifndef CONNECT_CAN_H
#define CONNECT_CAN_H
#include <device.h>
#include <hc32_ll_can.h>
#include <hc32_ll_clk.h>
#include <hc32_ll_gpio.h>
#include <hardware_irq.h>
#ifdef __cplusplus
extern "C" {
#endif
int HwCanInit(void);
#ifdef __cplusplus
}
#endif
#endif

50
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/include/connect_dac.h Normal file
View File

@ -0,0 +1,50 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file connect_uart.h
* @brief define hc32f4a0-board usart function and struct
* @version 2.0
* @author AIIT XUOS Lab
* @date 2023-02-09
*/
#include <device.h>
#include <hardware_irq.h>
#include <hc32_ll_fcg.h>
#include <hc32_ll_dac.h>
#include <hc32_ll_gpio.h>
#ifdef __cplusplus
extern "C" {
#endif
struct HwDac
{
CM_DAC_TypeDef *DACx;
uint16 digital_data;
};
typedef struct {
CM_DAC_TypeDef *pUnit;
// en_dac_cvt_t enCvtType;
uint16_t u16Ch;
} stc_dac_handle_t;
int HwDacInit(void);
#ifdef __cplusplus
}
#endif

40
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/include/connect_flash.h Normal file
View File

@ -0,0 +1,40 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file connect_flash.h
* @brief define hc32f4a0-board qspi-flash function and struct
* @version 2.0
* @author AIIT XUOS Lab
* @date 2022-10-17
*/
#ifndef CONNECT_FLASH_H
#define CONNECT_FLASH_H
#include <device.h>
#include <hardware_irq.h>
#include <flash_spi.h>
#include <hc32_ll_qspi.h>
#include <hc32_ll_gpio.h>
#ifdef __cplusplus
extern "C" {
#endif
int FlashW25qxxSpiDeviceInit(void);
#ifdef __cplusplus
}
#endif
#endif

40
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/include/connect_hwtimer.h Normal file
View File

@ -0,0 +1,40 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file connect_hwtimer.h
* @brief define hc32f4a0-board hwtimer function and struct
* @version 2.0
* @author AIIT XUOS Lab
* @date 2023-02-16
*/
#ifndef CONNECT_HWTIMER_H
#define CONNECT_HWTIMER_H
#include <device.h>
#include <hc32f4a0.h>
#include <hardware_irq.h>
#include <hc32_ll_tmr0.h>
#include <hc32_ll_gpio.h>
#ifdef __cplusplus
extern "C" {
#endif
int HwTimerInit(void);
#ifdef __cplusplus
}
#endif
#endif

37
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/include/connect_rtc.h Normal file
View File

@ -0,0 +1,37 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file connect_rtc.h
* @brief define hc32f4a0-board rtc function and struct
* @version 3.0
* @author AIIT XUOS Lab
* @date 2023-02-02
*/
#ifndef CONNECT_I2C_H
#define CONNECT_I2C_H
#include <device.h>
#include <hc32_ll_rtc.h>
#ifdef __cplusplus
extern "C" {
#endif
int HwRtcInit(void);
#ifdef __cplusplus
}
#endif
#endif

37
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/include/connect_wdt.h Normal file
View File

@ -0,0 +1,37 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file connect_wdt.h
* @brief define hc32f4a0-board watchdog function and struct
* @version 3.0
* @author AIIT XUOS Lab
* @date 2023-02-02
*/
#ifndef CONNECT_I2C_H
#define CONNECT_I2C_H
#include <device.h>
#include <hc32_ll_wdt.h>
#ifdef __cplusplus
extern "C" {
#endif
int HwWdtInit(void);
#ifdef __cplusplus
}
#endif
#endif

11
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/rtc/Kconfig Normal file
View File

@ -0,0 +1,11 @@
if BSP_USING_RTC
config RTC_BUS_NAME
string "rtc bus name"
default "rtc"
config RTC_DRV_NAME
string "rtc bus driver name"
default "rtc_drv"
config RTC_DEVICE_NAME
string "rtc bus device name"
default "rtc_dev"
endif

2
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/rtc/Makefile Normal file
View File

@ -0,0 +1,2 @@
SRC_FILES := connect_rtc.c
include $(KERNEL_ROOT)/compiler.mk

185
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/rtc/connect_rtc.c Normal file
View File

@ -0,0 +1,185 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file connect_rtc.c
* @brief support aiit-hc32f4a0-board rtc function and register to bus framework
* @version 1.0
* @author AIIT XUOS Lab
* @date 2023-02-02
*/
#include <connect_rtc.h>
#include <stdint.h>
#include <stdlib.h>
#include <time.h>
static uint32 RtcConfigure(void *drv, struct BusConfigureInfo *configure_info)
{
NULL_PARAM_CHECK(drv);
struct RtcDriver *rtc_drv = (struct RtcDriver *)drv;
struct RtcDrvConfigureParam *drv_param = (struct RtcDrvConfigureParam *)configure_info->private_data;
int cmd = drv_param->rtc_operation_cmd;
time_t *time = drv_param->time;
switch (cmd)
{
case OPER_RTC_GET_TIME:
{
struct tm ct;
stc_rtc_date_t rtc_date;
stc_rtc_time_t rtc_time;
// rtc_timer_get(&year, &month, &day, &hour, &minute, &second);
RTC_GetDate(RTC_DATA_FMT_DEC, &rtc_date);
RTC_GetTime(RTC_DATA_FMT_DEC, &rtc_time);
ct.tm_year = rtc_date.u8Year ;
ct.tm_mon = rtc_date.u8Month ;
ct.tm_mday = rtc_date.u8Day;
ct.tm_wday = rtc_date.u8Weekday;
ct.tm_hour = rtc_time.u8Hour;
ct.tm_min = rtc_time.u8Minute;
ct.tm_sec = rtc_time.u8Second;
*time = mktime(&ct);
}
break;
case OPER_RTC_SET_TIME:
{
struct tm *ct;
stc_rtc_date_t rtc_date;
stc_rtc_time_t rtc_time;
x_base lock;
lock = CriticalAreaLock();
ct = localtime(time);
rtc_date.u8Year = ct->tm_year ;
rtc_date.u8Month = ct->tm_mon ;
rtc_date.u8Day = ct->tm_mday;
rtc_date.u8Weekday = ct->tm_wday;
rtc_time.u8Hour = ct->tm_hour;
rtc_time.u8Minute = ct->tm_min;
rtc_time.u8Second = ct->tm_sec;
CriticalAreaUnLock(lock);
RTC_SetDate(RTC_DATA_FMT_DEC, &rtc_date);
RTC_SetTime(RTC_DATA_FMT_DEC, &rtc_time);
}
break;
}
return EOK;
}
/*manage the rtc device operations*/
static const struct RtcDevDone dev_done =
{
.open = NONE,
.close = NONE,
.write = NONE,
.read = NONE,
};
static int BoardRtcBusInit(struct RtcBus *rtc_bus, struct RtcDriver *rtc_driver)
{
x_err_t ret = EOK;
/*Init the rtc bus */
ret = RtcBusInit(rtc_bus, RTC_BUS_NAME);
if (EOK != ret) {
KPrintf("HwRtcInit RtcBusInit error %d\n", ret);
return ERROR;
}
/*Init the rtc driver*/
ret = RtcDriverInit(rtc_driver, RTC_DRV_NAME);
if (EOK != ret) {
KPrintf("HwRtcInit RtcDriverInit error %d\n", ret);
return ERROR;
}
/*Attach the rtc driver to the rtc bus*/
ret = RtcDriverAttachToBus(RTC_DRV_NAME, RTC_BUS_NAME);
if (EOK != ret) {
KPrintf("HwRtcInit RtcDriverAttachToBus error %d\n", ret);
return ERROR;
}
return ret;
}
/*Attach the rtc device to the rtc bus*/
static int BoardRtcDevBend(void)
{
x_err_t ret = EOK;
static struct RtcHardwareDevice rtc_device;
memset(&rtc_device, 0, sizeof(struct RtcHardwareDevice));
rtc_device.dev_done = &(dev_done);
ret = RtcDeviceRegister(&rtc_device, NONE, RTC_DEVICE_NAME);
if (EOK != ret) {
KPrintf("HwRtcInit RtcDeviceInit device %s error %d\n", RTC_DEVICE_NAME, ret);
return ERROR;
}
ret = RtcDeviceAttachToBus(RTC_DEVICE_NAME, RTC_BUS_NAME);
if (EOK != ret) {
KPrintf("HwRtcInit RtcDeviceAttachToBus device %s error %d\n", RTC_DEVICE_NAME, ret);
return ERROR;
}
return ret;
}
int HwRtcInit(void)
{
x_err_t ret = EOK;
static struct RtcBus rtc_bus;
memset(&rtc_bus, 0, sizeof(struct RtcBus));
static struct RtcDriver rtc_driver;
memset(&rtc_driver, 0, sizeof(struct RtcDriver));
rtc_driver.configure = &(RtcConfigure);
ret = BoardRtcBusInit(&rtc_bus, &rtc_driver);
if (EOK != ret) {
KPrintf("HwRtcInit error ret %u\n", ret);
return ERROR;
}
ret = BoardRtcDevBend();
if (EOK != ret) {
KPrintf("HwRtcInit error ret %u\n", ret);
}
stc_rtc_init_t stcRtcInit;
/* Configure structure initialization */
(void)RTC_StructInit(&stcRtcInit);
/* Configuration RTC structure */
stcRtcInit.u8ClockSrc = RTC_CLK_SRC_XTAL32;
stcRtcInit.u8HourFormat= RTC_HOUR_FMT_24H;
stcRtcInit.u8IntPeriod = RTC_INT_PERIOD_PER_SEC;
(void)RTC_Init(&stcRtcInit);
RTC_Cmd(LL_RTC_ENABLE);
return ret;
}

19
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/spi/Kconfig
View File

@ -39,4 +39,23 @@ if BSP_USING_SPI
string "spi bus 6 driver name"
default "spi6_drv"
endif
config BSP_USING_QSPI_FLASH
bool "Using qspi and flash"
default n
if BSP_USING_QSPI_FLASH
config QSPI_BUS_NAME
string "qspi bus name"
default "qspi"
config QSPI_DEVICE_NAME_0
string "qspi bus device 0 name"
default "qspi_dev0"
config QSPI_DRV_NAME
string "qspi bus driver name"
default "qspi_drv"
config QSPI_FLASH_DEV_NAME
string "flash dev name"
default "qspi_W25Q128"
endif
endif

4
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/spi/Makefile
View File

@ -5,4 +5,8 @@ ifeq ($(CONFIG_RESOURCES_SPI_LORA),y)
SRC_FILES += connect_lora_spi.c
endif
ifeq ($(CONFIG_BSP_USING_QSPI_FLASH),y)
SRC_FILES += connect_flash.c
endif
include $(KERNEL_ROOT)/compiler.mk

260
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/spi/connect_flash.c Normal file
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@ -0,0 +1,260 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file connect_flash.c
* @brief support hc32f4a0-board qspi-flash function and register to bus framework
* @version 2.0
* @author AIIT XUOS Lab
* @date 2023-02-16
*/
#include <connect_flash.h>
#define QSPI_DEVICE_SLAVE_ID_0 (0)
#define QSPI_UNIT (CM_QSPI)
#define QSPI_CS_PORT (GPIO_PORT_C)
#define QSPI_SCK_PORT (GPIO_PORT_C)
#define QSPI_IO0_PORT (GPIO_PORT_D)
#define QSPI_IO1_PORT (GPIO_PORT_D)
#define QSPI_IO2_PORT (GPIO_PORT_D)
#define QSPI_IO3_PORT (GPIO_PORT_D)
#define QSPI_CS_PIN (GPIO_PIN_07)
#define QSPI_SCK_PIN (GPIO_PIN_06)
#define QSPI_IO0_PIN (GPIO_PIN_08)
#define QSPI_IO1_PIN (GPIO_PIN_09)
#define QSPI_IO2_PIN (GPIO_PIN_10)
#define QSPI_IO3_PIN (GPIO_PIN_11)
#define QSPI_PIN_FUNC (GPIO_FUNC_18)
static uint32 QSpiSdkInit(struct SpiDriver *spi_drv)
{
stc_qspi_init_t stcInit;
FCG_Fcg1PeriphClockCmd(PWC_FCG1_QSPI, ENABLE);
(void)QSPI_StructInit(&stcInit);
stcInit.u32ClockDiv = QSPI_CLK_DIV3;
stcInit.u32SpiMode = QSPI_SPI_MD0;
stcInit.u32ReadMode = QSPI_RD_MD_STD_RD;
stcInit.u32DummyCycle = QSPI_DUMMY_CYCLE8;
stcInit.u32AddrWidth = QSPI_ADDR_WIDTH_24BIT;
return QSPI_Init(&stcInit);
}
static void QspiPinConfig(void)
{
stc_gpio_init_t stcGpioInit;
(void)GPIO_StructInit(&stcGpioInit);
stcGpioInit.u16PinState = PIN_STAT_RST;
stcGpioInit.u16PinDir = PIN_DIR_OUT;
(void)GPIO_Init(QSPI_CS_PORT, QSPI_CS_PIN|QSPI_SCK_PIN, &stcGpioInit);
stcGpioInit.u16PinState = PIN_STAT_SET;
(void)GPIO_Init(QSPI_IO0_PORT, QSPI_IO1_PIN|QSPI_IO2_PIN|QSPI_IO3_PIN, &stcGpioInit);
stcGpioInit.u16PinDir = PIN_DIR_IN;
(void)GPIO_Init(QSPI_IO0_PORT, QSPI_IO0_PIN, &stcGpioInit);
GPIO_ResetPins(QSPI_CS_PORT, QSPI_CS_PIN);
GPIO_SetPins(QSPI_IO0_PORT, QSPI_IO2_PIN|QSPI_IO3_PIN);
GPIO_SetFunc(QSPI_CS_PORT, QSPI_CS_PIN, QSPI_PIN_FUNC);
GPIO_SetFunc(QSPI_SCK_PORT, QSPI_SCK_PIN, QSPI_PIN_FUNC);
GPIO_SetFunc(QSPI_IO0_PORT, QSPI_IO0_PIN, QSPI_PIN_FUNC);
GPIO_SetFunc(QSPI_IO1_PORT, QSPI_IO1_PIN, QSPI_PIN_FUNC);
GPIO_SetFunc(QSPI_IO2_PORT, QSPI_IO2_PIN, QSPI_PIN_FUNC);
GPIO_SetFunc(QSPI_IO3_PORT, QSPI_IO3_PIN, QSPI_PIN_FUNC);
}
static uint32 QSpiWriteData(struct SpiHardwareDevice *spi_dev, struct SpiDataStandard *spi_datacfg)
{
SpiDeviceParam *dev_param = (SpiDeviceParam *)(spi_dev->haldev.private_data);
uint8 cs_gpio_pin = dev_param->spi_slave_param->spi_cs_gpio_pin;
uint8 cs_gpio_port = dev_param->spi_slave_param->spi_cs_gpio_port;
CM_SPI_TypeDef *spi = spi_dev->haldev.owner_bus->private_data;
x_err_t ret = EOK;
if (spi_datacfg->spi_chip_select) {
// GPIO_ResetPins(cs_gpio_port, cs_gpio_pin);
QSPI_EnterDirectCommMode();
}
if(spi_datacfg->length > 0U && spi_datacfg->tx_buff!=NULL){
for(int i=0;i<spi_datacfg->length;i++){
QSPI_WriteDirectCommValue(spi_datacfg->tx_buff[i]);
}
}
if (spi_datacfg->spi_cs_release) {
// GPIO_SetPins(cs_gpio_port, cs_gpio_pin);
QSPI_ExitDirectCommMode();
}
return ret;
}
static uint32 QSpiReadData(struct SpiHardwareDevice *spi_dev, struct SpiDataStandard *spi_datacfg)
{
SpiDeviceParam *dev_param = (SpiDeviceParam *)(spi_dev->haldev.private_data);
uint8 cs_gpio_pin = dev_param->spi_slave_param->spi_cs_gpio_pin;
uint8 cs_gpio_port = dev_param->spi_slave_param->spi_cs_gpio_port;
CM_SPI_TypeDef *spi = spi_dev->haldev.owner_bus->private_data;
x_err_t ret = EOK;
uint8_t *read_buffer = spi_datacfg->rx_buff;
if (spi_datacfg->spi_chip_select) {
// GPIO_ResetPins(cs_gpio_port, cs_gpio_pin);
QSPI_EnterDirectCommMode();
}
if(spi_datacfg->length > 0U && spi_datacfg->rx_buff!=NULL){
for(int i=0;i<spi_datacfg->length;i++){
read_buffer[i] = (uint8_t)QSPI_ReadDirectCommValue();
}
}
if (spi_datacfg->spi_cs_release) {
// GPIO_SetPins(cs_gpio_port, cs_gpio_pin);
QSPI_ExitDirectCommMode();
}
return ret;
}
static uint32 QSpiDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
{
NULL_PARAM_CHECK(drv);
NULL_PARAM_CHECK(configure_info);
x_err_t ret = EOK;
struct SpiDriver *spi_drv = (struct SpiDriver *)drv;
struct SpiMasterParam *spi_param;
switch (configure_info->configure_cmd)
{
case OPE_INT:
QSpiSdkInit(spi_drv);
QspiPinConfig();
break;
case OPE_CFG:
spi_param = (struct SpiMasterParam *)configure_info->private_data;
break;
default:
break;
}
return ret;
}
/*manage the qspi device operations*/
static const struct SpiDevDone qspi_dev_done =
{
.dev_open = NONE,
.dev_close = NONE,
.dev_write = QSpiWriteData,
.dev_read = QSpiReadData,
};
static int BoardQSpiDevBend(void)
{
x_err_t ret = EOK;
static struct SpiHardwareDevice qspi_device0;
memset(&qspi_device0, 0, sizeof(struct SpiHardwareDevice));
static struct SpiSlaveParam qspi_slaveparam0;
memset(&qspi_slaveparam0, 0, sizeof(struct SpiSlaveParam));
qspi_slaveparam0.spi_slave_id = QSPI_DEVICE_SLAVE_ID_0;
qspi_slaveparam0.spi_cs_gpio_pin = QSPI_CS_PIN;
qspi_slaveparam0.spi_cs_gpio_port = QSPI_CS_PORT;
qspi_device0.spi_param.spi_slave_param = &qspi_slaveparam0;
qspi_device0.spi_dev_done = &(qspi_dev_done);
ret = SpiDeviceRegister(&qspi_device0, (void *)(&qspi_device0.spi_param), QSPI_DEVICE_NAME_0);
if (EOK != ret) {
KPrintf("BoardSpiDevBend SpiDeviceRegister device %s error %d\n", QSPI_DEVICE_NAME_0, ret);
return ERROR;
}
ret = SpiDeviceAttachToBus(QSPI_DEVICE_NAME_0, QSPI_BUS_NAME);
if (EOK != ret) {
KPrintf("BoardSpiDevBend SpiDeviceAttachToBus device %s error %d\n", QSPI_DEVICE_NAME_0, ret);
return ERROR;
}
return ret;
}
static int BoardSpiBusInit(struct SpiBus *spi_bus, struct SpiDriver *spi_driver, const char *bus_name, const char *drv_name)
{
x_err_t ret = EOK;
/*Init the spi bus */
ret = SpiBusInit(spi_bus, bus_name);
if (EOK != ret) {
KPrintf("Board_Spi_init SpiBusInit error %d\n", ret);
return ERROR;
}
/*Init the spi driver*/
ret = SpiDriverInit(spi_driver, drv_name);
if (EOK != ret) {
KPrintf("Board_Spi_init SpiDriverInit error %d\n", ret);
return ERROR;
}
/*Attach the spi driver to the spi bus*/
ret = SpiDriverAttachToBus(drv_name, bus_name);
if (EOK != ret) {
KPrintf("Board_Spi_init SpiDriverAttachToBus error %d\n", ret);
return ERROR;
}
return ret;
}
int HwQSpiInit(void)
{
x_err_t ret = EOK;
static struct SpiBus qspi_bus;
memset(&qspi_bus, 0, sizeof(struct SpiBus));
static struct SpiDriver qspi_driver;
memset(&qspi_driver, 0, sizeof(struct SpiDriver));
qspi_bus.private_data = QSPI_UNIT;
qspi_driver.configure = QSpiDrvConfigure;
ret = BoardSpiBusInit(&qspi_bus, &qspi_driver, QSPI_BUS_NAME, QSPI_DRV_NAME);
if (EOK != ret) {
KPrintf("BoardSpiBusInit error ret %u\n", ret);
return ERROR;
}
ret = BoardQSpiDevBend();
if (EOK != ret) {
KPrintf("BoardSpiDevBend error ret %u\n", ret);
return ERROR;
}
return ret;
}
int FlashW25qxxSpiDeviceInit(void)
{
HwQSpiInit();
QSpiSdkInit(NULL);
QspiPinConfig();
if (NONE == SpiFlashInit(QSPI_BUS_NAME, QSPI_DEVICE_NAME_0, QSPI_DRV_NAME, QSPI_FLASH_DEV_NAME)) {
return ERROR;
}
return EOK;
}

10
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/spi/connect_spi.c
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@ -465,11 +465,6 @@ int HwSpiInit(void)
return ERROR;
}
ret = BoardSpiDevBend();
if (EOK != ret) {
KPrintf("BoardSpiDevBend error ret %u\n", ret);
return ERROR;
}
#endif
#ifdef BSP_USING_SPI6
@ -488,12 +483,13 @@ int HwSpiInit(void)
return ERROR;
}
#endif
ret = BoardSpiDevBend();
if (EOK != ret) {
KPrintf("BoardSpiDevBend error ret %u\n", ret);
return ERROR;
}
#endif
}
return ret;
}

16
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/timer/Kconfig Normal file
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@ -0,0 +1,16 @@
menuconfig BSP_USING_TIMER_0
bool "Using timer 0"
default n
select RESOURCES_HWTIMER
if BSP_USING_TIMER_0
config HWTIMER_BUS_NAME_0
string "timer 0 bus 0 name"
default "timer0"
config HWTIMER_0_DEVICE_NAME_0
string "timer 0 bus 0 device 0 name"
default "timer0_dev0"
config HWTIMER_DRIVER_NAME_0
string "timer 0 bus 0 driver name"
default "timer0_drv"
endif

3
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/timer/Makefile Normal file
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@ -0,0 +1,3 @@
SRC_FILES := connect_hwtimer.c
include $(KERNEL_ROOT)/compiler.mk

189
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/timer/connect_hwtimer.c Normal file
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@ -0,0 +1,189 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file connect_hwtimer.c
* @brief support aiit-riscv64-board hwtimer function and register to bus framework
* @version 1.0
* @author AIIT XUOS Lab
* @date 2021-04-25
*/
#include <connect_hwtimer.h>
#define TMR0_CMP_VAL 1000
#define TMR0x ((CM_TMR0_TypeDef *)CM_TMR0_1_BASE)
#define TMR0_CH_x (TMR0_CH_A)
#define INTSEL_REG ((uint32_t)(&CM_INTC->SEL0))
#define TIMER0_IRQn (18)
void (*callback_function)(void *) ;
static void Timer0Callback(int vector, void *param)
{
TMR0_SetCountValue(TMR0x, TMR0_CH_x, 0);
if (callback_function) {
callback_function(param);
}
}
static uint32 HwtimerOpen(void *dev)
{
struct HwtimerHardwareDevice *hwtimer_dev = dev;
stc_tmr0_init_t stcTmr0Init;
/* Enable timer0 peripheral clock */
FCG_Fcg2PeriphClockCmd(PWC_FCG2_TMR0_1, ENABLE);
/* TIMER0 basetimer function initialize */
(void)TMR0_StructInit(&stcTmr0Init);
stcTmr0Init.u32ClockDiv = TMR0_CLK_DIV128; /* Config clock division */
stcTmr0Init.u32ClockSrc = TMR0_CLK_SRC_INTERN_CLK; /* Chose clock source */
stcTmr0Init.u32Func = TMR0_FUNC_CMP; /* Timer0 compare mode */
stcTmr0Init.u16CompareValue = TMR0_CMP_VAL; /* Set compare register data */
(void)TMR0_Init(TMR0x, TMR0_CH_x, &stcTmr0Init);
// DelayKTask(1);
// /* Set internal hardware capture source */
// TMR0_SetTriggerSrc(EVT_PORT_EIRQ0);
// DelayKTask(1);
return EOK;
}
static uint32 HwtimerClose(void *dev)
{
/* Timer0 interrupt function Disable */
TMR0_IntCmd(TMR0x, TMR0_INT_CMP_A, DISABLE);
return EOK;
}
/*manage the hwtimer device operations*/
static const struct HwtimerDevDone dev_done =
{
.open = HwtimerOpen,
.close = HwtimerClose,
.write = NONE,
.read = NONE,
};
static uint32 HwtimerDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
{
NULL_PARAM_CHECK(drv);
NULL_PARAM_CHECK(configure_info);
x_err_t ret = EOK;
__IO uint32_t *INTC_SELx;
switch (configure_info->configure_cmd)
{
case OPE_INT:
INTC_SELx = (__IO uint32_t *)(INTSEL_REG+ 4U * (uint32_t)(TIMER0_IRQn));
WRITE_REG32(*INTC_SELx, EVT_SRC_TMR0_1_CMP_A);
callback_function = (void (*)(void *param))configure_info->private_data;
isrManager.done->registerIrq(TIMER0_IRQn+16,Timer0Callback,NULL);
isrManager.done->enableIrq(TIMER0_IRQn);
TMR0_IntCmd(TMR0x, TMR0_INT_CMP_A, ENABLE);
break;
case OPE_CFG:
TMR0_ClearStatus(TMR0x, TMR0_FLAG_CMP_A);
TMR0_SetCompareValue(TMR0x, TMR0_CH_x, *((int *)configure_info->private_data) );
/* Timer0 interrupt function Enable */
TMR0_SetCountValue(TMR0x, TMR0_CH_x, 0x0000);
TMR0_Start(TMR0x, TMR0_CH_x);
break;
default:
break;
}
return ret;
}
/*Init hwtimer bus*/
static int BoardHwtimerBusInit(struct HwtimerBus *hwtimer_bus, struct HwtimerDriver *hwtimer_driver)
{
x_err_t ret = EOK;
/*Init the hwtimer bus */
ret = HwtimerBusInit(hwtimer_bus, HWTIMER_BUS_NAME_0);
if (EOK != ret) {
KPrintf("board_hwtimer_init HwtimerBusInit error %d\n", ret);
return ERROR;
}
/*Init the hwtimer driver*/
hwtimer_driver->configure = &(HwtimerDrvConfigure);
ret = HwtimerDriverInit(hwtimer_driver, HWTIMER_DRIVER_NAME_0);
if (EOK != ret) {
KPrintf("board_hwtimer_init HwtimerDriverInit error %d\n", ret);
return ERROR;
}
/*Attach the hwtimer driver to the hwtimer bus*/
ret = HwtimerDriverAttachToBus(HWTIMER_DRIVER_NAME_0, HWTIMER_BUS_NAME_0);
if (EOK != ret) {
KPrintf("board_hwtimer_init USEDriverAttachToBus error %d\n", ret);
return ERROR;
}
return ret;
}
/*Attach the hwtimer device to the hwtimer bus*/
static int BoardHwtimerDevBend(void)
{
x_err_t ret = EOK;
static struct HwtimerHardwareDevice hwtimer_device_0;
memset(&hwtimer_device_0, 0, sizeof(struct HwtimerHardwareDevice));
hwtimer_device_0.dev_done = &dev_done;
ret = HwtimerDeviceRegister(&hwtimer_device_0, NONE, HWTIMER_0_DEVICE_NAME_0);
if (EOK != ret) {
KPrintf("BoardHwtimerDevBend HwtimerDeviceRegister device %s error %d\n", HWTIMER_0_DEVICE_NAME_0, ret);
return ERROR;
}
ret = HwtimerDeviceAttachToBus(HWTIMER_0_DEVICE_NAME_0, HWTIMER_BUS_NAME_0);
if (EOK != ret) {
KPrintf("BoardHwtimerDevBend HwtimerDeviceAttachToBus device %s error %d\n", HWTIMER_0_DEVICE_NAME_0, ret);
return ERROR;
}
return ret;
}
/*K210 BOARD HWTIMER INIT*/
int HwTimerInit(void)
{
x_err_t ret = EOK;
static struct HwtimerBus hwtimer_bus;
memset(&hwtimer_bus, 0, sizeof(struct HwtimerBus));
static struct HwtimerDriver hwtimer_driver;
memset(&hwtimer_driver, 0, sizeof(struct HwtimerDriver));
ret = BoardHwtimerBusInit(&hwtimer_bus, &hwtimer_driver);
if (EOK != ret) {
KPrintf("board_hwtimer_Init error ret %u\n", ret);
return ERROR;
}
ret = BoardHwtimerDevBend();
if (EOK != ret) {
KPrintf("board_hwtimer_Init error ret %u\n", ret);
return ERROR;
}
return ret;
}

15
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/watchdog/Kconfig Normal file
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@ -0,0 +1,15 @@
if BSP_USING_WDT
config WDT_BUS_NAME_0
string "watchdog bus 0 name"
default "wdt0"
config WDT_DRIVER_NAME_0
string "watchdog driver 0 name"
default "wdt0_drv"
config WDT_0_DEVICE_NAME_0
string "watchdog device 0 name"
default "wdt0_dev0"
endif

3
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/watchdog/Makefile Normal file
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@ -0,0 +1,3 @@
SRC_FILES := connect_wdt.c
include $(KERNEL_ROOT)/compiler.mk

145
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/watchdog/connect_wdt.c Normal file
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@ -0,0 +1,145 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file connect_wdt.c
* @brief support hc32f4a0-board watchdog function and register to bus framework
* @version 1.0
* @author AIIT XUOS Lab
* @date 2023-02-02
*/
#include <connect_wdt.h>
#define WDT_COUNT_CYCLE 65536U
static uint32 WdtOpen(void *dev)
{
NULL_PARAM_CHECK(dev);
stc_wdt_init_t stcWdtInit;
stcWdtInit.u32CountPeriod = WDT_CNT_PERIOD65536;
stcWdtInit.u32ClockDiv = WDT_CLK_DIV1024;
stcWdtInit.u32RefreshRange = WDT_RANGE_0TO25PCT;
stcWdtInit.u32LPMCount = WDT_LPM_CNT_STOP;
stcWdtInit.u32ExceptionType = WDT_EXP_TYPE_RST;
(void)WDT_Init(&stcWdtInit);
return EOK;
}
static uint32 WdtConfigure(void *drv, struct BusConfigureInfo *args)
{
NULL_PARAM_CHECK(drv);
NULL_PARAM_CHECK(args);
stc_wdt_init_t stcWdtInit;
int period_option = *((int*)args->private_data);
if(period_option<=256){
period_option = WDT_CNT_PERIOD256;
}else if(period_option<=4096){
period_option = WDT_CNT_PERIOD4096;
}else if(period_option<=16384){
period_option = WDT_CNT_PERIOD16384;
}else{
period_option = WDT_CNT_PERIOD65536;
}
switch (args->configure_cmd)
{
case OPER_WDT_SET_TIMEOUT:
stcWdtInit.u32CountPeriod = period_option;
stcWdtInit.u32ClockDiv = WDT_CLK_DIV1024;
stcWdtInit.u32RefreshRange = WDT_RANGE_0TO25PCT;
stcWdtInit.u32LPMCount = WDT_LPM_CNT_STOP;
stcWdtInit.u32ExceptionType = WDT_EXP_TYPE_RST;
if (WDT_Init(&stcWdtInit) != 0) {
return ERROR;
}
/* the chip SDK's feature:to start up watchdog counter, feed dog first after initialization*/
WDT_FeedDog();
break;
case OPER_WDT_KEEPALIVE:
/* must wait for count lower than 25%(division by 4) for a feed as RefreshRange is set as 0TO25PCT*/
if (WDT_GetCountValue() < WDT_COUNT_CYCLE/4){
WDT_FeedDog();
}
break;
default:
return ERROR;
}
return EOK;
}
static const struct WdtDevDone dev_done =
{
WdtOpen,
NONE,
NONE,
NONE,
};
/**
* @description: Watchdog function
* @return success: EOK, failure: other
*/
int StartWatchdog(void)
{
//add feed watchdog task function
return EOK;
}
int HwWdtInit(void)
{
x_err_t ret = EOK;
static struct WdtBus wdt0;
ret = WdtBusInit(&wdt0, WDT_BUS_NAME_0);
if (ret != EOK) {
KPrintf("Watchdog bus init error %d\n", ret);
return ERROR;
}
static struct WdtDriver drv0;
drv0.configure = WdtConfigure;
ret = WdtDriverInit(&drv0, WDT_DRIVER_NAME_0);
if (ret != EOK) {
KPrintf("Watchdog driver init error %d\n", ret);
return ERROR;
}
ret = WdtDriverAttachToBus(WDT_DRIVER_NAME_0, WDT_BUS_NAME_0);
if (ret != EOK) {
KPrintf("Watchdog driver attach error %d\n", ret);
return ERROR;
}
static struct WdtHardwareDevice dev0;
dev0.dev_done = &dev_done;
ret = WdtDeviceRegister(&dev0, WDT_0_DEVICE_NAME_0);
if (ret != EOK) {
KPrintf("Watchdog device register error %d\n", ret);
return ERROR;
}
ret = WdtDeviceAttachToBus(WDT_0_DEVICE_NAME_0, WDT_BUS_NAME_0);
if (ret != EOK) {
KPrintf("Watchdog device register error %d\n", ret);
return ERROR;
}
return ret;
}

78
Ubiquitous/XiZi_IIoT/kernel/kernel_test/test_realtime.c
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@ -26,15 +26,23 @@ extern unsigned int usleep(unsigned int seconds);
static BusType pin;
#ifdef ARCH_ARM
#include <hardware_gpio.h>
// #include <hardware_gpio.h>
#define GPIO_C13 7
#define GPIO_C2 17
#define GPIO_C11 140
#define GPIO_D1 143
void PinIrqIsr(void *args)
void PinIrqIsr(int vector,void *args)
{
*(volatile unsigned int *)0x40020818 = 0x2000;
*(volatile unsigned int *)0x4002081a = 0x2000;
/* 将GPIO D1置为高电平 */
asm volatile("LDR r2, =0x40053838"); // 测试代码
asm volatile("MOV r3, #0x0002"); // 测试代码
asm volatile("STR r3, [r2]"); // 测试代码
/* 将GPIO D1置为低电平 */
asm volatile("LDR r2, =0x4005383A"); // 测试代码
asm volatile("MOV r3, #0x0002"); // 测试代码
asm volatile("STR r3, [r2]"); // 测试代码
}
int RealtimeIrqTest()
@ -58,23 +66,23 @@ int RealtimeIrqTest()
KPrintf("%s irq test\n",__func__);
/* config test pin 1 as output*/
testpin_1.cmd = GPIO_CONFIG_MODE;
testpin_1.pin = GPIO_C13;
testpin_1.pin = GPIO_D1;
testpin_1.mode = GPIO_CFG_OUTPUT;
ret = BusDrvConfigure(pin->owner_driver, &configure_info_1);
if (ret != EOK) {
KPrintf("config testpin_1 %d failed!\n", GPIO_C13);
KPrintf("config testpin_1 %d failed!\n", GPIO_D1);
return -ERROR;
}
/* set test pin 1 as high*/
testpin_1_stat.pin = GPIO_C13;
testpin_1_stat.pin = GPIO_D1;
testpin_1_stat.val = GPIO_LOW;
BusDevWriteData(pin->owner_haldev, &write_param_1);
/* config test pin 2 as input*/
testpin_2.cmd = GPIO_CONFIG_MODE;
testpin_2.pin = GPIO_C2;
testpin_2.pin = GPIO_C11;
testpin_2.mode = GPIO_CFG_INPUT;
ret = BusDrvConfigure(pin->owner_driver, &configure_info_2);
@ -84,9 +92,9 @@ int RealtimeIrqTest()
}
testpin_2.cmd = GPIO_IRQ_REGISTER;
testpin_2.pin = GPIO_C2;
testpin_2.pin = GPIO_C11;
testpin_2.irq_set.irq_mode = GPIO_IRQ_EDGE_BOTH;
testpin_2.irq_set.hdr = PinIrqIsr;
testpin_2.irq_set.hdr = (void(*)(void *))PinIrqIsr;
testpin_2.irq_set.args = NONE;
ret = BusDrvConfigure(pin->owner_driver, &configure_info_2);
@ -96,7 +104,7 @@ int RealtimeIrqTest()
}
testpin_2.cmd = GPIO_IRQ_ENABLE;
testpin_2.pin = GPIO_C2;
testpin_2.pin = GPIO_C11;
ret = BusDrvConfigure(pin->owner_driver, &configure_info_2);
if (ret != EOK) {
@ -191,14 +199,32 @@ void GpioSpeedTest()
#else
#define GPIO_18 18
#define GPIO_19 19
#define GPIO_34 34
#define GPIO_35 35
void PinIrqIsr(void *args)
{
*(volatile unsigned int *)0x3800100c |= 0x5;
/* 将 GPIO18 置为高电平 */
asm volatile ("lui a5, 0x38001"); // 测试代码
asm volatile ("addi a5, a5, 12"); // 测试代码
asm volatile ("lw a5, 0(a5)"); // 测试代码
asm volatile ("sext.w a4, a5"); // 测试代码
asm volatile ("lui a5, 0x38001"); // 测试代码
asm volatile ("addi a5, a5, 12"); // 测试代码
asm volatile ("ori a4, a4, 5"); // 测试代码
asm volatile ("sext.w a4, a4"); // 测试代码
asm volatile ("sw a4, 0(a5)"); // 测试代码
*(volatile unsigned int *)0x3800100c &= ~0x5;
/* 将GPIO18 置为低电平 */
asm volatile ("lui a5, 0x38001"); // 测试代码
asm volatile ("addi a5, a5, 12"); // 测试代码
asm volatile ("lw a5, 0(a5)"); // 测试代码
asm volatile ("sext.w a4, a5"); // 测试代码
asm volatile ("lui a5, 0x38001"); // 测试代码
asm volatile ("addi a5, a5, 12"); // 测试代码
asm volatile ("andi a4, a4, -6"); // 测试代码
asm volatile ("sext.w a4, a4"); // 测试代码
asm volatile ("sw a4, 0(a5)"); // 测试代码
}
int RealtimeIrqTest()
@ -221,29 +247,29 @@ int RealtimeIrqTest()
KPrintf("%s irq test\n",__func__);
/* config GPIO18 as output and set as low */
testpin_1.cmd = GPIO_CONFIG_MODE;
testpin_1.pin = GPIO_18;
testpin_1.pin = GPIO_34;
testpin_1.mode = GPIO_CFG_OUTPUT;
BusDrvConfigure(pin->owner_driver, &configure_info_1);
testpin_1_stat.pin = GPIO_18;
testpin_1_stat.pin = GPIO_34;
testpin_1_stat.val = GPIO_LOW;
BusDevWriteData(pin->owner_haldev, &write_param_1);
/* config GPIO18 as input */
testpin_2.cmd = GPIO_CONFIG_MODE;
testpin_2.pin = GPIO_19;
testpin_2.pin = GPIO_35;
testpin_2.mode = GPIO_CFG_INPUT;
BusDrvConfigure(pin->owner_driver, &configure_info_2);
testpin_2.cmd = GPIO_IRQ_REGISTER;
testpin_2.pin = GPIO_19;
testpin_2.pin = GPIO_35;
testpin_2.irq_set.irq_mode = GPIO_IRQ_EDGE_RISING;
testpin_2.irq_set.hdr = PinIrqIsr;
testpin_2.irq_set.args = NONE;
BusDrvConfigure(pin->owner_driver, &configure_info_2);
testpin_2.cmd = GPIO_IRQ_ENABLE;
testpin_2.pin = GPIO_19;
testpin_2.pin = GPIO_35;
BusDrvConfigure(pin->owner_driver, &configure_info_2);
return 0;
@ -262,16 +288,16 @@ void RealtimeTaskSwitchTest()
write_param_1.buffer = (void *)&testpin_1_stat;
testpin_1.cmd = GPIO_CONFIG_MODE;
testpin_1.pin = GPIO_18;
testpin_1.pin = GPIO_34;
testpin_1.mode = GPIO_CFG_OUTPUT;
BusDrvConfigure(pin->owner_driver, &configure_info_1);
testpin_1_stat.pin = GPIO_18;
testpin_1_stat.pin = GPIO_34;
testpin_1_stat.val = GPIO_LOW;
BusDevWriteData(pin->owner_haldev, &write_param_1);
while (RET_TRUE) {
DelayKTask(10);
DelayKTask(1);
}
}
@ -288,11 +314,11 @@ void GpioSpeedTest()
write_param_1.buffer = (void *)&testpin_1_stat;
testpin_1.cmd = GPIO_CONFIG_MODE;
testpin_1.pin = GPIO_18;
testpin_1.pin = GPIO_34;
testpin_1.mode = GPIO_CFG_OUTPUT;
BusDrvConfigure(pin->owner_driver, &configure_info_1);
testpin_1_stat.pin = GPIO_18;
testpin_1_stat.pin = GPIO_34;
testpin_1_stat.val = GPIO_LOW;
BusDevWriteData(pin->owner_haldev, &write_param_1);

7
Ubiquitous/XiZi_IIoT/kernel/thread/init.c
View File

@ -33,6 +33,11 @@
#endif
#endif
#ifdef BSP_USING_QSPI_FLASH
#include "connect_flash.h"
extern int FlashW25qxxSpiDeviceInit(void);
#endif
#ifdef KERNEL_USER_MAIN
#ifndef MAIN_KTASK_STACK_SIZE
#define MAIN_KTASK_STACK_SIZE 2048
@ -46,6 +51,8 @@
extern int StartWatchdog(void);
#endif
extern void CreateKServiceKTask(void);
extern int main(void);
void InitBoardHardware(void);

12
Ubiquitous/XiZi_IIoT/path_kernel.mk
View File

@ -475,9 +475,21 @@ KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/knowing/tensorflow
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/knowing/tensorflow-lite/tensorflow-lite-for-mcu/source/third_party/gemmlowp #
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/knowing/tensorflow-lite/tensorflow-lite-for-mcu/source/third_party/flatbuffers/include #
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/knowing/tensorflow-lite/tensorflow-lite-for-mcu/source/third_party/ruy #
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/knowing/kpu/k210_yolov2_detect_procedure #
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/knowing/kpu/yolov2 #
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/knowing/kpu/yolov2_json #
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/knowing/nnom/inc #
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/knowing/nnom/inc/layers #
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/knowing/nnom/port #
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/knowing/cmsis_5/Core/Include #
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/knowing/cmsis_5/DSP/Include #
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/knowing/cmsis_5/DSP/Include/dsp #
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/knowing/cmsis_5/NN/Include #
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Applications/knowing_app/cmsis_5_demo/cmsisnn-cifar10/model/m4 #
endif
ifeq ($(CONFIG_LIB_LV),y)

2
Ubiquitous/XiZi_IIoT/resources/spi/third_party_spi/SFUD/sfud/src/sfud.c
View File

@ -444,7 +444,7 @@ sfud_err sfud_read(const sfud_flash *flash, uint32_t addr, size_t size, uint8_t
#endif
{
cmd_data[0] = SFUD_CMD_READ_DATA;
make_adress_byte_array(flash, addr, &cmd_data[1]);
make_adress_byte_array(flash, addr, cmd_data+1);
cmd_size = flash->addr_in_4_byte ? 5 : 4;
result = spi->wr(spi, cmd_data, cmd_size, data, size);
}