add file note for vega board

This commit is contained in:
Wang_Weigen 2022-02-18 16:22:45 +08:00
parent 3c8fcd55cc
commit 0f8336c9e7
33 changed files with 321 additions and 27 deletions

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@ -40,6 +40,16 @@
* CMSIS Peripheral Access Layer for RV32M1_ri5cy
*/
/*************************************************
File name: RV32M1_ri5cy.h
Description: CMSIS Peripheral Access Layer for RV32M1_ri5cy
Others: take for references
https://github.com/open-isa-org/open-isa.org
History:
1. Date: 2022-02-16
Author: AIIT XUOS Lab
Modification:
*************************************************/
#ifndef _RV32M1_RI5CY_H_
#define _RV32M1_RI5CY_H_ /**< Symbol preventing repeated inclusion */

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@ -21,6 +21,16 @@
** ###################################################################
*/
/*************************************************
File name: RV32M1_ri5cy_features.h
Description: support ri5cy
Others: take for references
https://github.com/open-isa-org/open-isa.org
History:
1. Date: 2022-02-16
Author: AIIT XUOS Lab
Modification:
*************************************************/
#ifndef _RV32M1_ri5cy_FEATURES_H_
#define _RV32M1_ri5cy_FEATURES_H_

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@ -39,7 +39,16 @@
*
* CMSIS Peripheral Access Layer for RV32M1_zero_riscy
*/
/*************************************************
File name: RV32M1_zero_riscy.h
Description:
Others: take for references
https://github.com/open-isa-org/open-isa.org
History:
1. Date: 2022-02-16
Author: AIIT XUOS Lab
Modification:
*************************************************/
#ifndef _RV32M1_CM0PLUS_H_
#define _RV32M1_CM0PLUS_H_ /**< Symbol preventing repeated inclusion */

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@ -21,6 +21,17 @@
** ###################################################################
*/
/*************************************************
File name: RV32M1_zero_riscy_features.h
Description:
Others: take for references
https://github.com/open-isa-org/open-isa.org
History:
1. Date: 2022-02-16
Author: AIIT XUOS Lab
Modification:
*************************************************/
#ifndef _RV32M1_zero_riscy_FEATURES_H_
#define _RV32M1_zero_riscy_FEATURES_H_

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@ -30,6 +30,24 @@
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------*/
/**
* @file core_riscv32.h
* @brief support interrupt
* @version 1.0
* @author AIIT XUOS Lab
* @date 2022-02-16
*/
/*************************************************
File name: core_riscv32.h
Description: support gap8 interrupt and startup
Others: take for references
https://github.com/open-isa-org/open-isa.org
History:
1. Date: 2022-02-16
Author: AIIT XUOS Lab
Modification:
*************************************************/
#ifndef __CORE_RISCV32_H__
#define __CORE_RISCV32_H__

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@ -7,6 +7,25 @@
*
*/
/**
* @file fsl_device_registers.h
* @brief support fsl device
* @version 1.0
* @author AIIT XUOS Lab
* @date 2022-02-16
*/
/*************************************************
File name: fsl_device_registers.h
Description: support fsl device
Others: take for references
https://github.com/open-isa-org/open-isa.org
History:
1. Date: 2022-02-16
Author: AIIT XUOS Lab
Modification:
*************************************************/
#ifndef __FSL_DEVICE_REGISTERS_H__
#define __FSL_DEVICE_REGISTERS_H__

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@ -1,6 +1,6 @@
/**
* @file interrupt.c
* @brief support gap8 interrupt enable and disable
* @brief support interrupt
* @version 1.0
* @author AIIT XUOS Lab
* @date 2021-09-02

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@ -1,12 +1,10 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018/10/02 Bernard The first version
*/
/**
* @file interrupt_gcc.S
* @brief support vega interrupt
* @version 1.0
* @author AIIT XUOS Lab
* @date 2022-02-16
*/
#include "boot.h"

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@ -23,6 +23,18 @@
// this License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
// CONDITIONS OF ANY KIND, either express or implied. See the License for the
// specific language governing permissions and limitations under the License.
/*************************************************
File name: startup_RV32M1_ri5cy.s
Description:
Others: take for references
https://github.com/open-isa-org/open-isa.org
History:
1. Date: 2022-02-16
Author: AIIT XUOS Lab
Modification:
*************************************************/
.extern Rv32m1VgeaStart
#define EXCEPTION_STACK_SIZE 0x58

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@ -23,6 +23,17 @@
// CONDITIONS OF ANY KIND, either express or implied. See the License for the
// specific language governing permissions and limitations under the License.
/*************************************************
File name: startup_RV32M1_zero_ri5cy.s
Description:
Others: take for references
https://github.com/open-isa-org/open-isa.org
History:
1. Date: 2022-02-16
Author: AIIT XUOS Lab
Modification:
*************************************************/
#define EXCEPTION_STACK_SIZE 0x58
.text

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@ -45,6 +45,17 @@
* (PLL) that is part of the microcontroller device.
*/
/*************************************************
File name: RV32M1_ri5cy
Description:
Others: take for references
https://github.com/open-isa-org/open-isa.org
History:
1. Date: 2022-02-16
Author: AIIT XUOS Lab
Modification:
*************************************************/
#include <stdint.h>
#include "fsl_device_registers.h"
#include "fsl_common.h"

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@ -43,7 +43,16 @@
* the system frequency. It configures the device and initializes the oscillator
* (PLL) that is part of the microcontroller device.
*/
/*************************************************
File name: RV32M1_ri5cy
Description:
Others: take for references
https://github.com/open-isa-org/open-isa.org
History:
1. Date: 2022-02-16
Author: AIIT XUOS Lab
Modification:
*************************************************/
#ifndef _SYSTEM_RV32M1_ri5cy_H_
#define _SYSTEM_RV32M1_ri5cy_H_ /**< Symbol preventing repeated inclusion */

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@ -45,6 +45,17 @@
* (PLL) that is part of the microcontroller device.
*/
/*************************************************
File name: RV32M1_zero_riscy
Description:
Others: take for references
https://github.com/open-isa-org/open-isa.org
History:
1. Date: 2022-02-16
Author: AIIT XUOS Lab
Modification:
*************************************************/
#include <stdint.h>
#include "fsl_device_registers.h"
#include "fsl_common.h"

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@ -45,6 +45,17 @@
* (PLL) that is part of the microcontroller device.
*/
/*************************************************
File name: RV32M1_zero_riscy
Description:
Others: take for references
https://github.com/open-isa-org/open-isa.org
History:
1. Date: 2022-02-16
Author: AIIT XUOS Lab
Modification:
*************************************************/
#ifndef _SYSTEM_RV32M1_zero_riscy_H_
#define _SYSTEM_RV32M1_zero_riscy_H_ /**< Symbol preventing repeated inclusion */

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@ -1,10 +1,10 @@
/**
* @file board.c
* @brief support rvstar init configure and start-up
* @brief support vega init configure and start-up
* @version 1.0
* @author AIIT XUOS Lab
* @date 2021-09-02
* @date 2022-02-16
*/
#include <board.h>

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@ -20,10 +20,10 @@
/*************************************************
File name: board.h
Description: define rvstar-board init configure and start-up function
Description: define vega-board init configure and start-up function
Others:
History:
1. Date: 2021-09-02
1. Date: 2022-02-16
Author: AIIT XUOS Lab
Modification:
1. define rvstar-board InitBoardHardware

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@ -6,6 +6,17 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
/*************************************************
File name: fsl_host
Description:
Others: take for references
https://github.com/open-isa-org/open-isa.org
History:
1. Date: 2022-02-16
Author: AIIT XUOS Lab
Modification:
*************************************************/
#include "fsl_host.h"
#include "board.h"
#include "fsl_gpio.h"

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@ -7,6 +7,17 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
/*************************************************
File name: fsl_clock
Description:
Others: take for references
https://github.com/open-isa-org/open-isa.org
History:
1. Date: 2022-02-16
Author: AIIT XUOS Lab
Modification:
*************************************************/
#include "fsl_clock.h"
/*******************************************************************************

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@ -6,7 +6,16 @@
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/*************************************************
File name: fsl_common
Description:
Others: take for references
https://github.com/open-isa-org/open-isa.org
History:
1. Date: 2022-02-16
Author: AIIT XUOS Lab
Modification:
*************************************************/
#include "fsl_common.h"
// #include "fsl_debug_console.h"

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@ -5,7 +5,16 @@
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/*************************************************
File name: fsl_intmux
Description:
Others: take for references
https://github.com/open-isa-org/open-isa.org
History:
1. Date: 2022-02-16
Author: AIIT XUOS Lab
Modification:
*************************************************/
#include "fsl_intmux.h"
/*******************************************************************************

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@ -16,6 +16,17 @@ processor_version: 0.0.0
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/*************************************************
File name: pin_mux
Description:
Others: take for references
https://github.com/open-isa-org/open-isa.org
History:
1. Date: 2022-02-16
Author: AIIT XUOS Lab
Modification:
*************************************************/
#include "fsl_common.h"
#include "fsl_port.h"
#include "pin_mux.h"

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@ -4,7 +4,16 @@
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/*************************************************
File name: clock_config
Description:
Others: take for references
https://github.com/open-isa-org/open-isa.org
History:
1. Date: 2022-02-16
Author: AIIT XUOS Lab
Modification:
*************************************************/
#ifndef _CLOCK_CONFIG_H_
#define _CLOCK_CONFIG_H_

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@ -12,10 +12,10 @@
/**
* @file connect_uart.h
* @brief define rvstar uart function
* @version 1.1
* @brief define vega uart function
* @version 1.0
* @author AIIT XUOS Lab
* @date 2021-12-03
* @date 2022-02-16
*/
#ifndef CONNECT_UART_H

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@ -6,6 +6,16 @@
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/*************************************************
File name: fsl_clock
Description:
Others: take for references
https://github.com/open-isa-org/open-isa.org
History:
1. Date: 2022-02-16
Author: AIIT XUOS Lab
Modification:
*************************************************/
#ifndef _FSL_CLOCK_H_
#define _FSL_CLOCK_H_

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@ -5,7 +5,16 @@
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/*************************************************
File name: fsl_common
Description:
Others: take for references
https://github.com/open-isa-org/open-isa.org
History:
1. Date: 2022-02-16
Author: AIIT XUOS Lab
Modification:
*************************************************/
#ifndef _FSL_COMMON_H_
#define _FSL_COMMON_H_

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@ -5,7 +5,16 @@
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/*************************************************
File name: fsl_intmux
Description:
Others: take for references
https://github.com/open-isa-org/open-isa.org
History:
1. Date: 2022-02-16
Author: AIIT XUOS Lab
Modification:
*************************************************/
#ifndef _FSL_INTMUX_H_
#define _FSL_INTMUX_H_

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@ -5,6 +5,17 @@
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/*************************************************
File name: fsl_lpuart
Description:
Others: take for references
https://github.com/open-isa-org/open-isa.org
History:
1. Date: 2022-02-16
Author: AIIT XUOS Lab
Modification:
*************************************************/
#ifndef _FSL_LPUART_H_
#define _FSL_LPUART_H_

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@ -5,6 +5,17 @@
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/*************************************************
File name: fsl_msmc
Description:
Others: take for references
https://github.com/open-isa-org/open-isa.org
History:
1. Date: 2022-02-16
Author: AIIT XUOS Lab
Modification:
*************************************************/
#ifndef _FSL_MSMC_H_
#define _FSL_MSMC_H_

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@ -5,6 +5,18 @@
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/*************************************************
File name: fsl_port
Description:
Others: take for references
https://github.com/open-isa-org/open-isa.org
History:
1. Date: 2022-02-16
Author: AIIT XUOS Lab
Modification:
*************************************************/
#ifndef _FSL_PORT_H_
#define _FSL_PORT_H_

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@ -5,6 +5,17 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
/*************************************************
File name: pin_mux
Description:
Others: take for references
https://github.com/open-isa-org/open-isa.org
History:
1. Date: 2022-02-16
Author: AIIT XUOS Lab
Modification:
*************************************************/
#ifndef _PIN_MUX_H_
#define _PIN_MUX_H_

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@ -33,6 +33,17 @@ processor_version: 0.0.0
board: RV32M1_VEGA
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/*************************************************
File name: clock_config
Description:
Others: take for references
https://github.com/open-isa-org/open-isa.org
History:
1. Date: 2022-02-16
Author: AIIT XUOS Lab
Modification:
*************************************************/
#include "fsl_msmc.h"
#include "clock_config.h"

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@ -12,10 +12,10 @@
/**
* @file connect_usart.c
* @brief supportrvstar-board uart function and register to bus framework
* @version 1.1
* @brief support vega-board uart function and register to bus framework
* @version 1.0
* @author AIIT XUOS Lab
* @date 2021-12-03
* @date 2022-02-16
*/
#include <xiuos.h>

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@ -6,6 +6,16 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
/*************************************************
File name: fsl_lpuart
Description:
Others: take for references
https://github.com/open-isa-org/open-isa.org
History:
1. Date: 2022-02-16
Author: AIIT XUOS Lab
Modification:
*************************************************/
#include "fsl_lpuart.h"
/*******************************************************************************