fit XiUOS to ch32v307.

Ubiquitous/XiZi/arch/risc-v/ch32v307vct6/Debug/debug.c

@@ -8,6 +8,14 @@
 * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
 * SPDX-License-Identifier: Apache-2.0
 *******************************************************************************/
+/*************************************************
+File name: debug.c
+Description: support some basic functions for ch32v30x 
+History: 
+1. Date: 2022-08-09
+Author: AIIT XUOS Lab
+Modification:  
+*************************************************/
 #include "debug.h"
 
 static uint8_t  p_us = 0;

Ubiquitous/XiZi/arch/risc-v/ch32v307vct6/Debug/debug.h

@@ -8,6 +8,15 @@
 * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
 * SPDX-License-Identifier: Apache-2.0
 *******************************************************************************/
+/*************************************************
+File name: debug.h
+Description: support some basic functions for ch32v30x 
+History: 
+1. Date: 2022-08-09
+Author: AIIT XUOS Lab
+Modification:  
+*************************************************/
+
 #ifndef __DEBUG_H
 #define __DEBUG_H
 

Ubiquitous/XiZi/arch/risc-v/ch32v307vct6/Makefile

@@ -1,4 +1,4 @@
 SRC_FILES := boot.S interrupt.c tick.c switch.S prepare_rhwstack.c interrupt_switch.S
-SRC_DIR := Core Debug User Peripheral
+SRC_DIR := Core User Debug
 # interrupt_switch.S
 include $(KERNEL_ROOT)/compiler.mk

Ubiquitous/XiZi/arch/risc-v/ch32v307vct6/User/ch32v30x_conf.h

@@ -7,6 +7,14 @@
 * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
 * SPDX-License-Identifier: Apache-2.0
 *******************************************************************************/ 
+/*************************************************
+File name: ch32v30x_conf.h
+Description: include peripheral supports for ch32v30x 
+History: 
+1. Date: 2022-08-09
+Author: AIIT XUOS Lab
+Modification:  
+*************************************************/
 #ifndef __CH32V30x_CONF_H
 #define __CH32V30x_CONF_H
 

Ubiquitous/XiZi/arch/risc-v/ch32v307vct6/User/ch32v30x_it.c

@@ -7,6 +7,15 @@
 * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
 * SPDX-License-Identifier: Apache-2.0
 *******************************************************************************/
+/*************************************************
+File name: ch32v30x_it.c
+Description: include peripheral supports for ch32v30x 
+History: 
+1. Date: 2022-08-09
+Author: AIIT XUOS Lab
+Modification:
+1. add HardFault interrupt implementation.
+*************************************************/
 #include "ch32v30x_it.h"
 #include "board.h"
 #include <xs_isr.h>
@@ -15,7 +24,6 @@
 
 void NMI_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
 void HardFault_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
-void UART4_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
 
 /*********************************************************************
  * @fn      NMI_Handler

Ubiquitous/XiZi/arch/risc-v/ch32v307vct6/interrupt.c

@@ -135,8 +135,8 @@ void PrintStackFrame(uintptr_t * sp)
 }
 
 void HwInterruptcontextSwitch(x_ubase from_sp, x_ubase to_sp, struct TaskDescriptor* new_task, void* context) {
-    interrupt_from_sp = from_sp;
+    interrupt_from_sp = (x_ubase)from_sp;
-    interrupt_to_sp = to_sp;
+    interrupt_to_sp = (x_ubase)to_sp;
-    interrupt_new_task = new_task;
+    interrupt_new_task = (x_ubase)new_task;
     sw_setpend();
 }

Ubiquitous/XiZi/arch/risc-v/ch32v307vct6/switch.S

@@ -1,3 +1,14 @@
+/*
+* Copyright (c) 2020 AIIT XUOS Lab
+* XiUOS is licensed under Mulan PSL v2.
+* You can use this software according to the terms and conditions of the Mulan PSL v2.
+* You may obtain a copy of Mulan PSL v2 at:
+*        http://license.coscl.org.cn/MulanPSL2
+* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+* See the Mulan PSL v2 for more details.
+*/
 #include "cpuport.h"
 
     .global SwitchKTaskContextExit

Ubiquitous/XiZi/arch/risc-v/ch32v307vct6/tick.c

@@ -17,6 +17,8 @@
 #include "ch32v30x_it.h"
 #include "core_riscv.h"
 
+extern void KTaskOsAssignAfterIrq(void *);
+
 void SysTick_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
 void SysTick_Handler(void)
 {

Ubiquitous/XiZi/board/ch32v307vct6/README.md

@@ -0,0 +1,58 @@
+# CH32V307VCT6-board README
+
+## 1. 简介
+
+| 硬件 | 描述 |
+| -- | -- |
+|芯片型号| ch32v307 |
+|CPU| 单核RV32GC |
+|主频| 144MHz |
+|片内SRAM| 可配最大128KB |
+| 外设 |  |
+| | GPIO、UART|
+
+## 2. 编译说明
+
+编译环境：Ubuntu18.04
+
+编译工具链：riscv-none-embed-gcc ( xPack GNU RISC-V Embedded GCC)  
+**xPack RISC-V Embedded GCC** 工具链可以使用[xpm](https://www.npmjs.com/package/xpm)工具进行安装:
+
+```console
+$ xpm install --global @xpack-dev-tools/riscv-none-embed-gcc@8.2.0-3.1.1
+```
+
+编译步骤：
+
+>1.将编译工具链的路径添加到board/ch32v307vct6/config.mk文件当中，例如将xpack-riscv-none-elf-gcc解压到/opt/下时添加：
+```
+export CROSS_COMPILE ?=/opt/riscv-embedded-gcc/bin/riscv-none-embed-
+```
+>2.在代码根目录下执行以下命令，生成配置文件
+```
+cd ./Ubiquitous/XiZi
+make BOARD=ch32v307vct6 distclean
+make BOARD=ch32v307vct6 menuconfig
+```
+>3.在menuconfig界面配置需要关闭和开启的功能，按回车键进入下级菜单，按Y键选中需要开启的功能，按N键选中需要关闭的功能，配置结束后选择Exit保存并退出
+>4.继续执行以下命令，进行编译
+```
+make BOARD=ch32v307vct6
+```
+>5.如果编译正确无误，会产生XiZi-ch32v307vct6.elf、XiZi-ch32v307vct6.bin文件。其中XiZi-ch32v307vct6.bin需要烧写到设备中进行运行。
+>注：最后可以执行以下命令，清除配置文件和编译生成的文件
+```
+make BOARD=ch32v307vct6 distclean
+```
+
+## 3. 烧写及执行
+
+开发板可使用数据线通过USB接口与电脑连接，将开发板的Boot0接口通电（连接VCC）后按动ReSet按钮，即可使用烧录工具[WCHISPTool](https://www.wch.cn/download/WCHISPTool_Setup_exe.html)进行烧录。![board_settng](img/board.jpg)烧录工具的配置如下图所示。![WCHISPTool配置](img/WCHIPSTool_setting.PNG)
+
+烧录完成后可通过串口连接PC电脑与开发版，TX(PA9)接串口RX、RX(PA10)接串口TX。![](img/serial.jpg)
+
+### 3.1 运行结果
+
+如果编译 & 烧写无误，将开发板BOOT引脚与VCC引脚断开后重新上电或将RESET引脚短接一下，将会在串口终端上看到信息打印输出。
+
+![terminal](img/terminal.PNG)

Ubiquitous/XiZi/board/ch32v307vct6/board.c

@@ -31,7 +31,7 @@
 #include <xizi.h>
 #include <stdint.h>
 #include <device.h>
-
+#include "connect_uart.h"
 #include "xsconfig.h"
 #include "ch32v30x.h"
 #include "core_riscv.h"
@@ -59,17 +59,16 @@ static uint32_t _SysTick_Config(uint32_t ticks)
  */
 void InitBoardHardware()
 {
+    USART_Printf_Init(115200);
     /* System Tick Configuration */
     _SysTick_Config(SystemCoreClock / TICK_PER_SECOND);
     /* initialize memory system */
     InitBoardMemory(MEMORY_START_ADDRESS, (void*)MEMORY_END_ADDRESS);
-
     InitHwUart();
     InstallConsole("uart1", "uart1_drv", "uart1_dev1");
 
     KPrintf("consle init completed.\n");
     KPrintf("board initialization......\n");
-
     // KPrintf("memory address range: [0x%08x - 0x%08x], size: %d\n", (x_ubase) MEMORY_START_ADDRESS, (x_ubase) MEMORY_END_ADDRESS, gd32vf103_SRAM_SIZE);
     /* initialize memory system */
 	

Ubiquitous/XiZi/board/ch32v307vct6/board.h

@@ -12,7 +12,7 @@
 
 /**
 * @file board.h
-* @brief define rvstar-board init configure and start-up function
+* @brief define ch32v307 init configure and start-up function
 * @version 1.0 
 * @author AIIT XUOS Lab
 * @date 2021-09-02
@@ -20,14 +20,13 @@
 
 /*************************************************
 File name: board.h
-Description: define ch32v307-board init configure and start-up function
+Description: define ch32v307 vct6 init configure and start-up function
 Others: 
 History: 
 1. Date: 2022-08-08
 Author: AIIT XUOS Lab
 Modification: 
-1. define rvstar-board InitBoardHardware
+1. define ch32v307 vct6 InitBoardHardware
-2. define rvstar-board data and bss struct
 *************************************************/
 #ifndef __BOARD_H__
 #define __BOARD_H__

Ubiquitous/XiZi/board/ch32v307vct6/third_party_driver/Makefile

@@ -1,5 +1,5 @@
 SRC_FILES := 
-SRC_DIR := 
+SRC_DIR := Peripheral
 
 ifeq ($(CONFIG_BSP_USING_UART),y)
   SRC_DIR += uart

Ubiquitous/XiZi/board/ch32v307vct6/third_party_driver/uart/connect_uart.c

@@ -12,7 +12,7 @@
 
 /**
 * @file connect_usart.c
-* @brief supportrvstar-board uart function and register to bus framework
+* @brief support ch32v307 vct6 uart function and register to bus framework
 * @version 1.0
 * @author AIIT XUOS Lab
 * @date 2022-08-01
@@ -20,6 +20,7 @@
 
 #include <xizi.h>
 #include "ch32v30x.h"
+#include "xsconfig.h"
 #include "connect_uart.h"
 #include "ch32v30x_usart.h"
 
@@ -92,70 +93,66 @@ static uint32 SerialInit(struct SerialDriver *serial_drv, struct BusConfigureInf
 	dev_param->serial_timeout = serial_cfg->data_cfg.serial_timeout;
 
     // init usart type def
-    // USART_DeInit((USART_TypeDef *)serial_cfg->hw_cfg.serial_register_base);
+    GPIO_InitTypeDef  GPIO_InitStructure;
-    USART_InitTypeDef usart_init_struct;
+
-    usart_init_struct.USART_BaudRate = serial_cfg->data_cfg.serial_baud_rate;
+    RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA, ENABLE);
+
+    GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
+    GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+    GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
+    GPIO_Init(GPIOA, &GPIO_InitStructure);
+
+    USART_InitTypeDef USART_InitStructure;
+    USART_InitStructure.USART_BaudRate = serial_cfg->data_cfg.serial_baud_rate;
 
     switch (serial_cfg->data_cfg.serial_data_bits)
     {
     case DATA_BITS_8:
-        usart_init_struct.USART_WordLength = USART_WordLength_8b;
+        USART_InitStructure.USART_WordLength = USART_WordLength_8b;
         break;
 
     case DATA_BITS_9:
-        usart_init_struct.USART_WordLength = USART_WordLength_9b;
+        USART_InitStructure.USART_WordLength = USART_WordLength_9b;
         break;
     default:
-        usart_init_struct.USART_WordLength = USART_WordLength_8b;
+        USART_InitStructure.USART_WordLength = USART_WordLength_8b;
         break;
     }
     
     switch (serial_cfg->data_cfg.serial_stop_bits)
     {
     case STOP_BITS_1:
-        usart_init_struct.USART_StopBits = USART_StopBits_1;
+        USART_InitStructure.USART_StopBits = USART_StopBits_1;
         break;
     case STOP_BITS_2:
-        usart_init_struct.USART_StopBits = USART_StopBits_2;
+        USART_InitStructure.USART_StopBits = USART_StopBits_2;
         break;
     default:
-        usart_init_struct.USART_StopBits = USART_StopBits_1;
+        USART_InitStructure.USART_StopBits = USART_StopBits_1;
         break;
     }
     
     switch (serial_cfg->data_cfg.serial_parity_mode)
     {
     case PARITY_NONE:
-        usart_init_struct.USART_Parity = USART_Parity_No;
+        USART_InitStructure.USART_Parity = USART_Parity_No;
         break;
     case PARITY_ODD:
-        usart_init_struct.USART_Parity = USART_Parity_Odd;
+        USART_InitStructure.USART_Parity = USART_Parity_Odd;
         break;
     case PARITY_EVEN:
-        usart_init_struct.USART_Parity = USART_Parity_Even;
+        USART_InitStructure.USART_Parity = USART_Parity_Even;
         break;
     default:
-        usart_init_struct.USART_Parity = USART_Parity_No;
+        USART_InitStructure.USART_Parity = USART_Parity_No;
         break;
     }
 
-    usart_init_struct.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
+    USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
-
+    USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
-    if (serial_cfg->hw_cfg.serial_register_base == USART1) {
-        // GPIO_InitTypeDef gpio_init_struct;
-        // RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA, ENABLE);
-        // gpio_init_struct.GPIO_Pin = GPIO_Pin_9;
-        // gpio_init_struct.GPIO_Speed = GPIO_Speed_50MHz;
-        // gpio_init_struct.GPIO_Mode = GPIO_Mode_AF_PP;
-        // GPIO_Init(GPIOA, &gpio_init_struct);
-        // gpio_init_struct.GPIO_Pin = GPIO_Pin_10;
-        // gpio_init_struct.GPIO_Speed = GPIO_Speed_50MHz;
-        // gpio_init_struct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
-        // GPIO_Init(GPIOA, &gpio_init_struct);
-        // USART_Init((USART_TypeDef*)serial_cfg->hw_cfg.serial_register_base, &usart_init_struct);
-        // USART_Cmd(serial_cfg->hw_cfg.serial_register_base, ENABLE);
-    }
 
+    USART_Init(USART1, &USART_InitStructure);
+    USART_Cmd(USART1, ENABLE);
     // usart_hardware_flow_rts_config(serial_cfg->hw_cfg.serial_register_base, USART_RTS_DISABLE);
     // usart_hardware_flow_cts_config(serial_cfg->hw_cfg.serial_register_base, USART_CTS_DISABLE);
 
@@ -330,7 +327,6 @@ int InitHwUart(void)
 {
     x_err_t ret = EOK;
 
-#ifdef BSP_USING_UART1
     static struct SerialBus serial_bus;
     memset(&serial_bus, 0, sizeof(struct SerialBus));
     
@@ -350,8 +346,10 @@ int InitHwUart(void)
 
     serial_cfg.data_cfg = data_cfg_init;
 
-    serial_cfg.hw_cfg.serial_register_base = USART1;
+#ifdef BSP_USING_UART1
+    serial_cfg.hw_cfg.serial_register_base = (uint32)USART1;
     serial_cfg.hw_cfg.serial_irq_interrupt = USART1_IRQn;
+#endif
     
     serial_driver_1.private_data = (void*)&serial_cfg;
 
@@ -390,7 +388,6 @@ int InitHwUart(void)
     usart_init_struct.USART_Parity               = USART_Parity_No;
     USART_Init((USART_TypeDef *)serial_cfg.hw_cfg.serial_register_base, &usart_init_struct);
     USART_Cmd((USART_TypeDef*)serial_cfg.hw_cfg.serial_register_base, ENABLE);
-#endif
     
     return ret;
 }

Ubiquitous/XiZi/path_kernel.mk

@@ -160,9 +160,9 @@ KERNELPATHS += \
 	-I$(KERNEL_ROOT)/arch/risc-v/ch32v307vct6/Core \
 	-I$(KERNEL_ROOT)/arch/risc-v/ch32v307vct6/Debug \
 	-I$(KERNEL_ROOT)/arch/risc-v/ch32v307vct6/User \
-	-I$(KERNEL_ROOT)/arch/risc-v/ch32v307vct6/Peripheral/inc \
 	-I$(KERNEL_ROOT)/arch/risc-v/ch32v307vct6 \
 	-I$(BSP_ROOT)/third_party_driver/include \
+	-I$(BSP_ROOT)/third_party_driver/Peripheral/inc \
 	-I$(BSP_ROOT)/include \
 	-I$(KERNEL_ROOT)/include #
 endif