forked from xuos/xiuos
Ubiquitous/RT_Thread/: add sdio support to stm32h743_openmv_h7plus
This commit is contained in:
parent
b521274b9f
commit
09d7d3cd6b
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@ -71,6 +71,13 @@ menu "On-chip Peripheral Drivers"
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select RT_SFUD_USING_QSPI
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default n
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config BSP_USING_SDMMC
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bool "Enable SDMMC (SD card)"
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select RT_USING_SDIO
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select RT_USING_DFS
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select RT_USING_DFS_ELMFAT
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default n
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endmenu
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endmenu
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@ -16,6 +16,8 @@ if GetDepend(['BSP_USING_SDRAM']):
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src += Glob('ports/sdram_test.c')
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if GetDepend(['BSP_USING_QSPI_FLASH']):
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src += ['ports/drv_qspi_flash.c']
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if GetDepend(['BSP_USING_SDMMC']):
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src += ['ports/drv_sdio.c']
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path = [cwd]
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@ -0,0 +1,473 @@
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/*
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* Copyright (c) 2006-2022, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-05-23 liuduanfei first version
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* 2022-03-16 Miaowulue change prompt message
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*/
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#include "board.h"
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#include "drv_sdio.h"
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#include <dfs_fs.h>
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#ifdef BSP_USING_SDMMC
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#define DBG_TAG "drv.sdio"
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#ifdef DRV_DEBUG
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#define DBG_LVL DBG_LOG
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#else
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#define DBG_LVL DBG_INFO
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#endif /* DRV_DEBUG */
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#include <rtdbg.h>
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static struct rt_mmcsd_host *host;
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#define SDIO_TX_RX_COMPLETE_TIMEOUT_LOOPS (100000)
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struct sdio_pkg
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{
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struct rt_mmcsd_cmd *cmd;
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void *buff;
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rt_uint32_t flag;
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};
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struct rthw_sdio
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{
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struct rt_mmcsd_host *host;
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struct stm32_sdio_des sdio_des;
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struct rt_event event;
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struct sdio_pkg *pkg;
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};
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ALIGN(SDIO_ALIGN_LEN)
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static rt_uint8_t cache_buf[SDIO_BUFF_SIZE];
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/**
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* @brief This function get order from sdio.
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* @param data
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* @retval sdio order
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*/
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static int get_order(rt_uint32_t data)
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{
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int order = 0;
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switch (data)
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{
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case 1:
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order = 0;
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break;
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case 2:
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order = 1;
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break;
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case 4:
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order = 2;
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break;
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case 8:
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order = 3;
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break;
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case 16:
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order = 4;
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break;
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case 32:
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order = 5;
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break;
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case 64:
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order = 6;
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break;
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case 128:
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order = 7;
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break;
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case 256:
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order = 8;
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break;
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case 512:
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order = 9;
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break;
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case 1024:
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order = 10;
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break;
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case 2048:
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order = 11;
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break;
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case 4096:
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order = 12;
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break;
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case 8192:
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order = 13;
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break;
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case 16384:
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order = 14;
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break;
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default :
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order = 0;
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break;
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}
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return order;
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}
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/**
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* @brief This function wait sdio cmd completed.
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* @param sdio rthw_sdio
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* @retval None
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*/
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static void rthw_sdio_wait_completed(struct rthw_sdio *sdio)
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{
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rt_uint32_t status;
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struct rt_mmcsd_cmd *cmd = sdio->pkg->cmd;
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struct stm32_sdio *hw_sdio = sdio->sdio_des.hw_sdio;
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if (rt_event_recv(&sdio->event, 0xffffffff, RT_EVENT_FLAG_OR | RT_EVENT_FLAG_CLEAR,
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rt_tick_from_millisecond(5000), &status) != RT_EOK)
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{
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LOG_E("wait cmd completed timeout");
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cmd->err = -RT_ETIMEOUT;
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return;
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}
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cmd->resp[0] = hw_sdio->resp1;
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if (resp_type(cmd) == RESP_R2)
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{
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cmd->resp[1] = hw_sdio->resp2;
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cmd->resp[2] = hw_sdio->resp3;
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cmd->resp[3] = hw_sdio->resp4;
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}
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if (status & SDIO_ERRORS)
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{
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if ((status & SDMMC_STA_CCRCFAIL) && (resp_type(cmd) & (RESP_R3 | RESP_R4)))
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{
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cmd->err = RT_EOK;
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}
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else
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{
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cmd->err = -RT_ERROR;
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}
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}
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if (cmd->err == RT_EOK)
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{
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LOG_D("sta:0x%08X [%08X %08X %08X %08X]", status, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]);
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}
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else
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{
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LOG_D("send command error = %d", cmd->err);
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}
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}
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/**
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* @brief This function send command.
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* @param sdio rthw_sdio
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* @param pkg sdio package
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* @retval None
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*/
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static void rthw_sdio_send_command(struct rthw_sdio *sdio, struct sdio_pkg *pkg)
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{
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struct rt_mmcsd_cmd *cmd = pkg->cmd;
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struct rt_mmcsd_data *data = cmd->data;
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struct stm32_sdio *hw_sdio = sdio->sdio_des.hw_sdio;
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rt_uint32_t reg_cmd;
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/* save pkg */
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sdio->pkg = pkg;
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LOG_D("CMD:%d ARG:0x%08x RES:%s%s%s%s%s%s%s%s%s rw:%c len:%d blksize:%d\n",
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cmd->cmd_code,
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cmd->arg,
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resp_type(cmd) == RESP_NONE ? "NONE" : "",
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resp_type(cmd) == RESP_R1 ? "R1" : "",
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resp_type(cmd) == RESP_R1B ? "R1B" : "",
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resp_type(cmd) == RESP_R2 ? "R2" : "",
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resp_type(cmd) == RESP_R3 ? "R3" : "",
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resp_type(cmd) == RESP_R4 ? "R4" : "",
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resp_type(cmd) == RESP_R5 ? "R5" : "",
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resp_type(cmd) == RESP_R6 ? "R6" : "",
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resp_type(cmd) == RESP_R7 ? "R7" : "",
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data ? (data->flags & DATA_DIR_WRITE ? 'w' : 'r') : '-',
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data ? data->blks * data->blksize : 0,
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data ? data->blksize : 0
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);
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hw_sdio->mask |= SDIO_MASKR_ALL;
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reg_cmd = cmd->cmd_code | SDMMC_CMD_CPSMEN;
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/* data pre configuration */
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if (data != RT_NULL)
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{
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SCB_CleanInvalidateDCache();
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reg_cmd |= SDMMC_CMD_CMDTRANS;
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hw_sdio->mask &= ~(SDMMC_MASK_CMDRENDIE | SDMMC_MASK_CMDSENTIE);
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hw_sdio->dtimer = HW_SDIO_DATATIMEOUT;
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hw_sdio->dlen = data->blks * data->blksize;
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hw_sdio->dctrl = (get_order(data->blksize)<<4) | (data->flags & DATA_DIR_READ ? SDMMC_DCTRL_DTDIR : 0);
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hw_sdio->idmabase0r = (rt_uint32_t)cache_buf;
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hw_sdio->idmatrlr = SDMMC_IDMA_IDMAEN;
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}
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if (resp_type(cmd) == RESP_R2)
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reg_cmd |= SDMMC_CMD_WAITRESP;
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else if(resp_type(cmd) != RESP_NONE)
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reg_cmd |= SDMMC_CMD_WAITRESP_0;
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hw_sdio->arg = cmd->arg;
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hw_sdio->cmd = reg_cmd;
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/* wait completed */
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rthw_sdio_wait_completed(sdio);
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/* Waiting for data to be sent to completion */
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if (data != RT_NULL)
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{
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volatile rt_uint32_t count = SDIO_TX_RX_COMPLETE_TIMEOUT_LOOPS;
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while (count && (hw_sdio->sta & SDMMC_STA_DPSMACT))
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{
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count--;
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}
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if ((count == 0) || (hw_sdio->sta & SDIO_ERRORS))
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{
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cmd->err = -RT_ERROR;
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}
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}
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/* data post configuration */
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if (data != RT_NULL)
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{
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if (data->flags & DATA_DIR_READ)
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{
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rt_memcpy(data->buf, cache_buf, data->blks * data->blksize);
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SCB_CleanInvalidateDCache();
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}
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}
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}
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/**
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* @brief This function send sdio request.
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* @param sdio rthw_sdio
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* @param req request
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* @retval None
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*/
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static void rthw_sdio_request(struct rt_mmcsd_host *host, struct rt_mmcsd_req *req)
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{
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struct sdio_pkg pkg;
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struct rthw_sdio *sdio = host->private_data;
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struct rt_mmcsd_data *data;
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if (req->cmd != RT_NULL)
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{
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rt_memset(&pkg, 0, sizeof(pkg));
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data = req->cmd->data;
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pkg.cmd = req->cmd;
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if (data != RT_NULL)
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{
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rt_uint32_t size = data->blks * data->blksize;
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RT_ASSERT(size <= SDIO_BUFF_SIZE);
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if (data->flags & DATA_DIR_WRITE)
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{
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rt_memcpy(cache_buf, data->buf, size);
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}
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}
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rthw_sdio_send_command(sdio, &pkg);
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}
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if (req->stop != RT_NULL)
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{
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rt_memset(&pkg, 0, sizeof(pkg));
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pkg.cmd = req->stop;
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rthw_sdio_send_command(sdio, &pkg);
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}
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mmcsd_req_complete(sdio->host);
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}
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/**
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* @brief This function interrupt process function.
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* @param host rt_mmcsd_host
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* @retval None
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*/
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void rthw_sdio_irq_process(struct rt_mmcsd_host *host)
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{
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struct rthw_sdio *sdio = host->private_data;
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struct stm32_sdio *hw_sdio = sdio->sdio_des.hw_sdio;
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rt_uint32_t intstatus = hw_sdio->sta;
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/* clear irq flag*/
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hw_sdio->icr = intstatus;
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rt_event_send(&sdio->event, intstatus);
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}
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/**
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* @brief This function config sdio.
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* @param host rt_mmcsd_host
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* @param io_cfg rt_mmcsd_io_cfg
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* @retval None
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*/
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static void rthw_sdio_iocfg(struct rt_mmcsd_host *host, struct rt_mmcsd_io_cfg *io_cfg)
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{
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rt_uint32_t temp, clk_src;
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rt_uint32_t clk = io_cfg->clock;
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struct rthw_sdio *sdio = host->private_data;
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struct stm32_sdio *hw_sdio = sdio->sdio_des.hw_sdio;
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LOG_D("clk:%dK width:%s%s%s power:%s%s%s",
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clk/1000,
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io_cfg->bus_width == MMCSD_BUS_WIDTH_8 ? "8" : "",
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io_cfg->bus_width == MMCSD_BUS_WIDTH_4 ? "4" : "",
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io_cfg->bus_width == MMCSD_BUS_WIDTH_1 ? "1" : "",
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io_cfg->power_mode == MMCSD_POWER_OFF ? "OFF" : "",
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io_cfg->power_mode == MMCSD_POWER_UP ? "UP" : "",
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io_cfg->power_mode == MMCSD_POWER_ON ? "ON" : ""
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);
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clk_src = SDIO_CLOCK_FREQ;
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if (clk > 0)
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{
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if (clk > host->freq_max)
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clk = host->freq_max;
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temp = DIV_ROUND_UP(clk_src, 2 * clk);
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if (temp > 0x3FF)
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temp = 0x3FF;
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}
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if (io_cfg->bus_width == MMCSD_BUS_WIDTH_4)
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temp |= SDMMC_CLKCR_WIDBUS_0;
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else if (io_cfg->bus_width == MMCSD_BUS_WIDTH_8)
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temp |= SDMMC_CLKCR_WIDBUS_1;
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hw_sdio->clkcr = temp;
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if (io_cfg->power_mode == MMCSD_POWER_ON)
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hw_sdio->power |= SDMMC_POWER_PWRCTRL;
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}
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static const struct rt_mmcsd_host_ops ops =
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{
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rthw_sdio_request,
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rthw_sdio_iocfg,
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RT_NULL,
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RT_NULL,
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};
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/**
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* @brief This function create mmcsd host.
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* @param sdio_des stm32_sdio_des
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* @retval rt_mmcsd_host
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*/
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struct rt_mmcsd_host *sdio_host_create(struct stm32_sdio_des *sdio_des)
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{
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struct rt_mmcsd_host *host;
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struct rthw_sdio *sdio = RT_NULL;
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if (sdio_des == RT_NULL)
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{
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return RT_NULL;
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}
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sdio = rt_malloc(sizeof(struct rthw_sdio));
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if (sdio == RT_NULL)
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{
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LOG_E("malloc rthw_sdio fail");
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return RT_NULL;
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}
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rt_memset(sdio, 0, sizeof(struct rthw_sdio));
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host = mmcsd_alloc_host();
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if (host == RT_NULL)
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{
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LOG_E("alloc host fail");
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goto err;
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}
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rt_memcpy(&sdio->sdio_des, sdio_des, sizeof(struct stm32_sdio_des));
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sdio->sdio_des.hw_sdio = (struct stm32_sdio *)SDIO_BASE_ADDRESS;
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rt_event_init(&sdio->event, "sdio", RT_IPC_FLAG_FIFO);
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/* set host default attributes */
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host->ops = &ops;
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host->freq_min = 400 * 1000;
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host->freq_max = SDIO_MAX_FREQ;
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host->valid_ocr = VDD_32_33 | VDD_33_34;/* The voltage range supported is 3.2v-3.4v */
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#ifndef SDIO_USING_1_BIT
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host->flags = MMCSD_BUSWIDTH_4 | MMCSD_MUTBLKWRITE | MMCSD_SUP_HIGHSPEED;
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#else
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host->flags = MMCSD_MUTBLKWRITE | MMCSD_SUP_HIGHSPEED;
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#endif
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host->max_seg_size = SDIO_BUFF_SIZE;
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host->max_dma_segs = 1;
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host->max_blk_size = 512;
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host->max_blk_count = 512;
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/* link up host and sdio */
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sdio->host = host;
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host->private_data = sdio;
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/* ready to change */
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mmcsd_change(host);
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return host;
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err:
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if (sdio) rt_free(sdio);
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return RT_NULL;
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}
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void SDMMC1_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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/* Process All SDIO Interrupt Sources */
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rthw_sdio_irq_process(host);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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int rt_hw_sdio_init(void)
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{
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struct stm32_sdio_des sdio_des;
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SD_HandleTypeDef hsd;
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hsd.Instance = SDMMC1;
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HAL_SD_MspInit(&hsd);
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host = sdio_host_create(&sdio_des);
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if (host == RT_NULL)
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{
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LOG_E("host create fail");
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return RT_NULL;
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}
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return 0;
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}
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INIT_DEVICE_EXPORT(rt_hw_sdio_init);
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int mnt_init(void)
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{
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rt_thread_delay(RT_TICK_PER_SECOND);
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#ifdef RT_USING_DFS_ROMFS
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if (dfs_mount("sd0", "/SD", "elm", 0, 0) == RT_EOK)
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#else
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if (dfs_mount("sd0", "/", "elm", 0, 0) == RT_EOK)
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#endif
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{
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rt_kprintf("Mount sd card successfully!\n");
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}
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||||
else
|
||||
{
|
||||
rt_kprintf("Mount sd card fail!\n");
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
INIT_APP_EXPORT(mnt_init);
|
||||
|
||||
#endif /* BSP_USING_SDMMC */
|
|
@ -0,0 +1,106 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2022, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020-05-23 liuduanfei first version
|
||||
*/
|
||||
|
||||
#ifndef __DRV_SDIO_H__
|
||||
#define __DRV_SDIO_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include "rtdevice.h"
|
||||
#include <rthw.h>
|
||||
#include <drv_common.h>
|
||||
#include <string.h>
|
||||
#include <drivers/mmcsd_core.h>
|
||||
#include <drivers/sdio.h>
|
||||
|
||||
#define SDIO_BUFF_SIZE 4096
|
||||
#define SDIO_ALIGN_LEN 32
|
||||
|
||||
#ifndef SDIO_BASE_ADDRESS
|
||||
#define SDIO_BASE_ADDRESS (0x52007000)
|
||||
#endif
|
||||
|
||||
#ifndef SDIO_CLOCK_FREQ
|
||||
#define SDIO_CLOCK_FREQ (200U * 1000 * 1000)
|
||||
#endif
|
||||
|
||||
#ifndef SDIO_BUFF_SIZE
|
||||
#define SDIO_BUFF_SIZE (4096)
|
||||
#endif
|
||||
|
||||
#ifndef SDIO_ALIGN_LEN
|
||||
#define SDIO_ALIGN_LEN (32)
|
||||
#endif
|
||||
|
||||
#ifndef SDIO_MAX_FREQ
|
||||
#define SDIO_MAX_FREQ (25 * 1000 * 1000)
|
||||
#endif
|
||||
|
||||
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
|
||||
|
||||
#define SDIO_ERRORS \
|
||||
(SDMMC_STA_IDMATE | SDMMC_STA_ACKTIMEOUT | \
|
||||
SDMMC_STA_RXOVERR | SDMMC_STA_TXUNDERR | \
|
||||
SDMMC_STA_DTIMEOUT | SDMMC_STA_CTIMEOUT | \
|
||||
SDMMC_STA_DCRCFAIL | SDMMC_STA_CCRCFAIL)
|
||||
|
||||
#define SDIO_MASKR_ALL \
|
||||
(SDMMC_MASK_CCRCFAILIE | SDMMC_MASK_DCRCFAILIE | SDMMC_MASK_CTIMEOUTIE | \
|
||||
SDMMC_MASK_TXUNDERRIE | SDMMC_MASK_RXOVERRIE | SDMMC_MASK_CMDRENDIE | \
|
||||
SDMMC_MASK_CMDSENTIE | SDMMC_MASK_DATAENDIE | SDMMC_MASK_ACKTIMEOUTIE)
|
||||
|
||||
#define HW_SDIO_DATATIMEOUT (0xFFFFFFFFU)
|
||||
|
||||
struct stm32_sdio
|
||||
{
|
||||
volatile rt_uint32_t power; /* offset 0x00 */
|
||||
volatile rt_uint32_t clkcr; /* offset 0x04 */
|
||||
volatile rt_uint32_t arg; /* offset 0x08 */
|
||||
volatile rt_uint32_t cmd; /* offset 0x0C */
|
||||
volatile rt_uint32_t respcmd; /* offset 0x10 */
|
||||
volatile rt_uint32_t resp1; /* offset 0x14 */
|
||||
volatile rt_uint32_t resp2; /* offset 0x18 */
|
||||
volatile rt_uint32_t resp3; /* offset 0x1C */
|
||||
volatile rt_uint32_t resp4; /* offset 0x20 */
|
||||
volatile rt_uint32_t dtimer; /* offset 0x24 */
|
||||
volatile rt_uint32_t dlen; /* offset 0x28 */
|
||||
volatile rt_uint32_t dctrl; /* offset 0x2C */
|
||||
volatile rt_uint32_t dcount; /* offset 0x30 */
|
||||
volatile rt_uint32_t sta; /* offset 0x34 */
|
||||
volatile rt_uint32_t icr; /* offset 0x38 */
|
||||
volatile rt_uint32_t mask; /* offset 0x3C */
|
||||
volatile rt_uint32_t acktimer; /* offset 0x40 */
|
||||
volatile rt_uint32_t reserved0[3]; /* offset 0x44 ~ 0x4C */
|
||||
volatile rt_uint32_t idmatrlr; /* offset 0x50 */
|
||||
volatile rt_uint32_t idmabsizer; /* offset 0x54 */
|
||||
volatile rt_uint32_t idmabase0r; /* offset 0x58 */
|
||||
volatile rt_uint32_t idmabase1r; /* offset 0x5C */
|
||||
volatile rt_uint32_t reserved1[8]; /* offset 0x60 ~ 7C */
|
||||
volatile rt_uint32_t fifo; /* offset 0x80 */
|
||||
};
|
||||
|
||||
typedef rt_uint32_t (*sdio_clk_get)(struct stm32_sdio *hw_sdio);
|
||||
|
||||
struct stm32_sdio_des
|
||||
{
|
||||
struct stm32_sdio *hw_sdio;
|
||||
sdio_clk_get clk_get;
|
||||
};
|
||||
|
||||
/* stm32 sdio dirver class */
|
||||
struct stm32_sdio_class
|
||||
{
|
||||
struct stm32_sdio_des *des;
|
||||
const struct stm32_sdio_config *cfg;
|
||||
struct rt_mmcsd_host host;
|
||||
};
|
||||
|
||||
extern void stm32_mmcsd_change(void);
|
||||
|
||||
#endif /* __DRV_SDIO_H__ */
|
Loading…
Reference in New Issue