forked from xuos/xiuos
add g_uart_selected array for ch438
This commit is contained in:
parent
52aa3c5abd
commit
00e0a48ee7
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@ -36,8 +36,6 @@ void CH438Demo(void)
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char buffer[256];
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char buffer[256];
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int readlen;
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int readlen;
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// while(1)
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// {
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fd = open("/dev/extuart_dev3", O_RDWR);
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fd = open("/dev/extuart_dev3", O_RDWR);
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m0fd = open("/dev/gpout0", O_RDWR);
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m0fd = open("/dev/gpout0", O_RDWR);
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m1fd = open("/dev/gpout1", O_RDWR);
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m1fd = open("/dev/gpout1", O_RDWR);
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@ -82,6 +80,5 @@ void CH438Demo(void)
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}
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}
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close(fd);
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close(fd);
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// }
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}
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}
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@ -53,8 +53,8 @@ static int ch438_register(FAR const char *devpath, uint8_t ext_uart_no);
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****************************************************************************/
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****************************************************************************/
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struct ch438_dev_s
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struct ch438_dev_s
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{
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{
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sem_t devsem; /* ch438 port devsem */
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sem_t devsem; /* ch438 port devsem */
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uint8_t port; /* ch438 port number*/
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uint8_t port; /* ch438 port number*/
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};
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};
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/****************************************************************************
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/****************************************************************************
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@ -64,27 +64,56 @@ struct ch438_dev_s
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/*mutex of corresponding port*/
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/*mutex of corresponding port*/
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static pthread_mutex_t mutex[CH438PORTNUM] =
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static pthread_mutex_t mutex[CH438PORTNUM] =
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{
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{
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PTHREAD_MUTEX_INITIALIZER,
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PTHREAD_MUTEX_INITIALIZER,
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PTHREAD_MUTEX_INITIALIZER,
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PTHREAD_MUTEX_INITIALIZER,
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PTHREAD_MUTEX_INITIALIZER,
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PTHREAD_MUTEX_INITIALIZER,
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PTHREAD_MUTEX_INITIALIZER,
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PTHREAD_MUTEX_INITIALIZER,
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PTHREAD_MUTEX_INITIALIZER,
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PTHREAD_MUTEX_INITIALIZER,
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PTHREAD_MUTEX_INITIALIZER,
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PTHREAD_MUTEX_INITIALIZER,
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PTHREAD_MUTEX_INITIALIZER,
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PTHREAD_MUTEX_INITIALIZER,
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PTHREAD_MUTEX_INITIALIZER
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PTHREAD_MUTEX_INITIALIZER
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};
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};
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/* Condition variable of corresponding port */
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/* Condition variable of corresponding port */
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static pthread_cond_t cond[CH438PORTNUM] =
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static pthread_cond_t cond[CH438PORTNUM] =
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{
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{
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PTHREAD_COND_INITIALIZER,
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PTHREAD_COND_INITIALIZER,
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PTHREAD_COND_INITIALIZER,
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PTHREAD_COND_INITIALIZER,
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PTHREAD_COND_INITIALIZER,
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PTHREAD_COND_INITIALIZER,
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PTHREAD_COND_INITIALIZER,
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PTHREAD_COND_INITIALIZER,
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PTHREAD_COND_INITIALIZER,
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PTHREAD_COND_INITIALIZER,
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PTHREAD_COND_INITIALIZER,
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PTHREAD_COND_INITIALIZER,
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PTHREAD_COND_INITIALIZER,
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PTHREAD_COND_INITIALIZER,
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PTHREAD_COND_INITIALIZER
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PTHREAD_COND_INITIALIZER
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};
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/* This array shows whether the current serial port is selected */
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static bool const g_uart_selected[CH438PORTNUM] =
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{
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#ifdef CONFIG_CH438_EXTUART0
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[0] = true,
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#endif
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#ifdef CONFIG_CH438_EXTUART1
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[1] = true,
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#endif
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#ifdef CONFIG_CH438_EXTUART2
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[2] = true,
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#endif
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#ifdef CONFIG_CH438_EXTUART3
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[3] = true,
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#endif
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#ifdef CONFIG_CH438_EXTUART4
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[4] = true,
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#endif
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#ifdef CONFIG_CH438_EXTUART5
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[5] = true,
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#endif
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#ifdef CONFIG_CH438_EXTUART6
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[6] = true,
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#endif
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#ifdef CONFIG_CH438_EXTUART7
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[7] = true,
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#endif
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};
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};
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/* ch438 Callback work queue structure */
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/* ch438 Callback work queue structure */
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@ -108,13 +137,13 @@ static volatile bool g_ch438open[CH438PORTNUM] = {false,false,false,false,false,
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/* Ch438 POSIX interface */
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/* Ch438 POSIX interface */
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static const struct file_operations g_ch438fops =
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static const struct file_operations g_ch438fops =
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{
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{
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ch438_open,
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ch438_open,
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ch438_close,
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ch438_close,
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ch438_read,
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ch438_read,
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ch438_write,
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ch438_write,
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NULL,
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NULL,
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ch438_ioctl,
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ch438_ioctl,
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NULL
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NULL
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};
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};
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/****************************************************************************
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/****************************************************************************
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@ -135,7 +164,7 @@ static FAR void getInterruptStatus(FAR void *arg)
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{
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{
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for(i = 0; i < CH438PORTNUM; i++)
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for(i = 0; i < CH438PORTNUM; i++)
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{
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{
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if(gInterruptStatus & Interruptnum[i])
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if(g_uart_selected[i] && (gInterruptStatus & Interruptnum[i]))
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{
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{
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pthread_mutex_lock(&mutex[i]);
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pthread_mutex_lock(&mutex[i]);
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done[i] = true;
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done[i] = true;
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@ -183,7 +212,7 @@ static void CH438SetInput(void)
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imxrt_config_gpio(CH438_D4_PIN_INPUT);
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imxrt_config_gpio(CH438_D4_PIN_INPUT);
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imxrt_config_gpio(CH438_D5_PIN_INPUT);
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imxrt_config_gpio(CH438_D5_PIN_INPUT);
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imxrt_config_gpio(CH438_D6_PIN_INPUT);
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imxrt_config_gpio(CH438_D6_PIN_INPUT);
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imxrt_config_gpio(CH438_D7_PIN_INPUT);
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imxrt_config_gpio(CH438_D7_PIN_INPUT);
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}
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}
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/****************************************************************************
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/****************************************************************************
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@ -214,13 +243,13 @@ static uint8_t ReadCH438Data(uint8_t addr)
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up_udelay(1);
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up_udelay(1);
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imxrt_gpio_write(CH438_ALE_PIN, false);
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imxrt_gpio_write(CH438_ALE_PIN, false);
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up_udelay(1);
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up_udelay(1);
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CH438SetInput();
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CH438SetInput();
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up_udelay(1);
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up_udelay(1);
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imxrt_gpio_write(CH438_NRD_PIN, false);
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imxrt_gpio_write(CH438_NRD_PIN, false);
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up_udelay(1);
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up_udelay(1);
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if (imxrt_gpio_read(CH438_D7_PIN_INPUT)) dat |= 0x80;
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if (imxrt_gpio_read(CH438_D7_PIN_INPUT)) dat |= 0x80;
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@ -232,8 +261,8 @@ static uint8_t ReadCH438Data(uint8_t addr)
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if (imxrt_gpio_read(CH438_D1_PIN_INPUT)) dat |= 0x02;
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if (imxrt_gpio_read(CH438_D1_PIN_INPUT)) dat |= 0x02;
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if (imxrt_gpio_read(CH438_D0_PIN_INPUT)) dat |= 0x01;
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if (imxrt_gpio_read(CH438_D0_PIN_INPUT)) dat |= 0x01;
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imxrt_gpio_write(CH438_NRD_PIN, true);
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imxrt_gpio_write(CH438_NRD_PIN, true);
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imxrt_gpio_write(CH438_ALE_PIN, true);
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imxrt_gpio_write(CH438_ALE_PIN, true);
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up_udelay(1);
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up_udelay(1);
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return dat;
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return dat;
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@ -263,12 +292,12 @@ static void WriteCH438Data(uint8_t addr, uint8_t dat)
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if(addr &0x04) imxrt_gpio_write(CH438_D2_PIN_OUT, true); else imxrt_gpio_write(CH438_D2_PIN_OUT, false);
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if(addr &0x04) imxrt_gpio_write(CH438_D2_PIN_OUT, true); else imxrt_gpio_write(CH438_D2_PIN_OUT, false);
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if(addr &0x02) imxrt_gpio_write(CH438_D1_PIN_OUT, true); else imxrt_gpio_write(CH438_D1_PIN_OUT, false);
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if(addr &0x02) imxrt_gpio_write(CH438_D1_PIN_OUT, true); else imxrt_gpio_write(CH438_D1_PIN_OUT, false);
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if(addr &0x01) imxrt_gpio_write(CH438_D0_PIN_OUT, true); else imxrt_gpio_write(CH438_D0_PIN_OUT, false);
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if(addr &0x01) imxrt_gpio_write(CH438_D0_PIN_OUT, true); else imxrt_gpio_write(CH438_D0_PIN_OUT, false);
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up_udelay(1);
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up_udelay(1);
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imxrt_gpio_write(CH438_ALE_PIN, false);
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imxrt_gpio_write(CH438_ALE_PIN, false);
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up_udelay(1);
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up_udelay(1);
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if(dat &0x80) imxrt_gpio_write(CH438_D7_PIN_OUT, true); else imxrt_gpio_write(CH438_D7_PIN_OUT, false);
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if(dat &0x80) imxrt_gpio_write(CH438_D7_PIN_OUT, true); else imxrt_gpio_write(CH438_D7_PIN_OUT, false);
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if(dat &0x40) imxrt_gpio_write(CH438_D6_PIN_OUT, true); else imxrt_gpio_write(CH438_D6_PIN_OUT, false);
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if(dat &0x40) imxrt_gpio_write(CH438_D6_PIN_OUT, true); else imxrt_gpio_write(CH438_D6_PIN_OUT, false);
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if(dat &0x20) imxrt_gpio_write(CH438_D5_PIN_OUT, true); else imxrt_gpio_write(CH438_D5_PIN_OUT, false);
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if(dat &0x20) imxrt_gpio_write(CH438_D5_PIN_OUT, true); else imxrt_gpio_write(CH438_D5_PIN_OUT, false);
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@ -394,7 +423,7 @@ static void ImxrtCH438Init(void)
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imxrt_gpio_write(CH438_NWR_PIN,true);
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imxrt_gpio_write(CH438_NWR_PIN,true);
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imxrt_gpio_write(CH438_NRD_PIN,true);
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imxrt_gpio_write(CH438_NRD_PIN,true);
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imxrt_gpio_write(CH438_ALE_PIN,true);
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imxrt_gpio_write(CH438_ALE_PIN,true);
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}
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}
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/****************************************************************************
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/****************************************************************************
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* Name: CH438PortInit
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* Name: CH438PortInit
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@ -413,18 +442,18 @@ static void CH438PortInit(uint8_t ext_uart_no, uint32_t baud_rate)
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uint8_t REG_IER_ADDR;
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uint8_t REG_IER_ADDR;
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uint8_t REG_MCR_ADDR;
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uint8_t REG_MCR_ADDR;
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uint8_t REG_FCR_ADDR;
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uint8_t REG_FCR_ADDR;
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REG_LCR_ADDR = offsetadd[ext_uart_no] | REG_LCR0_ADDR;
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REG_LCR_ADDR = offsetadd[ext_uart_no] | REG_LCR0_ADDR;
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REG_DLL_ADDR = offsetadd[ext_uart_no] | REG_DLL0_ADDR;
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REG_DLL_ADDR = offsetadd[ext_uart_no] | REG_DLL0_ADDR;
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REG_DLM_ADDR = offsetadd[ext_uart_no] | REG_DLM0_ADDR;
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REG_DLM_ADDR = offsetadd[ext_uart_no] | REG_DLM0_ADDR;
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REG_IER_ADDR = offsetadd[ext_uart_no] | REG_IER0_ADDR;
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REG_IER_ADDR = offsetadd[ext_uart_no] | REG_IER0_ADDR;
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REG_MCR_ADDR = offsetadd[ext_uart_no] | REG_MCR0_ADDR;
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REG_MCR_ADDR = offsetadd[ext_uart_no] | REG_MCR0_ADDR;
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REG_FCR_ADDR = offsetadd[ext_uart_no] | REG_FCR0_ADDR;
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REG_FCR_ADDR = offsetadd[ext_uart_no] | REG_FCR0_ADDR;
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/* reset the uart */
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/* reset the uart */
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WriteCH438Data(REG_IER_ADDR, BIT_IER_RESET);
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WriteCH438Data(REG_IER_ADDR, BIT_IER_RESET);
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up_mdelay(50);
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up_mdelay(50);
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dlab = ReadCH438Data(REG_IER_ADDR);
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dlab = ReadCH438Data(REG_IER_ADDR);
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dlab &= 0xDF;
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dlab &= 0xDF;
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WriteCH438Data(REG_IER_ADDR, dlab);
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WriteCH438Data(REG_IER_ADDR, dlab);
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@ -455,7 +484,7 @@ static void CH438PortInit(uint8_t ext_uart_no, uint32_t baud_rate)
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WriteCH438Data(REG_MCR_ADDR, BIT_MCR_OUT2);
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WriteCH438Data(REG_MCR_ADDR, BIT_MCR_OUT2);
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/* release the data in FIFO */
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/* release the data in FIFO */
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WriteCH438Data(REG_FCR_ADDR, ReadCH438Data(REG_FCR_ADDR)| BIT_FCR_TFIFORST);
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WriteCH438Data(REG_FCR_ADDR, ReadCH438Data(REG_FCR_ADDR)| BIT_FCR_TFIFORST);
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}
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}
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/****************************************************************************
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/****************************************************************************
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@ -483,8 +512,8 @@ static int ImxrtCh438WriteData(uint8_t ext_uart_no, char *write_buffer, size_t s
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{
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{
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Ch438UartSend(ext_uart_no, write_buffer + i * 256, 256);
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Ch438UartSend(ext_uart_no, write_buffer + i * 256, 256);
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}
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}
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}
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}
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else
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else
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{
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{
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write_index = 0;
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write_index = 0;
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while(write_len_continue > 256)
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while(write_len_continue > 256)
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@ -496,7 +525,7 @@ static int ImxrtCh438WriteData(uint8_t ext_uart_no, char *write_buffer, size_t s
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Ch438UartSend(ext_uart_no, write_buffer + write_index * 256, write_len_continue);
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Ch438UartSend(ext_uart_no, write_buffer + write_index * 256, write_len_continue);
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}
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}
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}
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}
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else
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else
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{
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{
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Ch438UartSend(ext_uart_no, write_buffer, write_len);
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Ch438UartSend(ext_uart_no, write_buffer, write_len);
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}
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}
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@ -530,7 +559,7 @@ static size_t ImxrtCh438ReadData(uint8_t ext_uart_no, size_t size)
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/* Read the interrupt status of the serial port */
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/* Read the interrupt status of the serial port */
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InterruptStatus = ReadCH438Data(REG_IIR_ADDR) & 0x0f;
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InterruptStatus = ReadCH438Data(REG_IIR_ADDR) & 0x0f;
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ch438info("InterruptStatus is %d\n", InterruptStatus);
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ch438info("InterruptStatus is %d\n", InterruptStatus);
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switch(InterruptStatus)
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switch(InterruptStatus)
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{
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{
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case INT_NOINT: /* no interrupt */
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case INT_NOINT: /* no interrupt */
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@ -572,6 +601,11 @@ static void Ch438InitDefault(void)
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/* Initialize the mutex */
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/* Initialize the mutex */
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for(i = 0; i < CH438PORTNUM; i++)
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for(i = 0; i < CH438PORTNUM; i++)
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{
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{
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if(!g_uart_selected[i])
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{
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continue;
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}
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ret = pthread_mutex_init(&mutex[i], NULL);
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ret = pthread_mutex_init(&mutex[i], NULL);
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if(ret != 0)
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if(ret != 0)
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{
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{
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@ -582,13 +616,18 @@ static void Ch438InitDefault(void)
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/* Initialize the condition variable */
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/* Initialize the condition variable */
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for(i = 0; i < CH438PORTNUM; i++)
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for(i = 0; i < CH438PORTNUM; i++)
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{
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{
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if(!g_uart_selected[i])
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{
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continue;
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}
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ret = pthread_cond_init(&cond[i], NULL);
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ret = pthread_cond_init(&cond[i], NULL);
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if(ret != 0)
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if(ret != 0)
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{
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{
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ch438err("pthread_cond_init failed, status=%d\n", ret);
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ch438err("pthread_cond_init failed, status=%d\n", ret);
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}
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}
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}
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}
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ImxrtCH438Init();
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ImxrtCH438Init();
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CH438PortInit(0,115200);
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CH438PortInit(0,115200);
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CH438PortInit(1,115200);
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CH438PortInit(1,115200);
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