From 002325c1d8eacffa23ebe4dbe044319e210671a6 Mon Sep 17 00:00:00 2001 From: wuzheng Date: Fri, 17 Feb 2023 16:21:06 +0800 Subject: [PATCH] add flash and timer driver for hc32f4a0 --- APP_Framework/Applications/app_test/Kconfig | 14 + APP_Framework/Applications/app_test/Makefile | 6 +- .../Applications/app_test/test_flash.c | 35 +++ .../Applications/app_test/test_hwtimer.c | 43 ++- APP_Framework/Framework/knowing/Makefile | 2 +- .../knowing/tensorflow-lite/Makefile | 6 +- .../sensor/winddirection/qs-fx/qs-fx.c | 14 +- .../Framework/sensor/windspeed/qs-fs/qs-fs.c | 13 +- .../transform_layer/xizi/transform.c | 2 + .../transform_layer/xizi/transform.h | 2 + .../arm/cortex-m4/hc32f4a0/interrupt_vector.S | 60 ++-- Ubiquitous/XiZi_IIoT/board/hc32f4a0/board.c | 7 + .../board/hc32f4a0/third_party_driver/Kconfig | 8 + .../hc32f4a0/third_party_driver/Makefile | 4 + .../common/hc32_ll_driver/src/Makefile | 4 + .../third_party_driver/gpio/connect_gpio.c | 5 +- .../include/connect_flash.h | 40 +++ .../include/connect_hwtimer.h | 40 +++ .../hc32f4a0/third_party_driver/spi/Kconfig | 19 ++ .../hc32f4a0/third_party_driver/spi/Makefile | 4 + .../third_party_driver/spi/connect_flash.c | 260 ++++++++++++++++++ .../third_party_driver/spi/connect_spi.c | 10 +- .../hc32f4a0/third_party_driver/timer/Kconfig | 16 ++ .../third_party_driver/timer/Makefile | 3 + .../timer/connect_hwtimer.c | 189 +++++++++++++ .../kernel/kernel_test/test_realtime.c | 78 ++++-- Ubiquitous/XiZi_IIoT/kernel/thread/init.c | 7 + .../spi/third_party_spi/SFUD/sfud/src/sfud.c | 2 +- 28 files changed, 806 insertions(+), 87 deletions(-) create mode 100644 APP_Framework/Applications/app_test/test_flash.c create mode 100644 Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/include/connect_flash.h create mode 100644 Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/include/connect_hwtimer.h create mode 100644 Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/spi/connect_flash.c create mode 100644 Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/timer/Kconfig create mode 100644 Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/timer/Makefile create mode 100644 Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/timer/connect_hwtimer.c diff --git a/APP_Framework/Applications/app_test/Kconfig b/APP_Framework/Applications/app_test/Kconfig index 12537ed19..8a53bddac 100644 --- a/APP_Framework/Applications/app_test/Kconfig +++ b/APP_Framework/Applications/app_test/Kconfig @@ -111,6 +111,9 @@ menu "test app" default n if USER_TEST_HWTIMER if ADD_XIZI_FETURES + config HWTIMER_TIMER_DEV_DRIVER + string "Set pin dev path" + default "/dev/timer0_dev0" config HWTIMER_PIN_DEV_DRIVER string "Set pin dev path" default "/dev/pin_dev" @@ -209,6 +212,17 @@ menu "test app" endchoice endif endif + + menuconfig USER_TEST_FLASH + bool "Config test w25q128 device" + default n + if USER_TEST_FLASH + if ADD_XIZI_FETURES + config FLASH_DEV_DRIVER + string "Set flash dev path" + default "/dev/qspi_W25Q128" + endif + endif endif endmenu diff --git a/APP_Framework/Applications/app_test/Makefile b/APP_Framework/Applications/app_test/Makefile index 74d981eac..5f8466d24 100644 --- a/APP_Framework/Applications/app_test/Makefile +++ b/APP_Framework/Applications/app_test/Makefile @@ -87,7 +87,11 @@ ifeq ($(CONFIG_ADD_XIZI_FETURES),y) ifeq ($(CONFIG_USER_TEST_ETHERNET),y) SRC_FILES += test_ethernet.c - endif + endif + + ifeq ($(CONFIG_USER_TEST_FLASH),y) + SRC_FILES += test_flash.c + endif include $(KERNEL_ROOT)/compiler.mk endif diff --git a/APP_Framework/Applications/app_test/test_flash.c b/APP_Framework/Applications/app_test/test_flash.c new file mode 100644 index 000000000..78250ea8c --- /dev/null +++ b/APP_Framework/Applications/app_test/test_flash.c @@ -0,0 +1,35 @@ +#include +#include +#include + +void TestFlash(void) +{ + int fd = open(FLASH_DEV_DRIVER,O_RDWR); + if(fd<0){ + printf("fs fd open error:%d\n",fd); + return; + } + struct BusBlockWriteParam flash_writer; + uint8_t read_buff[8] = {1,2,3,4,5,6,7,8}; + flash_writer.pos = 0x000000L; + flash_writer.size = 8; + flash_writer.buffer = read_buff; + struct BusBlockReadParam flash_reader; + flash_reader.pos = 0x000000L; + flash_reader.size = 8; + flash_reader.buffer = read_buff; + + PrivRead(fd,&flash_reader,NONE); + printf("Read data is:"); + for(int i=0;i #include -#define BSP_LED_PIN 29 +#define BSP_LED_PIN 134 #define NULL_PARAMETER 0 -static uint16_t pinval=0; static uint16_t pin_fd=0; +static struct PinStat pin_led; void ledflip(void *parameter) { - struct PinStat pin_led; pin_led.pin = BSP_LED_PIN; - pin_led.val = !pinval; - pinval = !pinval; + pin_led.val = !pin_led.val; PrivWrite(pin_fd,&pin_led,NULL_PARAMETER); - // printf("Timer has callback once:%d\n",pinval); } void TestHwTimer(void) { - x_ticks_t period = 100;//uint:10ms + x_ticks_t period = 100000; pin_fd = PrivOpen(HWTIMER_PIN_DEV_DRIVER, O_RDWR); if(pin_fd<0){ @@ -28,6 +25,12 @@ void TestHwTimer(void) return; } + int timer_fd = PrivOpen(HWTIMER_TIMER_DEV_DRIVER, O_RDWR); + if(timer_fd<0){ + printf("open timer fd error:%d\n",timer_fd); + return; + } + //config led pin in board struct PinParam parameter; parameter.cmd = GPIO_CONFIG_MODE; @@ -44,10 +47,30 @@ void TestHwTimer(void) return; } - int32 timer_handle = KCreateTimer("LED on and off by 1s",&ledflip,&pin_fd,period,TIMER_TRIGGER_PERIODIC); - - KTimerStartRun(timer_handle); + ioctl_cfg.ioctl_driver_type = TIME_TYPE; + ioctl_cfg.args = (void *)&ledflip; + if (0 != PrivIoctl(timer_fd, OPE_INT, &ioctl_cfg)) { + printf("timer pin fd error %d\n", pin_fd); + PrivClose(pin_fd); + return; + } + + ioctl_cfg.args = (void *). + if (0 != PrivIoctl(timer_fd, OPE_CFG, &ioctl_cfg)) { + printf("timer pin fd error %d\n", pin_fd); + PrivClose(pin_fd); + return; + } + + while(1){ + + } + + // int32 timer_handle = KCreateTimer("LED on and off by 1s",&ledflip,&pin_fd,period,TIMER_TRIGGER_PERIODIC); + // KTimerStartRun(timer_handle); + PrivClose(pin_fd); + PrivClose(timer_fd); } PRIV_SHELL_CMD_FUNCTION(TestHwTimer, a timer test sample, PRIV_SHELL_CMD_MAIN_ATTR); \ No newline at end of file diff --git a/APP_Framework/Framework/knowing/Makefile b/APP_Framework/Framework/knowing/Makefile index 62c998618..789618f04 100644 --- a/APP_Framework/Framework/knowing/Makefile +++ b/APP_Framework/Framework/knowing/Makefile @@ -1,4 +1,4 @@ -SRC_DIR := kpu tensorflow-lite +SRC_DIR := cmsis_5 filter image_processing kpu nnom ota tensorflow-lite include $(KERNEL_ROOT)/compiler.mk diff --git a/APP_Framework/Framework/knowing/tensorflow-lite/Makefile b/APP_Framework/Framework/knowing/tensorflow-lite/Makefile index 86c474f3c..36da42f38 100644 --- a/APP_Framework/Framework/knowing/tensorflow-lite/Makefile +++ b/APP_Framework/Framework/knowing/tensorflow-lite/Makefile @@ -1,3 +1,7 @@ -SRC_DIR := tensorflow-lite-for-mcu +SRC_DIR := + +ifeq ($(CONFIG_USING_TENSORFLOWLITEMICRO),y) + SRC_DIR += tensorflow-lite-for-mcu +endif include $(KERNEL_ROOT)/compiler.mk diff --git a/APP_Framework/Framework/sensor/winddirection/qs-fx/qs-fx.c b/APP_Framework/Framework/sensor/winddirection/qs-fx/qs-fx.c index 72cb4da02..3a9e1eed5 100644 --- a/APP_Framework/Framework/sensor/winddirection/qs-fx/qs-fx.c +++ b/APP_Framework/Framework/sensor/winddirection/qs-fx/qs-fx.c @@ -69,6 +69,7 @@ static int SensorDeviceOpen(struct SensorDevice *sdev) return result; } +#ifdef ADD_XIZI_FETURES static int PinOpen(void){ int pin_fd = PrivOpen(SENSOR_DEVICE_QS_FX_PIN_DEV, O_RDWR); if (pin_fd < 0) { @@ -95,6 +96,7 @@ static int PinOpen(void){ return pin_fd; } +#endif /** * @description: Read sensor device @@ -104,22 +106,26 @@ static int PinOpen(void){ */ static int SensorDeviceRead(struct SensorDevice *sdev, size_t len) { +#ifdef ADD_XIZI_FETURES int pin_fd=PinOpen(); struct PinStat pin_dir; pin_dir.pin = SENSOR_DEVICE_QS_FX_PIN_NUMBER; - pin_dir.val = GPIO_HIGH; if (PrivWrite(pin_fd,&pin_dir,0) < 0) // pull-up pin to configure as tx mode return -1; +#endif + PrivTaskDelay(20); if (PrivWrite(sdev->fd, instructions, sizeof(instructions)) < 0) return -1; - PrivTaskDelay(20); + +#ifdef ADD_XIZI_FETURES pin_dir.val = GPIO_LOW; if (PrivWrite(pin_fd,&pin_dir,0) < 0) // pull-down pin to configure as rx mode - return -1; - + return -1; +#endif + if (PrivRead(sdev->fd, sdev->buffer, len) < 0) return -1; PrivClose(pin_fd); diff --git a/APP_Framework/Framework/sensor/windspeed/qs-fs/qs-fs.c b/APP_Framework/Framework/sensor/windspeed/qs-fs/qs-fs.c index 025dc5d87..151e70c91 100644 --- a/APP_Framework/Framework/sensor/windspeed/qs-fs/qs-fs.c +++ b/APP_Framework/Framework/sensor/windspeed/qs-fs/qs-fs.c @@ -68,7 +68,7 @@ static int SensorDeviceOpen(struct SensorDevice *sdev) return result; } - +#ifdef ADD_XIZI_FETURES static int PinOpen(void){ int pin_fd = PrivOpen(SENSOR_DEVICE_QS_FS_PIN_DEV, O_RDWR); if (pin_fd < 0) { @@ -96,6 +96,8 @@ static int PinOpen(void){ return pin_fd; } +#endif + /** * @description: Read sensor device * @param sdev - sensor device pointer @@ -104,6 +106,7 @@ static int PinOpen(void){ */ static int SensorDeviceRead(struct SensorDevice *sdev, size_t len) { +#ifdef ADD_XIZI_FETURES int pin_fd=PinOpen(); struct PinStat pin_dir; pin_dir.pin = SENSOR_DEVICE_QS_FS_PIN_NUMBER; @@ -111,16 +114,19 @@ static int SensorDeviceRead(struct SensorDevice *sdev, size_t len) pin_dir.val = GPIO_HIGH; if (PrivWrite(pin_fd,&pin_dir,0) < 0) // pull-up pin to configure as tx mode return -1; +#endif + PrivTaskDelay(20); if (PrivWrite(sdev->fd, instructions, sizeof(instructions)) < 0) return -1; PrivTaskDelay(20); - +#ifdef ADD_XIZI_FETURES pin_dir.val = GPIO_LOW; if (PrivWrite(pin_fd,&pin_dir,0) < 0) // pull-down pin to configure as rx mode return -1; - +#endif + if (PrivRead(sdev->fd, sdev->buffer, len) < 0) return -1; @@ -128,6 +134,7 @@ static int SensorDeviceRead(struct SensorDevice *sdev, size_t len) return 0; } + static struct SensorDone done = { SensorDeviceOpen, diff --git a/APP_Framework/Framework/transform_layer/xizi/transform.c b/APP_Framework/Framework/transform_layer/xizi/transform.c index 8995c7906..ccc197b16 100644 --- a/APP_Framework/Framework/transform_layer/xizi/transform.c +++ b/APP_Framework/Framework/transform_layer/xizi/transform.c @@ -172,6 +172,8 @@ int PrivIoctl(int fd, int cmd, void *args) case WDT_TYPE: case CAMERA_TYPE: case KPU_TYPE: + case TIME_TYPE: + case FLASH_TYPE: ret = ioctl(fd, cmd, ioctl_cfg->args); break; default: diff --git a/APP_Framework/Framework/transform_layer/xizi/transform.h b/APP_Framework/Framework/transform_layer/xizi/transform.h index 692c8083b..778a979f2 100644 --- a/APP_Framework/Framework/transform_layer/xizi/transform.h +++ b/APP_Framework/Framework/transform_layer/xizi/transform.h @@ -152,6 +152,8 @@ enum IoctlDriverType RTC_TYPE, CAMERA_TYPE, KPU_TYPE, + FLASH_TYPE, + TIME_TYPE, DEFAULT_TYPE, }; diff --git a/Ubiquitous/XiZi_IIoT/arch/arm/cortex-m4/hc32f4a0/interrupt_vector.S b/Ubiquitous/XiZi_IIoT/arch/arm/cortex-m4/hc32f4a0/interrupt_vector.S index de5fb45b0..91e70665f 100644 --- a/Ubiquitous/XiZi_IIoT/arch/arm/cortex-m4/hc32f4a0/interrupt_vector.S +++ b/Ubiquitous/XiZi_IIoT/arch/arm/cortex-m4/hc32f4a0/interrupt_vector.S @@ -77,36 +77,36 @@ InterruptVectors: .long IsrEntry .long IsrEntry .long IsrEntry - .long IRQ016_Handler - .long IRQ017_Handler - .long IRQ018_Handler - .long IRQ019_Handler - .long IRQ020_Handler - .long IRQ021_Handler - .long IRQ022_Handler - .long IRQ023_Handler - .long IRQ024_Handler - .long IRQ025_Handler - .long IRQ026_Handler - .long IRQ027_Handler - .long IRQ028_Handler - .long IRQ029_Handler - .long IRQ030_Handler - .long IRQ031_Handler - .long IRQ032_Handler - .long IRQ033_Handler - .long IRQ034_Handler - .long IRQ035_Handler - .long IRQ036_Handler - .long IRQ037_Handler - .long IRQ038_Handler - .long IRQ039_Handler - .long IRQ040_Handler - .long IRQ041_Handler - .long IRQ042_Handler - .long IRQ043_Handler - .long IRQ044_Handler - .long IRQ045_Handler + .long IsrEntry + .long IsrEntry + .long IsrEntry + .long IsrEntry + .long IsrEntry + .long IsrEntry + .long IsrEntry + .long IsrEntry + .long IsrEntry + .long IsrEntry + .long IsrEntry + .long IsrEntry + .long IsrEntry + .long IsrEntry + .long IsrEntry + .long IsrEntry + .long IsrEntry + .long IsrEntry + .long IsrEntry + .long IsrEntry + .long IsrEntry + .long IsrEntry + .long IsrEntry + .long IsrEntry + .long IsrEntry + .long IsrEntry + .long IsrEntry + .long IsrEntry + .long IsrEntry + .long IsrEntry .long IRQ046_Handler .long IRQ047_Handler .long IRQ048_Handler diff --git a/Ubiquitous/XiZi_IIoT/board/hc32f4a0/board.c b/Ubiquitous/XiZi_IIoT/board/hc32f4a0/board.c index 798689964..1cf0b0b41 100644 --- a/Ubiquitous/XiZi_IIoT/board/hc32f4a0/board.c +++ b/Ubiquitous/XiZi_IIoT/board/hc32f4a0/board.c @@ -62,6 +62,10 @@ Modification: #include #endif +#ifdef BSP_USING_TIMER +#include +#endif + extern void entry(void); extern int HwUsartInit(); extern int HwWdtInit(); @@ -182,6 +186,9 @@ struct InitSequenceDesc _board_init[] = #endif #ifdef BSP_USING_WDT { "wdt", HwWdtInit }, +#endif +#ifdef BSP_USING_TIMER + { "tmr", HwTimerInit }, #endif { " NONE ", NONE }, }; diff --git a/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/Kconfig b/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/Kconfig index ff9e0c375..f8cca57ef 100644 --- a/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/Kconfig +++ b/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/Kconfig @@ -69,3 +69,11 @@ menuconfig BSP_USING_WDT if BSP_USING_WDT source "$BSP_DIR/third_party_driver/watchdog/Kconfig" endif + +menuconfig BSP_USING_TIMER + bool "Using TIMER device" + default n + select RESOURCES_TIMER + if BSP_USING_TIMER + source "$BSP_DIR/third_party_driver/timer/Kconfig" + endif diff --git a/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/Makefile b/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/Makefile index edcf375ee..d66298a94 100644 --- a/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/Makefile +++ b/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/Makefile @@ -36,4 +36,8 @@ ifeq ($(CONFIG_BSP_USING_WDT),y) SRC_DIR += watchdog endif +ifeq ($(CONFIG_BSP_USING_TIMER),y) + SRC_DIR += timer +endif + include $(KERNEL_ROOT)/compiler.mk diff --git a/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/common/hc32_ll_driver/src/Makefile b/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/common/hc32_ll_driver/src/Makefile index 0346ba2d2..e2898214f 100644 --- a/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/common/hc32_ll_driver/src/Makefile +++ b/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/common/hc32_ll_driver/src/Makefile @@ -12,6 +12,10 @@ ifeq ($(CONFIG_BSP_USING_SPI),y) SRC_FILES += hc32_ll_spi.c endif +ifeq ($(CONFIG_BSP_USING_QSPI_FLASH),y) + SRC_FILES += hc32_ll_qspi.c +endif + ifeq ($(CONFIG_BSP_USING_I2C),y) SRC_FILES += hc32_ll_i2c.c endif diff --git a/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/gpio/connect_gpio.c b/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/gpio/connect_gpio.c index a27708099..d22f24925 100644 --- a/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/gpio/connect_gpio.c +++ b/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/gpio/connect_gpio.c @@ -34,8 +34,7 @@ Modification: #include #define ITEM_NUM(items) sizeof(items) / sizeof(items[0]) -#define IRQ_INT(callback) -#define INTSEL_REG (uint32_t)(&CM_INTC->SEL0) +#define IRQ_INT(callback) #ifndef HC32_PIN_CONFIG #define HC32_PIN_CONFIG(pin, callback, config) \ @@ -50,6 +49,7 @@ Modification: #define __HC32_PIN_DEFAULT {-1, 0, 0} #define MAX_PIN_INDEX 15 #define INT_VECTOR_OFFSET 16 +#define INTSEL_REG (uint32_t)(&CM_INTC->SEL0) struct PinIndex { @@ -564,7 +564,6 @@ static int32 GpioIrqEnable(x_base pin) isrManager.done->enableIrq(GpioPinIndex(index->pin)); CriticalAreaUnLock(level); - KPrintf("port%d,pin%04x has enable\n",index->port, index->pin); return EOK; } diff --git a/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/include/connect_flash.h b/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/include/connect_flash.h new file mode 100644 index 000000000..1f2962665 --- /dev/null +++ b/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/include/connect_flash.h @@ -0,0 +1,40 @@ +/* +* Copyright (c) 2020 AIIT XUOS Lab +* XiUOS is licensed under Mulan PSL v2. +* You can use this software according to the terms and conditions of the Mulan PSL v2. +* You may obtain a copy of Mulan PSL v2 at: +* http://license.coscl.org.cn/MulanPSL2 +* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, +* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, +* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. +* See the Mulan PSL v2 for more details. +*/ + +/** +* @file connect_flash.h +* @brief define hc32f4a0-board qspi-flash function and struct +* @version 2.0 +* @author AIIT XUOS Lab +* @date 2022-10-17 +*/ + +#ifndef CONNECT_FLASH_H +#define CONNECT_FLASH_H + +#include +#include +#include +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +int FlashW25qxxSpiDeviceInit(void); + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/include/connect_hwtimer.h b/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/include/connect_hwtimer.h new file mode 100644 index 000000000..d988c73ba --- /dev/null +++ b/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/include/connect_hwtimer.h @@ -0,0 +1,40 @@ +/* +* Copyright (c) 2020 AIIT XUOS Lab +* XiUOS is licensed under Mulan PSL v2. +* You can use this software according to the terms and conditions of the Mulan PSL v2. +* You may obtain a copy of Mulan PSL v2 at: +* http://license.coscl.org.cn/MulanPSL2 +* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, +* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, +* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. +* See the Mulan PSL v2 for more details. +*/ + +/** +* @file connect_hwtimer.h +* @brief define hc32f4a0-board hwtimer function and struct +* @version 2.0 +* @author AIIT XUOS Lab +* @date 2023-02-16 +*/ + +#ifndef CONNECT_HWTIMER_H +#define CONNECT_HWTIMER_H + +#include +#include +#include +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +int HwTimerInit(void); + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/spi/Kconfig b/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/spi/Kconfig index 262f7cecc..ff6e4ca46 100644 --- a/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/spi/Kconfig +++ b/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/spi/Kconfig @@ -39,4 +39,23 @@ if BSP_USING_SPI string "spi bus 6 driver name" default "spi6_drv" endif + + config BSP_USING_QSPI_FLASH + bool "Using qspi and flash" + default n + + if BSP_USING_QSPI_FLASH + config QSPI_BUS_NAME + string "qspi bus name" + default "qspi" + config QSPI_DEVICE_NAME_0 + string "qspi bus device 0 name" + default "qspi_dev0" + config QSPI_DRV_NAME + string "qspi bus driver name" + default "qspi_drv" + config QSPI_FLASH_DEV_NAME + string "flash dev name" + default "qspi_W25Q128" + endif endif diff --git a/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/spi/Makefile b/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/spi/Makefile index d07c0cb5c..422a66ad1 100644 --- a/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/spi/Makefile +++ b/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/spi/Makefile @@ -5,4 +5,8 @@ ifeq ($(CONFIG_RESOURCES_SPI_LORA),y) SRC_FILES += connect_lora_spi.c endif +ifeq ($(CONFIG_BSP_USING_QSPI_FLASH),y) + SRC_FILES += connect_flash.c +endif + include $(KERNEL_ROOT)/compiler.mk diff --git a/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/spi/connect_flash.c b/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/spi/connect_flash.c new file mode 100644 index 000000000..1065c6e41 --- /dev/null +++ b/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/spi/connect_flash.c @@ -0,0 +1,260 @@ +/* +* Copyright (c) 2020 AIIT XUOS Lab +* XiUOS is licensed under Mulan PSL v2. +* You can use this software according to the terms and conditions of the Mulan PSL v2. +* You may obtain a copy of Mulan PSL v2 at: +* http://license.coscl.org.cn/MulanPSL2 +* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, +* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, +* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. +* See the Mulan PSL v2 for more details. +*/ + +/** +* @file connect_flash.c +* @brief support hc32f4a0-board qspi-flash function and register to bus framework +* @version 2.0 +* @author AIIT XUOS Lab +* @date 2023-02-16 +*/ +#include + +#define QSPI_DEVICE_SLAVE_ID_0 0 +#define QSPI_UNIT (CM_QSPI) + +#define QSPI_CS_PORT (GPIO_PORT_C) +#define QSPI_SCK_PORT (GPIO_PORT_C) +#define QSPI_IO0_PORT (GPIO_PORT_D) +#define QSPI_IO1_PORT (GPIO_PORT_D) +#define QSPI_IO2_PORT (GPIO_PORT_D) +#define QSPI_IO3_PORT (GPIO_PORT_D) + +#define QSPI_CS_PIN (GPIO_PIN_07) +#define QSPI_SCK_PIN (GPIO_PIN_06) +#define QSPI_IO0_PIN (GPIO_PIN_08) +#define QSPI_IO1_PIN (GPIO_PIN_09) +#define QSPI_IO2_PIN (GPIO_PIN_10) +#define QSPI_IO3_PIN (GPIO_PIN_11) + +#define QSPI_PIN_FUNC (GPIO_FUNC_18) + +static uint32 QSpiSdkInit(struct SpiDriver *spi_drv) +{ + stc_qspi_init_t stcInit; + + FCG_Fcg1PeriphClockCmd(PWC_FCG1_QSPI, ENABLE); + + (void)QSPI_StructInit(&stcInit); + stcInit.u32ClockDiv = QSPI_CLK_DIV3; + stcInit.u32SpiMode = QSPI_SPI_MD0; + stcInit.u32ReadMode = QSPI_RD_MD_STD_RD; + stcInit.u32DummyCycle = QSPI_DUMMY_CYCLE8; + stcInit.u32AddrWidth = QSPI_ADDR_WIDTH_24BIT; + return QSPI_Init(&stcInit); + +} + +static void QspiPinConfig(void) +{ + stc_gpio_init_t stcGpioInit; + (void)GPIO_StructInit(&stcGpioInit); + stcGpioInit.u16PinState = PIN_STAT_RST; + stcGpioInit.u16PinDir = PIN_DIR_OUT; + (void)GPIO_Init(QSPI_CS_PORT, QSPI_CS_PIN|QSPI_SCK_PIN, &stcGpioInit); + stcGpioInit.u16PinState = PIN_STAT_SET; + (void)GPIO_Init(QSPI_IO0_PORT, QSPI_IO1_PIN|QSPI_IO2_PIN|QSPI_IO3_PIN, &stcGpioInit); + stcGpioInit.u16PinDir = PIN_DIR_IN; + (void)GPIO_Init(QSPI_IO0_PORT, QSPI_IO0_PIN, &stcGpioInit); + + GPIO_ResetPins(QSPI_CS_PORT, QSPI_CS_PIN); + GPIO_SetPins(QSPI_IO0_PORT, QSPI_IO2_PIN|QSPI_IO3_PIN); + + GPIO_SetFunc(QSPI_CS_PORT, QSPI_CS_PIN, QSPI_PIN_FUNC); + GPIO_SetFunc(QSPI_SCK_PORT, QSPI_SCK_PIN, QSPI_PIN_FUNC); + GPIO_SetFunc(QSPI_IO0_PORT, QSPI_IO0_PIN, QSPI_PIN_FUNC); + GPIO_SetFunc(QSPI_IO1_PORT, QSPI_IO1_PIN, QSPI_PIN_FUNC); + GPIO_SetFunc(QSPI_IO2_PORT, QSPI_IO2_PIN, QSPI_PIN_FUNC); + GPIO_SetFunc(QSPI_IO3_PORT, QSPI_IO3_PIN, QSPI_PIN_FUNC); +} + +static uint32 QSpiWriteData(struct SpiHardwareDevice *spi_dev, struct SpiDataStandard *spi_datacfg) +{ + SpiDeviceParam *dev_param = (SpiDeviceParam *)(spi_dev->haldev.private_data); + uint8 cs_gpio_pin = dev_param->spi_slave_param->spi_cs_gpio_pin; + uint8 cs_gpio_port = dev_param->spi_slave_param->spi_cs_gpio_port; + CM_SPI_TypeDef *spi = spi_dev->haldev.owner_bus->private_data; + x_err_t ret = EOK; + if (spi_datacfg->spi_chip_select) { + // GPIO_ResetPins(cs_gpio_port, cs_gpio_pin); + QSPI_EnterDirectCommMode(); + } + if(spi_datacfg->length > 0U && spi_datacfg->tx_buff!=NULL){ + for(int i=0;ilength;i++){ + QSPI_WriteDirectCommValue(spi_datacfg->tx_buff[i]); + } + } + if (spi_datacfg->spi_cs_release) { + // GPIO_SetPins(cs_gpio_port, cs_gpio_pin); + QSPI_ExitDirectCommMode(); + } + return ret; +} + +static uint32 QSpiReadData(struct SpiHardwareDevice *spi_dev, struct SpiDataStandard *spi_datacfg) +{ + SpiDeviceParam *dev_param = (SpiDeviceParam *)(spi_dev->haldev.private_data); + uint8 cs_gpio_pin = dev_param->spi_slave_param->spi_cs_gpio_pin; + uint8 cs_gpio_port = dev_param->spi_slave_param->spi_cs_gpio_port; + CM_SPI_TypeDef *spi = spi_dev->haldev.owner_bus->private_data; + x_err_t ret = EOK; + uint8_t *read_buffer = spi_datacfg->rx_buff; + + if (spi_datacfg->spi_chip_select) { + // GPIO_ResetPins(cs_gpio_port, cs_gpio_pin); + QSPI_EnterDirectCommMode(); + } + if(spi_datacfg->length > 0U && spi_datacfg->rx_buff!=NULL){ + for(int i=0;ilength;i++){ + read_buffer[i] = (uint8_t)QSPI_ReadDirectCommValue(); + } + } + if (spi_datacfg->spi_cs_release) { + // GPIO_SetPins(cs_gpio_port, cs_gpio_pin); + QSPI_ExitDirectCommMode(); + } + return ret; +} + +static uint32 QSpiDrvConfigure(void *drv, struct BusConfigureInfo *configure_info) +{ + NULL_PARAM_CHECK(drv); + NULL_PARAM_CHECK(configure_info); + + x_err_t ret = EOK; + struct SpiDriver *spi_drv = (struct SpiDriver *)drv; + struct SpiMasterParam *spi_param; + + switch (configure_info->configure_cmd) + { + case OPE_INT: + QSpiSdkInit(spi_drv); + QspiPinConfig(); + break; + case OPE_CFG: + spi_param = (struct SpiMasterParam *)configure_info->private_data; + break; + default: + break; + } + + return ret; +} + +/*manage the qspi device operations*/ +static const struct SpiDevDone qspi_dev_done = +{ + .dev_open = NONE, + .dev_close = NONE, + .dev_write = QSpiWriteData, + .dev_read = QSpiReadData, +}; + +static int BoardQSpiDevBend(void) +{ + x_err_t ret = EOK; + + static struct SpiHardwareDevice qspi_device0; + memset(&qspi_device0, 0, sizeof(struct SpiHardwareDevice)); + + static struct SpiSlaveParam qspi_slaveparam0; + memset(&qspi_slaveparam0, 0, sizeof(struct SpiSlaveParam)); + + qspi_slaveparam0.spi_slave_id = QSPI_DEVICE_SLAVE_ID_0; + qspi_slaveparam0.spi_cs_gpio_pin = QSPI_CS_PIN; + qspi_slaveparam0.spi_cs_gpio_port = QSPI_CS_PORT; + + qspi_device0.spi_param.spi_slave_param = &qspi_slaveparam0; + qspi_device0.spi_dev_done = &(qspi_dev_done); + + ret = SpiDeviceRegister(&qspi_device0, (void *)(&qspi_device0.spi_param), QSPI_DEVICE_NAME_0); + if (EOK != ret) { + KPrintf("BoardSpiDevBend SpiDeviceRegister device %s error %d\n", QSPI_DEVICE_NAME_0, ret); + return ERROR; + } + + ret = SpiDeviceAttachToBus(QSPI_DEVICE_NAME_0, QSPI_BUS_NAME); + if (EOK != ret) { + KPrintf("BoardSpiDevBend SpiDeviceAttachToBus device %s error %d\n", QSPI_DEVICE_NAME_0, ret); + return ERROR; + } + + return ret; +} + +static int BoardSpiBusInit(struct SpiBus *spi_bus, struct SpiDriver *spi_driver, const char *bus_name, const char *drv_name) +{ + x_err_t ret = EOK; + + /*Init the spi bus */ + ret = SpiBusInit(spi_bus, bus_name); + if (EOK != ret) { + KPrintf("Board_Spi_init SpiBusInit error %d\n", ret); + return ERROR; + } + + /*Init the spi driver*/ + ret = SpiDriverInit(spi_driver, drv_name); + if (EOK != ret) { + KPrintf("Board_Spi_init SpiDriverInit error %d\n", ret); + return ERROR; + } + + /*Attach the spi driver to the spi bus*/ + ret = SpiDriverAttachToBus(drv_name, bus_name); + if (EOK != ret) { + KPrintf("Board_Spi_init SpiDriverAttachToBus error %d\n", ret); + return ERROR; + } + + return ret; +} + + +int HwQSpiInit(void) +{ + x_err_t ret = EOK; + + static struct SpiBus qspi_bus; + memset(&qspi_bus, 0, sizeof(struct SpiBus)); + + static struct SpiDriver qspi_driver; + memset(&qspi_driver, 0, sizeof(struct SpiDriver)); + + qspi_bus.private_data = QSPI_UNIT; + qspi_driver.configure = QSpiDrvConfigure; + + ret = BoardSpiBusInit(&qspi_bus, &qspi_driver, QSPI_BUS_NAME, QSPI_DRV_NAME); + if (EOK != ret) { + KPrintf("BoardSpiBusInit error ret %u\n", ret); + return ERROR; + } + + ret = BoardQSpiDevBend(); + if (EOK != ret) { + KPrintf("BoardSpiDevBend error ret %u\n", ret); + return ERROR; + } + + return ret; +} + +int FlashW25qxxSpiDeviceInit(void) +{ + HwQSpiInit(); + QSpiSdkInit(NULL); + QspiPinConfig(); + if (NONE == SpiFlashInit(QSPI_BUS_NAME, QSPI_DEVICE_NAME_0, QSPI_DRV_NAME, QSPI_FLASH_DEV_NAME)) { + return ERROR; + } + return EOK; +} diff --git a/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/spi/connect_spi.c b/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/spi/connect_spi.c index 8cfae2660..6a7d8620c 100644 --- a/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/spi/connect_spi.c +++ b/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/spi/connect_spi.c @@ -465,11 +465,6 @@ int HwSpiInit(void) return ERROR; } - ret = BoardSpiDevBend(); - if (EOK != ret) { - KPrintf("BoardSpiDevBend error ret %u\n", ret); - return ERROR; - } #endif #ifdef BSP_USING_SPI6 @@ -488,12 +483,13 @@ int HwSpiInit(void) return ERROR; } +#endif + ret = BoardSpiDevBend(); if (EOK != ret) { KPrintf("BoardSpiDevBend error ret %u\n", ret); return ERROR; - } -#endif + } return ret; } diff --git a/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/timer/Kconfig b/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/timer/Kconfig new file mode 100644 index 000000000..62af5e3e9 --- /dev/null +++ b/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/timer/Kconfig @@ -0,0 +1,16 @@ +menuconfig BSP_USING_TIMER_0 +bool "Using timer 0" +default n +select RESOURCES_HWTIMER + +if BSP_USING_TIMER_0 + config HWTIMER_BUS_NAME_0 + string "timer 0 bus 0 name" + default "timer0" + config HWTIMER_0_DEVICE_NAME_0 + string "timer 0 bus 0 device 0 name" + default "timer0_dev0" + config HWTIMER_DRIVER_NAME_0 + string "timer 0 bus 0 driver name" + default "timer0_drv" +endif diff --git a/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/timer/Makefile b/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/timer/Makefile new file mode 100644 index 000000000..df3718568 --- /dev/null +++ b/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/timer/Makefile @@ -0,0 +1,3 @@ +SRC_FILES := connect_hwtimer.c + +include $(KERNEL_ROOT)/compiler.mk \ No newline at end of file diff --git a/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/timer/connect_hwtimer.c b/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/timer/connect_hwtimer.c new file mode 100644 index 000000000..d753db2c6 --- /dev/null +++ b/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/timer/connect_hwtimer.c @@ -0,0 +1,189 @@ +/* +* Copyright (c) 2020 AIIT XUOS Lab +* XiUOS is licensed under Mulan PSL v2. +* You can use this software according to the terms and conditions of the Mulan PSL v2. +* You may obtain a copy of Mulan PSL v2 at: +* http://license.coscl.org.cn/MulanPSL2 +* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, +* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, +* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. +* See the Mulan PSL v2 for more details. +*/ + +/** +* @file connect_hwtimer.c +* @brief support aiit-riscv64-board hwtimer function and register to bus framework +* @version 1.0 +* @author AIIT XUOS Lab +* @date 2021-04-25 +*/ + +#include + +#define TMR0_CMP_VAL 1000 +#define TMR0x ((CM_TMR0_TypeDef *)CM_TMR0_1_BASE) +#define TMR0_CH_x (TMR0_CH_A) +#define INTSEL_REG ((uint32_t)(&CM_INTC->SEL0)) +#define TIMER0_IRQn (18) + + +void (*callback_function)(void *) ; + +static void Timer0Callback(int vector, void *param) +{ + TMR0_SetCountValue(TMR0x, TMR0_CH_x, 0); + if (callback_function) { + callback_function(param); + } + +} + +static uint32 HwtimerOpen(void *dev) +{ + struct HwtimerHardwareDevice *hwtimer_dev = dev; + stc_tmr0_init_t stcTmr0Init; + /* Enable timer0 peripheral clock */ + FCG_Fcg2PeriphClockCmd(PWC_FCG2_TMR0_1, ENABLE); + + /* TIMER0 basetimer function initialize */ + (void)TMR0_StructInit(&stcTmr0Init); + stcTmr0Init.u32ClockDiv = TMR0_CLK_DIV128; /* Config clock division */ + stcTmr0Init.u32ClockSrc = TMR0_CLK_SRC_INTERN_CLK; /* Chose clock source */ + stcTmr0Init.u32Func = TMR0_FUNC_CMP; /* Timer0 compare mode */ + stcTmr0Init.u16CompareValue = TMR0_CMP_VAL; /* Set compare register data */ + (void)TMR0_Init(TMR0x, TMR0_CH_x, &stcTmr0Init); + + // DelayKTask(1); + // /* Set internal hardware capture source */ + // TMR0_SetTriggerSrc(EVT_PORT_EIRQ0); + + // DelayKTask(1); + + return EOK; +} + +static uint32 HwtimerClose(void *dev) +{ + /* Timer0 interrupt function Disable */ + TMR0_IntCmd(TMR0x, TMR0_INT_CMP_A, DISABLE); + return EOK; +} + +/*manage the hwtimer device operations*/ +static const struct HwtimerDevDone dev_done = +{ + .open = HwtimerOpen, + .close = HwtimerClose, + .write = NONE, + .read = NONE, +}; + +static uint32 HwtimerDrvConfigure(void *drv, struct BusConfigureInfo *configure_info) +{ + NULL_PARAM_CHECK(drv); + NULL_PARAM_CHECK(configure_info); + + x_err_t ret = EOK; + __IO uint32_t *INTC_SELx; + + switch (configure_info->configure_cmd) + { + case OPE_INT: + INTC_SELx = (__IO uint32_t *)(INTSEL_REG+ 4U * (uint32_t)(TIMER0_IRQn)); + WRITE_REG32(*INTC_SELx, EVT_SRC_TMR0_1_CMP_A); + callback_function = (void (*)(void *param))configure_info->private_data; + isrManager.done->registerIrq(TIMER0_IRQn+16,Timer0Callback,NULL); + isrManager.done->enableIrq(TIMER0_IRQn); + TMR0_IntCmd(TMR0x, TMR0_INT_CMP_A, ENABLE); + break; + case OPE_CFG: + TMR0_ClearStatus(TMR0x, TMR0_FLAG_CMP_A); + TMR0_SetCompareValue(TMR0x, TMR0_CH_x, *((int *)configure_info->private_data) ); + /* Timer0 interrupt function Enable */ + TMR0_SetCountValue(TMR0x, TMR0_CH_x, 0x0000); + TMR0_Start(TMR0x, TMR0_CH_x); + break; + default: + break; + } + return ret; +} + +/*Init hwtimer bus*/ +static int BoardHwtimerBusInit(struct HwtimerBus *hwtimer_bus, struct HwtimerDriver *hwtimer_driver) +{ + x_err_t ret = EOK; + + /*Init the hwtimer bus */ + ret = HwtimerBusInit(hwtimer_bus, HWTIMER_BUS_NAME_0); + if (EOK != ret) { + KPrintf("board_hwtimer_init HwtimerBusInit error %d\n", ret); + return ERROR; + } + + /*Init the hwtimer driver*/ + hwtimer_driver->configure = &(HwtimerDrvConfigure); + ret = HwtimerDriverInit(hwtimer_driver, HWTIMER_DRIVER_NAME_0); + if (EOK != ret) { + KPrintf("board_hwtimer_init HwtimerDriverInit error %d\n", ret); + return ERROR; + } + + /*Attach the hwtimer driver to the hwtimer bus*/ + ret = HwtimerDriverAttachToBus(HWTIMER_DRIVER_NAME_0, HWTIMER_BUS_NAME_0); + if (EOK != ret) { + KPrintf("board_hwtimer_init USEDriverAttachToBus error %d\n", ret); + return ERROR; + } + + return ret; +} + +/*Attach the hwtimer device to the hwtimer bus*/ +static int BoardHwtimerDevBend(void) +{ + x_err_t ret = EOK; + static struct HwtimerHardwareDevice hwtimer_device_0; + memset(&hwtimer_device_0, 0, sizeof(struct HwtimerHardwareDevice)); + + hwtimer_device_0.dev_done = &dev_done; + + ret = HwtimerDeviceRegister(&hwtimer_device_0, NONE, HWTIMER_0_DEVICE_NAME_0); + if (EOK != ret) { + KPrintf("BoardHwtimerDevBend HwtimerDeviceRegister device %s error %d\n", HWTIMER_0_DEVICE_NAME_0, ret); + return ERROR; + } + + ret = HwtimerDeviceAttachToBus(HWTIMER_0_DEVICE_NAME_0, HWTIMER_BUS_NAME_0); + if (EOK != ret) { + KPrintf("BoardHwtimerDevBend HwtimerDeviceAttachToBus device %s error %d\n", HWTIMER_0_DEVICE_NAME_0, ret); + return ERROR; + } + + return ret; +} + +/*K210 BOARD HWTIMER INIT*/ +int HwTimerInit(void) +{ + x_err_t ret = EOK; + static struct HwtimerBus hwtimer_bus; + memset(&hwtimer_bus, 0, sizeof(struct HwtimerBus)); + + static struct HwtimerDriver hwtimer_driver; + memset(&hwtimer_driver, 0, sizeof(struct HwtimerDriver)); + + ret = BoardHwtimerBusInit(&hwtimer_bus, &hwtimer_driver); + if (EOK != ret) { + KPrintf("board_hwtimer_Init error ret %u\n", ret); + return ERROR; + } + + ret = BoardHwtimerDevBend(); + if (EOK != ret) { + KPrintf("board_hwtimer_Init error ret %u\n", ret); + return ERROR; + } + + return ret; +} diff --git a/Ubiquitous/XiZi_IIoT/kernel/kernel_test/test_realtime.c b/Ubiquitous/XiZi_IIoT/kernel/kernel_test/test_realtime.c index 20630ef85..b597ffe90 100644 --- a/Ubiquitous/XiZi_IIoT/kernel/kernel_test/test_realtime.c +++ b/Ubiquitous/XiZi_IIoT/kernel/kernel_test/test_realtime.c @@ -26,15 +26,23 @@ extern unsigned int usleep(unsigned int seconds); static BusType pin; #ifdef ARCH_ARM -#include +// #include #define GPIO_C13 7 #define GPIO_C2 17 +#define GPIO_C11 140 +#define GPIO_D1 143 -void PinIrqIsr(void *args) +void PinIrqIsr(int vector,void *args) { - *(volatile unsigned int *)0x40020818 = 0x2000; - - *(volatile unsigned int *)0x4002081a = 0x2000; + /* 将GPIO D1置为高电平 */ + asm volatile("LDR r2, =0x40053838"); // 测试代码 + asm volatile("MOV r3, #0x0002"); // 测试代码 + asm volatile("STR r3, [r2]"); // 测试代码 + + /* 将GPIO D1置为低电平 */ + asm volatile("LDR r2, =0x4005383A"); // 测试代码 + asm volatile("MOV r3, #0x0002"); // 测试代码 + asm volatile("STR r3, [r2]"); // 测试代码 } int RealtimeIrqTest() @@ -58,23 +66,23 @@ int RealtimeIrqTest() KPrintf("%s irq test\n",__func__); /* config test pin 1 as output*/ testpin_1.cmd = GPIO_CONFIG_MODE; - testpin_1.pin = GPIO_C13; + testpin_1.pin = GPIO_D1; testpin_1.mode = GPIO_CFG_OUTPUT; ret = BusDrvConfigure(pin->owner_driver, &configure_info_1); if (ret != EOK) { - KPrintf("config testpin_1 %d failed!\n", GPIO_C13); + KPrintf("config testpin_1 %d failed!\n", GPIO_D1); return -ERROR; } /* set test pin 1 as high*/ - testpin_1_stat.pin = GPIO_C13; + testpin_1_stat.pin = GPIO_D1; testpin_1_stat.val = GPIO_LOW; BusDevWriteData(pin->owner_haldev, &write_param_1); /* config test pin 2 as input*/ testpin_2.cmd = GPIO_CONFIG_MODE; - testpin_2.pin = GPIO_C2; + testpin_2.pin = GPIO_C11; testpin_2.mode = GPIO_CFG_INPUT; ret = BusDrvConfigure(pin->owner_driver, &configure_info_2); @@ -84,9 +92,9 @@ int RealtimeIrqTest() } testpin_2.cmd = GPIO_IRQ_REGISTER; - testpin_2.pin = GPIO_C2; + testpin_2.pin = GPIO_C11; testpin_2.irq_set.irq_mode = GPIO_IRQ_EDGE_BOTH; - testpin_2.irq_set.hdr = PinIrqIsr; + testpin_2.irq_set.hdr = (void(*)(void *))PinIrqIsr; testpin_2.irq_set.args = NONE; ret = BusDrvConfigure(pin->owner_driver, &configure_info_2); @@ -96,7 +104,7 @@ int RealtimeIrqTest() } testpin_2.cmd = GPIO_IRQ_ENABLE; - testpin_2.pin = GPIO_C2; + testpin_2.pin = GPIO_C11; ret = BusDrvConfigure(pin->owner_driver, &configure_info_2); if (ret != EOK) { @@ -191,14 +199,32 @@ void GpioSpeedTest() #else -#define GPIO_18 18 -#define GPIO_19 19 +#define GPIO_34 34 +#define GPIO_35 35 void PinIrqIsr(void *args) { - *(volatile unsigned int *)0x3800100c |= 0x5; + /* 将 GPIO18 置为高电平 */ + asm volatile ("lui a5, 0x38001"); // 测试代码 + asm volatile ("addi a5, a5, 12"); // 测试代码 + asm volatile ("lw a5, 0(a5)"); // 测试代码 + asm volatile ("sext.w a4, a5"); // 测试代码 + asm volatile ("lui a5, 0x38001"); // 测试代码 + asm volatile ("addi a5, a5, 12"); // 测试代码 + asm volatile ("ori a4, a4, 5"); // 测试代码 + asm volatile ("sext.w a4, a4"); // 测试代码 + asm volatile ("sw a4, 0(a5)"); // 测试代码 - *(volatile unsigned int *)0x3800100c &= ~0x5; + /* 将GPIO18 置为低电平 */ + asm volatile ("lui a5, 0x38001"); // 测试代码 + asm volatile ("addi a5, a5, 12"); // 测试代码 + asm volatile ("lw a5, 0(a5)"); // 测试代码 + asm volatile ("sext.w a4, a5"); // 测试代码 + asm volatile ("lui a5, 0x38001"); // 测试代码 + asm volatile ("addi a5, a5, 12"); // 测试代码 + asm volatile ("andi a4, a4, -6"); // 测试代码 + asm volatile ("sext.w a4, a4"); // 测试代码 + asm volatile ("sw a4, 0(a5)"); // 测试代码 } int RealtimeIrqTest() @@ -221,29 +247,29 @@ int RealtimeIrqTest() KPrintf("%s irq test\n",__func__); /* config GPIO18 as output and set as low */ testpin_1.cmd = GPIO_CONFIG_MODE; - testpin_1.pin = GPIO_18; + testpin_1.pin = GPIO_34; testpin_1.mode = GPIO_CFG_OUTPUT; BusDrvConfigure(pin->owner_driver, &configure_info_1); - testpin_1_stat.pin = GPIO_18; + testpin_1_stat.pin = GPIO_34; testpin_1_stat.val = GPIO_LOW; BusDevWriteData(pin->owner_haldev, &write_param_1); /* config GPIO18 as input */ testpin_2.cmd = GPIO_CONFIG_MODE; - testpin_2.pin = GPIO_19; + testpin_2.pin = GPIO_35; testpin_2.mode = GPIO_CFG_INPUT; BusDrvConfigure(pin->owner_driver, &configure_info_2); testpin_2.cmd = GPIO_IRQ_REGISTER; - testpin_2.pin = GPIO_19; + testpin_2.pin = GPIO_35; testpin_2.irq_set.irq_mode = GPIO_IRQ_EDGE_RISING; testpin_2.irq_set.hdr = PinIrqIsr; testpin_2.irq_set.args = NONE; BusDrvConfigure(pin->owner_driver, &configure_info_2); testpin_2.cmd = GPIO_IRQ_ENABLE; - testpin_2.pin = GPIO_19; + testpin_2.pin = GPIO_35; BusDrvConfigure(pin->owner_driver, &configure_info_2); return 0; @@ -262,16 +288,16 @@ void RealtimeTaskSwitchTest() write_param_1.buffer = (void *)&testpin_1_stat; testpin_1.cmd = GPIO_CONFIG_MODE; - testpin_1.pin = GPIO_18; + testpin_1.pin = GPIO_34; testpin_1.mode = GPIO_CFG_OUTPUT; BusDrvConfigure(pin->owner_driver, &configure_info_1); - testpin_1_stat.pin = GPIO_18; + testpin_1_stat.pin = GPIO_34; testpin_1_stat.val = GPIO_LOW; BusDevWriteData(pin->owner_haldev, &write_param_1); while (RET_TRUE) { - DelayKTask(10); + DelayKTask(1); } } @@ -288,11 +314,11 @@ void GpioSpeedTest() write_param_1.buffer = (void *)&testpin_1_stat; testpin_1.cmd = GPIO_CONFIG_MODE; - testpin_1.pin = GPIO_18; + testpin_1.pin = GPIO_34; testpin_1.mode = GPIO_CFG_OUTPUT; BusDrvConfigure(pin->owner_driver, &configure_info_1); - testpin_1_stat.pin = GPIO_18; + testpin_1_stat.pin = GPIO_34; testpin_1_stat.val = GPIO_LOW; BusDevWriteData(pin->owner_haldev, &write_param_1); diff --git a/Ubiquitous/XiZi_IIoT/kernel/thread/init.c b/Ubiquitous/XiZi_IIoT/kernel/thread/init.c index 84ca8c15a..9497c587d 100644 --- a/Ubiquitous/XiZi_IIoT/kernel/thread/init.c +++ b/Ubiquitous/XiZi_IIoT/kernel/thread/init.c @@ -33,6 +33,11 @@ #endif #endif +#ifdef BSP_USING_QSPI_FLASH +#include "connect_flash.h" +extern int FlashW25qxxSpiDeviceInit(void); +#endif + #ifdef KERNEL_USER_MAIN #ifndef MAIN_KTASK_STACK_SIZE #define MAIN_KTASK_STACK_SIZE 2048 @@ -46,6 +51,8 @@ extern int StartWatchdog(void); #endif + + extern void CreateKServiceKTask(void); extern int main(void); void InitBoardHardware(void); diff --git a/Ubiquitous/XiZi_IIoT/resources/spi/third_party_spi/SFUD/sfud/src/sfud.c b/Ubiquitous/XiZi_IIoT/resources/spi/third_party_spi/SFUD/sfud/src/sfud.c index bde5bd030..946957e71 100644 --- a/Ubiquitous/XiZi_IIoT/resources/spi/third_party_spi/SFUD/sfud/src/sfud.c +++ b/Ubiquitous/XiZi_IIoT/resources/spi/third_party_spi/SFUD/sfud/src/sfud.c @@ -444,7 +444,7 @@ sfud_err sfud_read(const sfud_flash *flash, uint32_t addr, size_t size, uint8_t #endif { cmd_data[0] = SFUD_CMD_READ_DATA; - make_adress_byte_array(flash, addr, &cmd_data[1]); + make_adress_byte_array(flash, addr, cmd_data+1); cmd_size = flash->addr_in_4_byte ? 5 : 4; result = spi->wr(spi, cmd_data, cmd_size, data, size); }