forked from xuos/xiuos
				
			
		
			
				
	
	
		
			218 lines
		
	
	
		
			7.6 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			218 lines
		
	
	
		
			7.6 KiB
		
	
	
	
		
			C
		
	
	
	
| /**
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|   ******************************************************************************
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|   * @file    stm32f4xx_syscfg.c
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|   * @author  MCD Application Team
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|   * @version V1.0.0
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|   * @date    30-September-2011
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|   * @brief   This file provides firmware functions to manage the SYSCFG peripheral.
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|   *
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|   *  @verbatim
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|   *  
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|   *          ===================================================================
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|   *                                 How to use this driver
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|   *          ===================================================================
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|   *                  
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|   *          This driver provides functions for:
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|   *          
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|   *          1. Remapping the memory accessible in the code area using SYSCFG_MemoryRemapConfig()
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|   *              
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|   *          2. Manage the EXTI lines connection to the GPIOs using SYSCFG_EXTILineConfig()
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|   *            
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|   *          3. Select the ETHERNET media interface (RMII/RII) using SYSCFG_ETH_MediaInterfaceConfig()
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|   *
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|   *  @note  SYSCFG APB clock must be enabled to get write access to SYSCFG registers,
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|   *         using RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
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|   *                 
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|   *  @endverbatim
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|   *      
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|   ******************************************************************************
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|   * @attention
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|   *
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|   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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|   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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|   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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|   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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|   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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|   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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|   *
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|   * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
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|   ******************************************************************************
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|   */
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| 
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| /**
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| * @file: hardware_syscfg.c
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| * @brief: support hardware syscfg function
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| * @version: 1.0
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| * @author:  AIIT XUOS Lab
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| * @date:    2021/4/25
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| */
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| 
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| /*************************************************
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| File name: hardware_syscfg.c
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| Description: support hardware syscfg function
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| Others: 
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| History: 
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| 1. Date: 2021-04-25
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| Author: AIIT XUOS Lab
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| Modification: 
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| 1. rename stm32f4xx_syscfg.c for XiUOS
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| *************************************************/
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| 
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| /* Includes ------------------------------------------------------------------*/
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| #include <hardware_syscfg.h>
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| #include <hardware_rcc.h>
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| #include <stm32_assert_template.h>
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| 
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| /** @addtogroup STM32F4xx_StdPeriph_Driver
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|   * @{
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|   */
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| 
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| /** @defgroup SYSCFG 
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|   * @brief SYSCFG driver modules
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|   * @{
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|   */ 
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| 
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| /* Private typedef -----------------------------------------------------------*/
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| /* Private define ------------------------------------------------------------*/
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| /* ------------ RCC registers bit address in the alias region ----------- */
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| #define SYSCFG_OFFSET             (SYSCFG_BASE - PERIPH_BASE)
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| /* ---  PMC Register ---*/ 
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| /* Alias word address of MII_RMII_SEL bit */ 
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| #define PMC_OFFSET                (SYSCFG_OFFSET + 0x04) 
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| #define MII_RMII_SEL_BitNumber    ((uint8_t)0x17) 
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| #define PMC_MII_RMII_SEL_BB       (PERIPH_BB_BASE + (PMC_OFFSET * 32) + (MII_RMII_SEL_BitNumber * 4)) 
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| 
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| /* ---  CMPCR Register ---*/ 
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| /* Alias word address of CMP_PD bit */ 
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| #define CMPCR_OFFSET              (SYSCFG_OFFSET + 0x20) 
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| #define CMP_PD_BitNumber          ((uint8_t)0x00) 
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| #define CMPCR_CMP_PD_BB           (PERIPH_BB_BASE + (CMPCR_OFFSET * 32) + (CMP_PD_BitNumber * 4)) 
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| 
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| /* Private macro -------------------------------------------------------------*/
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| /* Private variables ---------------------------------------------------------*/
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| /* Private function prototypes -----------------------------------------------*/
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| /* Private functions ---------------------------------------------------------*/
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| 
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| /** @defgroup SYSCFG_Private_Functions
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|   * @{
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|   */ 
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| 
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| /**
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|   * @brief  Deinitializes the Alternate Functions (remap and EXTI configuration)
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|   *   registers to their default reset values.
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|   * @param  None
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|   * @retval None
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|   */
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| void SYSCFG_DeInit(void)
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| {
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|    RCC_APB2PeriphResetCmd(RCC_APB2Periph_SYSCFG, ENABLE);
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|    RCC_APB2PeriphResetCmd(RCC_APB2Periph_SYSCFG, DISABLE);
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| }
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| 
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| /**
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|   * @brief  Changes the mapping of the specified pin.
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|   * @param  SYSCFG_Memory: selects the memory remapping.
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|   *         This parameter can be one of the following values:
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|   *            @arg SYSCFG_MemoryRemap_Flash:       Main Flash memory mapped at 0x00000000  
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|   *            @arg SYSCFG_MemoryRemap_SystemFlash: System Flash memory mapped at 0x00000000
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|   *            @arg SYSCFG_MemoryRemap_FSMC:        FSMC (Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000
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|   *            @arg SYSCFG_MemoryRemap_SRAM:        Embedded SRAM (112kB) mapped at 0x00000000
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|   * @retval None
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|   */
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| void SYSCFG_MemoryRemapConfig(uint8_t SYSCFG_MemoryRemap)
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| {
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|   /* Check the parameters */
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|   assert_param(IS_SYSCFG_MEMORY_REMAP_CONFING(SYSCFG_MemoryRemap));
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| 
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|   SYSCFG->MEMRMP = SYSCFG_MemoryRemap;
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| }
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| 
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| /**
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|   * @brief  Selects the GPIO pin used as EXTI Line.
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|   * @param  EXTI_PortSourceGPIOx : selects the GPIO port to be used as source for
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|   *          EXTI lines where x can be (A..I).
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|   * @param  EXTI_PinSourcex: specifies the EXTI line to be configured.
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|   *           This parameter can be EXTI_PinSourcex where x can be (0..15, except
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|   *           for EXTI_PortSourceGPIOI x can be (0..11).
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|   * @retval None
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|   */
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| void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex)
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| {
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|   uint32_t tmp = 0x00;
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| 
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|   /* Check the parameters */
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|   assert_param(IS_EXTI_PORT_SOURCE(EXTI_PortSourceGPIOx));
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|   assert_param(IS_EXTI_PIN_SOURCE(EXTI_PinSourcex));
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| 
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|   tmp = ((uint32_t)0x0F) << (0x04 * (EXTI_PinSourcex & (uint8_t)0x03));
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|   SYSCFG->EXTICR[EXTI_PinSourcex >> 0x02] &= ~tmp;
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|   SYSCFG->EXTICR[EXTI_PinSourcex >> 0x02] |= (((uint32_t)EXTI_PortSourceGPIOx) << (0x04 * (EXTI_PinSourcex & (uint8_t)0x03)));
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| }
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| 
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| /**
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|   * @brief  Selects the ETHERNET media interface 
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|   * @param  SYSCFG_ETH_MediaInterface: specifies the Media Interface mode. 
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|   *          This parameter can be one of the following values: 
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|   *            @arg SYSCFG_ETH_MediaInterface_MII: MII mode selected
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|   *            @arg SYSCFG_ETH_MediaInterface_RMII: RMII mode selected 
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|   * @retval None 
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|   */
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| void SYSCFG_ETH_MediaInterfaceConfig(uint32_t SYSCFG_ETH_MediaInterface) 
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| { 
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|   assert_param(IS_SYSCFG_ETH_MEDIA_INTERFACE(SYSCFG_ETH_MediaInterface)); 
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|   /* Configure MII_RMII selection bit */ 
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|   *(__IO uint32_t *) PMC_MII_RMII_SEL_BB = SYSCFG_ETH_MediaInterface; 
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| }
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| 
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| /**
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|   * @brief  Enables or disables the I/O Compensation Cell.
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|   * @note   The I/O compensation cell can be used only when the device supply
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|   *         voltage ranges from 2.4 to 3.6 V.  
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|   * @param  NewState: new state of the I/O Compensation Cell.
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|   *          This parameter can be one of the following values:
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|   *            @arg ENABLE: I/O compensation cell enabled  
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|   *            @arg DISABLE: I/O compensation cell power-down mode  
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|   * @retval None
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|   */
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| void SYSCFG_CompensationCellCmd(FunctionalState NewState)
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| {
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|   /* Check the parameters */
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|   assert_param(IS_FUNCTIONAL_STATE(NewState));
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| 
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|   *(__IO uint32_t *) CMPCR_CMP_PD_BB = (uint32_t)NewState;
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| }
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| 
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| /**
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|   * @brief  Checks whether the I/O Compensation Cell ready flag is set or not.
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|   * @param  None
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|   * @retval The new state of the I/O Compensation Cell ready flag (SET or RESET)
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|   */
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| FlagStatus SYSCFG_GetCompensationCellStatus(void)
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| {
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|   FlagStatus bitstatus = RESET;
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|     
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|   if ((SYSCFG->CMPCR & SYSCFG_CMPCR_READY ) != (uint32_t)RESET)
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|   {
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|     bitstatus = SET;
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|   }
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|   else
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|   {
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|     bitstatus = RESET;
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|   }
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|   return bitstatus;
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| }
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| 
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| /**
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|   * @}
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|   */
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| 
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| /**
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|   * @}
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|   */
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| 
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| /**
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|   * @}
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|   */
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| 
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| /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/   
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