forked from xuos/xiuos
163 lines
5.3 KiB
C
163 lines
5.3 KiB
C
/*
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* Copyright (c) 2020 AIIT XUOS Lab
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* XiOS is licensed under Mulan PSL v2.
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* You can use this software according to the terms and conditions of the Mulan PSL v2.
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* You may obtain a copy of Mulan PSL v2 at:
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* http://license.coscl.org.cn/MulanPSL2
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* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
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* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
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* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
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* See the Mulan PSL v2 for more details.
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*/
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/**
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* @file board.h
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* @brief sabre-lite board.h file
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* @version 1.0
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* @author AIIT XUOS Lab
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* @date 2023.05.15
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*/
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#ifndef __BOARDS_ARM_IMX6_SABRE_LITE_INCLUDE_BOARD_H
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#define __BOARDS_ARM_IMX6_SABRE_LITE_INCLUDE_BOARD_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Clocking *****************************************************************/
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/* The Sabre-Lite board has two crystals:
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*
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* Y1 24 MHz CPU_XTALI/CPU_XTALO
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* QZ500 32.768 KHz RTC_XTALI/RTC_XTALO
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*/
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#define BOARD_CPUXTAL_FREQUENCY 24000000
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#define BAORD_RTCXTAL_FREQUENCY 32768
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/* Clocking will be configured at 792 MHz initially when started via U-Boot.
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* The Linux kernel will use the CPU frequency scaling code which will switch
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* the processor frequency between 400 MHz and 1GHz based on load and
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* temperature.
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*
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* These are the frequencies reported with U-Boot starts up:
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*
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* mx6q pll1 : 792MHz
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* mx6q pll2 : 528MHz
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* mx6q pll3 : 480MHz
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* mx6q pll8 : 50MHz
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*
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* ipg clock : 66000000Hz
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* ipg per clock : 66000000Hz
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* uart clock : 80000000Hz
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* cspi clock : 60000000Hz
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* ahb clock : 132000000Hz
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* axi clock : 264000000Hz
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* emi_slow clock : 29333333Hz
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* ddr clock : 528000000Hz
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* usdhc1 clock : 198000000Hz
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* usdhc2 clock : 198000000Hz
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* usdhc3 clock : 198000000Hz
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* usdhc4 clock : 198000000Hz
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* nfc clock : 24000000Hz
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*
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* For now, NuttX simply leaves the clocking at 792MHz.
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*/
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/* LED definitions **********************************************************/
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/* LEDs
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*
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* A single LED is available driven GPIO1_IO02.
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* On the schematic this is USR_DEF_RED_LED signal to pin T1 (GPIO_2).
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* This signal is shared with KEY_ROW6 (ALT2).
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* A high value illuminates the LED.
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*/
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/* LED index values for use with board_userled() */
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#define BOARD_LED 0
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#define BOARD_NLEDS 1
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/* LED bits for use with board_userled_all() */
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#define BOARD_LED_BIT (1 << BOARD_LED)
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/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is
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* defined. In that case, the usage by the board port is defined in
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* include/board.h and src/sam_autoleds.c. The LEDs are used to encode
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* OS-related events as follows:
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*
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* ---------------------- ---------------------------- ------
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* SYMBOL Meaning LED
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* ---------------------- ---------------------------- ------
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*/
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#define LED_STARTED 0 /* NuttX has been started OFF */
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#define LED_HEAPALLOCATE 0 /* Heap has been allocated OFF */
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#define LED_IRQSENABLED 0 /* Interrupts enabled OFF */
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#define LED_STACKCREATED 1 /* Idle stack created ON */
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#define LED_INIRQ 2 /* In an interrupt N/C */
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#define LED_SIGNAL 2 /* In a signal handler N/C */
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#define LED_ASSERTION 2 /* An assertion failed N/C */
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#define LED_PANIC 3 /* The system has crashed FLASH */
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#undef LED_IDLE /* MCU is is sleep mode Not used */
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/* Thus is LED is statically on, NuttX has successfully booted and is,
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* apparently, running normally. If LED is flashing at approximately
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* 2Hz, then a fatal error has been detected and the system has halted.
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*/
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/* Button definitions *******************************************************/
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/* GPIO Disambiguation ******************************************************/
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/* A DEBUG VCOM is available MICRO USB AB 5 J509.
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* This corresponds to UART1 from the i.MX6.
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* UART1 connects to J509 via the CSIO_DAT10 and CSIO_DAT11 pins:
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*/
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#define GPIO_UART1_RX_DATA GPIO_UART1_RX_DATA_2
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#define GPIO_UART1_TX_DATA GPIO_UART1_TX_DATA_2
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#define GPIO_UART2_RX_DATA GPIO_UART2_RX_DATA_2
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#define GPIO_UART2_TX_DATA GPIO_UART2_TX_DATA_2
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/****************************************************************************
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* Public Types
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****************************************************************************/
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/****************************************************************************
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* Public Data
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****************************************************************************/
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#ifndef __ASSEMBLY__
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/****************************************************************************
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* Public Functions Definitions
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****************************************************************************/
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __BOARDS_ARM_IMX6_SABRE_LITE_INCLUDE_BOARD_H */
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