diff --git a/Ubiquitous/XiZi_IIoT/arch/risc-v/shared/pmp.h b/Ubiquitous/XiZi_IIoT/arch/risc-v/shared/pmp.h index 0e0b0cffc..9aa3c17bf 100644 --- a/Ubiquitous/XiZi_IIoT/arch/risc-v/shared/pmp.h +++ b/Ubiquitous/XiZi_IIoT/arch/risc-v/shared/pmp.h @@ -14,6 +14,7 @@ #define PMP_H #include +#include #define PMP_MAX_ENTRY_NUMBER 16 #define PMP_ENTRY_RESERVE 6 @@ -40,11 +41,11 @@ struct PmpEntry { - uint8_t pmpcfg; + uint8 pmpcfg; #if defined(ARCH_RISCV64) - uint64_t pmpaddr; + uint64 pmpaddr; #else - uint32_t pmpaddr; + uint32 pmpaddr; #endif }; @@ -53,8 +54,8 @@ struct PmpRegionNapot { x_ubase start ; x_ubase end; - uint16_t swap_count; - uint8_t region_type; + uint16 swap_count; + uint8 region_type; struct PmpEntry entry; DoubleLinklistType link; @@ -64,8 +65,8 @@ struct PmpRegionTor { x_ubase start ; x_ubase end; - uint16_t swap_count; - uint8_t region_type; + uint16 swap_count; + uint8 region_type; struct PmpEntry entry[2]; DoubleLinklistType link; @@ -73,8 +74,8 @@ struct PmpRegionTor struct Pmp { - uint8_t count; - uint8_t reserve; + uint8 count; + uint8 reserve; struct PmpEntry pmp_entry_reserve[PMP_ENTRY_RESERVE]; DoubleLinklistType tor_list; @@ -82,7 +83,7 @@ struct Pmp }; -x_err_t PmpAddTorRegion(void *task_pmp, x_ubase start , size_t size , uint8_t flag ); +x_err_t PmpAddTorRegion(void *task_pmp, x_ubase start , size_t size , uint8 flag ); x_err_t PmpInitIsolation(void **task_pmp, x_ubase stack_start , size_t stack_size); void PmpFree(void *task_pmp); void PmpClear(void); diff --git a/Ubiquitous/XiZi_IIoT/board/edu-riscv64/config.mk b/Ubiquitous/XiZi_IIoT/board/edu-riscv64/config.mk index 409cda39c..665ed5abb 100644 --- a/Ubiquitous/XiZi_IIoT/board/edu-riscv64/config.mk +++ b/Ubiquitous/XiZi_IIoT/board/edu-riscv64/config.mk @@ -14,7 +14,7 @@ endif export APPLFLAGS := -mcmodel=medany -march=rv64imafdc -mabi=lp64d -nostartfiles -Wl,--gc-sections,-Map=XiZi-edu-riscv64.map,-cref,-u, -T $(BSP_ROOT)/link_userspace.lds -export CXXFLAGS := -mcmodel=medany -march=rv64imafdc -mabi=lp64d -fno-common -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -O0 -ggdb -Werror +export CXXFLAGS := -mcmodel=medany -march=rv64imafdc -mabi=lp64d -fno-common -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -O0 -ggdb -Werror -std=gnu++11 export CROSS_COMPILE ?=/opt/gnu-mcu-eclipse/riscv-none-gcc/8.2.0-2.1-20190425-1021/bin/riscv-none-embed- diff --git a/Ubiquitous/XiZi_IIoT/mergebin.py b/Ubiquitous/XiZi_IIoT/mergebin.py index 451e1ac1e..91c2b8c05 100644 --- a/Ubiquitous/XiZi_IIoT/mergebin.py +++ b/Ubiquitous/XiZi_IIoT/mergebin.py @@ -17,11 +17,11 @@ def mergeBinProccess( files, fileSaveName): f.write(bin) if __name__ == '__main__': - file1 = r'./build/XiZi-kd233_kernel.bin' + file1 = r'./build/XiZi-edu-riscv64_kernel.bin' file1_start_addr = 0 - file2 = r'./build/XiZi-kd233_app.bin' + file2 = r'./build/XiZi-edu-riscv64_app.bin' file2_start_addr = 1024 * 1024 + 4096 - newfile = r'./build/XiZi-kd233.bin' + newfile = r'./build/XiZi-edu-riscv64.bin' file = [ [file1 , file1_start_addr] , [file2 , file2_start_addr] ] mergeBinProccess(file, newfile) \ No newline at end of file