diff --git a/APP_Framework/Applications/sensor_app/pm10_0_ps5308.c b/APP_Framework/Applications/sensor_app/pm10_0_ps5308.c
index 1c29ac7a1..7b1559d16 100644
--- a/APP_Framework/Applications/sensor_app/pm10_0_ps5308.c
+++ b/APP_Framework/Applications/sensor_app/pm10_0_ps5308.c
@@ -11,8 +11,8 @@
 */
 
 /**
- * @file pm1_0_ps5308.c
- * @brief PS5308 PM1.0 example
+ * @filepm10_0_ps5308
+ * @brief PS5308 PM10.0 example
  * @version 1.0
  * @author AIIT XUOS Lab
  * @date 2021.04.23
diff --git a/APP_Framework/Applications/sensor_app/pm2_5_ps5308.c b/APP_Framework/Applications/sensor_app/pm2_5_ps5308.c
index fe267be6e..a2de9ee31 100644
--- a/APP_Framework/Applications/sensor_app/pm2_5_ps5308.c
+++ b/APP_Framework/Applications/sensor_app/pm2_5_ps5308.c
@@ -11,11 +11,11 @@
 */
 
 /**
- * @file pm1_0_ps5308.c
- * @brief PS5308 PM1.0 example
+ * @file pm2_5_ps5308
+ * @brief PS5308 PM2.5 example
  * @version 1.0
  * @author AIIT XUOS Lab
- * @date 2021.04.23
+ * @date 2021.12.28
  */
 
 #ifdef ADD_XIZI_FETURES
diff --git a/APP_Framework/Framework/connection/adapter.c b/APP_Framework/Framework/connection/adapter.c
index 6de8a2aa6..6d3d8f227 100644
--- a/APP_Framework/Framework/connection/adapter.c
+++ b/APP_Framework/Framework/connection/adapter.c
@@ -34,7 +34,7 @@ int AdapterFrameworkInit(void)
     AppInitDoubleList(&adapter_list);
 
     ret = PrivMutexCreate(&adapter_list_lock, 0);
-    if(ret < 0) {
+    if(ret != 0) {
         printf("AdapterFrameworkInit mutex create failed.\n");
     }
 
@@ -50,11 +50,16 @@ AdapterType AdapterDeviceFindByName(const char *name)
 {
     struct Adapter *ret = NULL;
     struct DoublelistNode *node;
+    int status = 0;
 
     if (NULL == name)
         return NULL;
 
-    PrivMutexObtain(&adapter_list_lock);
+    status = PrivMutexObtain(&adapter_list_lock);
+    if (status != 0){
+       printf("%s:pthread_mutex_lock failed, status=%d\n",__func__,status);
+    }
+
     DOUBLE_LIST_FOR_EACH(node, &adapter_list) {
         struct Adapter *adapter = CONTAINER_OF(node,
                 struct Adapter, link);
@@ -64,7 +69,11 @@ AdapterType AdapterDeviceFindByName(const char *name)
         }
         printf("PrivMutexObtain in loop\n");
     }
-    PrivMutexAbandon(&adapter_list_lock);
+
+    status = PrivMutexAbandon(&adapter_list_lock);
+    if (status != 0){
+       printf("%s:pthread_mutex_unlock failed, status=%d\n",__func__,status);
+    }
 
     return ret;
 }
@@ -76,6 +85,7 @@ AdapterType AdapterDeviceFindByName(const char *name)
  */
 int AdapterDeviceRegister(struct Adapter *adapter)
 {
+    int status = 0;
     if (NULL == adapter )
         return -1;
 
@@ -84,9 +94,17 @@ int AdapterDeviceRegister(struct Adapter *adapter)
         return -1;
     }
 
-    PrivMutexObtain(&adapter_list_lock);
+    status = PrivMutexObtain(&adapter_list_lock);
+    if (status != 0){
+       printf("%s:pthread_mutex_lock failed, status=%d\n",__func__,status);
+    }
+
     AppDoubleListInsertNodeAfter(&adapter_list, &adapter->link);
-    PrivMutexAbandon(&adapter_list_lock);
+    
+    status = PrivMutexAbandon(&adapter_list_lock);
+    if (status != 0){
+       printf("%s:pthread_mutex_unlock failed, status=%d\n",__func__,status);
+    }
 
     adapter->adapter_status = REGISTERED;
 
@@ -100,11 +118,20 @@ int AdapterDeviceRegister(struct Adapter *adapter)
  */
 int AdapterDeviceUnregister(struct Adapter *adapter)
 {
+    int status = 0;
     if (!adapter)
         return -1;
-    PrivMutexObtain(&adapter_list_lock);
+    status = PrivMutexObtain(&adapter_list_lock);
+    if (status != 0){
+       printf("%s:pthread_mutex_lock failed, status=%d\n",__func__,status);
+    }
+
     AppDoubleListRmNode(&adapter->link);
-    PrivMutexAbandon(&adapter_list_lock);
+
+    status = PrivMutexAbandon(&adapter_list_lock);
+    if (status != 0){
+       printf("%s:pthread_mutex_unlock failed, status=%d\n",__func__,status);
+    }
 
     adapter->adapter_status = UNREGISTERED;
 
diff --git a/APP_Framework/Framework/connection/lora/Make.defs b/APP_Framework/Framework/connection/lora/Make.defs
new file mode 100644
index 000000000..59f79c833
--- /dev/null
+++ b/APP_Framework/Framework/connection/lora/Make.defs
@@ -0,0 +1,7 @@
+############################################################################
+# APP_Framework/Framework/connection/lora/Make.defs
+############################################################################
+ifneq ($(CONFIG_ADAPTER_SX1278),)
+CONFIGURED_APPS += $(APPDIR)/../../../APP_Framework/Framework/connection/lora
+endif
+include $(wildcard $(APPDIR)/../../../APP_Framework/Framework/connection/lora/*/Make.defs)
diff --git a/APP_Framework/Framework/connection/lora/Makefile b/APP_Framework/Framework/connection/lora/Makefile
index 1a9114b6f..9fb8f1a2f 100644
--- a/APP_Framework/Framework/connection/lora/Makefile
+++ b/APP_Framework/Framework/connection/lora/Makefile
@@ -1,7 +1,16 @@
-SRC_FILES := adapter_lora.c
+include $(KERNEL_ROOT)/.config
+ifeq ($(CONFIG_ADD_NUTTX_FETURES),y)
+    include $(APPDIR)/Make.defs
+    CSRCS += adapter_lora.c
+    include $(APPDIR)/Application.mk
 
-ifeq ($(CONFIG_ADAPTER_SX1278),y)
-	SRC_DIR += sx1278
 endif
 
-include $(KERNEL_ROOT)/compiler.mk
+ifeq ($(CONFIG_ADD_XIZI_FETURES),y)
+    SRC_FILES := adapter_lora.c
+    ifeq ($(CONFIG_ADAPTER_SX1278),y)
+        SRC_DIR += sx1278
+    endif
+    include $(KERNEL_ROOT)/compiler.mk
+
+endif
diff --git a/APP_Framework/Framework/connection/lora/adapter_lora.c b/APP_Framework/Framework/connection/lora/adapter_lora.c
index c62e6a590..a91e0fdec 100644
--- a/APP_Framework/Framework/connection/lora/adapter_lora.c
+++ b/APP_Framework/Framework/connection/lora/adapter_lora.c
@@ -27,6 +27,7 @@ extern AdapterProductInfoType Sx1278Attach(struct Adapter *adapter);
 #define ADAPTER_LORA_NAME "lora"
 #define ADAPTER_LORA_CLIENT_NUM 6
 #define ADAPTER_LORA_DATA_LENGTH 128
+#define ADAPTER_LORA_RECV_DATA_LENGTH 256
 
 #define ADAPTER_LORA_DATA_HEAD            0x3C
 #define ADAPTER_LORA_NET_PANID            0x0102
@@ -96,12 +97,13 @@ struct LoraClientParam
 struct LoraDataFormat
 {
     uint8 flame_head;
+    uint8 reserved[3];
     uint32 length;
     uint16 panid;
     uint8 client_id;
     uint8 gateway_id;
 
-    uint8 data_type;
+    uint16 data_type;
     uint8 data[ADAPTER_LORA_DATA_LENGTH];
 
     uint16 crc16;
@@ -150,6 +152,35 @@ static int LoraCrc16Check(uint8 *data, uint16 length)
         return -1;
 }
 
+/**
+ * @description: Lora receive data check
+ * @param data receive data buffer
+ * @param length receive data length
+ * @param recv_data LoraDataFormat data
+ */
+static int LoraReceiveDataCheck(uint8 *data, uint16 length, struct LoraDataFormat *recv_data)
+{
+    int i;
+    uint32 recv_data_length = 0;
+    for ( i = 0; i < length; i ++) {
+        if (ADAPTER_LORA_DATA_HEAD == data[i]) {
+#ifdef ADD_NUTTX_FETURES
+            /*Big-Endian*/
+            recv_data_length = (data[i + 4] & 0xFF) | ((data[i + 5] & 0xFF) << 8) | ((data[i + 6] & 0xFF) << 16) | ((data[i + 7] & 0xFF) << 24);
+#else
+            /*Little-Endian*/
+            recv_data_length = ((data[i + 4] & 0xFF) << 24) | ((data[i + 5] & 0xFF) << 16) | ((data[i + 6] & 0xFF) << 8) | (data[i + 7] & 0xFF);
+#endif
+            if (sizeof(struct LoraDataFormat) == recv_data_length) {
+                memcpy(recv_data, (uint8 *)(data + i), sizeof(struct LoraDataFormat));
+                return 0;
+            }
+        }
+    }
+
+    return -1;
+}
+
 /**
  * @description: Lora Gateway reply connect request to Client
  * @param adapter Lora adapter pointer
@@ -338,6 +369,10 @@ static int LoraClientSendData(struct Adapter *adapter, void *send_buf, int lengt
 static int LoraGateWayDataAnalyze(struct Adapter *adapter, struct LoraDataFormat *gateway_recv_data)
 {
     int ret = 0;
+    printf("%s:gateway_recv_data\n",__func__);
+    printf("head 0x%x length %d panid 0x%x data_type 0x%x client_id 0x%x gateway_id 0x%x crc 0x%x\n",
+        gateway_recv_data->flame_head, gateway_recv_data->length, gateway_recv_data->panid, gateway_recv_data->data_type,
+        gateway_recv_data->client_id, gateway_recv_data->gateway_id, gateway_recv_data->crc16);
 
     if (LoraCrc16Check((uint8 *)gateway_recv_data, sizeof(struct LoraDataFormat)) < 0) {
         printf("LoraGateWayDataAnalyze CRC check error\n");
@@ -372,19 +407,22 @@ static int LoraGateWayDataAnalyze(struct Adapter *adapter, struct LoraDataFormat
 static int LoraClientDataAnalyze(struct Adapter *adapter, void *send_buf, int length)
 {
     int ret = 0;
+    uint8 lora_recv_data[ADAPTER_LORA_RECV_DATA_LENGTH] = {0};
     
     struct LoraDataFormat *client_recv_data = PrivMalloc(sizeof(struct LoraDataFormat));
 
     memset(client_recv_data, 0, sizeof(struct LoraDataFormat));
     
-    ret = AdapterDeviceRecv(adapter, client_recv_data, sizeof(struct LoraDataFormat));
-    if (0 == ret) {
+    ret = AdapterDeviceRecv(adapter, lora_recv_data, ADAPTER_LORA_RECV_DATA_LENGTH);
+    if (ret <= 0) {
         printf("LoraClientDataAnalyze recv error.Just return\n");
         PrivFree(client_recv_data);
         return -1;
     }
 
-    printf("client_recv_data\n");
+    LoraReceiveDataCheck(lora_recv_data, ADAPTER_LORA_RECV_DATA_LENGTH, client_recv_data);
+
+    printf("%s:client_recv_data\n",__func__);
     printf("head 0x%x length %d panid 0x%x data_type 0x%x client_id 0x%x gateway_id 0x%x crc 0x%x\n",
         client_recv_data->flame_head, client_recv_data->length, client_recv_data->panid, client_recv_data->data_type,
         client_recv_data->client_id, client_recv_data->gateway_id, client_recv_data->crc16);
@@ -437,6 +475,11 @@ static int LoraClientJoinNet(struct Adapter *adapter, unsigned short panid)
     client_join_data.data_type = ADAPTER_LORA_DATA_TYPE_JOIN;
     client_join_data.client_id = adapter->net_role_id;
     client_join_data.crc16 = LoraCrc16((uint8 *)&client_join_data, sizeof(struct LoraDataFormat) - 2);
+
+    printf("%s:client_join_data\n",__func__);
+    printf("head 0x%x length %d panid 0x%x data_type 0x%x client_id 0x%x gateway_id 0x%x crc 0x%x\n",
+        client_join_data.flame_head, client_join_data.length, client_join_data.panid, client_join_data.data_type,
+        client_join_data.client_id, client_join_data.gateway_id, client_join_data.crc16);
     
     if (AdapterDeviceJoin(adapter, (uint8 *)&client_join_data) < 0) {
         return -1;
@@ -479,15 +522,20 @@ static int LoraClientQuitNet(struct Adapter *adapter, unsigned short panid)
 int LoraGatewayProcess(struct Adapter *lora_adapter, struct LoraGatewayParam *gateway, struct LoraDataFormat *gateway_recv_data)
 {
     int i, ret = 0;
+    uint8 lora_recv_data[ADAPTER_LORA_RECV_DATA_LENGTH];
     switch (LoraGatewayState)
     {
     case LORA_STATE_IDLE:
-        ret = AdapterDeviceRecv(lora_adapter, gateway_recv_data, sizeof(struct LoraDataFormat));
-        if (0 == ret) {
+        memset(lora_recv_data, 0, ADAPTER_LORA_RECV_DATA_LENGTH);
+
+        ret = AdapterDeviceRecv(lora_adapter, lora_recv_data, ADAPTER_LORA_RECV_DATA_LENGTH);
+        if (ret <= 0)  {
             printf("LoraGatewayProcess IDLE recv error.Just return\n");
             break;
         }
 
+        LoraReceiveDataCheck(lora_recv_data, ADAPTER_LORA_RECV_DATA_LENGTH, gateway_recv_data);
+
         if (ADAPTER_LORA_DATA_TYPE_JOIN == gateway_recv_data->data_type) {
             LoraGatewayState = LORA_JOIN_NET;
         } else if (ADAPTER_LORA_DATA_TYPE_QUIT == gateway_recv_data->data_type) {
@@ -516,12 +564,15 @@ int LoraGatewayProcess(struct Adapter *lora_adapter, struct LoraGatewayParam *ga
                     continue;
                 }
 
-                ret = AdapterDeviceRecv(lora_adapter, gateway_recv_data, sizeof(struct LoraDataFormat));
-                if (0 == ret) {
+                memset(lora_recv_data, 0, ADAPTER_LORA_RECV_DATA_LENGTH);
+                ret = AdapterDeviceRecv(lora_adapter, lora_recv_data, ADAPTER_LORA_RECV_DATA_LENGTH);
+                if (ret <= 0) {
                     printf("LoraGatewayProcess recv error.Just return\n");
                     continue;
                 }
 
+                LoraReceiveDataCheck(lora_recv_data, ADAPTER_LORA_RECV_DATA_LENGTH, gateway_recv_data);
+
                 if (ADAPTER_LORA_DATA_TYPE_JOIN == gateway_recv_data->data_type) {
                     LoraGatewayState = LORA_JOIN_NET;
                 } else if (ADAPTER_LORA_DATA_TYPE_QUIT == gateway_recv_data->data_type) {
@@ -754,19 +805,30 @@ int AdapterLoraTest(void)
 
     //create lora gateway task
 #ifdef AS_LORA_GATEWAY_ROLE
+#ifdef ADD_NUTTX_FETURES
+    pthread_attr_t lora_gateway_attr = PTHREAD_ATTR_INITIALIZER;
+    lora_gateway_attr.priority = 20;
+    lora_gateway_attr.stacksize = 2048;
+#else
     pthread_attr_t lora_gateway_attr;
     lora_gateway_attr.schedparam.sched_priority = 20;
     lora_gateway_attr.stacksize = 2048;
+#endif
 
     PrivTaskCreate(&lora_gateway_task, &lora_gateway_attr, &LoraGatewayTask, (void *)adapter);
     PrivTaskStartup(&lora_gateway_task);
 
 #else //AS_LORA_CLIENT_ROLE
-    //create lora client task
+#ifdef ADD_NUTTX_FETURES
+    pthread_attr_t lora_client_attr = PTHREAD_ATTR_INITIALIZER;
+    lora_client_attr.priority = 20;
+    lora_client_attr.stacksize = 2048;
+#else
     pthread_attr_t lora_client_attr;
     lora_client_attr.schedparam.sched_priority = 20;
     lora_client_attr.stacksize = 2048;
-
+#endif
+    //create lora client task
     PrivTaskCreate(&lora_client_data_task, &lora_client_attr, &LoraClientDataTask, (void *)adapter);
     PrivTaskStartup(&lora_client_data_task);
 
@@ -778,4 +840,7 @@ int AdapterLoraTest(void)
 
     return 0;
 }
+#ifdef ADD_XIZI_FETURES
 SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_FUNC)|SHELL_CMD_PARAM_NUM(0)|SHELL_CMD_DISABLE_RETURN, AdapterLoraTest, AdapterLoraTest, show adapter lora information);
+#endif
+
diff --git a/APP_Framework/Framework/connection/lora/sx1278/Kconfig b/APP_Framework/Framework/connection/lora/sx1278/Kconfig
index a62a3df5d..4439c3f0f 100644
--- a/APP_Framework/Framework/connection/lora/sx1278/Kconfig
+++ b/APP_Framework/Framework/connection/lora/sx1278/Kconfig
@@ -9,6 +9,9 @@ if ADD_XIZI_FETURES
 endif
 
 if ADD_NUTTX_FETURES
+        config ADAPTER_SX1278_DRIVER
+        string "SX1278 device spi driver path"
+        default "/dev/spi2_lora"
 
 endif
 
diff --git a/APP_Framework/Framework/connection/lora/sx1278/Make.defs b/APP_Framework/Framework/connection/lora/sx1278/Make.defs
new file mode 100644
index 000000000..c5279e9fd
--- /dev/null
+++ b/APP_Framework/Framework/connection/lora/sx1278/Make.defs
@@ -0,0 +1,6 @@
+############################################################################
+# APP_Framework/Framework/connection/lora/sx1278/Make.defs
+############################################################################
+ifneq ($(CONFIG_ADAPTER_LORA_SX1278),)
+CONFIGURED_APPS += $(APPDIR)/../../../APP_Framework/Framework/connection/lora/sx1278
+endif
diff --git a/APP_Framework/Framework/connection/lora/sx1278/Makefile b/APP_Framework/Framework/connection/lora/sx1278/Makefile
index 70390c409..636fa525d 100644
--- a/APP_Framework/Framework/connection/lora/sx1278/Makefile
+++ b/APP_Framework/Framework/connection/lora/sx1278/Makefile
@@ -1,3 +1,13 @@
-SRC_FILES := sx1278.c
+include $(KERNEL_ROOT)/.config
+ifeq ($(CONFIG_ADD_NUTTX_FETURES),y)
+    include $(APPDIR)/Make.defs
+    CSRCS += sx1278.c
+    include $(APPDIR)/Application.mk
 
-include $(KERNEL_ROOT)/compiler.mk
+endif
+
+ifeq ($(CONFIG_ADD_XIZI_FETURES),y)
+    SRC_FILES := sx1278.c
+    include $(KERNEL_ROOT)/compiler.mk
+
+endif
diff --git a/APP_Framework/Framework/connection/lora/sx1278/sx1278.c b/APP_Framework/Framework/connection/lora/sx1278/sx1278.c
index 6c97e9aa0..914db8998 100644
--- a/APP_Framework/Framework/connection/lora/sx1278/sx1278.c
+++ b/APP_Framework/Framework/connection/lora/sx1278/sx1278.c
@@ -20,6 +20,32 @@
 
 #include <adapter.h>
 
+#ifdef ADD_NUTTX_FETURES
+ /**
+ * @description: Sx127x_Nuttx_Write function for nuttx
+ * @param fd - file descriptor to write to
+ * @param buf - Data to write
+ * @param buf - Length of data to write
+ * @return On success, the number of bytes written are returned (zero indicates nothing was written). On error, -1 is returned.
+ */
+static int Sx127x_Nuttx_Write(int fd, const void *buf, size_t len)
+{
+    int ret;
+
+    unsigned char *buffer = (unsigned char*)PrivMalloc(256);
+    if (!buffer)
+    {
+      printf("failed to allocate buffer\n");
+    }
+    memset(buffer, 0, 256);
+    memcpy(buffer,(unsigned char *)buf,len);
+
+    ret = PrivWrite(fd, buffer, len);
+    PrivFree(buffer);
+
+    return ret;
+}
+#endif
 /**
  * @description: Open SX1278 spi function
  * @param adapter - Lora device pointer
@@ -47,9 +73,14 @@ static int Sx1278Open(struct Adapter *adapter)
 static int Sx1278Close(struct Adapter *adapter)
 {
     /*step1: close sx1278 spi port*/
-    PrivClose(adapter->fd);
+    int ret;
+    ret = PrivClose(adapter->fd);
+    if(ret < 0){
+        printf("Sx1278 close failed: %d!\n", ret);
+        return -1;
+    }
 
-    ADAPTER_DEBUG("Sx1278Close done\n");
+    ADAPTER_DEBUG("Sx1278 Close done\n");
 
     return 0;
 }
@@ -73,13 +104,30 @@ static int Sx1278Ioctl(struct Adapter *adapter, int cmd, void *args)
  * @param priv_net_group - priv_net_group params
  * @return success: 0, failure: -1
  */
+#ifdef ADD_NUTTX_FETURES
 static int Sx1278Join(struct Adapter *adapter, unsigned char *priv_net_group)
 {
+    int ret;
+    ret = Sx127x_Nuttx_Write(adapter->fd, (void *)priv_net_group, 144);
+    if(ret < 0){
+        printf("Sx1278 Join net group failed: %d!\n", ret);
+    }
 
-    PrivWrite(adapter->fd, (void *)priv_net_group, 144);
-
-    return 0;
+    return ret;
 }
+#else
+static int Sx1278Join(struct Adapter *adapter, unsigned char *priv_net_group)
+{
+    int ret;
+    ret = PrivWrite(adapter->fd, (void *)priv_net_group, 144);
+    if(ret < 0){
+        printf("Sx1278 Join net group failed: %d!\n", ret);
+    }
+
+    return ret;
+}
+#endif
+
 
 /**
  * @description: SX1278 send data function
@@ -88,11 +136,28 @@ static int Sx1278Join(struct Adapter *adapter, unsigned char *priv_net_group)
  * @param len - data len
  * @return success: 0, failure: -1
  */
+#ifdef ADD_NUTTX_FETURES
 static int Sx1278Send(struct Adapter *adapter, const void *buf, size_t len)
 {
-    PrivWrite(adapter->fd, buf, len);
-    return 0;
+    int ret;
+    ret = Sx127x_Nuttx_Write(adapter->fd, buf, len);
+    if(ret < 0){
+        printf("send failed %d!\n", ret);
+    }
+    return ret;
 }
+#else
+static int Sx1278Send(struct Adapter *adapter, const void *buf, size_t len)
+{
+    int ret;
+    ret = PrivWrite(adapter->fd, buf, len);
+    if(ret < 0){
+        printf("send failed %d!\n", ret);
+    }
+    
+    return ret;
+}
+#endif
 
 /**
  * @description: SX1278 receive data function 
@@ -101,10 +166,25 @@ static int Sx1278Send(struct Adapter *adapter, const void *buf, size_t len)
  * @param len - data len
  * @return success: 0, failure: -1
  */
+#ifdef ADD_NUTTX_FETURES
+static int Sx1278Recv(struct Adapter *adapter, void *buf, size_t len)
+{
+    int ret;
+    struct sx127x_read_hdr_s recv_data;
+    ret = read(adapter->fd, &recv_data, sizeof(struct sx127x_read_hdr_s));
+    if (ret <= 0){
+        printf("Read failed %d!\n", ret);
+        return ret;
+    }
+    memcpy((uint8 *)buf, (uint8 *)(&recv_data), len);
+    return ret;
+}
+#else
 static int Sx1278Recv(struct Adapter *adapter, void *buf, size_t len)
 {
     return PrivRead(adapter->fd, buf, len);
 }
+#endif
 
 /**
  * @description: SX1278 quit lora net group function
@@ -112,12 +192,30 @@ static int Sx1278Recv(struct Adapter *adapter, void *buf, size_t len)
  * @param priv_net_group - priv_net_group params
  * @return success: 0, failure: -1
  */
+#ifdef ADD_NUTTX_FETURES
 static int Sx1278Quit(struct Adapter *adapter, unsigned char *priv_net_group)
 {
-    PrivWrite(adapter->fd, (void *)priv_net_group, 144);
+    int ret;
+    ret = Sx127x_Nuttx_Write(adapter->fd, (void *)priv_net_group, 144);
+    if(ret < 0){
+        printf("Sx1278 quit net group failed %d!\n", ret);
+    }
 
-    return 0;
+    return ret;
 }
+#else
+static int Sx1278Quit(struct Adapter *adapter, unsigned char *priv_net_group)
+{
+    int ret;
+    ret = PrivWrite(adapter->fd, (void *)priv_net_group, 144);
+    if(ret < 0){
+        printf("Sx1278 quit net group failed %d!\n", ret);
+    }
+
+    return ret;
+}
+
+#endif
 
 static const struct PrivProtocolDone sx1278_done = 
 {
diff --git a/APP_Framework/Framework/transform_layer/nuttx/transform.c b/APP_Framework/Framework/transform_layer/nuttx/transform.c
index 1cb49fd61..7b8553a1a 100644
--- a/APP_Framework/Framework/transform_layer/nuttx/transform.c
+++ b/APP_Framework/Framework/transform_layer/nuttx/transform.c
@@ -11,7 +11,7 @@
 */
 
 /**
- * @file xiuos.c
+ * @file transform.c
  * @brief Converts the framework interface to an operating system interface
  * @version 1.0
  * @author AIIT XUOS Lab
diff --git a/APP_Framework/Framework/transform_layer/nuttx/transform.h b/APP_Framework/Framework/transform_layer/nuttx/transform.h
index 19b2b56c2..e99456053 100644
--- a/APP_Framework/Framework/transform_layer/nuttx/transform.h
+++ b/APP_Framework/Framework/transform_layer/nuttx/transform.h
@@ -27,6 +27,7 @@
 #include <nuttx/time.h>
 #include <stddef.h>
 #include <stdint.h>
+#include <nuttx/wireless/lpwan/sx127x.h>
 
 typedef uint8_t uint8;
 typedef uint16_t uint16;
@@ -108,7 +109,7 @@ struct PinDevIrq
 struct PinParam
 {
     int cmd;//< cmd:GPIO_CONFIG_MODE/GPIO_IRQ_REGISTER/GPIO_IRQ_FREE/GPIO_IRQ_DISABLE/GPIO_IRQ_ENABLE
-    long pin;//< pin number
+    long  pin;//< pin number
     int mode;//< pin mode: input/output
     struct PinDevIrq irq_set;//< pin irq set
     uint64 arg;
@@ -171,6 +172,9 @@ int PrivMutexDelete(pthread_mutex_t *p_mutex);
 int PrivMutexObtain(pthread_mutex_t *p_mutex);
 int PrivMutexAbandon(pthread_mutex_t *p_mutex);
 
+
+
+
 /*********************semaphore**********************/
 
 int PrivSemaphoreCreate(sem_t *sem, int pshared, unsigned int value);
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/adb/defconfig b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/adb/defconfig
index 1c7327558..4dee2a8c5 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/adb/defconfig
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/adb/defconfig
@@ -73,14 +73,14 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
 CONFIG_STM32_OTGFS=y
 CONFIG_STM32_PWR=y
 CONFIG_STM32_SPI2=y
-CONFIG_STM32_USART2=y
+CONFIG_STM32_USART1=y
 CONFIG_SYMTAB_ORDEREDBYNAME=y
 CONFIG_SYSTEM_ADBD=y
 CONFIG_SYSTEM_NSH=y
 CONFIG_SYSTEM_NSH_SYMTAB=y
 CONFIG_SYSTEM_NSH_SYMTAB_ARRAYNAME="g_symtab"
 CONFIG_SYSTEM_NSH_SYMTAB_COUNTNAME="g_nsymbols"
-CONFIG_USART2_SERIAL_CONSOLE=y
+CONFIG_USART1_SERIAL_CONSOLE=y
 CONFIG_USBADB=y
 CONFIG_USBDEV=y
 CONFIG_USERMAIN_STACKSIZE=3072
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/audio/defconfig b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/audio/defconfig
index 16e35c095..05b29fe9b 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/audio/defconfig
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/audio/defconfig
@@ -67,13 +67,13 @@ CONFIG_STM32_PWR=y
 CONFIG_STM32_SPI1=y
 CONFIG_STM32_SPI3=y
 CONFIG_STM32_SPI_DMA=y
-CONFIG_STM32_USART2=y
+CONFIG_STM32_USART1=y
 CONFIG_STM32_USBHOST=y
 CONFIG_SYSTEM_NSH=y
 CONFIG_SYSTEM_NXPLAYER=y
-CONFIG_USART2_RXBUFSIZE=128
-CONFIG_USART2_SERIAL_CONSOLE=y
-CONFIG_USART2_TXBUFSIZE=128
+CONFIG_USART1_RXBUFSIZE=128
+CONFIG_USART1_SERIAL_CONSOLE=y
+CONFIG_USART1_TXBUFSIZE=128
 CONFIG_USBHOST_ISOC_DISABLE=y
 CONFIG_USBHOST_MSC=y
 CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/canard/defconfig b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/canard/defconfig
index 13e7308f5..1d3f01179 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/canard/defconfig
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/canard/defconfig
@@ -48,10 +48,10 @@ CONFIG_STM32_CAN1_BAUD=500000
 CONFIG_STM32_JTAG_SW_ENABLE=y
 CONFIG_STM32_PWR=y
 CONFIG_STM32_SPI1=y
-CONFIG_STM32_USART2=y
+CONFIG_STM32_USART1=y
 CONFIG_SYSTEM_NSH=y
 CONFIG_SYSTEM_TIME64=y
-CONFIG_USART2_RXBUFSIZE=128
-CONFIG_USART2_SERIAL_CONSOLE=y
-CONFIG_USART2_TXBUFSIZE=128
+CONFIG_USART1_RXBUFSIZE=128
+CONFIG_USART1_SERIAL_CONSOLE=y
+CONFIG_USART1_TXBUFSIZE=128
 CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/cxxtest/defconfig b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/cxxtest/defconfig
index 11ff70589..4ec45be69 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/cxxtest/defconfig
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/cxxtest/defconfig
@@ -35,11 +35,11 @@ CONFIG_START_DAY=2
 CONFIG_START_MONTH=11
 CONFIG_START_YEAR=2012
 CONFIG_STM32_JTAG_SW_ENABLE=y
-CONFIG_STM32_USART2=y
+CONFIG_STM32_USART1=y
 CONFIG_SYMTAB_ORDEREDBYNAME=y
 CONFIG_TESTING_CXXTEST=y
 CONFIG_UCLIBCXX=y
-CONFIG_USART2_RXBUFSIZE=128
-CONFIG_USART2_SERIAL_CONSOLE=y
-CONFIG_USART2_TXBUFSIZE=128
+CONFIG_USART1_RXBUFSIZE=128
+CONFIG_USART1_SERIAL_CONSOLE=y
+CONFIG_USART1_TXBUFSIZE=128
 CONFIG_USER_ENTRYPOINT="cxxtest_main"
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/elf/defconfig b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/elf/defconfig
index 8a62a6ee7..2b57bce5a 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/elf/defconfig
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/elf/defconfig
@@ -41,8 +41,8 @@ CONFIG_START_DAY=26
 CONFIG_START_MONTH=10
 CONFIG_START_YEAR=2012
 CONFIG_STM32_JTAG_SW_ENABLE=y
-CONFIG_STM32_USART2=y
+CONFIG_STM32_USART1=y
 CONFIG_SYMTAB_ORDEREDBYNAME=y
-CONFIG_USART2_SERIAL_CONSOLE=y
+CONFIG_USART1_SERIAL_CONSOLE=y
 CONFIG_USERMAIN_STACKSIZE=4096
 CONFIG_USER_ENTRYPOINT="elf_main"
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/kostest/defconfig b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/kostest/defconfig
index 7f9d275f7..930d57cdf 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/kostest/defconfig
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/kostest/defconfig
@@ -38,13 +38,14 @@ CONFIG_START_DAY=22
 CONFIG_START_MONTH=3
 CONFIG_START_YEAR=2013
 CONFIG_STM32_JTAG_SW_ENABLE=y
-CONFIG_STM32_USART2=y
+CONFIG_STM32_SPI2=y
+CONFIG_STM32_USART1=y
 CONFIG_SYMTAB_ORDEREDBYNAME=y
 CONFIG_SYS_RESERVED=9
 CONFIG_TESTING_OSTEST=y
 CONFIG_TESTING_OSTEST_NBARRIER_THREADS=3
 CONFIG_TESTING_OSTEST_STACKSIZE=2048
-CONFIG_USART2_RXBUFSIZE=128
-CONFIG_USART2_SERIAL_CONSOLE=y
-CONFIG_USART2_TXBUFSIZE=128
+CONFIG_USART1_RXBUFSIZE=128
+CONFIG_USART1_SERIAL_CONSOLE=y
+CONFIG_USART1_TXBUFSIZE=128
 CONFIG_USER_ENTRYPOINT="ostest_main"
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/lcd1602/defconfig b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/lcd1602/defconfig
index b0a34e63e..6263e5e87 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/lcd1602/defconfig
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/lcd1602/defconfig
@@ -50,9 +50,9 @@ CONFIG_STM32_I2C1=y
 CONFIG_STM32_JTAG_SW_ENABLE=y
 CONFIG_STM32_PWR=y
 CONFIG_STM32_SPI1=y
-CONFIG_STM32_USART2=y
+CONFIG_STM32_USART1=y
 CONFIG_SYSTEM_NSH=y
-CONFIG_USART2_RXBUFSIZE=128
-CONFIG_USART2_SERIAL_CONSOLE=y
-CONFIG_USART2_TXBUFSIZE=128
+CONFIG_USART1_RXBUFSIZE=128
+CONFIG_USART1_SERIAL_CONSOLE=y
+CONFIG_USART1_TXBUFSIZE=128
 CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/max31855/defconfig b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/max31855/defconfig
index 274902cc7..3006f295e 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/max31855/defconfig
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/max31855/defconfig
@@ -48,9 +48,9 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
 CONFIG_STM32_PWR=y
 CONFIG_STM32_SPI1=y
 CONFIG_STM32_SPI2=y
-CONFIG_STM32_USART2=y
+CONFIG_STM32_USART1=y
 CONFIG_SYSTEM_NSH=y
-CONFIG_USART2_RXBUFSIZE=128
-CONFIG_USART2_SERIAL_CONSOLE=y
-CONFIG_USART2_TXBUFSIZE=128
+CONFIG_USART1_RXBUFSIZE=128
+CONFIG_USART1_SERIAL_CONSOLE=y
+CONFIG_USART1_TXBUFSIZE=128
 CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/max7219/defconfig b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/max7219/defconfig
index 488869dd9..9c3eb2971 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/max7219/defconfig
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/max7219/defconfig
@@ -78,9 +78,9 @@ CONFIG_START_MONTH=4
 CONFIG_STM32_JTAG_SW_ENABLE=y
 CONFIG_STM32_PWR=y
 CONFIG_STM32_SPI1=y
-CONFIG_STM32_USART2=y
+CONFIG_STM32_USART1=y
 CONFIG_SYSTEM_NSH=y
-CONFIG_USART2_RXBUFSIZE=128
-CONFIG_USART2_SERIAL_CONSOLE=y
-CONFIG_USART2_TXBUFSIZE=128
+CONFIG_USART1_RXBUFSIZE=128
+CONFIG_USART1_SERIAL_CONSOLE=y
+CONFIG_USART1_TXBUFSIZE=128
 CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/mmcsdspi/defconfig b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/mmcsdspi/defconfig
index 13602d4fd..f041ade34 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/mmcsdspi/defconfig
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/mmcsdspi/defconfig
@@ -65,10 +65,10 @@ CONFIG_STM32_DMA2=y
 CONFIG_STM32_JTAG_SW_ENABLE=y
 CONFIG_STM32_PWR=y
 CONFIG_STM32_SPI2=y
-CONFIG_STM32_USART2=y
+CONFIG_STM32_USART1=y
 CONFIG_SYSTEM_NSH=y
 CONFIG_TESTING_OSTEST=y
-CONFIG_USART2_RXBUFSIZE=128
-CONFIG_USART2_SERIAL_CONSOLE=y
-CONFIG_USART2_TXBUFSIZE=128
+CONFIG_USART1_RXBUFSIZE=128
+CONFIG_USART1_SERIAL_CONSOLE=y
+CONFIG_USART1_TXBUFSIZE=128
 CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/modbus_slave/defconfig b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/modbus_slave/defconfig
index 6e7868e91..6c8c77411 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/modbus_slave/defconfig
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/modbus_slave/defconfig
@@ -54,12 +54,12 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
 CONFIG_STM32_PWR=y
 CONFIG_STM32_SPI1=y
 CONFIG_STM32_USART1=y
-CONFIG_STM32_USART2=y
+CONFIG_STM32_USART1=y
 CONFIG_SYSTEM_NSH=y
 CONFIG_USART1_BAUD=38400
 CONFIG_USART1_PARITY=2
 CONFIG_USART1_RS485=y
-CONFIG_USART2_RXBUFSIZE=128
-CONFIG_USART2_SERIAL_CONSOLE=y
-CONFIG_USART2_TXBUFSIZE=128
+CONFIG_USART1_RXBUFSIZE=128
+CONFIG_USART1_SERIAL_CONSOLE=y
+CONFIG_USART1_TXBUFSIZE=128
 CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/module/defconfig b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/module/defconfig
index fd7f26f4f..060ecf497 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/module/defconfig
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/module/defconfig
@@ -47,9 +47,9 @@ CONFIG_START_YEAR=2011
 CONFIG_STM32_JTAG_SW_ENABLE=y
 CONFIG_STM32_PWR=y
 CONFIG_STM32_SPI1=y
-CONFIG_STM32_USART2=y
+CONFIG_STM32_USART1=y
 CONFIG_SYSTEM_NSH=y
-CONFIG_USART2_RXBUFSIZE=128
-CONFIG_USART2_SERIAL_CONSOLE=y
-CONFIG_USART2_TXBUFSIZE=128
+CONFIG_USART1_RXBUFSIZE=128
+CONFIG_USART1_SERIAL_CONSOLE=y
+CONFIG_USART1_TXBUFSIZE=128
 CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/nsh/defconfig b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/nsh/defconfig
index a4f317394..4fd15e399 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/nsh/defconfig
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/nsh/defconfig
@@ -45,10 +45,10 @@ CONFIG_START_MONTH=12
 CONFIG_START_YEAR=2011
 CONFIG_STM32_JTAG_SW_ENABLE=y
 CONFIG_STM32_PWR=y
-CONFIG_STM32_SPI1=y
-CONFIG_STM32_USART2=y
+CONFIG_STM32_SPI2=y
+CONFIG_STM32_USART1=y
 CONFIG_SYSTEM_NSH=y
-CONFIG_USART2_RXBUFSIZE=128
-CONFIG_USART2_SERIAL_CONSOLE=y
-CONFIG_USART2_TXBUFSIZE=128
+CONFIG_USART1_RXBUFSIZE=128
+CONFIG_USART1_SERIAL_CONSOLE=y
+CONFIG_USART1_TXBUFSIZE=128
 CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/nxlines/defconfig b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/nxlines/defconfig
index d18dcf117..3d3bda7d8 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/nxlines/defconfig
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/nxlines/defconfig
@@ -66,9 +66,9 @@ CONFIG_STM32_FSMC=y
 CONFIG_STM32_JTAG_SW_ENABLE=y
 CONFIG_STM32_PWR=y
 CONFIG_STM32_SPI1=y
-CONFIG_STM32_USART2=y
+CONFIG_STM32_USART1=y
 CONFIG_SYMTAB_ORDEREDBYNAME=y
-CONFIG_USART2_RXBUFSIZE=128
-CONFIG_USART2_SERIAL_CONSOLE=y
-CONFIG_USART2_TXBUFSIZE=128
+CONFIG_USART1_RXBUFSIZE=128
+CONFIG_USART1_SERIAL_CONSOLE=y
+CONFIG_USART1_TXBUFSIZE=128
 CONFIG_USER_ENTRYPOINT="nxlines_main"
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/pm/defconfig b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/pm/defconfig
index a8ebda005..8583cdca7 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/pm/defconfig
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/pm/defconfig
@@ -49,9 +49,9 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
 CONFIG_STM32_PWR=y
 CONFIG_STM32_RTC=y
 CONFIG_STM32_TIM1=y
-CONFIG_STM32_USART2=y
+CONFIG_STM32_USART1=y
 CONFIG_SYSTEM_NSH=y
-CONFIG_USART2_RXBUFSIZE=128
-CONFIG_USART2_SERIAL_CONSOLE=y
-CONFIG_USART2_TXBUFSIZE=128
+CONFIG_USART1_RXBUFSIZE=128
+CONFIG_USART1_SERIAL_CONSOLE=y
+CONFIG_USART1_TXBUFSIZE=128
 CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/posix_spawn/defconfig b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/posix_spawn/defconfig
index c24eb776a..21b83ee56 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/posix_spawn/defconfig
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/posix_spawn/defconfig
@@ -43,9 +43,9 @@ CONFIG_START_DAY=26
 CONFIG_START_MONTH=10
 CONFIG_START_YEAR=2012
 CONFIG_STM32_JTAG_SW_ENABLE=y
-CONFIG_STM32_USART2=y
+CONFIG_STM32_USART1=y
 CONFIG_SYMTAB_ORDEREDBYNAME=y
-CONFIG_USART2_RXBUFSIZE=128
-CONFIG_USART2_SERIAL_CONSOLE=y
-CONFIG_USART2_TXBUFSIZE=128
+CONFIG_USART1_RXBUFSIZE=128
+CONFIG_USART1_SERIAL_CONSOLE=y
+CONFIG_USART1_TXBUFSIZE=128
 CONFIG_USER_ENTRYPOINT="posix_spawn_main"
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/pseudoterm/defconfig b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/pseudoterm/defconfig
index e31a5e1e4..404f7309e 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/pseudoterm/defconfig
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/pseudoterm/defconfig
@@ -46,10 +46,10 @@ CONFIG_START_YEAR=2011
 CONFIG_STM32_JTAG_SW_ENABLE=y
 CONFIG_STM32_PWR=y
 CONFIG_STM32_SPI1=y
-CONFIG_STM32_USART2=y
+CONFIG_STM32_USART1=y
 CONFIG_STM32_USART3=y
 CONFIG_SYSTEM_NSH=y
-CONFIG_USART2_RXBUFSIZE=128
-CONFIG_USART2_SERIAL_CONSOLE=y
-CONFIG_USART2_TXBUFSIZE=128
+CONFIG_USART1_RXBUFSIZE=128
+CONFIG_USART1_SERIAL_CONSOLE=y
+CONFIG_USART1_TXBUFSIZE=128
 CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/rgbled/defconfig b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/rgbled/defconfig
index c3472e284..ad09c7e54 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/rgbled/defconfig
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/rgbled/defconfig
@@ -57,9 +57,9 @@ CONFIG_STM32_TIM3=y
 CONFIG_STM32_TIM3_CH3OUT=y
 CONFIG_STM32_TIM3_CHANNEL=3
 CONFIG_STM32_TIM3_PWM=y
-CONFIG_STM32_USART2=y
+CONFIG_STM32_USART1=y
 CONFIG_SYSTEM_NSH=y
-CONFIG_USART2_RXBUFSIZE=128
-CONFIG_USART2_SERIAL_CONSOLE=y
-CONFIG_USART2_TXBUFSIZE=128
+CONFIG_USART1_RXBUFSIZE=128
+CONFIG_USART1_SERIAL_CONSOLE=y
+CONFIG_USART1_TXBUFSIZE=128
 CONFIG_USER_ENTRYPOINT="rgbled_main"
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/rndis/defconfig b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/rndis/defconfig
index 16646ebab..adfced3dd 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/rndis/defconfig
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/rndis/defconfig
@@ -88,14 +88,14 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
 CONFIG_STM32_OTGFS=y
 CONFIG_STM32_PWR=y
 CONFIG_STM32_SPI1=y
-CONFIG_STM32_USART2=y
+CONFIG_STM32_USART1=y
 CONFIG_SYMTAB_ORDEREDBYNAME=y
 CONFIG_SYSTEM_NSH=y
 CONFIG_SYSTEM_NSH_SYMTAB=y
 CONFIG_SYSTEM_NSH_SYMTAB_ARRAYNAME="g_symtab"
 CONFIG_SYSTEM_NSH_SYMTAB_COUNTNAME="g_nsymbols"
 CONFIG_SYSTEM_PING=y
-CONFIG_USART2_SERIAL_CONSOLE=y
+CONFIG_USART1_SERIAL_CONSOLE=y
 CONFIG_USBDEV=y
 CONFIG_USERMAIN_STACKSIZE=3072
 CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/st7789/defconfig b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/st7789/defconfig
index 29068d3b9..61bd8edf9 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/st7789/defconfig
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/st7789/defconfig
@@ -59,10 +59,10 @@ CONFIG_START_YEAR=2011
 CONFIG_STM32_JTAG_SW_ENABLE=y
 CONFIG_STM32_PWR=y
 CONFIG_STM32_SPI1=y
-CONFIG_STM32_USART2=y
+CONFIG_STM32_USART1=y
 CONFIG_SYSTEM_NSH=y
-CONFIG_USART2_RXBUFSIZE=128
-CONFIG_USART2_SERIAL_CONSOLE=y
-CONFIG_USART2_TXBUFSIZE=128
+CONFIG_USART1_RXBUFSIZE=128
+CONFIG_USART1_SERIAL_CONSOLE=y
+CONFIG_USART1_TXBUFSIZE=128
 CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_VIDEO_FB=y
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/testlibcxx/defconfig b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/testlibcxx/defconfig
index ded93ba37..c70ac036b 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/testlibcxx/defconfig
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/testlibcxx/defconfig
@@ -44,10 +44,10 @@ CONFIG_START_DAY=2
 CONFIG_START_MONTH=11
 CONFIG_START_YEAR=2012
 CONFIG_STM32_JTAG_SW_ENABLE=y
-CONFIG_STM32_USART2=y
+CONFIG_STM32_USART1=y
 CONFIG_SYMTAB_ORDEREDBYNAME=y
 CONFIG_SYSTEM_NSH=y
-CONFIG_USART2_RXBUFSIZE=128
-CONFIG_USART2_SERIAL_CONSOLE=y
-CONFIG_USART2_TXBUFSIZE=128
+CONFIG_USART1_RXBUFSIZE=128
+CONFIG_USART1_SERIAL_CONSOLE=y
+CONFIG_USART1_TXBUFSIZE=128
 CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/usbmsc/defconfig b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/usbmsc/defconfig
index 690fb94ac..86e58275b 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/usbmsc/defconfig
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/usbmsc/defconfig
@@ -47,14 +47,14 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
 CONFIG_STM32_OTGFS=y
 CONFIG_STM32_PWR=y
 CONFIG_STM32_SPI1=y
-CONFIG_STM32_USART2=y
+CONFIG_STM32_USART1=y
 CONFIG_SYSLOG_CHAR=y
 CONFIG_SYSLOG_DEVPATH="/dev/ttyS0"
 CONFIG_SYSTEM_NSH=y
 CONFIG_SYSTEM_USBMSC=y
 CONFIG_SYSTEM_USBMSC_DEVPATH1="/dev/ram0"
 CONFIG_TASK_NAME_SIZE=0
-CONFIG_USART2_SERIAL_CONSOLE=y
+CONFIG_USART1_SERIAL_CONSOLE=y
 CONFIG_USBDEV=y
 CONFIG_USBMSC=y
 CONFIG_USBMSC_REMOVABLE=y
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/usbnsh/defconfig b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/usbnsh/defconfig
index c2be8c320..c51b2589e 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/usbnsh/defconfig
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/usbnsh/defconfig
@@ -54,7 +54,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
 CONFIG_STM32_OTGFS=y
 CONFIG_STM32_PWR=y
 CONFIG_STM32_SPI1=y
-CONFIG_STM32_USART2=y
+CONFIG_STM32_USART1=y
 CONFIG_SYSTEM_NSH=y
 CONFIG_USBDEV=y
 CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/wifi/defconfig b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/wifi/defconfig
index 6fc94e5cc..462474f24 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/wifi/defconfig
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/wifi/defconfig
@@ -92,7 +92,7 @@ CONFIG_STM32_SPI2_DMA=y
 CONFIG_STM32_SPI3=y
 CONFIG_STM32_SPI3_DMA=y
 CONFIG_STM32_SPI_DMA=y
-CONFIG_STM32_USART2=y
+CONFIG_STM32_USART1=y
 CONFIG_SYMTAB_ORDEREDBYNAME=y
 CONFIG_SYSTEM_DHCPC_RENEW=y
 CONFIG_SYSTEM_NSH=y
@@ -102,9 +102,9 @@ CONFIG_SYSTEM_NSH_SYMTAB_COUNTNAME="g_nsymbols"
 CONFIG_SYSTEM_NTPC=y
 CONFIG_TESTING_OSTEST=y
 CONFIG_TESTING_OSTEST_FPUSIZE=132
-CONFIG_USART2_RXBUFSIZE=128
-CONFIG_USART2_SERIAL_CONSOLE=y
-CONFIG_USART2_TXBUFSIZE=128
+CONFIG_USART1_RXBUFSIZE=128
+CONFIG_USART1_SERIAL_CONSOLE=y
+CONFIG_USART1_TXBUFSIZE=128
 CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_WIRELESS_GS2200M=y
 CONFIG_WL_GS2200M=y
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/winbuild/defconfig b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/winbuild/defconfig
index 256962421..d1de6e677 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/winbuild/defconfig
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/winbuild/defconfig
@@ -32,13 +32,13 @@ CONFIG_START_DAY=21
 CONFIG_START_MONTH=9
 CONFIG_START_YEAR=2009
 CONFIG_STM32_JTAG_SW_ENABLE=y
-CONFIG_STM32_USART2=y
+CONFIG_STM32_USART1=y
 CONFIG_SYMTAB_ORDEREDBYNAME=y
 CONFIG_TESTING_OSTEST=y
 CONFIG_TESTING_OSTEST_NBARRIER_THREADS=3
 CONFIG_TESTING_OSTEST_STACKSIZE=2048
-CONFIG_USART2_RXBUFSIZE=128
-CONFIG_USART2_SERIAL_CONSOLE=y
-CONFIG_USART2_TXBUFSIZE=128
+CONFIG_USART1_RXBUFSIZE=128
+CONFIG_USART1_SERIAL_CONSOLE=y
+CONFIG_USART1_TXBUFSIZE=128
 CONFIG_USER_ENTRYPOINT="ostest_main"
 CONFIG_WINDOWS_NATIVE=y
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/xen1210/defconfig b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/xen1210/defconfig
index 11169f85b..1939bed03 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/xen1210/defconfig
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/configs/xen1210/defconfig
@@ -50,9 +50,9 @@ CONFIG_STM32_SPI1=y
 CONFIG_STM32_TIM1=y
 CONFIG_STM32_TIM1_CH1OUT=y
 CONFIG_STM32_TIM1_PWM=y
-CONFIG_STM32_USART2=y
+CONFIG_STM32_USART1=y
 CONFIG_SYSTEM_NSH=y
-CONFIG_USART2_RXBUFSIZE=128
-CONFIG_USART2_SERIAL_CONSOLE=y
-CONFIG_USART2_TXBUFSIZE=128
+CONFIG_USART1_RXBUFSIZE=128
+CONFIG_USART1_SERIAL_CONSOLE=y
+CONFIG_USART1_TXBUFSIZE=128
 CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/include/board.h b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/include/board.h
index 7db852fa3..bf871f982 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/include/board.h
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/include/board.h
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file board.h
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #ifndef __BOARDS_ARM_STM32_STM32F4AIIT_INCLUDE_BOARD_H
 #define __BOARDS_ARM_STM32_STM32F4AIIT_INCLUDE_BOARD_H
 
@@ -336,7 +345,7 @@
 #define DMACHAN_SPI1_RX   DMAMAP_SPI1_RX_1
 #define DMACHAN_SPI1_TX   DMAMAP_SPI1_TX_1
 
-/* SPI2 - Test MAX31855 on SPI2 PB10 = SCK, PB14 = MISO */
+/* SPI2 - Test sx127x on SPI2 PB13 = SCK, PC2 = MISO  PC3 MOSI*/
 
 #define GPIO_SPI2_MISO    GPIO_SPI2_MISO_2
 #define GPIO_SPI2_MOSI    GPIO_SPI2_MOSI_2
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/kernel/stm32_userspace.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/kernel/stm32_userspace.c
index 84609abd1..f9df0f3ab 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/kernel/stm32_userspace.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/kernel/stm32_userspace.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_userspace.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/aiit-arm32-board.h b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/aiit-arm32-board.h
index dd5da8363..a65768e0a 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/aiit-arm32-board.h
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/aiit-arm32-board.h
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file aiit-arm32-board.h
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #ifndef __BOARDS_ARM_STM32_STM32F4AIIT_SRC_STM32F4AIIT_H
 #define __BOARDS_ARM_STM32_STM32F4AIIT_SRC_STM32F4AIIT_H
 
@@ -229,10 +238,9 @@
 
 /* LoRa SX127x */
 
-#define GPIO_SX127X_DIO0    (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTD|GPIO_PIN0)
+#define GPIO_SX127X_DIO0    (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTC|GPIO_PIN1)
 
-#define GPIO_SX127X_RESET   (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_OUTPUT_CLEAR|\
-                             GPIO_SPEED_50MHz|GPIO_PORTD|GPIO_PIN4)
+#define GPIO_SX127X_RESET   (GPIO_PORTF|GPIO_PIN11)
 
 /* PWM
  *
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_appinit.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_appinit.c
index 10fe1a30e..b18a429eb 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_appinit.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_appinit.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_appinit.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_autoleds.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_autoleds.c
index 69c51fee7..7e2c05e82 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_autoleds.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_autoleds.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_autoleds.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_boot.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_boot.c
index 8460e5f83..9874024ea 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_boot.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_boot.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_boot.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_bringup.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_bringup.c
index 23c3761ea..1a68dc21d 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_bringup.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_bringup.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_bringup.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_buttons.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_buttons.c
index ee193197f..8d2f5a64c 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_buttons.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_buttons.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_buttons.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_can.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_can.c
index 6afe7b514..bb411b432 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_can.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_can.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_can.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_critmon.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_critmon.c
index 3d748a2c4..bad6a2377 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_critmon.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_critmon.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_critmon.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_cs43l22.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_cs43l22.c
index e9653df88..bb26e6203 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_cs43l22.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_cs43l22.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_cs43l22.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_ds1307.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_ds1307.c
index 1d9ad42c3..8dd2ae0b1 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_ds1307.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_ds1307.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_ds1307.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_enc28j60.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_enc28j60.c
index c0d57a3a9..e170eeb05 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_enc28j60.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_enc28j60.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_enc28j60.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /* 2MBit SPI FLASH OR ENC28J60
  *
  * -- ---- ------------ -----------------------------------------------------
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_ethernet.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_ethernet.c
index 2493c0418..f49a185f6 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_ethernet.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_ethernet.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_ethernet.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_extmem.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_extmem.c
index beba6d290..251958819 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_extmem.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_extmem.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_extmem.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_gs2200m.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_gs2200m.c
index 4cc980fad..236c3d344 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_gs2200m.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_gs2200m.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_gs2200m.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_hciuart.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_hciuart.c
index 92b809ce7..e94ed9b2a 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_hciuart.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_hciuart.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_hciuart.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_idle.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_idle.c
index 8c15bf3d7..4487f69cb 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_idle.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_idle.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_idle.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_max7219.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_max7219.c
index e61ea4a6c..eb5429413 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_max7219.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_max7219.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_max7219.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_max7219_leds.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_max7219_leds.c
index ea33afd1f..b479acf8c 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_max7219_leds.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_max7219_leds.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_max7219_leds.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_mmcsd.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_mmcsd.c
index e50cf3429..cf06dc462 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_mmcsd.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_mmcsd.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_mmcsd.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_netinit.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_netinit.c
index acbba225f..817503313 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_netinit.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_netinit.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_netinit.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_ostest.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_ostest.c
index 7fcce2c68..4ffe259c3 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_ostest.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_ostest.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_ostest.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_pca9635.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_pca9635.c
index 6c2bf5d95..4b29444bb 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_pca9635.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_pca9635.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_pca9635.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_pm.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_pm.c
index d1e9e1dbe..feffe53f7 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_pm.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_pm.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_pm.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_pmbuttons.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_pmbuttons.c
index 1aafc6823..8842e2e72 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_pmbuttons.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_pmbuttons.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_pmbuttons.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_pwm.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_pwm.c
index 6c974179e..5bafad301 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_pwm.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_pwm.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_pwm.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_reset.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_reset.c
index 473116ec6..923f44c11 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_reset.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_reset.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_reset.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_rgbled.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_rgbled.c
index e23476cbe..59f4ae12a 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_rgbled.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_rgbled.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_rgbled.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_romfs.h b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_romfs.h
index 7c37688d3..a50be6b5f 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_romfs.h
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_romfs.h
@@ -33,6 +33,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_romfs.h
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #ifndef __BOARDS_ARM_STM32_STM32F4AIIT_SRC_STM32_ROMFS_H
 #define __BOARDS_ARM_STM32_STM32F4AIIT_SRC_STM32_ROMFS_H
 
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_romfs_initialize.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_romfs_initialize.c
index 4f5e02e3c..dbedfdd1f 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_romfs_initialize.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_romfs_initialize.c
@@ -34,6 +34,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_romfs_initialize.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_sdio.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_sdio.c
index 0d0bb6131..17209f1af 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_sdio.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_sdio.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_sdio.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_spi.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_spi.c
index 737883466..13cc33ad3 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_spi.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_spi.c
@@ -17,6 +17,14 @@
  * under the License.
  *
  ****************************************************************************/
+/**
+* @file stm32_spi.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
 
 /****************************************************************************
  * Included Files
@@ -71,6 +79,7 @@ void weak_function stm32_spidev_initialize(void)
   stm32_configgpio(GPIO_MAX7219_CS);  /* MAX7219 chip select */
 #endif
 #ifdef CONFIG_LPWAN_SX127X
+  spiinfo("Configure GPIO for SX127X SPI2/CS\n");
   stm32_configgpio(GPIO_SX127X_CS);   /* SX127x chip select */
 #endif
 
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_ssd1289.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_ssd1289.c
index 37f5e5f52..e17fd9ab3 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_ssd1289.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_ssd1289.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_ssd1289.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_ssd1351.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_ssd1351.c
index a363238af..ea0a12a6b 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_ssd1351.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_ssd1351.c
@@ -18,6 +18,16 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_ssd1351.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_st7032.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_st7032.c
index 6a6634f8c..319eafe71 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_st7032.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_st7032.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_st7032.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_st7567.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_st7567.c
index 29c246c92..35a6ce241 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_st7567.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_st7567.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_st7567.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_st7789.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_st7789.c
index 6a1a560cb..e61f9c720 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_st7789.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_st7789.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_st7789.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_sx127x.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_sx127x.c
index b6043543b..8b3eff601 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_sx127x.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_sx127x.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_sx127x.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
@@ -103,7 +112,7 @@ static void sx127x_chip_reset(void)
 
   /* Configure reset as output */
 
-  stm32_configgpio(GPIO_SX127X_RESET);
+ stm32_configgpio(GPIO_SX127X_RESET | GPIO_OUTPUT | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR);
 
   /* Set pin to zero */
 
@@ -143,7 +152,7 @@ static int sx127x_freq_select(uint32_t freq)
 
   /* Only HF supported (BAND3 - 860-930 MHz) */
 
-  if (freq < SX127X_HFBAND_THR)
+  if (freq > SX127X_HFBAND_THR)
     {
       ret = -EINVAL;
       wlerr("LF band not supported\n");
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_timer.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_timer.c
index 848ceab14..351b0f868 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_timer.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_timer.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_timer.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_ug2864ambag01.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_ug2864ambag01.c
index 369965115..50d40dcd2 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_ug2864ambag01.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_ug2864ambag01.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_ug2864ambag01.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_ug2864hsweg01.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_ug2864hsweg01.c
index 91e845999..7db3aae0a 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_ug2864hsweg01.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_ug2864hsweg01.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_ug2864hsweg01.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_uid.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_uid.c
index ec44f3923..baee521f7 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_uid.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_uid.c
@@ -33,6 +33,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_uid.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_usb.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_usb.c
index f6a6f9c7f..cb7a036da 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_usb.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_usb.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_usb.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_usbmsc.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_usbmsc.c
index ef9504b0f..999a27292 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_usbmsc.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_usbmsc.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_usbmsc.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_userleds.c b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_userleds.c
index a3b4cdaa7..d8549802a 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_userleds.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-arm32-board/src/stm32_userleds.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_userleds.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-riscv64-board/include/board.h b/Ubiquitous/Nuttx/aiit_board/aiit-riscv64-board/include/board.h
index 52131b077..966069836 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-riscv64-board/include/board.h
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-riscv64-board/include/board.h
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file board.h
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #ifndef __BOARDS_K210_AIIT_RISCV64_INCLUDE_BOARD_H
 #define __BOARDS_K210_AIIT_RISCV64_INCLUDE_BOARD_H
 
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-riscv64-board/kernel/k210_userspace.c b/Ubiquitous/Nuttx/aiit_board/aiit-riscv64-board/kernel/k210_userspace.c
index 5dc24be78..ba57aba7c 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-riscv64-board/kernel/k210_userspace.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-riscv64-board/kernel/k210_userspace.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file k210_userspace.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-riscv64-board/src/aiit-riscv64-board.h b/Ubiquitous/Nuttx/aiit_board/aiit-riscv64-board/src/aiit-riscv64-board.h
index 0b4c64fb5..50cfa013e 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-riscv64-board/src/aiit-riscv64-board.h
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-riscv64-board/src/aiit-riscv64-board.h
@@ -18,6 +18,16 @@
  *
  ****************************************************************************/
 
+
+/**
+* @file aiit-riscv64-board.h
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #ifndef __AIIT_RISCV64_BOARDS_K210_H
 #define __AIIT_RISCV64_BOARDS_K210_H
 
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-riscv64-board/src/k210_appinit.c b/Ubiquitous/Nuttx/aiit_board/aiit-riscv64-board/src/k210_appinit.c
index 7b39f22d1..2a9a838d4 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-riscv64-board/src/k210_appinit.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-riscv64-board/src/k210_appinit.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file k210_appinit.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-riscv64-board/src/k210_boot.c b/Ubiquitous/Nuttx/aiit_board/aiit-riscv64-board/src/k210_boot.c
index 72f3bb169..e4ae4f4b9 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-riscv64-board/src/k210_boot.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-riscv64-board/src/k210_boot.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file k210_boot.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-riscv64-board/src/k210_bringup.c b/Ubiquitous/Nuttx/aiit_board/aiit-riscv64-board/src/k210_bringup.c
index e0c28fc18..a5ffc9ede 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-riscv64-board/src/k210_bringup.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-riscv64-board/src/k210_bringup.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file k210_bringup.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-riscv64-board/src/k210_gpio.c b/Ubiquitous/Nuttx/aiit_board/aiit-riscv64-board/src/k210_gpio.c
index c00b504a5..b4e71b8d5 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-riscv64-board/src/k210_gpio.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-riscv64-board/src/k210_gpio.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file k210_gpio.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-riscv64-board/src/k210_leds.c b/Ubiquitous/Nuttx/aiit_board/aiit-riscv64-board/src/k210_leds.c
index 56969956b..337a56715 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-riscv64-board/src/k210_leds.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-riscv64-board/src/k210_leds.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file k210_leds.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/aiit_board/aiit-riscv64-board/src/k210_ostest.c b/Ubiquitous/Nuttx/aiit_board/aiit-riscv64-board/src/k210_ostest.c
index 5731c0a1b..860296f66 100644
--- a/Ubiquitous/Nuttx/aiit_board/aiit-riscv64-board/src/k210_ostest.c
+++ b/Ubiquitous/Nuttx/aiit_board/aiit-riscv64-board/src/k210_ostest.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * boards/risc-v/k210/aiit-riscv64-board/src/c906_ostest.c
+ * boards/risc-v/k210/aiit-riscv64-board/src/k210_ostest.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file k210_ostest.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/apps/examples/sx127x_demo/sx127x_demo.c b/Ubiquitous/Nuttx/app_match_nuttx/apps/examples/sx127x_demo/sx127x_demo.c
new file mode 100644
index 000000000..59d83dcbc
--- /dev/null
+++ b/Ubiquitous/Nuttx/app_match_nuttx/apps/examples/sx127x_demo/sx127x_demo.c
@@ -0,0 +1,608 @@
+/****************************************************************************
+ * apps/examples/sx127x_demo/sx127x_demo.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/**
+* @file sx127x_demo.c
+* @brief nuttx source code
+*                 https://github.com/apache/incubator-nuttx-apps
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <sys/ioctl.h>
+
+#include <unistd.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include <stdio.h>
+#include <unistd.h>
+#include <string.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <debug.h>
+#include <poll.h>
+#include <fcntl.h>
+
+#include <nuttx/wireless/lpwan/sx127x.h>
+#include <nuttx/input/buttons.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifdef CONFIG_ADAPTER_SX1278_DRIVER
+#  define DEV_NAME    CONFIG_ADAPTER_SX1278_DRIVER
+#else
+#  define DEV_NAME     "/dev/sx127x"
+#endif
+
+#define TX_BUFFER_MAX 255
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+enum app_mode_e
+{
+  APP_MODE_RX   = 0,
+  APP_MODE_TX   = 1,
+  APP_MODE_RXTX = 2,
+  APP_MODE_SCAN = 3
+};
+
+enum app_modulation_e
+{
+  APP_MODULATION_LORA = 0,
+  APP_MODULATION_FSK  = 1,
+  APP_MODULATION_OOK  = 2,
+};
+
+/* Application arguments */
+
+struct args_s
+{
+  uint32_t frequency;
+  int16_t  interval;
+  int16_t  time;
+  uint8_t  app_mode;
+  uint8_t  modulation;
+  uint8_t  datalen;
+  int8_t   power;
+};
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+struct args_s g_args;
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: sx127x_help
+ ****************************************************************************/
+
+static void sx127x_help(FAR struct args_s *args)
+{
+  printf("Usage: sx127x [OPTIONS]\n\n");
+  printf("  [-m modulation] modulation scheme (default=0)\n");
+  printf("       0 - LORA\n");
+  printf("       1 - FSK\n");
+  printf("       2 - OOK\n");
+  printf("  [-f frequency Hz] RF frequency (default=%d)\n",
+         CONFIG_EXAMPLES_SX127X_RFFREQ);
+  printf("  [-i interval sec] radio access time interval (default=%d)\n",
+         CONFIG_EXAMPLES_SX127X_INTERVAL);
+  printf("  [-l datalen] data length for TX (default=%d)\n",
+         CONFIG_EXAMPLES_SX127X_TXDATA);
+  printf("  [-d time sec] demo time, 0 if infinity (default=%d)\n",
+         CONFIG_EXAMPLES_SX127X_TIME);
+  printf("  [-r/-t/-x/-s] select app mode (default=r)\n");
+  printf("       r - RX\n");
+  printf("       t - TX\n");
+  printf("       x - RX/TX (not supported yet)\n");
+  printf("       s - SCAN\n");
+  printf("  [-p power dBm] TX power (default=%d)\n",
+         CONFIG_EXAMPLES_SX127X_TXPOWER);
+  printf("  [-h]  print this message\n");
+}
+
+/****************************************************************************
+ * Name: arg_string
+ ****************************************************************************/
+
+static int arg_string(FAR char **arg, FAR char **value)
+{
+  FAR char *ptr = *arg;
+
+  if (ptr[2] == '\0')
+    {
+      *value = arg[1];
+      return 2;
+    }
+  else
+    {
+      *value = &ptr[2];
+      return 1;
+    }
+}
+
+/****************************************************************************
+ * Name: arg_decimal
+ ****************************************************************************/
+
+static int arg_decimal(FAR char **arg, FAR int *value)
+{
+  FAR char *string;
+  int ret;
+
+  ret = arg_string(arg, &string);
+  *value = atoi(string);
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: parse_args
+ ****************************************************************************/
+
+static void parse_args(FAR struct args_s *args, int argc, FAR char **argv)
+{
+  FAR char *ptr;
+  int index;
+  int nargs;
+  int i_value;
+
+  for (index = 1; index < argc; )
+    {
+      ptr = argv[index];
+      if (ptr[0] != '-')
+        {
+          printf("Invalid options format: %s\n", ptr);
+          exit(0);
+        }
+
+      switch (ptr[1])
+        {
+          /* Interval between RX/TX operations */
+
+          case 'i':
+            {
+              nargs = arg_decimal(&argv[index], &i_value);
+              index += nargs;
+
+              args->interval = i_value;
+
+              break;
+            }
+
+          /* Demo time */
+
+          case 'd':
+            {
+              nargs = arg_decimal(&argv[index], &i_value);
+              index += nargs;
+
+              args->time = i_value;
+
+              break;
+            }
+
+          /* Data length for TX */
+
+          case 'l':
+            {
+              nargs = arg_decimal(&argv[index], &i_value);
+              index += nargs;
+
+              args->datalen = i_value;
+
+              break;
+            }
+
+            /* Modem RF frequency */
+
+          case 'f':
+            {
+              nargs = arg_decimal(&argv[index], &i_value);
+              index += nargs;
+
+              args->frequency = i_value;
+
+              break;
+            }
+
+          /* Modem modulation scheme */
+
+          case 'm':
+            {
+              nargs = arg_decimal(&argv[index], &i_value);
+              index += nargs;
+
+              args->modulation = i_value;
+
+              break;
+            }
+
+          /* Modem TX power */
+
+          case 'p':
+            {
+              nargs = arg_decimal(&argv[index], &i_value);
+              index += nargs;
+
+              args->power = i_value;
+
+              break;
+            }
+
+          /* RX mode */
+
+          case 'r':
+            {
+              args->app_mode = APP_MODE_RX;
+              index += 1;
+
+              break;
+            }
+
+          /* TX mode */
+
+          case 't':
+            {
+              args->app_mode = APP_MODE_TX;
+              index += 1;
+
+              break;
+            }
+
+          /* RX-TX mode */
+
+          case 'x':
+            {
+              args->app_mode = APP_MODE_RXTX;
+              index += 1;
+
+              break;
+            }
+
+          /* Scan mode */
+
+          case 's':
+            {
+              args->app_mode = APP_MODE_SCAN;
+              index += 1;
+
+              break;
+            }
+
+          /* Print help message */
+
+          case 'h':
+            {
+              sx127x_help(args);
+              exit(0);
+            }
+
+          /* Unsupported option */
+
+          default:
+            {
+              printf("Unsupported option: %s\n", ptr);
+              sx127x_help(args);
+              exit(1);
+            }
+        }
+    }
+}
+
+/****************************************************************************
+ * Name: validate_args
+ ****************************************************************************/
+
+static int validate_args(FAR struct args_s *args)
+{
+  int ret = OK;
+
+  /* TODO */
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: print_hex
+ ****************************************************************************/
+
+static void print_hex(uint8_t *data, int len)
+{
+  int i;
+
+  if (len == 0)
+    {
+      printf("empty buffer!\n");
+    }
+  else
+    {
+      for (i = 0 ; i < len ; i += 1)
+        {
+          printf("0x%02x ", data[i]);
+
+          if ((i + 1) % 10 == 0)
+            {
+              printf("\n");
+            }
+        }
+    }
+
+  printf("\n");
+}
+
+/****************************************************************************
+ * Name: modulation_set
+ ****************************************************************************/
+
+static int modulation_set(int fd, uint8_t modulation)
+{
+  int ret = OK;
+
+  switch (modulation)
+    {
+      case APP_MODULATION_LORA:
+        {
+          printf("LORA modulation\n");
+
+          modulation = SX127X_MODULATION_LORA;
+          ret = ioctl(fd, SX127XIOC_MODULATIONSET,
+                      (unsigned long)&modulation);
+          if (ret < 0)
+            {
+              printf("failed change modulation %d!\n", ret);
+              goto errout;
+            }
+          break;
+        }
+
+      case APP_MODULATION_FSK:
+        {
+          printf("FSK modulation\n");
+
+          modulation = SX127X_MODULATION_FSK;
+          ret = ioctl(fd, SX127XIOC_MODULATIONSET,
+                      (unsigned long)&modulation);
+          if (ret < 0)
+            {
+              printf("failed change modulation %d!\n", ret);
+              goto errout;
+            }
+          break;
+        }
+
+      case APP_MODULATION_OOK:
+        {
+          printf("OOK modulation\n");
+
+          modulation = SX127X_MODULATION_OOK;
+          ret = ioctl(fd, SX127XIOC_MODULATIONSET,
+                      (unsigned long)&modulation);
+          if (ret < 0)
+            {
+              printf("failed change modulation %d!\n", ret);
+              goto errout;
+            }
+          break;
+        }
+
+      default:
+        {
+          printf("Unsupported app modulation %d!\n", modulation);
+          goto errout;
+        }
+    }
+
+errout:
+  return ret;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+int main(int argc, FAR char *argv[])
+{
+#ifdef CONFIG_LPWAN_SX127X_RXSUPPORT
+  struct sx127x_read_hdr_s data;
+#endif
+  struct sx127x_chanscan_ioc_s chanscan;
+  struct args_s   *args;
+  struct timespec tstart;
+  struct timespec tnow;
+  uint8_t buffer[TX_BUFFER_MAX];
+  uint8_t opmode;
+  uint8_t i;
+  int ret;
+  int fd;
+
+  /* Initialize buffer with data */
+
+  for (i = 0; i < TX_BUFFER_MAX; i += 1)
+    {
+      buffer[i] = i;
+    }
+
+  /* Initialize variables */
+
+  args = &g_args;
+  args->app_mode   = APP_MODE_RX;
+  args->modulation = APP_MODULATION_LORA;
+  args->frequency  = CONFIG_EXAMPLES_SX127X_RFFREQ;
+  args->power      = CONFIG_EXAMPLES_SX127X_TXPOWER;
+  args->interval   = CONFIG_EXAMPLES_SX127X_INTERVAL;
+  args->time       = CONFIG_EXAMPLES_SX127X_TIME;
+  args->datalen    = CONFIG_EXAMPLES_SX127X_TXDATA;
+
+  /* Parse the command line */
+
+  parse_args(args, argc, argv);
+
+  /* Validate arguments */
+
+  ret = validate_args(args);
+  if (ret != OK)
+    {
+      printf("sx127x_main: validate arguments failed!\n");
+      goto errout;
+    }
+
+  printf("Start sx127x_demo\n");
+
+  /* Open device */
+
+  fd = open(DEV_NAME, O_RDWR);
+  if (fd < 0)
+    {
+      int errcode = errno;
+      printf("ERROR: Failed to open device %s: %d\n", DEV_NAME, errcode);
+      goto errout;
+    }
+
+  /* Get start time */
+
+  clock_gettime(CLOCK_REALTIME, &tstart);
+
+  while (1)
+    {
+      switch (args->app_mode)
+        {
+#ifdef CONFIG_LPWAN_SX127X_TXSUPPORT
+          /* Transmit some data */
+
+          case APP_MODE_TX:
+            {
+              printf("\nSend %d bytes\n", args->datalen);
+
+              ret = write(fd, buffer, args->datalen);
+              if (ret < 0)
+                {
+                  printf("write failed %d!\n", ret);
+                  goto errout;
+                }
+
+              break;
+            }
+#endif
+
+#ifdef CONFIG_LPWAN_SX127X_RXSUPPORT
+          /* Receive data */
+
+          case APP_MODE_RX:
+            {
+              printf("Waiting for data\n");
+
+              ret = read(fd, &data, sizeof(struct sx127x_read_hdr_s));
+              if (ret < 0)
+                {
+                  printf("Read failed %d!\n", ret);
+                  goto errout;
+                }
+
+              printf("\nReceived:\n");
+              printf("SNR  = %d\n", data.snr);
+              printf("RSSI = %d\n", data.rssi);
+              printf("len  = %d\n", data.datalen);
+              print_hex(data.data, data.datalen);
+              printf("\n");
+
+              break;
+            }
+#endif
+
+          /* Send some data and wait for response */
+
+          case APP_MODE_RXTX:
+            {
+              printf("TODO: APP RXTX\n");
+              break;
+            }
+
+          /* Scan channel */
+
+          case APP_MODE_SCAN:
+            {
+              /* TODO: Configure this from command line */
+
+              chanscan.freq     = args->frequency;
+              chanscan.rssi_thr = -30;
+              chanscan.stime    = 2;
+              chanscan.free     = false;
+              chanscan.rssi_max = 0;
+
+              ret = ioctl(fd, SX127XIOC_CHANSCAN, (unsigned long)&chanscan);
+              if (ret < 0)
+                {
+                  printf("failed chanscan %d!\n", ret);
+                  goto errout;
+                }
+
+              printf("freq = %" PRId32 " max = %d min = %d free = %d\n",
+                     chanscan.freq,
+                     chanscan.rssi_max, chanscan.rssi_min, chanscan.free);
+
+              break;
+            }
+
+          default:
+            {
+              printf("Unsupported app mode!\n");
+              goto errout;
+            }
+        }
+
+      printf("wait %d sec ...\n", args->interval);
+      sleep(args->interval);
+
+      if (args->time > 0)
+        {
+          /* Get time now */
+
+          clock_gettime(CLOCK_REALTIME, &tnow);
+
+          if (tnow.tv_sec - tstart.tv_sec >= args->time)
+            {
+              printf("Timeout - force exit!\n");
+              goto errout;
+            }
+        }
+    }
+
+errout:
+  close(fd);
+  return 0;
+}
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/apps/nshlib/nsh.h b/Ubiquitous/Nuttx/app_match_nuttx/apps/nshlib/nsh.h
index 9cb18800c..a10aa150d 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/apps/nshlib/nsh.h
+++ b/Ubiquitous/Nuttx/app_match_nuttx/apps/nshlib/nsh.h
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file nsh.h
+* @brief nuttx source code
+*                 https://github.com/apache/incubator-nuttx-apps
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #ifndef __APPS_NSHLIB_NSH_H
 #define __APPS_NSHLIB_NSH_H
 
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c b/Ubiquitous/Nuttx/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c
index 29375f2a4..f42fec198 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c
+++ b/Ubiquitous/Nuttx/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c
@@ -1,37 +1,22 @@
-/****************************************************************************
- * apps/nshlib/nsh_Applicationscmd.c
- *
- *   Copyright (C) 2016 Alan Carvalho de Assis. All rights reserved.
- *   Author: Alan Carvalho de Assis <acassis@gmail.com>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
+/*
+* Copyright (c) 2020 AIIT XUOS Lab
+* XiUOS is licensed under Mulan PSL v2.
+* You can use this software according to the terms and conditions of the Mulan PSL v2.
+* You may obtain a copy of Mulan PSL v2 at:
+*        http://license.coscl.org.cn/MulanPSL2
+* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+* See the Mulan PSL v2 for more details.
+*/
+
+/**
+ * @file nsh_Applicationscmd.c
+ * @brief nsh cmd function support
+ * @version 1.0
+ * @author AIIT XUOS Lab
+ * @date 2022.03.17
+ */
 
 /****************************************************************************
  * Included Files
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/apps/nshlib/nsh_command.c b/Ubiquitous/Nuttx/app_match_nuttx/apps/nshlib/nsh_command.c
index cb704d392..a60bc254f 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/apps/nshlib/nsh_command.c
+++ b/Ubiquitous/Nuttx/app_match_nuttx/apps/nshlib/nsh_command.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file nsh_command.c
+* @brief nuttx source code
+*                 https://github.com/apache/incubator-nuttx-apps
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/arm/src/stm32/stm32_serial.c b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/arm/src/stm32/stm32_serial.c
index a9b9da4af..352a9da76 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/arm/src/stm32/stm32_serial.c
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/arm/src/stm32/stm32_serial.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_serial.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/common/riscv_internal.h b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/common/riscv_internal.h
index 5d9c4926b..4a861acee 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/common/riscv_internal.h
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/common/riscv_internal.h
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file riscv_internal.h
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #ifndef __ARCH_RISCV_SRC_COMMON_UP_INTERNAL_H
 #define __ARCH_RISCV_SRC_COMMON_UP_INTERNAL_H
 
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/apu.c b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/apu.c
index cfd01c0e4..a60eec10b 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/apu.c
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/apu.c
@@ -12,6 +12,16 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
+
+/**
+* @file apu.c
+* @brief kendryte k210 source code
+*                https://github.com/kendryte/kendryte-standalone-sdk.git
+* @version 1.0
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #include <debug.h>
 #include <stddef.h>
 #include <stdint.h>
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/apu.h b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/apu.h
index 9c66c9da1..3728c2327 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/apu.h
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/apu.h
@@ -12,6 +12,17 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
+
+/**
+* @file apu.h
+* @brief kendryte k210 source code
+*                https://github.com/kendryte/kendryte-standalone-sdk.git
+* @version 1.0
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
+
 #ifndef _apu_H_
 #define _apu_H_
 
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/atomic.h b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/atomic.h
index 373f5d9ba..b3eb1c58a 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/atomic.h
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/atomic.h
@@ -13,6 +13,16 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
+
+/**
+* @file atomic.h
+* @brief kendryte k210 source code
+*                https://github.com/kendryte/kendryte-standalone-sdk.git
+* @version 1.0
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #ifndef _BSP_ATOMIC_H
 #define _BSP_ATOMIC_H
 
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/bsp.h b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/bsp.h
index 2aeb19e3b..5ef25bac7 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/bsp.h
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/bsp.h
@@ -1,3 +1,12 @@
+/**
+* @file bsp.h
+* @brief kendryte k210 source code
+*                https://github.com/kendryte/kendryte-standalone-sdk.git
+* @version 1.0
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #ifndef _KENDRYTE_BSP_H
 #define _KENDRYTE_BSP_H
 #include "atomic.h"
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/clint.c b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/clint.c
index a1eba5878..3ad5b6f53 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/clint.c
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/clint.c
@@ -12,6 +12,16 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
+
+/**
+* @file clint.c
+* @brief kendryte k210 source code
+*                https://github.com/kendryte/kendryte-standalone-sdk.git
+* @version 1.0
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #include <stddef.h>
 #include <stdint.h>
 #include "encoding.h"
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/clint.h b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/clint.h
index 07c2f4cb0..7f0aeb193 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/clint.h
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/clint.h
@@ -37,6 +37,15 @@
  * | 0x0200EFFC | Reserved                        |
  */
 
+/**
+* @file clint.h
+* @brief kendryte k210 source code
+*                https://github.com/kendryte/kendryte-standalone-sdk.git
+* @version 1.0
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #ifndef _DRIVER_CLINT_H
 #define _DRIVER_CLINT_H
 
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/dmac.c b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/dmac.c
index cbd8819e4..30d79f3f1 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/dmac.c
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/dmac.c
@@ -12,6 +12,16 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
+
+/**
+* @file damc.c
+* @brief kendryte k210 source code
+*                https://github.com/kendryte/kendryte-standalone-sdk.git
+* @version 1.0
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #include <stdint.h>
 #include <stddef.h>
 #include <stdio.h>
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/dmac.h b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/dmac.h
index 99cc5545e..a27504cf7 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/dmac.h
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/dmac.h
@@ -12,6 +12,16 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
+
+/**
+* @file damc.h
+* @brief kendryte k210 source code
+*                https://github.com/kendryte/kendryte-standalone-sdk.git
+* @version 1.0
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #ifndef _DRIVER_DMAC_H
 #define _DRIVER_DMAC_H
 
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/encoding.h b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/encoding.h
index 11f723047..8a00bba19 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/encoding.h
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/encoding.h
@@ -12,6 +12,16 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
+
+/**
+* @file encoding.h
+* @brief kendryte k210 source code
+*                https://github.com/kendryte/kendryte-standalone-sdk.git
+* @version 1.0
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #ifndef RISCV_CSR_ENCODING_H
 #define RISCV_CSR_ENCODING_H
 #include <arch/csr.h>
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/fft.c b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/fft.c
index 2da65c3e1..047a2df4d 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/fft.c
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/fft.c
@@ -12,6 +12,16 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
+
+/**
+* @file fft.c
+* @brief kendryte k210 source code
+*                https://github.com/kendryte/kendryte-standalone-sdk.git
+* @version 1.0
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #include <stddef.h>
 #include <assert.h>
 #include "dmac.h"
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/fft.h b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/fft.h
index 6faa8c5a9..16c4809b1 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/fft.h
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/fft.h
@@ -12,6 +12,16 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
+
+/**
+* @file fft.h
+* @brief kendryte k210 source code
+*                https://github.com/kendryte/kendryte-standalone-sdk.git
+* @version 1.0
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #ifndef _DRIVER_FFT_H
 #define _DRIVER_FFT_H
 
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/fpioa.c b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/fpioa.c
index 29dea63d2..6ec7b9ce2 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/fpioa.c
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/fpioa.c
@@ -12,6 +12,16 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
+
+/**
+* @file fpioa.c
+* @brief kendryte k210 source code
+*                https://github.com/kendryte/kendryte-standalone-sdk.git
+* @version 1.0
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #include <stddef.h>
 #include <stdint.h>
 #include "sysctl.h"
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/fpioa.h b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/fpioa.h
index 923333525..afeccb75b 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/fpioa.h
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/fpioa.h
@@ -12,25 +12,15 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
+
 /**
- * @file
- * @brief      Field Programmable GPIO Array (FPIOA)
- *
- *             The FPIOA peripheral supports the following features:
- *
- *             - 48 IO with 256 functions
- *
- *             - Schmitt trigger
- *
- *             - Invert input and output
- *
- *             - Pull up and pull down
- *
- *             - Driving selector
- *
- *             - Static input and output
- *
- */
+* @file fpioa.h
+* @brief kendryte k210 source code
+*                https://github.com/kendryte/kendryte-standalone-sdk.git
+* @version 1.0
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
 
 #ifndef _DRIVER_FPIOA_H
 #define _DRIVER_FPIOA_H
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/gpio.c b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/gpio.c
index ed35e5a82..1dead478b 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/gpio.c
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/gpio.c
@@ -12,6 +12,16 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
+
+/**
+* @file gpio.c
+* @brief kendryte k210 source code
+*                https://github.com/kendryte/kendryte-standalone-sdk.git
+* @version 1.0
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #include <assert.h>
 #include "gpio.h"
 #include "utils.h"
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/gpio.h b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/gpio.h
index 9d96e175b..0a6b06366 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/gpio.h
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/gpio.h
@@ -12,6 +12,16 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
+
+/**
+* @file gpio.h
+* @brief kendryte k210 source code
+*                https://github.com/kendryte/kendryte-standalone-sdk.git
+* @version 1.0
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #ifndef _DRIVER_GPIO_H
 #define _DRIVER_GPIO_H
 
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/gpio_common.h b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/gpio_common.h
index 71fc0c0f9..c782b5c4d 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/gpio_common.h
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/gpio_common.h
@@ -12,6 +12,16 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
+
+/**
+* @file gpio_common.h
+* @brief kendryte k210 source code
+*                https://github.com/kendryte/kendryte-standalone-sdk.git
+* @version 1.0
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #ifndef _GPIO_COMMON_H
 #define _GPIO_COMMON_H
 
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/gpiohs.c b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/gpiohs.c
index 085c6cd26..d91be6db6 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/gpiohs.c
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/gpiohs.c
@@ -12,6 +12,16 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
+
+/**
+* @file gpiohs.c
+* @brief kendryte k210 source code
+*                https://github.com/kendryte/kendryte-standalone-sdk.git
+* @version 1.0
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #include <assert.h>
 #include "fpioa.h"
 #include "gpiohs.h"
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/gpiohs.h b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/gpiohs.h
index 90bca3194..d8a53515a 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/gpiohs.h
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/gpiohs.h
@@ -12,6 +12,16 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
+
+/**
+* @file gpiohs.h
+* @brief kendryte k210 source code
+*                https://github.com/kendryte/kendryte-standalone-sdk.git
+* @version 1.0
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #ifndef _DRIVER_GPIOHS_H
 #define _DRIVER_GPIOHS_H
 
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/i2s.c b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/i2s.c
index d5fd7c0bb..755fef809 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/i2s.c
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/i2s.c
@@ -12,6 +12,16 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
+
+/**
+* @file i2s.c
+* @brief kendryte k210 source code
+*                https://github.com/kendryte/kendryte-standalone-sdk.git
+* @version 1.0
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #include <stdint.h>
 #include <stdio.h>
 #include <math.h>
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/i2s.h b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/i2s.h
index 7751b8b7c..e2d4d50bf 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/i2s.h
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/i2s.h
@@ -12,6 +12,16 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
+
+/**
+* @file i2s.h
+* @brief kendryte k210 source code
+*                https://github.com/kendryte/kendryte-standalone-sdk.git
+* @version 1.0
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #ifndef _DRIVER_I2S_H
 #define _DRIVER_I2S_H
 
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/interrupt.c b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/interrupt.c
index 1a1816443..095b86dd3 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/interrupt.c
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/interrupt.c
@@ -15,6 +15,15 @@
 
 /* Enable kernel-mode log API */
 
+/**
+* @file interrupt.c
+* @brief kendryte k210 source code
+*                https://github.com/kendryte/kendryte-standalone-sdk.git
+* @version 1.0
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #include <stdint.h>
 #include <stdlib.h>
 #include "interrupt.h"
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/interrupt.h b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/interrupt.h
index 160690e05..c1c5284d4 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/interrupt.h
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/interrupt.h
@@ -13,6 +13,15 @@
  * limitations under the License.
  */
 
+/**
+* @file interrupt.h
+* @brief kendryte k210 source code
+*                https://github.com/kendryte/kendryte-standalone-sdk.git
+* @version 1.0
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #ifndef _BSP_INTERRUPT_H
 #define _BSP_INTERRUPT_H
 
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/io.h b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/io.h
index 190263f36..e4ad88f57 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/io.h
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/io.h
@@ -12,6 +12,16 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
+
+/**
+* @file io.h
+* @brief kendryte k210 source code
+*                https://github.com/kendryte/kendryte-standalone-sdk.git
+* @version 1.0
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #ifndef _DRIVER_IO_H
 #define _DRIVER_IO_H
 
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_arch.c b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_arch.c
index a09f04164..be7a864a6 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_arch.c
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_arch.c
@@ -30,6 +30,15 @@
  *
  ************************************************************************************/
 
+/**
+* @file k210_arch.c
+* @brief kendryte k210 source code
+*                https://github.com/kendryte/kendryte-standalone-sdk.git
+* @version 1.0
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #include <string.h>
 #include <nuttx/arch.h>
 #include "k210.h"
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_start.c b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_start.c
index d6353db67..39431a4fd 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_start.c
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_start.c
@@ -22,6 +22,15 @@
  * Included Files
  ****************************************************************************/
 
+/**
+* @file k210_start.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #include <nuttx/config.h>
 
 #include <nuttx/init.h>
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/platform.h b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/platform.h
index 5cfb292ff..d35153d64 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/platform.h
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/platform.h
@@ -13,6 +13,15 @@
  * limitations under the License.
  */
 
+/**
+* @file platform.h
+* @brief kendryte k210 source code
+*                https://github.com/kendryte/kendryte-standalone-sdk.git
+* @version 1.0
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #ifndef _BSP_PLATFORM_H
 #define _BSP_PLATFORM_H
 
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/plic.c b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/plic.c
index 5fc12319a..8df30c737 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/plic.c
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/plic.c
@@ -12,6 +12,16 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
+
+/**
+* @file plic.c
+* @brief kendryte k210 source code
+*                https://github.com/kendryte/kendryte-standalone-sdk.git
+* @version 1.0
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #include <stddef.h>
 #include <stdint.h>
 #include "encoding.h"
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/plic.h b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/plic.h
index 9f9651c07..924b6812a 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/plic.h
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/plic.h
@@ -54,6 +54,15 @@
  *
  */
 
+/**
+* @file plic.h
+* @brief kendryte k210 source code
+*                https://github.com/kendryte/kendryte-standalone-sdk.git
+* @version 1.0
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #ifndef _DRIVER_PLIC_H
 #define _DRIVER_PLIC_H
 
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/syscalls.c b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/syscalls.c
index 1fb2c4376..a42d3a495 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/syscalls.c
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/syscalls.c
@@ -13,6 +13,15 @@
  * limitations under the License.
  */
 
+/**
+* @file syscall.c
+* @brief kendryte k210 source code
+*                https://github.com/kendryte/kendryte-standalone-sdk.git
+* @version 1.0
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /* Enable kernel-mode log API */
 #include <nuttx/config.h>
 
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/syscalls.h b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/syscalls.h
index 2ab3d4500..15f2f2c71 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/syscalls.h
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/syscalls.h
@@ -13,6 +13,15 @@
  * limitations under the License.
  */
 
+/**
+* @file syscall.h
+* @brief kendryte k210 source code
+*                https://github.com/kendryte/kendryte-standalone-sdk.git
+* @version 1.0
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #ifndef _BSP_SYSCALLS_H
 #define _BSP_SYSCALLS_H
 
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/sysctl.c b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/sysctl.c
index 71a742d18..858d1164f 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/sysctl.c
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/sysctl.c
@@ -12,6 +12,16 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
+
+/**
+* @file sysctl.c
+* @brief kendryte k210 source code
+*                https://github.com/kendryte/kendryte-standalone-sdk.git
+* @version 1.0
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 //#include <stdint.h>
 #include <stdlib.h>
 //#include <math.h>
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/sysctl.h b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/sysctl.h
index 4a06a39a3..610de1c71 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/sysctl.h
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/sysctl.h
@@ -12,6 +12,16 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
+
+/**
+* @file sysctl.h
+* @brief kendryte k210 source code
+*                https://github.com/kendryte/kendryte-standalone-sdk.git
+* @version 1.0
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #ifndef _DRIVER_SYSCTL_H
 #define _DRIVER_SYSCTL_H
 
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/uarths.c b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/uarths.c
index 1023cbfc7..532678979 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/uarths.c
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/uarths.c
@@ -13,6 +13,15 @@
  * limitations under the License.
  */
 
+/**
+* @file uarths.c
+* @brief kendryte k210 source code
+*                https://github.com/kendryte/kendryte-standalone-sdk.git
+* @version 1.0
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #include <stdint.h>
 #include <stdio.h>
 #include "uarths.h"
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/uarths.h b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/uarths.h
index 79996207f..3fecaa187 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/uarths.h
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/uarths.h
@@ -45,6 +45,15 @@
  *
  */
 
+/**
+* @file uarths.h
+* @brief kendryte k210 source code
+*                https://github.com/kendryte/kendryte-standalone-sdk.git
+* @version 1.0
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #ifndef _DRIVER_UARTHS_H
 #define _DRIVER_UARTHS_H
 
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/utils.c b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/utils.c
index d21a3b373..746c22496 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/utils.c
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/utils.c
@@ -12,6 +12,16 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
+
+/**
+* @file utils.c
+* @brief kendryte k210 source code
+*                https://github.com/kendryte/kendryte-standalone-sdk.git
+* @version 1.0
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #include <stddef.h>
 #include "encoding.h"
 #include "utils.h"
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/utils.h b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/utils.h
index 8c285a245..34df06b25 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/utils.h
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/arch/risc-v/src/k210/utils.h
@@ -12,6 +12,16 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
+
+/**
+* @file utils.h
+* @brief kendryte k210 source code
+*                https://github.com/kendryte/kendryte-standalone-sdk.git
+* @version 1.0
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 #ifndef _DRIVER_UTILS_H
 #define _DRIVER_UTILS_H
 #include "uarths.h"
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/boards/arm/stm32/stm32f4discovery/src/stm32_bringup.c b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/boards/arm/stm32/stm32f4discovery/src/stm32_bringup.c
index 861db2ef0..ca1126182 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/boards/arm/stm32/stm32f4discovery/src/stm32_bringup.c
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/boards/arm/stm32/stm32f4discovery/src/stm32_bringup.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file stm32_bringup.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/drivers/sensors/hs300x.c b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/drivers/sensors/hs300x.c
index d261e4e76..9c2228190 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/drivers/sensors/hs300x.c
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/drivers/sensors/hs300x.c
@@ -1,22 +1,22 @@
-/****************************************************************************
- * drivers/sensors/hs300x.c
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements.  See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership.  The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License.  You may obtain a copy of the License at
- *
- *   http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
+/*
+* Copyright (c) 2020 AIIT XUOS Lab
+* XiUOS is licensed under Mulan PSL v2.
+* You can use this software according to the terms and conditions of the Mulan PSL v2.
+* You may obtain a copy of Mulan PSL v2 at:
+*        http://license.coscl.org.cn/MulanPSL2
+* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+* See the Mulan PSL v2 for more details.
+*/
+
+/**
+ * @file hs300x.c
+ * @brief hs300x sensor driver
+ * @version 1.0
+ * @author AIIT XUOS Lab
+ * @date 2022.03.17
+ */
 
 /****************************************************************************
  * Included Files
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/drivers/wireless/lpwan/Kconfig b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/drivers/wireless/lpwan/Kconfig
new file mode 100644
index 000000000..842502894
--- /dev/null
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/drivers/wireless/lpwan/Kconfig
@@ -0,0 +1,88 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+if DRIVERS_LPWAN
+
+config LPWAN_SX127X
+	bool "SX127X Low Power Long Range transceiver support"
+	default n
+	select SPI
+	select SCHED_HPWORK
+	---help---
+		This options adds driver support for the Samtech SX127X chip.
+
+if LPWAN_SX127X
+
+config LPWAN_SX127X_RFFREQ_DEFAULT
+	int "SX127X default RF frequency"
+	default 433000000
+
+config LPWAN_SX127X_SPIFREQ
+	int "SX127X SPI frequency"
+	default 1000000
+	---help---
+		SX127X SPI frequency up to 10MHz
+
+config LPWAN_SX127X_TXPOWER_DEFAULT
+	int "SX127X default TX power"
+	default 20
+
+config LPWAN_SX127X_PREAMBLE_DEFAULT
+	int "SX127X default preamble length"
+	default 8
+
+config LPWAN_SX127X_MODULATION_DEFAULT
+	int "SX127X default modulation scheme"
+	default 3 if LPWAN_SX127X_LORA
+	default 1 if LPWAN_SX127X_FSKOOK
+	range 1 3
+	---help---
+		1 - FSK, 2 - OOK, 3 - LORA
+
+config LPWAN_SX127X_CRCON
+	int "SX127X CRC ON"
+	range 0 1
+	default 1
+
+config LPWAN_SX127X_RXSUPPORT
+	bool "SX127X RX support"
+	default y
+
+if LPWAN_SX127X_RXSUPPORT
+
+config LPWAN_SX127X_RXFIFO_LEN
+	int "SX127X RX FIFO length"
+	default 5
+
+config LPWAN_SX127X_RXFIFO_DATA_LEN
+	int "SX127X RX FIFO data length"
+	default 256
+
+endif #LPWAN_SX127X_RXSUPPORT
+
+config LPWAN_SX127X_TXSUPPORT
+	bool "SX127X TX support"
+	default y
+
+config LPWAN_SX127X_LORA
+	bool "SX127X LORA support"
+	default y
+
+if LPWAN_SX127X_LORA
+
+config LPWAN_SX127X_LORA_IMPHEADER
+	int "SX127X LORA implicit header ON"
+	range 0 1
+	default 0
+
+endif # LPWAN_SX127X_LORA
+
+config LPWAN_SX127X_FSKOOK
+	bool "SX127X FSK/OOK support"
+	default n
+
+endif # WL_SX127X
+
+endif # DRIVERS_LPWAN
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/drivers/wireless/lpwan/sx127x/sx127x.c b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/drivers/wireless/lpwan/sx127x/sx127x.c
new file mode 100644
index 000000000..cdab21327
--- /dev/null
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/drivers/wireless/lpwan/sx127x/sx127x.c
@@ -0,0 +1,4772 @@
+/****************************************************************************
+ * drivers/wireless/lpwan/sx127x/sx127x.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/**
+* @file sx127x.c
+* @brief nuttx source code
+*                 https://github.com/apache/incubator-nuttx-apps
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <assert.h>
+#include <inttypes.h>
+#include <stdlib.h>
+#include <string.h>
+#include <errno.h>
+#include <stdio.h>
+#include <unistd.h>
+#include <poll.h>
+#include <debug.h>
+#include <time.h>
+#include <fcntl.h>
+
+#include <nuttx/kmalloc.h>
+#include <nuttx/semaphore.h>
+#include <nuttx/signal.h>
+#include <nuttx/wqueue.h>
+
+#include <nuttx/wireless/lpwan/sx127x.h>
+#include "sx127x.h"
+
+/* TODO:
+ *   - OOK communication (RX+TX) doesn't work yet
+ *   - Channel Activity Detection (CAD) for LORA
+ *   - frequency hopping for LORA and FSK/OOK
+ *   - modulation shaping for FSK/OOK
+ *   - support for long payload for FSK/OOK (len > FIFO size)
+ *   - address filtering for FSK/OOK
+ */
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#if !defined(CONFIG_SCHED_HPWORK)
+#  error SX127X requires CONFIG_SCHED_HPWORK
+#endif
+
+/* Configuration ************************************************************/
+
+/* Device name */
+#ifdef CONFIG_ADAPTER_SX1278_DRIVER
+#  define SX127X_DEV_NAME    CONFIG_ADAPTER_SX1278_DRIVER
+#else
+#  define SX127X_DEV_NAME    "/dev/sx127x"
+#endif
+
+/* Payload fixlen default */
+
+#define SX127X_RX_FIXLEN_DEFAULT      (0xff)
+
+/* Calibration frequency */
+
+#define SX127X_FREQ_CALIBRATION       (CONFIG_LPWAN_SX127X_RFFREQ_DEFAULT)
+
+/* FSK default frequency deviation is 5kHz */
+
+#define SX127X_FDEV_DEFAULT           (5000)
+
+/* FSK/OOK bitrate default */
+
+#define SX127X_FOM_BITRATE_DEFAULT    (4800)
+
+/* FSK/OOK bandwidth default */
+
+#define SX127X_FSKOOK_RXBW_DEFAULT    FSKOOK_BANDWIDTH_15P6KHZ
+#define SX127X_FSKOOK_AFCBW_DEFAULT   FSKOOK_BANDWIDTH_20P8KHZ
+
+/* Default LORA bandwidth */
+
+#define SX127X_LRM_BW_DEFAULT         LORA_BANDWIDTH_7P8KHZ
+
+/* Default SF for LORA */
+
+#define SX127X_LRM_SF_DEFAULT         (7)
+
+/* FSK/OOK RX/TX FIFO size (two separate FIFOs) */
+
+#define SX127X_FOM_FIFO_LEN           (64)
+
+/* LORA RX/TX FIFO size (one FIFO) */
+
+#define SX127X_LRM_FIFO_LEN           (256)
+
+/* LORA maximum payload length */
+
+#define SX127X_LRM_PAYLOADMAX_DEFAULT (0xff)
+
+/* FSK/OOK default shaping configuration */
+
+#define SX127X_FSKOOK_SHAPING_DEFAULT SX127X_CMN_PARAMP_SHAPING_NONE
+
+/* FSK/OOK default PARAMP configuration */
+
+#define SX127X_FSKOOK_PARAMP_DEFAULT  SX127X_CMN_PARAMP_PARAMP_40us
+
+/* Default code rate for LORA */
+
+#define SX127X_LRM_CR_DEFAULT         LORA_CR_4d5
+
+/* Default IDLE mode */
+
+#define SX127X_IDLE_OPMODE            SX127X_OPMODE_STANDBY
+
+/* Total size for local RX FIFO */
+
+#define SX127X_RXFIFO_TOTAL_SIZE      (SX127X_RXFIFO_ITEM_SIZE*CONFIG_LPWAN_SX127X_RXFIFO_LEN)
+
+/* Some assertions */
+
+#ifdef CONFIG_LPWAN_SX127X_FSKOOK
+#  warning OOK support is not complete, RX+TX does not work yet!
+#  if CONFIG_LPWAN_SX127X_RXFIFO_DATA_LEN > SX127X_FOM_FIFO_LEN
+#    warning RX data length limited by chip RX FIFO size (FSK/OOK = 64, LORA = 256)
+#  endif
+#endif
+
+/****************************************************************************
+ * Private Data Types
+ ****************************************************************************/
+
+/* SPI access mode */
+
+typedef enum
+{
+  MODE_READ,
+  MODE_WRITE
+} sx127x_access_mode_t;
+
+/* SX127X modulation specific ops */
+
+struct sx127x_dev_s;
+struct sx127x_priv_ops_s
+{
+  /* Initialize configuration for modulation */
+
+  CODE void (*init)(FAR struct sx127x_dev_s *dev);
+
+  /* Process IRQ 0 */
+
+  CODE int (*isr0_process)(FAR struct sx127x_dev_s *dev);
+
+  /* Operation mode initialization */
+
+  CODE int (*opmode_init)(FAR struct sx127x_dev_s *dev, uint8_t opmode);
+
+  /* Change operation mode */
+
+  CODE int (*opmode_set)(FAR struct sx127x_dev_s *dev, uint8_t opmode);
+
+  /* Set preamble length */
+
+  CODE void (*preamble_set)(FAR struct sx127x_dev_s *dev, uint32_t len);
+
+  /* Get preamble length */
+
+  CODE int (*preamble_get)(FAR struct sx127x_dev_s *dev);
+
+  /* Get current RSSI */
+
+  CODE int16_t (*rssi_get)(FAR struct sx127x_dev_s *dev);
+
+  /* Set sync word */
+
+  CODE int (*syncword_set)(FAR struct sx127x_dev_s *dev, FAR uint8_t *sw,
+                           uint8_t len);
+
+  /* Get sync word */
+
+  CODE void (*syncword_get)(FAR struct sx127x_dev_s *dev, FAR uint8_t *sw,
+                            FAR uint8_t *len);
+
+#ifdef CONFIG_LPWAN_SX127X_TXSUPPORT
+  /* Send packet */
+
+  CODE int (*send)(FAR struct sx127x_dev_s *dev, FAR const uint8_t *data,
+              size_t datalen);
+#endif
+#ifdef CONFIG_DEBUG_WIRELESS_INFO
+  /* Dump registers for given modulation */
+
+  CODE void (*dumpregs)(FAR struct sx127x_dev_s *dev);
+#endif
+};
+
+#ifdef CONFIG_LPWAN_SX127X_FSKOOK
+
+/* FSK/OOK private data */
+
+struct sx127x_fskook_s
+{
+  uint32_t bitrate;             /* Bitrate */
+  uint32_t fdev;                /* Frequency deviation */
+  uint8_t  rx_bw;               /* RX bandwidth */
+  uint8_t  afc_bw;              /* AFC bandwidth */
+  uint8_t  addr_node;           /* Node address used in address filtering */
+  uint8_t  addr_brdcast;        /* Broadcast address used int address filtering */
+  bool     fixlen;              /* Fix length */
+  bool     addr_fltr;           /* TODO: Address filtering */
+  bool     seqon;               /* Sequencer enabled */
+};
+#endif
+
+#ifdef CONFIG_LPWAN_SX127X_LORA
+/* LORA private data */
+
+struct sx127x_lora_s
+{
+  uint32_t freqhop;             /* Frequency hopping (not supported) */
+  uint8_t  bw;                  /* LORA banwidth */
+  uint8_t  sf;                  /* Spreading factor */
+  uint8_t  cr;                  /* Coding rate */
+  bool     implicthdr;          /* Implicit header mode ON */
+  bool     invert_iq;           /* Invert I and Q signals */
+};
+#endif
+
+/* SX127X private data */
+
+struct sx127x_dev_s
+{
+  /* Reference to SPI bus device */
+
+  FAR struct spi_dev_s *spi;
+
+  /* Low-level MCU-specific support */
+
+  FAR const struct sx127x_lower_s *lower;
+
+  /* Operations specific for selected modulation scheme */
+
+  struct sx127x_priv_ops_s ops;
+  struct work_s irq0_work;        /* Interrupt DIO0 handling "bottom half" */
+
+  uint32_t freq;                  /* RF carrier frequency */
+  uint8_t  modulation;            /* Current modulation (LORA/FSK/OOK) */
+  uint8_t  opmode;                /* Current operation mode */
+  uint8_t  idle;                  /* IDLE opmode */
+  bool     crcon;                 /* TX/RX CRC enable */
+  bool     rx_cont;               /* RX in continuous mode (not supported) */
+  bool     tx_cont;               /* TX in continuous mode (not supported) */
+
+#ifdef CONFIG_LPWAN_SX127X_FSKOOK
+  struct sx127x_fskook_s fskook;  /* FSK/OOK modulation specific data */
+#endif
+#ifdef CONFIG_LPWAN_SX127X_LORA
+  struct sx127x_lora_s   lora;    /* LORA modulation specific data */
+#endif
+
+#ifdef CONFIG_LPWAN_SX127X_TXSUPPORT
+  sem_t    tx_sem;                /* Wait for availability of send data */
+  uint32_t tx_timeout;            /* TX timeout (not supported) */
+  int8_t   power;                 /* TX power */
+  bool     pa_force;              /* Force PA BOOST pin select */
+#endif
+#ifdef CONFIG_LPWAN_SX127X_RXSUPPORT
+  uint32_t rx_timeout;            /* RX timeout (not supported) */
+  uint16_t rx_fifo_len;           /* Number of bytes stored in fifo */
+  uint16_t nxt_read;              /* Next read index */
+  uint16_t nxt_write;             /* Next write index */
+
+  /* Circular RX packet buffer */
+
+  uint8_t  rx_buffer[SX127X_RXFIFO_TOTAL_SIZE];
+  sem_t    rx_sem;                /* Wait for availability of received data */
+  sem_t    rx_buffer_sem;         /* Protect access to rx fifo */
+#endif
+
+  uint8_t nopens;                 /* Number of times the device has been opened */
+  sem_t   dev_sem;                /* Ensures exclusive access to this structure */
+  FAR struct pollfd *pfd;         /* Polled file descr  (or NULL if any) */
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/* Low-level SPI helpres */
+
+static void sx127x_lock(FAR struct spi_dev_s *spi);
+static void sx127x_unlock(FAR struct spi_dev_s *spi);
+static uint8_t sx127x_readregbyte(FAR struct sx127x_dev_s *dev, uint8_t reg);
+static void sx127x_writeregbyte(FAR struct sx127x_dev_s *dev, uint8_t reg,
+                                uint8_t value);
+static uint8_t sx127x_modregbyte(FAR struct sx127x_dev_s *dev, uint8_t reg,
+                                 uint8_t setbits, uint8_t clrbits);
+
+/* LORA specific functions */
+
+#ifdef CONFIG_LPWAN_SX127X_LORA
+static void sx127x_lora_init(FAR struct sx127x_dev_s *dev);
+static int16_t sx127x_lora_rssi_get(FAR struct sx127x_dev_s *dev);
+static int16_t sx127x_lora_rssi_correct(FAR struct sx127x_dev_s *dev,
+                                        uint32_t freq, int8_t snr,
+                                        uint8_t regval);
+static void sx127x_lora_preamble_set(FAR struct sx127x_dev_s *dev,
+                                     uint32_t len);
+static int sx127x_lora_preamble_get(FAR struct sx127x_dev_s *dev);
+static int sx127x_lora_opmode_set(FAR struct sx127x_dev_s *dev,
+                                  uint8_t opmode);
+static int sx127x_lora_opmode_init(FAR struct sx127x_dev_s *dev,
+                                   uint8_t opmode);
+static int sx127x_lora_syncword_set(FAR struct sx127x_dev_s *dev,
+                                    FAR uint8_t *sw, uint8_t len);
+static void sx127x_lora_syncword_get(FAR struct sx127x_dev_s *dev,
+                                     FAR uint8_t *sw, uint8_t *len);
+
+#  ifdef CONFIG_LPWAN_SX127X_RXSUPPORT
+static int8_t sx127x_lora_snr_get(FAR struct sx127x_dev_s *dev);
+static int16_t sx127x_lora_pckrssi_get(FAR struct sx127x_dev_s *dev,
+                                       int8_t snr);
+static size_t sx127x_lora_rxhandle(FAR struct sx127x_dev_s *dev);
+#  endif
+#  ifdef CONFIG_LPWAN_SX127X_TXSUPPORT
+static int sx127x_lora_send(FAR struct sx127x_dev_s *dev,
+                            FAR const uint8_t *data, size_t datalen);
+#  endif
+#  ifdef CONFIG_DEBUG_WIRELESS_INFO
+static void sx127x_lora_dumpregs(FAR struct sx127x_dev_s *dev);
+#  endif
+#endif
+
+/* FSK/OOK specific functions */
+
+#ifdef CONFIG_LPWAN_SX127X_FSKOOK
+static void sx127x_fskook_init(FAR struct sx127x_dev_s *dev);
+static int sx127x_fskook_fdev_set(FAR struct sx127x_dev_s *dev,
+                                  uint32_t freq);
+static int16_t sx127x_fskook_rssi_get(FAR struct sx127x_dev_s *dev);
+static int sx127x_fskook_bitrate_set(FAR struct sx127x_dev_s *dev,
+                                     uint32_t bitrate);
+static void sx127x_fskook_preamble_set(FAR struct sx127x_dev_s *dev,
+                                       uint32_t len);
+static int sx127x_fskook_preamble_get(FAR struct sx127x_dev_s *dev);
+static int sx127x_fskook_opmode_init(FAR struct sx127x_dev_s *dev,
+                                     uint8_t opmode);
+static int sx127x_fskook_syncword_set(FAR struct sx127x_dev_s *dev,
+                                      FAR uint8_t *sw, uint8_t len);
+static void sx127x_fskook_syncword_get(FAR struct sx127x_dev_s *dev,
+                                       FAR uint8_t *sw, FAR uint8_t *len);
+#  ifdef CONFIG_LPWAN_SX127X_RXSUPPORT
+static size_t sx127x_fskook_rxhandle(FAR struct sx127x_dev_s *dev);
+#  endif
+#  ifdef CONFIG_LPWAN_SX127X_TXSUPPORT
+static int sx127x_fskook_send(FAR struct sx127x_dev_s *dev,
+                              FAR const uint8_t *data, size_t datalen);
+#  endif
+#  ifdef CONFIG_DEBUG_WIRELESS_INFO
+static void sx127x_fskook_dumpregs(FAR struct sx127x_dev_s *dev);
+#  endif
+#endif
+
+/* Common for FSK/OOK and LORA */
+
+static int sx127x_fskook_opmode_set(FAR struct sx127x_dev_s *dev,
+                                    uint8_t opmode);
+static int sx127x_init(FAR struct sx127x_dev_s *dev);
+static int sx127x_deinit(FAR struct sx127x_dev_s *dev);
+static int sx127x_unregister(FAR struct sx127x_dev_s *dev);
+static inline int sx127x_attachirq0(FAR struct sx127x_dev_s *dev, xcpt_t isr,
+                                    FAR void *arg);
+static int sx127x_irq0handler(int irq, FAR void *context, FAR void *arg);
+
+static int sx127x_modulation_set(FAR struct sx127x_dev_s *dev,
+                                 uint8_t modulation);
+static uint8_t sx127x_modulation_get(FAR struct sx127x_dev_s *dev);
+static int16_t sx127x_rssi_get(FAR struct sx127x_dev_s *dev);
+static int sx127x_frequency_set(FAR struct sx127x_dev_s *dev, uint32_t freq);
+static uint32_t sx127x_frequency_get(FAR struct sx127x_dev_s *dev);
+static int sx127x_power_set(FAR struct sx127x_dev_s *dev, int8_t power);
+static int8_t sx127x_power_get(FAR struct sx127x_dev_s *dev);
+static void sx127x_preamble_set(FAR struct sx127x_dev_s *dev, uint32_t len);
+static int sx127x_preamble_get(FAR struct sx127x_dev_s *dev);
+static int sx127x_opmode_set(FAR struct sx127x_dev_s *dev, uint8_t opmode);
+static uint8_t sx127x_opmode_get(FAR struct sx127x_dev_s *dev);
+static int sx127x_opmode_init(FAR struct sx127x_dev_s *dev, uint8_t opmode);
+static int sx127x_syncword_set(FAR struct sx127x_dev_s *dev,
+                               FAR uint8_t *sw, uint8_t len);
+static void sx127x_syncword_get(FAR struct sx127x_dev_s *dev,
+                                FAR uint8_t *sw, FAR uint8_t *len);
+#ifdef CONFIG_DEBUG_WIRELESS_INFO
+static void sx127x_dumpregs(FAR struct sx127x_dev_s *dev);
+#else
+#  define sx127x_dumpregs(x)
+#endif
+
+static bool sx127x_channel_scan(FAR struct sx127x_dev_s *dev,
+                                FAR struct sx127x_chanscan_ioc_s *chanscan);
+static uint32_t sx127x_random_get(FAR struct sx127x_dev_s *dev);
+
+#ifdef CONFIG_LPWAN_SX127X_TXSUPPORT
+static int sx127x_txfifo_write(FAR struct sx127x_dev_s *dev,
+                               FAR const uint8_t *data, size_t datalen);
+#endif
+#ifdef CONFIG_LPWAN_SX127X_RXSUPPORT
+static ssize_t sx127x_rxfifo_get(struct sx127x_dev_s *dev,
+                                 FAR uint8_t *buffer, size_t buflen);
+static void sx127x_rxfifo_put(struct sx127x_dev_s *dev, FAR uint8_t *buffer,
+                              size_t buflen);
+#endif
+
+/* POSIX API */
+
+static int sx127x_open(FAR struct file *filep);
+static int sx127x_close(FAR struct file *filep);
+static ssize_t sx127x_read(FAR struct file *filep, FAR char *buffer,
+                           size_t buflen);
+static ssize_t sx127x_write(FAR struct file *filep, FAR const char *buffer,
+                            size_t buflen);
+static int sx127x_ioctl(FAR struct file *filep, int cmd, unsigned long arg);
+static int sx127x_poll(FAR struct file *filep, FAR struct pollfd *fds,
+                       bool setup);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* Only one device is supported for now */
+
+static struct sx127x_dev_s g_sx127x_devices[1];
+
+/* File ops */
+
+static const struct file_operations sx127x_fops =
+{
+  sx127x_open,    /* open */
+  sx127x_close,   /* close */
+  sx127x_read,    /* read */
+  sx127x_write,   /* write */
+  NULL,           /* seek */
+  sx127x_ioctl,   /* ioctl */
+  sx127x_poll     /* poll */
+#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
+  , NULL          /* unlink */
+#endif
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: sx127x_lock
+ *
+ * Description:
+ *   Acquire exclusive access to the shared SPI bus.
+ *
+ ****************************************************************************/
+
+static void sx127x_lock(FAR struct spi_dev_s *spi)
+{
+  SPI_LOCK(spi, 1);
+  SPI_SETBITS(spi, 8);
+  SPI_SETMODE(spi, SPIDEV_MODE0);
+  SPI_SETFREQUENCY(spi, CONFIG_LPWAN_SX127X_SPIFREQ);
+}
+
+/****************************************************************************
+ * Name: sx127x_unlock
+ *
+ * Description:
+ *   Release exclusive access to the shared SPI bus.
+ *
+ ****************************************************************************/
+
+static void sx127x_unlock(FAR struct spi_dev_s *spi)
+{
+  SPI_LOCK(spi, 0);
+}
+
+/****************************************************************************
+ * Name: sx127x_select
+ ****************************************************************************/
+
+static inline void sx127x_select(struct sx127x_dev_s * dev)
+{
+  SPI_SELECT(dev->spi, SPIDEV_LPWAN(0), true);
+}
+
+/****************************************************************************
+ * Name: sx127x_deselect
+ ****************************************************************************/
+
+static inline void sx127x_deselect(struct sx127x_dev_s * dev)
+{
+  SPI_SELECT(dev->spi, SPIDEV_LPWAN(0), false);
+}
+
+/****************************************************************************
+ * Name: sx127x_access
+ ****************************************************************************/
+
+static uint8_t sx127x_access(FAR struct sx127x_dev_s *dev,
+                             sx127x_access_mode_t mode, uint8_t cmd,
+                             FAR uint8_t *buf, int length)
+{
+  uint8_t status = 0;
+
+  /* Prepare SPI */
+
+  sx127x_select(dev);
+
+  /* Transfer */
+
+  status = SPI_SEND(dev->spi, cmd);
+
+  switch (mode)
+    {
+      case MODE_WRITE:
+        {
+          if (length > 0)
+            {
+              SPI_SNDBLOCK(dev->spi, buf, length);
+            }
+
+          break;
+        }
+
+      case MODE_READ:
+        {
+          SPI_RECVBLOCK(dev->spi, buf, length);
+          break;
+        }
+
+      default:
+        {
+          wlerr("ERROR: unknown SPI access mode %d!\n", mode);
+          break;
+        }
+    }
+
+  sx127x_deselect(dev);
+
+  return status;
+}
+
+/****************************************************************************
+ * Name: sx127x_readreg
+ *
+ * Description:
+ *   Read register from sx127x
+ *
+ ****************************************************************************/
+
+static inline uint8_t sx127x_readreg(FAR struct sx127x_dev_s *dev,
+                                     uint8_t reg, FAR uint8_t *value,
+                                     int len)
+{
+  return sx127x_access(dev, MODE_READ, reg | SX127X_R_REGISTER, value, len);
+}
+
+/****************************************************************************
+ * Name: sx127x_readregbyte
+ *
+ * Description:
+ *   Read single byte value from a register of sx127x
+ *
+ ****************************************************************************/
+
+static inline uint8_t sx127x_readregbyte(FAR struct sx127x_dev_s *dev,
+                                         uint8_t reg)
+{
+  uint8_t val = 0;
+
+  sx127x_readreg(dev, reg, &val, 1);
+
+  return val;
+}
+
+/****************************************************************************
+ * Name: sx127x_writereg
+ *
+ * Description:
+ *   Write value to a register of sx127x
+ *
+ ****************************************************************************/
+
+static inline int sx127x_writereg(FAR struct sx127x_dev_s *dev, uint8_t reg,
+                                  FAR const uint8_t *value, int len)
+{
+  return sx127x_access(dev, MODE_WRITE, reg | SX127X_W_REGISTER,
+                       (FAR uint8_t *)value, len);
+}
+
+/****************************************************************************
+ * Name: sx127x_writeregbyte
+ *
+ * Description:
+ *   Write single byte value to a register of sx127x
+ *
+ ****************************************************************************/
+
+static inline void sx127x_writeregbyte(FAR struct sx127x_dev_s *dev,
+                                       uint8_t reg, uint8_t value)
+{
+  sx127x_writereg(dev, reg, &value, 1);
+}
+
+/****************************************************************************
+ * Name: sx127x_modreg
+ *
+ * Description:
+ *  Modify register value of sx127x
+ *
+ ****************************************************************************/
+
+static uint8_t sx127x_modregbyte(FAR struct sx127x_dev_s *dev, uint8_t reg,
+                                 uint8_t setbits, uint8_t clrbits)
+{
+  uint8_t val = 0;
+
+  sx127x_readreg(dev, reg, &val, 1);
+
+  val &= ~clrbits;
+  val |= setbits;
+
+  sx127x_writereg(dev, reg, &val, 1);
+  return val;
+}
+
+/****************************************************************************
+ * Name: sx127x_attachirq0
+ ****************************************************************************/
+
+static inline int sx127x_attachirq0(FAR struct sx127x_dev_s *dev, xcpt_t isr,
+                                    FAR void *arg)
+{
+  return dev->lower->irq0attach(isr, arg);
+}
+
+/****************************************************************************
+ * Name: sx127x_attachirq1
+ ****************************************************************************/
+
+#ifdef CONFIG_LPWAN_SX127X_DIO1
+static inline int sx127x_attachirq1(FAR struct sx127x_dev_s *dev, xcpt_t isr,
+                                    FAR void *arg)
+{
+  return dev->lower->irq1attach(isr, arg);
+}
+#endif
+
+/****************************************************************************
+ * Name: sx127x_attachirq2
+ ****************************************************************************/
+
+#ifdef CONFIG_LPWAN_SX127X_DIO2
+static inline int sx127x_attachirq2(FAR struct sx127x_dev_s *dev, xcpt_t isr,
+                                    FAR void *arg)
+{
+  return dev->lower->irq2attach(isr, arg);
+}
+#endif
+
+/****************************************************************************
+ * Name: sx127x_attachirq3
+ ****************************************************************************/
+
+#ifdef CONFIG_LPWAN_SX127X_DIO3
+static inline int sx127x_attachirq3(FAR struct sx127x_dev_s *dev, xcpt_t isr,
+                                    FAR void *arg)
+{
+  return dev->lower->irq3attach(isr, arg);
+}
+#endif
+
+/****************************************************************************
+ * Name: sx127x_attachirq4
+ ****************************************************************************/
+
+#ifdef CONFIG_LPWAN_SX127X_DIO4
+static inline int sx127x_attachirq4(FAR struct sx127x_dev_s *dev, xcpt_t isr,
+                                    FAR void *arg)
+{
+  return dev->lower->irq4attach(isr, arg);
+}
+#endif
+
+/****************************************************************************
+ * Name: sx127x_attachirq5
+ ****************************************************************************/
+
+#ifdef CONFIG_LPWAN_SX127X_DIO5
+static inline int sx127x_attachirq5(FAR struct sx127x_dev_s *dev, xcpt_t isr,
+                                    FAR void *arg)
+{
+  return dev->lower->irq5attach(isr, arg);
+}
+#endif
+
+/****************************************************************************
+ * Name: sx127x_reset
+ *
+ * Description:
+ *   Reset radio
+ *
+ ****************************************************************************/
+
+static void sx127x_reset(FAR struct sx127x_dev_s *dev)
+{
+  dev->lower->reset();
+}
+
+/****************************************************************************
+ * Name: sx127x_open
+ *
+ * Description:
+ *   This function is called whenever the SX127X device is opened.
+ *
+ ****************************************************************************/
+
+static int sx127x_open(FAR struct file *filep)
+{
+  FAR struct sx127x_dev_s *dev   = NULL;
+  FAR struct inode        *inode = NULL;
+  int ret = 0;
+
+  wlinfo("Opening sx127x dev\n");
+
+  DEBUGASSERT(filep);
+  inode = filep->f_inode;
+
+  DEBUGASSERT(inode && inode->i_private);
+  dev = (FAR struct sx127x_dev_s *)inode->i_private;
+
+  /* Get exclusive access to the driver data structure */
+
+  ret = nxsem_wait(&dev->dev_sem);
+  if (ret < 0)
+    {
+      return ret;
+    }
+
+  /* Check if device is not already used */
+
+  if (dev->nopens > 0)
+    {
+      ret = -EBUSY;
+      goto errout;
+    }
+
+  /* Initialize device */
+
+  ret = sx127x_init(dev);
+  if (ret < 0)
+    {
+      wlerr("ERROR: failed to initialize sx127x\n");
+      goto errout;
+    }
+
+  /* Set modulation */
+
+  wlinfo("Set modulation mode to %d\n", CONFIG_LPWAN_SX127X_MODULATION_DEFAULT);
+  ret = sx127x_modulation_set(dev, CONFIG_LPWAN_SX127X_MODULATION_DEFAULT); 
+  if (ret < 0)
+  {
+    wlerr("modulation_set failed\n");
+    goto errout;
+  } 
+
+  /* Set RF frequency */
+
+  wlinfo("Set frequency to %" PRId32 "\n", CONFIG_LPWAN_SX127X_RFFREQ_DEFAULT);
+  ret = sx127x_frequency_set(dev, CONFIG_LPWAN_SX127X_RFFREQ_DEFAULT);
+  if (ret < 0)
+  {
+    wlerr("failed to change frequency %d!\n", ret);
+    goto errout;
+  }
+
+  /* Set TX power */
+
+  wlinfo("Set power to %d\n", CONFIG_LPWAN_SX127X_TXPOWER_DEFAULT);
+  ret = sx127x_power_set(dev, CONFIG_LPWAN_SX127X_TXPOWER_DEFAULT);
+  if (ret < 0)
+  {
+    wlerr("failed to change power %d!\n", ret);
+    goto errout;
+  }
+
+  dev->nopens++;
+
+errout:
+  nxsem_post(&dev->dev_sem);
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: sx127x_close
+ *
+ * Description:
+ *   This routine is called when the SX127X device is closed.
+ *   It waits for the last remaining data to be sent.
+ *
+ ****************************************************************************/
+
+static int sx127x_close(FAR struct file *filep)
+{
+  FAR struct sx127x_dev_s *dev   = NULL;
+  FAR struct inode        *inode = NULL;
+  int ret = 0;
+
+  wlinfo("Closing sx127x dev\n");
+  DEBUGASSERT(filep);
+  inode = filep->f_inode;
+
+  DEBUGASSERT(inode && inode->i_private);
+  dev = (FAR struct sx127x_dev_s *)inode->i_private;
+
+  /* Get exclusive access to the driver data structure */
+
+  ret = nxsem_wait(&dev->dev_sem);
+  if (ret < 0)
+    {
+      return ret;
+    }
+
+  ret = sx127x_deinit(dev);
+  if (ret < 0)
+    {
+      wlerr("ERROR: failed to deinit sx127x\n");
+    }
+
+  dev->nopens--;
+
+  nxsem_post(&dev->dev_sem);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: sx127x_read
+ *
+ * Description:
+ *   Standard driver read method
+ *
+ ****************************************************************************/
+
+static ssize_t sx127x_read(FAR struct file *filep, FAR char *buffer,
+                           size_t buflen)
+{
+#ifndef CONFIG_LPWAN_SX127X_RXSUPPORT
+  return -ENOSYS;
+#else
+  FAR struct sx127x_dev_s *dev   = NULL;
+  FAR struct inode        *inode = NULL;
+  int ret = 0;
+
+  DEBUGASSERT(filep);
+  inode = filep->f_inode;
+
+  DEBUGASSERT(inode && inode->i_private);
+  dev = (FAR struct sx127x_dev_s *)inode->i_private;
+
+  /* Set mode to RX */
+
+  wlinfo("Set opmode to %" PRId32 "\n", SX127X_OPMODE_RX);
+  sx127x_opmode_set(dev, SX127X_OPMODE_RX);
+
+  sx127x_writeregbyte(dev, SX127X_LRM_IRQ, 8);
+
+  ret = nxsem_wait(&dev->dev_sem);
+  if (ret < 0)
+    {
+      return ret;
+    }
+
+  if ((filep->f_oflags & O_NONBLOCK) != 0)
+    {
+      nxsem_trywait(&dev->rx_sem);
+      ret = 0;
+    }
+  else
+    {
+      ret = nxsem_wait(&dev->rx_sem);
+    }
+
+  if (ret < 0)
+    {
+      return ret;
+    }
+
+  /* Get RX data from fifo */
+  
+  wlinfo("buflen=%d \n", buflen);
+  ret = sx127x_rxfifo_get(dev, (uint8_t *)buffer, buflen);
+
+  sx127x_writeregbyte(dev, SX127X_LRM_IRQ, 8);
+
+  nxsem_post(&dev->dev_sem);
+
+  return ret;
+#endif
+}
+
+/****************************************************************************
+ * Name: sx127x_write
+ *
+ * Description:
+ *   Standard driver write method.
+ *
+ ****************************************************************************/
+
+static ssize_t sx127x_write(FAR struct file *filep, FAR const char *buffer,
+                            size_t buflen)
+{
+#ifndef CONFIG_LPWAN_SX127X_TXSUPPORT
+  return -ENOSYS;
+#else
+  FAR struct sx127x_dev_s *dev   = NULL;
+  FAR struct inode        *inode = NULL;
+  int ret = 0;
+
+  DEBUGASSERT(filep);
+  inode = filep->f_inode;
+
+  DEBUGASSERT(inode && inode->i_private);
+  dev = (FAR struct sx127x_dev_s *)inode->i_private;
+
+  ret = nxsem_wait(&dev->dev_sem);
+  if (ret < 0)
+    {
+      return ret;
+    }
+
+  wlinfo("buflen=%d \n", buflen);
+
+  /* Change mode to STANDBY */
+
+  sx127x_opmode_set(dev, SX127X_OPMODE_STANDBY);
+
+  sx127x_writeregbyte(dev, SX127X_LRM_IRQ, 8);
+
+  /* Initialize TX mode */
+
+  ret = sx127x_opmode_init(dev, SX127X_OPMODE_TX);
+  if (ret < 0)
+    {
+      /* Restore IDLE mode settings */
+
+      sx127x_opmode_init(dev, dev->idle);
+
+      wlerr("Failed to initialize TX mode!\n");
+
+      ret = -EINVAL;
+      goto errout;
+    }
+
+  /* Call modulation specific send */
+
+  ret = dev->ops.send(dev, (uint8_t *)buffer, buflen);
+
+  /* Change mode to TX to start data transfer */
+
+  sx127x_opmode_set(dev, SX127X_OPMODE_TX);
+
+  /* Wait for TXDONE */
+
+  nxsem_wait(&dev->tx_sem);
+
+  sx127x_writeregbyte(dev, SX127X_LRM_IRQ, 8);
+
+errout:
+  /* Change mode to IDLE after transfer
+   * NOTE: if sequencer for FSK/OOK is ON - this should be done automatically
+   */
+
+  sx127x_opmode_set(dev, dev->idle);
+  sx127x_writeregbyte(dev, SX127X_LRM_IRQ, 8);
+
+  nxsem_post(&dev->dev_sem);
+
+  return ret;
+#endif
+}
+
+/****************************************************************************
+ * Name: sx127x_ioctl
+ *
+ * Description:
+ *   Standard driver ioctl method.
+ *
+ ****************************************************************************/
+
+static int sx127x_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
+{
+  FAR struct sx127x_dev_s *dev = NULL;
+  FAR struct inode *inode      = NULL;
+  int ret                      = 0;
+
+  wlinfo("cmd: %d arg: %ld\n", cmd, arg);
+  DEBUGASSERT(filep);
+  inode = filep->f_inode;
+
+  DEBUGASSERT(inode && inode->i_private);
+  dev = (FAR struct sx127x_dev_s *)inode->i_private;
+
+  /* Get exclusive access to the driver data structure */
+
+  ret = nxsem_wait(&dev->dev_sem);
+  if (ret < 0)
+    {
+      return ret;
+    }
+
+  /* Process the IOCTL by command */
+
+  switch (cmd)
+    {
+      /* Set radio frequency. Arg: Pointer to uint32_t frequency value in
+       * Hz.
+       */
+
+      case WLIOC_SETRADIOFREQ:
+        {
+          FAR uint32_t *ptr = (FAR uint32_t *)((uintptr_t)arg);
+          DEBUGASSERT(ptr != NULL);
+
+          sx127x_frequency_set(dev, *ptr);
+          break;
+        }
+
+      /* Get current radio frequency. arg: Pointer to uint32_t frequency
+       * value in Hz.
+       */
+
+      case WLIOC_GETRADIOFREQ:
+        {
+          FAR int8_t *ptr = (FAR int8_t *)((uintptr_t)arg);
+          DEBUGASSERT(ptr != NULL);
+
+          *ptr = sx127x_frequency_get(dev);
+          break;
+        }
+
+      /* Set TX power. arg: Pointer to int8_t power value */
+
+      case WLIOC_SETTXPOWER:
+        {
+          FAR int8_t *ptr = (FAR int8_t *)((uintptr_t)arg);
+          DEBUGASSERT(ptr != NULL);
+
+          sx127x_power_set(dev, *ptr);
+          break;
+        }
+
+      /* Get current TX power. arg: Pointer to int8_t power value */
+
+      case WLIOC_GETTXPOWER:
+        {
+          FAR int8_t *ptr = (FAR int8_t *)((uintptr_t)arg);
+          DEBUGASSERT(ptr != NULL);
+
+          *ptr = sx127x_power_get(dev);
+          break;
+        }
+
+      /* Get RSSI */
+
+      case SX127XIOC_RSSIGET:
+        {
+          FAR int16_t *ptr = (FAR int16_t *)((uintptr_t)arg);
+          DEBUGASSERT(ptr != NULL);
+
+          *ptr = sx127x_rssi_get(dev);
+          break;
+        }
+
+      /* Set modulation */
+
+      case SX127XIOC_MODULATIONSET:
+        {
+          FAR uint8_t *ptr = (FAR uint8_t *)((uintptr_t)arg);
+          DEBUGASSERT(ptr != NULL);
+
+          ret = sx127x_modulation_set(dev, *ptr);
+          break;
+        }
+
+      /* Get modulation */
+
+      case SX127XIOC_MODULATIONGET:
+        {
+          FAR uint8_t *ptr = (FAR uint8_t *)((uintptr_t)arg);
+          DEBUGASSERT(ptr != NULL);
+
+          *ptr = sx127x_modulation_get(dev);
+          break;
+        }
+
+      /* Operation mode set */
+
+      case SX127XIOC_OPMODESET:
+        {
+          FAR uint8_t *ptr = (FAR uint8_t *)((uintptr_t)arg);
+          DEBUGASSERT(ptr != NULL);
+
+          ret = sx127x_opmode_set(dev, *ptr);
+          break;
+        }
+
+      /* Operation mode get */
+
+      case SX127XIOC_OPMODEGET:
+        {
+          FAR uint8_t *ptr = (FAR uint8_t *)((uintptr_t)arg);
+          DEBUGASSERT(ptr != NULL);
+
+          *ptr = sx127x_opmode_get(dev);
+          break;
+        }
+
+      /* Channel scan */
+
+      case SX127XIOC_CHANSCAN:
+        {
+          FAR struct sx127x_chanscan_ioc_s *ptr
+              = (FAR struct sx127x_chanscan_ioc_s *)((uintptr_t)arg);
+          DEBUGASSERT(ptr != NULL);
+
+          sx127x_channel_scan(dev, ptr);
+          break;
+        }
+
+      /* Preamble length set */
+
+      case SX127XIOC_PREAMBLESET:
+        {
+          FAR int *ptr = (FAR int *)((uintptr_t)arg);
+          DEBUGASSERT(ptr != NULL);
+
+          sx127x_preamble_set(dev, *ptr);
+          break;
+        }
+
+      /* Preamble length get */
+
+      case SX127XIOC_PREAMBLEGET:
+        {
+          FAR int *ptr = (FAR int *)((uintptr_t)arg);
+          DEBUGASSERT(ptr != NULL);
+
+          *ptr = sx127x_preamble_get(dev);
+          break;
+        }
+
+      /* SyncWord set */
+
+      case SX127XIOC_SYNCWORDSET:
+        {
+          ASSERT(0);
+          sx127x_syncword_set(dev, NULL, 0);
+          break;
+        }
+
+      /* SyncWord get */
+
+      case SX127XIOC_SYNCWORDGET:
+        {
+          ASSERT(0);
+          sx127x_syncword_get(dev, NULL, 0);
+          break;
+        }
+
+      /* Get random number based on RSSI */
+
+      case SX127XIOC_RANDOMGET:
+        {
+          FAR uint32_t *ptr = (FAR uint32_t *)((uintptr_t)arg);
+          DEBUGASSERT(ptr != NULL);
+
+          *ptr = sx127x_random_get(dev);
+          break;
+        }
+
+      default:
+        {
+          ret = -ENOTTY;
+          break;
+        }
+    }
+
+  nxsem_post(&dev->dev_sem);
+  return ret;
+}
+
+/****************************************************************************
+ * Name: sx127x_poll
+ *
+ * Description:
+ *   Standard driver poll method.
+ *
+ ****************************************************************************/
+
+static int sx127x_poll(FAR struct file *filep, FAR struct pollfd *fds,
+                       bool setup)
+{
+#ifndef CONFIG_LPWAN_SX127X_RXSUPPORT
+  return -ENOSYS;
+#else
+
+  FAR struct sx127x_dev_s *dev   = NULL;
+  FAR struct inode        *inode = NULL;
+  int ret = 0;
+
+  wlinfo("setup: %d\n", (int)setup);
+  DEBUGASSERT(filep && fds);
+  inode = filep->f_inode;
+
+  DEBUGASSERT(inode && inode->i_private);
+  dev  = (FAR struct sx127x_dev_s *)inode->i_private;
+
+  /* Exclusive access */
+
+  ret = nxsem_wait(&dev->dev_sem);
+  if (ret < 0)
+    {
+      return ret;
+    }
+
+  /* Are we setting up the poll?  Or tearing it down? */
+
+  if (setup)
+    {
+      /* Ignore waits that do not include POLLIN */
+
+      if ((fds->events & POLLIN) == 0)
+        {
+          ret = -EDEADLK;
+          goto errout;
+        }
+
+      /* Check if we can accept this poll.
+       * For now, only one thread can poll the device at any time
+       * (shorter / simpler code)
+       */
+
+      if (dev->pfd)
+        {
+          ret = -EBUSY;
+          goto errout;
+        }
+
+      dev->pfd = fds;
+
+      /* Is there is already data in the fifo? then trigger POLLIN now -
+       * don't wait for RX.
+       */
+
+      nxsem_wait(&dev->rx_buffer_sem);
+      if (dev->rx_fifo_len > 0)
+        {
+          /* Data available for input */
+
+          dev->pfd->revents |= POLLIN;
+          nxsem_post(dev->pfd->sem);
+        }
+
+      nxsem_post(&dev->rx_buffer_sem);
+    }
+  else /* Tear it down */
+    {
+      dev->pfd = NULL;
+    }
+
+errout:
+  nxsem_post(&dev->dev_sem);
+  return ret;
+#endif
+}
+
+/****************************************************************************
+ * Name: sx127x_lora_isr0_process
+ *
+ * Description:
+ *   Handle DIO0 interrupt for LORA radio
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_LPWAN_SX127X_LORA
+static int sx127x_lora_isr0_process(FAR struct sx127x_dev_s *dev)
+{
+  DEBUGASSERT(dev->modulation == SX127X_MODULATION_LORA);
+
+#ifdef CONFIG_LPWAN_SX127X_RXSUPPORT
+  bool    data_valid = true;
+#endif
+  uint8_t irq        = 0;
+  int     ret        = OK;
+
+  /* Get IRQ */
+
+  sx127x_lock(dev->spi);
+  irq = sx127x_readregbyte(dev, SX127X_LRM_IRQ);
+  sx127x_unlock(dev->spi);
+
+  wlinfo("ISR0: IRQ = 0x%02x\n", irq);
+
+  switch (dev->opmode)
+    {
+#ifdef CONFIG_LPWAN_SX127X_TXSUPPORT
+      /* TX DONE */
+
+      case SX127X_OPMODE_TX:
+        {
+          /* Release TX sem */
+
+          nxsem_post(&dev->tx_sem);
+
+          /* Clear TX interrupt */
+
+          irq = SX127X_LRM_IRQ_TXDONE;
+          break;
+        }
+#endif /* CONFIG_LPWAN_SX127X_TXSUPPORT */
+
+#ifdef CONFIG_LPWAN_SX127X_RXSUPPORT
+      /* RX DONE */
+
+      case SX127X_OPMODE_RX:
+      case SX127X_OPMODE_RXSINGLE:
+        {
+          /* REVISIT: Always check PAYLOADCRCERR even CRCONPAYLOAD not set */
+
+          if ((irq & SX127X_LRM_IRQ_PAYLOADCRCERR) != 0)
+            {
+              data_valid = false;
+            }
+
+          if (data_valid)
+            {
+              ret = sx127x_lora_rxhandle(dev);
+              if (ret > 0)
+                {
+                  if (dev->pfd)
+                    {
+                      /* Data available for input */
+
+                      dev->pfd->revents |= POLLIN;
+
+                      wlinfo("Wake up polled fd\n");
+                      nxsem_post(dev->pfd->sem);
+                    }
+
+                  /* Wake-up any thread waiting in recv */
+
+                  nxsem_post(&dev->rx_sem);
+                }
+            }
+          else
+            {
+              /* RX Data invalid */
+
+              wlinfo("Invalid LORA RX data!\n");
+            }
+
+          /* After receiving the data in RXSINGLE mode the chip goes into
+           * STANBY mode
+           */
+
+          if (dev->opmode == SX127X_OPMODE_RXSINGLE)
+            {
+              dev->opmode = SX127X_OPMODE_STANDBY;
+            }
+
+          /* Clear RX interrupts  */
+
+          irq = (SX127X_LRM_IRQ_RXDONE | SX127X_LRM_IRQ_PAYLOADCRCERR |
+                 SX127X_LRM_IRQ_VALIDHDR);
+          break;
+        }
+#endif /* CONFIG_LPWAN_SX127X_RXSUPPORT */
+
+      /* Only LORA - CAD DONE */
+
+      case SX127X_OPMODE_CAD:
+        {
+          /* TODO */
+
+          wlerr("TODO: ISR0 in CAD mode not implemented yet!\n");
+
+          /* Clear CAD interrupt */
+
+          irq = SX127X_LRM_IRQ_CADDONE;
+          break;
+        }
+
+      default:
+        {
+          wlwarn("WARNING: Interrupt not processed, opmode=%d\n",
+                 dev->opmode);
+          ret = -EINVAL;
+          break;
+        }
+    }
+
+  /* Clear interrupts */
+
+  sx127x_lock(dev->spi);
+  sx127x_writeregbyte(dev, SX127X_LRM_IRQ, irq);
+  sx127x_unlock(dev->spi);
+
+  return ret;
+}
+#endif /* CONFIG_LPWAN_SX127X_LORA */
+
+/****************************************************************************
+ * Name: sx127x_fskook_isr0_process
+ *
+ * Description:
+ *   Handle DIO0 interrupt for FSK/OOK radio
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_LPWAN_SX127X_FSKOOK
+static int sx127x_fskook_isr0_process(FAR struct sx127x_dev_s *dev)
+{
+  DEBUGASSERT(dev->modulation == SX127X_MODULATION_FSK ||
+              dev->modulation == SX127X_MODULATION_OOK);
+
+#ifdef CONFIG_LPWAN_SX127X_RXSUPPORT
+  bool    data_valid = true;
+#endif
+  uint8_t irq1       = 0;
+  uint8_t irq2       = 0;
+  int     ret        = OK;
+
+  /* Get IRQ1 and IRQ2 */
+
+  sx127x_lock(dev->spi);
+  irq1 = sx127x_readregbyte(dev, SX127X_FOM_IRQ1);
+  irq2 = sx127x_readregbyte(dev, SX127X_FOM_IRQ2);
+  sx127x_unlock(dev->spi);
+
+  wlinfo("ISR0: IRQ1 = 0x%02x, IRQ2 = 0x%02x\n", irq1, irq2);
+
+  switch (dev->opmode)
+    {
+#ifdef CONFIG_LPWAN_SX127X_TXSUPPORT
+      /* TX DONE */
+
+      case SX127X_OPMODE_TX:
+        {
+          /* Release TX sem */
+
+          nxsem_post(&dev->tx_sem);
+          break;
+        }
+#endif /* CONFIG_LPWAN_SX127X_TXSUPPORT */
+
+#ifdef CONFIG_LPWAN_SX127X_RXSUPPORT
+      /* RX DONE */
+
+      case SX127X_OPMODE_RX:
+        {
+          /* RX data valid ? */
+
+          if (dev->crcon == true && (irq2 & SX127X_FOM_IRQ2_CRCOK) == 0)
+            {
+              data_valid = false;
+            }
+
+          if (data_valid == true)
+            {
+              /* RX data valid */
+
+              ret = sx127x_fskook_rxhandle(dev);
+              if (ret > 0)
+                {
+                  if (dev->pfd)
+                    {
+                      /* Data available for input */
+
+                      dev->pfd->revents |= POLLIN;
+
+                      wlinfo("Wake up polled fd\n");
+                      nxsem_post(dev->pfd->sem);
+                    }
+
+                  /* Wake-up any thread waiting in recv */
+
+                  nxsem_post(&dev->rx_sem);
+                }
+            }
+          else
+            {
+              /* RX Data invalid */
+
+              wlinfo("Invalid FSK/OOK RX data!\n");
+            }
+
+          /* TODO: restart RX if continuous mode */
+
+          break;
+        }
+#endif /* CONFIG_LPWAN_SX127X_RXSUPPORT */
+
+      default:
+        {
+          wlwarn("WARNING: Interrupt not processed\n");
+          ret = -EINVAL;
+          break;
+        }
+    }
+
+  /* REVISIT: clear interrupts */
+
+  irq1 = (SX127X_FOM_IRQ1_RSSI | SX127X_FOM_IRQ1_PREAMBE |
+          SX127X_FOM_IRQ1_SYNCADDRMATCH);
+  irq2 = SX127X_FOM_IRQ2_FIFOOVR;
+
+  sx127x_lock(dev->spi);
+  sx127x_writeregbyte(dev, SX127X_FOM_IRQ1, irq1);
+  sx127x_writeregbyte(dev, SX127X_FOM_IRQ2, irq2);
+  sx127x_unlock(dev->spi);
+
+  return ret;
+}
+#endif /* CONFIG_LPWAN_SX127X_FSKOOK */
+
+/****************************************************************************
+ * Name: sx127x_isr0_process
+ *
+ * Description:
+ *   Handle DIO0 interrupt for LORA radio
+ *
+ ****************************************************************************/
+
+static void sx127x_isr0_process(FAR void *arg)
+{
+  DEBUGASSERT(arg);
+
+  FAR struct sx127x_dev_s *dev = (struct sx127x_dev_s *)arg;
+  int ret = OK;
+
+  /* Return immediately if isr0_process is not initialized */
+
+  if (dev->ops.isr0_process == NULL)
+    {
+      return;
+    }
+
+  /* isr0_process depends on the current modulation scheme */
+
+  ret = dev->ops.isr0_process(dev);
+  if (ret < 0)
+    {
+      wlerr("Failed to process ISR0 %d\n", ret);
+    }
+}
+
+/****************************************************************************
+ * Name: sx127x_irq0handler
+ ****************************************************************************/
+
+static int sx127x_irq0handler(int irq, FAR void *context, FAR void *arg)
+{
+  FAR struct sx127x_dev_s *dev = (FAR struct sx127x_dev_s *)arg;
+
+  DEBUGASSERT(dev != NULL);
+
+  DEBUGASSERT(work_available(&dev->irq0_work));
+
+  return work_queue(HPWORK, &dev->irq0_work, sx127x_isr0_process, arg, 0);
+}
+
+#ifdef CONFIG_LPWAN_SX127X_RXSUPPORT
+
+/****************************************************************************
+ * Name: sx127x_fskook_rxhandle
+ *
+ * Description:
+ *   Receive data from FIFO for FSK/OOK radio
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_LPWAN_SX127X_FSKOOK
+static size_t sx127x_fskook_rxhandle(FAR struct sx127x_dev_s *dev)
+{
+  DEBUGASSERT(dev->modulation == SX127X_MODULATION_FSK ||
+              dev->modulation == SX127X_MODULATION_OOK);
+
+  struct sx127x_read_hdr_s rxdata;
+  uint8_t datalen = 0;
+  size_t len      = 0;
+
+  /* Lock SPI */
+
+  sx127x_lock(dev->spi);
+
+  /* Get data from chip fifo */
+
+  if (dev->fskook.fixlen == true)
+    {
+      /* Fixed packet length hardcoded */
+
+      datalen = SX127X_RX_FIXLEN_DEFAULT;
+    }
+  else
+    {
+      /* First byte is payload length */
+
+      datalen = sx127x_readregbyte(dev, SX127X_CMN_FIFO);
+    }
+
+  /* Ignore packets with unsupported data length */
+
+  if (datalen > SX127X_READ_DATA_MAX)
+    {
+      wlerr("Unsupported data length! %d > %d\n",
+            datalen, SX127X_READ_DATA_MAX);
+      sx127x_unlock(dev->spi);
+      goto errout;
+    }
+
+  /* Read payload and store */
+
+  sx127x_readreg(dev, SX127X_CMN_FIFO, (uint8_t*)(&rxdata.data), datalen);
+
+  /* Unlock SPI */
+
+  sx127x_unlock(dev->spi);
+
+  /* No RX SNR data for FSK/OOK */
+
+  rxdata.snr = 0;
+
+  /* Store last RSSI */
+
+  rxdata.rssi = sx127x_fskook_rssi_get(dev);
+
+  /* Store packet length */
+
+  rxdata.datalen = datalen;
+
+  /* Total length */
+
+  len = datalen + SX127X_READ_DATA_HEADER_LEN;
+
+  /* Put data on local fifo */
+
+  sx127x_rxfifo_put(dev, (uint8_t *)&rxdata, len);
+
+errout:
+
+  /* Return total length */
+
+  return len;
+}
+#endif /* CONFIG_LPWAN_SX127X_FSKOOK */
+
+/****************************************************************************
+ * Name: sx127x_lora_rxhandle
+ *
+ * Description:
+ *   Receive data from FIFO for LORA radio
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_LPWAN_SX127X_LORA
+static size_t sx127x_lora_rxhandle(FAR struct sx127x_dev_s *dev)
+{
+  DEBUGASSERT(dev->modulation == SX127X_MODULATION_LORA);
+
+  struct sx127x_read_hdr_s rxdata;
+  size_t  len     = 0;
+  uint8_t datalen = 0;
+  uint8_t rx_ptr  = 0;
+
+  /* Lock SPI */
+
+  sx127x_lock(dev->spi);
+
+  /* Get payload length */
+
+  datalen = sx127x_readregbyte(dev, SX127X_LRM_RXBYTES);
+
+  /* Ignore packets with unsupported data length */
+
+  if (datalen > SX127X_READ_DATA_MAX)
+    {
+      wlerr("Unsupported data length! %d > %d\n",
+            datalen, SX127X_READ_DATA_MAX);
+      sx127x_unlock(dev->spi);
+      goto errout;
+    }
+
+  /* Get start address of last packet received */
+
+  rx_ptr = sx127x_readregbyte(dev, SX127X_LRM_RXCURR);
+
+  /* Set FIFO pointer */
+
+  sx127x_writeregbyte(dev, SX127X_LRM_ADDRPTR, rx_ptr);
+
+  /* Read payload */
+
+  sx127x_readreg(dev, SX127X_CMN_FIFO, (uint8_t*)(&rxdata.data), datalen);
+
+  /* Unlock SPI */
+
+  sx127x_unlock(dev->spi);
+
+  /* Store last RX SNR */
+
+  rxdata.snr = sx127x_lora_snr_get(dev);
+
+  /* Store last RX RSSI */
+
+  rxdata.rssi = sx127x_lora_pckrssi_get(dev, rxdata.snr);
+
+  /* Store packet length */
+
+  rxdata.datalen = datalen;
+
+  /* Total length */
+
+  len = datalen + SX127X_READ_DATA_HEADER_LEN;
+
+  /* Put data on local fifo */
+
+  sx127x_rxfifo_put(dev, (uint8_t *)&rxdata, len);
+
+errout:
+
+  /* Return total length */
+
+  return len;
+}
+#endif /* CONFIG_LPWAN_SX127X_LORA */
+
+/****************************************************************************
+ * Name: sx127x_rxfifo_get
+ *
+ * Description:
+ *   Get data from RX FIFO
+ *
+ ****************************************************************************/
+
+static ssize_t sx127x_rxfifo_get(FAR struct sx127x_dev_s *dev,
+                                 FAR uint8_t *buffer, size_t buflen)
+{
+  FAR struct sx127x_read_hdr_s *pkt = NULL;
+  size_t i      = 0;
+  size_t pktlen = 0;
+  size_t ret    = 0;
+
+  ret = nxsem_wait(&dev->rx_buffer_sem);
+  if (ret < 0)
+    {
+      return ret;
+    }
+
+  /* No data on RX FIFO */
+
+  if (dev->rx_fifo_len == 0)
+    {
+      pktlen = 0;
+      goto no_data;
+    }
+
+  /* Get packet header */
+
+  pkt = (struct sx127x_read_hdr_s *)
+    (dev->rx_buffer + dev->nxt_read * SX127X_RXFIFO_ITEM_SIZE);
+
+  /* Packet length is data length + header length */
+
+  pktlen = pkt->datalen + SX127X_READ_DATA_HEADER_LEN;
+
+  /* Get packet from FIFO */
+
+  for (i = 0; i < pktlen && i < SX127X_RXFIFO_ITEM_SIZE; i += 1)
+    {
+      buffer[i] =
+        dev->rx_buffer[dev->nxt_read * SX127X_RXFIFO_ITEM_SIZE + i];
+    }
+
+  dev->nxt_read = (dev->nxt_read + 1) % CONFIG_LPWAN_SX127X_RXFIFO_LEN;
+  dev->rx_fifo_len--;
+
+  ret = pktlen;
+
+no_data:
+  nxsem_post(&dev->rx_buffer_sem);
+  return ret;
+}
+
+/****************************************************************************
+ * Name: sx127x_rxfifo_put
+ *
+ * Description:
+ *   Put packet data on RX FIFO
+ *
+ ****************************************************************************/
+
+static void sx127x_rxfifo_put(FAR struct sx127x_dev_s *dev,
+                              FAR uint8_t *buffer, size_t buflen)
+{
+  size_t  i   = 0;
+  int     ret = 0;
+
+  ret = nxsem_wait(&dev->rx_buffer_sem);
+  if (ret < 0)
+    {
+      return;
+    }
+
+  dev->rx_fifo_len++;
+  if (dev->rx_fifo_len > CONFIG_LPWAN_SX127X_RXFIFO_LEN)
+    {
+      dev->rx_fifo_len = CONFIG_LPWAN_SX127X_RXFIFO_LEN;
+      dev->nxt_read = (dev->nxt_read + 1) % CONFIG_LPWAN_SX127X_RXFIFO_LEN;
+    }
+
+  /* Put packet on fifo */
+
+  for (i = 0; i < (buflen + 1) && i < SX127X_RXFIFO_ITEM_SIZE; i += 1)
+    {
+      dev->rx_buffer[i + dev->nxt_write * SX127X_RXFIFO_ITEM_SIZE] =
+        buffer[i];
+    }
+
+  dev->nxt_write = (dev->nxt_write + 1) % CONFIG_LPWAN_SX127X_RXFIFO_LEN;
+  nxsem_post(&dev->rx_buffer_sem);
+}
+
+#endif /* CONFIG_LPWAN_SX127X_RXSUPPORT */
+
+#ifdef CONFIG_LPWAN_SX127X_TXSUPPORT
+
+/****************************************************************************
+ * Name: sx127x_txfifo_write
+ *
+ * Description:
+ *   Write data to the SX127X TX FIFO
+ *
+ ****************************************************************************/
+
+static int sx127x_txfifo_write(FAR struct sx127x_dev_s *dev,
+                               FAR const uint8_t *data, size_t datalen)
+{
+  /* NOTE: Do not lock SPI here, it should be already locked! */
+
+  /* Write buffer to FIFO */
+
+  sx127x_writereg(dev, SX127X_CMN_FIFO, data, datalen);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: sx127x_fskook_send
+ *
+ * Description:
+ *   Send data in FSK/OOK radio mode
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_LPWAN_SX127X_FSKOOK
+static int sx127x_fskook_send(FAR struct sx127x_dev_s *dev,
+                              FAR const uint8_t *data, size_t datalen)
+{
+  DEBUGASSERT(dev->modulation == SX127X_MODULATION_FSK ||
+              dev->modulation == SX127X_MODULATION_OOK);
+
+  int ret = 0;
+
+  /* Check payload length */
+
+  if (datalen > SX127X_FOM_PAYLOADLEN_MAX)
+    {
+      wlerr("Not supported data len!\n");
+      ret = -EINVAL;
+      goto errout;
+    }
+
+#if 1
+  /* For now we don't support datalen > FIFO_LEN for FSK/OOK.
+   * For fixlen = true,  datalen <= 64
+   * For fixlen = false, datalen < 64 (we support this for now)
+   */
+
+  if (datalen > 63)
+    {
+      wlerr("Not supported data len!\n");
+      ret = -EINVAL;
+      goto errout;
+    }
+#endif
+
+  /* Lock SPI */
+
+  sx127x_lock(dev->spi);
+
+  if (dev->fskook.fixlen == true)
+    {
+      /* Write payload length register (only LSB for now) */
+
+      sx127x_writeregbyte(dev, SX127X_FOM_PAYLOADLEN, datalen);
+    }
+  else
+    {
+      /* First byte is length */
+
+      ret = sx127x_txfifo_write(dev, (uint8_t *)&datalen, 1);
+    }
+
+  /* Write payload */
+
+  sx127x_txfifo_write(dev, data, datalen);
+
+  /* Unlock SPI */
+
+  sx127x_unlock(dev->spi);
+
+errout:
+  return ret;
+}
+#endif /* CONFIG_LPWAN_SX127X_FSKOOK */
+
+/****************************************************************************
+ * Name: sx127x_lora_send
+ *
+ * Description:
+ *   Send data in LORA radio mode
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_LPWAN_SX127X_LORA
+static int sx127x_lora_send(FAR struct sx127x_dev_s *dev,
+                            FAR const uint8_t *data, size_t datalen)
+{
+  DEBUGASSERT(dev->modulation == SX127X_MODULATION_LORA);
+
+  int ret = 0;
+
+  /* Check payload length */
+
+  if (datalen > SX127X_LRM_PAYLOADLEN_MAX)
+    {
+      wlerr("Not supported data len!\n");
+      ret = -EINVAL;
+      goto errout;
+    }
+
+  /* Lock SPI */
+
+  sx127x_lock(dev->spi);
+
+  /* Configure payload length */
+
+  sx127x_writeregbyte(dev, SX127X_LRM_PAYLOADLEN, datalen);
+
+  /* Write payload */
+
+  sx127x_txfifo_write(dev, data, datalen);
+
+  /* Unlock SPI */
+
+  sx127x_unlock(dev->spi);
+
+errout:
+  return ret;
+}
+#endif /* CONFIG_LPWAN_SX127X_LORA */
+#endif /* CONFIG_LPWAN_SX127X_TXSUPPORT */
+
+/****************************************************************************
+ * Name: sx127x_opmode_init
+ *
+ * Description:
+ *   Initialize operation mode
+ *
+ ****************************************************************************/
+
+static int sx127x_opmode_init(FAR struct sx127x_dev_s *dev, uint8_t opmode)
+{
+  int ret = OK;
+
+  if (opmode == dev->opmode)
+    {
+      goto errout;
+    }
+
+  /* Board-specific opmode configuration */
+
+  ret = dev->lower->opmode_change(opmode);
+  if (ret < 0)
+    {
+      wlerr("Board-specific opmode_change failed %d!\n", ret);
+      goto errout;
+    }
+
+  /* Initialize opmode */
+
+  ret = dev->ops.opmode_init(dev, opmode);
+  if (ret < 0)
+    {
+      wlerr("opmode_init failed %d!\n", ret);
+      goto errout;
+    }
+
+errout:
+  return ret;
+}
+
+/****************************************************************************
+ * Name: sx127x_opmode_set
+ *
+ * Description:
+ *   Set operation mode
+ *
+ ****************************************************************************/
+
+static int sx127x_opmode_set(FAR struct sx127x_dev_s *dev, uint8_t opmode)
+{
+  int ret = OK;
+
+  wlinfo("opmode_set %d->%d\n", dev->opmode, opmode);
+
+  if (opmode == dev->opmode)
+    {
+      goto errout;
+    }
+
+#ifdef CONFIG_LPWAN_SX127X_RXSUPPORT
+  /* REVISIT: TX is initialized before data send,
+   * but where we should initialize RX ?
+   */
+
+  if (opmode != SX127X_OPMODE_TX)
+    {
+      ret = sx127x_opmode_init(dev, opmode);
+    }
+#endif
+
+  /* Change mode */
+
+  dev->ops.opmode_set(dev, opmode);
+
+  /* Update local variable */
+
+  dev->opmode = opmode;
+
+errout:
+  return ret;
+}
+
+/****************************************************************************
+ * Name: sx127x_opmode_get
+ *
+ * Description:
+ *   Get current operation mode
+ *
+ ****************************************************************************/
+
+static uint8_t sx127x_opmode_get(FAR struct sx127x_dev_s *dev)
+{
+  wlerr("TODO: sx127x_opmode_get not implemented yet\n");
+  return 0;
+}
+
+/****************************************************************************
+ * Name: sx127x_lora_opmode_init
+ *
+ * Description:
+ *   Initialize operation mode for FSK/OOK.
+ *   We need this even if FSK/OOK support is disabled
+ *
+ ****************************************************************************/
+
+static int sx127x_fskook_opmode_init(FAR struct sx127x_dev_s *dev,
+                                     uint8_t opmode)
+{
+  DEBUGASSERT(dev->modulation == SX127X_MODULATION_FSK ||
+              dev->modulation == SX127X_MODULATION_OOK);
+
+  uint8_t dio0map = 0;
+  uint8_t setbits = 0;
+  uint8_t clrbits = 0;
+  int     ret     = OK;
+
+  sx127x_lock(dev->spi);
+
+  /* Get mode specific configuration */
+
+  switch (opmode)
+    {
+      case SX127X_OPMODE_SLEEP:
+      case SX127X_OPMODE_STANDBY:
+      case SX127X_OPMODE_FSRX:
+      case SX127X_OPMODE_FSTX:
+        {
+          break;
+        }
+
+      case SX127X_OPMODE_TX:
+        {
+          /* Remap DIO0 to RXTX DONE */
+
+          dio0map = SX127X_FOM_DIOMAP1_DIO0_RXTX;
+
+          /* TX start condition on FIFO not empty */
+
+          sx127x_writeregbyte(dev, SX127X_FOM_FIFOTHR,
+                              SX127X_FOM_FIFOTHR_TXSTARTCOND);
+
+          break;
+        }
+
+      case SX127X_OPMODE_RX:
+        {
+          /* Remap DIO0 to RXTX DONE */
+
+          dio0map = SX127X_FOM_DIOMAP1_DIO0_RXTX;
+
+          /* REVISIT: Configure RXCFG register:
+           * - AGC auto ON
+           * - AFC auto ON
+           * - RX trigger on PreableDetect
+           */
+
+          setbits = (SX127X_FOM_RXCFG_AGCAUTOON | SX127X_FOM_RXCFG_AFCAUTOON
+                     | SX127X_FOM_RXCFG_TRG_PREDET);
+
+          sx127x_writeregbyte(dev, SX127X_FOM_RXCFG, setbits);
+
+          break;
+        }
+
+      default:
+        {
+          wlerr("ERROR: invalid mode %d\n", opmode);
+          ret = -EINVAL;
+          goto errout;
+        }
+    }
+
+  /* Configure DIO0 pin */
+
+  setbits = dio0map;
+  clrbits = SX127X_CMN_DIOMAP1_DIO0_MASK;
+  sx127x_modregbyte(dev, SX127X_CMN_DIOMAP1, setbits, clrbits);
+
+  sx127x_unlock(dev->spi);
+
+errout:
+  return ret;
+}
+
+/****************************************************************************
+ * Name: sx127x_fskook_opmode_set
+ *
+ * Description:
+ *   Set operation mode for FSK/OOK.
+ *   We need this even if FSK/OOK support is disabled
+ *
+ ****************************************************************************/
+
+static int sx127x_fskook_opmode_set(FAR struct sx127x_dev_s *dev,
+                                    uint8_t opmode)
+{
+  DEBUGASSERT(dev->modulation == SX127X_MODULATION_FSK ||
+              dev->modulation == SX127X_MODULATION_OOK);
+
+  uint8_t setbits = 0;
+  uint8_t clrbits = 0;
+  int     ret     = OK;
+
+  switch (opmode)
+    {
+      case SX127X_OPMODE_SLEEP:
+      case SX127X_OPMODE_STANDBY:
+      case SX127X_OPMODE_FSRX:
+      case SX127X_OPMODE_FSTX:
+      case SX127X_OPMODE_TX:
+      case SX127X_OPMODE_RX:
+        {
+          /* Do nothing */
+
+          break;
+        }
+
+      default:
+        {
+          wlerr("ERROR: invalid FSK/OOK mode %d\n", opmode);
+          ret = -EINVAL;
+          goto errout;
+        }
+    }
+
+  sx127x_lock(dev->spi);
+
+  /* Update mode */
+
+  setbits = ((opmode - 1) << SX127X_CMN_OPMODE_MODE_SHIFT);
+  clrbits = SX127X_CMN_OPMODE_MODE_MASK;
+  sx127x_modregbyte(dev, SX127X_CMN_OPMODE, setbits, clrbits);
+
+  sx127x_unlock(dev->spi);
+
+errout:
+  return ret;
+}
+
+#ifdef CONFIG_LPWAN_SX127X_FSKOOK
+
+/****************************************************************************
+ * Name: sx127x_fskook_rxbw_set
+ *
+ * Description:
+ *  Set RX BW for FSK/OOK
+ *
+ ****************************************************************************/
+
+static int sx127x_fskook_rxbw_set(FAR struct sx127x_dev_s *dev,
+                                  uint8_t rx_bw)
+{
+  DEBUGASSERT(dev->modulation == SX127X_MODULATION_FSK ||
+              dev->modulation == SX127X_MODULATION_OOK);
+
+  int ret = OK;
+
+  if (rx_bw == dev->fskook.rx_bw)
+    {
+      goto errout;
+    }
+
+  switch (rx_bw)
+    {
+      case FSKOOK_BANDWIDTH_2P6KHZ:
+      case FSKOOK_BANDWIDTH_3P1KHZ:
+      case FSKOOK_BANDWIDTH_3P9KHZ:
+      case FSKOOK_BANDWIDTH_5P2KHZ:
+      case FSKOOK_BANDWIDTH_6P3KHZ:
+      case FSKOOK_BANDWIDTH_7P8KHZ:
+      case FSKOOK_BANDWIDTH_10P4KHZ:
+      case FSKOOK_BANDWIDTH_12P5KHZ:
+      case FSKOOK_BANDWIDTH_15P6KHZ:
+      case FSKOOK_BANDWIDTH_20P8KHZ:
+      case FSKOOK_BANDWIDTH_25KHZ:
+      case FSKOOK_BANDWIDTH_31P3KHZ:
+      case FSKOOK_BANDWIDTH_41P7KHZ:
+      case FSKOOK_BANDWIDTH_50KHZ:
+      case FSKOOK_BANDWIDTH_62P5KHZ:
+      case FSKOOK_BANDWIDTH_83P3KHZ:
+      case FSKOOK_BANDWIDTH_100KHZ:
+      case FSKOOK_BANDWIDTH_125KHZ:
+      case FSKOOK_BANDWIDTH_166P7KHZ:
+      case FSKOOK_BANDWIDTH_200KHZ:
+      case FSKOOK_BANDWIDTH_250KHZ:
+        {
+          /* Lock SPI */
+
+          sx127x_lock(dev->spi);
+
+          /* Write register */
+
+          sx127x_writeregbyte(dev, SX127X_FOM_RXBW, rx_bw);
+
+          /* Unlock SPI */
+
+          sx127x_unlock(dev->spi);
+
+          break;
+        }
+
+      default:
+        {
+          wlerr("Unsupported bandwidth %d\n", rx_bw);
+          ret = -EINVAL;
+          goto errout;
+        }
+    }
+
+  /* Update local */
+
+  dev->fskook.rx_bw = rx_bw;
+
+errout:
+  return ret;
+}
+
+/****************************************************************************
+ * Name: sx127x_fskook_afcbw_set
+ *
+ * Description:
+ *  Set AFC BW for FSK/OOK
+ *
+ ****************************************************************************/
+
+static int sx127x_fskook_afcbw_set(FAR struct sx127x_dev_s *dev,
+                                   uint8_t afc_bw)
+{
+  DEBUGASSERT(dev->modulation == SX127X_MODULATION_FSK ||
+              dev->modulation == SX127X_MODULATION_OOK);
+
+  int ret = OK;
+
+  if (afc_bw == dev->fskook.afc_bw)
+    {
+      goto errout;
+    }
+
+  switch (afc_bw)
+    {
+      case FSKOOK_BANDWIDTH_2P6KHZ:
+      case FSKOOK_BANDWIDTH_3P1KHZ:
+      case FSKOOK_BANDWIDTH_3P9KHZ:
+      case FSKOOK_BANDWIDTH_5P2KHZ:
+      case FSKOOK_BANDWIDTH_6P3KHZ:
+      case FSKOOK_BANDWIDTH_7P8KHZ:
+      case FSKOOK_BANDWIDTH_10P4KHZ:
+      case FSKOOK_BANDWIDTH_12P5KHZ:
+      case FSKOOK_BANDWIDTH_15P6KHZ:
+      case FSKOOK_BANDWIDTH_20P8KHZ:
+      case FSKOOK_BANDWIDTH_25KHZ:
+      case FSKOOK_BANDWIDTH_31P3KHZ:
+      case FSKOOK_BANDWIDTH_41P7KHZ:
+      case FSKOOK_BANDWIDTH_50KHZ:
+      case FSKOOK_BANDWIDTH_62P5KHZ:
+      case FSKOOK_BANDWIDTH_83P3KHZ:
+      case FSKOOK_BANDWIDTH_100KHZ:
+      case FSKOOK_BANDWIDTH_125KHZ:
+      case FSKOOK_BANDWIDTH_166P7KHZ:
+      case FSKOOK_BANDWIDTH_200KHZ:
+      case FSKOOK_BANDWIDTH_250KHZ:
+        {
+          /* Lock SPI */
+
+          sx127x_lock(dev->spi);
+
+          /* Write register */
+
+          sx127x_writeregbyte(dev, SX127X_FOM_AFCBW, afc_bw);
+
+          /* Unlock SPI */
+
+          sx127x_unlock(dev->spi);
+
+          break;
+        }
+
+      default:
+        {
+          wlerr("Unsupported bandwidth %d\n", afc_bw);
+          ret = -EINVAL;
+          goto errout;
+        }
+    }
+
+  /* Update local */
+
+  dev->fskook.afc_bw = afc_bw;
+
+errout:
+  return ret;
+}
+
+/****************************************************************************
+ * Name: sx127x_fskook_seq_start
+ ****************************************************************************/
+
+static void sx127x_fskook_seq_start(FAR struct sx127x_dev_s *dev, bool state)
+{
+  DEBUGASSERT(dev->modulation == SX127X_MODULATION_FSK ||
+              dev->modulation == SX127X_MODULATION_OOK);
+
+  /* Lock SPI */
+
+  sx127x_lock(dev->spi);
+
+  if (state == true)
+    {
+      /* Start sequencer */
+
+      sx127x_modregbyte(dev, SX127X_FOM_SEQCFG1,
+                        SX127X_FOM_SEQCFG1_SEQSTART, 0);
+    }
+  else
+    {
+      /* Stop sequencer */
+
+      sx127x_modregbyte(dev, SX127X_FOM_SEQCFG1,
+                        SX127X_FOM_SEQCFG1_SEQSTOP, 0);
+    }
+
+  /* Unlock SPI */
+
+  sx127x_unlock(dev->spi);
+
+  /* Store sequencer state */
+
+  dev->fskook.seqon = state;
+}
+
+/****************************************************************************
+ * Name: sx127x_fskook_seq_init
+ *
+ * Description:
+ *   Initialize FSK/OOK sequencer.
+ *   This can be used to automate transitions between operation modes and
+ *   thus further reduce energy consumption.
+ *
+ ****************************************************************************/
+
+static int sx127x_fskook_seq_init(FAR struct sx127x_dev_s *dev)
+{
+  DEBUGASSERT(dev->modulation == SX127X_MODULATION_FSK ||
+              dev->modulation == SX127X_MODULATION_OOK);
+
+  uint8_t seq1 = 0;
+  uint8_t seq2 = 0;
+  int     ret  = OK;
+
+  /* Need sleep mode or standby mode */
+
+  if (dev->opmode > SX127X_OPMODE_STANDBY)
+    {
+      sx127x_opmode_set(dev, SX127X_OPMODE_STANDBY);
+    }
+
+  /* Nothing here */
+
+  seq1 = 0;
+  seq2 = 0;
+
+  /* Lock SPI */
+
+  sx127x_lock(dev->spi);
+
+  /* Write registers */
+
+  sx127x_writeregbyte(dev, SX127X_FOM_SEQCFG1, seq1);
+  sx127x_writeregbyte(dev, SX127X_FOM_SEQCFG2, seq2);
+
+  /* Unlock SPI */
+
+  sx127x_unlock(dev->spi);
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: sx127x_fskook_syncword_get
+ ****************************************************************************/
+
+static void sx127x_fskook_syncword_get(FAR struct sx127x_dev_s *dev,
+                                       FAR uint8_t *sw, FAR uint8_t *len)
+{
+  DEBUGASSERT(dev->modulation == SX127X_MODULATION_FSK ||
+              dev->modulation == SX127X_MODULATION_OOK);
+
+  wlerr("sx127x_fskook_syncword_get not implemented yet\n");
+}
+
+/****************************************************************************
+ * Name: sx127x_fskook_syncword_set
+ *
+ * Description:
+ *   Set SyncWord for FSK/OOK
+ *
+ ****************************************************************************/
+
+static int sx127x_fskook_syncword_set(FAR struct sx127x_dev_s *dev,
+                                      FAR uint8_t *sw, uint8_t len)
+{
+  DEBUGASSERT(dev->modulation == SX127X_MODULATION_FSK ||
+              dev->modulation == SX127X_MODULATION_OOK);
+
+  uint8_t setbits = 0;
+  uint8_t clrbits = 0;
+  uint8_t offset  = 0;
+  int     ret     = OK;
+  int     i       = 0;
+
+  if (len > SX127X_FOM_SYNCSIZE_MAX)
+    {
+      wlerr("Unsupported sync word length %d!", len);
+      ret = -EINVAL;
+      goto errout;
+    }
+
+  /* Lock SPI */
+
+  sx127x_lock(dev->spi);
+
+  if (len == 0)
+    {
+      /* Disable sync word generation and detection */
+
+      clrbits = (SX127X_FOM_SYNCCFG_SYNCSIZE_MASK |
+                 SX127X_FOM_SYNCCFG_SYNCON);
+      setbits = 0;
+
+      sx127x_modregbyte(dev, SX127X_FOM_SYNCCFG, setbits, clrbits);
+    }
+  else
+    {
+      /* Configure sync word length */
+
+      clrbits = SX127X_FOM_SYNCCFG_SYNCSIZE_MASK;
+      setbits = (SX127X_FOM_SYNCCFG_SYNCON |
+                 SX127X_FOM_SYNCCFG_SYNCSIZE(len - 1));
+
+      sx127x_modregbyte(dev, SX127X_FOM_SYNCCFG, setbits, clrbits);
+
+      /* Write sync words */
+
+      for (i = 0; i < len; i += 1)
+        {
+          offset = SX127X_FOM_SYNCVAL1 + i;
+          sx127x_writeregbyte(dev, offset, sw[i]);
+        }
+    }
+
+  /* Unlock SPI */
+
+  sx127x_unlock(dev->spi);
+
+errout:
+  return ret;
+}
+
+/****************************************************************************
+ * Name: sx127x_fskook_init
+ *
+ * Description:
+ *   Initialization specific for FSK/OOK modulation
+ *
+ ****************************************************************************/
+
+static void sx127x_fskook_init(FAR struct sx127x_dev_s *dev)
+{
+  uint8_t setbits = 0;
+  uint8_t clrbits = 0;
+  uint8_t syncword[] =
+  {
+    0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
+  };
+
+  DEBUGASSERT(dev->modulation == SX127X_MODULATION_FSK ||
+              dev->modulation == SX127X_MODULATION_OOK);
+
+  /* Set FDEV */
+
+  sx127x_fskook_fdev_set(dev, SX127X_FDEV_DEFAULT);
+
+  /* Set bitrate */
+
+  sx127x_fskook_bitrate_set(dev, SX127X_FOM_BITRATE_DEFAULT);
+
+  /* Configure sequencer
+   * WARNING: sequencer is OFF for now!
+   */
+
+  sx127x_fskook_seq_init(dev);
+  sx127x_fskook_seq_start(dev, false);
+
+  /* Configure Sync Word
+   * REVISIT: FSK communication doesn't work if syncword is disabled!
+   */
+
+  sx127x_fskook_syncword_set(dev, syncword, 8);
+
+  /* Configure bandwidth */
+
+  sx127x_fskook_rxbw_set(dev, SX127X_FSKOOK_RXBW_DEFAULT);
+  sx127x_fskook_afcbw_set(dev, SX127X_FSKOOK_AFCBW_DEFAULT);
+
+  /* Lock SPI */
+
+  sx127x_lock(dev->spi);
+
+  /* Configure packet mode settings 1:
+   *   - fixlen
+   *   - RX/TX CRC
+   */
+
+  setbits  = 0;
+  setbits |= dev->fskook.fixlen == true ?  0 : SX127X_FOM_PKTCFG1_PCKFORMAT;
+  setbits |= dev->crcon == true ? SX127X_FOM_PKTCFG1_CRCON : 0;
+  clrbits  = SX127X_FOM_PKTCFG1_PCKFORMAT | SX127X_FOM_PKTCFG1_CRCON;
+
+  /* Write packet mode settings 1 */
+
+  sx127x_modregbyte(dev, SX127X_FOM_PKTCFG1, setbits, clrbits);
+
+  /* Configure packet mode settings 2:
+   *   - packet mode on
+   */
+
+  setbits  = 0;
+  setbits |= SX127X_FOM_PKTCFG2_DATAMODE;
+  clrbits  = 0;
+
+  /* Write packet mode settings 2 */
+
+  sx127x_modregbyte(dev, SX127X_FOM_PKTCFG2, setbits, clrbits);
+
+  /* Configure PARAMP register */
+
+  setbits = (SX127X_FSKOOK_SHAPING_DEFAULT | SX127X_FSKOOK_PARAMP_DEFAULT);
+  clrbits = (SX127X_CMN_PARAMP_PARAMP_MASK | SX127X_CMN_PARAMP_SHAPING_MASK);
+
+  /* Write PARAMP register */
+
+  sx127x_modregbyte(dev, SX127X_CMN_PARAMP, setbits, clrbits);
+
+  /* Unlock SPI */
+
+  sx127x_unlock(dev->spi);
+}
+
+/****************************************************************************
+ * Name: sx127x_fskook_rssi_get
+ *
+ * Description:
+ *   Get current RSSI for FSK/OOK modem
+ *
+ ****************************************************************************/
+
+static int16_t sx127x_fskook_rssi_get(FAR struct sx127x_dev_s *dev)
+{
+  uint8_t regval = 0;
+
+  /* Lock SPI */
+
+  sx127x_lock(dev->spi);
+
+  /* Get register value */
+
+  regval = sx127x_readregbyte(dev, SX127X_FOM_RSSIVAL);
+
+  /* Unlock SPI */
+
+  sx127x_unlock(dev->spi);
+
+  /* Return decoded RSSI value */
+
+  return SX127X_FOM_RSSIVAL_GET(regval);
+}
+
+/****************************************************************************
+ * Name: sx127x_fskook_fdev_set
+ *
+ * Description:
+ *   Set frequency deviation
+ *
+ ****************************************************************************/
+
+static int sx127x_fskook_fdev_set(FAR struct sx127x_dev_s *dev,
+                                  uint32_t freq)
+{
+  uint32_t fdev = 0;
+  int      ret  = OK;
+
+  /* Only for FSK modulation */
+
+  if (dev->modulation != SX127X_MODULATION_FSK)
+    {
+      ret = -EINVAL;
+      goto errout;
+    }
+
+  if (freq == dev->fskook.fdev)
+    {
+      goto errout;
+    }
+
+  /* Lock SPI */
+
+  sx127x_lock(dev->spi);
+
+  /* Get FDEV value */
+
+  fdev = SX127X_FDEV_FROM_FREQ(freq);
+
+  /* Write FDEV MSB */
+
+  sx127x_writeregbyte(dev, SX127X_FOM_FDEVMSB, SX127X_FOM_FDEV_MSB(fdev));
+
+  /* Write FDEV LSB */
+
+  sx127x_writeregbyte(dev, SX127X_FOM_FDEVLSB, SX127X_FOM_FDEV_LSB(fdev));
+
+  /* Unlock SPI */
+
+  sx127x_unlock(dev->spi);
+
+  /* Update local variable */
+
+  dev->fskook.fdev = freq;
+
+errout:
+  return ret;
+}
+
+/****************************************************************************
+ * Name: sx127x_fskook_bitrate_set
+ *
+ * Description:
+ *   Set bitrate for FSK/OOK modulation
+ *
+ ****************************************************************************/
+
+static int sx127x_fskook_bitrate_set(FAR struct sx127x_dev_s *dev,
+                                     uint32_t bitrate)
+{
+  uint32_t br  = 0;
+  int      ret = OK;
+
+  if (bitrate == dev->fskook.bitrate)
+    {
+      goto errout;
+    }
+
+  /* Get bitrate register value */
+
+  br = SX127X_FXOSC / bitrate;
+
+  /* Lock SPI */
+
+  sx127x_lock(dev->spi);
+
+  /* Set fractial part to 0 */
+
+  sx127x_writeregbyte(dev, SX127X_FOM_BITRATEFRAC, 0);
+
+  /* Write MSB */
+
+  sx127x_writeregbyte(dev, SX127X_FOM_BITRATEMSB,
+                      SX127X_FOM_BITRATE_MSB(br));
+
+  /* Write LSB */
+
+  sx127x_writeregbyte(dev, SX127X_FOM_BITRATELSB,
+                      SX127X_FOM_BITRATE_LSB(br));
+
+  /* Unlock SPI */
+
+  sx127x_unlock(dev->spi);
+
+  /* Update local variable */
+
+  dev->fskook.bitrate = bitrate;
+
+errout:
+  return ret;
+}
+
+/****************************************************************************
+ * Name: sx127x_fskook_preamble_set
+ *
+ * Description:
+ *   Set preamble for FSK/OOK modulation
+ *
+ ****************************************************************************/
+
+static void sx127x_fskook_preamble_set(FAR struct sx127x_dev_s *dev,
+                                       uint32_t len)
+{
+  uint8_t regval = 0;
+
+  /* Lock SPI */
+
+  sx127x_lock(dev->spi);
+
+  if (len == 0)
+    {
+      /* Disable detector */
+
+      regval = 0;
+      sx127x_writeregbyte(dev, SX127X_FOM_PREDET, regval);
+    }
+  else
+    {
+      /* Configure preamble length */
+
+      regval = SX127X_FOM_PRE_MSB(len);
+      sx127x_writeregbyte(dev, SX127X_FOM_PREMSB, regval);
+      regval = SX127X_FOM_PRE_LSB(len);
+      sx127x_writeregbyte(dev, SX127X_FOM_PRELSB, regval);
+
+      /* Configure preamble polarity to 0xAA */
+
+      regval = SX127X_FOM_SYNCCFG_PREPOL;
+      sx127x_modregbyte(dev, SX127X_FOM_SYNCCFG, regval, 0);
+
+      /* Configure and enable preamble detector:
+       *   - tolerance = 10
+       *   - detector size = 2B
+       */
+
+      regval = (SX127X_FOM_PREDET_ON | SX127X_FOM_PREDET_SIZE_2B |
+                  SX127X_FOM_PREDET_TOL(10));
+      sx127x_writeregbyte(dev, SX127X_FOM_PREDET, regval);
+    }
+
+  /* Unlock SPI */
+
+  sx127x_unlock(dev->spi);
+}
+
+/****************************************************************************
+ * Name: sx127x_fskook_preamble_get
+ *
+ * Description:
+ *   Get current preamble configuration for FSK/OOK
+ *
+ ****************************************************************************/
+
+static int sx127x_fskook_preamble_get(FAR struct sx127x_dev_s *dev)
+{
+  wlerr("sx127x_fskook_preamble_get\n");
+  return 0;
+}
+
+#endif /* CONFIG_LPWAN_SX127X_FSKOOK */
+
+#ifdef CONFIG_LPWAN_SX127X_LORA
+
+/****************************************************************************
+ * Name: sx127x_lora_opmode_init
+ *
+ * Description:
+ *   Initialize operation mode for LORA
+ *
+ ****************************************************************************/
+
+static int sx127x_lora_opmode_init(FAR struct sx127x_dev_s *dev,
+                                   uint8_t opmode)
+{
+  DEBUGASSERT(dev->modulation == SX127X_MODULATION_LORA);
+
+  uint8_t dio0map = 0;
+  uint8_t setbits = 0;
+  uint8_t clrbits = 0;
+  int     ret     = OK;
+
+  sx127x_lock(dev->spi);
+
+  /* Get mode specific configuration */
+
+  switch (opmode)
+    {
+      case SX127X_OPMODE_SLEEP:
+      case SX127X_OPMODE_STANDBY:
+      case SX127X_OPMODE_FSRX:
+      case SX127X_OPMODE_FSTX:
+        {
+          break;
+        }
+
+      case SX127X_OPMODE_TX:
+        {
+          /* DIO0 is TX DONE */
+
+          dio0map = SX127X_LRM_DIOMAP1_DIO0_TXDONE;
+
+          /* Full buffer for TX */
+
+          sx127x_writeregbyte(dev, SX127X_LRM_TXBASE, 0);
+
+          /* Reset FIFO pointer */
+
+          sx127x_writeregbyte(dev, SX127X_LRM_ADDRPTR, 0);
+
+          break;
+        }
+
+      case SX127X_OPMODE_RX:
+      case SX127X_OPMODE_RXSINGLE:
+        {
+          /* DIO0 is RX DONE */
+
+          dio0map = SX127X_LRM_DIOMAP1_DIO0_RXDONE;
+
+          /* Full buffer for RX */
+
+          sx127x_writeregbyte(dev, SX127X_LRM_RXBASE, 0);
+
+          /* Reset FIFO pointer */
+
+          sx127x_writeregbyte(dev, SX127X_LRM_ADDRPTR, 0);
+
+          break;
+        }
+
+      case SX127X_OPMODE_CAD:
+        {
+          /* DIO0 is CAD DONE */
+
+          dio0map = SX127X_LRM_DIOMAP1_DIO0_CADDONE;
+
+          break;
+        }
+
+      default:
+        {
+          wlerr("ERROR: invalid mode %d\n", opmode);
+          ret = -EINVAL;
+          goto errout;
+        }
+    }
+
+  /* Configure DIO0 pin */
+
+  setbits = dio0map;
+  clrbits = SX127X_CMN_DIOMAP1_DIO0_MASK;
+  sx127x_modregbyte(dev, SX127X_CMN_DIOMAP1, setbits, clrbits);
+
+  sx127x_unlock(dev->spi);
+
+errout:
+  return ret;
+}
+
+/****************************************************************************
+ * Name: sx127x_lora_opmode_set
+ *
+ * Description:
+ *   Set operation mode for LORA
+ *
+ ****************************************************************************/
+
+static int sx127x_lora_opmode_set(FAR struct sx127x_dev_s *dev,
+                                  uint8_t opmode)
+{
+  DEBUGASSERT(dev->modulation == SX127X_MODULATION_LORA);
+
+  int ret = OK;
+
+  sx127x_lock(dev->spi);
+
+  switch (opmode)
+    {
+      case SX127X_OPMODE_SLEEP:
+      case SX127X_OPMODE_STANDBY:
+      case SX127X_OPMODE_FSRX:
+      case SX127X_OPMODE_FSTX:
+      case SX127X_OPMODE_TX:
+      case SX127X_OPMODE_RX:
+      case SX127X_OPMODE_RXSINGLE:
+      case SX127X_OPMODE_CAD:
+        {
+          /* Do nothing */
+
+          break;
+        }
+
+      default:
+        {
+          wlerr("ERROR: invalid LORA mode %d\n", opmode);
+          ret = -EINVAL;
+          goto errout;
+        }
+    }
+
+  /* Update mode */
+
+  sx127x_modregbyte(dev, SX127X_CMN_OPMODE,
+                    ((opmode - 1) << SX127X_CMN_OPMODE_MODE_SHIFT),
+                    SX127X_CMN_OPMODE_MODE_MASK);
+
+  sx127x_unlock(dev->spi);
+
+  /* Wait for mode ready. REVISIT: do we need this ? */
+
+  nxsig_usleep(250);
+
+errout:
+  return ret;
+}
+
+/****************************************************************************
+ * Name: sx127x_lora_syncword_get
+ ****************************************************************************/
+
+static void sx127x_lora_syncword_get(FAR struct sx127x_dev_s *dev,
+                                     FAR uint8_t *sw, FAR uint8_t *len)
+{
+  DEBUGASSERT(dev->modulation == SX127X_MODULATION_FSK ||
+              dev->modulation == SX127X_MODULATION_OOK);
+
+  wlerr("sx127x_lora_syncword_get not implemented yet\n");
+}
+
+/****************************************************************************
+ * Name: sx127x_lora_syncword_set
+ *
+ * Description:
+ *   Set SyncWord for LORA
+ *
+ ****************************************************************************/
+
+static int sx127x_lora_syncword_set(FAR struct sx127x_dev_s *dev,
+                                    FAR uint8_t *sw, uint8_t len)
+{
+  DEBUGASSERT(dev->modulation == SX127X_MODULATION_LORA);
+
+  int ret = OK;
+
+  if (len != 1)
+    {
+      wlerr("LORA support sync word with len = 1 but len = %d\n", len);
+      ret = -EINVAL;
+      goto errout;
+    }
+
+  /* Lock SPI */
+
+  sx127x_lock(dev->spi);
+
+  /* Write sync word */
+
+  sx127x_writeregbyte(dev, SX127X_LRM_SYNCWORD, sw[0]);
+
+  /* Unlock SPI */
+
+  sx127x_unlock(dev->spi);
+
+  errout:
+  return ret;
+}
+
+/****************************************************************************
+ * Name: sx127x_lora_bw_set
+ *
+ * Description:
+ *   Configure LORA bandwidth
+ *
+ ****************************************************************************/
+
+static int sx127x_lora_bw_set(FAR struct sx127x_dev_s *dev, uint8_t bw)
+{
+  DEBUGASSERT(dev->modulation == SX127X_MODULATION_LORA);
+
+  uint8_t clrbits = 0;
+  uint8_t setbits = 0;
+  int     ret     = OK;
+
+  if (bw == dev->lora.bw)
+    {
+      goto errout;
+    }
+
+  switch (bw)
+    {
+      case LORA_BANDWIDTH_7P8KHZ:
+      case LORA_BANDWIDTH_10P4KHZ:
+      case LORA_BANDWIDTH_15P6KHZ:
+      case LORA_BANDWIDTH_20P8KHZ:
+      case LORA_BANDWIDTH_31P2KHZ:
+      case LORA_BANDWIDTH_41P4KHZ:
+      case LORA_BANDWIDTH_62P5KHZ:
+      case LORA_BANDWIDTH_125KHZ:
+      case LORA_BANDWIDTH_250KHZ:
+        {
+          /* Lock SPI */
+
+          sx127x_lock(dev->spi);
+
+          setbits = bw << SX127X_LRM_MDMCFG1_BW_SHIFT;
+          clrbits = SX127X_LRM_MDMCFG1_BW_MASK;
+          sx127x_modregbyte(dev, SX127X_LRM_MDMCFG1, setbits, clrbits);
+
+          /* Unlock SPI */
+
+          sx127x_unlock(dev->spi);
+
+          break;
+        }
+
+      default:
+        {
+          ret = -EINVAL;
+          wlerr("Unsupported bandwidth %d\n", bw);
+          goto errout;
+        }
+    }
+
+  dev->lora.bw = bw;
+
+errout:
+  return ret;
+}
+
+/****************************************************************************
+ * Name: sx127x_lora_cr_set
+ *
+ * Description:
+ *   Configure LORA coding rate
+ *
+ ****************************************************************************/
+
+static int sx127x_lora_cr_set(FAR struct sx127x_dev_s *dev, uint8_t cr)
+{
+  DEBUGASSERT(dev->modulation == SX127X_MODULATION_LORA);
+
+  uint8_t clrbits = 0;
+  uint8_t setbits = 0;
+  int     ret     = OK;
+
+  if (cr == dev->lora.cr)
+    {
+      goto errout;
+    }
+
+  switch (cr)
+    {
+      case LORA_CR_4d5:
+      case LORA_CR_4d6:
+      case LORA_CR_4d7:
+      case LORA_CR_4d8:
+        {
+          /* Lock SPI */
+
+          sx127x_lock(dev->spi);
+
+          setbits = cr << SX127X_LRM_MDMCFG1_CDRATE_SHIFT;
+          clrbits = SX127X_LRM_MDMCFG1_CDRATE_MASK;
+          sx127x_modregbyte(dev, SX127X_LRM_MDMCFG1, setbits, clrbits);
+
+          /* Unlock SPI */
+
+          sx127x_unlock(dev->spi);
+
+          break;
+        }
+
+      default:
+        {
+          ret = -EINVAL;
+          wlerr("Unsupported code rate %d\n", cr);
+          goto errout;
+        }
+    }
+
+  dev->lora.cr = cr;
+
+errout:
+  return ret;
+}
+
+/****************************************************************************
+ * Name: sx127x_lora_sf_set
+ *
+ * Description:
+ *   Configure LORA SF
+ *
+ ****************************************************************************/
+
+static int sx127x_lora_sf_set(FAR struct sx127x_dev_s *dev, uint8_t sf)
+{
+  DEBUGASSERT(dev->modulation == SX127X_MODULATION_LORA);
+
+  uint8_t dopt    = SX127X_LRM_DETECTOPT_DO_SF7SF12;
+  uint8_t dthr    = SX127X_LRM_DETECTTHR_SF7SF12;
+  uint8_t setbits = 0;
+  uint8_t clrbits = 0;
+  int     ret     = OK;
+
+  if (dev->lora.sf == sf)
+    {
+      goto errout;
+    }
+
+  /* Special configuration required by SF6 (highest data rate transmission):
+   *   - implicit header mode ON
+   *   - Detection optimize for SF6
+   *   - Detection threshold for SF6
+   */
+
+  if (dev->lora.sf == 6)
+    {
+      if (dev->lora.implicthdr == true)
+        {
+          wlerr("SF6 needs implicit header ON!\n");
+          ret = -EINVAL;
+          goto errout;
+        }
+
+      dopt = SX127X_LRM_DETECTOPT_DO_SF6;
+      dthr = SX127X_LRM_DETECTTHR_SF6;
+    }
+
+  /* Lock SPI */
+
+  sx127x_lock(dev->spi);
+
+  /* Write spreading factor */
+
+  clrbits = SX127X_LRM_MDMCFG2_SPRFACT_MASK;
+  setbits = (sf << SX127X_LRM_MDMCFG2_SPRFACT_SHIFT);
+  sx127x_modregbyte(dev, SX127X_LRM_MDMCFG2, setbits, clrbits);
+
+  sx127x_writeregbyte(dev, SX127X_LRM_DETECTOPT, dopt);
+  sx127x_writeregbyte(dev, SX127X_LRM_DETECTTHR, dthr);
+
+  /* Unlock SPI */
+
+  sx127x_unlock(dev->spi);
+
+  /* Update local variable */
+
+  dev->lora.sf = sf;
+
+errout:
+  return ret;
+}
+
+/****************************************************************************
+ * Name: sx127x_lora_implicthdr_set
+ *
+ * Description:
+ *  Enable/disable implicit header for LORA
+ *
+ ****************************************************************************/
+
+static int sx127x_lora_implicthdr_set(FAR struct sx127x_dev_s *dev,
+                                      bool enable)
+{
+  DEBUGASSERT(dev->modulation == SX127X_MODULATION_LORA);
+
+  uint8_t setbits = 0;
+  uint8_t clrbits = 0;
+  int     ret     = OK;
+
+  if (dev->lora.sf == 6 && enable == false)
+    {
+      wlerr("SF=6 requires implicit header ON\n");
+      ret = -EINVAL;
+      goto errout;
+    }
+
+  if (enable == dev->lora.implicthdr)
+    {
+      goto errout;
+    }
+
+  /* Lock SPI */
+
+  sx127x_lock(dev->spi);
+
+  /* Modify MDMCFG1 register */
+
+  clrbits = 0;
+  setbits = SX127X_LRM_MDMCFG1_IMPLHDRON;
+
+  sx127x_modregbyte(dev, SX127X_LRM_MDMCFG1, setbits, clrbits);
+
+  /* Unlock SPI */
+
+  sx127x_unlock(dev->spi);
+
+  /* Update local variable */
+
+  dev->lora.implicthdr = enable;
+
+errout:
+  return ret;
+}
+
+/****************************************************************************
+ * Name: sx127x_lora_init
+ *
+ * Description:
+ *   Initialization specific for LORA modulation
+ *
+ ****************************************************************************/
+
+static void sx127x_lora_init(FAR struct sx127x_dev_s *dev)
+{
+  DEBUGASSERT(dev->modulation == SX127X_MODULATION_LORA);
+
+  uint8_t setbits = 0;
+  uint8_t clrbits = 0;
+
+  /* Configure sync word for LORA modulation */
+
+  setbits = SX127X_LRM_SYNCWORD_DEFAULT;
+  sx127x_lora_syncword_set(dev, &setbits, 1);
+
+  /* Configure bandwidth */
+
+  sx127x_lora_bw_set(dev, SX127X_LRM_BW_DEFAULT);
+
+  /* Configure coding rate */
+
+  sx127x_lora_cr_set(dev, SX127X_LRM_CR_DEFAULT);
+
+  /* TODO: Configure frequency hopping */
+
+  /* sx127x_lora_fhop_set(dev,) */
+
+  /* Configure spreading factor */
+
+  sx127x_lora_sf_set(dev, SX127X_LRM_SF_DEFAULT);
+
+  /* Configure LORA header */
+
+  sx127x_lora_implicthdr_set(dev, CONFIG_LPWAN_SX127X_LORA_IMPHEADER);
+
+  /* Lock SPI */
+
+  sx127x_lock(dev->spi);
+
+  /* Configure maximum payload */
+
+  sx127x_writeregbyte(dev, SX127X_LRM_PAYLOADMAX,
+                      SX127X_LRM_PAYLOADMAX_DEFAULT);
+
+  /* Modem PHY config 2:
+   *   - RXCRCON
+   *     NOTE: this works differently for implicit header and explicit header
+   *   - packet mode
+   */
+
+  setbits = (dev->crcon == true ? SX127X_LRM_MDMCFG2_RXCRCON : 0);
+  clrbits = (SX127X_LRM_MDMCFG2_TXCONT | SX127X_LRM_MDMCFG2_RXCRCON);
+  sx127x_modregbyte(dev, SX127X_LRM_MDMCFG2, setbits, clrbits);
+
+  /* Invert I and Q signals if configured */
+
+  setbits = (dev->lora.invert_iq == true ? SX127X_LRM_INVERTIQ_IIQ : 0);
+  clrbits = SX127X_LRM_INVERTIQ_IIQ;
+  sx127x_modregbyte(dev, SX127X_LRM_INVERTIQ, setbits, clrbits);
+
+  /* Unlock SPI */
+
+  sx127x_unlock(dev->spi);
+}
+
+/****************************************************************************
+ * Name: sx127x_lora_rssi_correct
+ *
+ * Description:
+ *   Correct RSSI for LORA radio according to datasheet
+ *
+ ****************************************************************************/
+
+static int16_t sx127x_lora_rssi_correct(FAR struct sx127x_dev_s *dev,
+                                        uint32_t freq, int8_t snr,
+                                        uint8_t regval)
+{
+  int16_t offset = 0;
+  int16_t ret    = 0;
+
+  /* Ignore SNR if >= 0 */
+
+  if (snr >= 0)
+    {
+      snr = 0;
+    }
+
+  /* RSSI offset depends on RF frequency */
+
+  offset = (freq > SX127X_HFBAND_THR ?
+            SX127X_LRM_RSSIVAL_HF_OFFSET : SX127X_LRM_RSSIVAL_LF_OFFSET);
+
+  /* Get corrected RSSI value */
+
+  ret = regval + offset + snr;
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: sx127x_lora_snr_get
+ *
+ * Description:
+ *   Get estimation of SNR on last packet received for LORA modem
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_LPWAN_SX127X_RXSUPPORT
+static int8_t sx127x_lora_snr_get(FAR struct sx127x_dev_s *dev)
+{
+  uint8_t regval = 0;
+
+  /* Lock SPI */
+
+  sx127x_lock(dev->spi);
+
+  /* Get register value */
+
+  regval = sx127x_readregbyte(dev, SX127X_LRM_PKTSNR);
+
+  /* Get SNR */
+
+  regval = regval / 4;
+
+  /* Unlock SPI */
+
+  sx127x_unlock(dev->spi);
+
+  /* Return corrected RSSI */
+
+  return (int8_t)regval;
+}
+
+/****************************************************************************
+ * Name: sx127x_lora_pckrssi_get
+ *
+ * Description:
+ *   Get RSSI of the last received LORA packet
+ *
+ ****************************************************************************/
+
+static int16_t sx127x_lora_pckrssi_get(FAR struct sx127x_dev_s *dev,
+                                       int8_t snr)
+{
+  uint8_t regval = 0;
+
+  /* Lock SPI */
+
+  sx127x_lock(dev->spi);
+
+  /* Get register value */
+
+  regval = sx127x_readregbyte(dev, SX127X_LRM_PKTRSSI);
+
+  /* Unlock SPI */
+
+  sx127x_unlock(dev->spi);
+
+  /* Return corrected RSSI */
+
+  return sx127x_lora_rssi_correct(dev, dev->freq, snr, regval);
+}
+#endif
+
+/****************************************************************************
+ * Name: sx127x_lora_rssi_get
+ *
+ * Description:
+ *   Get current RSSI for LORA modem
+ *
+ ****************************************************************************/
+
+static int16_t sx127x_lora_rssi_get(FAR struct sx127x_dev_s *dev)
+{
+  uint8_t regval = 0;
+
+  /* Lock SPI */
+
+  sx127x_lock(dev->spi);
+
+  /* Get register value */
+
+  regval = sx127x_readregbyte(dev, SX127X_LRM_RSSIVAL);
+
+  /* Unlock SPI */
+
+  sx127x_unlock(dev->spi);
+
+  /* Return corrected RSSI */
+
+  return sx127x_lora_rssi_correct(dev, dev->freq, 0, regval);
+}
+
+/****************************************************************************
+ * Name: sx127x_lora_preamble_set
+ *
+ * Description:
+ *   Set preamble for LORA modulation
+ *
+ ****************************************************************************/
+
+static void sx127x_lora_preamble_set(FAR struct sx127x_dev_s *dev,
+                                     uint32_t len)
+{
+  uint8_t regval = 0;
+
+  /* Lock SPI */
+
+  sx127x_lock(dev->spi);
+
+  /* Configure preamble len */
+
+  regval = SX127X_LRM_PRE_MSB(len);
+  sx127x_writeregbyte(dev, SX127X_LRM_PREMSB, regval);
+  regval = SX127X_LRM_PRE_LSB(len);
+  sx127x_writeregbyte(dev, SX127X_LRM_PRELSB, regval);
+
+  /* Unlock SPI */
+
+  sx127x_unlock(dev->spi);
+}
+
+/****************************************************************************
+ * Name: sx127x_lora_preamble_get
+ *
+ * Description:
+ *
+ ****************************************************************************/
+
+static int sx127x_lora_preamble_get(FAR struct sx127x_dev_s *dev)
+{
+  wlerr("sx127x_lora_preamble_get\n");
+  return 0;
+}
+
+#endif /* CONFIG_LPWAN_SX127X_LORA */
+
+/****************************************************************************
+ * Name: sx127x_syncword_get
+ ****************************************************************************/
+
+static void sx127x_syncword_get(FAR struct sx127x_dev_s *dev,
+                                FAR uint8_t *sw, FAR uint8_t *len)
+{
+  dev->ops.syncword_get(dev, sw, len);
+}
+
+/****************************************************************************
+ * Name: sx127x_syncword_set
+ ****************************************************************************/
+
+static int sx127x_syncword_set(FAR struct sx127x_dev_s *dev,
+                               FAR uint8_t *sw, uint8_t len)
+{
+  return dev->ops.syncword_set(dev, sw, len);
+}
+
+/****************************************************************************
+ * Name: sx127x_modulation_get
+ *
+ * Description:
+ *   Get current radio modulation
+ *
+ ****************************************************************************/
+
+static uint8_t sx127x_modulation_get(FAR struct sx127x_dev_s *dev)
+{
+  uint8_t regval = 0;
+  uint8_t ret    = 0;
+
+  /* Get OPMODE register */
+
+  regval = sx127x_readregbyte(dev, SX127X_CMN_OPMODE);
+
+  if (regval & SX127X_CMN_OPMODE_LRMODE)
+    {
+      /* LORA modulation */
+
+      ret = SX127X_MODULATION_LORA;
+    }
+  else
+    {
+      /* FSK or OOK modulation */
+
+      ret = (regval & SX127X_CMN_OPMODE_MODTYPE_FSK ?
+             SX127X_MODULATION_FSK : SX127X_MODULATION_OOK);
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: sx127x_ops_set
+ ****************************************************************************/
+
+static void sx127x_ops_set(FAR struct sx127x_dev_s *dev, uint8_t modulation)
+{
+  if (modulation <= SX127X_MODULATION_OOK)
+    {
+      /* NOTE: we need opmode_init and opmode_set for FSK/OOK even if
+       * support for these modulations is disabled!
+       */
+
+      dev->ops.opmode_init  = sx127x_fskook_opmode_init;
+      dev->ops.opmode_set   = sx127x_fskook_opmode_set;
+#ifdef CONFIG_LPWAN_SX127X_FSKOOK
+      dev->ops.init         = sx127x_fskook_init;
+      dev->ops.isr0_process = sx127x_fskook_isr0_process;
+      dev->ops.preamble_set = sx127x_fskook_preamble_set;
+      dev->ops.preamble_get = sx127x_fskook_preamble_get;
+      dev->ops.rssi_get     = sx127x_fskook_rssi_get;
+      dev->ops.syncword_set = sx127x_fskook_syncword_set;
+      dev->ops.syncword_get = sx127x_fskook_syncword_get;
+#ifdef CONFIG_LPWAN_SX127X_TXSUPPORT
+      dev->ops.send         = sx127x_fskook_send;
+#endif
+#ifdef CONFIG_DEBUG_WIRELESS_INFO
+      dev->ops.dumpregs     = sx127x_fskook_dumpregs;
+#endif
+#endif /* CONFIG_LPWAN_SX127X_FSKOOK */
+    }
+
+#ifdef CONFIG_LPWAN_SX127X_LORA
+  if (modulation == SX127X_MODULATION_LORA)
+    {
+      dev->ops.init         = sx127x_lora_init;
+      dev->ops.isr0_process = sx127x_lora_isr0_process;
+      dev->ops.opmode_init  = sx127x_lora_opmode_init;
+      dev->ops.opmode_set   = sx127x_lora_opmode_set;
+      dev->ops.preamble_set = sx127x_lora_preamble_set;
+      dev->ops.preamble_get = sx127x_lora_preamble_get;
+      dev->ops.rssi_get     = sx127x_lora_rssi_get;
+      dev->ops.syncword_set = sx127x_lora_syncword_set;
+      dev->ops.syncword_get = sx127x_lora_syncword_get;
+#ifdef CONFIG_LPWAN_SX127X_TXSUPPORT
+      dev->ops.send         = sx127x_lora_send;
+#endif
+#ifdef CONFIG_DEBUG_WIRELESS_INFO
+      dev->ops.dumpregs     = sx127x_lora_dumpregs;
+#endif
+    }
+#endif /* CONFIG_LPWAN_SX127X_LORA */
+}
+
+/****************************************************************************
+ * Name: sx127x_modulation_init
+ ****************************************************************************/
+
+static void sx127x_modulation_init(FAR struct sx127x_dev_s *dev)
+{
+  dev->ops.init(dev);
+
+  /* Configure preamble */
+
+  sx127x_preamble_set(dev, CONFIG_LPWAN_SX127X_PREAMBLE_DEFAULT);
+
+  /* Dump registers after initial configuration */
+
+  sx127x_dumpregs(dev);
+}
+
+/****************************************************************************
+ * Name: sx127x_modulation_set
+ *
+ * Description:
+ *   Set radio modulation and configure
+ *
+ ****************************************************************************/
+
+static int sx127x_modulation_set(FAR struct sx127x_dev_s *dev,
+                                 uint8_t modulation)
+{
+  uint8_t setbits = 0;
+  uint8_t clrbits = 0;
+  int     ret     = OK;
+
+  wlinfo("modulation_set %d->%d\n", dev->modulation, modulation);
+
+  if (modulation == dev->modulation)
+    {
+      goto errout;
+    }
+
+  /* Modulation can be only changed in SLEEP mode */
+
+  sx127x_opmode_set(dev, SX127X_OPMODE_SLEEP);
+
+  /* Change modulation */
+
+  switch (modulation)
+    {
+#ifdef CONFIG_LPWAN_SX127X_FSKOOK
+      case SX127X_MODULATION_FSK:
+        {
+          clrbits = (SX127X_CMN_OPMODE_LRMODE |
+                     SX127X_CMN_OPMODE_MODTYPE_MASK);
+          setbits = SX127X_CMN_OPMODE_MODTYPE_FSK;
+
+          break;
+        }
+
+      case SX127X_MODULATION_OOK:
+        {
+          clrbits = (SX127X_CMN_OPMODE_LRMODE |
+                     SX127X_CMN_OPMODE_MODTYPE_MASK);
+          setbits = SX127X_CMN_OPMODE_MODTYPE_OOK;
+
+          break;
+        }
+#endif /* CONFIG_LPWAN_SX127X_FSKOOK */
+
+#ifdef CONFIG_LPWAN_SX127X_LORA
+      case SX127X_MODULATION_LORA:
+        {
+          clrbits = SX127X_CMN_OPMODE_MODTYPE_MASK;
+          setbits = SX127X_CMN_OPMODE_LRMODE;
+
+          break;
+        }
+#endif /* CONFIG_LPWAN_SX127X_LORA */
+
+      default:
+        {
+          wlerr("ERROR: Unsupported modulation type %d\n", modulation);
+          ret = -EINVAL;
+          goto errout;
+        }
+    }
+
+  /* Lock SPI */
+
+  sx127x_lock(dev->spi);
+
+  /* Modify register */
+
+  sx127x_modregbyte(dev, SX127X_CMN_OPMODE, setbits, clrbits);
+
+  /* Unlock SPI */
+
+  sx127x_unlock(dev->spi);
+
+  /* Initialization specific for modulation and initialize private ops */
+
+  sx127x_ops_set(dev, modulation);
+
+  /* Update local variable */
+
+  dev->modulation = modulation;
+
+  /* Initial configuration */
+
+  sx127x_modulation_init(dev);
+
+errout:
+  return ret;
+}
+
+/****************************************************************************
+ * Name: sx127x_fskook_rssi_get
+ ****************************************************************************/
+
+static int16_t sx127x_rssi_get(FAR struct sx127x_dev_s *dev)
+{
+  return dev->ops.rssi_get(dev);
+}
+
+/****************************************************************************
+ * Name: sx127x_channel_scan
+ *
+ * Description:
+ *
+ ****************************************************************************/
+
+static bool sx127x_channel_scan(FAR struct sx127x_dev_s *dev,
+                                FAR struct sx127x_chanscan_ioc_s *chanscan)
+{
+  struct timespec tstart;
+  struct timespec tnow;
+  bool    ret  = true;
+  int16_t rssi = 0;
+  int16_t max = 0;
+  int16_t min = 0;
+
+  /* Set frequency */
+
+  sx127x_frequency_set(dev, chanscan->freq);
+
+  /* Set mode to RX */
+
+  sx127x_opmode_set(dev, SX127X_OPMODE_RX);
+
+  /* Get start time */
+
+  clock_gettime(CLOCK_REALTIME, &tstart);
+
+  /* Initialize min/max */
+
+  max = INT16_MIN;
+  min = INT16_MAX;
+
+  do
+    {
+      /* Get time now */
+
+      clock_gettime(CLOCK_REALTIME, &tnow);
+
+      /* Check RSSI */
+
+      rssi = dev->ops.rssi_get(dev);
+
+      /* Store maximum/minimum value */
+
+      if (rssi > max)
+        {
+          max = rssi;
+        }
+      else if (rssi < min)
+        {
+          min = rssi;
+        }
+
+      if (rssi > chanscan->rssi_thr)
+        {
+          ret = false;
+          break;
+        }
+
+      /* Wait some time */
+
+      nxsig_usleep(1000);
+    }
+  while (tstart.tv_sec + chanscan->stime > tnow.tv_sec);
+
+  /* Set mode to STANDBY */
+
+  sx127x_opmode_set(dev, SX127X_OPMODE_STANDBY);
+
+  /* Store limit values */
+
+  chanscan->rssi_max = max;
+  chanscan->rssi_min = min;
+
+  /* Store return value in struct */
+
+  chanscan->free = ret;
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: sx127x_random_get
+ *
+ * Description:
+ *
+ ****************************************************************************/
+
+static uint32_t sx127x_random_get(FAR struct sx127x_dev_s *dev)
+{
+  wlerr("sx127x_random_get not implemented yet\n");
+  return 0;
+}
+
+/****************************************************************************
+ * Name: sx127x_frequency_get
+ *
+ * Description:
+ *   Get RF carrier frequency
+ *
+ ****************************************************************************/
+
+static uint32_t sx127x_frequency_get(FAR struct sx127x_dev_s *dev)
+{
+  wlerr("sx127x_frequency_get\n");
+  return 0;
+}
+
+/****************************************************************************
+ * Name: sx127x_frequency_set
+ *
+ * Description:
+ *   Set RF carrier frequency for LORA and FSK/OOK modulation
+ *
+ ****************************************************************************/
+
+static int sx127x_frequency_set(FAR struct sx127x_dev_s *dev, uint32_t freq)
+{
+  uint32_t frf = 0;
+  int      ret = OK;
+
+  wlinfo("frequency %" PRId32 "->%" PRId32 "\n", dev->freq, freq);
+
+  if (freq == dev->freq)
+    {
+      goto errout;
+    }
+
+  /* REVISIT: needs sleep/standby mode ? */
+
+  /* Lock SPI */
+
+  sx127x_lock(dev->spi);
+
+  /* Get FRF value */
+
+  frf = SX127X_FRF_FROM_FREQ(freq);
+
+  /* Write FRF MSB */
+
+  sx127x_writeregbyte(dev, SX127X_CMN_FRFMSB, SX127X_CMN_FRF_MSB(frf));
+
+  /* Write FRF MID */
+
+  sx127x_writeregbyte(dev, SX127X_CMN_FRFMID, SX127X_CMN_FRF_MID(frf));
+
+  /* Write FRF LSB */
+
+  sx127x_writeregbyte(dev, SX127X_CMN_FRFLSB, SX127X_CMN_FRF_LSB(frf));
+
+  /* Unlock SPI */
+
+  sx127x_unlock(dev->spi);
+
+  /* Update local variable */
+
+  dev->freq = freq;
+
+  /* Call board-specific LF/HF configuration */
+
+  ret = dev->lower->freq_select(freq);
+  if (ret < 0)
+    {
+      wlerr("Board-specific freq_select failed %d!\n", ret);
+      goto errout;
+    }
+
+errout:
+  return ret;
+}
+
+/****************************************************************************
+ * Name: sx127x_power_set
+ ****************************************************************************/
+
+static int sx127x_power_set(FAR struct sx127x_dev_s *dev, int8_t power)
+{
+#ifndef CONFIG_LPWAN_SX127X_TXSUPPORT
+  return -ENOSYS;
+#else
+  bool pa_select  = false;
+  bool pa_dac     = false;
+  uint8_t setbits = 0;
+  uint8_t clrbits = 0;
+  int ret         = OK;
+
+  if (dev->power == power)
+    {
+      goto errout;
+    }
+
+  /* PA BOOST configuration */
+
+  if (power > SX127X_PASELECT_POWER || dev->pa_force == true)
+    {
+      pa_select = true;
+    }
+
+  /* High power PA BOOST */
+
+  if (power >= 20)
+    {
+      pa_dac = true;
+    }
+
+  /* Saturate power output */
+
+  if (pa_select == true)
+    {
+      if (pa_dac == true)
+        {
+          if (power < 5)
+            {
+              power = 5;
+            }
+          else if (power > 20)
+            {
+              power = 20;
+            }
+        }
+      else
+        {
+          if (power < 2)
+            {
+              power = 2;
+            }
+          else if (power > 17)
+            {
+              power = 17;
+            }
+        }
+    }
+  else
+    {
+      if (power < -1)
+        {
+          power = -1;
+        }
+      else if (power > 14)
+        {
+          power = 14;
+        }
+    }
+
+  wlinfo("power %d->%d, pa=%d, dac=%d\n",
+         dev->power, power, pa_select, pa_dac);
+
+  sx127x_lock(dev->spi);
+
+  if (pa_select == true)
+    {
+      if (pa_dac == true)
+        {
+          /* Enable high power on PA_BOOST */
+
+          sx127x_writeregbyte(dev, SX127X_CMN_PADAC, SX127X_CMN_PADAC_BOOST);
+
+          /* Configure output power */
+
+          setbits = (power - 5) << SX127X_CMN_PACFG_OUTPOWER_SHIFT;
+          clrbits = SX127X_CMN_PACFG_OUTPOWER_MASK;
+
+          sx127x_modregbyte(dev, SX127X_CMN_PACFG, setbits, clrbits);
+        }
+      else
+        {
+          /* Disable high power on PA_BOOST */
+
+          sx127x_writeregbyte(dev, SX127X_CMN_PADAC,
+                              SX127X_CMN_PADAC_DEFAULT);
+
+          /* Configure output power */
+
+          setbits = (power - 2) << SX127X_CMN_PACFG_OUTPOWER_SHIFT;
+          clrbits = SX127X_CMN_PACFG_OUTPOWER_MASK;
+
+          sx127x_modregbyte(dev, SX127X_CMN_PACFG, setbits, clrbits);
+        }
+
+      /* Enable PA BOOST output */
+
+      sx127x_modregbyte(dev, SX127X_CMN_PACFG, SX127X_CMN_PACFG_PASELECT, 0);
+    }
+  else
+    {
+      /* Configure output power and max power to 13.8 dBm */
+
+      setbits = ((power + 1) << SX127X_CMN_PACFG_OUTPOWER_SHIFT);
+      setbits |= (5 << SX127X_CMN_PACFG_MAXPOWER_SHIFT);
+      clrbits = (SX127X_CMN_PACFG_OUTPOWER_MASK |
+                 SX127X_CMN_PACFG_MAXPOWER_SHIFT);
+
+      sx127x_modregbyte(dev, SX127X_CMN_PACFG, setbits, clrbits);
+
+      /* Enable RFO output */
+
+      sx127x_modregbyte(dev, SX127X_CMN_PACFG, 0, SX127X_CMN_PACFG_PASELECT);
+    }
+
+  sx127x_unlock(dev->spi);
+
+  /* Call board-specific logic */
+
+  ret = dev->lower->pa_select(pa_select);
+  if (ret < 0)
+    {
+      wlerr("Board-specific pa_select failed %d!\n", ret);
+    }
+
+  /* Update local variable */
+
+  dev->power = power;
+
+errout:
+  return ret;
+#endif
+}
+
+/****************************************************************************
+ * Name: sx127x_power_get
+ ****************************************************************************/
+
+static int8_t sx127x_power_get(FAR struct sx127x_dev_s *dev)
+{
+#ifndef CONFIG_LPWAN_SX127X_TXSUPPORT
+  return 0;
+#else
+  return dev->power;
+#endif
+}
+
+/****************************************************************************
+ * Name: sx127x_preamble_set
+ ****************************************************************************/
+
+static void sx127x_preamble_set(FAR struct sx127x_dev_s *dev, uint32_t len)
+{
+  dev->ops.preamble_set(dev, len);
+}
+
+/****************************************************************************
+ * Name: sx127x_preamble_get
+ ****************************************************************************/
+
+static int sx127x_preamble_get(FAR struct sx127x_dev_s *dev)
+{
+  return dev->ops.preamble_get(dev);
+}
+
+/****************************************************************************
+ * Name: sx127x_version_get
+ *
+ * Description:
+ *   Get chip version
+ *
+ ****************************************************************************/
+
+static uint8_t sx127x_version_get(FAR struct sx127x_dev_s *dev)
+{
+  uint8_t regval = 0;
+
+  /* Lock SPI */
+
+  sx127x_lock(dev->spi);
+
+  /* Get version */
+
+  regval = sx127x_readregbyte(dev, SX127X_CMN_VERSION);
+
+  /* Unlock SPI */
+
+  sx127x_unlock(dev->spi);
+
+  return regval;
+}
+
+/****************************************************************************
+ * Name: sx127x_calibration
+ *
+ * Description:
+ *   Calibrate radio for given frequency
+ *
+ ****************************************************************************/
+
+static int sx127x_calibration(FAR struct sx127x_dev_s *dev, uint32_t freq)
+{
+  uint8_t regval = 0;
+  int     ret    = OK;
+
+  /* NOTE: The automatic calibration at POR and Reset is only valid at
+   * 434 MHz.
+   */
+
+  wlinfo("SX127X calibration for %" PRId32 "\n", freq);
+
+  /* Calibration is supported only in FSK/OOK mode */
+
+  ret = sx127x_modulation_set(dev, SX127X_MODULATION_FSK);
+  if (ret < 0)
+    {
+      wlerr("ERROR: can't change modulation to FSK \n");
+      goto errout;
+    }
+
+  /* We need standby mode ? */
+
+  ret = sx127x_opmode_set(dev, SX127X_OPMODE_STANDBY);
+
+  /* Set calibration frequency */
+
+  sx127x_frequency_set(dev, freq);
+
+  /* Lock SPI */
+
+  sx127x_lock(dev->spi);
+
+  /* Start calibration */
+
+  sx127x_modregbyte(dev, SX127X_FOM_IMAGECAL,
+                    SX127X_FOM_IMAGECAL_IMGCALSTART, 0);
+
+  /* Wait for calibration done */
+
+  do
+    {
+      /* Wait 10ms */
+
+      nxsig_usleep(10000);
+
+      /* Get register */
+
+      regval = sx127x_readregbyte(dev, SX127X_FOM_IMAGECAL);
+    }
+  while (regval & SX127X_FOM_IMAGECAL_IMGCALRUN);
+
+  /* Unlock SPI */
+
+  sx127x_unlock(dev->spi);
+
+  wlinfo("Calibration done\n");
+
+errout:
+  return ret;
+}
+
+/****************************************************************************
+ * Name: sx127x_init
+ *
+ * Description:
+ *   Initialize SX127X chip
+ *
+ ****************************************************************************/
+
+static int sx127x_init(FAR struct sx127x_dev_s *dev)
+{
+  int     ret     = OK;
+  uint8_t regval  = 0;
+
+  wlinfo("Init sx127x dev\n");
+
+  /* Reset radio */
+
+  sx127x_reset(dev);
+
+  /* Get initial modem state */
+
+  regval = sx127x_readregbyte(dev, SX127X_CMN_OPMODE);
+
+  dev->opmode = (((regval >> SX127X_CMN_OPMODE_MODE_SHIFT) &
+                  SX127X_CMN_OPMODE_MODE_MASK) + 1);
+
+  /* After reset - FSK mode */
+
+  dev->modulation = SX127X_MODULATION_FSK;
+
+  /* Initialize modem ops */
+
+  sx127x_ops_set(dev, dev->modulation);
+
+  wlinfo("Init state: modulation=%d, opmode=%d\n",
+         dev->modulation, dev->opmode);
+
+#ifdef CONFIG_LPWAN_SX127X_FSKOOK
+  /* Initialize FSK/OOK modem only if support is enabled */
+
+  sx127x_modulation_init(dev);
+#endif
+
+  /* Get chip version */
+
+  regval = sx127x_version_get(dev);
+  if (regval == 0x00)
+    {
+      /* Probably sth wrong with communication */
+
+      wlerr("ERROR: failed to get chip version!\n");
+      ret = -ENODATA;
+      goto errout;
+    }
+
+  wlinfo("SX127X version = 0x%02x\n", regval);
+
+  /* Calibration */
+
+  ret = sx127x_calibration(dev, SX127X_FREQ_CALIBRATION);
+  if (ret < 0)
+    {
+      wlerr("ERROR: calibration failed \n");
+    }
+
+  /* Set default modulation */
+
+  sx127x_modulation_set(dev, CONFIG_LPWAN_SX127X_MODULATION_DEFAULT);
+
+  /* Enter SLEEP mode */
+
+  sx127x_opmode_set(dev, SX127X_OPMODE_SLEEP);
+
+  /* Set default channel frequency - common for FSK/OOK and LORA */
+
+  ret = sx127x_frequency_set(dev, CONFIG_LPWAN_SX127X_RFFREQ_DEFAULT);
+  if (ret < 0)
+    {
+      goto errout;
+    }
+
+  /* Configure RF output power - common for FSK/OOK and LORA */
+
+  ret = sx127x_power_set(dev, CONFIG_LPWAN_SX127X_TXPOWER_DEFAULT);
+  if (ret < 0)
+    {
+      goto errout;
+    }
+
+  wlinfo("Init sx127x dev - DONE\n");
+
+errout:
+  return ret;
+}
+
+/****************************************************************************
+ * Name: sx127x_deinit
+ *
+ * Description:
+ *   Deinitialize SX127X chip
+ *
+ ****************************************************************************/
+
+static int sx127x_deinit(FAR struct sx127x_dev_s *dev)
+{
+  wlinfo("Deinit sx127x dev\n");
+
+  /* Enter SLEEP mode */
+
+  sx127x_opmode_set(dev, SX127X_OPMODE_SLEEP);
+
+  /* Reset radio */
+
+  sx127x_reset(dev);
+
+  return OK;
+}
+
+#ifdef CONFIG_DEBUG_WIRELESS_INFO
+
+/****************************************************************************
+ * Name: sx127x_lora_dumpregs
+ *
+ * Description:
+ *   Dump registers for LORA modem
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_LPWAN_SX127X_LORA
+static void sx127x_lora_dumpregs(FAR struct sx127x_dev_s *dev)
+{
+  sx127x_lock(dev->spi);
+  wlinfo("LORA dump:\n");
+  wlinfo("FIFO:         %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_FIFO));
+  wlinfo("OPMODE:       %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_OPMODE));
+  wlinfo("FRFMSB:       %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_FRFMSB));
+  wlinfo("FRFMID:       %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_FRFMID));
+  wlinfo("FRFLSB:       %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_FRFLSB));
+  wlinfo("PACFG:        %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_PACFG));
+  wlinfo("PARAMP:       %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_PARAMP));
+  wlinfo("OCP:          %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_OCP));
+  wlinfo("LNA:          %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_LNA));
+  wlinfo("ADDRPTR:      %02x\n",
+         sx127x_readregbyte(dev, SX127X_LRM_ADDRPTR));
+  wlinfo("TXBASE:       %02x\n",
+         sx127x_readregbyte(dev, SX127X_LRM_TXBASE));
+  wlinfo("RXBASE:       %02x\n",
+         sx127x_readregbyte(dev, SX127X_LRM_RXBASE));
+  wlinfo("RXCURR:       %02x\n",
+         sx127x_readregbyte(dev, SX127X_LRM_RXCURR));
+  wlinfo("IRQMASK:      %02x\n",
+         sx127x_readregbyte(dev, SX127X_LRM_IRQMASK));
+  wlinfo("IRQ:          %02x\n",
+         sx127x_readregbyte(dev, SX127X_LRM_IRQ));
+  wlinfo("RXBYTES:      %02x\n",
+         sx127x_readregbyte(dev, SX127X_LRM_RXBYTES));
+  wlinfo("RXHDRMSB:     %02x\n",
+         sx127x_readregbyte(dev, SX127X_LRM_RXHDRMSB));
+  wlinfo("RXHDRLSB:     %02x\n",
+         sx127x_readregbyte(dev, SX127X_LRM_RXHDRLSB));
+  wlinfo("RXPKTMSB:     %02x\n",
+         sx127x_readregbyte(dev, SX127X_LRM_RXPKTMSB));
+  wlinfo("RXPKTLSB:     %02x\n",
+         sx127x_readregbyte(dev, SX127X_LRM_RXPKTLSB));
+  wlinfo("MODSTAT:      %02x\n",
+         sx127x_readregbyte(dev, SX127X_LRM_MODSTAT));
+  wlinfo("PKTSNR:       %02x\n",
+         sx127x_readregbyte(dev, SX127X_LRM_PKTSNR));
+  wlinfo("PKTRSSI:      %02x\n",
+         sx127x_readregbyte(dev, SX127X_LRM_PKTRSSI));
+  wlinfo("RSSI:         %02x\n",
+         sx127x_readregbyte(dev, SX127X_LRM_RSSIVAL));
+  wlinfo("HOPCHAN:      %02x\n",
+         sx127x_readregbyte(dev, SX127X_LRM_HOPCHAN));
+  wlinfo("MDMCFG1:      %02x\n",
+         sx127x_readregbyte(dev, SX127X_LRM_MDMCFG1));
+  wlinfo("MDMCFG2:      %02x\n",
+         sx127x_readregbyte(dev, SX127X_LRM_MDMCFG2));
+  wlinfo("RXTIMEOUTLSB: %02x\n",
+         sx127x_readregbyte(dev, SX127X_LRM_RXTIMEOUTLSB));
+  wlinfo("PREMSB:       %02x\n",
+         sx127x_readregbyte(dev, SX127X_LRM_PREMSB));
+  wlinfo("PRELSB:       %02x\n",
+         sx127x_readregbyte(dev, SX127X_LRM_PRELSB));
+  wlinfo("PAYLOADLEN:   %02x\n",
+         sx127x_readregbyte(dev, SX127X_LRM_PAYLOADLEN));
+  wlinfo("PAYLOADMAX:   %02x\n",
+         sx127x_readregbyte(dev, SX127X_LRM_PAYLOADMAX));
+  wlinfo("HOPPER:       %02x\n",
+         sx127x_readregbyte(dev, SX127X_LRM_HOPPER));
+  wlinfo("RXFIFOADDR:   %02x\n",
+         sx127x_readregbyte(dev, SX127X_LRM_RXFIFOADDR));
+  wlinfo("MODEMCFG3:    %02x\n",
+         sx127x_readregbyte(dev, SX127X_LRM_MODEMCFG3));
+  wlinfo("FEIMSB:       %02x\n",
+         sx127x_readregbyte(dev, SX127X_LRM_FEIMSB));
+  wlinfo("FEIMID:       %02x\n",
+         sx127x_readregbyte(dev, SX127X_LRM_FEIMID));
+  wlinfo("FEILSB:       %02x\n",
+         sx127x_readregbyte(dev, SX127X_LRM_FEILSB));
+  wlinfo("RSSIWIDEBAND: %02x\n",
+         sx127x_readregbyte(dev, SX127X_LRM_RSSIWIDEBAND));
+  wlinfo("DETECTOPT:    %02x\n",
+         sx127x_readregbyte(dev, SX127X_LRM_DETECTOPT));
+  wlinfo("INVERTIQ:     %02x\n",
+         sx127x_readregbyte(dev, SX127X_LRM_INVERTIQ));
+  wlinfo("DETECTTHR:    %02x\n",
+         sx127x_readregbyte(dev, SX127X_LRM_DETECTTHR));
+  wlinfo("SYNCWORD:     %02x\n",
+         sx127x_readregbyte(dev, SX127X_LRM_SYNCWORD));
+  wlinfo("DIOMAP1:      %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_DIOMAP1));
+  wlinfo("DIOMAP2:      %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_DIOMAP2));
+  wlinfo("VERSION:      %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_VERSION));
+  wlinfo("TCXO:         %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_TCXO));
+  wlinfo("PADAC:        %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_PADAC));
+  wlinfo("FTEMP:        %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_FTEMP));
+  wlinfo("AGCREF:       %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_AGCREF));
+  wlinfo("AGCTHR1:      %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_AGCTHR1));
+  wlinfo("AGCTHR2:      %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_AGCTHR2));
+  wlinfo("AGCTHR3:      %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_AGCTHR3));
+  wlinfo("PLL:          %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_PLL));
+  sx127x_unlock(dev->spi);
+}
+#endif /* CONFIG_LPWAN_SX127X_LORA */
+
+/****************************************************************************
+ * Name: sx127x_fskook_dumpregs
+ *
+ * Description:
+ *   Dump registers for FSK/OOK modem
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_LPWAN_SX127X_FSKOOK
+static void sx127x_fskook_dumpregs(FAR struct sx127x_dev_s *dev)
+{
+  sx127x_lock(dev->spi);
+  wlinfo("FSK/OOK dump:\n");
+  wlinfo("FIFO:         %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_FIFO));
+  wlinfo("OPMODE:       %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_OPMODE));
+  wlinfo("FRFMSB:       %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_FRFMSB));
+  wlinfo("FRFMID:       %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_FRFMID));
+  wlinfo("FRFLSB:       %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_FRFLSB));
+  wlinfo("PACFG:        %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_PACFG));
+  wlinfo("PARAMP:       %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_PARAMP));
+  wlinfo("OCP:          %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_OCP));
+  wlinfo("LNA:          %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_LNA));
+  wlinfo("BITRATEMSB:   %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_BITRATEMSB));
+  wlinfo("BITRATELSM:   %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_BITRATELSB));
+  wlinfo("FDEVMSB:      %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_FDEVMSB));
+  wlinfo("FDEVLSB:      %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_FDEVLSB));
+  wlinfo("RXCFG:        %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_RXCFG));
+  wlinfo("RSSICFG:      %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_RSSICFG));
+  wlinfo("RSSICOLL:     %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_RSSICOLL));
+  wlinfo("RSSITHR:      %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_RSSITHR));
+  wlinfo("RSSIVAL:      %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_RSSIVAL));
+  wlinfo("RXBW:         %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_RXBW));
+  wlinfo("AFCBW:        %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_AFCBW));
+  wlinfo("OOKPEAK:      %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_OOKPEAK));
+  wlinfo("OOKFIX:       %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_OOKFIX));
+  wlinfo("AFCFEI:       %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_AFCFEI));
+  wlinfo("AFCMSB:       %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_AFCMSB));
+  wlinfo("AFCLSB:       %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_AFCLSB));
+  wlinfo("FEIMSB:       %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_FEIMSB));
+  wlinfo("FEILSB:       %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_FEILSB));
+  wlinfo("PREDET:       %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_PREDET));
+  wlinfo("RXTIMEOUT1:   %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_RXTIMEOUT1));
+  wlinfo("RXTIMEOUT2:   %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_RXTIMEOUT1));
+  wlinfo("RXTIMEOUT3:   %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_RXTIMEOUT1));
+  wlinfo("RXDELAY:      %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_RXDELAY));
+  wlinfo("OSC:          %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_OSC));
+  wlinfo("PREMSB:       %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_PREMSB));
+  wlinfo("PRELSB:       %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_PRELSB));
+  wlinfo("SYNCCFG:      %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_SYNCCFG));
+  wlinfo("SYNCVAL1:     %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_SYNCVAL1));
+  wlinfo("SYNCVAL2:     %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_SYNCVAL2));
+  wlinfo("SYNCVAL3:     %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_SYNCVAL3));
+  wlinfo("SYNCVAL4:     %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_SYNCVAL4));
+  wlinfo("SYNCVAL5:     %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_SYNCVAL5));
+  wlinfo("PKTCFG1:      %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_PKTCFG1));
+  wlinfo("PKTCFG2:      %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_PKTCFG2));
+  wlinfo("PAYLOADLEN:   %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_PAYLOADLEN));
+  wlinfo("NODEADDR:     %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_NODEADDR));
+  wlinfo("BROADCAST:    %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_BROADCAST));
+  wlinfo("FIFOTHR:      %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_FIFOTHR));
+  wlinfo("SEQCFG1:      %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_SEQCFG1));
+  wlinfo("SEQCFG2:      %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_SEQCFG2));
+  wlinfo("TIMRES:       %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_TIMRES));
+  wlinfo("TIMER1COEF:   %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_TIMER1COEF));
+  wlinfo("TIMER2COEF:   %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_TIMER2COEF));
+  wlinfo("IMAGECAL:     %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_IMAGECAL));
+  wlinfo("TEMP:         %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_TEMP));
+  wlinfo("LOWBAT:       %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_LOWBAT));
+  wlinfo("IRQ1:         %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_IRQ1));
+  wlinfo("IRQ2:         %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_IRQ2));
+  wlinfo("PLLHOP:       %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_PLLHOP));
+  wlinfo("BITRATEFRAC:  %02x\n",
+         sx127x_readregbyte(dev, SX127X_FOM_BITRATEFRAC));
+  wlinfo("DIOMAP1:      %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_DIOMAP1));
+  wlinfo("DIOMAP2:      %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_DIOMAP2));
+  wlinfo("VERSION:      %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_VERSION));
+  wlinfo("TCXO:         %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_TCXO));
+  wlinfo("PADAC:        %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_PADAC));
+  wlinfo("FTEMP:        %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_FTEMP));
+  wlinfo("AGCREF:       %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_AGCREF));
+  wlinfo("AGCTHR1:      %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_AGCTHR1));
+  wlinfo("AGCTHR2:      %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_AGCTHR2));
+  wlinfo("AGCTHR3:      %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_AGCTHR3));
+  wlinfo("PLL:          %02x\n",
+         sx127x_readregbyte(dev, SX127X_CMN_PLL));
+  sx127x_unlock(dev->spi);
+}
+#endif
+
+/****************************************************************************
+ * Name: sx127x_dumpregs
+ *
+ * Description:
+ *   Dump registers according to current modulation
+ *
+ ****************************************************************************/
+
+static void sx127x_dumpregs(FAR struct sx127x_dev_s *dev)
+{
+  switch (dev->modulation)
+    {
+#ifdef CONFIG_LPWAN_SX127X_LORA
+      case SX127X_MODULATION_LORA:
+        {
+          sx127x_lora_dumpregs(dev);
+          break;
+        }
+#endif
+
+#ifdef CONFIG_LPWAN_SX127X_FSKOOK
+      case SX127X_MODULATION_FSK:
+      case SX127X_MODULATION_OOK:
+        {
+          sx127x_fskook_dumpregs(dev);
+          break;
+        }
+#endif
+
+      default:
+        {
+          wlinfo("Unknown SX127X modulation\n");
+          break;
+        }
+    }
+}
+#endif /* CONFIG_DEBUG_WIRELESS_INFO */
+
+/****************************************************************************
+ * Name: sx127x_unregister
+ *
+ * Description:
+ *   Unregister SX127X device
+ *
+ ****************************************************************************/
+
+static int sx127x_unregister(FAR struct sx127x_dev_s *dev)
+{
+  DEBUGASSERT(dev != NULL);
+
+  /* Release IRQ */
+
+  sx127x_attachirq0(dev, NULL, NULL);
+
+  /* Destroy semaphores */
+
+  nxsem_destroy(&dev->dev_sem);
+#ifdef CONFIG_LPWAN_SX127X_TXSUPPORT
+  nxsem_destroy(&dev->tx_sem);
+#endif
+#ifdef CONFIG_LPWAN_SX127X_RXSUPPORT
+  nxsem_destroy(&dev->rx_sem);
+  nxsem_destroy(&dev->rx_buffer_sem);
+#endif
+
+  return OK;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: sx127x_register
+ *
+ * Description:
+ *   Register sx127x driver
+ *
+ ****************************************************************************/
+
+int sx127x_register(FAR struct spi_dev_s *spi,
+                    FAR const struct sx127x_lower_s *lower)
+{
+  FAR struct sx127x_dev_s *dev = NULL;
+  int ret = OK;
+
+  DEBUGASSERT(spi != NULL);
+  DEBUGASSERT(lower != NULL);
+  DEBUGASSERT(lower->reset != NULL);
+  DEBUGASSERT(lower->irq0attach != NULL);
+  DEBUGASSERT(lower->opmode_change != NULL);
+  DEBUGASSERT(lower->freq_select != NULL);
+  DEBUGASSERT(lower->pa_select != NULL);
+
+  /* Only one sx127x device supported for now */
+
+  dev = &g_sx127x_devices[0];
+
+  /* Reset data */
+
+  memset(dev, 0, sizeof(struct sx127x_dev_s));
+
+  /* Attach the interface, lower driver */
+
+  dev->spi   = spi;
+  dev->lower = lower;
+
+  /* Initlaize configuration */
+
+  dev->idle             = SX127X_IDLE_OPMODE;
+#ifdef CONFIG_LPWAN_SX127X_TXSUPPORT
+  dev->pa_force         = lower->pa_force;
+#endif
+  dev->crcon            = CONFIG_LPWAN_SX127X_CRCON;
+#ifdef CONFIG_LPWAN_SX127X_FSKOOK
+  dev->fskook.fixlen    = false;
+#endif
+#ifdef CONFIG_LPWAN_SX127X_LORA
+  dev->lora.invert_iq   = false;
+#endif
+
+  /* Polled file decr */
+
+  dev->pfd        = NULL;
+
+  /* Initialize sem */
+
+  nxsem_init(&dev->dev_sem, 0, 1);
+#ifdef CONFIG_LPWAN_SX127X_TXSUPPORT
+  nxsem_init(&dev->tx_sem, 0, 0);
+#endif
+#ifdef CONFIG_LPWAN_SX127X_RXSUPPORT
+  nxsem_init(&dev->rx_sem, 0, 0);
+  nxsem_init(&dev->rx_buffer_sem, 0, 1);
+#endif
+
+  /* Attach irq0 - TXDONE/RXDONE/CADDONE */
+
+  sx127x_attachirq0(dev, sx127x_irq0handler, dev);
+
+  /* TODO: support for irq1-5 */
+
+  wlinfo("Registering " SX127X_DEV_NAME "\n");
+
+  ret = register_driver(SX127X_DEV_NAME, &sx127x_fops, 0666, dev);
+  if (ret < 0)
+    {
+      wlerr("ERROR: register_driver() failed: %d\n", ret);
+      sx127x_unregister(dev);
+    }
+
+  return ret;
+}
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/include/nuttx/sensors/hs300x.h b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/include/nuttx/sensors/hs300x.h
index cc3e556f1..3273a971e 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/include/nuttx/sensors/hs300x.h
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/include/nuttx/sensors/hs300x.h
@@ -1,22 +1,22 @@
-/****************************************************************************
- * include/nuttx/sensors/hs300x.h
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements.  See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership.  The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License.  You may obtain a copy of the License at
- *
- *   http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
+/*
+* Copyright (c) 2020 AIIT XUOS Lab
+* XiUOS is licensed under Mulan PSL v2.
+* You can use this software according to the terms and conditions of the Mulan PSL v2.
+* You may obtain a copy of Mulan PSL v2 at:
+*        http://license.coscl.org.cn/MulanPSL2
+* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+* See the Mulan PSL v2 for more details.
+*/
+
+/**
+ * @file hs300x.h
+ * @brief hs300x sensor driver
+ * @version 1.0
+ * @author AIIT XUOS Lab
+ * @date 2022.03.17
+ */
 
 #ifndef __INCLUDE_NUTTX_SENSORS_HS300X_H
 #define __INCLUDE_NUTTX_SENSORS_HS300X_H
diff --git a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/tools/cfgdefine.c b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/tools/cfgdefine.c
index 6f79bd146..78d43ff24 100644
--- a/Ubiquitous/Nuttx/app_match_nuttx/nuttx/tools/cfgdefine.c
+++ b/Ubiquitous/Nuttx/app_match_nuttx/nuttx/tools/cfgdefine.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file cfgdefine.c
+* @brief nuttx source code
+*                 https://github.com/apache/incubator-nuttx-apps
+* @version 10.2.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-17
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx/apps b/Ubiquitous/Nuttx/apps
new file mode 160000
index 000000000..562239ecb
--- /dev/null
+++ b/Ubiquitous/Nuttx/apps
@@ -0,0 +1 @@
+Subproject commit 562239ecb2d84dd9de2dd206da41df19602e20cb
diff --git a/Ubiquitous/Nuttx/nuttx b/Ubiquitous/Nuttx/nuttx
new file mode 160000
index 000000000..3fede4209
--- /dev/null
+++ b/Ubiquitous/Nuttx/nuttx
@@ -0,0 +1 @@
+Subproject commit 3fede42098e5883f336d846ac30edfe749899494
diff --git a/Ubiquitous/XiZi/README.md b/Ubiquitous/XiZi/README.md
index e43b8e290..238db6ab0 100644
--- a/Ubiquitous/XiZi/README.md
+++ b/Ubiquitous/XiZi/README.md
@@ -23,7 +23,7 @@
 
 ARM架构系列的开发板有
 
-	aiit-arm32-board nuvoton-m2354 ok1052-c stm32f103-nano stm32f407-st-discovery stm32f407zgt6
+	aiit-arm32-board nuvoton-m2354 ok1052-c stm32f103-nano stm32f407-st-discovery stm32f407zgt6 xidatong
 
 ### RISC-V
 
diff --git a/Ubiquitous/XiZi/board/ok1052-c/README.md b/Ubiquitous/XiZi/board/ok1052-c/README.md
index 407214a3f..81477339f 100644
--- a/Ubiquitous/XiZi/board/ok1052-c/README.md
+++ b/Ubiquitous/XiZi/board/ok1052-c/README.md
@@ -12,9 +12,9 @@
 |架构| cortex-m7 |
 |主频| 600MHz |
 |片内SRAM| 512KB shared with TCM |
-|外设支持| UART |
+|外设支持| UART GPIO I2C RTC SDIO SEMC SPI USB ADC|
 
-XiUOS板级当前支持使用UART。
+XiUOS板级当前支持使用UART、GPIO、I2C、RTC、SDIO、SEMC、SPI、USB、ADC。
 
 ## 2. 开发环境搭建
 
diff --git a/Ubiquitous/XiZi/board/ok1052-c/board.c b/Ubiquitous/XiZi/board/ok1052-c/board.c
index 284857639..363c8424c 100644
--- a/Ubiquitous/XiZi/board/ok1052-c/board.c
+++ b/Ubiquitous/XiZi/board/ok1052-c/board.c
@@ -31,7 +31,7 @@ Modification:
 #include "pin_mux.h"
 
 #ifdef BSP_USING_SDIO
-extern int Imrt1052HwSdioInit(void);
+extern int Imxrt1052HwSdioInit(void);
 #endif
 
 #ifdef BSP_USING_SEMC
@@ -72,6 +72,9 @@ int MountSDCard(void)
 #include "fsl_gpio.h"
 #include "fsl_lpuart.h"
 
+#ifdef BSP_USING_GPIO
+#include <connect_gpio.h>
+#endif
 #ifdef BSP_USING_LWIP
 #include <connect_ethernet.h>
 #endif
@@ -659,6 +662,10 @@ void InitBoardHardware()
     SysTick_Config(SystemCoreClock / TICK_PER_SECOND);
 #endif
 
+#ifdef BSP_USING_GPIO
+    Imxrt1052HwGpioInit();
+#endif
+
 #ifdef BSP_USING_LPUART
     imxrt_uart_pins_init();
 #endif
@@ -685,29 +692,29 @@ void InitBoardHardware()
 #endif
 
 #ifdef BSP_USING_LPUART
-    Imrt1052HwUartInit();
+    Imxrt1052HwUartInit();
 #endif
 
 #ifdef BSP_USING_ADC
-    Imrt1052HwAdcInit();
+    Imxrt1052HwAdcInit();
 #endif
 
 #ifdef BSP_USING_I2C
-    Imrt1052HwI2cInit();
+    Imxrt1052HwI2cInit();
 #endif
 
 #ifdef BSP_USING_SPI
-    Imrt1052HwSpiInit();
+    Imxrt1052HwSpiInit();
 #endif
 
 #ifdef BSP_USING_RTC
-    Imrt1052HwRtcInit();
+    Imxrt1052HwRtcInit();
 #endif
 
     InstallConsole(KERNEL_CONSOLE_BUS_NAME, KERNEL_CONSOLE_DRV_NAME, KERNEL_CONSOLE_DEVICE_NAME);
 
 #ifdef BSP_USING_SDIO
-    Imrt1052HwSdioInit();
+    Imxrt1052HwSdioInit();
 #endif
 
 }
diff --git a/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/adc/connect_adc.c b/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/adc/connect_adc.c
index e8896d83f..21b5d499a 100755
--- a/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/adc/connect_adc.c
+++ b/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/adc/connect_adc.c
@@ -78,7 +78,7 @@ void ADC2_IRQHandler(int vector, void *param)
 
 DECLARE_HW_IRQ(ADC2_IRQn, ADC2_IRQHandler, NONE);
 
-uint32 Imrt1052AdcOpen(void *dev)
+uint32 Imxrt1052AdcOpen(void *dev)
 {
     struct AdcHardwareDevice *adc_dev = (struct AdcHardwareDevice *)dev;
     adc_config_t adc_cfg;
@@ -126,12 +126,12 @@ uint32 Imrt1052AdcOpen(void *dev)
     return EOK;
 }
 
-uint32 Imrt1052AdcClose(void *dev)
+uint32 Imxrt1052AdcClose(void *dev)
 {
     return EOK;
 }
 
-uint32 Imrt1052AdcRead(void *dev, struct BusBlockReadParam *read_param)
+uint32 Imxrt1052AdcRead(void *dev, struct BusBlockReadParam *read_param)
 {
     struct AdcHardwareDevice *adc_dev = (struct AdcHardwareDevice *)dev;
     adc_channel_config_t ch_cfg;
@@ -169,7 +169,7 @@ uint32 Imrt1052AdcRead(void *dev, struct BusBlockReadParam *read_param)
     return adc1_val;
 }
 
-static uint32 Imrt1052AdcDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
+static uint32 Imxrt1052AdcDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
 {
     NULL_PARAM_CHECK(drv);
     NULL_PARAM_CHECK(configure_info);
@@ -179,14 +179,14 @@ static uint32 Imrt1052AdcDrvConfigure(void *drv, struct BusConfigureInfo *config
 
     struct AdcDriver *adc_drv = (struct AdcDriver *)drv;
     struct AdcHardwareDevice *adc_dev = (struct AdcHardwareDevice *)adc_drv->driver.owner_bus->owner_haldev;
-    struct Imrt1052HwAdc *adc_cfg = (struct Imrt1052HwAdc *)adc_dev->haldev.private_data;
+    struct Imxrt1052HwAdc *adc_cfg = (struct Imxrt1052HwAdc *)adc_dev->haldev.private_data;
 
     switch (configure_info->configure_cmd)
     {
         case OPE_CFG:
             adc_cfg->adc_channel = *(uint8 *)configure_info->private_data;
             if (adc_cfg->adc_channel > 18) {
-                KPrintf("Imrt1052AdcDrvConfigure set adc channel(0-18) %u error!", adc_cfg->adc_channel);
+                KPrintf("Imxrt1052AdcDrvConfigure set adc channel(0-18) %u error!", adc_cfg->adc_channel);
                 adc_cfg->adc_channel = 0;
                 ret = ERROR;
             }
@@ -200,13 +200,13 @@ static uint32 Imrt1052AdcDrvConfigure(void *drv, struct BusConfigureInfo *config
 
 static const struct AdcDevDone dev_done =
 {
-    Imrt1052AdcOpen,
-    Imrt1052AdcClose,
+    Imxrt1052AdcOpen,
+    Imxrt1052AdcClose,
     NONE,
-    Imrt1052AdcRead,
+    Imxrt1052AdcRead,
 };
 
-int Imrt1052HwAdcInit(void)
+int Imxrt1052HwAdcInit(void)
 {
     x_err_t ret = EOK;
 
@@ -214,9 +214,9 @@ int Imrt1052HwAdcInit(void)
     static struct AdcBus adc1_bus;
     static struct AdcDriver adc1_drv;
     static struct AdcHardwareDevice adc1_dev;
-    static struct Imrt1052HwAdc adc1_cfg;
+    static struct Imxrt1052HwAdc adc1_cfg;
 
-    adc1_drv.configure = Imrt1052AdcDrvConfigure;
+    adc1_drv.configure = Imxrt1052AdcDrvConfigure;
 
     ret = AdcBusInit(&adc1_bus, ADC_BUS_NAME_1);
     if (ret != EOK) {
@@ -254,9 +254,9 @@ int Imrt1052HwAdcInit(void)
     static struct AdcBus adc2_bus;
     static struct AdcDriver adc2_drv;
     static struct AdcHardwareDevice adc2_dev;
-    static struct Imrt1052HwAdc adc2_cfg;
+    static struct Imxrt1052HwAdc adc2_cfg;
 
-    adc2_drv.configure = Imrt1052AdcDrvConfigure;
+    adc2_drv.configure = Imxrt1052AdcDrvConfigure;
 
     ret = AdcBusInit(&adc2_bus, ADC_BUS_NAME_2);
     if (ret != EOK) {
diff --git a/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/gpio/connect_gpio.c b/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/gpio/connect_gpio.c
index fdc55b4d9..a61d7d035 100755
--- a/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/gpio/connect_gpio.c
+++ b/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/gpio/connect_gpio.c
@@ -1,39 +1,35 @@
 /*
- * Copyright (c) 2020 RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
- * Date           Author            Notes
- * 2018-11-06     balanceTWK        first version
- * 2019-04-23     WillianChan       Fix GPIO serial number disorder
-*/
+ * Date           Author       Notes
+ * 2018-4-30     misonyo     the first version.
+ */
 
 /**
 * @file connect_gpio.c
 * @brief support gpio function using bus driver framework
-* @version 1.0
+* @version 2.0
 * @author AIIT XUOS Lab
-* @date 2021-04-25
+* @date 2022-03-16
 */
 
 /*************************************************
 File name: connect_gpio.c
-Description: support  gpio configure and register to bus framework
-Others: take RT-Thread v4.0.2/bsp/stm32/libraries/HAL_Drivers/drv_gpio.c for references
+Description: support gpio configure and register to bus framework
+Others: take RT-Thread v4.0.2/bsp/imxrt/libraries/drivers/drv_gpio.c for references
                 https://github.com/RT-Thread/rt-thread/tree/v4.0.2
 History:
-1. Date: 2021-04-25
+1. Date: 2022-03-16
 Author: AIIT XUOS Lab
 Modification: add bus driver framework support for gpio
 *************************************************/
 
-#include <device.h>
-#include <board.h>
-
-#define STM32_PIN_NUMBERS 100 // [48, 64, 100, 144]
-
-#define ITEM_NUM(items) sizeof(items)/sizeof(items[0])
+#include <connect_gpio.h>
+#include <fsl_gpio.h>
+#include <fsl_iomuxc.h>
 
 struct PinIndex
 {
@@ -50,81 +46,196 @@ struct PinIrq
     uint32 exti_line;
 };
 
-static const struct PinIndex pins[] = {
-    {0, GPIO1, 0},
-    {1, GPIO1, 1},
-    {2, GPIO1, 2},
-    {3, GPIO1, 3},
-    {4, GPIO1, 4},
-    {5, GPIO1, 5},
-    {6, GPIO1, 6},
-    {7, GPIO1, 7},
-    {8, GPIO1, 8},
-    {9, GPIO1, 9},
-    {10, GPIO1, 10},
-    {11, GPIO1, 11},
-    {12, GPIO1, 12},
-    {13, GPIO1, 13},
-    {14, GPIO1, 14},
-    {15, GPIO1, 15},
-    {16, GPIO2, 0},
-    {17, GPIO2, 1},
-    {18, GPIO2, 2},
-    {19, GPIO2, 3},
-    {20, GPIO2, 4},
-    {21, GPIO2, 5},
-    {22, GPIO2, 6},
-    {23, GPIO2, 7},
-    {24, GPIO2, 8},
-    {25, GPIO2, 9},
-    {26, GPIO2, 10},
-    {27, GPIO2, 11},
-    {28, GPIO2, 12},
-    {29, GPIO2, 13},
-    {30, GPIO2, 14},
-    {31, GPIO2, 15},
-    {32, GPIO3, 0},
-    {33, GPIO3, 1},
-    {34, GPIO3, 2},
-    {35, GPIO3, 3},
-    {36, GPIO3, 4},
-    {37, GPIO3, 5},
-    {38, GPIO3, 6},
-    {39, GPIO3, 7},
-    {40, GPIO3, 8},
-    {41, GPIO3, 9},
-    {42, GPIO3, 10},
-    {43, GPIO3, 11},
-    {44, GPIO3, 12},
-    {45, GPIO3, 13},
-    {46, GPIO3, 14},
-    {47, GPIO3, 15},
-    {-1, 0u, -1}
+struct PinMask
+{
+    GPIO_Type *gpio;
+    uint32 valid_mask;
 };
 
-struct PinIrqHdr pin_irq_hdr_tab[] = {};
-
-const struct PinIndex *GetPin(uint8_t pin)
+static const IRQn_Type irq_tab[10] =
 {
-    const struct PinIndex *index;
+    GPIO1_Combined_0_15_IRQn,
+    GPIO1_Combined_16_31_IRQn,
+    GPIO2_Combined_0_15_IRQn,
+    GPIO2_Combined_16_31_IRQn,
+    GPIO3_Combined_0_15_IRQn,
+    GPIO3_Combined_16_31_IRQn,
+    GPIO4_Combined_0_15_IRQn,
+    GPIO4_Combined_16_31_IRQn,
+    GPIO5_Combined_0_15_IRQn,
+    GPIO5_Combined_16_31_IRQn
+};
 
-    if (pin < ITEM_NUM(pins)){
-        index = &pins[pin];
-        if (index->index == -1)
-            index = NONE;
-    }
-    else{
-        index = NONE;
+const struct PinMask pin_mask[] = 
+{
+    {GPIO1, 0xFFFFFFFF},     /* GPIO1 */
+    {GPIO2, 0xFFFFFFFF},     /* GPIO2 */
+    {GPIO3, 0x0FFFFFFF},     /* GPIO3,28~31 not supported */
+    {GPIO4, 0xFFFFFFFF},     /* GPIO4 */
+    {GPIO5, 0x00000007}      /* GPIO5,3~31 not supported */
+};
+
+struct PinIrqHdr pin_irq_hdr_tab[] = 
+{
+/* GPIO1 */
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    /* GPIO2 */
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    /* GPIO3 */
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    /* GPIO4 */
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    /* GPIO5 */
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+};
+
+static int GetPin(struct PinIndex *pin_index, uint8_t pin)
+{
+    pin_index->index = pin >> 5;//0:GPIO1 1:GPIO2 2:GPIO3 3:GPIO4 4:GPIO5 
+    pin_index->pin = pin & 31;//each GPIOx support 32 io
+    
+    if ((pin_index->index > 4) || ((pin_mask[pin_index->index].valid_mask & (1 << pin_index->pin)) == 0)) {
+        KPrintf("GetPin unsupport pin index %u pin %u\n", pin_index->index, pin_index->pin);
+        return -1;
     }
 
-    return index;
+    pin_index->gpio = pin_mask[pin_index->index].gpio;
+    return 0;
 }
 
-static int32 GpioConfigMode(int mode, const struct PinIndex* index)
+static int32 GpioConfigMode(int mode, struct PinIndex *index)
 {
     gpio_pin_config_t gpio_config;
     NULL_PARAM_CHECK(index);
 
+    gpio_config.outputLogic = 0;
+
     switch (mode)
     {
         case GPIO_CFG_OUTPUT:
@@ -137,14 +248,15 @@ static int32 GpioConfigMode(int mode, const struct PinIndex* index)
             break;
         case GPIO_CFG_INPUT_PULLUP:
             gpio_config.direction = kGPIO_DigitalInput;
-            gpio_config.interruptMode = kGPIO_IntRisingEdge;
+            gpio_config.interruptMode = kGPIO_NoIntmode;
             break;
         case GPIO_CFG_INPUT_PULLDOWN:
             gpio_config.direction = kGPIO_DigitalInput;
-            gpio_config.interruptMode = kGPIO_IntFallingEdge;
+            gpio_config.interruptMode = kGPIO_NoIntmode;
             break;
         case GPIO_CFG_OUTPUT_OD:
             gpio_config.direction = kGPIO_DigitalOutput;
+            gpio_config.interruptMode = kGPIO_NoIntmode;
             break;
         default:
             break;
@@ -153,97 +265,33 @@ static int32 GpioConfigMode(int mode, const struct PinIndex* index)
     return EOK;
 }
 
-static __inline int32 Bit2Bitnum(uint32 bit)
-{
-    for (int i = 0; i < 32; i++){
-        if ((1UL << i) == bit){
-            return i;
-        }
-    }
-    return -1;
-}
-
-static __inline int32 Bitno2Bit(uint32 bitno)
-{
-    if (bitno <= 32) {
-        return 1UL << bitno;
-    }
-    else {
-        return 0;
-    }
-}
-static const struct PinIrq *GetPinIrq(uint16_t pin)
-{
-    static struct PinIrq irq;
-    const struct PinIndex* index = GetPin(pin);
-
-    if (index == NONE) {
-        return NONE;
-    }
-
-    irq.exti_line = index->pin;
-    irq.pin_source = Bit2Bitnum(index->pin);
-    irq.port_source = ((uint32_t)index->gpio - GPIO1_BASE) / (GPIO2_BASE - GPIO1_BASE);
-    switch (irq.pin_source)
-    {
-        case 0 :
-            irq.irq_exti_channel = GPIO1_INT0_IRQn;
-            break;
-        case 1 :
-            irq.irq_exti_channel = GPIO1_INT1_IRQn;
-            break;
-        case 2 :
-            irq.irq_exti_channel = GPIO1_INT2_IRQn;
-            break;
-        case 3 :
-            irq.irq_exti_channel = GPIO1_INT3_IRQn;
-            break;
-        case 4 :
-            irq.irq_exti_channel = GPIO1_INT4_IRQn;
-            break;
-        case 5 :
-            irq.irq_exti_channel = GPIO1_INT5_IRQn;
-            break;
-        case 6 :
-            irq.irq_exti_channel = GPIO1_INT6_IRQn;
-            break;
-        case 7 :
-            irq.irq_exti_channel = GPIO1_INT7_IRQn;
-            break;
-        default :
-            return NONE;
-    }
-
-    return &irq;
-};
 static int32 GpioIrqRegister(int32 pin, int32 mode, void (*hdr)(void *args), void *args)
 {
-    const struct PinIndex* index = GetPin(pin);
-    int32 irqindex = -1;
+    struct PinIndex pin_index;
 
-    irqindex = Bit2Bitnum(index->pin);
-    if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_hdr_tab)) {
-        return -ENONESYS;
+    if (GetPin(&pin_index, pin) < 0) {
+        return ERROR;
     }
 
     x_base level = CriticalAreaLock();
-    if (pin_irq_hdr_tab[irqindex].pin == pin   &&
-        pin_irq_hdr_tab[irqindex].hdr == hdr   &&
-        pin_irq_hdr_tab[irqindex].mode == mode &&
-        pin_irq_hdr_tab[irqindex].args == args
+    if (pin_irq_hdr_tab[pin].pin == pin   &&
+        pin_irq_hdr_tab[pin].hdr == hdr   &&
+        pin_irq_hdr_tab[pin].mode == mode &&
+        pin_irq_hdr_tab[pin].args == args
     )
     {
         CriticalAreaUnLock(level);
         return EOK;
     }
-    if (pin_irq_hdr_tab[irqindex].pin != -1) {
+
+    if (pin_irq_hdr_tab[pin].pin != -1) {
         CriticalAreaUnLock(level);
         return -EDEV_BUSY;
     }
-    pin_irq_hdr_tab[irqindex].pin = pin;
-    pin_irq_hdr_tab[irqindex].hdr = hdr;
-    pin_irq_hdr_tab[irqindex].mode = mode;
-    pin_irq_hdr_tab[irqindex].args = args;
+    pin_irq_hdr_tab[pin].pin = pin;
+    pin_irq_hdr_tab[pin].hdr = hdr;
+    pin_irq_hdr_tab[pin].mode = mode;
+    pin_irq_hdr_tab[pin].args = args;
     CriticalAreaUnLock(level);
 
     return EOK;
@@ -251,23 +299,21 @@ static int32 GpioIrqRegister(int32 pin, int32 mode, void (*hdr)(void *args), voi
 
 static uint32 GpioIrqFree(int32 pin)
 {
-    const struct PinIndex* index = GetPin(pin);
-    int32 irqindex = -1;
+    struct PinIndex pin_index;
 
-    irqindex = Bit2Bitnum(index->pin);
-    if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_hdr_tab)) {
-        return -ENONESYS;
+    if (GetPin(&pin_index, pin) < 0) {
+        return ERROR;
     }
 
     x_base level = CriticalAreaLock();
-    if (pin_irq_hdr_tab[irqindex].pin == -1){
+    if (pin_irq_hdr_tab[pin].pin == -1){
         CriticalAreaUnLock(level);
         return EOK;
     }
-    pin_irq_hdr_tab[irqindex].pin  = -1;
-    pin_irq_hdr_tab[irqindex].hdr  = NONE;
-    pin_irq_hdr_tab[irqindex].mode = 0;
-    pin_irq_hdr_tab[irqindex].args = NONE;
+    pin_irq_hdr_tab[pin].pin  = -1;
+    pin_irq_hdr_tab[pin].hdr  = NONE;
+    pin_irq_hdr_tab[pin].mode = 0;
+    pin_irq_hdr_tab[pin].args = NONE;
     CriticalAreaUnLock(level);
 
     return EOK;
@@ -275,74 +321,81 @@ static uint32 GpioIrqFree(int32 pin)
 
 static int32 GpioIrqEnable(x_base pin)
 {
-    const struct PinIndex* index = GetPin(pin);
-    int32 irqindex = -1;
-    const struct PinIrq *irq;
-    gpio_pin_config_t gpio_config;
+    uint8_t irq_index;
+    gpio_interrupt_mode_t gpio_int_mode;
+    struct PinIndex pin_index;
 
-    irqindex = Bit2Bitnum(index->pin);
-    if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_hdr_tab)){
-        return -ENONESYS;
+    if (GetPin(&pin_index, pin) < 0) {
+        return ERROR;
     }
+
     x_base level = CriticalAreaLock();
-    if (pin_irq_hdr_tab[irqindex].pin == -1) {
+    if (pin_irq_hdr_tab[pin].pin == -1) {
         CriticalAreaUnLock(level);
         return -ENONESYS;
     }
 
-    irq = GetPinIrq(pin);
-    if (irq == NONE){
-        CriticalAreaUnLock(level);
-        return -ENONESYS;
-    }
-
-    switch (pin_irq_hdr_tab[irqindex].mode)
+    switch (pin_irq_hdr_tab[pin].mode)
     {
-    case GPIO_IRQ_EDGE_RISING:
-        gpio_config.direction = kGPIO_DigitalInput;
-        gpio_config.interruptMode = kGPIO_IntRisingEdge;
-        break;
-    case GPIO_IRQ_EDGE_FALLING:
-        gpio_config.direction = kGPIO_DigitalInput;
-        gpio_config.interruptMode = kGPIO_IntFallingEdge;
-        break;
-    case GPIO_IRQ_EDGE_BOTH:
-        gpio_config.direction = kGPIO_DigitalInput;
-        gpio_config.interruptMode = kGPIO_IntRisingOrFallingEdge;
-        break;
+        case GPIO_IRQ_EDGE_RISING:
+            gpio_int_mode = kGPIO_IntRisingEdge;
+            break;
+        case GPIO_IRQ_EDGE_FALLING:
+            gpio_int_mode = kGPIO_IntFallingEdge;
+            break;
+        case GPIO_IRQ_EDGE_BOTH:
+            gpio_int_mode = kGPIO_IntRisingOrFallingEdge;
+            break;
+        case GPIO_IRQ_LEVEL_HIGH:
+            gpio_int_mode = kGPIO_IntHighLevel;
+            break;
+        case GPIO_IRQ_LEVEL_LOW:
+            gpio_int_mode = kGPIO_IntLowLevel;
+            break;
+        default:
+            gpio_int_mode = kGPIO_IntRisingEdge;
+            break;
     }
 
-    GPIO_PinInit(index->gpio, index->pin, &gpio_config);
-    GPIO_PortEnableInterrupts(index->gpio, index->pin);
+    irq_index = (pin_index.index << 1) + (pin_index.pin >> 4);
+    GPIO_PinSetInterruptConfig(pin_index.gpio, pin_index.pin, gpio_int_mode);
+    GPIO_PortEnableInterrupts(pin_index.gpio, 1U << pin_index.pin);
+    NVIC_SetPriority(irq_tab[irq_index], NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 5, 0));
+    EnableIRQ(irq_tab[irq_index]);
     CriticalAreaUnLock(level);
     return EOK;
 }
 
 static int32 GpioIrqDisable(x_base pin)
 {
-    const struct PinIndex* index = GetPin(pin);
-    const struct PinIrq *irq;
+    struct PinIndex pin_index;
 
-    irq = GetPinIrq(index->pin);
-    NULL_PARAM_CHECK(irq);
+    if (GetPin(&pin_index, pin) < 0) {
+        return ERROR;
+    }
 
-    GPIO_PortDisableInterrupts(index->gpio, index->pin);
+    GPIO_PortDisableInterrupts(pin_index.gpio, 1U << pin_index.pin);
     return EOK;
 }
 
-static uint32 Stm32PinConfigure(struct PinParam *param)
+static uint32 Imxrt1052PinConfigure(struct PinParam *param)
 {
     NULL_PARAM_CHECK(param);
     int ret = EOK;
 
-    const struct PinIndex *index = GetPin(param->pin);
+    struct PinIndex pin_index;
+
+    if (GetPin(&pin_index, param->pin) < 0) {
+        return ERROR;
+    }
+
     switch(param->cmd)
     {
         case GPIO_CONFIG_MODE:
-            GpioConfigMode(param->mode, index);
+            GpioConfigMode(param->mode, &pin_index);
             break;
         case GPIO_IRQ_REGISTER:
-            ret = GpioIrqRegister(param->pin,param->irq_set.irq_mode,param->irq_set.hdr,param->irq_set.args);
+            ret = GpioIrqRegister(param->pin, param->irq_set.irq_mode, param->irq_set.hdr, param->irq_set.args);
             break;
         case GPIO_IRQ_FREE:
             ret = GpioIrqFree(param->pin);
@@ -361,7 +414,7 @@ static uint32 Stm32PinConfigure(struct PinParam *param)
     return ret;
 }
 
-static uint32 Stm32PinInit(void)
+static uint32 Imxrt1052PinInit(void)
 {
     static x_bool pin_init_flag = RET_FALSE;
 
@@ -372,7 +425,7 @@ static uint32 Stm32PinInit(void)
     return EOK;
 }
 
-static uint32 Stm32GpioDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
+static uint32 Imxrt1052GpioDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
 {
     NULL_PARAM_CHECK(drv);
     NULL_PARAM_CHECK(configure_info);
@@ -383,11 +436,11 @@ static uint32 Stm32GpioDrvConfigure(void *drv, struct BusConfigureInfo *configur
     switch (configure_info->configure_cmd)
     {
         case OPE_INT:
-            ret = Stm32PinInit();
+            ret = Imxrt1052PinInit();
             break;
         case OPE_CFG:
             param = (struct PinParam *)configure_info->private_data;
-            ret = Stm32PinConfigure(param);
+            ret = Imxrt1052PinConfigure(param);
             break;
         default:
             break;
@@ -396,47 +449,53 @@ static uint32 Stm32GpioDrvConfigure(void *drv, struct BusConfigureInfo *configur
     return ret;
 }
 
-uint32 Stm32PinWrite(void *dev, struct BusBlockWriteParam *write_param)
+uint32 Imxrt1052PinWrite(void *dev, struct BusBlockWriteParam *write_param)
 {
     NULL_PARAM_CHECK(dev);
     NULL_PARAM_CHECK(write_param);
-    struct PinStat *pinstat = (struct PinStat *)write_param->buffer;
-    const struct PinIndex* index = GetPin(pinstat->pin);
-    NULL_PARAM_CHECK(index);
+    struct PinStat *pin_stat = (struct PinStat *)write_param->buffer;
+    struct PinIndex pin_index;
+    
+    if (GetPin(&pin_index, pin_stat->pin) < 0) {
+        return ERROR;
+    }
 
-    if (GPIO_LOW == pinstat->val) {
-        GPIO_PinWrite(index->gpio, index->pin, 0);
+    if (GPIO_LOW == pin_stat->val) {
+        GPIO_PinWrite(pin_index.gpio, pin_index.pin, 0);
     } else {
-        GPIO_PinWrite(index->gpio, index->pin, 1);
+        GPIO_PinWrite(pin_index.gpio, pin_index.pin, 1);
     }
     return EOK;
 }
 
-uint32 Stm32PinRead(void *dev, struct BusBlockReadParam *read_param)
+uint32 Imxrt1052PinRead(void *dev, struct BusBlockReadParam *read_param)
 {
     NULL_PARAM_CHECK(dev);
     NULL_PARAM_CHECK(read_param);
-    struct PinStat *pinstat = (struct PinStat *)read_param->buffer;
-    const struct PinIndex* index = GetPin(pinstat->pin);
-    NULL_PARAM_CHECK(index);
-
-    if(GPIO_PinRead(index->gpio, index->pin) == GPIO_LOW) {
-        pinstat->val = GPIO_LOW;
-    } else {
-        pinstat->val = GPIO_HIGH;
+    struct PinStat *pin_stat = (struct PinStat *)read_param->buffer;
+    struct PinIndex pin_index;
+    
+    if (GetPin(&pin_index, pin_stat->pin) < 0) {
+        return ERROR;
     }
-    return pinstat->val;
+
+    if(GPIO_LOW == GPIO_PinRead(pin_index.gpio, pin_index.pin)) {
+        pin_stat->val = GPIO_LOW;
+    } else {
+        pin_stat->val = GPIO_HIGH;
+    }
+    return pin_stat->val;
 }
 
 static const struct PinDevDone dev_done =
 {
     .open  = NONE,
     .close = NONE,
-    .write = Stm32PinWrite,
-    .read  = Stm32PinRead,
+    .write = Imxrt1052PinWrite,
+    .read  = Imxrt1052PinRead,
 };
 
-int Stm32HwGpioInit(void)
+int Imxrt1052HwGpioInit(void)
 {
     x_err_t ret = EOK;
 
@@ -449,7 +508,7 @@ int Stm32HwGpioInit(void)
     }
 
     static struct PinDriver drv;
-    drv.configure = &Stm32GpioDrvConfigure;
+    drv.configure = Imxrt1052GpioDrvConfigure;
 
     ret = PinDriverInit(&drv, PIN_DRIVER_NAME, NONE);
     if (ret != EOK) {
@@ -479,66 +538,228 @@ int Stm32HwGpioInit(void)
     return ret;
 }
 
-static __inline void PinIrqHdr(int irqno)
+static __inline void PinIrqHdr(uint32_t index_offset, uint8_t pin_start, GPIO_Type *gpio)
 {
-    const struct PinIndex* index = GetPin(irqno);
-    const struct PinIrq *irq;
+    int i;
+    uint32_t isr_status, pin;
+    struct PinIndex pin_index;
 
-    irq = GetPinIrq(index->pin);
-    NULL_PARAM_CHECK(irq);
+    isr_status = GPIO_PortGetInterruptFlags(gpio) & gpio->IMR;
 
-    GPIO_ClearPinsInterruptFlags(index->gpio, index->pin);
+    for (i = pin_start; i <= pin_start + 15 ; i ++) {
 
-    if (pin_irq_hdr_tab[irqno].hdr){
-       pin_irq_hdr_tab[irqno].hdr(pin_irq_hdr_tab[irqno].args);
+        if (GetPin(&pin_index, i + index_offset) < 0) {
+            continue;
+        }
+
+        if (isr_status & (1 << i)) {
+            GPIO_PortClearInterruptFlags(gpio, (1 << i));
+            pin = index_offset + i;
+            if (pin_irq_hdr_tab[pin].hdr) {
+                pin_irq_hdr_tab[pin].hdr(pin_irq_hdr_tab[pin].args);
+            }
+        }
     }
 }
 
-void EXTI0_IRQHandler(int irq_num, void *arg)
+void GPIO1_0_15_IRQHandler(int irq_num, void *arg)
 {
-    PinIrqHdr(0);
-}
-DECLARE_HW_IRQ(GPIO1_INT0_IRQn, EXTI0_IRQHandler, NONE);
+    x_base lock = 0;
+    lock = DISABLE_INTERRUPT();
 
-void EXTI1_IRQHandler(int irq_num, void *arg)
+    PinIrqHdr(0, 0, GPIO1);
+
+    ENABLE_INTERRUPT(lock);
+}
+DECLARE_HW_IRQ(GPIO1_Combined_0_15_IRQn, GPIO1_0_15_IRQHandler, NONE);
+
+void GPIO1_16_31_IRQHandler(int irq_num, void *arg)
 {
-    PinIrqHdr(1);
-}
-DECLARE_HW_IRQ(GPIO1_INT1_IRQn, EXTI1_IRQHandler, NONE);
+    x_base lock = 0;
+    lock = DISABLE_INTERRUPT();
 
-void EXTI2_IRQHandler(int irq_num, void *arg)
+    PinIrqHdr(0, 15, GPIO1);
+
+    ENABLE_INTERRUPT(lock);
+}
+DECLARE_HW_IRQ(GPIO1_Combined_16_31_IRQn, GPIO1_16_31_IRQHandler, NONE);
+
+void GPIO2_0_15_IRQHandler(int irq_num, void *arg)
 {
-    PinIrqHdr(2);
-}
-DECLARE_HW_IRQ(GPIO1_INT2_IRQn, EXTI2_IRQHandler, NONE);
+    x_base lock = 0;
+    lock = DISABLE_INTERRUPT();
 
-void EXTI3_IRQHandler(int irq_num, void *arg)
+    PinIrqHdr(32, 0, GPIO2);
+
+    ENABLE_INTERRUPT(lock);
+}
+DECLARE_HW_IRQ(GPIO2_Combined_0_15_IRQn, GPIO2_0_15_IRQHandler, NONE);
+
+void GPIO2_16_31_IRQHandler(int irq_num, void *arg)
 {
-    PinIrqHdr(3);
-}
-DECLARE_HW_IRQ(GPIO1_INT3_IRQn, EXTI3_IRQHandler, NONE);
+    x_base lock = 0;
+    lock = DISABLE_INTERRUPT();
 
-void EXTI4_IRQHandler(int irq_num, void *arg)
+    PinIrqHdr(32, 15, GPIO2);
+
+    ENABLE_INTERRUPT(lock);
+}
+DECLARE_HW_IRQ(GPIO2_Combined_16_31_IRQn, GPIO2_16_31_IRQHandler, NONE);
+
+void GPIO3_0_15_IRQHandler(int irq_num, void *arg)
 {
-    PinIrqHdr(4);
-}
-DECLARE_HW_IRQ(GPIO1_INT4_IRQn, EXTI4_IRQHandler, NONE);
+    x_base lock = 0;
+    lock = DISABLE_INTERRUPT();
 
-void EXTI5_IRQHandler(int irq_num, void *arg)
+    PinIrqHdr(64, 0, GPIO3);
+
+    ENABLE_INTERRUPT(lock);
+}
+DECLARE_HW_IRQ(GPIO3_Combined_0_15_IRQn, GPIO3_0_15_IRQHandler, NONE);
+
+void GPIO3_16_31_IRQHandler(int irq_num, void *arg)
 {
-    PinIrqHdr(5);
-}
-DECLARE_HW_IRQ(GPIO1_INT5_IRQn, EXTI5_IRQHandler, NONE);
+    x_base lock = 0;
+    lock = DISABLE_INTERRUPT();
 
-void EXTI6_IRQHandler(int irq_num, void *arg)
+    PinIrqHdr(64, 15, GPIO3);
+
+    ENABLE_INTERRUPT(lock);
+}
+DECLARE_HW_IRQ(GPIO3_Combined_16_31_IRQn, GPIO3_16_31_IRQHandler, NONE);
+
+void GPIO4_0_15_IRQHandler(int irq_num, void *arg)
 {
-    PinIrqHdr(6);
-}
-DECLARE_HW_IRQ(GPIO1_INT6_IRQn, EXTI6_IRQHandler, NONE);
+    x_base lock = 0;
+    lock = DISABLE_INTERRUPT();
 
-void EXTI7_IRQHandler(int irq_num, void *arg)
+    PinIrqHdr(96, 0, GPIO4);
+
+    ENABLE_INTERRUPT(lock);
+}
+DECLARE_HW_IRQ(GPIO4_Combined_0_15_IRQn, GPIO4_0_15_IRQHandler, NONE);
+
+void GPIO4_16_31_IRQHandler(int irq_num, void *arg)
 {
-    PinIrqHdr(7);
-}
-DECLARE_HW_IRQ(GPIO1_INT7_IRQn, EXTI7_IRQHandler, NONE);
+    x_base lock = 0;
+    lock = DISABLE_INTERRUPT();
+
+    PinIrqHdr(96, 15, GPIO4);
+
+    ENABLE_INTERRUPT(lock);
+}
+DECLARE_HW_IRQ(GPIO4_Combined_16_31_IRQn, GPIO4_16_31_IRQHandler, NONE);
+
+void GPIO5_0_15_IRQHandler(int irq_num, void *arg)
+{
+    x_base lock = 0;
+    lock = DISABLE_INTERRUPT();
+
+    PinIrqHdr(128, 0, GPIO5);
+
+    ENABLE_INTERRUPT(lock);
+}
+DECLARE_HW_IRQ(GPIO5_Combined_0_15_IRQn, GPIO5_0_15_IRQHandler, NONE);
+
+void GPIO5_16_31_IRQHandler(int irq_num, void *arg)
+{
+    x_base lock = 0;
+    lock = DISABLE_INTERRUPT();
+
+    PinIrqHdr(128, 15, GPIO5);
+
+    ENABLE_INTERRUPT(lock);
+}
+DECLARE_HW_IRQ(GPIO5_Combined_16_31_IRQn, GPIO5_16_31_IRQHandler, NONE);
+
+#ifdef GPIO_LED_TEST
+static void GpioLedDelay(void)
+{
+    volatile uint32_t i = 0;
+    for (i = 0; i < 8000000; ++i)
+    {
+        __asm("NOP"); /* delay */
+    }
+}
+
+void GpioLedTest(void)
+{
+	BusType pin;
+    struct BusConfigureInfo configure_info;
+	struct BusBlockWriteParam write_param;
+
+    int ret = 0;
+    bool pinSet = 1;
+
+    pin = BusFind(PIN_BUS_NAME);
+    if (!pin) {
+        KPrintf("find %s failed!\n", PIN_BUS_NAME);
+        return;
+    }
+    pin->owner_driver = BusFindDriver(pin, PIN_DRIVER_NAME);
+    pin->owner_haldev = BusFindDevice(pin, PIN_DEVICE_NAME);
+
+	configure_info.configure_cmd = OPE_INT;
+    ret = BusDrvConfigure(pin->owner_driver, &configure_info);
+    if (ret != EOK) {
+        KPrintf("initialize %s failed!\n", PIN_BUS_NAME);
+        return;
+    }
+
+    IOMUXC_SetPinMux(
+        IOMUXC_GPIO_AD_B0_09_GPIO1_IO09,        /* GPIO_AD_B0_09 is configured as GPIO1_IO09 */
+        0U);                                    /* Software Input On Field: Input Path is determined by functionality */
+                                    /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinConfig(
+        IOMUXC_GPIO_AD_B0_09_GPIO1_IO09,        /* GPIO_AD_B0_09 PAD functional properties : */
+        0x10B0u);                               /* Slew Rate Field: Slow Slew Rate
+                                                    Drive Strength Field: R0/6
+                                                    Speed Field: medium(100MHz)
+                                                    Open Drain Enable Field: Open Drain Disabled
+                                                    Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                    Pull / Keep Select Field: Keeper
+                                                    Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                    Hyst. Enable Field: Hysteresis Disabled */
+    
+    struct PinParam led_gpio_param;
+    struct PinStat led_gpio_stat;
+
+    /* config led pin as output*/
+    led_gpio_param.cmd = GPIO_CONFIG_MODE;
+    led_gpio_param.pin = IMXRT_GET_PIN(1, 9);
+    led_gpio_param.mode = GPIO_CFG_OUTPUT_OD;
+
+	configure_info.configure_cmd = OPE_CFG;
+	configure_info.private_data = (void *)&led_gpio_param;
+    ret = BusDrvConfigure(pin->owner_driver, &configure_info);
+    if (ret != EOK) {
+        KPrintf("config pin %d failed!\n", IMXRT_GET_PIN(1, 9));
+        return;
+    }
+
+    while (1) {
+
+        GpioLedDelay();
+
+        if (pinSet) {
+            /* set led pin as high*/
+            led_gpio_stat.pin = IMXRT_GET_PIN(1, 9);
+            led_gpio_stat.val = GPIO_HIGH;
+            write_param.buffer = (void *)&led_gpio_stat;
+            BusDevWriteData(pin->owner_haldev, &write_param);
+            pinSet = 0;
+        } else {
+            /* set led pin as low*/
+            led_gpio_stat.pin = IMXRT_GET_PIN(1, 9);
+            led_gpio_stat.val = GPIO_LOW;
+            write_param.buffer = (void *)&led_gpio_stat;
+            BusDevWriteData(pin->owner_haldev, &write_param);
+            pinSet = 1;
+        }
+
+    }
+}
+SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN),
+                                                GpioLedTest, GpioLedTest, GpioLedTest GPIO1 IO09 LED);
+#endif
 
diff --git a/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/i2c/connect_i2c.c b/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/i2c/connect_i2c.c
index 1b2b827ae..85d6672fc 100755
--- a/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/i2c/connect_i2c.c
+++ b/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/i2c/connect_i2c.c
@@ -143,7 +143,7 @@ static int BoardI2cDevBend(void)
 }
 
 /*BOARD I2C INIT*/
-int Imrt1052HwI2cInit(void)
+int Imxrt1052HwI2cInit(void)
 {
     static int init_flag = 0;
     x_err_t ret = EOK;
diff --git a/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/include/connect_adc.h b/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/include/connect_adc.h
index 39d2f8395..edff7d304 100755
--- a/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/include/connect_adc.h
+++ b/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/include/connect_adc.h
@@ -23,12 +23,12 @@
 
 #include <device.h>
 
-struct Imrt1052HwAdc
+struct Imxrt1052HwAdc
 {
     void *ADCx;
     uint8 adc_channel;
 };
 
-int Imrt1052HwAdcInit(void);
+int Imxrt1052HwAdcInit(void);
 
 #endif
diff --git a/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/include/connect_gpio.h b/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/include/connect_gpio.h
index e17669772..fa439bd9c 100644
--- a/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/include/connect_gpio.h
+++ b/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/include/connect_gpio.h
@@ -27,7 +27,9 @@
 extern "C" {
 #endif
 
-int Stm32HwGpioInit(void);
+#define IMXRT_GET_PIN(PORTx, PIN)  (32 * (PORTx - 1) + (PIN & 31))    /* PORTx:1,2,3,4,5 */
+
+int Imxrt1052HwGpioInit(void);
 
 #ifdef __cplusplus
 }
diff --git a/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/include/connect_i2c.h b/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/include/connect_i2c.h
index a06675be0..4ac207c5f 100755
--- a/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/include/connect_i2c.h
+++ b/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/include/connect_i2c.h
@@ -37,7 +37,7 @@ typedef struct Stm32I2c
 
 #define i2c_print KPrintf
 
-int Imrt1052HwI2cInit(void);
+int Imxrt1052HwI2cInit(void);
 
 #ifdef __cplusplus
 }
diff --git a/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/include/connect_rtc.h b/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/include/connect_rtc.h
index 9cb2d4955..7428eeb59 100755
--- a/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/include/connect_rtc.h
+++ b/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/include/connect_rtc.h
@@ -31,7 +31,7 @@ void RtcI2cInit(void);
 status_t RtcI2cWrite(LPI2C_Type *base, uint32_t sub_addr, uint8_t *buf, uint16_t size);
 uint32_t RtcI2cRead(LPI2C_Type *base, uint32_t sub_addr, uint8_t *buf, uint16_t size);
 
-int Imrt1052HwRtcInit(void);
+int Imxrt1052HwRtcInit(void);
 
 #endif
 
diff --git a/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/include/connect_sdio.h b/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/include/connect_sdio.h
index 1ee7effc3..768e0ac3a 100644
--- a/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/include/connect_sdio.h
+++ b/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/include/connect_sdio.h
@@ -32,7 +32,7 @@
 extern "C" {
 #endif
 
-int Imrt1052HwSdioInit(void);
+int Imxrt1052HwSdioInit(void);
 
 #ifdef __cplusplus
 }
diff --git a/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/include/connect_spi.h b/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/include/connect_spi.h
index c033f17f0..98e7fe8ba 100755
--- a/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/include/connect_spi.h
+++ b/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/include/connect_spi.h
@@ -45,7 +45,7 @@ struct Stm32Spi
     struct SpiBus spi_bus;
 };
 
-int Imrt1052HwSpiInit(void);
+int Imxrt1052HwSpiInit(void);
 x_err_t HwSpiDeviceAttach(const char *bus_name, const char *device_name);
 
 #ifdef __cplusplus
diff --git a/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/include/connect_uart.h b/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/include/connect_uart.h
index 88611e569..ed16fa967 100644
--- a/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/include/connect_uart.h
+++ b/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/include/connect_uart.h
@@ -31,7 +31,7 @@ extern "C" {
 #define KERNEL_CONSOLE_DRV_NAME    SERIAL_DRV_NAME_1
 #define KERNEL_CONSOLE_DEVICE_NAME SERIAL_1_DEVICE_NAME_0
 
-int Imrt1052HwUartInit(void);
+int Imxrt1052HwUartInit(void);
 
 #ifdef __cplusplus
 }
diff --git a/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/include/connect_usb.h b/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/include/connect_usb.h
index 53a036428..a6ae58829 100644
--- a/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/include/connect_usb.h
+++ b/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/include/connect_usb.h
@@ -44,7 +44,7 @@ extern "C" {
 
 #define USB_SINGLE_BLOCK_SIZE 512
 
-int Imrt1052HwUsbHostInit(void);
+int Imxrt1052HwUsbHostInit(void);
 
 #ifdef __cplusplus
 }
diff --git a/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/rtc/connect_rtc.c b/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/rtc/connect_rtc.c
index 6aab5e080..3112e23dd 100755
--- a/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/rtc/connect_rtc.c
+++ b/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/rtc/connect_rtc.c
@@ -405,7 +405,7 @@ static int BoardRtcDevBend(void)
     return  ret;
 }
 
-int Imrt1052HwRtcInit(void)
+int Imxrt1052HwRtcInit(void)
 {
     x_err_t ret = EOK;
     static struct RtcBus rtc_bus;
diff --git a/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/sdio/connect_sdio.c b/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/sdio/connect_sdio.c
index fb48923de..b29bc4fe6 100644
--- a/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/sdio/connect_sdio.c
+++ b/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/sdio/connect_sdio.c
@@ -269,7 +269,7 @@ static struct SdioDevDone dev_done =
     SdioRead,
 };
 
-int Imrt1052HwSdioInit(void)
+int Imxrt1052HwSdioInit(void)
 {
     x_err_t ret = EOK;
     bool is_read_only;
diff --git a/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/spi/connect_spi.c b/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/spi/connect_spi.c
index abfe5adc9..5e23f02e1 100755
--- a/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/spi/connect_spi.c
+++ b/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/spi/connect_spi.c
@@ -913,7 +913,7 @@ x_err_t HwSpiDeviceAttach(const char *bus_name, const char *device_name)
     return result;
 }
 
-int Imrt1052HwSpiInit(void)
+int Imxrt1052HwSpiInit(void)
 {
     return Stm32HwSpiBusInit();
 }
diff --git a/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/uart/connect_uart.c b/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/uart/connect_uart.c
index 7c722c79d..5a6040af7 100644
--- a/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/uart/connect_uart.c
+++ b/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/uart/connect_uart.c
@@ -294,21 +294,21 @@ static int BoardSerialBusInit(struct SerialBus *serial_bus, struct SerialDriver
     /*Init the serial bus */
     ret = SerialBusInit(serial_bus, bus_name);
     if (EOK != ret) {
-        KPrintf("Imrt1052HwUartInit SerialBusInit error %d\n", ret);
+        KPrintf("Imxrt1052HwUartInit SerialBusInit error %d\n", ret);
         return ERROR;
     }
 
     /*Init the serial driver*/
     ret = SerialDriverInit(serial_driver, drv_name);
     if (EOK != ret) {
-        KPrintf("Imrt1052HwUartInit SerialDriverInit error %d\n", ret);
+        KPrintf("Imxrt1052HwUartInit SerialDriverInit error %d\n", ret);
         return ERROR;
     }
 
     /*Attach the serial driver to the serial bus*/
     ret = SerialDriverAttachToBus(drv_name, bus_name);
     if (EOK != ret) {
-        KPrintf("Imrt1052HwUartInit SerialDriverAttachToBus error %d\n", ret);
+        KPrintf("Imxrt1052HwUartInit SerialDriverAttachToBus error %d\n", ret);
         return ERROR;
     }
 
@@ -322,20 +322,20 @@ static int BoardSerialDevBend(struct SerialHardwareDevice *serial_device, void *
 
     ret = SerialDeviceRegister(serial_device, serial_param, dev_name);
     if (EOK != ret) {
-        KPrintf("Imrt1052HwUartInit SerialDeviceInit device %s error %d\n", dev_name, ret);
+        KPrintf("Imxrt1052HwUartInit SerialDeviceInit device %s error %d\n", dev_name, ret);
         return ERROR;
     }
 
     ret = SerialDeviceAttachToBus(dev_name, bus_name);
     if (EOK != ret) {
-        KPrintf("Imrt1052HwUartInit SerialDeviceAttachToBus device %s error %d\n", dev_name, ret);
+        KPrintf("Imxrt1052HwUartInit SerialDeviceAttachToBus device %s error %d\n", dev_name, ret);
         return ERROR;
     }
 
     return  ret;
 }
 
-int Imrt1052HwUartInit(void)
+int Imxrt1052HwUartInit(void)
 {
     x_err_t ret = EOK;
 
@@ -361,13 +361,13 @@ int Imrt1052HwUartInit(void)
 
     ret = BoardSerialBusInit(&serial_bus_1, &serial_driver_1, SERIAL_BUS_NAME_1, SERIAL_DRV_NAME_1);
     if (EOK != ret) {
-        KPrintf("Imrt1052HwUartInit uart error ret %u\n", ret);
+        KPrintf("Imxrt1052HwUartInit uart error ret %u\n", ret);
         return ERROR;
     }
 
     ret = BoardSerialDevBend(&serial_device_1, (void *)&serial_cfg_1, SERIAL_BUS_NAME_1, SERIAL_1_DEVICE_NAME_0);
     if (EOK != ret) {
-        KPrintf("Imrt1052HwUartInit uart error ret %u\n", ret);
+        KPrintf("Imxrt1052HwUartInit uart error ret %u\n", ret);
         return ERROR;
     }
 #endif
@@ -394,13 +394,13 @@ int Imrt1052HwUartInit(void)
 
     ret = BoardSerialBusInit(&serial_bus_2, &serial_driver_2, SERIAL_BUS_NAME_2, SERIAL_DRV_NAME_2);
     if (EOK != ret) {
-        KPrintf("Imrt1052HwUartInit uart error ret %u\n", ret);
+        KPrintf("Imxrt1052HwUartInit uart error ret %u\n", ret);
         return ERROR;
     }
 
     ret = BoardSerialDevBend(&serial_device_2, (void *)&serial_cfg_2, SERIAL_BUS_NAME_2, SERIAL_2_DEVICE_NAME_0);
     if (EOK != ret) {
-        KPrintf("Imrt1052HwUartInit uart error ret %u\n", ret);
+        KPrintf("Imxrt1052HwUartInit uart error ret %u\n", ret);
         return ERROR;
     }
 #endif
diff --git a/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/usb/connect_usb.c b/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/usb/connect_usb.c
index 6c30282ed..28d4320f2 100644
--- a/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/usb/connect_usb.c
+++ b/Ubiquitous/XiZi/board/ok1052-c/third_party_driver/usb/connect_usb.c
@@ -256,7 +256,7 @@ static int BoardUsbDevBend(void)
 }
 
 /*OK1052-C BOARD USB INIT*/
-int Imrt1052HwUsbHostInit(void)
+int Imxrt1052HwUsbHostInit(void)
 {
     x_err_t ret = EOK;
     int32 usb_host_task = 0;
@@ -284,9 +284,9 @@ int Imrt1052HwUsbHostInit(void)
     usb_host_task = KTaskCreate("usbh", UsbHostTask, NONE,
                            USB_HOST_STACK_SIZE, 8);
     if(usb_host_task < 0) {
-		KPrintf("usb_host_task create failed ...%s %d.\n", __FUNCTION__,__LINE__);
-		return ERROR;
-	}
+        KPrintf("usb_host_task create failed ...%s %d.\n", __FUNCTION__,__LINE__);
+        return ERROR;
+    }
 
     StartupKTask(usb_host_task);
 
diff --git a/Ubiquitous/XiZi/board/xidatong/board.c b/Ubiquitous/XiZi/board/xidatong/board.c
index a29053915..6844ef96f 100644
--- a/Ubiquitous/XiZi/board/xidatong/board.c
+++ b/Ubiquitous/XiZi/board/xidatong/board.c
@@ -8,9 +8,9 @@
 /**
  * @file board.c
  * @brief relative configure for xidatong
- * @version 1.0
+ * @version 2.0
  * @author AIIT XUOS Lab
- * @date 2021.11.11
+ * @date 2022.03.15
  */
 
 /*************************************************
@@ -18,28 +18,17 @@ File name: board.c
 Description: support imxrt1052-board init function
 Others: take SDK_2.6.1_MIMXRT1052xxxxB for references
 History: 
-1. Date: 2022-01-25
+1. Date: 2022-03-15
 Author: AIIT XUOS Lab
 Modification: 
 1. support imxrt1052-board MPU、clock、memory init
-2. support imxrt1052-board uart、semc、sdio driver init
+2. support imxrt1052-board uart、sdio driver init
 *************************************************/
 
 #include "fsl_common.h"
 #include "board.h"
 #include "pin_mux.h"
 
-#ifdef BSP_USING_SDIO
-extern int Imrt1052HwSdioInit(void);
-#endif
-
-#ifdef BSP_USING_SEMC
-extern status_t BOARD_InitSEMC(void);
-#ifdef BSP_USING_EXTSRAM
-extern int ExtSramInit(void);
-#endif
-#endif
-
 #if defined(FS_VFS) && defined(MOUNT_SDCARD)
 #include <iot-vfs.h>
 
@@ -65,295 +54,21 @@ int MountSDCard(void)
 #include "fsl_gpio.h"
 #include "fsl_lpuart.h"
 
+#ifdef BSP_USING_GPIO
+#include <connect_gpio.h>
+#endif
+
 #ifdef BSP_USING_LPUART
 #include <connect_uart.h>
 #endif
 
-#define NVIC_PRIORITYGROUP_0         0x00000007U /*!< 0 bits for pre-emption priority
-                                                      4 bits for subpriority */
-#define NVIC_PRIORITYGROUP_1         0x00000006U /*!< 1 bits for pre-emption priority
-                                                      3 bits for subpriority */
-#define NVIC_PRIORITYGROUP_2         0x00000005U /*!< 2 bits for pre-emption priority
-                                                      2 bits for subpriority */
-#define NVIC_PRIORITYGROUP_3         0x00000004U /*!< 3 bits for pre-emption priority
-                                                      1 bits for subpriority */
-#define NVIC_PRIORITYGROUP_4         0x00000003U /*!< 4 bits for pre-emption priority
-
-
-
-/*******************************************************************************
- * Variables
- ******************************************************************************/
-
-/*******************************************************************************
- * Code
- ******************************************************************************/
-
-#if 0
-/* Get debug console frequency. */
-uint32_t BOARD_DebugConsoleSrcFreq(void)
-{
-    uint32_t freq;
-
-    /* To make it simple, we assume default PLL and divider settings, and the only variable
-       from application is use PLL3 source or OSC source */
-    if (CLOCK_GetMux(kCLOCK_UartMux) == 0) /* PLL3 div6 80M */
-    {
-        freq = (CLOCK_GetPllFreq(kCLOCK_PllUsb1) / 6U) / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U);
-    }
-    else
-    {
-        freq = CLOCK_GetOscFreq() / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U);
-    }
-
-    return freq;
-}
-
-/* Initialize debug console. */
-void BOARD_InitDebugConsole(void)
-{
-    uint32_t uartClkSrcFreq = BOARD_DebugConsoleSrcFreq();
-
-    DbgConsole_Init(BOARD_DEBUG_UART_INSTANCE, BOARD_DEBUG_UART_BAUDRATE, BOARD_DEBUG_UART_TYPE, uartClkSrcFreq);
-}
-
-#if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED
-void BOARD_LPI2C_Init(LPI2C_Type *base, uint32_t clkSrc_Hz)
-{
-    lpi2c_master_config_t lpi2cConfig = {0};
-
-    /*
-     * lpi2cConfig.debugEnable = false;
-     * lpi2cConfig.ignoreAck = false;
-     * lpi2cConfig.pinConfig = kLPI2C_2PinOpenDrain;
-     * lpi2cConfig.baudRate_Hz = 100000U;
-     * lpi2cConfig.busIdleTimeout_ns = 0;
-     * lpi2cConfig.pinLowTimeout_ns = 0;
-     * lpi2cConfig.sdaGlitchFilterWidth_ns = 0;
-     * lpi2cConfig.sclGlitchFilterWidth_ns = 0;
-     */
-    LPI2C_MasterGetDefaultConfig(&lpi2cConfig);
-    LPI2C_MasterInit(base, &lpi2cConfig, clkSrc_Hz);
-}
-
-status_t BOARD_LPI2C_Send(LPI2C_Type *base,
-                          uint8_t deviceAddress,
-                          uint32_t subAddress,
-                          uint8_t subAddressSize,
-                          uint8_t *txBuff,
-                          uint8_t txBuffSize)
-{
-    status_t reVal;
-
-    /* Send master blocking data to slave */
-    reVal = LPI2C_MasterStart(base, deviceAddress, kLPI2C_Write);
-    if (kStatus_Success == reVal)
-    {
-        while (LPI2C_MasterGetStatusFlags(base) & kLPI2C_MasterNackDetectFlag)
-        {
-        }
-
-        reVal = LPI2C_MasterSend(base, &subAddress, subAddressSize);
-        if (reVal != kStatus_Success)
-        {
-            return reVal;
-        }
-
-        reVal = LPI2C_MasterSend(base, txBuff, txBuffSize);
-        if (reVal != kStatus_Success)
-        {
-            return reVal;
-        }
-
-        reVal = LPI2C_MasterStop(base);
-        if (reVal != kStatus_Success)
-        {
-            return reVal;
-        }
-    }
-
-    return reVal;
-}
-
-status_t BOARD_LPI2C_Receive(LPI2C_Type *base,
-                             uint8_t deviceAddress,
-                             uint32_t subAddress,
-                             uint8_t subAddressSize,
-                             uint8_t *rxBuff,
-                             uint8_t rxBuffSize)
-{
-    status_t reVal;
-
-    reVal = LPI2C_MasterStart(base, deviceAddress, kLPI2C_Write);
-    if (kStatus_Success == reVal)
-    {
-        while (LPI2C_MasterGetStatusFlags(base) & kLPI2C_MasterNackDetectFlag)
-        {
-        }
-
-        reVal = LPI2C_MasterSend(base, &subAddress, subAddressSize);
-        if (reVal != kStatus_Success)
-        {
-            return reVal;
-        }
-
-        reVal = LPI2C_MasterRepeatedStart(base, deviceAddress, kLPI2C_Read);
-
-        if (reVal != kStatus_Success)
-        {
-            return reVal;
-        }
-
-        reVal = LPI2C_MasterReceive(base, rxBuff, rxBuffSize);
-        if (reVal != kStatus_Success)
-        {
-            return reVal;
-        }
-
-        reVal = LPI2C_MasterStop(base);
-        if (reVal != kStatus_Success)
-        {
-            return reVal;
-        }
-    }
-    return reVal;
-}
-
-status_t BOARD_LPI2C_SendSCCB(LPI2C_Type *base,
-                              uint8_t deviceAddress,
-                              uint32_t subAddress,
-                              uint8_t subAddressSize,
-                              uint8_t *txBuff,
-                              uint8_t txBuffSize)
-{
-    return BOARD_LPI2C_Send(base, deviceAddress, subAddress, subAddressSize, txBuff, txBuffSize);
-}
-
-status_t BOARD_LPI2C_ReceiveSCCB(LPI2C_Type *base,
-                                 uint8_t deviceAddress,
-                                 uint32_t subAddress,
-                                 uint8_t subAddressSize,
-                                 uint8_t *rxBuff,
-                                 uint8_t rxBuffSize)
-{
-    status_t reVal;
-
-    reVal = LPI2C_MasterStart(base, deviceAddress, kLPI2C_Write);
-    if (kStatus_Success == reVal)
-    {
-        while (LPI2C_MasterGetStatusFlags(base) & kLPI2C_MasterNackDetectFlag)
-        {
-        }
-
-        reVal = LPI2C_MasterSend(base, &subAddress, subAddressSize);
-        if (reVal != kStatus_Success)
-        {
-            return reVal;
-        }
-
-        /* SCCB does not support LPI2C repeat start, must stop then start. */
-        reVal = LPI2C_MasterStop(base);
-
-        if (reVal != kStatus_Success)
-        {
-            return reVal;
-        }
-
-        reVal = LPI2C_MasterStart(base, deviceAddress, kLPI2C_Read);
-
-        if (reVal != kStatus_Success)
-        {
-            return reVal;
-        }
-
-        reVal = LPI2C_MasterReceive(base, rxBuff, rxBuffSize);
-        if (reVal != kStatus_Success)
-        {
-            return reVal;
-        }
-
-        reVal = LPI2C_MasterStop(base);
-        if (reVal != kStatus_Success)
-        {
-            return reVal;
-        }
-    }
-    return reVal;
-}
-
-void BOARD_Accel_I2C_Init(void)
-{
-    BOARD_LPI2C_Init(BOARD_ACCEL_I2C_BASEADDR, BOARD_ACCEL_I2C_CLOCK_FREQ);
-}
-
-status_t BOARD_Accel_I2C_Send(uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint32_t txBuff)
-{
-    uint8_t data = (uint8_t)txBuff;
-
-    return BOARD_LPI2C_Send(BOARD_ACCEL_I2C_BASEADDR, deviceAddress, subAddress, subaddressSize, &data, 1);
-}
-
-status_t BOARD_Accel_I2C_Receive(
-    uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint8_t *rxBuff, uint8_t rxBuffSize)
-{
-    return BOARD_LPI2C_Receive(BOARD_ACCEL_I2C_BASEADDR, deviceAddress, subAddress, subaddressSize, rxBuff, rxBuffSize);
-}
-
-void BOARD_Codec_I2C_Init(void)
-{
-    BOARD_LPI2C_Init(BOARD_CODEC_I2C_BASEADDR, BOARD_CODEC_I2C_CLOCK_FREQ);
-}
-
-status_t BOARD_Codec_I2C_Send(
-    uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize)
-{
-    return BOARD_LPI2C_Send(BOARD_CODEC_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, (uint8_t *)txBuff,
-                            txBuffSize);
-}
-
-status_t BOARD_Codec_I2C_Receive(
-    uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize)
-{
-    return BOARD_LPI2C_Receive(BOARD_CODEC_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, rxBuff, rxBuffSize);
-}
-
-void BOARD_Camera_I2C_Init(void)
-{
-    CLOCK_SetMux(kCLOCK_Lpi2cMux, BOARD_CAMERA_I2C_CLOCK_SOURCE_SELECT);
-    CLOCK_SetDiv(kCLOCK_Lpi2cDiv, BOARD_CAMERA_I2C_CLOCK_SOURCE_DIVIDER);
-    BOARD_LPI2C_Init(BOARD_CAMERA_I2C_BASEADDR, BOARD_CAMERA_I2C_CLOCK_FREQ);
-}
-
-status_t BOARD_Camera_I2C_Send(
-    uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize)
-{
-    return BOARD_LPI2C_Send(BOARD_CAMERA_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, (uint8_t *)txBuff,
-                            txBuffSize);
-}
-
-status_t BOARD_Camera_I2C_Receive(
-    uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize)
-{
-    return BOARD_LPI2C_Receive(BOARD_CAMERA_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, rxBuff,
-                               rxBuffSize);
-}
-
-status_t BOARD_Camera_I2C_SendSCCB(
-    uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize)
-{
-    return BOARD_LPI2C_SendSCCB(BOARD_CAMERA_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, (uint8_t *)txBuff,
-                                txBuffSize);
-}
-
-status_t BOARD_Camera_I2C_ReceiveSCCB(
-    uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize)
-{
-    return BOARD_LPI2C_ReceiveSCCB(BOARD_CAMERA_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, rxBuff,
-                                   rxBuffSize);
-}
-#endif /* SDK_I2C_BASED_COMPONENT_USED */
+#ifdef BSP_USING_CH438
+#include <connect_ch438.h>
 #endif
 
+#ifdef BSP_USING_SDIO
+#include <connect_sdio.h>
+#endif
 
 void BOARD_SD_Pin_Config(uint32_t speed, uint32_t strength)
 {
@@ -558,7 +273,6 @@ void BOARD_ConfigMPU(void)
     SCB_EnableICache();
 }
 
-
 /* This is the timer interrupt service routine. */
 void SysTick_Handler(int irqn, void *arg)
 {
@@ -566,60 +280,8 @@ void SysTick_Handler(int irqn, void *arg)
 }
 DECLARE_HW_IRQ(SYSTICK_IRQN, SysTick_Handler, NONE);
 
-#ifdef BSP_USING_LPUART
-void imxrt_uart_pins_init(void)
-{
-#ifdef BSP_USING_LPUART1
-
-        IOMUXC_SetPinMux(
-            IOMUXC_GPIO_AD_B0_12_LPUART1_TX,        /* GPIO_AD_B0_12 is configured as LPUART1_TX */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-        IOMUXC_SetPinMux(
-            IOMUXC_GPIO_AD_B0_13_LPUART1_RX,        /* GPIO_AD_B0_13 is configured as LPUART1_RX */
-            0U);                                    /* Software Input On Field: Input Path is determined by functionality */
-        IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_AD_B0_12_LPUART1_TX,        /* GPIO_AD_B0_12 PAD functional properties : */
-            0x10B0u);                               /* Slew Rate Field: Slow Slew Rate
-                                                     Drive Strength Field: R0/6
-                                                     Speed Field: medium(100MHz)
-                                                     Open Drain Enable Field: Open Drain Disabled
-                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                     Pull / Keep Select Field: Keeper
-                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                     Hyst. Enable Field: Hysteresis Disabled */
-        IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_AD_B0_13_LPUART1_RX,        /* GPIO_AD_B0_13 PAD functional properties : */
-            0x10B0u);                               /* Slew Rate Field: Slow Slew Rate
-                                                     Drive Strength Field: R0/6
-                                                     Speed Field: medium(100MHz)
-                                                     Open Drain Enable Field: Open Drain Disabled
-                                                     Pull / Keep Enable Field: Pull/Keeper Enabled
-                                                     Pull / Keep Select Field: Keeper
-                                                     Pull Up / Down Config. Field: 100K Ohm Pull Down
-                                                     Hyst. Enable Field: Hysteresis Disabled */
-#endif
-#ifdef BSP_USING_LPUART2
-
-        IOMUXC_SetPinMux(
-            IOMUXC_GPIO_AD_B1_02_LPUART2_TX,
-            0U);
-        IOMUXC_SetPinMux(
-            IOMUXC_GPIO_AD_B1_03_LPUART2_RX,
-            0U);
-        IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_AD_B1_02_LPUART2_TX,
-            0x10B0u);
-        IOMUXC_SetPinConfig(
-            IOMUXC_GPIO_AD_B1_03_LPUART2_RX,
-            0x10B0u);
-
-#endif
-
-}
-#endif /* BSP_USING_LPUART */
-
 /**
- * This function will initial rt1050 board.
+ * This function will initial imxrt1050 board.
  */
 void InitBoardHardware()
 {
@@ -627,56 +289,35 @@ void InitBoardHardware()
     BOARD_InitPins();
     BOARD_BootClockRUN();
 
-#ifndef BSP_USING_LWIP
     NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
     SysTick_Config(SystemCoreClock / TICK_PER_SECOND);
+
+#ifdef BSP_USING_GPIO
+    Imxrt1052HwGpioInit();
 #endif
 
 #ifdef BSP_USING_LPUART
-    imxrt_uart_pins_init();
+    BOARD_InitUartPins();
+#endif
+
+#ifdef BSP_USING_CH438
+    BOARD_InitCh438Pins();
 #endif
 
     InitBoardMemory((void *)HEAP_BEGIN, (void *)HEAP_END);
-#ifdef BSP_USING_SEMC
-    CLOCK_InitSysPfd(kCLOCK_Pfd2, 29);
-    /* Set semc clock to 163.86 MHz */
-    CLOCK_SetMux(kCLOCK_SemcMux, 1);
-    CLOCK_SetDiv(kCLOCK_SemcDiv, 1);
-
-    if (BOARD_InitSEMC() != kStatus_Success) {
-        KPrintf("\r\n SEMC Init Failed\r\n");
-    }
-#ifdef MEM_EXTERN_SRAM
-    else {
-        ExtSramInit();
-    }
-#endif
-#endif
-
-#ifdef BSP_USING_LWIP
-    ETH_BSP_Config();
-#endif
 
 #ifdef BSP_USING_LPUART
-    Imrt1052HwUartInit();
+    Imxrt1052HwUartInit();
 #endif
 
-#ifdef BSP_USING_ADC
-    Imrt1052HwAdcInit();
-#endif
-
-#ifdef BSP_USING_SPI
-    Imrt1052HwSpiInit();
-#endif
-
-#ifdef BSP_USING_RTC
-    Imrt1052HwRtcInit();
+#ifdef BSP_USING_CH438
+    Imxrt1052HwCh438Init();
 #endif
 
     InstallConsole(KERNEL_CONSOLE_BUS_NAME, KERNEL_CONSOLE_DRV_NAME, KERNEL_CONSOLE_DEVICE_NAME);
 
 #ifdef BSP_USING_SDIO
-    Imrt1052HwSdioInit();
+    Imxrt1052HwSdioInit();
 #endif
 
 }
diff --git a/Ubiquitous/XiZi/board/xidatong/include/board.h b/Ubiquitous/XiZi/board/xidatong/include/board.h
index 4ed824d20..b0a207fb5 100755
--- a/Ubiquitous/XiZi/board/xidatong/include/board.h
+++ b/Ubiquitous/XiZi/board/xidatong/include/board.h
@@ -49,55 +49,17 @@ void InitBoardHardware(void);
  * Definitions
  ******************************************************************************/
 /*! @brief The board name */
-#define BOARD_NAME "IMXRT1050-EVKB"
+#define BOARD_NAME "IMXRT1050"
 
-/* The UART to use for debug messages. */
-#define BOARD_DEBUG_UART_TYPE kSerialPort_Uart
-#define BOARD_DEBUG_UART_BASEADDR (uint32_t) LPUART1
-#define BOARD_DEBUG_UART_INSTANCE 1U
-
-#define BOARD_DEBUG_UART_CLK_FREQ BOARD_DebugConsoleSrcFreq()
-
-#define BOARD_UART_IRQ LPUART1_IRQn
-#define BOARD_UART_IRQ_HANDLER LPUART1_IRQHandler
-
-#ifndef BOARD_DEBUG_UART_BAUDRATE
-#define BOARD_DEBUG_UART_BAUDRATE (115200U)
-#endif /* BOARD_DEBUG_UART_BAUDRATE */
-
-/*! @brief The USER_LED used for board */
-#define LOGIC_LED_ON (0U)
-#define LOGIC_LED_OFF (1U)
-#ifndef BOARD_USER_LED_GPIO
-#define BOARD_USER_LED_GPIO GPIO1
-#endif
-#ifndef BOARD_USER_LED_GPIO_PIN
-#define BOARD_USER_LED_GPIO_PIN (9U)
-#endif
-
-#define USER_LED_INIT(output)                                            \
-    GPIO_PinWrite(BOARD_USER_LED_GPIO, BOARD_USER_LED_GPIO_PIN, output); \
-    BOARD_USER_LED_GPIO->GDIR |= (1U << BOARD_USER_LED_GPIO_PIN) /*!< Enable target USER_LED */
-#define USER_LED_ON() \
-    GPIO_PortClear(BOARD_USER_LED_GPIO, 1U << BOARD_USER_LED_GPIO_PIN)                  /*!< Turn off target USER_LED */
-#define USER_LED_OFF() GPIO_PortSet(BOARD_USER_LED_GPIO, 1U << BOARD_USER_LED_GPIO_PIN) /*!<Turn on target USER_LED*/
-#define USER_LED_TOGGLE()                                       \
-    GPIO_PinWrite(BOARD_USER_LED_GPIO, BOARD_USER_LED_GPIO_PIN, \
-                  0x1 ^ GPIO_PinRead(BOARD_USER_LED_GPIO, BOARD_USER_LED_GPIO_PIN)) /*!< Toggle target USER_LED */
-
-/*! @brief Define the port interrupt number for the board switches */
-#ifndef BOARD_USER_BUTTON_GPIO
-#define BOARD_USER_BUTTON_GPIO GPIO5
-#endif
-#ifndef BOARD_USER_BUTTON_GPIO_PIN
-#define BOARD_USER_BUTTON_GPIO_PIN (0U)
-#endif
-#define BOARD_USER_BUTTON_IRQ GPIO5_Combined_0_15_IRQn
-#define BOARD_USER_BUTTON_IRQ_HANDLER GPIO5_Combined_0_15_IRQHandler
-#define BOARD_USER_BUTTON_NAME "SW8"
-
-/*! @brief The hyper flash size */
-#define BOARD_FLASH_SIZE (0x4000000U)
+#define NVIC_PRIORITYGROUP_0         0x00000007U /*!< 0 bits for pre-emption priority
+                                                      4 bits for subpriority */
+#define NVIC_PRIORITYGROUP_1         0x00000006U /*!< 1 bits for pre-emption priority
+                                                      3 bits for subpriority */
+#define NVIC_PRIORITYGROUP_2         0x00000005U /*!< 2 bits for pre-emption priority
+                                                      2 bits for subpriority */
+#define NVIC_PRIORITYGROUP_3         0x00000004U /*!< 3 bits for pre-emption priority
+                                                      1 bits for subpriority */
+#define NVIC_PRIORITYGROUP_4         0x00000003U /*!< 4 bits for pre-emption priority*/
 
 /*! @brief The ENET PHY address. */
 #define BOARD_ENET0_PHY_ADDRESS (0x02U) /* Phy address of enet port 0. */
@@ -186,40 +148,6 @@ void InitBoardHardware(void);
 #define BOARD_SD_HOST_SUPPORT_SDR104_FREQ (200000000U)
 #define BOARD_SD_HOST_SUPPORT_HS200_FREQ (180000000U)
 
-/*! @brief The WIFI-QCA shield pin. */
-#define BOARD_INITGT202SHIELD_PWRON_GPIO GPIO1                    /*!< GPIO device name: GPIO */
-#define BOARD_INITGT202SHIELD_PWRON_PORT 1U                       /*!< PORT device index: 1 */
-#define BOARD_INITGT202SHIELD_PWRON_GPIO_PIN 3U                   /*!< PIO4 pin index: 3 */
-#define BOARD_INITGT202SHIELD_PWRON_PIN_NAME GPIO1_3              /*!< Pin name */
-#define BOARD_INITGT202SHIELD_PWRON_LABEL "PWRON"                 /*!< Label */
-#define BOARD_INITGT202SHIELD_PWRON_NAME "PWRON"                  /*!< Identifier name */
-#define BOARD_INITGT202SHIELD_PWRON_DIRECTION kGPIO_DigitalOutput /*!< Direction */
-
-#define BOARD_INITGT202SHIELD_IRQ_GPIO GPIO1                   /*!< GPIO device name: GPIO */
-#define BOARD_INITGT202SHIELD_IRQ_PORT 1U                      /*!< PORT device index: 1 */
-#define BOARD_INITGT202SHIELD_IRQ_GPIO_PIN 19U                 /*!< PIO1 pin index: 19 */
-#define BOARD_INITGT202SHIELD_IRQ_PIN_NAME GPIO1_19            /*!< Pin name */
-#define BOARD_INITGT202SHIELD_IRQ_LABEL "IRQ"                  /*!< Label */
-#define BOARD_INITGT202SHIELD_IRQ_NAME "IRQ"                   /*!< Identifier name */
-#define BOARD_INITGT202SHIELD_IRQ_DIRECTION kGPIO_DigitalInput /*!< Direction */
-
-/*! @brief The WIFI-QCA Silex 2401 shield pin. */
-#define BOARD_INITSILEX2401SHIELD_PWRON_GPIO GPIO1                    /*!< GPIO device name: GPIO */
-#define BOARD_INITSILEX2401SHIELD_PWRON_PORT 1U                       /*!< PORT device index: 1 */
-#define BOARD_INITSILEX2401SHIELD_PWRON_GPIO_PIN 9U                   /*!< PIO4 pin index: 9 */
-#define BOARD_INITSILEX2401SHIELD_PWRON_PIN_NAME GPIO1_9              /*!< Pin name */
-#define BOARD_INITSILEX2401SHIELD_PWRON_LABEL "PWRON"                 /*!< Label */
-#define BOARD_INITSILEX2401SHIELD_PWRON_NAME "PWRON"                  /*!< Identifier name */
-#define BOARD_INITSILEX2401SHIELD_PWRON_DIRECTION kGPIO_DigitalOutput /*!< Direction */
-
-#define BOARD_INITSILEX2401SHIELD_IRQ_GPIO GPIO1                   /*!< GPIO device name: GPIO */
-#define BOARD_INITSILEX2401SHIELD_IRQ_PORT 1U                      /*!< PORT device index: 1 */
-#define BOARD_INITSILEX2401SHIELD_IRQ_GPIO_PIN 11U                 /*!< PIO1 pin index: 11 */
-#define BOARD_INITSILEX2401SHIELD_IRQ_PIN_NAME GPIO1_11            /*!< Pin name */
-#define BOARD_INITSILEX2401SHIELD_IRQ_LABEL "IRQ"                  /*!< Label */
-#define BOARD_INITSILEX2401SHIELD_IRQ_NAME "IRQ"                   /*!< Identifier name */
-#define BOARD_INITSILEX2401SHIELD_IRQ_DIRECTION kGPIO_DigitalInput /*!< Direction */
-
 /* @Brief Board accelerator sensor configuration */
 #define BOARD_ACCEL_I2C_BASEADDR LPI2C1
 /* Select USB1 PLL (480 MHz) as LPI2C's clock source */
@@ -234,71 +162,11 @@ void InitBoardHardware(void);
 #define BOARD_CODEC_I2C_CLOCK_SOURCE_DIVIDER (5U)
 #define BOARD_CODEC_I2C_CLOCK_FREQ (10000000U)
 
-/* @Brief Board CAMERA configuration */
-#define BOARD_CAMERA_I2C_BASEADDR LPI2C1
-#define BOARD_CAMERA_I2C_CLOCK_SOURCE_DIVIDER (5U)
-#define BOARD_CAMERA_I2C_CLOCK_SOURCE_SELECT (0U) /* Select USB1 PLL (480 MHz) as LPI2C's clock source */
-#define BOARD_CAMERA_I2C_CLOCK_FREQ \
-    (CLOCK_GetFreq(kCLOCK_Usb1PllClk) / 8 / (BOARD_CAMERA_I2C_CLOCK_SOURCE_DIVIDER + 1U))
-
 #if defined(__cplusplus)
 extern "C" {
 #endif /* __cplusplus */
 
-/*******************************************************************************
- * API
- ******************************************************************************/
-uint32_t BOARD_DebugConsoleSrcFreq(void);
-
-void BOARD_InitDebugConsole(void);
-
 void BOARD_ConfigMPU(void);
-#if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED
-void BOARD_LPI2C_Init(LPI2C_Type *base, uint32_t clkSrc_Hz);
-status_t BOARD_LPI2C_Send(LPI2C_Type *base,
-                          uint8_t deviceAddress,
-                          uint32_t subAddress,
-                          uint8_t subaddressSize,
-                          uint8_t *txBuff,
-                          uint8_t txBuffSize);
-status_t BOARD_LPI2C_Receive(LPI2C_Type *base,
-                             uint8_t deviceAddress,
-                             uint32_t subAddress,
-                             uint8_t subaddressSize,
-                             uint8_t *rxBuff,
-                             uint8_t rxBuffSize);
-status_t BOARD_LPI2C_SendSCCB(LPI2C_Type *base,
-                              uint8_t deviceAddress,
-                              uint32_t subAddress,
-                              uint8_t subaddressSize,
-                              uint8_t *txBuff,
-                              uint8_t txBuffSize);
-status_t BOARD_LPI2C_ReceiveSCCB(LPI2C_Type *base,
-                                 uint8_t deviceAddress,
-                                 uint32_t subAddress,
-                                 uint8_t subaddressSize,
-                                 uint8_t *rxBuff,
-                                 uint8_t rxBuffSize);
-void BOARD_Accel_I2C_Init(void);
-status_t BOARD_Accel_I2C_Send(uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint32_t txBuff);
-status_t BOARD_Accel_I2C_Receive(
-    uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint8_t *rxBuff, uint8_t rxBuffSize);
-void BOARD_Codec_I2C_Init(void);
-status_t BOARD_Codec_I2C_Send(
-    uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize);
-status_t BOARD_Codec_I2C_Receive(
-    uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize);
-void BOARD_Camera_I2C_Init(void);
-status_t BOARD_Camera_I2C_Send(
-    uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize);
-status_t BOARD_Camera_I2C_Receive(
-    uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize);
-
-status_t BOARD_Camera_I2C_SendSCCB(
-    uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize);
-status_t BOARD_Camera_I2C_ReceiveSCCB(
-    uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize);
-#endif /* SDK_I2C_BASED_COMPONENT_USED */
 void BOARD_SD_Pin_Config(uint32_t speed, uint32_t strength);
 void BOARD_MMC_Pin_Config(uint32_t speed, uint32_t strength);
 
diff --git a/Ubiquitous/XiZi/board/xidatong/include/pin_mux.h b/Ubiquitous/XiZi/board/xidatong/include/pin_mux.h
index f45a8ccc0..c7e6746bb 100755
--- a/Ubiquitous/XiZi/board/xidatong/include/pin_mux.h
+++ b/Ubiquitous/XiZi/board/xidatong/include/pin_mux.h
@@ -73,6 +73,8 @@ void BOARD_InitBootPins(void);
 void BOARD_InitPins(void);
 void BOARD_InitI2C1Pins(void);
 void BOARD_InitSPIPins(void);
+void BOARD_InitUartPins(void);
+void BOARD_InitCh438Pins(void);
 
 #if defined(__cplusplus)
 }
diff --git a/Ubiquitous/XiZi/board/xidatong/third_party_driver/Kconfig b/Ubiquitous/XiZi/board/xidatong/third_party_driver/Kconfig
index 0e2268df6..3277d6e95 100644
--- a/Ubiquitous/XiZi/board/xidatong/third_party_driver/Kconfig
+++ b/Ubiquitous/XiZi/board/xidatong/third_party_driver/Kconfig
@@ -6,11 +6,17 @@ menuconfig BSP_USING_LPUART
         source "$BSP_DIR/third_party_driver/uart/Kconfig"
     endif
 
+menuconfig BSP_USING_CH438
+    bool "Using CH438 device"
+    default n
+    if BSP_USING_CH438
+        source "$BSP_DIR/third_party_driver/ch438/Kconfig"
+    endif
+
 menuconfig BSP_USING_GPIO
     bool "Using GPIO device "
     default y
     select RESOURCES_PIN
-
     if BSP_USING_GPIO
         source "$BSP_DIR/third_party_driver/gpio/Kconfig"
     endif
diff --git a/Ubiquitous/XiZi/board/xidatong/third_party_driver/Makefile b/Ubiquitous/XiZi/board/xidatong/third_party_driver/Makefile
index 9d4dac375..7d1446aa2 100644
--- a/Ubiquitous/XiZi/board/xidatong/third_party_driver/Makefile
+++ b/Ubiquitous/XiZi/board/xidatong/third_party_driver/Makefile
@@ -4,6 +4,10 @@ ifeq ($(CONFIG_BSP_USING_LPUART),y)
   SRC_DIR += uart
 endif
 
+ifeq ($(CONFIG_BSP_USING_CH438),y)
+  SRC_DIR += ch438
+endif
+
 ifeq ($(CONFIG_BSP_USING_SDIO),y)
   SRC_DIR += sdio
 endif
diff --git a/Ubiquitous/XiZi/board/xidatong/third_party_driver/common/pin_mux.c b/Ubiquitous/XiZi/board/xidatong/third_party_driver/common/pin_mux.c
index 40cc867f4..27013148d 100755
--- a/Ubiquitous/XiZi/board/xidatong/third_party_driver/common/pin_mux.c
+++ b/Ubiquitous/XiZi/board/xidatong/third_party_driver/common/pin_mux.c
@@ -1103,6 +1103,141 @@ void BOARD_InitI2C1Pins ( void )
                                                  Pull Up / Down Config. Field: 22K Ohm Pull Up
                                                  Hyst. Enable Field: Hysteresis Disabled */
 }
+
+void BOARD_InitUartPins(void)
+{
+#ifdef BSP_USING_LPUART1
+    IOMUXC_SetPinMux(
+        IOMUXC_GPIO_AD_B0_12_LPUART1_TX,        /* GPIO_AD_B0_12 is configured as LPUART1_TX */
+        0U);                                    /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinMux(
+        IOMUXC_GPIO_AD_B0_13_LPUART1_RX,        /* GPIO_AD_B0_13 is configured as LPUART1_RX */
+        0U);                                    /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinConfig(
+        IOMUXC_GPIO_AD_B0_12_LPUART1_TX,        /* GPIO_AD_B0_12 PAD functional properties : */
+        0x10B0u);                               /* Slew Rate Field: Slow Slew Rate
+                                                    Drive Strength Field: R0/6
+                                                    Speed Field: medium(100MHz)
+                                                    Open Drain Enable Field: Open Drain Disabled
+                                                    Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                    Pull / Keep Select Field: Keeper
+                                                    Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                    Hyst. Enable Field: Hysteresis Disabled */
+    IOMUXC_SetPinConfig(
+        IOMUXC_GPIO_AD_B0_13_LPUART1_RX,        /* GPIO_AD_B0_13 PAD functional properties : */
+        0x10B0u);                               /* Slew Rate Field: Slow Slew Rate
+                                                    Drive Strength Field: R0/6
+                                                    Speed Field: medium(100MHz)
+                                                    Open Drain Enable Field: Open Drain Disabled
+                                                    Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                    Pull / Keep Select Field: Keeper
+                                                    Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                    Hyst. Enable Field: Hysteresis Disabled */
+#endif
+#ifdef BSP_USING_LPUART2
+    IOMUXC_SetPinMux(
+        IOMUXC_GPIO_AD_B1_02_LPUART2_TX,
+        0U);
+    IOMUXC_SetPinMux(
+        IOMUXC_GPIO_AD_B1_03_LPUART2_RX,
+        0U);
+    IOMUXC_SetPinConfig(
+        IOMUXC_GPIO_AD_B1_02_LPUART2_TX,
+        0x10B0u);
+    IOMUXC_SetPinConfig(
+        IOMUXC_GPIO_AD_B1_03_LPUART2_RX,
+        0x10B0u);
+#endif
+}
+
+void BOARD_InitCh438Pins(void)
+{
+    IOMUXC_SetPinMux(
+        IOMUXC_GPIO_AD_B1_09_GPIO1_IO25,        /* GPIO1_IO25 is configured as CH438_DATA0 */
+        0U);
+    IOMUXC_SetPinMux(
+        IOMUXC_GPIO_AD_B1_08_GPIO1_IO24,        /* GPIO1_IO24 is configured as CH438_DATA1 */
+        0U);
+    IOMUXC_SetPinMux(
+        IOMUXC_GPIO_AD_B1_04_GPIO1_IO20,        /* GPIO1_IO20 is configured as CH438_DATA2 */
+        0U);
+    IOMUXC_SetPinMux(
+        IOMUXC_GPIO_AD_B1_05_GPIO1_IO21,        /* GPIO1_IO21 is configured as CH438_DATA3 */
+        0U);
+    IOMUXC_SetPinMux(
+        IOMUXC_GPIO_AD_B1_15_GPIO1_IO31,        /* GPIO1_IO31 is configured as CH438_DATA4 */
+        0U);
+    IOMUXC_SetPinMux(
+        IOMUXC_GPIO_AD_B1_12_GPIO1_IO28,        /* GPIO1_IO28 is configured as CH438_DATA5 */
+        0U);
+    IOMUXC_SetPinMux(
+        IOMUXC_GPIO_AD_B1_14_GPIO1_IO30,        /* GPIO1_IO30 is configured as CH438_DATA6 */
+        0U);
+    IOMUXC_SetPinMux(
+        IOMUXC_GPIO_AD_B1_13_GPIO1_IO29,        /* GPIO1_IO29 is configured as CH438_DATA7 */
+        0U);
+    IOMUXC_SetPinMux(
+        IOMUXC_GPIO_SD_B1_04_GPIO3_IO04,        /* GPIO3_IO04 is configured as CH438_nWR */
+        0U);
+    IOMUXC_SetPinMux(
+        IOMUXC_GPIO_SD_B1_05_GPIO3_IO05,        /* GPIO3_IO05 is configured as CH438_nRD */
+        0U);
+    IOMUXC_SetPinMux(
+        IOMUXC_GPIO_SD_B1_02_GPIO3_IO02,        /* GPIO3_IO02 is configured as CH438_ALE */
+        0U);
+    IOMUXC_SetPinMux(
+        IOMUXC_GPIO_SD_B1_03_GPIO3_IO03,        /* GPIO3_IO03 is configured as CH438_INT */
+        0U);
+    IOMUXC_SetPinMux(
+        IOMUXC_GPIO_AD_B0_02_GPIO1_IO02,        /* GPIO3_IO02 is configured as CH438_485_A_DIR */
+        0U);
+    IOMUXC_SetPinMux(
+        IOMUXC_GPIO_AD_B0_00_GPIO1_IO00,        /* GPIO1_IO00 is configured as CH438_485_B_DIR */
+        0U);
+
+    IOMUXC_SetPinConfig(
+        IOMUXC_GPIO_AD_B1_09_GPIO1_IO25,        /* GPIO1_IO25 is configured as CH438_DATA0 */
+        0x10B0u);
+    IOMUXC_SetPinConfig(
+        IOMUXC_GPIO_AD_B1_08_GPIO1_IO24,        /* GPIO1_IO24 is configured as CH438_DATA1 */
+        0x10B0u);
+    IOMUXC_SetPinConfig(
+        IOMUXC_GPIO_AD_B1_04_GPIO1_IO20,        /* GPIO1_IO20 is configured as CH438_DATA2 */
+        0x10B0u);
+    IOMUXC_SetPinConfig(
+        IOMUXC_GPIO_AD_B1_05_GPIO1_IO21,        /* GPIO1_IO21 is configured as CH438_DATA3 */
+        0x10B0u);
+    IOMUXC_SetPinConfig(
+        IOMUXC_GPIO_AD_B1_15_GPIO1_IO31,        /* GPIO1_IO31 is configured as CH438_DATA4 */
+        0x10B0u);
+    IOMUXC_SetPinConfig(
+        IOMUXC_GPIO_AD_B1_12_GPIO1_IO28,        /* GPIO1_IO28 is configured as CH438_DATA5 */
+        0x10B0u);
+    IOMUXC_SetPinConfig(
+        IOMUXC_GPIO_AD_B1_14_GPIO1_IO30,        /* GPIO1_IO30 is configured as CH438_DATA6 */
+        0x10B0u);
+    IOMUXC_SetPinConfig(
+        IOMUXC_GPIO_AD_B1_13_GPIO1_IO29,        /* GPIO1_IO29 is configured as CH438_DATA7 */
+        0x10B0u);
+    IOMUXC_SetPinConfig(
+        IOMUXC_GPIO_SD_B1_04_GPIO3_IO04,        /* GPIO3_IO04 is configured as CH438_nWR */
+        0x10B0u);
+    IOMUXC_SetPinConfig(
+        IOMUXC_GPIO_SD_B1_05_GPIO3_IO05,        /* GPIO3_IO05 is configured as CH438_nRD */
+        0x10B0u);
+    IOMUXC_SetPinConfig(
+        IOMUXC_GPIO_SD_B1_02_GPIO3_IO02,        /* GPIO3_IO02 is configured as CH438_ALE */
+        0x10B0u);
+    IOMUXC_SetPinConfig(
+        IOMUXC_GPIO_SD_B1_03_GPIO3_IO03,        /* GPIO3_IO03 is configured as CH438_INT */
+        0x10B0u);
+    IOMUXC_SetPinConfig(
+        IOMUXC_GPIO_AD_B0_02_GPIO1_IO02,        /* GPIO3_IO02 is configured as CH438_485_A_DIR */
+        0x10B0u);
+    IOMUXC_SetPinConfig(
+        IOMUXC_GPIO_AD_B0_00_GPIO1_IO00,        /* GPIO1_IO00 is configured as CH438_485_B_DIR */
+        0x10B0u);
+}
 /***********************************************************************************************************************
  * EOF
  **********************************************************************************************************************/
diff --git a/Ubiquitous/XiZi/board/xidatong/third_party_driver/gpio/connect_gpio.c b/Ubiquitous/XiZi/board/xidatong/third_party_driver/gpio/connect_gpio.c
index fdc55b4d9..a61d7d035 100755
--- a/Ubiquitous/XiZi/board/xidatong/third_party_driver/gpio/connect_gpio.c
+++ b/Ubiquitous/XiZi/board/xidatong/third_party_driver/gpio/connect_gpio.c
@@ -1,39 +1,35 @@
 /*
- * Copyright (c) 2020 RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
- * Date           Author            Notes
- * 2018-11-06     balanceTWK        first version
- * 2019-04-23     WillianChan       Fix GPIO serial number disorder
-*/
+ * Date           Author       Notes
+ * 2018-4-30     misonyo     the first version.
+ */
 
 /**
 * @file connect_gpio.c
 * @brief support gpio function using bus driver framework
-* @version 1.0
+* @version 2.0
 * @author AIIT XUOS Lab
-* @date 2021-04-25
+* @date 2022-03-16
 */
 
 /*************************************************
 File name: connect_gpio.c
-Description: support  gpio configure and register to bus framework
-Others: take RT-Thread v4.0.2/bsp/stm32/libraries/HAL_Drivers/drv_gpio.c for references
+Description: support gpio configure and register to bus framework
+Others: take RT-Thread v4.0.2/bsp/imxrt/libraries/drivers/drv_gpio.c for references
                 https://github.com/RT-Thread/rt-thread/tree/v4.0.2
 History:
-1. Date: 2021-04-25
+1. Date: 2022-03-16
 Author: AIIT XUOS Lab
 Modification: add bus driver framework support for gpio
 *************************************************/
 
-#include <device.h>
-#include <board.h>
-
-#define STM32_PIN_NUMBERS 100 // [48, 64, 100, 144]
-
-#define ITEM_NUM(items) sizeof(items)/sizeof(items[0])
+#include <connect_gpio.h>
+#include <fsl_gpio.h>
+#include <fsl_iomuxc.h>
 
 struct PinIndex
 {
@@ -50,81 +46,196 @@ struct PinIrq
     uint32 exti_line;
 };
 
-static const struct PinIndex pins[] = {
-    {0, GPIO1, 0},
-    {1, GPIO1, 1},
-    {2, GPIO1, 2},
-    {3, GPIO1, 3},
-    {4, GPIO1, 4},
-    {5, GPIO1, 5},
-    {6, GPIO1, 6},
-    {7, GPIO1, 7},
-    {8, GPIO1, 8},
-    {9, GPIO1, 9},
-    {10, GPIO1, 10},
-    {11, GPIO1, 11},
-    {12, GPIO1, 12},
-    {13, GPIO1, 13},
-    {14, GPIO1, 14},
-    {15, GPIO1, 15},
-    {16, GPIO2, 0},
-    {17, GPIO2, 1},
-    {18, GPIO2, 2},
-    {19, GPIO2, 3},
-    {20, GPIO2, 4},
-    {21, GPIO2, 5},
-    {22, GPIO2, 6},
-    {23, GPIO2, 7},
-    {24, GPIO2, 8},
-    {25, GPIO2, 9},
-    {26, GPIO2, 10},
-    {27, GPIO2, 11},
-    {28, GPIO2, 12},
-    {29, GPIO2, 13},
-    {30, GPIO2, 14},
-    {31, GPIO2, 15},
-    {32, GPIO3, 0},
-    {33, GPIO3, 1},
-    {34, GPIO3, 2},
-    {35, GPIO3, 3},
-    {36, GPIO3, 4},
-    {37, GPIO3, 5},
-    {38, GPIO3, 6},
-    {39, GPIO3, 7},
-    {40, GPIO3, 8},
-    {41, GPIO3, 9},
-    {42, GPIO3, 10},
-    {43, GPIO3, 11},
-    {44, GPIO3, 12},
-    {45, GPIO3, 13},
-    {46, GPIO3, 14},
-    {47, GPIO3, 15},
-    {-1, 0u, -1}
+struct PinMask
+{
+    GPIO_Type *gpio;
+    uint32 valid_mask;
 };
 
-struct PinIrqHdr pin_irq_hdr_tab[] = {};
-
-const struct PinIndex *GetPin(uint8_t pin)
+static const IRQn_Type irq_tab[10] =
 {
-    const struct PinIndex *index;
+    GPIO1_Combined_0_15_IRQn,
+    GPIO1_Combined_16_31_IRQn,
+    GPIO2_Combined_0_15_IRQn,
+    GPIO2_Combined_16_31_IRQn,
+    GPIO3_Combined_0_15_IRQn,
+    GPIO3_Combined_16_31_IRQn,
+    GPIO4_Combined_0_15_IRQn,
+    GPIO4_Combined_16_31_IRQn,
+    GPIO5_Combined_0_15_IRQn,
+    GPIO5_Combined_16_31_IRQn
+};
 
-    if (pin < ITEM_NUM(pins)){
-        index = &pins[pin];
-        if (index->index == -1)
-            index = NONE;
-    }
-    else{
-        index = NONE;
+const struct PinMask pin_mask[] = 
+{
+    {GPIO1, 0xFFFFFFFF},     /* GPIO1 */
+    {GPIO2, 0xFFFFFFFF},     /* GPIO2 */
+    {GPIO3, 0x0FFFFFFF},     /* GPIO3,28~31 not supported */
+    {GPIO4, 0xFFFFFFFF},     /* GPIO4 */
+    {GPIO5, 0x00000007}      /* GPIO5,3~31 not supported */
+};
+
+struct PinIrqHdr pin_irq_hdr_tab[] = 
+{
+/* GPIO1 */
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    /* GPIO2 */
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    /* GPIO3 */
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    /* GPIO4 */
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    /* GPIO5 */
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+    {-1, 0, NONE, NONE},
+};
+
+static int GetPin(struct PinIndex *pin_index, uint8_t pin)
+{
+    pin_index->index = pin >> 5;//0:GPIO1 1:GPIO2 2:GPIO3 3:GPIO4 4:GPIO5 
+    pin_index->pin = pin & 31;//each GPIOx support 32 io
+    
+    if ((pin_index->index > 4) || ((pin_mask[pin_index->index].valid_mask & (1 << pin_index->pin)) == 0)) {
+        KPrintf("GetPin unsupport pin index %u pin %u\n", pin_index->index, pin_index->pin);
+        return -1;
     }
 
-    return index;
+    pin_index->gpio = pin_mask[pin_index->index].gpio;
+    return 0;
 }
 
-static int32 GpioConfigMode(int mode, const struct PinIndex* index)
+static int32 GpioConfigMode(int mode, struct PinIndex *index)
 {
     gpio_pin_config_t gpio_config;
     NULL_PARAM_CHECK(index);
 
+    gpio_config.outputLogic = 0;
+
     switch (mode)
     {
         case GPIO_CFG_OUTPUT:
@@ -137,14 +248,15 @@ static int32 GpioConfigMode(int mode, const struct PinIndex* index)
             break;
         case GPIO_CFG_INPUT_PULLUP:
             gpio_config.direction = kGPIO_DigitalInput;
-            gpio_config.interruptMode = kGPIO_IntRisingEdge;
+            gpio_config.interruptMode = kGPIO_NoIntmode;
             break;
         case GPIO_CFG_INPUT_PULLDOWN:
             gpio_config.direction = kGPIO_DigitalInput;
-            gpio_config.interruptMode = kGPIO_IntFallingEdge;
+            gpio_config.interruptMode = kGPIO_NoIntmode;
             break;
         case GPIO_CFG_OUTPUT_OD:
             gpio_config.direction = kGPIO_DigitalOutput;
+            gpio_config.interruptMode = kGPIO_NoIntmode;
             break;
         default:
             break;
@@ -153,97 +265,33 @@ static int32 GpioConfigMode(int mode, const struct PinIndex* index)
     return EOK;
 }
 
-static __inline int32 Bit2Bitnum(uint32 bit)
-{
-    for (int i = 0; i < 32; i++){
-        if ((1UL << i) == bit){
-            return i;
-        }
-    }
-    return -1;
-}
-
-static __inline int32 Bitno2Bit(uint32 bitno)
-{
-    if (bitno <= 32) {
-        return 1UL << bitno;
-    }
-    else {
-        return 0;
-    }
-}
-static const struct PinIrq *GetPinIrq(uint16_t pin)
-{
-    static struct PinIrq irq;
-    const struct PinIndex* index = GetPin(pin);
-
-    if (index == NONE) {
-        return NONE;
-    }
-
-    irq.exti_line = index->pin;
-    irq.pin_source = Bit2Bitnum(index->pin);
-    irq.port_source = ((uint32_t)index->gpio - GPIO1_BASE) / (GPIO2_BASE - GPIO1_BASE);
-    switch (irq.pin_source)
-    {
-        case 0 :
-            irq.irq_exti_channel = GPIO1_INT0_IRQn;
-            break;
-        case 1 :
-            irq.irq_exti_channel = GPIO1_INT1_IRQn;
-            break;
-        case 2 :
-            irq.irq_exti_channel = GPIO1_INT2_IRQn;
-            break;
-        case 3 :
-            irq.irq_exti_channel = GPIO1_INT3_IRQn;
-            break;
-        case 4 :
-            irq.irq_exti_channel = GPIO1_INT4_IRQn;
-            break;
-        case 5 :
-            irq.irq_exti_channel = GPIO1_INT5_IRQn;
-            break;
-        case 6 :
-            irq.irq_exti_channel = GPIO1_INT6_IRQn;
-            break;
-        case 7 :
-            irq.irq_exti_channel = GPIO1_INT7_IRQn;
-            break;
-        default :
-            return NONE;
-    }
-
-    return &irq;
-};
 static int32 GpioIrqRegister(int32 pin, int32 mode, void (*hdr)(void *args), void *args)
 {
-    const struct PinIndex* index = GetPin(pin);
-    int32 irqindex = -1;
+    struct PinIndex pin_index;
 
-    irqindex = Bit2Bitnum(index->pin);
-    if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_hdr_tab)) {
-        return -ENONESYS;
+    if (GetPin(&pin_index, pin) < 0) {
+        return ERROR;
     }
 
     x_base level = CriticalAreaLock();
-    if (pin_irq_hdr_tab[irqindex].pin == pin   &&
-        pin_irq_hdr_tab[irqindex].hdr == hdr   &&
-        pin_irq_hdr_tab[irqindex].mode == mode &&
-        pin_irq_hdr_tab[irqindex].args == args
+    if (pin_irq_hdr_tab[pin].pin == pin   &&
+        pin_irq_hdr_tab[pin].hdr == hdr   &&
+        pin_irq_hdr_tab[pin].mode == mode &&
+        pin_irq_hdr_tab[pin].args == args
     )
     {
         CriticalAreaUnLock(level);
         return EOK;
     }
-    if (pin_irq_hdr_tab[irqindex].pin != -1) {
+
+    if (pin_irq_hdr_tab[pin].pin != -1) {
         CriticalAreaUnLock(level);
         return -EDEV_BUSY;
     }
-    pin_irq_hdr_tab[irqindex].pin = pin;
-    pin_irq_hdr_tab[irqindex].hdr = hdr;
-    pin_irq_hdr_tab[irqindex].mode = mode;
-    pin_irq_hdr_tab[irqindex].args = args;
+    pin_irq_hdr_tab[pin].pin = pin;
+    pin_irq_hdr_tab[pin].hdr = hdr;
+    pin_irq_hdr_tab[pin].mode = mode;
+    pin_irq_hdr_tab[pin].args = args;
     CriticalAreaUnLock(level);
 
     return EOK;
@@ -251,23 +299,21 @@ static int32 GpioIrqRegister(int32 pin, int32 mode, void (*hdr)(void *args), voi
 
 static uint32 GpioIrqFree(int32 pin)
 {
-    const struct PinIndex* index = GetPin(pin);
-    int32 irqindex = -1;
+    struct PinIndex pin_index;
 
-    irqindex = Bit2Bitnum(index->pin);
-    if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_hdr_tab)) {
-        return -ENONESYS;
+    if (GetPin(&pin_index, pin) < 0) {
+        return ERROR;
     }
 
     x_base level = CriticalAreaLock();
-    if (pin_irq_hdr_tab[irqindex].pin == -1){
+    if (pin_irq_hdr_tab[pin].pin == -1){
         CriticalAreaUnLock(level);
         return EOK;
     }
-    pin_irq_hdr_tab[irqindex].pin  = -1;
-    pin_irq_hdr_tab[irqindex].hdr  = NONE;
-    pin_irq_hdr_tab[irqindex].mode = 0;
-    pin_irq_hdr_tab[irqindex].args = NONE;
+    pin_irq_hdr_tab[pin].pin  = -1;
+    pin_irq_hdr_tab[pin].hdr  = NONE;
+    pin_irq_hdr_tab[pin].mode = 0;
+    pin_irq_hdr_tab[pin].args = NONE;
     CriticalAreaUnLock(level);
 
     return EOK;
@@ -275,74 +321,81 @@ static uint32 GpioIrqFree(int32 pin)
 
 static int32 GpioIrqEnable(x_base pin)
 {
-    const struct PinIndex* index = GetPin(pin);
-    int32 irqindex = -1;
-    const struct PinIrq *irq;
-    gpio_pin_config_t gpio_config;
+    uint8_t irq_index;
+    gpio_interrupt_mode_t gpio_int_mode;
+    struct PinIndex pin_index;
 
-    irqindex = Bit2Bitnum(index->pin);
-    if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_hdr_tab)){
-        return -ENONESYS;
+    if (GetPin(&pin_index, pin) < 0) {
+        return ERROR;
     }
+
     x_base level = CriticalAreaLock();
-    if (pin_irq_hdr_tab[irqindex].pin == -1) {
+    if (pin_irq_hdr_tab[pin].pin == -1) {
         CriticalAreaUnLock(level);
         return -ENONESYS;
     }
 
-    irq = GetPinIrq(pin);
-    if (irq == NONE){
-        CriticalAreaUnLock(level);
-        return -ENONESYS;
-    }
-
-    switch (pin_irq_hdr_tab[irqindex].mode)
+    switch (pin_irq_hdr_tab[pin].mode)
     {
-    case GPIO_IRQ_EDGE_RISING:
-        gpio_config.direction = kGPIO_DigitalInput;
-        gpio_config.interruptMode = kGPIO_IntRisingEdge;
-        break;
-    case GPIO_IRQ_EDGE_FALLING:
-        gpio_config.direction = kGPIO_DigitalInput;
-        gpio_config.interruptMode = kGPIO_IntFallingEdge;
-        break;
-    case GPIO_IRQ_EDGE_BOTH:
-        gpio_config.direction = kGPIO_DigitalInput;
-        gpio_config.interruptMode = kGPIO_IntRisingOrFallingEdge;
-        break;
+        case GPIO_IRQ_EDGE_RISING:
+            gpio_int_mode = kGPIO_IntRisingEdge;
+            break;
+        case GPIO_IRQ_EDGE_FALLING:
+            gpio_int_mode = kGPIO_IntFallingEdge;
+            break;
+        case GPIO_IRQ_EDGE_BOTH:
+            gpio_int_mode = kGPIO_IntRisingOrFallingEdge;
+            break;
+        case GPIO_IRQ_LEVEL_HIGH:
+            gpio_int_mode = kGPIO_IntHighLevel;
+            break;
+        case GPIO_IRQ_LEVEL_LOW:
+            gpio_int_mode = kGPIO_IntLowLevel;
+            break;
+        default:
+            gpio_int_mode = kGPIO_IntRisingEdge;
+            break;
     }
 
-    GPIO_PinInit(index->gpio, index->pin, &gpio_config);
-    GPIO_PortEnableInterrupts(index->gpio, index->pin);
+    irq_index = (pin_index.index << 1) + (pin_index.pin >> 4);
+    GPIO_PinSetInterruptConfig(pin_index.gpio, pin_index.pin, gpio_int_mode);
+    GPIO_PortEnableInterrupts(pin_index.gpio, 1U << pin_index.pin);
+    NVIC_SetPriority(irq_tab[irq_index], NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 5, 0));
+    EnableIRQ(irq_tab[irq_index]);
     CriticalAreaUnLock(level);
     return EOK;
 }
 
 static int32 GpioIrqDisable(x_base pin)
 {
-    const struct PinIndex* index = GetPin(pin);
-    const struct PinIrq *irq;
+    struct PinIndex pin_index;
 
-    irq = GetPinIrq(index->pin);
-    NULL_PARAM_CHECK(irq);
+    if (GetPin(&pin_index, pin) < 0) {
+        return ERROR;
+    }
 
-    GPIO_PortDisableInterrupts(index->gpio, index->pin);
+    GPIO_PortDisableInterrupts(pin_index.gpio, 1U << pin_index.pin);
     return EOK;
 }
 
-static uint32 Stm32PinConfigure(struct PinParam *param)
+static uint32 Imxrt1052PinConfigure(struct PinParam *param)
 {
     NULL_PARAM_CHECK(param);
     int ret = EOK;
 
-    const struct PinIndex *index = GetPin(param->pin);
+    struct PinIndex pin_index;
+
+    if (GetPin(&pin_index, param->pin) < 0) {
+        return ERROR;
+    }
+
     switch(param->cmd)
     {
         case GPIO_CONFIG_MODE:
-            GpioConfigMode(param->mode, index);
+            GpioConfigMode(param->mode, &pin_index);
             break;
         case GPIO_IRQ_REGISTER:
-            ret = GpioIrqRegister(param->pin,param->irq_set.irq_mode,param->irq_set.hdr,param->irq_set.args);
+            ret = GpioIrqRegister(param->pin, param->irq_set.irq_mode, param->irq_set.hdr, param->irq_set.args);
             break;
         case GPIO_IRQ_FREE:
             ret = GpioIrqFree(param->pin);
@@ -361,7 +414,7 @@ static uint32 Stm32PinConfigure(struct PinParam *param)
     return ret;
 }
 
-static uint32 Stm32PinInit(void)
+static uint32 Imxrt1052PinInit(void)
 {
     static x_bool pin_init_flag = RET_FALSE;
 
@@ -372,7 +425,7 @@ static uint32 Stm32PinInit(void)
     return EOK;
 }
 
-static uint32 Stm32GpioDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
+static uint32 Imxrt1052GpioDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
 {
     NULL_PARAM_CHECK(drv);
     NULL_PARAM_CHECK(configure_info);
@@ -383,11 +436,11 @@ static uint32 Stm32GpioDrvConfigure(void *drv, struct BusConfigureInfo *configur
     switch (configure_info->configure_cmd)
     {
         case OPE_INT:
-            ret = Stm32PinInit();
+            ret = Imxrt1052PinInit();
             break;
         case OPE_CFG:
             param = (struct PinParam *)configure_info->private_data;
-            ret = Stm32PinConfigure(param);
+            ret = Imxrt1052PinConfigure(param);
             break;
         default:
             break;
@@ -396,47 +449,53 @@ static uint32 Stm32GpioDrvConfigure(void *drv, struct BusConfigureInfo *configur
     return ret;
 }
 
-uint32 Stm32PinWrite(void *dev, struct BusBlockWriteParam *write_param)
+uint32 Imxrt1052PinWrite(void *dev, struct BusBlockWriteParam *write_param)
 {
     NULL_PARAM_CHECK(dev);
     NULL_PARAM_CHECK(write_param);
-    struct PinStat *pinstat = (struct PinStat *)write_param->buffer;
-    const struct PinIndex* index = GetPin(pinstat->pin);
-    NULL_PARAM_CHECK(index);
+    struct PinStat *pin_stat = (struct PinStat *)write_param->buffer;
+    struct PinIndex pin_index;
+    
+    if (GetPin(&pin_index, pin_stat->pin) < 0) {
+        return ERROR;
+    }
 
-    if (GPIO_LOW == pinstat->val) {
-        GPIO_PinWrite(index->gpio, index->pin, 0);
+    if (GPIO_LOW == pin_stat->val) {
+        GPIO_PinWrite(pin_index.gpio, pin_index.pin, 0);
     } else {
-        GPIO_PinWrite(index->gpio, index->pin, 1);
+        GPIO_PinWrite(pin_index.gpio, pin_index.pin, 1);
     }
     return EOK;
 }
 
-uint32 Stm32PinRead(void *dev, struct BusBlockReadParam *read_param)
+uint32 Imxrt1052PinRead(void *dev, struct BusBlockReadParam *read_param)
 {
     NULL_PARAM_CHECK(dev);
     NULL_PARAM_CHECK(read_param);
-    struct PinStat *pinstat = (struct PinStat *)read_param->buffer;
-    const struct PinIndex* index = GetPin(pinstat->pin);
-    NULL_PARAM_CHECK(index);
-
-    if(GPIO_PinRead(index->gpio, index->pin) == GPIO_LOW) {
-        pinstat->val = GPIO_LOW;
-    } else {
-        pinstat->val = GPIO_HIGH;
+    struct PinStat *pin_stat = (struct PinStat *)read_param->buffer;
+    struct PinIndex pin_index;
+    
+    if (GetPin(&pin_index, pin_stat->pin) < 0) {
+        return ERROR;
     }
-    return pinstat->val;
+
+    if(GPIO_LOW == GPIO_PinRead(pin_index.gpio, pin_index.pin)) {
+        pin_stat->val = GPIO_LOW;
+    } else {
+        pin_stat->val = GPIO_HIGH;
+    }
+    return pin_stat->val;
 }
 
 static const struct PinDevDone dev_done =
 {
     .open  = NONE,
     .close = NONE,
-    .write = Stm32PinWrite,
-    .read  = Stm32PinRead,
+    .write = Imxrt1052PinWrite,
+    .read  = Imxrt1052PinRead,
 };
 
-int Stm32HwGpioInit(void)
+int Imxrt1052HwGpioInit(void)
 {
     x_err_t ret = EOK;
 
@@ -449,7 +508,7 @@ int Stm32HwGpioInit(void)
     }
 
     static struct PinDriver drv;
-    drv.configure = &Stm32GpioDrvConfigure;
+    drv.configure = Imxrt1052GpioDrvConfigure;
 
     ret = PinDriverInit(&drv, PIN_DRIVER_NAME, NONE);
     if (ret != EOK) {
@@ -479,66 +538,228 @@ int Stm32HwGpioInit(void)
     return ret;
 }
 
-static __inline void PinIrqHdr(int irqno)
+static __inline void PinIrqHdr(uint32_t index_offset, uint8_t pin_start, GPIO_Type *gpio)
 {
-    const struct PinIndex* index = GetPin(irqno);
-    const struct PinIrq *irq;
+    int i;
+    uint32_t isr_status, pin;
+    struct PinIndex pin_index;
 
-    irq = GetPinIrq(index->pin);
-    NULL_PARAM_CHECK(irq);
+    isr_status = GPIO_PortGetInterruptFlags(gpio) & gpio->IMR;
 
-    GPIO_ClearPinsInterruptFlags(index->gpio, index->pin);
+    for (i = pin_start; i <= pin_start + 15 ; i ++) {
 
-    if (pin_irq_hdr_tab[irqno].hdr){
-       pin_irq_hdr_tab[irqno].hdr(pin_irq_hdr_tab[irqno].args);
+        if (GetPin(&pin_index, i + index_offset) < 0) {
+            continue;
+        }
+
+        if (isr_status & (1 << i)) {
+            GPIO_PortClearInterruptFlags(gpio, (1 << i));
+            pin = index_offset + i;
+            if (pin_irq_hdr_tab[pin].hdr) {
+                pin_irq_hdr_tab[pin].hdr(pin_irq_hdr_tab[pin].args);
+            }
+        }
     }
 }
 
-void EXTI0_IRQHandler(int irq_num, void *arg)
+void GPIO1_0_15_IRQHandler(int irq_num, void *arg)
 {
-    PinIrqHdr(0);
-}
-DECLARE_HW_IRQ(GPIO1_INT0_IRQn, EXTI0_IRQHandler, NONE);
+    x_base lock = 0;
+    lock = DISABLE_INTERRUPT();
 
-void EXTI1_IRQHandler(int irq_num, void *arg)
+    PinIrqHdr(0, 0, GPIO1);
+
+    ENABLE_INTERRUPT(lock);
+}
+DECLARE_HW_IRQ(GPIO1_Combined_0_15_IRQn, GPIO1_0_15_IRQHandler, NONE);
+
+void GPIO1_16_31_IRQHandler(int irq_num, void *arg)
 {
-    PinIrqHdr(1);
-}
-DECLARE_HW_IRQ(GPIO1_INT1_IRQn, EXTI1_IRQHandler, NONE);
+    x_base lock = 0;
+    lock = DISABLE_INTERRUPT();
 
-void EXTI2_IRQHandler(int irq_num, void *arg)
+    PinIrqHdr(0, 15, GPIO1);
+
+    ENABLE_INTERRUPT(lock);
+}
+DECLARE_HW_IRQ(GPIO1_Combined_16_31_IRQn, GPIO1_16_31_IRQHandler, NONE);
+
+void GPIO2_0_15_IRQHandler(int irq_num, void *arg)
 {
-    PinIrqHdr(2);
-}
-DECLARE_HW_IRQ(GPIO1_INT2_IRQn, EXTI2_IRQHandler, NONE);
+    x_base lock = 0;
+    lock = DISABLE_INTERRUPT();
 
-void EXTI3_IRQHandler(int irq_num, void *arg)
+    PinIrqHdr(32, 0, GPIO2);
+
+    ENABLE_INTERRUPT(lock);
+}
+DECLARE_HW_IRQ(GPIO2_Combined_0_15_IRQn, GPIO2_0_15_IRQHandler, NONE);
+
+void GPIO2_16_31_IRQHandler(int irq_num, void *arg)
 {
-    PinIrqHdr(3);
-}
-DECLARE_HW_IRQ(GPIO1_INT3_IRQn, EXTI3_IRQHandler, NONE);
+    x_base lock = 0;
+    lock = DISABLE_INTERRUPT();
 
-void EXTI4_IRQHandler(int irq_num, void *arg)
+    PinIrqHdr(32, 15, GPIO2);
+
+    ENABLE_INTERRUPT(lock);
+}
+DECLARE_HW_IRQ(GPIO2_Combined_16_31_IRQn, GPIO2_16_31_IRQHandler, NONE);
+
+void GPIO3_0_15_IRQHandler(int irq_num, void *arg)
 {
-    PinIrqHdr(4);
-}
-DECLARE_HW_IRQ(GPIO1_INT4_IRQn, EXTI4_IRQHandler, NONE);
+    x_base lock = 0;
+    lock = DISABLE_INTERRUPT();
 
-void EXTI5_IRQHandler(int irq_num, void *arg)
+    PinIrqHdr(64, 0, GPIO3);
+
+    ENABLE_INTERRUPT(lock);
+}
+DECLARE_HW_IRQ(GPIO3_Combined_0_15_IRQn, GPIO3_0_15_IRQHandler, NONE);
+
+void GPIO3_16_31_IRQHandler(int irq_num, void *arg)
 {
-    PinIrqHdr(5);
-}
-DECLARE_HW_IRQ(GPIO1_INT5_IRQn, EXTI5_IRQHandler, NONE);
+    x_base lock = 0;
+    lock = DISABLE_INTERRUPT();
 
-void EXTI6_IRQHandler(int irq_num, void *arg)
+    PinIrqHdr(64, 15, GPIO3);
+
+    ENABLE_INTERRUPT(lock);
+}
+DECLARE_HW_IRQ(GPIO3_Combined_16_31_IRQn, GPIO3_16_31_IRQHandler, NONE);
+
+void GPIO4_0_15_IRQHandler(int irq_num, void *arg)
 {
-    PinIrqHdr(6);
-}
-DECLARE_HW_IRQ(GPIO1_INT6_IRQn, EXTI6_IRQHandler, NONE);
+    x_base lock = 0;
+    lock = DISABLE_INTERRUPT();
 
-void EXTI7_IRQHandler(int irq_num, void *arg)
+    PinIrqHdr(96, 0, GPIO4);
+
+    ENABLE_INTERRUPT(lock);
+}
+DECLARE_HW_IRQ(GPIO4_Combined_0_15_IRQn, GPIO4_0_15_IRQHandler, NONE);
+
+void GPIO4_16_31_IRQHandler(int irq_num, void *arg)
 {
-    PinIrqHdr(7);
-}
-DECLARE_HW_IRQ(GPIO1_INT7_IRQn, EXTI7_IRQHandler, NONE);
+    x_base lock = 0;
+    lock = DISABLE_INTERRUPT();
+
+    PinIrqHdr(96, 15, GPIO4);
+
+    ENABLE_INTERRUPT(lock);
+}
+DECLARE_HW_IRQ(GPIO4_Combined_16_31_IRQn, GPIO4_16_31_IRQHandler, NONE);
+
+void GPIO5_0_15_IRQHandler(int irq_num, void *arg)
+{
+    x_base lock = 0;
+    lock = DISABLE_INTERRUPT();
+
+    PinIrqHdr(128, 0, GPIO5);
+
+    ENABLE_INTERRUPT(lock);
+}
+DECLARE_HW_IRQ(GPIO5_Combined_0_15_IRQn, GPIO5_0_15_IRQHandler, NONE);
+
+void GPIO5_16_31_IRQHandler(int irq_num, void *arg)
+{
+    x_base lock = 0;
+    lock = DISABLE_INTERRUPT();
+
+    PinIrqHdr(128, 15, GPIO5);
+
+    ENABLE_INTERRUPT(lock);
+}
+DECLARE_HW_IRQ(GPIO5_Combined_16_31_IRQn, GPIO5_16_31_IRQHandler, NONE);
+
+#ifdef GPIO_LED_TEST
+static void GpioLedDelay(void)
+{
+    volatile uint32_t i = 0;
+    for (i = 0; i < 8000000; ++i)
+    {
+        __asm("NOP"); /* delay */
+    }
+}
+
+void GpioLedTest(void)
+{
+	BusType pin;
+    struct BusConfigureInfo configure_info;
+	struct BusBlockWriteParam write_param;
+
+    int ret = 0;
+    bool pinSet = 1;
+
+    pin = BusFind(PIN_BUS_NAME);
+    if (!pin) {
+        KPrintf("find %s failed!\n", PIN_BUS_NAME);
+        return;
+    }
+    pin->owner_driver = BusFindDriver(pin, PIN_DRIVER_NAME);
+    pin->owner_haldev = BusFindDevice(pin, PIN_DEVICE_NAME);
+
+	configure_info.configure_cmd = OPE_INT;
+    ret = BusDrvConfigure(pin->owner_driver, &configure_info);
+    if (ret != EOK) {
+        KPrintf("initialize %s failed!\n", PIN_BUS_NAME);
+        return;
+    }
+
+    IOMUXC_SetPinMux(
+        IOMUXC_GPIO_AD_B0_09_GPIO1_IO09,        /* GPIO_AD_B0_09 is configured as GPIO1_IO09 */
+        0U);                                    /* Software Input On Field: Input Path is determined by functionality */
+                                    /* Software Input On Field: Input Path is determined by functionality */
+    IOMUXC_SetPinConfig(
+        IOMUXC_GPIO_AD_B0_09_GPIO1_IO09,        /* GPIO_AD_B0_09 PAD functional properties : */
+        0x10B0u);                               /* Slew Rate Field: Slow Slew Rate
+                                                    Drive Strength Field: R0/6
+                                                    Speed Field: medium(100MHz)
+                                                    Open Drain Enable Field: Open Drain Disabled
+                                                    Pull / Keep Enable Field: Pull/Keeper Enabled
+                                                    Pull / Keep Select Field: Keeper
+                                                    Pull Up / Down Config. Field: 100K Ohm Pull Down
+                                                    Hyst. Enable Field: Hysteresis Disabled */
+    
+    struct PinParam led_gpio_param;
+    struct PinStat led_gpio_stat;
+
+    /* config led pin as output*/
+    led_gpio_param.cmd = GPIO_CONFIG_MODE;
+    led_gpio_param.pin = IMXRT_GET_PIN(1, 9);
+    led_gpio_param.mode = GPIO_CFG_OUTPUT_OD;
+
+	configure_info.configure_cmd = OPE_CFG;
+	configure_info.private_data = (void *)&led_gpio_param;
+    ret = BusDrvConfigure(pin->owner_driver, &configure_info);
+    if (ret != EOK) {
+        KPrintf("config pin %d failed!\n", IMXRT_GET_PIN(1, 9));
+        return;
+    }
+
+    while (1) {
+
+        GpioLedDelay();
+
+        if (pinSet) {
+            /* set led pin as high*/
+            led_gpio_stat.pin = IMXRT_GET_PIN(1, 9);
+            led_gpio_stat.val = GPIO_HIGH;
+            write_param.buffer = (void *)&led_gpio_stat;
+            BusDevWriteData(pin->owner_haldev, &write_param);
+            pinSet = 0;
+        } else {
+            /* set led pin as low*/
+            led_gpio_stat.pin = IMXRT_GET_PIN(1, 9);
+            led_gpio_stat.val = GPIO_LOW;
+            write_param.buffer = (void *)&led_gpio_stat;
+            BusDevWriteData(pin->owner_haldev, &write_param);
+            pinSet = 1;
+        }
+
+    }
+}
+SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN),
+                                                GpioLedTest, GpioLedTest, GpioLedTest GPIO1 IO09 LED);
+#endif
 
diff --git a/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/connect_gpio.h b/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/connect_gpio.h
index 6737550a8..f9da70b31 100644
--- a/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/connect_gpio.h
+++ b/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/connect_gpio.h
@@ -13,9 +13,9 @@
 /**
 * @file connect_gpio.h
 * @brief define imxrt1052-board gpio function and struct
-* @version 1.0
+* @version 2.0
 * @author AIIT XUOS Lab
-* @date 2022-03-01
+* @date 2022-03-15
 */
 
 #ifndef __CONNECT_GPIO_H_
@@ -27,7 +27,9 @@
 extern "C" {
 #endif
 
-int Stm32HwGpioInit(void);
+#define IMXRT_GET_PIN(PORTx, PIN)  (32 * (PORTx - 1) + (PIN & 31))    /* PORTx:1,2,3,4,5 */
+
+int Imxrt1052HwGpioInit(void);
 
 #ifdef __cplusplus
 }
diff --git a/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/connect_sdio.h b/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/connect_sdio.h
index 12ea93024..6adf230c8 100644
--- a/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/connect_sdio.h
+++ b/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/connect_sdio.h
@@ -13,9 +13,9 @@
 /**
 * @file connect_sdio.h
 * @brief define imxrt1052-board sdio function and struct
-* @version 2.0 
+* @version 2.0
 * @author AIIT XUOS Lab
-* @date 2022-01-24
+* @date 2022-03-15
 */
  
 #ifndef CONNECT_SDIO_H
@@ -32,7 +32,7 @@
 extern "C" {
 #endif
 
-int Imrt1052HwSdioInit(void);
+int Imxrt1052HwSdioInit(void);
 
 #ifdef __cplusplus
 }
diff --git a/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/connect_uart.h b/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/connect_uart.h
index 58eedb0bd..4b4c947a8 100644
--- a/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/connect_uart.h
+++ b/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/connect_uart.h
@@ -13,9 +13,9 @@
 /**
 * @file connect_uart.h
 * @brief define imxrt1052-board usart function and struct
-* @version 1.0 
+* @version 2.0
 * @author AIIT XUOS Lab
-* @date 2021-05-28
+* @date 2022-03-15
 */
 
 #ifndef CONNECT_UART_H
@@ -33,7 +33,7 @@ extern "C" {
 #define KERNEL_CONSOLE_DRV_NAME        SERIAL_DRV_NAME_1
 #define KERNEL_CONSOLE_DEVICE_NAME SERIAL_1_DEVICE_NAME_0
 
-int Imrt1052HwUartInit(void);
+int Imxrt1052HwUartInit(void);
 
 #ifdef __cplusplus
 }
diff --git a/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/connect_usb.h b/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/connect_usb.h
index 917ad6274..9736f50b6 100644
--- a/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/connect_usb.h
+++ b/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/connect_usb.h
@@ -13,9 +13,9 @@
 /**
 * @file connect_usb.h
 * @brief define imxrt1052-board usb function and struct
-* @version 2.0 
+* @version 2.0
 * @author AIIT XUOS Lab
-* @date 2022-02-09
+* @date 2022-03-15
 */
 
 #ifndef CONNECT_USB_H
@@ -44,7 +44,7 @@ extern "C" {
 
 #define USB_SINGLE_BLOCK_SIZE 512
 
-int Imrt1052HwUsbHostInit(void);
+int Imxrt1052HwUsbHostInit(void);
 
 #ifdef __cplusplus
 }
diff --git a/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_cache.h b/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_cache.h
index d82e88b80..e5f67ed80 100755
--- a/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_cache.h
+++ b/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_cache.h
@@ -9,9 +9,9 @@
 /**
  * @file fsl_cache.h
  * @brief cache drivers
- * @version 1.0
+ * @version 2.0
  * @author AIIT XUOS Lab
- * @date 2021.11.11
+ * @date 2022-03-15
  */
 
 #ifndef _FSL_CACHE_H_
diff --git a/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_clock.h b/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_clock.h
index a781e8e8f..3dfefede9 100755
--- a/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_clock.h
+++ b/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_clock.h
@@ -8,9 +8,9 @@
 /**
  * @file fsl_clock.h
  * @brief clock drivers
- * @version 1.0
+ * @version 2.0
  * @author AIIT XUOS Lab
- * @date 2021.11.11
+ * @date 2022-03-15
  */
 
 #ifndef _FSL_CLOCK_H_
diff --git a/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_common.h b/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_common.h
index 3410e8416..6d07932ef 100755
--- a/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_common.h
+++ b/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_common.h
@@ -9,9 +9,9 @@
 /**
  * @file fsl_common.h
  * @brief common drivers header
- * @version 1.0
+ * @version 2.0
  * @author AIIT XUOS Lab
- * @date 2021.11.11
+ * @date 2022-03-15
  */
 
 #ifndef _FSL_COMMON_H_
diff --git a/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_debug_console.h b/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_debug_console.h
deleted file mode 100755
index 500bb7bf4..000000000
--- a/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_debug_console.h
+++ /dev/null
@@ -1,213 +0,0 @@
-/*
- * Copyright (c) 2013 - 2015, Freescale Semiconductor, Inc.
- * Copyright 2016-2018 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- *
- * Debug console shall provide input and output functions to scan and print formatted data.
- * o Support a format specifier for PRINTF follows this prototype "%[flags][width][.precision][length]specifier"
- *   - [flags] :'-', '+', '#', ' ', '0'
- *   - [width]:  number (0,1...)
- *   - [.precision]: number (0,1...)
- *   - [length]: do not support
- *   - [specifier]: 'd', 'i', 'f', 'F', 'x', 'X', 'o', 'p', 'u', 'c', 's', 'n'
- * o Support a format specifier for SCANF follows this prototype " %[*][width][length]specifier"
- *   - [*]: is supported.
- *   - [width]: number (0,1...)
- *   - [length]: 'h', 'hh', 'l','ll','L'. ignore ('j','z','t')
- *   - [specifier]: 'd', 'i', 'u', 'f', 'F', 'e', 'E', 'g', 'G', 'a', 'A', 'o', 'c', 's'
- */
-
-#ifndef _FSL_DEBUGCONSOLE_H_
-#define _FSL_DEBUGCONSOLE_H_
-
-#include "fsl_common.h"
-#include "serial_manager.h"
-
-/*!
- * @addtogroup debugconsole
- * @{
- */
-
-/*******************************************************************************
- * Definitions
- ******************************************************************************/
-
-extern serial_handle_t g_serialHandle; /*!< serial manager handle */
-
-/*! @brief Definition select redirect toolchain printf, scanf to uart or not. */
-#define DEBUGCONSOLE_REDIRECT_TO_TOOLCHAIN 0U /*!< Select toolchain printf and scanf. */
-#define DEBUGCONSOLE_REDIRECT_TO_SDK 1U       /*!< Select SDK version printf, scanf. */
-#define DEBUGCONSOLE_DISABLE 2U               /*!< Disable debugconsole function. */
-
-/*! @brief Definition to select sdk or toolchain printf, scanf. The macro only support
- * to be redefined in project setting.
- */
-#ifndef SDK_DEBUGCONSOLE
-#define SDK_DEBUGCONSOLE 1U
-#endif
-
-/*! @brief Definition to select redirect toolchain printf, scanf to uart or not. */
-#ifndef SDK_DEBUGCONSOLE_UART
-/* mcux will handle this macro, not define it here */
-#if (!defined(__MCUXPRESSO))
-#define SDK_DEBUGCONSOLE_UART
-#endif
-#endif
-
-#if defined(SDK_DEBUGCONSOLE) && !(SDK_DEBUGCONSOLE)
-#include <stdio.h>
-#endif
-
-/*! @brief Definition to select redirect toolchain printf, scanf to uart or not.
- *
- *  if SDK_DEBUGCONSOLE defined to 0,it represents select toolchain printf, scanf.
- *  if SDK_DEBUGCONSOLE defined to 1,it represents select SDK version printf, scanf.
- *  if SDK_DEBUGCONSOLE defined to 2,it represents disable debugconsole function.
- */
-#if SDK_DEBUGCONSOLE == DEBUGCONSOLE_DISABLE /* Disable debug console */
-#define PRINTF
-#define SCANF
-#define PUTCHAR
-#define GETCHAR
-#elif SDK_DEBUGCONSOLE == DEBUGCONSOLE_REDIRECT_TO_SDK /* Select printf, scanf, putchar, getchar of SDK version. */
-#define PRINTF DbgConsole_Printf
-#define SCANF DbgConsole_Scanf
-#define PUTCHAR DbgConsole_Putchar
-#define GETCHAR DbgConsole_Getchar
-#elif SDK_DEBUGCONSOLE == DEBUGCONSOLE_REDIRECT_TO_TOOLCHAIN /* Select printf, scanf, putchar, getchar of toolchain. \ \
-                                                              */
-#define PRINTF printf
-#define SCANF scanf
-#define PUTCHAR putchar
-#define GETCHAR getchar
-#endif /* SDK_DEBUGCONSOLE */
-
-/*******************************************************************************
- * Prototypes
- ******************************************************************************/
-
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus */
-
-/*! @name Initialization*/
-/* @{ */
-
-/*!
- * @brief Initializes the peripheral used for debug messages.
- *
- * Call this function to enable debug log messages to be output via the specified peripheral
- * initialized by the serial manager module.
- * After this function has returned, stdout and stdin are connected to the selected peripheral.
- *
- * @param instance      The instance of the module.
- * @param baudRate      The desired baud rate in bits per second.
- * @param device        Low level device type for the debug console, can be one of the following.
- *                      @arg kSerialPort_Uart,
- *                      @arg kSerialPort_UsbCdc
- *                      @arg kSerialPort_UsbCdcVirtual.
- * @param clkSrcFreq    Frequency of peripheral source clock.
- *
- * @return              Indicates whether initialization was successful or not.
- * @retval kStatus_Success          Execution successfully
- */
-status_t DbgConsole_Init(uint8_t instance, uint32_t baudRate, serial_port_type_t device, uint32_t clkSrcFreq);
-
-/*!
- * @brief De-initializes the peripheral used for debug messages.
- *
- * Call this function to disable debug log messages to be output via the specified peripheral
- * initialized by the serial manager module.
- *
- * @return Indicates whether de-initialization was successful or not.
- */
-status_t DbgConsole_Deinit(void);
-
-#if SDK_DEBUGCONSOLE
-/*!
- * @brief Writes formatted output to the standard output stream.
- *
- * Call this function to write a formatted output to the standard output stream.
- *
- * @param   formatString Format control string.
- * @return  Returns the number of characters printed or a negative value if an error occurs.
- */
-int DbgConsole_Printf(const char *formatString, ...);
-
-/*!
- * @brief Writes a character to stdout.
- *
- * Call this function to write a character to stdout.
- *
- * @param   ch Character to be written.
- * @return  Returns the character written.
- */
-int DbgConsole_Putchar(int ch);
-
-/*!
- * @brief Reads formatted data from the standard input stream.
- *
- * Call this function to read formatted data from the standard input stream.
- *
- * @note Due the limitation in the BM OSA environment (CPU is blocked in the function,
- * other tasks will not be scheduled), the function cannot be used when the
- * DEBUG_CONSOLE_TRANSFER_NON_BLOCKING is set in the BM OSA environment.
- * And an error is returned when the function called in this case. The suggestion
- * is that polling the non-blocking function DbgConsole_TryGetchar to get the input char.
- *
- * @param   formatString Format control string.
- * @return  Returns the number of fields successfully converted and assigned.
- */
-int DbgConsole_Scanf(char *formatString, ...);
-
-/*!
- * @brief Reads a character from standard input.
- *
- * Call this function to read a character from standard input.
- *
- * @note Due the limitation in the BM OSA environment (CPU is blocked in the function,
- * other tasks will not be scheduled), the function cannot be used when the
- * DEBUG_CONSOLE_TRANSFER_NON_BLOCKING is set in the BM OSA environment.
- * And an error is returned when the function called in this case. The suggestion
- * is that polling the non-blocking function DbgConsole_TryGetchar to get the input char.
- *
- * @return Returns the character read.
- */
-int DbgConsole_Getchar(void);
-
-/*!
- * @brief Debug console flush.
- *
- * Call this function to wait the tx buffer empty.
- * If interrupt transfer is using, make sure the global IRQ is enable before call this function
- * This function should be called when
- * 1, before enter power down mode
- * 2, log is required to print to terminal immediately
- * @return Indicates whether wait idle was successful or not.
- */
-status_t DbgConsole_Flush(void);
-
-#ifdef DEBUG_CONSOLE_TRANSFER_NON_BLOCKING
-/*!
- * @brief Debug console try to get char
- * This function provides a API which will not block current task, if character is
- * available return it, otherwise return fail.
- * @param ch the address of char to receive
- * @return Indicates get char was successful or not.
- */
-status_t DbgConsole_TryGetchar(char *ch);
-#endif
-
-#endif /* SDK_DEBUGCONSOLE */
-
-/*! @} */
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus */
-
-/*! @} */
-
-#endif /* _FSL_DEBUGCONSOLE_H_ */
diff --git a/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_debug_console_conf.h b/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_debug_console_conf.h
deleted file mode 100755
index 4c36a7dd8..000000000
--- a/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_debug_console_conf.h
+++ /dev/null
@@ -1,158 +0,0 @@
-/*
- * Copyright 2017 - 2019 NXP
- * All rights reserved.
- *
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-#ifndef _FSL_DEBUG_CONSOLE_CONF_H_
-#define _FSL_DEBUG_CONSOLE_CONF_H_
-
-/****************Debug console configuration********************/
-
-/*! @brief If Non-blocking mode is needed, please define it at project setting,
- * otherwise blocking mode is the default transfer mode.
- * Warning: If you want to use non-blocking transfer,please make sure the corresponding
- * IO interrupt is enable, otherwise there is no output.
- * And non-blocking is combine with buffer, no matter bare-metal or rtos.
- * Below shows how to configure in your project if you want to use non-blocking mode.
- * For IAR, right click project and select "Options", define it in "C/C++ Compiler->Preprocessor->Defined symbols".
- * For KEIL, click "Options for Target…", define it in "C/C++->Preprocessor Symbols->Define".
- * For ARMGCC, open CmakeLists.txt and add the following lines,
- * "SET(CMAKE_C_FLAGS_DEBUG "${CMAKE_C_FLAGS_DEBUG} -DDEBUG_CONSOLE_TRANSFER_NON_BLOCKING")" for debug target.
- * "SET(CMAKE_C_FLAGS_RELEASE "${CMAKE_C_FLAGS_RELEASE} -DDEBUG_CONSOLE_TRANSFER_NON_BLOCKING")" for release target.
- * For MCUxpresso, right click project and select "Properties", define it in "C/C++ Build->Settings->MCU C
- * Complier->Preprocessor".
- *
- */
-#ifdef DEBUG_CONSOLE_TRANSFER_NON_BLOCKING
-/*! @brief define the transmit buffer length which is used to store the multi task log, buffer is enabled automatically
- * when
- * non-blocking transfer is using,
- * This value will affect the RAM's ultilization, should be set per paltform's capability and software requirement.
- * If it is configured too small, log maybe missed , because the log will not be
- * buffered if the buffer is full, and the print will return immediately with -1.
- * And this value should be multiple of 4 to meet memory alignment.
- *
- */
-#ifndef DEBUG_CONSOLE_TRANSMIT_BUFFER_LEN
-#define DEBUG_CONSOLE_TRANSMIT_BUFFER_LEN (512U)
-#endif /* DEBUG_CONSOLE_TRANSMIT_BUFFER_LEN */
-
-/*! @brief define the receive buffer length which is used to store the user input, buffer is enabled automatically when
- * non-blocking transfer is using,
- * This value will affect the RAM's ultilization, should be set per paltform's capability and software requirement.
- * If it is configured too small, log maybe missed, because buffer will be overwrited if buffer is too small.
- * And this value should be multiple of 4 to meet memory alignment.
- *
- */
-#ifndef DEBUG_CONSOLE_RECEIVE_BUFFER_LEN
-#define DEBUG_CONSOLE_RECEIVE_BUFFER_LEN (1024U)
-#endif /* DEBUG_CONSOLE_RECEIVE_BUFFER_LEN */
-
-/*!@ brief Whether enable the reliable TX function
- * If the macro is zero, the reliable TX function of the debug console is disabled.
- * When the macro is zero, the string of PRINTF will be thrown away after the transmit buffer is full.
- */
-#ifndef DEBUG_CONSOLE_TX_RELIABLE_ENABLE
-#define DEBUG_CONSOLE_TX_RELIABLE_ENABLE (1U)
-#endif /* DEBUG_CONSOLE_RX_ENABLE */
-
-#else
-#define DEBUG_CONSOLE_TRANSFER_BLOCKING
-#endif /* DEBUG_CONSOLE_TRANSFER_NON_BLOCKING */
-
-/*!@ brief Whether enable the RX function
- * If the macro is zero, the receive function of the debug console is disabled.
- */
-#ifndef DEBUG_CONSOLE_RX_ENABLE
-#define DEBUG_CONSOLE_RX_ENABLE (1U)
-#endif /* DEBUG_CONSOLE_RX_ENABLE */
-
-/*!@ brief define the MAX log length debug console support , that is when you call printf("log", x);, the log
- * length can not bigger than this value.
- * This macro decide the local log buffer length, the buffer locate at stack, the stack maybe overflow if
- * the buffer is too big and current task stack size not big enough.
- */
-#ifndef DEBUG_CONSOLE_PRINTF_MAX_LOG_LEN
-#define DEBUG_CONSOLE_PRINTF_MAX_LOG_LEN (128U)
-#endif /* DEBUG_CONSOLE_PRINTF_MAX_LOG_LEN */
-
-/*!@ brief define the buffer support buffer scanf log length, that is when you call scanf("log", &x);, the log
- * length can not bigger than this value.
- * As same as the DEBUG_CONSOLE_BUFFER_PRINTF_MAX_LOG_LEN.
- */
-#ifndef DEBUG_CONSOLE_SCANF_MAX_LOG_LEN
-#define DEBUG_CONSOLE_SCANF_MAX_LOG_LEN (20U)
-#endif /* DEBUG_CONSOLE_SCANF_MAX_LOG_LEN */
-
-/*! @brief Debug console synchronization
- * User should not change these macro for synchronization mode, but add the
- * corresponding synchronization mechanism per different software environment.
- * Such as, if another RTOS is used,
- * add:
- *  #define DEBUG_CONSOLE_SYNCHRONIZATION_XXXX 3
- * in this configuration file and implement the synchronization in fsl.log.c.
- */
-/*! @brief synchronization for baremetal software */
-#define DEBUG_CONSOLE_SYNCHRONIZATION_BM 0
-/*! @brief synchronization for freertos software */
-#define DEBUG_CONSOLE_SYNCHRONIZATION_FREERTOS 1
-
-/*! @brief RTOS synchronization mechanism disable
- * If not defined, default is enable, to avoid multitask log print mess.
- * If other RTOS is used, you can implement the RTOS's specific synchronization mechanism in fsl.log.c
- * If synchronization is disabled, log maybe messed on terminal.
- */
-#ifndef DEBUG_CONSOLE_DISABLE_RTOS_SYNCHRONIZATION
-#ifdef DEBUG_CONSOLE_TRANSFER_NON_BLOCKING
-#ifdef FSL_RTOS_FREE_RTOS
-#define DEBUG_CONSOLE_SYNCHRONIZATION_MODE DEBUG_CONSOLE_SYNCHRONIZATION_FREERTOS
-#else
-#define DEBUG_CONSOLE_SYNCHRONIZATION_MODE DEBUG_CONSOLE_SYNCHRONIZATION_BM
-#endif /* FSL_RTOS_FREE_RTOS */
-#else
-#define DEBUG_CONSOLE_SYNCHRONIZATION_MODE DEBUG_CONSOLE_SYNCHRONIZATION_BM
-#endif /* DEBUG_CONSOLE_TRANSFER_NON_BLOCKING */
-#endif /* DEBUG_CONSOLE_DISABLE_RTOS_SYNCHRONIZATION */
-
-/*! @brief echo function support
- * If you want to use the echo function,please define DEBUG_CONSOLE_ENABLE_ECHO
- * at your project setting.
- */
-#ifndef DEBUG_CONSOLE_ENABLE_ECHO
-#define DEBUG_CONSOLE_ENABLE_ECHO_FUNCTION 0
-#else
-#define DEBUG_CONSOLE_ENABLE_ECHO_FUNCTION 1
-#endif /* DEBUG_CONSOLE_ENABLE_ECHO */
-
-/*********************************************************************/
-
-/***************Debug console other configuration*********************/
-/*! @brief Definition to printf the float number. */
-#ifndef PRINTF_FLOAT_ENABLE
-#define PRINTF_FLOAT_ENABLE 0U
-#endif /* PRINTF_FLOAT_ENABLE */
-
-/*! @brief Definition to scanf the float number. */
-#ifndef SCANF_FLOAT_ENABLE
-#define SCANF_FLOAT_ENABLE 0U
-#endif /* SCANF_FLOAT_ENABLE */
-
-/*! @brief Definition to support advanced format specifier for printf. */
-#ifndef PRINTF_ADVANCED_ENABLE
-#define PRINTF_ADVANCED_ENABLE 0U
-#endif /* PRINTF_ADVANCED_ENABLE */
-
-/*! @brief Definition to support advanced format specifier for scanf. */
-#ifndef SCANF_ADVANCED_ENABLE
-#define SCANF_ADVANCED_ENABLE 0U
-#endif /* SCANF_ADVANCED_ENABLE */
-
-/*! @brief Definition to select virtual com(USB CDC) as the debug console. */
-#ifndef BOARD_USE_VIRTUALCOM
-#define BOARD_USE_VIRTUALCOM 0U
-#endif
-/*******************************************************************/
-
-#endif /* _FSL_DEBUG_CONSOLE_CONF_H_ */
diff --git a/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_device_registers.h b/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_device_registers.h
index 54caf43ca..c16a90fe2 100755
--- a/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_device_registers.h
+++ b/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_device_registers.h
@@ -7,6 +7,14 @@
  *
  */
 
+/**
+ * @file fsl_device_registers.h
+ * @brief device register function
+ * @version 2.0
+ * @author AIIT XUOS Lab
+ * @date 2022-03-15
+ */
+
 #ifndef __FSL_DEVICE_REGISTERS_H__
 #define __FSL_DEVICE_REGISTERS_H__
 
diff --git a/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_enet.h b/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_enet.h
index 682620d8a..35e76769b 100755
--- a/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_enet.h
+++ b/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_enet.h
@@ -9,9 +9,9 @@
 /**
  * @file fsl_enet.h
  * @brief ethernet drivers
- * @version 1.0
+ * @version 2.0
  * @author AIIT XUOS Lab
- * @date 2021.11.11
+ * @date 2022-03-15
  */
 
 #ifndef _FSL_ENET_H_
diff --git a/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_gpio.h b/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_gpio.h
index 2d84f379a..94cff8273 100755
--- a/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_gpio.h
+++ b/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_gpio.h
@@ -6,6 +6,14 @@
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
+/**
+ * @file fsl_gpio.h
+ * @brief gpio drivers
+ * @version 2.0
+ * @author AIIT XUOS Lab
+ * @date 2022-03-15
+ */
+
 #ifndef _FSL_GPIO_H_
 #define _FSL_GPIO_H_
 
diff --git a/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_iomuxc.h b/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_iomuxc.h
index e4bb7fb26..9ec600f17 100755
--- a/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_iomuxc.h
+++ b/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_iomuxc.h
@@ -9,9 +9,9 @@
 /**
  * @file fsl_iomuxc.h
  * @brief io mux drivers
- * @version 1.0
+ * @version 2.0
  * @author AIIT XUOS Lab
- * @date 2021.11.11
+ * @date 2022-03-15
  */
 
 #ifndef _FSL_IOMUXC_H_
diff --git a/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_lpi2c.h b/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_lpi2c.h
index 2bb915557..d2523ccb6 100755
--- a/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_lpi2c.h
+++ b/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_lpi2c.h
@@ -7,12 +7,12 @@
  */
 
 /**
-* @file fsl_lpi2c.h
-* @brief support imxrt1052-board i2c driver
-* @version 1.0
-* @author AIIT XUOS Lab
-* @date 2022-03-01
-*/
+ * @file fsl_lpi2c.h
+ * @brief support imxrt1052-board i2c driver
+ * @version 2.0
+ * @author AIIT XUOS Lab
+ * @date 2022-03-15
+ */
 
 #ifndef _FSL_LPI2C_H_
 #define _FSL_LPI2C_H_
diff --git a/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_lpuart.h b/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_lpuart.h
index ae9d321e1..acc471346 100755
--- a/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_lpuart.h
+++ b/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_lpuart.h
@@ -9,9 +9,9 @@
 /**
  * @file fsl_lpuart.h
  * @brief fsl uart drivers
- * @version 1.0
+ * @version 2.0
  * @author AIIT XUOS Lab
- * @date 2021.11.11
+ * @date 2022-03-15
  */
 
 #ifndef _FSL_LPUART_H_
diff --git a/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_semc.h b/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_semc.h
deleted file mode 100644
index 75704eadf..000000000
--- a/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_semc.h
+++ /dev/null
@@ -1,830 +0,0 @@
-/*
- * Copyright 2017-2018 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-#ifndef _FSL_SEMC_H_
-#define _FSL_SEMC_H_
-
-#include "fsl_common.h"
-
-/*!
- * @addtogroup semc
- * @{
- */
-
-/*******************************************************************************
- * Definitions
- ******************************************************************************/
-
-/*! @name Driver version */
-/*@{*/
-/*! @brief SEMC driver version 2.0.4. */
-#define FSL_SEMC_DRIVER_VERSION (MAKE_VERSION(2, 0, 4))
-/*@}*/
-
-/*! @brief SEMC status. */
-enum _semc_status
-{
-    kStatus_SEMC_InvalidDeviceType            = MAKE_STATUS(kStatusGroup_SEMC, 0),
-    kStatus_SEMC_IpCommandExecutionError      = MAKE_STATUS(kStatusGroup_SEMC, 1),
-    kStatus_SEMC_AxiCommandExecutionError     = MAKE_STATUS(kStatusGroup_SEMC, 2),
-    kStatus_SEMC_InvalidMemorySize            = MAKE_STATUS(kStatusGroup_SEMC, 3),
-    kStatus_SEMC_InvalidIpcmdDataSize         = MAKE_STATUS(kStatusGroup_SEMC, 4),
-    kStatus_SEMC_InvalidAddressPortWidth      = MAKE_STATUS(kStatusGroup_SEMC, 5),
-    kStatus_SEMC_InvalidDataPortWidth         = MAKE_STATUS(kStatusGroup_SEMC, 6),
-    kStatus_SEMC_InvalidSwPinmuxSelection     = MAKE_STATUS(kStatusGroup_SEMC, 7),
-    kStatus_SEMC_InvalidBurstLength           = MAKE_STATUS(kStatusGroup_SEMC, 8),
-    kStatus_SEMC_InvalidColumnAddressBitWidth = MAKE_STATUS(kStatusGroup_SEMC, 9),
-    kStatus_SEMC_InvalidBaseAddress           = MAKE_STATUS(kStatusGroup_SEMC, 10),
-    kStatus_SEMC_InvalidTimerSetting          = MAKE_STATUS(kStatusGroup_SEMC, 11),
-};
-
-/*! @brief SEMC memory device type. */
-typedef enum _semc_mem_type
-{
-    kSEMC_MemType_SDRAM = 0, /*!< SDRAM */
-    kSEMC_MemType_SRAM,      /*!< SRAM */
-    kSEMC_MemType_NOR,       /*!< NOR */
-    kSEMC_MemType_NAND,      /*!< NAND */
-    kSEMC_MemType_8080       /*!< 8080. */
-} semc_mem_type_t;
-
-/*! @brief SEMC WAIT/RDY polarity. */
-typedef enum _semc_waitready_polarity
-{
-    kSEMC_LowActive = 0, /*!< Low active. */
-    kSEMC_HighActive,    /*!< High active. */
-} semc_waitready_polarity_t;
-
-/*! @brief SEMC SDRAM Chip selection . */
-typedef enum _semc_sdram_cs
-{
-    kSEMC_SDRAM_CS0 = 0, /*!< SEMC SDRAM CS0. */
-    kSEMC_SDRAM_CS1,     /*!< SEMC SDRAM CS1. */
-    kSEMC_SDRAM_CS2,     /*!< SEMC SDRAM CS2. */
-    kSEMC_SDRAM_CS3      /*!< SEMC SDRAM CS3. */
-} semc_sdram_cs_t;
-
-/*! @brief SEMC NAND device type. */
-typedef enum _semc_nand_access_type
-{
-    kSEMC_NAND_ACCESS_BY_AXI = 0,
-    kSEMC_NAND_ACCESS_BY_IPCMD,
-} semc_nand_access_type_t;
-
-/*! @brief SEMC interrupts . */
-typedef enum _semc_interrupt_enable
-{
-    kSEMC_IPCmdDoneInterrupt = SEMC_INTEN_IPCMDDONEEN_MASK, /*!< Ip command done interrupt. */
-    kSEMC_IPCmdErrInterrupt  = SEMC_INTEN_IPCMDERREN_MASK,  /*!< Ip command error interrupt. */
-    kSEMC_AXICmdErrInterrupt = SEMC_INTEN_AXICMDERREN_MASK, /*!< AXI command error interrupt. */
-    kSEMC_AXIBusErrInterrupt = SEMC_INTEN_AXIBUSERREN_MASK  /*!< AXI bus error interrupt. */
-} semc_interrupt_enable_t;
-
-/*! @brief SEMC IP command data size in bytes. */
-typedef enum _semc_ipcmd_datasize
-{
-    kSEMC_IPcmdDataSize_1bytes = 1, /*!< The IP command data size 1 byte. */
-    kSEMC_IPcmdDataSize_2bytes,     /*!< The IP command data size 2 byte. */
-    kSEMC_IPcmdDataSize_3bytes,     /*!< The IP command data size 3 byte. */
-    kSEMC_IPcmdDataSize_4bytes      /*!< The IP command data size 4 byte. */
-} semc_ipcmd_datasize_t;
-
-/*! @brief SEMC auto-refresh timing. */
-typedef enum _semc_refresh_time
-{
-    kSEMC_RefreshThreeClocks = 0x0U, /*!< The refresh timing with three bus clocks. */
-    kSEMC_RefreshSixClocks,          /*!< The refresh timing with six bus clocks. */
-    kSEMC_RefreshNineClocks          /*!< The refresh timing with nine bus clocks. */
-} semc_refresh_time_t;
-
-/*! @brief CAS latency */
-typedef enum _semc_caslatency
-{
-    kSEMC_LatencyOne = 1, /*!< Latency  1. */
-    kSEMC_LatencyTwo,     /*!< Latency  2. */
-    kSEMC_LatencyThree,   /*!< Latency  3. */
-} semc_caslatency_t;
-
-/*! @brief SEMC sdram column address bit number. */
-typedef enum _semc_sdram_column_bit_num
-{
-    kSEMC_SdramColunm_12bit = 0x0U, /*!< 12 bit. */
-    kSEMC_SdramColunm_11bit,        /*!< 11 bit. */
-    kSEMC_SdramColunm_10bit,        /*!< 10 bit. */
-    kSEMC_SdramColunm_9bit,         /*!< 9 bit. */
-} semc_sdram_column_bit_num_t;
-
-/*! @brief SEMC sdram burst length. */
-typedef enum _semc_sdram_burst_len
-{
-    kSEMC_Sdram_BurstLen1 = 0, /*!< Burst length 1*/
-    kSEMC_Sdram_BurstLen2,     /*!< Burst length 2*/
-    kSEMC_Sdram_BurstLen4,     /*!< Burst length 4*/
-    kSEMC_Sdram_BurstLen8      /*!< Burst length 8*/
-} sem_sdram_burst_len_t;
-
-/*! @brief SEMC nand column address bit number. */
-typedef enum _semc_nand_column_bit_num
-{
-    kSEMC_NandColum_16bit = 0x0U, /*!< 16 bit. */
-    kSEMC_NandColum_15bit,        /*!< 15 bit. */
-    kSEMC_NandColum_14bit,        /*!< 14 bit. */
-    kSEMC_NandColum_13bit,        /*!< 13 bit. */
-    kSEMC_NandColum_12bit,        /*!< 12 bit. */
-    kSEMC_NandColum_11bit,        /*!< 11 bit. */
-    kSEMC_NandColum_10bit,        /*!< 10 bit. */
-    kSEMC_NandColum_9bit,         /*!< 9 bit. */
-} semc_nand_column_bit_num_t;
-
-/*! @brief SEMC nand burst length. */
-typedef enum _semc_nand_burst_len
-{
-    kSEMC_Nand_BurstLen1 = 0, /*!< Burst length 1*/
-    kSEMC_Nand_BurstLen2,     /*!< Burst length 2*/
-    kSEMC_Nand_BurstLen4,     /*!< Burst length 4*/
-    kSEMC_Nand_BurstLen8,     /*!< Burst length 8*/
-    kSEMC_Nand_BurstLen16,    /*!< Burst length 16*/
-    kSEMC_Nand_BurstLen32,    /*!< Burst length 32*/
-    kSEMC_Nand_BurstLen64     /*!< Burst length 64*/
-} sem_nand_burst_len_t;
-
-/*! @brief SEMC nor/sram column address bit number. */
-typedef enum _semc_norsram_column_bit_num
-{
-    kSEMC_NorColum_12bit = 0x0U, /*!< 12 bit. */
-    kSEMC_NorColum_11bit,        /*!< 11 bit. */
-    kSEMC_NorColum_10bit,        /*!< 10 bit. */
-    kSEMC_NorColum_9bit,         /*!< 9 bit. */
-    kSEMC_NorColum_8bit,         /*!< 8 bit. */
-    kSEMC_NorColum_7bit,         /*!< 7 bit. */
-    kSEMC_NorColum_6bit,         /*!< 6 bit. */
-    kSEMC_NorColum_5bit,         /*!< 5 bit. */
-    kSEMC_NorColum_4bit,         /*!< 4 bit. */
-    kSEMC_NorColum_3bit,         /*!< 3 bit. */
-    kSEMC_NorColum_2bit          /*!< 2 bit. */
-} semc_norsram_column_bit_num_t;
-
-/*! @brief SEMC nor/sram burst length. */
-typedef enum _semc_norsram_burst_len
-{
-    kSEMC_Nor_BurstLen1 = 0, /*!< Burst length 1*/
-    kSEMC_Nor_BurstLen2,     /*!< Burst length 2*/
-    kSEMC_Nor_BurstLen4,     /*!< Burst length 4*/
-    kSEMC_Nor_BurstLen8,     /*!< Burst length 8*/
-    kSEMC_Nor_BurstLen16,    /*!< Burst length 16*/
-    kSEMC_Nor_BurstLen32,    /*!< Burst length 32*/
-    kSEMC_Nor_BurstLen64     /*!< Burst length 64*/
-} sem_norsram_burst_len_t;
-
-/*! @brief SEMC dbi column address bit number. */
-typedef enum _semc_dbi_column_bit_num
-{
-    kSEMC_Dbi_Colum_12bit = 0x0U, /*!< 12 bit. */
-    kSEMC_Dbi_Colum_11bit,        /*!< 11 bit. */
-    kSEMC_Dbi_Colum_10bit,        /*!< 10 bit. */
-    kSEMC_Dbi_Colum_9bit,         /*!< 9 bit. */
-    kSEMC_Dbi_Colum_8bit,         /*!< 8 bit. */
-    kSEMC_Dbi_Colum_7bit,         /*!< 7 bit. */
-    kSEMC_Dbi_Colum_6bit,         /*!< 6 bit. */
-    kSEMC_Dbi_Colum_5bit,         /*!< 5 bit. */
-    kSEMC_Dbi_Colum_4bit,         /*!< 4 bit. */
-    kSEMC_Dbi_Colum_3bit,         /*!< 3 bit. */
-    kSEMC_Dbi_Colum_2bit          /*!< 2 bit. */
-} semc_dbi_column_bit_num_t;
-
-/*! @brief SEMC dbi burst length. */
-typedef enum _semc_dbi_burst_len
-{
-    kSEMC_Dbi_BurstLen1 = 0, /*!< Burst length 1*/
-    kSEMC_Dbi_BurstLen2,     /*!< Burst length 2*/
-    kSEMC_Dbi_Dbi_BurstLen4, /*!< Burst length 4*/
-    kSEMC_Dbi_BurstLen8,     /*!< Burst length 8*/
-    kSEMC_Dbi_BurstLen16,    /*!< Burst length 16*/
-    kSEMC_Dbi_BurstLen32,    /*!< Burst length 32*/
-    kSEMC_Dbi_BurstLen64     /*!< Burst length 64*/
-} sem_dbi_burst_len_t;
-
-/*! @brief SEMC IOMUXC. */
-typedef enum _semc_iomux_pin
-{
-    kSEMC_MUXA8   = SEMC_IOCR_MUX_A8_SHIFT,   /*!< MUX A8 pin. */
-    kSEMC_MUXCSX0 = SEMC_IOCR_MUX_CSX0_SHIFT, /*!< MUX CSX0 pin */
-    kSEMC_MUXCSX1 = SEMC_IOCR_MUX_CSX1_SHIFT, /*!< MUX CSX1 Pin.*/
-    kSEMC_MUXCSX2 = SEMC_IOCR_MUX_CSX2_SHIFT, /*!< MUX CSX2 Pin. */
-    kSEMC_MUXCSX3 = SEMC_IOCR_MUX_CSX3_SHIFT, /*!< MUX CSX3 Pin. */
-    kSEMC_MUXRDY  = SEMC_IOCR_MUX_RDY_SHIFT   /*!< MUX RDY pin. */
-} semc_iomux_pin;
-
-/*! @brief SEMC NOR/PSRAM Address bit 27 A27. */
-typedef enum _semc_iomux_nora27_pin
-{
-    kSEMC_MORA27_NONE    = 0,                        /*!< No NOR/SRAM A27 pin. */
-    kSEMC_NORA27_MUXCSX3 = SEMC_IOCR_MUX_CSX3_SHIFT, /*!< MUX CSX3 Pin. */
-    kSEMC_NORA27_MUXRDY  = SEMC_IOCR_MUX_RDY_SHIFT   /*!< MUX RDY pin. */
-} semc_iomux_nora27_pin;
-
-/*! @brief SEMC port size. */
-typedef enum _semc_port_size
-{
-    kSEMC_PortSize8Bit = 0, /*!< 8-Bit port size. */
-    kSEMC_PortSize16Bit     /*!< 16-Bit port size. */
-} smec_port_size_t;
-
-/*! @brief SEMC address mode. */
-typedef enum _semc_addr_mode
-{
-    kSEMC_AddrDataMux = 0, /*!< SEMC address/data mux mode. */
-    kSEMC_AdvAddrdataMux,  /*!< Advanced address/data mux mode. */
-    kSEMC_AddrDataNonMux   /*!< Address/data non-mux mode. */
-} semc_addr_mode_t;
-
-/*! @brief SEMC DQS read strobe mode. */
-typedef enum _semc_dqs_mode
-{
-    kSEMC_Loopbackinternal = 0, /*!< Dummy read strobe loopbacked internally. */
-    kSEMC_Loopbackdqspad,       /*!< Dummy read strobe loopbacked from DQS pad. */
-} semc_dqs_mode_t;
-
-/*! @brief SEMC ADV signal active polarity. */
-typedef enum _semc_adv_polarity
-{
-    kSEMC_AdvActiveLow = 0, /*!< Adv active low. */
-    kSEMC_AdvActivehigh,    /*!< Adv active low. */
-} semc_adv_polarity_t;
-
-/*! @brief SEMC RDY signal active polarity. */
-typedef enum _semc_rdy_polarity
-{
-    kSEMC_RdyActiveLow = 0, /*!< Adv active low. */
-    kSEMC_RdyActivehigh,    /*!< Adv active low. */
-} semc_rdy_polarity_t;
-
-/*! @brief SEMC IP command for NAND: address mode. */
-typedef enum _semc_ipcmd_nand_addrmode
-{
-    kSEMC_NANDAM_ColumnRow = 0x0U, /*!< Address mode: column and row address(5Byte-CA0/CA1/RA0/RA1/RA2). */
-    kSEMC_NANDAM_ColumnCA0,        /*!< Address mode: column address only(1 Byte-CA0).  */
-    kSEMC_NANDAM_ColumnCA0CA1,     /*!< Address mode: column address only(2 Byte-CA0/CA1). */
-    kSEMC_NANDAM_RawRA0,           /*!< Address mode: row address only(1 Byte-RA0). */
-    kSEMC_NANDAM_RawRA0RA1,        /*!< Address mode: row address only(2 Byte-RA0/RA1). */
-    kSEMC_NANDAM_RawRA0RA1RA2      /*!< Address mode: row address only(3 Byte-RA0).  */
-} semc_ipcmd_nand_addrmode_t;
-
-/*! @brief SEMC IP command for NAND： command mode. */
-typedef enum _semc_ipcmd_nand_cmdmode
-{
-    kSEMC_NANDCM_Command = 0x2U,      /*!< command. */
-    kSEMC_NANDCM_CommandHold,         /*!< Command hold. */
-    kSEMC_NANDCM_CommandAddress,      /*!< Command address. */
-    kSEMC_NANDCM_CommandAddressHold,  /*!< Command address hold.  */
-    kSEMC_NANDCM_CommandAddressRead,  /*!< Command address read.  */
-    kSEMC_NANDCM_CommandAddressWrite, /*!< Command address write.  */
-    kSEMC_NANDCM_CommandRead,         /*!< Command read.  */
-    kSEMC_NANDCM_CommandWrite,        /*!< Command write.  */
-    kSEMC_NANDCM_Read,                /*!< Read.  */
-    kSEMC_NANDCM_Write                /*!< Write.  */
-} semc_ipcmd_nand_cmdmode_t;
-
-/*! @brief SEMC NAND address option. */
-typedef enum _semc_nand_address_option
-{
-    kSEMC_NandAddrOption_5byte_CA2RA3 = 0U, /*!< CA0+CA1+RA0+RA1+RA2 */
-    kSEMC_NandAddrOption_4byte_CA2RA2 = 2U, /*!< CA0+CA1+RA0+RA1 */
-    kSEMC_NandAddrOption_3byte_CA2RA1 = 4U, /*!< CA0+CA1+RA0 */
-    kSEMC_NandAddrOption_4byte_CA1RA3 = 1U, /*!< CA0+RA0+RA1+RA2 */
-    kSEMC_NandAddrOption_3byte_CA1RA2 = 3U, /*!< CA0+RA0+RA1 */
-    kSEMC_NandAddrOption_2byte_CA1RA1 = 7U, /*!< CA0+RA0 */
-} semc_nand_address_option_t;
-
-/*! @brief SEMC IP command for NOR. */
-typedef enum _semc_ipcmd_nor_dbi
-{
-    kSEMC_NORDBICM_Read = 0x2U, /*!< NOR read. */
-    kSEMC_NORDBICM_Write        /*!< NOR write.  */
-} semc_ipcmd_nor_dbi_t;
-
-/*! @brief SEMC IP command for SRAM. */
-typedef enum _semc_ipcmd_sram
-{
-    kSEMC_SRAMCM_ArrayRead = 0x2U, /*!< SRAM memory array read. */
-    kSEMC_SRAMCM_ArrayWrite,       /*!< SRAM memory array write. */
-    kSEMC_SRAMCM_RegRead,          /*!< SRAM memory register read. */
-    kSEMC_SRAMCM_RegWrite          /*!< SRAM memory register write. */
-} semc_ipcmd_sram_t;
-
-/*! @brief SEMC IP command for SDARM. */
-typedef enum _semc_ipcmd_sdram
-{
-    kSEMC_SDRAMCM_Read = 0x8U, /*!< SDRAM memory read. */
-    kSEMC_SDRAMCM_Write,       /*!< SDRAM memory write. */
-    kSEMC_SDRAMCM_Modeset,     /*!< SDRAM MODE SET. */
-    kSEMC_SDRAMCM_Active,      /*!< SDRAM active. */
-    kSEMC_SDRAMCM_AutoRefresh, /*!< SDRAM auto-refresh. */
-    kSEMC_SDRAMCM_SelfRefresh, /*!< SDRAM self-refresh. */
-    kSEMC_SDRAMCM_Precharge,   /*!< SDRAM precharge. */
-    kSEMC_SDRAMCM_Prechargeall /*!< SDRAM precharge all. */
-} semc_ipcmd_sdram_t;
-
-/*! @brief SEMC SDRAM configuration structure.
- *
- * 1. The memory size in the configuration is in the unit of KB. So memsize_kbytes
- * should be set as 2^2, 2^3, 2^4 .etc which is base 2KB exponential function.
- * Take refer to BR0~BR3 register in RM for details.
- * 2. The prescalePeriod_N16Cycle is in unit of 16 clock cycle. It is a exception for prescaleTimer_n16cycle = 0,
- * it means the prescaler timer period is 256 * 16 clock cycles. For precalerIf precalerTimer_n16cycle not equal to 0,
- * The  prescaler timer period is prescalePeriod_N16Cycle * 16 clock cycles.
- * idleTimeout_NprescalePeriod,  refreshUrgThreshold_NprescalePeriod, refreshPeriod_NprescalePeriod are
- * similar to prescalePeriod_N16Cycle.
- *
- */
-typedef struct _semc_sdram_config
-{
-    semc_iomux_pin csxPinMux;       /*!< CS pin mux. The kSEMC_MUXA8 is not valid in sdram pin mux setting. */
-    uint32_t address;               /*!< The base address. */
-    uint32_t memsize_kbytes;        /*!< The memory size in unit of kbytes. */
-    smec_port_size_t portSize;      /*!< Port size. */
-    sem_sdram_burst_len_t burstLen; /*!< Burst length. */
-    semc_sdram_column_bit_num_t columnAddrBitNum; /*!< Column address bit number. */
-    semc_caslatency_t casLatency;                 /*!< CAS latency. */
-    uint8_t tPrecharge2Act_Ns;                    /*!< Precharge to active wait time in unit of nanosecond. */
-    uint8_t tAct2ReadWrite_Ns;                    /*!< Act to read/write wait time in unit of nanosecond. */
-    uint8_t tRefreshRecovery_Ns;                  /*!< Refresh recovery time in unit of nanosecond. */
-    uint8_t tWriteRecovery_Ns;                    /*!< write recovery time in unit of nanosecond. */
-    uint8_t tCkeOff_Ns;                           /*!< CKE off minimum time in unit of nanosecond. */
-    uint8_t tAct2Prechage_Ns;                     /*!< Active to precharge in unit of nanosecond. */
-    uint8_t tSelfRefRecovery_Ns;                  /*!< Self refresh recovery time in unit of nanosecond. */
-    uint8_t tRefresh2Refresh_Ns;                  /*!< Refresh to refresh wait time in unit of nanosecond. */
-    uint8_t tAct2Act_Ns;                          /*!< Active to active wait time in unit of nanosecond. */
-    uint32_t tPrescalePeriod_Ns;     /*!< Prescaler timer period should not be larger than 256 * 16 * clock cycle. */
-    uint32_t tIdleTimeout_Ns;        /*!< Idle timeout in unit of prescale time period. */
-    uint32_t refreshPeriod_nsPerRow; /*!< Refresh timer period like 64ms * 1000000/8192 . */
-    uint32_t refreshUrgThreshold;    /*!< Refresh urgent threshold. */
-    uint8_t refreshBurstLen;         /*!< Refresh burst length. */
-} semc_sdram_config_t;
-
-/*! @brief SEMC NAND device timing configuration structure. */
-typedef struct _semc_nand_timing_config
-{
-    uint8_t tCeSetup_Ns;        /*!< CE setup time: tCS. */
-    uint8_t tCeHold_Ns;         /*!< CE hold time: tCH. */
-    uint8_t tCeInterval_Ns;     /*!< CE interval time:tCEITV. */
-    uint8_t tWeLow_Ns;          /*!< WE low time: tWP. */
-    uint8_t tWeHigh_Ns;         /*!< WE high time: tWH. */
-    uint8_t tReLow_Ns;          /*!< RE low time: tRP. */
-    uint8_t tReHigh_Ns;         /*!< RE high time: tREH. */
-    uint8_t tTurnAround_Ns;     /*!< Turnaround time for async mode: tTA. */
-    uint8_t tWehigh2Relow_Ns;   /*!< WE# high to RE# wait time: tWHR. */
-    uint8_t tRehigh2Welow_Ns;   /*!< RE# high to WE# low wait time: tRHW. */
-    uint8_t tAle2WriteStart_Ns; /*!< ALE to write start wait time: tADL. */
-    uint8_t tReady2Relow_Ns;    /*!< Ready to RE# low min wait time: tRR. */
-    uint8_t tWehigh2Busy_Ns;    /*!< WE# high to busy wait time: tWB. */
-} semc_nand_timing_config_t;
-
-/*! @brief SEMC NAND configuration structure. */
-typedef struct _semc_nand_config
-{
-    semc_iomux_pin cePinMux;    /*!< The CE pin mux setting. The kSEMC_MUXRDY is not valid for CE pin setting. */
-    uint32_t axiAddress;        /*!< The base address for AXI nand. */
-    uint32_t axiMemsize_kbytes; /*!< The memory size in unit of kbytes for AXI nand. */
-    uint32_t ipgAddress;        /*!< The base address for IPG nand . */
-    uint32_t ipgMemsize_kbytes; /*!< The memory size in unit of kbytes for IPG nand. */
-    semc_rdy_polarity_t rdyactivePolarity;       /*!< Wait ready polarity. */
-    bool edoModeEnabled;                         /*!< EDO mode enabled. */
-    semc_nand_column_bit_num_t columnAddrBitNum; /*!< Column address bit number. */
-    semc_nand_address_option_t arrayAddrOption;  /*!< Address option. */
-    sem_nand_burst_len_t burstLen;               /*!< Burst length. */
-    smec_port_size_t portSize;                   /*!< Port size. */
-    semc_nand_timing_config_t *timingConfig;     /*!< SEMC nand timing configuration. */
-} semc_nand_config_t;
-
-/*! @brief SEMC NOR configuration structure. */
-typedef struct _semc_nor_config
-{
-    semc_iomux_pin cePinMux;                        /*!< The CE# pin mux setting. */
-    semc_iomux_nora27_pin addr27;                   /*!< The Addr bit 27 pin mux setting. */
-    uint32_t address;                               /*!< The base address. */
-    uint32_t memsize_kbytes;                        /*!< The memory size in unit of kbytes. */
-    uint8_t addrPortWidth;                          /*!< The address port width. */
-    semc_rdy_polarity_t rdyactivePolarity;          /*!< Wait ready polarity. */
-    semc_adv_polarity_t advActivePolarity;          /*!< ADV# polarity. */
-    semc_norsram_column_bit_num_t columnAddrBitNum; /*!< Column address bit number. */
-    semc_addr_mode_t addrMode;                      /*!< Address mode. */
-    sem_norsram_burst_len_t burstLen;               /*!< Burst length. */
-    smec_port_size_t portSize;                      /*!< Port size. */
-    uint8_t tCeSetup_Ns;                            /*!< The CE setup time. */
-    uint8_t tCeHold_Ns;                             /*!< The CE hold time. */
-    uint8_t tCeInterval_Ns;                         /*!< CE interval minimum time. */
-    uint8_t tAddrSetup_Ns;                          /*!< The address setup time. */
-    uint8_t tAddrHold_Ns;                           /*!< The address hold time. */
-    uint8_t tWeLow_Ns;                              /*!< WE low time for async mode. */
-    uint8_t tWeHigh_Ns;                             /*!< WE high time for async mode. */
-    uint8_t tReLow_Ns;                              /*!< RE low time for async mode. */
-    uint8_t tReHigh_Ns;                             /*!< RE high time for async mode. */
-    uint8_t tTurnAround_Ns;                         /*!< Turnaround time for async mode. */
-    uint8_t tAddr2WriteHold_Ns;                     /*!< Address to write data hold time for async mode. */
-#if defined(FSL_FEATURE_SEMC_HAS_NOR_WDS_TIME) && (FSL_FEATURE_SEMC_HAS_NOR_WDS_TIME)
-    uint8_t tWriteSetup_Ns; /*!< Write data setup time for sync mode.*/
-#endif
-#if defined(FSL_FEATURE_SEMC_HAS_NOR_WDH_TIME) && (FSL_FEATURE_SEMC_HAS_NOR_WDH_TIME)
-    uint8_t tWriteHold_Ns; /*!< Write hold time for sync mode. */
-#endif
-    uint8_t latencyCount; /*!< Latency count for sync mode. */
-    uint8_t readCycle;    /*!< Read cycle time for sync mode. */
-} semc_nor_config_t;
-
-/*! @brief SEMC SRAM  configuration structure. */
-typedef struct _semc_sram_config
-{
-    semc_iomux_pin cePinMux;               /*!< The CE# pin mux setting. */
-    semc_iomux_nora27_pin addr27;          /*!< The Addr bit 27 pin mux setting. */
-    uint32_t address;                      /*!< The base address. */
-    uint32_t memsize_kbytes;               /*!< The memory size in unit of kbytes. */
-    uint8_t addrPortWidth;                 /*!< The address port width. */
-    semc_adv_polarity_t advActivePolarity; /*!< ADV# polarity 1: active high, 0: active low. */
-    semc_addr_mode_t addrMode;             /*!< Address mode. */
-    sem_norsram_burst_len_t burstLen;      /*!< Burst length. */
-    smec_port_size_t portSize;             /*!< Port size. */
-    uint8_t tCeSetup_Ns;                   /*!< The CE setup time. */
-    uint8_t tCeHold_Ns;                    /*!< The CE hold time. */
-    uint8_t tCeInterval_Ns;                /*!< CE interval minimum time. */
-    uint8_t tAddrSetup_Ns;                 /*!< The address setup time. */
-    uint8_t tAddrHold_Ns;                  /*!< The address hold time. */
-    uint8_t tWeLow_Ns;                     /*!< WE low time for async mode. */
-    uint8_t tWeHigh_Ns;                    /*!< WE high time for async mode. */
-    uint8_t tReLow_Ns;                     /*!< RE low time for async mode. */
-    uint8_t tReHigh_Ns;                    /*!< RE high time for async mode. */
-    uint8_t tTurnAround_Ns;                /*!< Turnaround time for async mode. */
-    uint8_t tAddr2WriteHold_Ns;            /*!< Address to write data hold time for async mode. */
-    uint8_t tWriteSetup_Ns;                /*!< Write data setup time for sync mode.*/
-    uint8_t tWriteHold_Ns;                 /*!< Write hold time for sync mode. */
-    uint8_t latencyCount;                  /*!< Latency count for sync mode. */
-    uint8_t readCycle;                     /*!< Read cycle time for sync mode. */
-} semc_sram_config_t;
-
-/*! @brief SEMC DBI configuration structure. */
-typedef struct _semc_dbi_config
-{
-    semc_iomux_pin csxPinMux;                   /*!< The CE# pin mux. */
-    uint32_t address;                           /*!< The base address. */
-    uint32_t memsize_kbytes;                    /*!< The memory size in unit of 4kbytes. */
-    semc_dbi_column_bit_num_t columnAddrBitNum; /*!< Column address bit number. */
-    sem_dbi_burst_len_t burstLen;               /*!< Burst length. */
-    smec_port_size_t portSize;                  /*!< Port size. */
-    uint8_t tCsxSetup_Ns;                       /*!< The CSX setup time. */
-    uint8_t tCsxHold_Ns;                        /*!< The CSX hold time. */
-    uint8_t tWexLow_Ns;                         /*!< WEX low time. */
-    uint8_t tWexHigh_Ns;                        /*!< WEX high time. */
-    uint8_t tRdxLow_Ns;                         /*!< RDX low time. */
-    uint8_t tRdxHigh_Ns;                        /*!< RDX high time. */
-    uint8_t tCsxInterval_Ns;                    /*!< Write data setup time.*/
-} semc_dbi_config_t;
-
-/*! @brief SEMC AXI queue a weight setting structure. */
-typedef struct _semc_queuea_weight_struct
-{
-    uint32_t qos : 4;              /*!< weight of qos for queue 0 . */
-    uint32_t aging : 4;            /*!< weight of aging for queue 0.*/
-    uint32_t slaveHitSwith : 8;    /*!< weight of read/write switch for queue 0.*/
-    uint32_t slaveHitNoswitch : 8; /*!< weight of read/write no switch for queue 0  .*/
-} semc_queuea_weight_struct_t;
-
-/*! @brief SEMC AXI queue a weight setting union. */
-typedef union _semc_queuea_weight
-{
-    semc_queuea_weight_struct_t queueaConfig; /*!< Structure configuration for queueA. */
-    uint32_t queueaValue; /*!< Configuration value for queueA which could directly write to the reg. */
-} semc_queuea_weight_t;
-
-/*! @brief SEMC AXI queue b weight setting structure. */
-typedef struct _semc_queueb_weight_struct
-{
-    uint32_t qos : 4;           /*!< weight of qos for queue 1. */
-    uint32_t aging : 4;         /*!< weight of aging for queue 1.*/
-    uint32_t slaveHitSwith : 8; /*!< weight of read/write switch for queue 1.*/
-    uint32_t weightPagehit : 8; /*!< weight of page hit for queue 1 only .*/
-    uint32_t bankRotation : 8;  /*!< weight of bank rotation for queue 1 only .*/
-} semc_queueb_weight_struct_t;
-
-/*! @brief SEMC AXI queue b weight setting union. */
-typedef union _semc_queueb_weight
-{
-    semc_queueb_weight_struct_t queuebConfig; /*!< Structure configuration for queueB. */
-    uint32_t queuebValue; /*!< Configuration value for queueB which could directly write to the reg. */
-} semc_queueb_weight_t;
-
-/*! @brief SEMC AXI queue weight setting. */
-typedef struct _semc_axi_queueweight
-{
-    semc_queuea_weight_t queueaWeight; /*!< Weight settings for queue a. */
-    semc_queueb_weight_t queuebWeight; /*!< Weight settings for queue b. */
-} semc_axi_queueweight_t;
-
-/*!
- * @brief SEMC configuration structure.
- *
- * busTimeoutCycles: when busTimeoutCycles is zero, the bus timeout cycle is
- * 255*1024. otherwise the bus timeout cycles is busTimeoutCycles*1024.
- * cmdTimeoutCycles: is used for command execution timeout cycles. it's
- * similar to the busTimeoutCycles.
- */
-typedef struct _semc_config_t
-{
-    semc_dqs_mode_t dqsMode;            /*!< Dummy read strobe mode: use enum in "semc_dqs_mode_t". */
-    uint8_t cmdTimeoutCycles;           /*!< Command execution timeout cycles. */
-    uint8_t busTimeoutCycles;           /*!< Bus timeout cycles. */
-    semc_axi_queueweight_t queueWeight; /*!< AXI queue weight. */
-} semc_config_t;
-
-/*******************************************************************************
- * API
- ******************************************************************************/
-
-#if defined(__cplusplus)
-extern "C" {
-#endif
-
-/*!
- * @name SEMC Initialization and De-initialization
- * @{
- */
-
-/*!
- * @brief Gets the SEMC default basic configuration structure.
- *
- * The purpose of this API is to get the default SEMC
- * configure structure for SEMC_Init(). User may use the initialized
- * structure unchanged in SEMC_Init(), or modify some fields of the
- * structure before calling SEMC_Init().
- * Example:
-   @code
-   semc_config_t config;
-   SEMC_GetDefaultConfig(&config);
-   @endcode
- * @param config The SEMC configuration structure pointer.
- */
-void SEMC_GetDefaultConfig(semc_config_t *config);
-
-/*!
- * @brief Initializes SEMC.
- * This function ungates the SEMC clock and initializes SEMC.
- * This function must be called before calling any other SEMC driver functions.
- *
- * @param base SEMC peripheral base address.
- * @param configure The SEMC configuration structure pointer.
- */
-void SEMC_Init(SEMC_Type *base, semc_config_t *configure);
-
-/*!
- * @brief Deinitializes the SEMC module and gates the clock.
- *
- * This function gates the SEMC clock. As a result, the SEMC module doesn't work after
- * calling this function, for some IDE, calling this API may cause the next downloading
- * operation failed. so, please call this API cautiously. Additional, users can
- * using "#define FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL (1)" to disable the clock control
- * operation in drivers.
- *
- * @param base SEMC peripheral base address.
- */
-void SEMC_Deinit(SEMC_Type *base);
-
-/* @} */
-
-/*!
- * @name SEMC Configuration Operation For Each Memory Type
- * @{
- */
-
-/*!
- * @brief Configures SDRAM controller in SEMC.
- *
- * @param base SEMC peripheral base address.
- * @param cs The chip selection.
- * @param config The sdram configuration.
- * @param clkSrc_Hz The SEMC clock frequency.
- */
-status_t SEMC_ConfigureSDRAM(SEMC_Type *base, semc_sdram_cs_t cs, semc_sdram_config_t *config, uint32_t clkSrc_Hz);
-
-/*!
- * @brief Configures NAND controller in SEMC.
- *
- * @param base SEMC peripheral base address.
- * @param config The nand configuration.
- * @param clkSrc_Hz The SEMC clock frequency.
- */
-status_t SEMC_ConfigureNAND(SEMC_Type *base, semc_nand_config_t *config, uint32_t clkSrc_Hz);
-
-/*!
- * @brief Configures NOR controller in SEMC.
- *
- * @param base SEMC peripheral base address.
- * @param config The nor configuration.
- * @param clkSrc_Hz The SEMC clock frequency.
- */
-status_t SEMC_ConfigureNOR(SEMC_Type *base, semc_nor_config_t *config, uint32_t clkSrc_Hz);
-
-/*!
- * @brief Configures SRAM controller in SEMC.
- *
- * @param base SEMC peripheral base address.
- * @param config The sram configuration.
- * @param clkSrc_Hz The SEMC clock frequency.
- */
-status_t SEMC_ConfigureSRAM(SEMC_Type *base, semc_sram_config_t *config, uint32_t clkSrc_Hz);
-
-/*!
- * @brief Configures DBI controller in SEMC.
- *
- * @param base SEMC peripheral base address.
- * @param config The dbi configuration.
- * @param clkSrc_Hz The SEMC clock frequency.
- */
-status_t SEMC_ConfigureDBI(SEMC_Type *base, semc_dbi_config_t *config, uint32_t clkSrc_Hz);
-
-/* @} */
-
-/*!
- * @name SEMC Interrupt Operation
- * @{
- */
-
-/*!
- * @brief Enables the SEMC interrupt.
- *
- * This function enables the SEMC interrupts according to the provided mask. The mask
- * is a logical OR of enumeration members. See @ref semc_interrupt_enable_t.
- * For example, to enable the IP command done and error interrupt, do the following.
- * @code
- *     SEMC_EnableInterrupts(ENET, kSEMC_IPCmdDoneInterrupt | kSEMC_IPCmdErrInterrupt);
- * @endcode
- *
- * @param base  SEMC peripheral base address.
- * @param mask  SEMC interrupts to enable. This is a logical OR of the
- *             enumeration :: semc_interrupt_enable_t.
- */
-static inline void SEMC_EnableInterrupts(SEMC_Type *base, uint32_t mask)
-{
-    base->INTEN |= mask;
-}
-
-/*!
- * @brief Disables the SEMC interrupt.
- *
- * This function disables the SEMC interrupts according to the provided mask. The mask
- * is a logical OR of enumeration members. See @ref semc_interrupt_enable_t.
- * For example, to disable the IP command done and error interrupt, do the following.
- * @code
- *     SEMC_DisableInterrupts(ENET, kSEMC_IPCmdDoneInterrupt | kSEMC_IPCmdErrInterrupt);
- * @endcode
- *
- * @param base  SEMC peripheral base address.
- * @param mask  SEMC interrupts to disable. This is a logical OR of the
- *             enumeration :: semc_interrupt_enable_t.
- */
-static inline void SEMC_DisableInterrupts(SEMC_Type *base, uint32_t mask)
-{
-    base->INTEN &= ~mask;
-}
-
-/*!
- * @brief Gets the SEMC status.
- *
- * This function gets the SEMC interrupts event status.
- * User can use the a logical OR of enumeration member as a mask.
- * See @ref semc_interrupt_enable_t.
- *
- * @param base  SEMC peripheral base address.
- * @return status flag, use status flag in semc_interrupt_enable_t to get the related status.
- */
-static inline bool SEMC_GetStatusFlag(SEMC_Type *base)
-{
-    return base->INTR;
-}
-
-/*!
- * @brief Clears the SEMC status flag state.
- *
- * The following status register flags can be cleared SEMC interrupt status.
- *
- * @param base SEMC base pointer
- * @param mask The status flag mask, a logical OR of enumeration member @ref semc_interrupt_enable_t.
- */
-static inline void SEMC_ClearStatusFlags(SEMC_Type *base, uint32_t mask)
-{
-    base->INTR |= mask;
-}
-
-/* @} */
-
-/*!
- * @name SEMC Memory Access Operation
- * @{
- */
-
-/*!
- * @brief Check if SEMC is in idle.
- *
- * @param base  SEMC peripheral base address.
- * @return  True SEMC is in idle, false is not in idle.
- */
-static inline bool SEMC_IsInIdle(SEMC_Type *base)
-{
-    return (base->STS0 & SEMC_STS0_IDLE_MASK) ? true : false;
-}
-
-/*!
- * @brief SEMC IP command access.
- *
- * @param base  SEMC peripheral base address.
- * @param type  SEMC memory type. refer to "semc_mem_type_t"
- * @param address  SEMC device address.
- * @param command  SEMC IP command.
- * For NAND device, we should use the SEMC_BuildNandIPCommand to get the right nand command.
- * For NOR/DBI device, take refer to "semc_ipcmd_nor_dbi_t".
- * For SRAM device, take refer to "semc_ipcmd_sram_t".
- * For SDRAM device, take refer to "semc_ipcmd_sdram_t".
- * @param write  Data for write access.
- * @param read   Data pointer for read data out.
- */
-status_t SEMC_SendIPCommand(
-    SEMC_Type *base, semc_mem_type_t type, uint32_t address, uint16_t command, uint32_t write, uint32_t *read);
-
-/*!
- * @brief Build SEMC IP command for NAND.
- *
- * This function build SEMC NAND IP command. The command is build of user command code,
- * SEMC address mode and SEMC command mode.
- *
- * @param userCommand  NAND device normal command.
- * @param addrMode  NAND address mode. Refer to "semc_ipcmd_nand_addrmode_t".
- * @param cmdMode   NAND command mode. Refer to "semc_ipcmd_nand_cmdmode_t".
- */
-static inline uint16_t SEMC_BuildNandIPCommand(uint8_t userCommand,
-                                               semc_ipcmd_nand_addrmode_t addrMode,
-                                               semc_ipcmd_nand_cmdmode_t cmdMode)
-{
-    return (uint16_t)((uint16_t)userCommand << 8) | (uint16_t)(addrMode << 4) | ((uint8_t)cmdMode & 0x0Fu);
-}
-
-/*!
- * @brief Check if the NAND device is ready.
- *
- * @param base  SEMC peripheral base address.
- * @return  True NAND is ready, false NAND is not ready.
- */
-static inline bool SEMC_IsNandReady(SEMC_Type *base)
-{
-    return (base->STS0 & SEMC_STS0_NARDY_MASK) ? true : false;
-}
-
-/*!
- * @brief SEMC NAND device memory write through IP command.
- *
- * @param base  SEMC peripheral base address.
- * @param address  SEMC NAND device address.
- * @param data  Data for write access.
- * @param size_bytes   Data length.
- */
-status_t SEMC_IPCommandNandWrite(SEMC_Type *base, uint32_t address, uint8_t *data, uint32_t size_bytes);
-
-/*!
- * @brief SEMC NAND device memory read through IP command.
- *
- * @param base  SEMC peripheral base address.
- * @param address  SEMC NAND device address.
- * @param data  Data pointer for data read out.
- * @param size_bytes   Data length.
- */
-status_t SEMC_IPCommandNandRead(SEMC_Type *base, uint32_t address, uint8_t *data, uint32_t size_bytes);
-
-/*!
- * @brief SEMC NOR device memory write through IP command.
- *
- * @param base  SEMC peripheral base address.
- * @param address  SEMC NOR device address.
- * @param data  Data for write access.
- * @param size_bytes   Data length.
- */
-status_t SEMC_IPCommandNorWrite(SEMC_Type *base, uint32_t address, uint8_t *data, uint32_t size_bytes);
-
-/*!
- * @brief SEMC NOR device memory read through IP command.
- *
- * @param base  SEMC peripheral base address.
- * @param address  SEMC NOR device address.
- * @param data  Data pointer for data read out.
- * @param size_bytes   Data length.
- */
-status_t SEMC_IPCommandNorRead(SEMC_Type *base, uint32_t address, uint8_t *data, uint32_t size_bytes);
-
-/* @} */
-
-#if defined(__cplusplus)
-}
-#endif
-
-/*! @}*/
-
-#endif /* _FSL_SEMC_H_*/
diff --git a/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_usdhc.h b/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_usdhc.h
index 24476f36c..e9da48b31 100644
--- a/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_usdhc.h
+++ b/Ubiquitous/XiZi/board/xidatong/third_party_driver/include/fsl_usdhc.h
@@ -5,6 +5,15 @@
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
+
+/**
+ * @file fsl_usdhc.h
+ * @brief fsl usdhc drivers
+ * @version 2.0
+ * @author AIIT XUOS Lab
+ * @date 2022-03-15
+ */
+
 #ifndef _FSL_USDHC_H_
 #define _FSL_USDHC_H_
 
diff --git a/Ubiquitous/XiZi/board/xidatong/third_party_driver/sdio/connect_sdio.c b/Ubiquitous/XiZi/board/xidatong/third_party_driver/sdio/connect_sdio.c
index 3e85ef663..431e3fc98 100644
--- a/Ubiquitous/XiZi/board/xidatong/third_party_driver/sdio/connect_sdio.c
+++ b/Ubiquitous/XiZi/board/xidatong/third_party_driver/sdio/connect_sdio.c
@@ -269,7 +269,7 @@ static struct SdioDevDone dev_done =
     SdioRead,
 };
 
-int Imrt1052HwSdioInit(void)
+int Imxrt1052HwSdioInit(void)
 {
     x_err_t ret = EOK;
     bool is_read_only;
diff --git a/Ubiquitous/XiZi/board/xidatong/third_party_driver/uart/connect_uart.c b/Ubiquitous/XiZi/board/xidatong/third_party_driver/uart/connect_uart.c
index 9058e8ef3..ce567700a 100644
--- a/Ubiquitous/XiZi/board/xidatong/third_party_driver/uart/connect_uart.c
+++ b/Ubiquitous/XiZi/board/xidatong/third_party_driver/uart/connect_uart.c
@@ -294,21 +294,21 @@ static int BoardSerialBusInit(struct SerialBus *serial_bus, struct SerialDriver
     /*Init the serial bus */
     ret = SerialBusInit(serial_bus, bus_name);
     if (EOK != ret) {
-        KPrintf("Imrt1052HwUartInit SerialBusInit error %d\n", ret);
+        KPrintf("Imxrt1052HwUartInit SerialBusInit error %d\n", ret);
         return ERROR;
     }
 
     /*Init the serial driver*/
     ret = SerialDriverInit(serial_driver, drv_name);
     if (EOK != ret) {
-        KPrintf("Imrt1052HwUartInit SerialDriverInit error %d\n", ret);
+        KPrintf("Imxrt1052HwUartInit SerialDriverInit error %d\n", ret);
         return ERROR;
     }
 
     /*Attach the serial driver to the serial bus*/
     ret = SerialDriverAttachToBus(drv_name, bus_name);
     if (EOK != ret) {
-        KPrintf("Imrt1052HwUartInit SerialDriverAttachToBus error %d\n", ret);
+        KPrintf("Imxrt1052HwUartInit SerialDriverAttachToBus error %d\n", ret);
         return ERROR;
     } 
 
@@ -322,20 +322,20 @@ static int BoardSerialDevBend(struct SerialHardwareDevice *serial_device, void *
 
     ret = SerialDeviceRegister(serial_device, serial_param, dev_name);
     if (EOK != ret) {
-        KPrintf("Imrt1052HwUartInit SerialDeviceInit device %s error %d\n", dev_name, ret);
+        KPrintf("Imxrt1052HwUartInit SerialDeviceInit device %s error %d\n", dev_name, ret);
         return ERROR;
     }  
 
     ret = SerialDeviceAttachToBus(dev_name, bus_name);
     if (EOK != ret) {
-        KPrintf("Imrt1052HwUartInit SerialDeviceAttachToBus device %s error %d\n", dev_name, ret);
+        KPrintf("Imxrt1052HwUartInit SerialDeviceAttachToBus device %s error %d\n", dev_name, ret);
         return ERROR;
     }  
 
     return  ret;
 }
 
-int Imrt1052HwUartInit(void)
+int Imxrt1052HwUartInit(void)
 {
     x_err_t ret = EOK;
 
@@ -361,13 +361,13 @@ int Imrt1052HwUartInit(void)
 
     ret = BoardSerialBusInit(&serial_bus_1, &serial_driver_1, SERIAL_BUS_NAME_1, SERIAL_DRV_NAME_1);
     if (EOK != ret) {
-        KPrintf("Imrt1052HwUartInit uart error ret %u\n", ret);
+        KPrintf("Imxrt1052HwUartInit uart error ret %u\n", ret);
         return ERROR;
     }
 
     ret = BoardSerialDevBend(&serial_device_1, (void *)&serial_cfg_1, SERIAL_BUS_NAME_1, SERIAL_1_DEVICE_NAME_0);
     if (EOK != ret) {
-        KPrintf("Imrt1052HwUartInit uart error ret %u\n", ret);
+        KPrintf("Imxrt1052HwUartInit uart error ret %u\n", ret);
         return ERROR;
     }    
 #endif
@@ -394,13 +394,13 @@ int Imrt1052HwUartInit(void)
 
     ret = BoardSerialBusInit(&serial_bus_2, &serial_driver_2, SERIAL_BUS_NAME_2, SERIAL_DRV_NAME_2);
     if (EOK != ret) {
-        KPrintf("Imrt1052HwUartInit uart error ret %u\n", ret);
+        KPrintf("Imxrt1052HwUartInit uart error ret %u\n", ret);
         return ERROR;
     }
 
     ret = BoardSerialDevBend(&serial_device_2, (void *)&serial_cfg_2, SERIAL_BUS_NAME_2, SERIAL_2_DEVICE_NAME_0);
     if (EOK != ret) {
-        KPrintf("Imrt1052HwUartInit uart error ret %u\n", ret);
+        KPrintf("Imxrt1052HwUartInit uart error ret %u\n", ret);
         return ERROR;
     }  
 #endif
diff --git a/Ubiquitous/XiZi/board/xidatong/third_party_driver/usb/connect_usb.c b/Ubiquitous/XiZi/board/xidatong/third_party_driver/usb/connect_usb.c
index b8d714446..8baa7c57d 100644
--- a/Ubiquitous/XiZi/board/xidatong/third_party_driver/usb/connect_usb.c
+++ b/Ubiquitous/XiZi/board/xidatong/third_party_driver/usb/connect_usb.c
@@ -256,7 +256,7 @@ static int BoardUsbDevBend(void)
 }
 
 /*RT1052 BOARD USB INIT*/
-int Imrt1052HwUsbHostInit(void)
+int Imxrt1052HwUsbHostInit(void)
 {
     x_err_t ret = EOK;
     int32 usb_host_task = 0;
diff --git a/Ubiquitous/XiZi/kernel/thread/init.c b/Ubiquitous/XiZi/kernel/thread/init.c
index 59a376445..4813111cd 100644
--- a/Ubiquitous/XiZi/kernel/thread/init.c
+++ b/Ubiquitous/XiZi/kernel/thread/init.c
@@ -109,7 +109,7 @@ struct InitSequenceDesc env_init[] =
 	{ "hw usb", Stm32HwUsbInit },
 #endif
 #ifdef BSP_USING_NXP_USBH
-	{ "nxp hw usb", Imrt1052HwUsbHostInit },
+	{ "nxp hw usb", Imxrt1052HwUsbHostInit },
 #endif
 #ifdef MOUNT_SDCARD
 	{ "MountSDCard", MountSDCard },
diff --git a/Ubiquitous/XiZi/resources/include/dev_pin.h b/Ubiquitous/XiZi/resources/include/dev_pin.h
index 568bbd437..ed9b2ce8e 100644
--- a/Ubiquitous/XiZi/resources/include/dev_pin.h
+++ b/Ubiquitous/XiZi/resources/include/dev_pin.h
@@ -30,23 +30,23 @@ extern "C" {
 #define GPIO_LOW                         0x00
 #define GPIO_HIGH                        0x01
 
-#define GPIO_CFG_OUTPUT                          0x00
-#define GPIO_CFG_INPUT                               0x01
+#define GPIO_CFG_OUTPUT                  0x00
+#define GPIO_CFG_INPUT                   0x01
 #define GPIO_CFG_INPUT_PULLUP            0x02
-#define GPIO_CFG_INPUT_PULLDOWN     0x03
-#define GPIO_CFG_OUTPUT_OD                  0x04
+#define GPIO_CFG_INPUT_PULLDOWN          0x03
+#define GPIO_CFG_OUTPUT_OD               0x04
 
 #define GPIO_IRQ_EDGE_RISING             0x00
-#define GPIO_IRQ_EDGE_FALLING          0x01
+#define GPIO_IRQ_EDGE_FALLING            0x01
 #define GPIO_IRQ_EDGE_BOTH               0x02
-#define GPIO_IRQ_LEVEL_HIGH               0x03
-#define GPIO_IRQ_LEVEL_LOW                 0x04
+#define GPIO_IRQ_LEVEL_HIGH              0x03
+#define GPIO_IRQ_LEVEL_LOW               0x04
 
 #define GPIO_CONFIG_MODE                 0xffffffff
-#define GPIO_IRQ_REGISTER                  0xfffffffe
-#define GPIO_IRQ_FREE                            0xfffffffd
-#define GPIO_IRQ_DISABLE                     0xfffffffc
-#define GPIO_IRQ_ENABLE                      0xfffffffb
+#define GPIO_IRQ_REGISTER                0xfffffffe
+#define GPIO_IRQ_FREE                    0xfffffffd
+#define GPIO_IRQ_DISABLE                 0xfffffffc
+#define GPIO_IRQ_ENABLE                  0xfffffffb
 
 struct PinDevIrq
 {