forked from xuos/xiuos
support adc bus
This commit is contained in:
wlyu
parent
5185501d72
commit
efd8999988
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@ -81,8 +81,6 @@ void PlcReadUATask(void *arg)
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if(EOK != ret)
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if(EOK != ret)
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{
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{
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plc_print("plc: [%s] read failed\n", __func__);
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plc_print("plc: [%s] read failed\n", __func__);
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free(plc_demo_dev.priv_data);
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return;
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}
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}
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free(plc_demo_dev.priv_data);
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free(plc_demo_dev.priv_data);
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ops->close(&plc_demo_dev);
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ops->close(&plc_demo_dev);
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@ -94,5 +92,5 @@ void PlcReadTest(int argc, char *argv[])
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}
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}
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SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0) | SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN) | SHELL_CMD_PARAM_NUM(3),
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SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0) | SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN) | SHELL_CMD_PARAM_NUM(3),
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plc, PlcReadTest, test PLC);
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plc, PlcReadTest, Read PLC);
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@ -34,6 +34,7 @@ extern int ExtSramInit(void);
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#include <connect_ethernet.h>
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#include <connect_ethernet.h>
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#include <connect_uart.h>
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#include <connect_uart.h>
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#include <connect_adc.h>
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#define NVIC_PRIORITYGROUP_0 0x00000007U /*!< 0 bits for pre-emption priority
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#define NVIC_PRIORITYGROUP_0 0x00000007U /*!< 0 bits for pre-emption priority
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4 bits for subpriority */
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4 bits for subpriority */
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@ -628,6 +629,11 @@ void InitBoardHardware()
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#ifdef BSP_USING_LPUART
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#ifdef BSP_USING_LPUART
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Imrt1052HwUartInit();
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Imrt1052HwUartInit();
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#endif
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#endif
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#ifdef BSP_USING_ADC
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Imrt1052HwAdcInit();
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#endif
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InstallConsole(KERNEL_CONSOLE_BUS_NAME, KERNEL_CONSOLE_DRV_NAME, KERNEL_CONSOLE_DEVICE_NAME);
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InstallConsole(KERNEL_CONSOLE_BUS_NAME, KERNEL_CONSOLE_DRV_NAME, KERNEL_CONSOLE_DEVICE_NAME);
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@ -35,6 +35,10 @@ menuconfig BSP_USING_ADC
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default y
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default y
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select RESOURCES_ADC
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select RESOURCES_ADC
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if BSP_USING_ADC
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source "$BSP_DIR/third_party_driver/adc/Kconfig"
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endif
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menuconfig BSP_USING_SPI
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menuconfig BSP_USING_SPI
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bool "Using SPI device"
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bool "Using SPI device"
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default y
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default y
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@ -0,0 +1,29 @@
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config BSP_USING_ADC1
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bool "Enable ADC1"
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default y
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if BSP_USING_ADC1
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config ADC_BUS_NAME_1
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string "adc bus 1 name"
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default "adc1"
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config ADC_DRV_NAME_1
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string "adc bus 1 driver name"
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default "adc1_drv"
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config ADC_1_DEVICE_NAME_0
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string "adc bus 1 device name"
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default "adc1_dev"
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endif
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config BSP_USING_ADC2
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bool "Enable ADC2"
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default y
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if BSP_USING_ADC2
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config ADC_BUS_NAME_2
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string "adc bus 2 name"
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default "adc2"
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config ADC_DRV_NAME_2
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string "adc bus 2 driver name"
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default "adc2_drv"
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config ADC_2_DEVICE_NAME_0
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string "adc bus 2 device name"
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default "adc2_dev"
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endif
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@ -1,3 +1,3 @@
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SRC_FILES := fsl_adc.c adc_interrupt.c
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SRC_FILES := fsl_adc.c connect_adc.c
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include $(KERNEL_ROOT)/compiler.mk
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include $(KERNEL_ROOT)/compiler.mk
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@ -1,178 +0,0 @@
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/*
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* Copyright (c) 2013 - 2016, Freescale Semiconductor, Inc.
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* Copyright 2016-2018 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/**
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* @file adc_interrupt.c
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* @brief Demo for ADC function
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* @version 1.0
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* @author AIIT XUOS Lab
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* @date 2022.1.18
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*/
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#include "fsl_debug_console.h"
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#include "board.h"
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#include "fsl_adc.h"
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#include "fsl_common.h"
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#include "pin_mux.h"
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#include "clock_config.h"
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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#define DEMO_ADC_BASE ADC1
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#define DEMO_ADC_IRQn ADC1_IRQn
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//#define DEMO_ADC_USER_CHANNEL 0U
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#define DEMO_ADC_USER_CHANNEL 3U
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#define DEMO_ADC_CHANNEL_GROUP 0U
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#define EXAMPLE_ADC_IRQHandler ADC1_IRQHandler
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#define adc_print KPrintf
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/*******************************************************************************
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* Prototypes
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******************************************************************************/
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/*******************************************************************************
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* Variables
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******************************************************************************/
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volatile bool g_AdcConversionDoneFlag;
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volatile uint32_t g_AdcConversionValue;
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volatile uint32_t g_AdcInterruptCounter;
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const uint32_t g_Adc_12bitFullRange = 4096U;
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/*******************************************************************************
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* Code
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******************************************************************************/
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//#define ADC_BUS_NAME_1 "adc1"
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//#define ADC_DRV_NAME_1 "adc1_drv"
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//#define ADC_1_DEVICE_NAME_0 "adc1_dev0"
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//
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//static struct Bus *adc_bus = NONE; /* I2C bus handle */
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//
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//void AdcInit(const char *bus_name, const char *dev_name, const char *drv_name)
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//{
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// /* find I2C device and get I2C handle */
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// adc_bus = BusFind(bus_name);
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// if (NONE == adc_bus){
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// i2c_print("%s can't find %s bus!\n", __func__, bus_name);
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// }
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// else{
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// i2c_print("%s find %s bus!\n", __func__, bus_name);
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// }
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//
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// adc_bus->owner_haldev = BusFindDevice(adc_bus, dev_name);
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// adc_bus->owner_driver = BusFindDriver(adc_bus, drv_name);
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//
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// if(adc_bus->match(adc_bus->owner_driver, adc_bus->owner_haldev)){
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// i2c_print("i2c match drv %s %p dev %s %p error\n", drv_name, adc_bus->owner_driver, dev_name, adc_bus->owner_haldev);
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// }
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// else{
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// i2c_print("HS3000Init successfully!write %p read %p\n",
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// adc_bus->owner_haldev->dev_done->write,
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// adc_bus->owner_haldev->dev_done->read);
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// }
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//}
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//
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//void TestAdcInit(void)
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//{
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// AdcInit(ADC_BUS_NAME_1, ADC_1_DEVICE_NAME_0, ADC_DRV_NAME_1); /* init sensor */
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//}
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void EXAMPLE_ADC_IRQHandler(int vector, void *param)
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{
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g_AdcConversionDoneFlag = true;
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/* Read conversion result to clear the conversion completed flag. */
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g_AdcConversionValue = ADC_GetChannelConversionValue(DEMO_ADC_BASE, DEMO_ADC_CHANNEL_GROUP);
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g_AdcInterruptCounter++;
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/* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
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exception return operation might vector to incorrect interrupt */
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#if defined __CORTEX_M && (__CORTEX_M == 4U)
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__DSB();
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#endif
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}
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DECLARE_HW_IRQ(ADC1_IRQn, EXAMPLE_ADC_IRQHandler, NONE);
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/*!
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* @brief Main function
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*/
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int test_adc(void)
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{
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int cnt = 3;
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adc_config_t adcConfigStrcut;
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adc_channel_config_t adcChannelConfigStruct;
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EnableIRQ(DEMO_ADC_IRQn);
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adc_print("\r\nADC interrupt Example.\r\n");
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/*
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* config->enableAsynchronousClockOutput = true;
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* config->enableOverWrite = false;
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* config->enableContinuousConversion = false;
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* config->enableHighSpeed = false;
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* config->enableLowPower = false;
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* config->enableLongSample = false;
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* config->referenceVoltageSource = kADC_ReferenceVoltageSourceVref;
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* config->samplePeriodMode = kADC_SamplePeriod2or12Clocks;
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* config->clockSource = kADC_ClockSourceAD;
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* config->clockDriver = kADC_ClockDriver1;
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* config->resolution = kADC_Resolution12Bit;
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*/
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ADC_GetDefaultConfig(&adcConfigStrcut);
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ADC_Init(DEMO_ADC_BASE, &adcConfigStrcut);
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#if !(defined(FSL_FEATURE_ADC_SUPPORT_HARDWARE_TRIGGER_REMOVE) && FSL_FEATURE_ADC_SUPPORT_HARDWARE_TRIGGER_REMOVE)
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ADC_EnableHardwareTrigger(DEMO_ADC_BASE, false);
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#endif
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/* Do auto hardware calibration. */
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if (kStatus_Success == ADC_DoAutoCalibration(DEMO_ADC_BASE))
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{
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adc_print("ADC_DoAntoCalibration() Done.\r\n");
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}
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else
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{
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adc_print("ADC_DoAutoCalibration() Failed.\r\n");
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}
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/* Configure the user channel and interrupt. */
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adcChannelConfigStruct.channelNumber = DEMO_ADC_USER_CHANNEL;
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adcChannelConfigStruct.enableInterruptOnConversionCompleted = true;
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g_AdcInterruptCounter = 0U; /* Clear the interrupt counter. */
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adc_print("ADC Full Range: %d\r\n", g_Adc_12bitFullRange);
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while (cnt --)
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{
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adc_print("Press any key to get user channel's ADC value.\r\n");
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getchar();
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g_AdcConversionDoneFlag = false;
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/*
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When in software trigger mode, each conversion would be launched once calling the "ADC16_ChannelConfigure()"
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function, which works like writing a conversion command and executing it. For another channel's conversion,
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just to change the "channelNumber" field in channel configuration structure, and call the function
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"ADC_ChannelConfigure()"" again.
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Also, the "enableInterruptOnConversionCompleted" inside the channel configuration structure is a parameter
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for
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the conversion command. It takes affect just for the current conversion. If the interrupt is still required
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for the following conversion, it is necessary to assert the "enableInterruptOnConversionCompleted" every
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time
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for each command.
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*/
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ADC_SetChannelConfig(DEMO_ADC_BASE, DEMO_ADC_CHANNEL_GROUP, &adcChannelConfigStruct);
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while (g_AdcConversionDoneFlag == false);
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adc_print("ADC Value: %d\r\n", g_AdcConversionValue);
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adc_print("ADC Interrupt Counter: %d\r\n", g_AdcInterruptCounter);
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}
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}
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SHELL_EXPORT_CMD (SHELL_CMD_PERMISSION(0) | SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN) | SHELL_CMD_PARAM_NUM(0),
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adc, test_adc, ADC test );
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@ -0,0 +1,303 @@
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/*
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* Copyright (c) 2020 AIIT XUOS Lab
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* XiUOS is licensed under Mulan PSL v2.
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* You can use this software according to the terms and conditions of the Mulan PSL v2.
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* You may obtain a copy of Mulan PSL v2 at:
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* http://license.coscl.org.cn/MulanPSL2
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* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
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* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
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* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
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* See the Mulan PSL v2 for more details.
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*/
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/**
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* @file connect_adc.c
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* @brief Demo for ADC function
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* @version 1.0
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* @author AIIT XUOS Lab
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* @date 2022.1.18
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*/
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#include "board.h"
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#include "fsl_adc.h"
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#include "fsl_common.h"
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#include "dev_adc.h"
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#include "bus_adc.h"
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#include "connect_adc.h"
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#define ADC1_BASE_ADDR ADC1
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#define ADC1_IRQ ADC1_IRQn
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#define ADC1_USER_CHANNEL 3U
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#define ADC1_CHANNEL_GROUP 0U
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#define ADC2_BASE_ADDR ADC2
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#define ADC2_IRQ ADC2_IRQn
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#define ADC2_USER_CHANNEL 4U
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#define ADC2_CHANNEL_GROUP 0U
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#define adc_print KPrintf
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#define ADC1_BUS_NAME "adc1"
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#define ADC1_DRV_NAME "adc1_drv"
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#define ADC1_DEV_NAME "adc1_dev"
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#define ADC2_BUS_NAME "adc2"
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#define ADC2_DRV_NAME "adc2_drv"
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#define ADC2_DEV_NAME "adc2_dev"
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volatile bool adc1_flag;
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volatile uint32_t adc1_val;
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volatile uint32_t adc1_irq_cnt;
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volatile bool adc2_flag;
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volatile uint32_t adc2_val;
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volatile uint32_t adc2_irq_cnt;
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/*******************************************************************************
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* Code
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******************************************************************************/
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void ADC1_IRQHandler(int vector, void *param)
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{
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adc1_flag = true;
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/* Read conversion result to clear the conversion completed flag. */
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adc1_val = ADC_GetChannelConversionValue(ADC1_BASE_ADDR, ADC1_CHANNEL_GROUP);
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adc1_irq_cnt++;
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/* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
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exception return operation might vector to incorrect interrupt */
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#if defined __CORTEX_M && (__CORTEX_M == 4U)
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__DSB();
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#endif
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}
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DECLARE_HW_IRQ(ADC1_IRQn, ADC1_IRQHandler, NONE);
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void ADC2_IRQHandler(int vector, void *param)
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{
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adc2_flag = true;
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/* Read conversion result to clear the conversion completed flag. */
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adc2_val = ADC_GetChannelConversionValue(ADC2_BASE_ADDR, ADC2_CHANNEL_GROUP);
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adc2_irq_cnt++;
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/* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
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exception return operation might vector to incorrect interrupt */
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#if defined __CORTEX_M && (__CORTEX_M == 4U)
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__DSB();
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#endif
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}
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DECLARE_HW_IRQ(ADC2_IRQn, ADC2_IRQHandler, NONE);
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uint32 Imrt1052AdcOpen(void *dev)
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{
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struct AdcHardwareDevice *adc_dev = (struct AdcHardwareDevice *)dev;
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|
adc_config_t adc_cfg;
|
||||||
|
|
||||||
|
#ifdef BSP_USING_ADC1
|
||||||
|
if (0 == strncmp(adc_dev->haldev.dev_name, ADC1_DEV_NAME, NAME_NUM_MAX)) {
|
||||||
|
EnableIRQ(ADC1_IRQn);
|
||||||
|
ADC_GetDefaultConfig(&adc_cfg);
|
||||||
|
ADC_Init(ADC1, &adc_cfg);
|
||||||
|
#if !(defined(FSL_FEATURE_ADC_SUPPORT_HARDWARE_TRIGGER_REMOVE) && FSL_FEATURE_ADC_SUPPORT_HARDWARE_TRIGGER_REMOVE)
|
||||||
|
ADC_EnableHardwareTrigger(ADC1, false);
|
||||||
|
#endif
|
||||||
|
/* Do auto hardware calibration. */
|
||||||
|
if (kStatus_Success == ADC_DoAutoCalibration(ADC1))
|
||||||
|
{
|
||||||
|
adc_print("ADC_DoAntoCalibration() Done.\r\n");
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
adc_print("ADC_DoAutoCalibration() Failed.\r\n");
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef BSP_USING_ADC2
|
||||||
|
if (0 == strncmp(adc_dev->haldev.dev_name, ADC2_DEV_NAME, NAME_NUM_MAX)) {
|
||||||
|
EnableIRQ(ADC2_IRQn);
|
||||||
|
ADC_GetDefaultConfig(&adc_cfg);
|
||||||
|
ADC_Init(ADC2, &adc_cfg);
|
||||||
|
#if !(defined(FSL_FEATURE_ADC_SUPPORT_HARDWARE_TRIGGER_REMOVE) && FSL_FEATURE_ADC_SUPPORT_HARDWARE_TRIGGER_REMOVE)
|
||||||
|
ADC_EnableHardwareTrigger(ADC2, false);
|
||||||
|
#endif
|
||||||
|
/* Do auto hardware calibration. */
|
||||||
|
if (kStatus_Success == ADC_DoAutoCalibration(ADC2))
|
||||||
|
{
|
||||||
|
adc_print("ADC_DoAntoCalibration() Done.\r\n");
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
adc_print("ADC_DoAutoCalibration() Failed.\r\n");
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
return EOK;
|
||||||
|
}
|
||||||
|
|
||||||
|
uint32 Imrt1052AdcClose(void *dev)
|
||||||
|
{
|
||||||
|
return EOK;
|
||||||
|
}
|
||||||
|
|
||||||
|
uint32 Imrt1052AdcRead(void *dev, struct BusBlockReadParam *read_param)
|
||||||
|
{
|
||||||
|
struct AdcHardwareDevice *adc_dev = (struct AdcHardwareDevice *)dev;
|
||||||
|
adc_channel_config_t ch_cfg;
|
||||||
|
|
||||||
|
#ifdef BSP_USING_ADC1
|
||||||
|
if (0 == strncmp(adc_dev->haldev.dev_name, ADC1_DEV_NAME, NAME_NUM_MAX)) {
|
||||||
|
/* Configure the user channel and interrupt. */
|
||||||
|
ch_cfg.channelNumber = ADC1_USER_CHANNEL;
|
||||||
|
ch_cfg.enableInterruptOnConversionCompleted = true;
|
||||||
|
adc1_irq_cnt = 0U; /* Clear the interrupt counter. */
|
||||||
|
adc1_flag = false;
|
||||||
|
ADC_SetChannelConfig(ADC1, ADC1_CHANNEL_GROUP, &ch_cfg);
|
||||||
|
while (adc1_flag == false);
|
||||||
|
|
||||||
|
adc_print("ADC Value: %d\r\n", adc1_val);
|
||||||
|
adc_print("ADC Interrupt Counter: %d\r\n", adc1_irq_cnt);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef BSP_USING_ADC2
|
||||||
|
if (0 == strncmp(adc_dev->haldev.dev_name, ADC2_DEV_NAME, NAME_NUM_MAX)) {
|
||||||
|
/* Configure the user channel and interrupt. */
|
||||||
|
ch_cfg.channelNumber = ADC2_USER_CHANNEL;
|
||||||
|
ch_cfg.enableInterruptOnConversionCompleted = true;
|
||||||
|
adc2_irq_cnt = 0U; /* Clear the interrupt counter. */
|
||||||
|
adc2_flag = false;
|
||||||
|
ADC_SetChannelConfig(ADC2, ADC2_CHANNEL_GROUP, &ch_cfg);
|
||||||
|
while (adc2_flag == false);
|
||||||
|
|
||||||
|
adc_print("ADC Value: %d\r\n", adc2_val);
|
||||||
|
adc_print("ADC Interrupt Counter: %d\r\n", adc2_irq_cnt);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
return adc1_val;
|
||||||
|
}
|
||||||
|
|
||||||
|
static uint32 Imrt1052AdcDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
|
||||||
|
{
|
||||||
|
NULL_PARAM_CHECK(drv);
|
||||||
|
NULL_PARAM_CHECK(configure_info);
|
||||||
|
|
||||||
|
x_err_t ret = EOK;
|
||||||
|
uint8 adc_channel;
|
||||||
|
|
||||||
|
struct AdcDriver *adc_drv = (struct AdcDriver *)drv;
|
||||||
|
struct AdcHardwareDevice *adc_dev = (struct AdcHardwareDevice *)adc_drv->driver.owner_bus->owner_haldev;
|
||||||
|
struct Imrt1052HwAdc *adc_cfg = (struct Imrt1052HwAdc *)adc_dev->haldev.private_data;
|
||||||
|
|
||||||
|
switch (configure_info->configure_cmd)
|
||||||
|
{
|
||||||
|
case OPE_CFG:
|
||||||
|
adc_cfg->adc_channel = *(uint8 *)configure_info->private_data;
|
||||||
|
if (adc_cfg->adc_channel > 18) {
|
||||||
|
KPrintf("Imrt1052AdcDrvConfigure set adc channel(0-18) %u error!", adc_cfg->adc_channel);
|
||||||
|
adc_cfg->adc_channel = 0;
|
||||||
|
ret = ERROR;
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
static const struct AdcDevDone dev_done =
|
||||||
|
{
|
||||||
|
Imrt1052AdcOpen,
|
||||||
|
Imrt1052AdcClose,
|
||||||
|
NONE,
|
||||||
|
Imrt1052AdcRead,
|
||||||
|
};
|
||||||
|
|
||||||
|
int Imrt1052HwAdcInit(void)
|
||||||
|
{
|
||||||
|
x_err_t ret = EOK;
|
||||||
|
|
||||||
|
#ifdef BSP_USING_ADC1
|
||||||
|
static struct AdcBus adc1_bus;
|
||||||
|
static struct AdcDriver adc1_drv;
|
||||||
|
static struct AdcHardwareDevice adc1_dev;
|
||||||
|
static struct Imrt1052HwAdc adc1_cfg;
|
||||||
|
|
||||||
|
adc1_drv.configure = Imrt1052AdcDrvConfigure;
|
||||||
|
|
||||||
|
ret = AdcBusInit(&adc1_bus, ADC1_BUS_NAME);
|
||||||
|
if (ret != EOK) {
|
||||||
|
KPrintf("ADC1 bus init error %d\n", ret);
|
||||||
|
return ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
ret = AdcDriverInit(&adc1_drv, ADC1_DRV_NAME);
|
||||||
|
if (ret != EOK) {
|
||||||
|
KPrintf("ADC1 driver init error %d\n", ret);
|
||||||
|
return ERROR;
|
||||||
|
}
|
||||||
|
ret = AdcDriverAttachToBus(ADC1_DRV_NAME, ADC1_BUS_NAME);
|
||||||
|
if (ret != EOK) {
|
||||||
|
KPrintf("ADC1 driver attach error %d\n", ret);
|
||||||
|
return ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
adc1_dev.adc_dev_done = &dev_done;
|
||||||
|
|
||||||
|
ret = AdcDeviceRegister(&adc1_dev, (void *)&adc1_cfg, ADC1_DEV_NAME);
|
||||||
|
if (ret != EOK) {
|
||||||
|
KPrintf("ADC1 device register error %d\n", ret);
|
||||||
|
return ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
ret = AdcDeviceAttachToBus(ADC1_DEV_NAME, ADC1_BUS_NAME);
|
||||||
|
if (ret != EOK) {
|
||||||
|
KPrintf("ADC1 device register error %d\n", ret);
|
||||||
|
return ERROR;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef BSP_USING_ADC2
|
||||||
|
static struct AdcBus adc2_bus;
|
||||||
|
static struct AdcDriver adc2_drv;
|
||||||
|
static struct AdcHardwareDevice adc2_dev;
|
||||||
|
static struct Imrt1052HwAdc adc2_cfg;
|
||||||
|
|
||||||
|
adc2_drv.configure = Imrt1052AdcDrvConfigure;
|
||||||
|
|
||||||
|
ret = AdcBusInit(&adc2_bus, ADC2_BUS_NAME);
|
||||||
|
if (ret != EOK) {
|
||||||
|
KPrintf("ADC2 bus init error %d\n", ret);
|
||||||
|
return ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
ret = AdcDriverInit(&adc2_drv, ADC2_DRV_NAME);
|
||||||
|
if (ret != EOK) {
|
||||||
|
KPrintf("ADC2 driver init error %d\n", ret);
|
||||||
|
return ERROR;
|
||||||
|
}
|
||||||
|
ret = AdcDriverAttachToBus(ADC2_DRV_NAME, ADC2_BUS_NAME);
|
||||||
|
if (ret != EOK) {
|
||||||
|
KPrintf("ADC2 driver attach error %d\n", ret);
|
||||||
|
return ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
adc2_dev.adc_dev_done = &dev_done;
|
||||||
|
|
||||||
|
ret = AdcDeviceRegister(&adc2_dev, (void *)&adc2_cfg, ADC2_DEV_NAME);
|
||||||
|
if (ret != EOK) {
|
||||||
|
KPrintf("ADC2 device register error %d\n", ret);
|
||||||
|
return ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
ret = AdcDeviceAttachToBus(ADC2_DEV_NAME, ADC2_BUS_NAME);
|
||||||
|
if (ret != EOK) {
|
||||||
|
KPrintf("ADC2 device register error %d\n", ret);
|
||||||
|
return ERROR;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
@ -0,0 +1,34 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2020 AIIT XUOS Lab
|
||||||
|
* XiUOS is licensed under Mulan PSL v2.
|
||||||
|
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||||
|
* You may obtain a copy of Mulan PSL v2 at:
|
||||||
|
* http://license.coscl.org.cn/MulanPSL2
|
||||||
|
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||||
|
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||||
|
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||||
|
* See the Mulan PSL v2 for more details.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @file connect_adc.h
|
||||||
|
* @brief define stm32f407-st-discovery adc function and struct
|
||||||
|
* @version 1.1
|
||||||
|
* @author AIIT XUOS Lab
|
||||||
|
* @date 2021-12-28
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef CONNECT_ADC_H
|
||||||
|
#define CONNECT_ADC_H
|
||||||
|
|
||||||
|
#include <device.h>
|
||||||
|
|
||||||
|
struct Imrt1052HwAdc
|
||||||
|
{
|
||||||
|
void *ADCx;
|
||||||
|
uint8 adc_channel;
|
||||||
|
};
|
||||||
|
|
||||||
|
int Imrt1052HwAdcInit(void);
|
||||||
|
|
||||||
|
#endif
|
||||||
Loading…
Reference in New Issue