autotest
/
xiuos
forked from xuos/xiuos
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Merge pull request 'Update bsp of stm32h743_openmv_h7plus' (#25) from WentaoWong/xiuos:dev into dev

This commit is contained in:
chunyexixiaoyu 2022-04-20 10:02:51 +08:00
parent 355669e402 3c42d161c0
commit ef878c6890
23 changed files with 2198 additions and 233 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

155
Ubiquitous/RT-Thread_Fusion_XiUOS/aiit_board/stm32h743_openmv_h7plus/.config
View File

@ -11,7 +11,6 @@ CONFIG_RTT_DIR="../../rt-thread"
# RT-Thread Kernel
#
CONFIG_RT_NAME_MAX=8
# CONFIG_RT_USING_BIG_ENDIAN is not set
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
# CONFIG_RT_USING_SMP is not set
CONFIG_RT_ALIGN_SIZE=4
@ -22,6 +21,7 @@ CONFIG_RT_THREAD_PRIORITY_MAX=32
CONFIG_RT_TICK_PER_SECOND=1000
CONFIG_RT_USING_OVERFLOW_CHECK=y
CONFIG_RT_USING_HOOK=y
CONFIG_RT_HOOK_USING_FUNC_PTR=y
CONFIG_RT_USING_IDLE_HOOK=y
CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
CONFIG_IDLE_THREAD_STACK_SIZE=256
@ -32,7 +32,8 @@ CONFIG_IDLE_THREAD_STACK_SIZE=256
#
# CONFIG_RT_KSERVICE_USING_STDLIB is not set
# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
# CONFIG_RT_USING_ASM_MEMCPY is not set
# CONFIG_RT_USING_TINY_FFS is not set
# CONFIG_RT_KPRINTF_USING_LONGLONG is not set
CONFIG_RT_DEBUG=y
CONFIG_RT_DEBUG_COLOR=y
# CONFIG_RT_DEBUG_INIT_CONFIG is not set
@ -60,14 +61,19 @@ CONFIG_RT_USING_MESSAGEQUEUE=y
# Memory Management
#
CONFIG_RT_USING_MEMPOOL=y
CONFIG_RT_USING_MEMHEAP=y
CONFIG_RT_USING_MEMHEAP_AUTO_BINDING=y
# CONFIG_RT_USING_NOHEAP is not set
# CONFIG_RT_USING_SMALL_MEM is not set
# CONFIG_RT_USING_SLAB is not set
CONFIG_RT_USING_MEMHEAP=y
CONFIG_RT_MEMHEAP_FAST_MODE=y
# CONFIG_RT_MEMHEAP_BSET_MODE is not set
# CONFIG_RT_USING_SMALL_MEM_AS_HEAP is not set
CONFIG_RT_USING_MEMHEAP_AS_HEAP=y
CONFIG_RT_USING_MEMHEAP_AUTO_BINDING=y
# CONFIG_RT_USING_SLAB_AS_HEAP is not set
# CONFIG_RT_USING_USERHEAP is not set
# CONFIG_RT_USING_NOHEAP is not set
# CONFIG_RT_USING_MEMTRACE is not set
# CONFIG_RT_USING_HEAP_ISR is not set
CONFIG_RT_USING_HEAP=y
#
@ -79,8 +85,7 @@ CONFIG_RT_USING_DEVICE=y
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=256
CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
# CONFIG_RT_PRINTF_LONGLONG is not set
CONFIG_RT_VER_NUM=0x40004
CONFIG_RT_VER_NUM=0x40100
CONFIG_ARCH_ARM=y
CONFIG_RT_USING_CPU_FFS=y
CONFIG_ARCH_ARM_CORTEX_M=y
@ -94,18 +99,9 @@ CONFIG_RT_USING_COMPONENTS_INIT=y
CONFIG_RT_USING_USER_MAIN=y
CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
CONFIG_RT_MAIN_THREAD_PRIORITY=10
#
# C++ features
#
CONFIG_RT_USING_CPLUSPLUS=y
# CONFIG_RT_USING_CPLUSPLUS11 is not set
#
# Command shell
#
CONFIG_RT_USING_FINSH=y
# CONFIG_RT_USING_LEGACY is not set
CONFIG_RT_USING_MSH=y
CONFIG_RT_USING_FINSH=y
CONFIG_FINSH_USING_MSH=y
CONFIG_FINSH_THREAD_NAME="tshell"
CONFIG_FINSH_THREAD_PRIORITY=20
@ -119,11 +115,8 @@ CONFIG_FINSH_USING_DESCRIPTION=y
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
# CONFIG_FINSH_USING_AUTH is not set
CONFIG_FINSH_ARG_MAX=10
#
# Device virtual file system
#
CONFIG_RT_USING_DFS=y
CONFIG_DFS_USING_POSIX=y
CONFIG_DFS_USING_WORKDIR=y
CONFIG_DFS_FILESYSTEMS_MAX=4
CONFIG_DFS_FILESYSTEM_TYPES_MAX=4
@ -153,14 +146,15 @@ CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=4096
CONFIG_RT_DFS_ELM_REENTRANT=y
CONFIG_RT_DFS_ELM_MUTEX_TIMEOUT=3000
CONFIG_RT_USING_DFS_DEVFS=y
CONFIG_RT_USING_DFS_ROMFS=y
# CONFIG_RT_USING_DFS_RAMFS is not set
# CONFIG_RT_USING_DFS_ROMFS is not set
CONFIG_RT_USING_DFS_RAMFS=y
# CONFIG_RT_USING_FAL is not set
# CONFIG_RT_USING_LWP is not set
#
# Device Drivers
#
CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_PIPE_BUFSZ=512
# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
CONFIG_RT_USING_SERIAL=y
CONFIG_RT_USING_SERIAL_V1=y
@ -179,9 +173,28 @@ CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_PM is not set
# CONFIG_RT_USING_RTC is not set
# CONFIG_RT_USING_SDIO is not set
# CONFIG_RT_USING_SPI is not set
CONFIG_RT_USING_RTC=y
# CONFIG_RT_USING_ALARM is not set
# CONFIG_RT_USING_SOFT_RTC is not set
CONFIG_RT_USING_SDIO=y
CONFIG_RT_SDIO_STACK_SIZE=512
CONFIG_RT_SDIO_THREAD_PRIORITY=15
CONFIG_RT_MMCSD_STACK_SIZE=1024
CONFIG_RT_MMCSD_THREAD_PREORITY=22
CONFIG_RT_MMCSD_MAX_PARTITION=16
# CONFIG_RT_SDIO_DEBUG is not set
CONFIG_RT_USING_SPI=y
# CONFIG_RT_USING_SPI_BITOPS is not set
CONFIG_RT_USING_QSPI=y
# CONFIG_RT_USING_SPI_MSD is not set
CONFIG_RT_USING_SFUD=y
CONFIG_RT_SFUD_USING_SFDP=y
CONFIG_RT_SFUD_USING_FLASH_INFO_TABLE=y
CONFIG_RT_SFUD_USING_QSPI=y
CONFIG_RT_SFUD_SPI_MAX_HZ=50000000
# CONFIG_RT_DEBUG_SFUD is not set
# CONFIG_RT_USING_ENC28J60 is not set
# CONFIG_RT_USING_SPI_WIFI is not set
# CONFIG_RT_USING_WDT is not set
# CONFIG_RT_USING_AUDIO is not set
# CONFIG_RT_USING_SENSOR is not set
@ -194,53 +207,64 @@ CONFIG_RT_USING_PIN=y
#
# Using USB
#
CONFIG_RT_USING_USB=y
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
CONFIG_RT_USING_USB_DEVICE=y
CONFIG_RT_USBD_THREAD_STACK_SZ=4096
CONFIG_USB_VENDOR_ID=0x0FFE
CONFIG_USB_PRODUCT_ID=0x0001
# CONFIG_RT_USB_DEVICE_COMPOSITE is not set
# CONFIG__RT_USB_DEVICE_NONE is not set
CONFIG__RT_USB_DEVICE_CDC=y
# CONFIG__RT_USB_DEVICE_MSTORAGE is not set
# CONFIG__RT_USB_DEVICE_HID is not set
# CONFIG__RT_USB_DEVICE_WINUSB is not set
# CONFIG__RT_USB_DEVICE_AUDIO is not set
CONFIG_RT_USB_DEVICE_CDC=y
CONFIG_RT_VCOM_TASK_STK_SIZE=512
CONFIG_RT_CDC_RX_BUFSIZE=128
# CONFIG_RT_VCOM_TX_USE_DMA is not set
CONFIG_RT_VCOM_SERNO="32021919830108"
CONFIG_RT_VCOM_SER_LEN=14
CONFIG_RT_VCOM_TX_TIMEOUT=1000
#
# POSIX layer and C standard library
# C/C++ and POSIX layer
#
CONFIG_RT_USING_LIBC=y
CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
#
# POSIX (Portable Operating System Interface) layer
#
# CONFIG_RT_USING_POSIX_FS is not set
CONFIG_RT_USING_POSIX_DELAY=y
CONFIG_RT_USING_POSIX_CLOCK=y
# CONFIG_RT_USING_POSIX_TIMER is not set
CONFIG_RT_USING_PTHREADS=y
CONFIG_PTHREAD_NUM_MAX=8
CONFIG_RT_USING_POSIX=y
# CONFIG_RT_USING_POSIX_MMAP is not set
# CONFIG_RT_USING_POSIX_TERMIOS is not set
# CONFIG_RT_USING_POSIX_GETLINE is not set
# CONFIG_RT_USING_POSIX_AIO is not set
CONFIG_RT_LIBC_USING_TIME=y
# CONFIG_RT_USING_MODULE is not set
CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
#
# Interprocess Communication (IPC)
#
# CONFIG_RT_USING_POSIX_PIPE is not set
# CONFIG_RT_USING_POSIX_MESSAGE_QUEUE is not set
# CONFIG_RT_USING_POSIX_MESSAGE_SEMAPHORE is not set
#
# Socket is in the 'Network' category
#
CONFIG_RT_USING_CPLUSPLUS=y
# CONFIG_RT_USING_CPLUSPLUS11 is not set
#
# Network
#
#
# Socket abstraction layer
#
# CONFIG_RT_USING_SAL is not set
#
# Network interface device
#
# CONFIG_RT_USING_NETDEV is not set
#
# light weight TCP/IP stack
#
# CONFIG_RT_USING_LWIP is not set
#
# AT commands
#
# CONFIG_RT_USING_AT is not set
#
# VBUS(Virtual Software BUS)
#
# CONFIG_RT_USING_VBUS is not set
#
# Utilities
#
@ -249,7 +273,7 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_RT_USING_UTEST is not set
# CONFIG_RT_USING_VAR_EXPORT is not set
# CONFIG_RT_USING_RT_LINK is not set
# CONFIG_RT_USING_LWP is not set
# CONFIG_RT_USING_VBUS is not set
#
# RT-Thread Utestcases
@ -272,11 +296,20 @@ CONFIG_BSP_USING_UART1=y
# CONFIG_BSP_UART1_RX_USING_DMA is not set
# CONFIG_BSP_USING_UART2 is not set
# CONFIG_BSP_USING_LPUART1 is not set
CONFIG_BSP_USING_SDRAM=y
CONFIG_BSP_USING_QSPI=y
CONFIG_BSP_USING_ONCHIP_RTC=y
# CONFIG_BSP_USING_CRC is not set
# CONFIG_BSP_USING_RNG is not set
# CONFIG_BSP_USING_UDID is not set
#
# Onboard Peripheral Drivers
#
CONFIG_BSP_USING_SDRAM=y
# CONFIG_BSP_USING_QSPI_FLASH is not set
CONFIG_BSP_USING_SDMMC=y
CONFIG_BSP_USING_USBD=y
#
# More Drivers
#

29
Ubiquitous/RT-Thread_Fusion_XiUOS/aiit_board/stm32h743_openmv_h7plus/README.md
View File

@ -83,3 +83,32 @@
| PG8 | FMC_SDCLK |
| PG15 | FMC_SDNCAS |
| PF11 | FMC_SDNRAS |
### QSPI FLASH W25Q256JV
| 引脚 | 作用 |
| ---- | --------------- |
| PF6 | QUADSPI_BK1_IO3 |
| PF7 | QUADSPI_BK1_IO2 |
| PF8 | QUADSPI_BK1_IO0 |
| PF9 | QUADSPI_BK1_IO1 |
| PF10 | QUADSPI_CLK |
| PG6 | QUADSPI_BK1_NCS |
### SDIO USD-1040310811
| 引脚 | 作用 |
| ---- | ---------- |
| PC8 | SDMMC1_D0 |
| PC9 | SDMMC1_D1 |
| PC10 | SDMMC1_D2 |
| PC11 | SDMMC1_D3 |
| PC12 | SDMMC1_CK |
| PD2 | SDMMC1_CMD |
### USBCDC
| 引脚 | 作用 |
| ---- | ------------- |
| PA11 | USB_OTG_FS_DM |
| PA12 | USB_OTG_FS_DP |

4
Ubiquitous/RT-Thread_Fusion_XiUOS/aiit_board/stm32h743_openmv_h7plus/applications/main.c
View File

@ -31,9 +31,11 @@ extern int FrameworkInit();
int main(void)
{
rt_pin_mode(LEDR_PIN, PIN_MODE_OUTPUT);
rt_thread_mdelay(100);
FrameworkInit();
printf("XIUOS stm32h7 build %s %s\n",__DATE__,__TIME__);
#ifdef BSP_USING_USBD
//rt_console_set_device("vcom");
#endif
while (1)
{
rt_pin_write(LEDR_PIN, PIN_HIGH);

4
Ubiquitous/RT-Thread_Fusion_XiUOS/aiit_board/stm32h743_openmv_h7plus/board/CubeMX_Config/.mxproject
View File

File diff suppressed because one or more lines are too long

6
Ubiquitous/RT-Thread_Fusion_XiUOS/aiit_board/stm32h743_openmv_h7plus/board/CubeMX_Config/Core/Inc/main.h
View File

@ -49,6 +49,8 @@ extern "C" {
/* USER CODE END EM */
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
/* Exported functions prototypes ---------------------------------------------*/
void Error_Handler(void);
@ -59,10 +61,6 @@ void Error_Handler(void);
/* Private defines -----------------------------------------------------------*/
#define LED_RED_Pin GPIO_PIN_0
#define LED_RED_GPIO_Port GPIOC
#define LED_GREEN_Pin GPIO_PIN_1
#define LED_GREEN_GPIO_Port GPIOC
#define LED_BLUE_Pin GPIO_PIN_2
#define LED_BLUE_GPIO_Port GPIOC
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */

12
Ubiquitous/RT-Thread_Fusion_XiUOS/aiit_board/stm32h743_openmv_h7plus/board/CubeMX_Config/Core/Inc/stm32h7xx_hal_conf.h
View File

@ -43,7 +43,7 @@
/* #define HAL_CRC_MODULE_ENABLED */
/* #define HAL_CRYP_MODULE_ENABLED */
/* #define HAL_DAC_MODULE_ENABLED */
/* #define HAL_DCMI_MODULE_ENABLED */
#define HAL_DCMI_MODULE_ENABLED
/* #define HAL_DMA2D_MODULE_ENABLED */
/* #define HAL_ETH_MODULE_ENABLED */
/* #define HAL_NAND_MODULE_ENABLED */
@ -64,23 +64,23 @@
/* #define HAL_IWDG_MODULE_ENABLED */
/* #define HAL_LPTIM_MODULE_ENABLED */
/* #define HAL_LTDC_MODULE_ENABLED */
/* #define HAL_QSPI_MODULE_ENABLED */
#define HAL_QSPI_MODULE_ENABLED
/* #define HAL_RAMECC_MODULE_ENABLED */
/* #define HAL_RNG_MODULE_ENABLED */
/* #define HAL_RTC_MODULE_ENABLED */
#define HAL_RTC_MODULE_ENABLED
/* #define HAL_SAI_MODULE_ENABLED */
/* #define HAL_SD_MODULE_ENABLED */
#define HAL_SD_MODULE_ENABLED
/* #define HAL_MMC_MODULE_ENABLED */
/* #define HAL_SPDIFRX_MODULE_ENABLED */
/* #define HAL_SPI_MODULE_ENABLED */
/* #define HAL_SWPMI_MODULE_ENABLED */
/* #define HAL_TIM_MODULE_ENABLED */
#define HAL_TIM_MODULE_ENABLED
#define HAL_UART_MODULE_ENABLED
/* #define HAL_USART_MODULE_ENABLED */
/* #define HAL_IRDA_MODULE_ENABLED */
/* #define HAL_SMARTCARD_MODULE_ENABLED */
/* #define HAL_WWDG_MODULE_ENABLED */
/* #define HAL_PCD_MODULE_ENABLED */
#define HAL_PCD_MODULE_ENABLED
/* #define HAL_HCD_MODULE_ENABLED */
/* #define HAL_DFSDM_MODULE_ENABLED */
/* #define HAL_DSI_MODULE_ENABLED */

5
Ubiquitous/RT-Thread_Fusion_XiUOS/aiit_board/stm32h743_openmv_h7plus/board/CubeMX_Config/Core/Inc/stm32h7xx_it.h
View File

@ -55,6 +55,11 @@ void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
void DMA1_Stream3_IRQHandler(void);
void SDMMC1_IRQHandler(void);
void DCMI_IRQHandler(void);
void OTG_FS_EP1_OUT_IRQHandler(void);
void OTG_FS_EP1_IN_IRQHandler(void);
/* USER CODE BEGIN EFP */
/* USER CODE END EFP */

346
Ubiquitous/RT-Thread_Fusion_XiUOS/aiit_board/stm32h743_openmv_h7plus/board/CubeMX_Config/Core/Src/main.c
View File

@ -40,8 +40,21 @@
/* Private variables ---------------------------------------------------------*/
DCMI_HandleTypeDef hdcmi;
DMA_HandleTypeDef hdma_dcmi;
QSPI_HandleTypeDef hqspi;
RTC_HandleTypeDef hrtc;
SD_HandleTypeDef hsd1;
TIM_HandleTypeDef htim1;
UART_HandleTypeDef huart1;
PCD_HandleTypeDef hpcd_USB_OTG_FS;
SDRAM_HandleTypeDef hsdram1;
/* USER CODE BEGIN PV */
@ -53,6 +66,13 @@ void SystemClock_Config(void);
static void MX_GPIO_Init(void);
static void MX_USART1_UART_Init(void);
static void MX_FMC_Init(void);
static void MX_QUADSPI_Init(void);
static void MX_SDMMC1_SD_Init(void);
static void MX_DMA_Init(void);
static void MX_RTC_Init(void);
static void MX_DCMI_Init(void);
static void MX_USB_OTG_FS_PCD_Init(void);
static void MX_TIM1_Init(void);
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
@ -72,6 +92,12 @@ int main(void)
/* USER CODE END 1 */
/* Enable I-Cache---------------------------------------------------------*/
SCB_EnableICache();
/* Enable D-Cache---------------------------------------------------------*/
SCB_EnableDCache();
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
@ -92,6 +118,13 @@ int main(void)
MX_GPIO_Init();
MX_USART1_UART_Init();
MX_FMC_Init();
MX_QUADSPI_Init();
MX_SDMMC1_SD_Init();
MX_DMA_Init();
MX_RTC_Init();
MX_DCMI_Init();
MX_USB_OTG_FS_PCD_Init();
MX_TIM1_Init();
/* USER CODE BEGIN 2 */
/* USER CODE END 2 */
@ -119,24 +152,25 @@ void SystemClock_Config(void)
/** Supply configuration update enable
*/
HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
/** Configure the main internal regulator output voltage
*/
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_LSI
|RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL.PLLM = 3;
RCC_OscInitStruct.PLL.PLLN = 200;
RCC_OscInitStruct.PLL.PLLP = 2;
RCC_OscInitStruct.PLL.PLLQ = 2;
RCC_OscInitStruct.PLL.PLLQ = 4;
RCC_OscInitStruct.PLL.PLLR = 2;
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
@ -145,7 +179,6 @@ void SystemClock_Config(void)
{
Error_Handler();
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
@ -165,6 +198,242 @@ void SystemClock_Config(void)
}
}
/**
* @brief DCMI Initialization Function
* @param None
* @retval None
*/
static void MX_DCMI_Init(void)
{
/* USER CODE BEGIN DCMI_Init 0 */
/* USER CODE END DCMI_Init 0 */
/* USER CODE BEGIN DCMI_Init 1 */
/* USER CODE END DCMI_Init 1 */
hdcmi.Instance = DCMI;
hdcmi.Init.SynchroMode = DCMI_SYNCHRO_HARDWARE;
hdcmi.Init.PCKPolarity = DCMI_PCKPOLARITY_FALLING;
hdcmi.Init.VSPolarity = DCMI_VSPOLARITY_LOW;
hdcmi.Init.HSPolarity = DCMI_HSPOLARITY_LOW;
hdcmi.Init.CaptureRate = DCMI_CR_ALL_FRAME;
hdcmi.Init.ExtendedDataMode = DCMI_EXTEND_DATA_8B;
hdcmi.Init.JPEGMode = DCMI_JPEG_ENABLE;
hdcmi.Init.ByteSelectMode = DCMI_BSM_ALL;
hdcmi.Init.ByteSelectStart = DCMI_OEBS_ODD;
hdcmi.Init.LineSelectMode = DCMI_LSM_ALL;
hdcmi.Init.LineSelectStart = DCMI_OELS_ODD;
if (HAL_DCMI_Init(&hdcmi) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN DCMI_Init 2 */
/* USER CODE END DCMI_Init 2 */
}
/**
* @brief QUADSPI Initialization Function
* @param None
* @retval None
*/
static void MX_QUADSPI_Init(void)
{
/* USER CODE BEGIN QUADSPI_Init 0 */
/* USER CODE END QUADSPI_Init 0 */
/* USER CODE BEGIN QUADSPI_Init 1 */
/* USER CODE END QUADSPI_Init 1 */
/* QUADSPI parameter configuration*/
hqspi.Instance = QUADSPI;
hqspi.Init.ClockPrescaler = 1;
hqspi.Init.FifoThreshold = 3;
hqspi.Init.SampleShifting = QSPI_SAMPLE_SHIFTING_HALFCYCLE;
hqspi.Init.FlashSize = 24;
hqspi.Init.ChipSelectHighTime = QSPI_CS_HIGH_TIME_2_CYCLE;
hqspi.Init.ClockMode = QSPI_CLOCK_MODE_0;
hqspi.Init.FlashID = QSPI_FLASH_ID_1;
hqspi.Init.DualFlash = QSPI_DUALFLASH_DISABLE;
if (HAL_QSPI_Init(&hqspi) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN QUADSPI_Init 2 */
/* USER CODE END QUADSPI_Init 2 */
}
/**
* @brief RTC Initialization Function
* @param None
* @retval None
*/
static void MX_RTC_Init(void)
{
/* USER CODE BEGIN RTC_Init 0 */
/* USER CODE END RTC_Init 0 */
RTC_TimeTypeDef sTime = {0};
RTC_DateTypeDef sDate = {0};
/* USER CODE BEGIN RTC_Init 1 */
/* USER CODE END RTC_Init 1 */
/** Initialize RTC Only
*/
hrtc.Instance = RTC;
hrtc.Init.HourFormat = RTC_HOURFORMAT_24;
hrtc.Init.AsynchPrediv = 127;
hrtc.Init.SynchPrediv = 255;
hrtc.Init.OutPut = RTC_OUTPUT_DISABLE;
hrtc.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH;
hrtc.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN;
hrtc.Init.OutPutRemap = RTC_OUTPUT_REMAP_NONE;
if (HAL_RTC_Init(&hrtc) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN Check_RTC_BKUP */
/* USER CODE END Check_RTC_BKUP */
/** Initialize RTC and set the Time and Date
*/
sTime.Hours = 0x0;
sTime.Minutes = 0x0;
sTime.Seconds = 0x0;
sTime.DayLightSaving = RTC_DAYLIGHTSAVING_NONE;
sTime.StoreOperation = RTC_STOREOPERATION_RESET;
if (HAL_RTC_SetTime(&hrtc, &sTime, RTC_FORMAT_BCD) != HAL_OK)
{
Error_Handler();
}
sDate.WeekDay = RTC_WEEKDAY_MONDAY;
sDate.Month = RTC_MONTH_JANUARY;
sDate.Date = 0x1;
sDate.Year = 0x0;
if (HAL_RTC_SetDate(&hrtc, &sDate, RTC_FORMAT_BCD) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN RTC_Init 2 */
/* USER CODE END RTC_Init 2 */
}
/**
* @brief SDMMC1 Initialization Function
* @param None
* @retval None
*/
static void MX_SDMMC1_SD_Init(void)
{
/* USER CODE BEGIN SDMMC1_Init 0 */
/* USER CODE END SDMMC1_Init 0 */
/* USER CODE BEGIN SDMMC1_Init 1 */
/* USER CODE END SDMMC1_Init 1 */
hsd1.Instance = SDMMC1;
hsd1.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING;
hsd1.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE;
hsd1.Init.BusWide = SDMMC_BUS_WIDE_4B;
hsd1.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE;
hsd1.Init.ClockDiv = 4;
if (HAL_SD_Init(&hsd1) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN SDMMC1_Init 2 */
/* USER CODE END SDMMC1_Init 2 */
}
/**
* @brief TIM1 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM1_Init(void)
{
/* USER CODE BEGIN TIM1_Init 0 */
/* USER CODE END TIM1_Init 0 */
TIM_MasterConfigTypeDef sMasterConfig = {0};
TIM_OC_InitTypeDef sConfigOC = {0};
TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
/* USER CODE BEGIN TIM1_Init 1 */
/* USER CODE END TIM1_Init 1 */
htim1.Instance = TIM1;
htim1.Init.Prescaler = 0;
htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
htim1.Init.Period = 7;
htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
htim1.Init.RepetitionCounter = 0;
htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
if (HAL_TIM_PWM_Init(&htim1) != HAL_OK)
{
Error_Handler();
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
{
Error_Handler();
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
sConfigOC.Pulse = 3;
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH;
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET;
sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET;
if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
{
Error_Handler();
}
sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;
sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
sBreakDeadTimeConfig.DeadTime = 0;
sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
sBreakDeadTimeConfig.BreakFilter = 0;
sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE;
sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH;
sBreakDeadTimeConfig.Break2Filter = 0;
sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN TIM1_Init 2 */
/* USER CODE END TIM1_Init 2 */
HAL_TIM_MspPostInit(&htim1);
}
/**
* @brief USART1 Initialization Function
* @param None
@ -213,6 +482,58 @@ static void MX_USART1_UART_Init(void)
}
/**
* @brief USB_OTG_FS Initialization Function
* @param None
* @retval None
*/
static void MX_USB_OTG_FS_PCD_Init(void)
{
/* USER CODE BEGIN USB_OTG_FS_Init 0 */
/* USER CODE END USB_OTG_FS_Init 0 */
/* USER CODE BEGIN USB_OTG_FS_Init 1 */
/* USER CODE END USB_OTG_FS_Init 1 */
hpcd_USB_OTG_FS.Instance = USB_OTG_FS;
hpcd_USB_OTG_FS.Init.dev_endpoints = 9;
hpcd_USB_OTG_FS.Init.speed = PCD_SPEED_FULL;
hpcd_USB_OTG_FS.Init.dma_enable = DISABLE;
hpcd_USB_OTG_FS.Init.phy_itface = PCD_PHY_EMBEDDED;
hpcd_USB_OTG_FS.Init.Sof_enable = DISABLE;
hpcd_USB_OTG_FS.Init.low_power_enable = DISABLE;
hpcd_USB_OTG_FS.Init.lpm_enable = DISABLE;
hpcd_USB_OTG_FS.Init.battery_charging_enable = DISABLE;
hpcd_USB_OTG_FS.Init.vbus_sensing_enable = DISABLE;
hpcd_USB_OTG_FS.Init.use_dedicated_ep1 = DISABLE;
if (HAL_PCD_Init(&hpcd_USB_OTG_FS) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN USB_OTG_FS_Init 2 */
/* USER CODE END USB_OTG_FS_Init 2 */
}
/**
* Enable DMA controller clock
*/
static void MX_DMA_Init(void)
{
/* DMA controller clock enable */
__HAL_RCC_DMA1_CLK_ENABLE();
/* DMA interrupt init */
/* DMA1_Stream3_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Stream3_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Stream3_IRQn);
}
/* FMC initialization function */
static void MX_FMC_Init(void)
{
@ -271,24 +592,24 @@ static void MX_GPIO_Init(void)
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOE_CLK_ENABLE();
__HAL_RCC_GPIOC_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
__HAL_RCC_GPIOG_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
__HAL_RCC_GPIOI_CLK_ENABLE();
__HAL_RCC_GPIOH_CLK_ENABLE();
__HAL_RCC_GPIOF_CLK_ENABLE();
__HAL_RCC_GPIOC_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOC, LED_RED_Pin|LED_GREEN_Pin|LED_BLUE_Pin, GPIO_PIN_RESET);
HAL_GPIO_WritePin(LED_RED_GPIO_Port, LED_RED_Pin, GPIO_PIN_RESET);
/*Configure GPIO pins : LED_RED_Pin LED_GREEN_Pin LED_BLUE_Pin */
GPIO_InitStruct.Pin = LED_RED_Pin|LED_GREEN_Pin|LED_BLUE_Pin;
/*Configure GPIO pin : LED_RED_Pin */
GPIO_InitStruct.Pin = LED_RED_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
HAL_GPIO_Init(LED_RED_GPIO_Port, &GPIO_InitStruct);
}
@ -327,3 +648,4 @@ void assert_failed(uint8_t *file, uint32_t line)
/* USER CODE END 6 */
}
#endif /* USE_FULL_ASSERT */

570
Ubiquitous/RT-Thread_Fusion_XiUOS/aiit_board/stm32h743_openmv_h7plus/board/CubeMX_Config/Core/Src/stm32h7xx_hal_msp.c
View File

@ -25,6 +25,7 @@
#include "drv_common.h"
#endif
/* USER CODE END Includes */
extern DMA_HandleTypeDef hdma_dcmi;
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */
@ -59,7 +60,9 @@
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/**
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
@ -77,6 +80,484 @@ void HAL_MspInit(void)
/* USER CODE END MspInit 1 */
}
/**
* @brief DCMI MSP Initialization
* This function configures the hardware resources used in this example
* @param hdcmi: DCMI handle pointer
* @retval None
*/
void HAL_DCMI_MspInit(DCMI_HandleTypeDef* hdcmi)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(hdcmi->Instance==DCMI)
{
/* USER CODE BEGIN DCMI_MspInit 0 */
/* USER CODE END DCMI_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_DCMI_CLK_ENABLE();
__HAL_RCC_GPIOE_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
__HAL_RCC_GPIOG_CLK_ENABLE();
__HAL_RCC_GPIOC_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
/**DCMI GPIO Configuration
PE4 ------> DCMI_D4
PE5 ------> DCMI_D6
PE6 ------> DCMI_D7
PB7 ------> DCMI_VSYNC
PB6 ------> DCMI_D5
PG11 ------> DCMI_D3
PG10 ------> DCMI_D2
PC7 ------> DCMI_D1
PC6 ------> DCMI_D0
PA4 ------> DCMI_HSYNC
PA6 ------> DCMI_PIXCLK
*/
GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_PULLUP;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF13_DCMI;
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_6;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_PULLUP;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF13_DCMI;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_10;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_PULLUP;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF13_DCMI;
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_6;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_PULLUP;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF13_DCMI;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_6;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_PULLUP;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF13_DCMI;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* DCMI DMA Init */
/* DCMI Init */
hdma_dcmi.Instance = DMA1_Stream3;
hdma_dcmi.Init.Request = DMA_REQUEST_DCMI;
hdma_dcmi.Init.Direction = DMA_PERIPH_TO_MEMORY;
hdma_dcmi.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_dcmi.Init.MemInc = DMA_MINC_ENABLE;
hdma_dcmi.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
hdma_dcmi.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
hdma_dcmi.Init.Mode = DMA_CIRCULAR;
hdma_dcmi.Init.Priority = DMA_PRIORITY_HIGH;
hdma_dcmi.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
hdma_dcmi.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
hdma_dcmi.Init.MemBurst = DMA_MBURST_SINGLE;
hdma_dcmi.Init.PeriphBurst = DMA_PBURST_SINGLE;
if (HAL_DMA_Init(&hdma_dcmi) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(hdcmi,DMA_Handle,hdma_dcmi);
/* DCMI interrupt Init */
HAL_NVIC_SetPriority(DCMI_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DCMI_IRQn);
/* USER CODE BEGIN DCMI_MspInit 1 */
/* USER CODE END DCMI_MspInit 1 */
}
}
/**
* @brief DCMI MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hdcmi: DCMI handle pointer
* @retval None
*/
void HAL_DCMI_MspDeInit(DCMI_HandleTypeDef* hdcmi)
{
if(hdcmi->Instance==DCMI)
{
/* USER CODE BEGIN DCMI_MspDeInit 0 */
/* USER CODE END DCMI_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_DCMI_CLK_DISABLE();
/**DCMI GPIO Configuration
PE4 ------> DCMI_D4
PE5 ------> DCMI_D6
PE6 ------> DCMI_D7
PB7 ------> DCMI_VSYNC
PB6 ------> DCMI_D5
PG11 ------> DCMI_D3
PG10 ------> DCMI_D2
PC7 ------> DCMI_D1
PC6 ------> DCMI_D0
PA4 ------> DCMI_HSYNC
PA6 ------> DCMI_PIXCLK
*/
HAL_GPIO_DeInit(GPIOE, GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6);
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_7|GPIO_PIN_6);
HAL_GPIO_DeInit(GPIOG, GPIO_PIN_11|GPIO_PIN_10);
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_7|GPIO_PIN_6);
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_4|GPIO_PIN_6);
/* DCMI DMA DeInit */
HAL_DMA_DeInit(hdcmi->DMA_Handle);
/* DCMI interrupt DeInit */
HAL_NVIC_DisableIRQ(DCMI_IRQn);
/* USER CODE BEGIN DCMI_MspDeInit 1 */
/* USER CODE END DCMI_MspDeInit 1 */
}
}
/**
* @brief QSPI MSP Initialization
* This function configures the hardware resources used in this example
* @param hqspi: QSPI handle pointer
* @retval None
*/
void HAL_QSPI_MspInit(QSPI_HandleTypeDef* hqspi)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
if(hqspi->Instance==QUADSPI)
{
/* USER CODE BEGIN QUADSPI_MspInit 0 */
/* USER CODE END QUADSPI_MspInit 0 */
/** Initializes the peripherals clock
*/
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_QSPI;
PeriphClkInitStruct.QspiClockSelection = RCC_QSPICLKSOURCE_D1HCLK;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
{
Error_Handler();
}
/* Peripheral clock enable */
__HAL_RCC_QSPI_CLK_ENABLE();
__HAL_RCC_GPIOG_CLK_ENABLE();
__HAL_RCC_GPIOF_CLK_ENABLE();
/**QUADSPI GPIO Configuration
PG6 ------> QUADSPI_BK1_NCS
PF7 ------> QUADSPI_BK1_IO2
PF6 ------> QUADSPI_BK1_IO3
PF10 ------> QUADSPI_CLK
PF9 ------> QUADSPI_BK1_IO1
PF8 ------> QUADSPI_BK1_IO0
*/
GPIO_InitStruct.Pin = GPIO_PIN_6;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_PULLUP;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF10_QUADSPI;
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_6|GPIO_PIN_10;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF9_QUADSPI;
HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_8;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF10_QUADSPI;
HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
/* USER CODE BEGIN QUADSPI_MspInit 1 */
/* USER CODE END QUADSPI_MspInit 1 */
}
}
/**
* @brief QSPI MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hqspi: QSPI handle pointer
* @retval None
*/
void HAL_QSPI_MspDeInit(QSPI_HandleTypeDef* hqspi)
{
if(hqspi->Instance==QUADSPI)
{
/* USER CODE BEGIN QUADSPI_MspDeInit 0 */
/* USER CODE END QUADSPI_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_QSPI_CLK_DISABLE();
/**QUADSPI GPIO Configuration
PG6 ------> QUADSPI_BK1_NCS
PF7 ------> QUADSPI_BK1_IO2
PF6 ------> QUADSPI_BK1_IO3
PF10 ------> QUADSPI_CLK
PF9 ------> QUADSPI_BK1_IO1
PF8 ------> QUADSPI_BK1_IO0
*/
HAL_GPIO_DeInit(GPIOG, GPIO_PIN_6);
HAL_GPIO_DeInit(GPIOF, GPIO_PIN_7|GPIO_PIN_6|GPIO_PIN_10|GPIO_PIN_9
|GPIO_PIN_8);
/* USER CODE BEGIN QUADSPI_MspDeInit 1 */
/* USER CODE END QUADSPI_MspDeInit 1 */
}
}
/**
* @brief RTC MSP Initialization
* This function configures the hardware resources used in this example
* @param hrtc: RTC handle pointer
* @retval None
*/
void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc)
{
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
if(hrtc->Instance==RTC)
{
/* USER CODE BEGIN RTC_MspInit 0 */
/* USER CODE END RTC_MspInit 0 */
/** Initializes the peripherals clock
*/
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC;
PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSI;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
{
Error_Handler();
}
/* Peripheral clock enable */
__HAL_RCC_RTC_ENABLE();
/* USER CODE BEGIN RTC_MspInit 1 */
/* USER CODE END RTC_MspInit 1 */
}
}
/**
* @brief RTC MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hrtc: RTC handle pointer
* @retval None
*/
void HAL_RTC_MspDeInit(RTC_HandleTypeDef* hrtc)
{
if(hrtc->Instance==RTC)
{
/* USER CODE BEGIN RTC_MspDeInit 0 */
/* USER CODE END RTC_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_RTC_DISABLE();
/* USER CODE BEGIN RTC_MspDeInit 1 */
/* USER CODE END RTC_MspDeInit 1 */
}
}
/**
* @brief SD MSP Initialization
* This function configures the hardware resources used in this example
* @param hsd: SD handle pointer
* @retval None
*/
void HAL_SD_MspInit(SD_HandleTypeDef* hsd)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
if(hsd->Instance==SDMMC1)
{
/* USER CODE BEGIN SDMMC1_MspInit 0 */
/* USER CODE END SDMMC1_MspInit 0 */
/** Initializes the peripherals clock
*/
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SDMMC;
PeriphClkInitStruct.SdmmcClockSelection = RCC_SDMMCCLKSOURCE_PLL;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
{
Error_Handler();
}
/* Peripheral clock enable */
__HAL_RCC_SDMMC1_CLK_ENABLE();
__HAL_RCC_GPIOC_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE();
/**SDMMC1 GPIO Configuration
PC12 ------> SDMMC1_CK
PC11 ------> SDMMC1_D3
PC10 ------> SDMMC1_D2
PD2 ------> SDMMC1_CMD
PC9 ------> SDMMC1_D1
PC8 ------> SDMMC1_D0
*/
GPIO_InitStruct.Pin = GPIO_PIN_12|GPIO_PIN_11|GPIO_PIN_10|GPIO_PIN_9
|GPIO_PIN_8;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF12_SDIO1;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_2;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF12_SDIO1;
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
/* SDMMC1 interrupt Init */
HAL_NVIC_SetPriority(SDMMC1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(SDMMC1_IRQn);
/* USER CODE BEGIN SDMMC1_MspInit 1 */
/* USER CODE END SDMMC1_MspInit 1 */
}
}
/**
* @brief SD MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hsd: SD handle pointer
* @retval None
*/
void HAL_SD_MspDeInit(SD_HandleTypeDef* hsd)
{
if(hsd->Instance==SDMMC1)
{
/* USER CODE BEGIN SDMMC1_MspDeInit 0 */
/* USER CODE END SDMMC1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_SDMMC1_CLK_DISABLE();
/**SDMMC1 GPIO Configuration
PC12 ------> SDMMC1_CK
PC11 ------> SDMMC1_D3
PC10 ------> SDMMC1_D2
PD2 ------> SDMMC1_CMD
PC9 ------> SDMMC1_D1
PC8 ------> SDMMC1_D0
*/
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_12|GPIO_PIN_11|GPIO_PIN_10|GPIO_PIN_9
|GPIO_PIN_8);
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_2);
/* SDMMC1 interrupt DeInit */
HAL_NVIC_DisableIRQ(SDMMC1_IRQn);
/* USER CODE BEGIN SDMMC1_MspDeInit 1 */
/* USER CODE END SDMMC1_MspDeInit 1 */
}
}
/**
* @brief TIM_PWM MSP Initialization
* This function configures the hardware resources used in this example
* @param htim_pwm: TIM_PWM handle pointer
* @retval None
*/
void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef* htim_pwm)
{
if(htim_pwm->Instance==TIM1)
{
/* USER CODE BEGIN TIM1_MspInit 0 */
/* USER CODE END TIM1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM1_CLK_ENABLE();
/* USER CODE BEGIN TIM1_MspInit 1 */
/* USER CODE END TIM1_MspInit 1 */
}
}
void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(htim->Instance==TIM1)
{
/* USER CODE BEGIN TIM1_MspPostInit 0 */
/* USER CODE END TIM1_MspPostInit 0 */
__HAL_RCC_GPIOA_CLK_ENABLE();
/**TIM1 GPIO Configuration
PA8 ------> TIM1_CH1
*/
GPIO_InitStruct.Pin = GPIO_PIN_8;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_PULLUP;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF1_TIM1;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* USER CODE BEGIN TIM1_MspPostInit 1 */
/* USER CODE END TIM1_MspPostInit 1 */
}
}
/**
* @brief TIM_PWM MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param htim_pwm: TIM_PWM handle pointer
* @retval None
*/
void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef* htim_pwm)
{
if(htim_pwm->Instance==TIM1)
{
/* USER CODE BEGIN TIM1_MspDeInit 0 */
/* USER CODE END TIM1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_TIM1_CLK_DISABLE();
/* USER CODE BEGIN TIM1_MspDeInit 1 */
/* USER CODE END TIM1_MspDeInit 1 */
}
}
/**
* @brief UART MSP Initialization
* This function configures the hardware resources used in this example
@ -92,7 +573,6 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart)
/* USER CODE BEGIN USART1_MspInit 0 */
/* USER CODE END USART1_MspInit 0 */
/** Initializes the peripherals clock
*/
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1;
@ -153,6 +633,91 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
}
/**
* @brief PCD MSP Initialization
* This function configures the hardware resources used in this example
* @param hpcd: PCD handle pointer
* @retval None
*/
void HAL_PCD_MspInit(PCD_HandleTypeDef* hpcd)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
if(hpcd->Instance==USB_OTG_FS)
{
/* USER CODE BEGIN USB_OTG_FS_MspInit 0 */
/* USER CODE END USB_OTG_FS_MspInit 0 */
/** Initializes the peripherals clock
*/
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
{
Error_Handler();
}
/** Enable USB Voltage detector
*/
HAL_PWREx_EnableUSBVoltageDetector();
__HAL_RCC_GPIOA_CLK_ENABLE();
/**USB_OTG_FS GPIO Configuration
PA12 ------> USB_OTG_FS_DP
PA11 ------> USB_OTG_FS_DM
*/
GPIO_InitStruct.Pin = GPIO_PIN_12|GPIO_PIN_11;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF10_OTG1_FS;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* Peripheral clock enable */
__HAL_RCC_USB_OTG_FS_CLK_ENABLE();
/* USB_OTG_FS interrupt Init */
HAL_NVIC_SetPriority(OTG_FS_EP1_OUT_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(OTG_FS_EP1_OUT_IRQn);
HAL_NVIC_SetPriority(OTG_FS_EP1_IN_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(OTG_FS_EP1_IN_IRQn);
/* USER CODE BEGIN USB_OTG_FS_MspInit 1 */
/* USER CODE END USB_OTG_FS_MspInit 1 */
}
}
/**
* @brief PCD MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hpcd: PCD handle pointer
* @retval None
*/
void HAL_PCD_MspDeInit(PCD_HandleTypeDef* hpcd)
{
if(hpcd->Instance==USB_OTG_FS)
{
/* USER CODE BEGIN USB_OTG_FS_MspDeInit 0 */
/* USER CODE END USB_OTG_FS_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_USB_OTG_FS_CLK_DISABLE();
/**USB_OTG_FS GPIO Configuration
PA12 ------> USB_OTG_FS_DP
PA11 ------> USB_OTG_FS_DM
*/
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_12|GPIO_PIN_11);
/* USB_OTG_FS interrupt DeInit */
HAL_NVIC_DisableIRQ(OTG_FS_EP1_OUT_IRQn);
HAL_NVIC_DisableIRQ(OTG_FS_EP1_IN_IRQn);
/* USER CODE BEGIN USB_OTG_FS_MspDeInit 1 */
/* USER CODE END USB_OTG_FS_MspDeInit 1 */
}
}
static uint32_t FMC_Initialized = 0;
static void HAL_FMC_MspInit(void){
@ -430,3 +995,4 @@ void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef* hsdram){
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */

387
Ubiquitous/RT-Thread_Fusion_XiUOS/aiit_board/stm32h743_openmv_h7plus/board/CubeMX_Config/CubeMX_Config.ioc
View File

@ -1,4 +1,32 @@
#MicroXplorer Configuration settings - do not modify
CORTEX_M7.CPU_DCache=Enabled
CORTEX_M7.CPU_ICache=Enabled
CORTEX_M7.IPParameters=CPU_ICache,CPU_DCache
DCMI.IPParameters=JPEGMode
DCMI.JPEGMode=DCMI_JPEG_ENABLE
Dma.DCMI.0.Direction=DMA_PERIPH_TO_MEMORY
Dma.DCMI.0.EventEnable=DISABLE
Dma.DCMI.0.FIFOMode=DMA_FIFOMODE_ENABLE
Dma.DCMI.0.FIFOThreshold=DMA_FIFO_THRESHOLD_FULL
Dma.DCMI.0.Instance=DMA1_Stream3
Dma.DCMI.0.MemBurst=DMA_MBURST_SINGLE
Dma.DCMI.0.MemDataAlignment=DMA_MDATAALIGN_WORD
Dma.DCMI.0.MemInc=DMA_MINC_ENABLE
Dma.DCMI.0.Mode=DMA_CIRCULAR
Dma.DCMI.0.PeriphBurst=DMA_PBURST_SINGLE
Dma.DCMI.0.PeriphDataAlignment=DMA_PDATAALIGN_WORD
Dma.DCMI.0.PeriphInc=DMA_PINC_DISABLE
Dma.DCMI.0.Polarity=HAL_DMAMUX_REQ_GEN_RISING
Dma.DCMI.0.Priority=DMA_PRIORITY_HIGH
Dma.DCMI.0.RequestNumber=1
Dma.DCMI.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode,FIFOThreshold,MemBurst,PeriphBurst,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
Dma.DCMI.0.SignalID=NONE
Dma.DCMI.0.SyncEnable=DISABLE
Dma.DCMI.0.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
Dma.DCMI.0.SyncRequestNumber=1
Dma.DCMI.0.SyncSignalID=NONE
Dma.Request0=DCMI
Dma.RequestsNb=1
FMC.BankMapConfig=FMC_SWAPBMAP_DISABLE
FMC.CASLatency1=FMC_SDRAM_CAS_LATENCY_2
FMC.ColumnBitsNumber1=FMC_SDRAM_COLUMN_BITS_NUM_9
@ -18,117 +46,189 @@ KeepUserPlacement=false
Mcu.CPN=STM32H743IIK6
Mcu.Family=STM32H7
Mcu.IP0=CORTEX_M7
Mcu.IP1=FMC
Mcu.IP2=NVIC
Mcu.IP3=RCC
Mcu.IP4=SYS
Mcu.IP5=USART1
Mcu.IPNb=6
Mcu.IP1=DCMI
Mcu.IP10=TIM1
Mcu.IP11=USART1
Mcu.IP12=USB_OTG_FS
Mcu.IP2=DMA
Mcu.IP3=FMC
Mcu.IP4=NVIC
Mcu.IP5=QUADSPI
Mcu.IP6=RCC
Mcu.IP7=RTC
Mcu.IP8=SDMMC1
Mcu.IP9=SYS
Mcu.IPNb=13
Mcu.Name=STM32H743IIKx
Mcu.Package=UFBGA176
Mcu.Pin0=PE1
Mcu.Pin1=PE0
Mcu.Pin10=PI9
Mcu.Pin11=PI4
Mcu.Pin12=PH15
Mcu.Pin13=PI1
Mcu.Pin14=PF0
Mcu.Pin15=PI10
Mcu.Pin16=PH13
Mcu.Pin17=PH14
Mcu.Pin18=PI0
Mcu.Pin19=PH0-OSC_IN (PH0)
Mcu.Pin2=PG15
Mcu.Pin20=PH1-OSC_OUT (PH1)
Mcu.Pin21=PF2
Mcu.Pin22=PF1
Mcu.Pin23=PG8
Mcu.Pin24=PF3
Mcu.Pin25=PF4
Mcu.Pin26=PF5
Mcu.Pin27=PH12
Mcu.Pin28=PG5
Mcu.Pin29=PG4
Mcu.Pin3=PD0
Mcu.Pin30=PH11
Mcu.Pin31=PH10
Mcu.Pin32=PD15
Mcu.Pin33=PC0
Mcu.Pin34=PC1
Mcu.Pin35=PC2_C
Mcu.Pin36=PG1
Mcu.Pin37=PH8
Mcu.Pin38=PH9
Mcu.Pin39=PD14
Mcu.Pin4=PI7
Mcu.Pin40=PC4
Mcu.Pin41=PF13
Mcu.Pin42=PG0
Mcu.Pin43=PE13
Mcu.Pin44=PD10
Mcu.Pin45=PC5
Mcu.Pin46=PF12
Mcu.Pin47=PF15
Mcu.Pin48=PE8
Mcu.Pin49=PE9
Mcu.Pin5=PI6
Mcu.Pin50=PE11
Mcu.Pin51=PE14
Mcu.Pin52=PD9
Mcu.Pin53=PD8
Mcu.Pin54=PA7
Mcu.Pin55=PF11
Mcu.Pin56=PF14
Mcu.Pin57=PE7
Mcu.Pin58=PE10
Mcu.Pin59=PE12
Mcu.Pin6=PI5
Mcu.Pin60=PE15
Mcu.Pin61=PB14
Mcu.Pin62=PB15
Mcu.Pin63=VP_SYS_VS_Systick
Mcu.Pin7=PD1
Mcu.Pin8=PI3
Mcu.Pin9=PI2
Mcu.PinsNb=64
Mcu.Pin10=PG10
Mcu.Pin11=PD0
Mcu.Pin12=PC11
Mcu.Pin13=PC10
Mcu.Pin14=PA12
Mcu.Pin15=PI7
Mcu.Pin16=PI6
Mcu.Pin17=PI5
Mcu.Pin18=PD1
Mcu.Pin19=PI3
Mcu.Pin2=PC12
Mcu.Pin20=PI2
Mcu.Pin21=PA11
Mcu.Pin22=PI9
Mcu.Pin23=PI4
Mcu.Pin24=PD2
Mcu.Pin25=PH15
Mcu.Pin26=PI1
Mcu.Pin27=PF0
Mcu.Pin28=PI10
Mcu.Pin29=PH13
Mcu.Pin3=PE4
Mcu.Pin30=PH14
Mcu.Pin31=PI0
Mcu.Pin32=PC9
Mcu.Pin33=PA8
Mcu.Pin34=PH0-OSC_IN (PH0)
Mcu.Pin35=PC8
Mcu.Pin36=PC7
Mcu.Pin37=PH1-OSC_OUT (PH1)
Mcu.Pin38=PF2
Mcu.Pin39=PF1
Mcu.Pin4=PE5
Mcu.Pin40=PG8
Mcu.Pin41=PC6
Mcu.Pin42=PF3
Mcu.Pin43=PF4
Mcu.Pin44=PG6
Mcu.Pin45=PF7
Mcu.Pin46=PF6
Mcu.Pin47=PF5
Mcu.Pin48=PH12
Mcu.Pin49=PG5
Mcu.Pin5=PE6
Mcu.Pin50=PG4
Mcu.Pin51=PF10
Mcu.Pin52=PF9
Mcu.Pin53=PF8
Mcu.Pin54=PH11
Mcu.Pin55=PH10
Mcu.Pin56=PD15
Mcu.Pin57=PC0
Mcu.Pin58=PG1
Mcu.Pin59=PH8
Mcu.Pin6=PB7
Mcu.Pin60=PH9
Mcu.Pin61=PD14
Mcu.Pin62=PA4
Mcu.Pin63=PC4
Mcu.Pin64=PF13
Mcu.Pin65=PG0
Mcu.Pin66=PE13
Mcu.Pin67=PD10
Mcu.Pin68=PA6
Mcu.Pin69=PC5
Mcu.Pin7=PB6
Mcu.Pin70=PF12
Mcu.Pin71=PF15
Mcu.Pin72=PE8
Mcu.Pin73=PE9
Mcu.Pin74=PE11
Mcu.Pin75=PE14
Mcu.Pin76=PD9
Mcu.Pin77=PD8
Mcu.Pin78=PA7
Mcu.Pin79=PF11
Mcu.Pin8=PG15
Mcu.Pin80=PF14
Mcu.Pin81=PE7
Mcu.Pin82=PE10
Mcu.Pin83=PE12
Mcu.Pin84=PE15
Mcu.Pin85=PB14
Mcu.Pin86=PB15
Mcu.Pin87=VP_RTC_VS_RTC_Activate
Mcu.Pin88=VP_RTC_VS_RTC_Calendar
Mcu.Pin89=VP_SYS_VS_Systick
Mcu.Pin9=PG11
Mcu.PinsNb=90
Mcu.ThirdPartyNb=0
Mcu.UserConstants=
Mcu.UserName=STM32H743IIKx
MxCube.Version=6.5.0
MxDb.Version=DB.6.0.50
MxCube.Version=6.4.0
MxDb.Version=DB.6.0.40
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true
NVIC.DCMI_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
NVIC.DMA1_Stream3_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true
NVIC.ForceEnableDMAVector=true
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true
NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true
NVIC.OTG_FS_EP1_IN_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
NVIC.OTG_FS_EP1_OUT_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true
NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
NVIC.SDMMC1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true
NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:true
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true
PA11.GPIOParameters=GPIO_Speed
PA11.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PA11.Mode=Device_Only
PA11.Signal=USB_OTG_FS_DM
PA12.GPIOParameters=GPIO_Speed
PA12.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PA12.Mode=Device_Only
PA12.Signal=USB_OTG_FS_DP
PA4.GPIOParameters=GPIO_Speed,GPIO_PuPd
PA4.GPIO_PuPd=GPIO_PULLUP
PA4.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PA4.Locked=true
PA4.Mode=Slave_8_bits_External_Synchro
PA4.Signal=DCMI_HSYNC
PA6.GPIOParameters=GPIO_Speed,GPIO_PuPd
PA6.GPIO_PuPd=GPIO_PULLUP
PA6.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PA6.Locked=true
PA6.Mode=Slave_8_bits_External_Synchro
PA6.Signal=DCMI_PIXCLK
PA7.GPIOParameters=GPIO_PuPd
PA7.GPIO_PuPd=GPIO_PULLUP
PA7.Locked=true
PA7.Signal=FMC_SDNWE
PA8.GPIOParameters=GPIO_Speed,GPIO_PuPd
PA8.GPIO_PuPd=GPIO_PULLUP
PA8.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PA8.Signal=S_TIM1_CH1
PB14.Locked=true
PB14.Mode=Asynchronous
PB14.Signal=USART1_TX
PB15.Locked=true
PB15.Mode=Asynchronous
PB15.Signal=USART1_RX
PB6.GPIOParameters=GPIO_Speed,GPIO_PuPd
PB6.GPIO_PuPd=GPIO_PULLUP
PB6.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PB6.Locked=true
PB6.Mode=Slave_8_bits_External_Synchro
PB6.Signal=DCMI_D5
PB7.GPIOParameters=GPIO_Speed,GPIO_PuPd
PB7.GPIO_PuPd=GPIO_PULLUP
PB7.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PB7.Locked=true
PB7.Mode=Slave_8_bits_External_Synchro
PB7.Signal=DCMI_VSYNC
PC0.GPIOParameters=GPIO_Label
PC0.GPIO_Label=LED_RED
PC0.Locked=true
PC0.Signal=GPIO_Output
PC1.GPIOParameters=GPIO_Label
PC1.GPIO_Label=LED_GREEN
PC1.Locked=true
PC1.Signal=GPIO_Output
PC2_C.GPIOParameters=GPIO_Label
PC2_C.GPIO_Label=LED_BLUE
PC2_C.Locked=true
PC2_C.Signal=GPIO_Output
PC10.Mode=SD_4_bits_Wide_bus
PC10.Signal=SDMMC1_D2
PC11.Mode=SD_4_bits_Wide_bus
PC11.Signal=SDMMC1_D3
PC12.Mode=SD_4_bits_Wide_bus
PC12.Signal=SDMMC1_CK
PC4.GPIOParameters=GPIO_PuPd
PC4.GPIO_PuPd=GPIO_PULLUP
PC4.Locked=true
@ -139,6 +239,22 @@ PC5.GPIO_PuPd=GPIO_PULLUP
PC5.Locked=true
PC5.Mode=SdramChipSelect1_1
PC5.Signal=FMC_SDCKE0
PC6.GPIOParameters=GPIO_Speed,GPIO_PuPd
PC6.GPIO_PuPd=GPIO_PULLUP
PC6.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PC6.Locked=true
PC6.Mode=Slave_8_bits_External_Synchro
PC6.Signal=DCMI_D0
PC7.GPIOParameters=GPIO_Speed,GPIO_PuPd
PC7.GPIO_PuPd=GPIO_PULLUP
PC7.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PC7.Locked=true
PC7.Mode=Slave_8_bits_External_Synchro
PC7.Signal=DCMI_D1
PC8.Mode=SD_4_bits_Wide_bus
PC8.Signal=SDMMC1_D0
PC9.Mode=SD_4_bits_Wide_bus
PC9.Signal=SDMMC1_D1
PD0.GPIOParameters=GPIO_PuPd
PD0.GPIO_PuPd=GPIO_PULLUP
PD0.Signal=FMC_D2_DA2
@ -154,6 +270,8 @@ PD14.Signal=FMC_D0_DA0
PD15.GPIOParameters=GPIO_PuPd
PD15.GPIO_PuPd=GPIO_PULLUP
PD15.Signal=FMC_D1_DA1
PD2.Mode=SD_4_bits_Wide_bus
PD2.Signal=SDMMC1_CMD
PD8.GPIOParameters=GPIO_PuPd
PD8.GPIO_PuPd=GPIO_PULLUP
PD8.Signal=FMC_D13_DA13
@ -184,6 +302,24 @@ PE14.Signal=FMC_D11_DA11
PE15.GPIOParameters=GPIO_PuPd
PE15.GPIO_PuPd=GPIO_PULLUP
PE15.Signal=FMC_D12_DA12
PE4.GPIOParameters=GPIO_Speed,GPIO_PuPd
PE4.GPIO_PuPd=GPIO_PULLUP
PE4.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PE4.Locked=true
PE4.Mode=Slave_8_bits_External_Synchro
PE4.Signal=DCMI_D4
PE5.GPIOParameters=GPIO_Speed,GPIO_PuPd
PE5.GPIO_PuPd=GPIO_PULLUP
PE5.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PE5.Locked=true
PE5.Mode=Slave_8_bits_External_Synchro
PE5.Signal=DCMI_D6
PE6.GPIOParameters=GPIO_Speed,GPIO_PuPd
PE6.GPIO_PuPd=GPIO_PULLUP
PE6.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PE6.Locked=true
PE6.Mode=Slave_8_bits_External_Synchro
PE6.Signal=DCMI_D7
PE7.GPIOParameters=GPIO_PuPd
PE7.GPIO_PuPd=GPIO_PULLUP
PE7.Signal=FMC_D4_DA4
@ -199,6 +335,11 @@ PF0.Signal=FMC_A0
PF1.GPIOParameters=GPIO_PuPd
PF1.GPIO_PuPd=GPIO_PULLUP
PF1.Signal=FMC_A1
PF10.GPIOParameters=GPIO_Speed
PF10.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
PF10.Locked=true
PF10.Mode=Single Bank 1
PF10.Signal=QUADSPI_CLK
PF11.GPIOParameters=GPIO_PuPd
PF11.GPIO_PuPd=GPIO_PULLUP
PF11.Signal=FMC_SDNRAS
@ -226,12 +367,44 @@ PF4.Signal=FMC_A4
PF5.GPIOParameters=GPIO_PuPd
PF5.GPIO_PuPd=GPIO_PULLUP
PF5.Signal=FMC_A5
PF6.GPIOParameters=GPIO_Speed
PF6.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
PF6.Locked=true
PF6.Mode=Single Bank 1
PF6.Signal=QUADSPI_BK1_IO3
PF7.GPIOParameters=GPIO_Speed
PF7.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
PF7.Locked=true
PF7.Mode=Single Bank 1
PF7.Signal=QUADSPI_BK1_IO2
PF8.GPIOParameters=GPIO_Speed
PF8.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
PF8.Locked=true
PF8.Mode=Single Bank 1
PF8.Signal=QUADSPI_BK1_IO0
PF9.GPIOParameters=GPIO_Speed
PF9.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
PF9.Locked=true
PF9.Mode=Single Bank 1
PF9.Signal=QUADSPI_BK1_IO1
PG0.GPIOParameters=GPIO_PuPd
PG0.GPIO_PuPd=GPIO_PULLUP
PG0.Signal=FMC_A10
PG1.GPIOParameters=GPIO_PuPd
PG1.GPIO_PuPd=GPIO_PULLUP
PG1.Signal=FMC_A11
PG10.GPIOParameters=GPIO_Speed,GPIO_PuPd
PG10.GPIO_PuPd=GPIO_PULLUP
PG10.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PG10.Locked=true
PG10.Mode=Slave_8_bits_External_Synchro
PG10.Signal=DCMI_D2
PG11.GPIOParameters=GPIO_Speed,GPIO_PuPd
PG11.GPIO_PuPd=GPIO_PULLUP
PG11.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PG11.Locked=true
PG11.Mode=Slave_8_bits_External_Synchro
PG11.Signal=DCMI_D3
PG15.GPIOParameters=GPIO_PuPd
PG15.GPIO_PuPd=GPIO_PULLUP
PG15.Signal=FMC_SDNCAS
@ -241,6 +414,11 @@ PG4.Signal=FMC_A14_BA0
PG5.GPIOParameters=GPIO_PuPd
PG5.GPIO_PuPd=GPIO_PULLUP
PG5.Signal=FMC_A15_BA1
PG6.GPIOParameters=GPIO_PuPd
PG6.GPIO_PuPd=GPIO_PULLUP
PG6.Locked=true
PG6.Mode=Single Bank 1
PG6.Signal=QUADSPI_BK1_NCS
PG8.GPIOParameters=GPIO_PuPd
PG8.GPIO_PuPd=GPIO_PULLUP
PG8.Signal=FMC_SDCLK
@ -313,7 +491,7 @@ ProjectManager.CustomerFirmwarePackage=
ProjectManager.DefaultFWLocation=true
ProjectManager.DeletePrevious=true
ProjectManager.DeviceId=STM32H743IIKx
ProjectManager.FirmwarePackage=STM32Cube FW_H7 V1.10.0
ProjectManager.FirmwarePackage=STM32Cube FW_H7 V1.9.0
ProjectManager.FreePins=false
ProjectManager.HalAssertFull=false
ProjectManager.HeapSize=0x200
@ -331,7 +509,13 @@ ProjectManager.StackSize=0x400
ProjectManager.TargetToolchain=MDK-ARM V5.32
ProjectManager.ToolChainLocation=
ProjectManager.UnderRoot=false
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART1_UART_Init-USART1-false-HAL-true,4-MX_FMC_Init-FMC-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART1_UART_Init-USART1-false-HAL-true,4-MX_FMC_Init-FMC-false-HAL-true,5-MX_QUADSPI_Init-QUADSPI-false-HAL-true,6-MX_SDMMC1_SD_Init-SDMMC1-false-HAL-true,7-MX_DMA_Init-DMA-false-HAL-true,8-MX_RTC_Init-RTC-false-HAL-true,9-MX_DCMI_Init-DCMI-false-HAL-true,10-MX_USB_OTG_FS_PCD_Init-USB_OTG_FS-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
QUADSPI.ChipSelectHighTime=QSPI_CS_HIGH_TIME_2_CYCLE
QUADSPI.ClockPrescaler=1
QUADSPI.FifoThreshold=3
QUADSPI.FlashSize=24
QUADSPI.IPParameters=ClockPrescaler,FifoThreshold,SampleShifting,FlashSize,ChipSelectHighTime
QUADSPI.SampleShifting=QSPI_SAMPLE_SHIFTING_HALFCYCLE
RCC.ADCFreq_Value=24187500
RCC.AHB12Freq_Value=200000000
RCC.AHB4Freq_Value=200000000
@ -349,20 +533,21 @@ RCC.D1PPRE=RCC_APB3_DIV2
RCC.D2PPRE1=RCC_APB1_DIV2
RCC.D2PPRE2=RCC_APB2_DIV2
RCC.D3PPRE=RCC_APB4_DIV2
RCC.DFSDMACLkFreq_Value=400000000
RCC.DFSDMACLkFreq_Value=200000000
RCC.DFSDMFreq_Value=100000000
RCC.DIVM1=3
RCC.DIVN1=200
RCC.DIVP1Freq_Value=400000000
RCC.DIVP2Freq_Value=24187500
RCC.DIVP3Freq_Value=24187500
RCC.DIVQ1Freq_Value=400000000
RCC.DIVQ1=4
RCC.DIVQ1Freq_Value=200000000
RCC.DIVQ2Freq_Value=24187500
RCC.DIVQ3Freq_Value=24187500
RCC.DIVR1Freq_Value=400000000
RCC.DIVR2Freq_Value=24187500
RCC.DIVR3Freq_Value=24187500
RCC.FDCANFreq_Value=400000000
RCC.FDCANFreq_Value=200000000
RCC.FMCFreq_Value=200000000
RCC.FamilyName=M
RCC.HCLK3ClockFreq_Value=200000000
@ -372,7 +557,7 @@ RCC.HRTIMFreq_Value=200000000
RCC.HSE_VALUE=12000000
RCC.I2C123Freq_Value=100000000
RCC.I2C4Freq_Value=100000000
RCC.IPParameters=ADCFreq_Value,AHB12Freq_Value,AHB4Freq_Value,APB1Freq_Value,APB2Freq_Value,APB3Freq_Value,APB4Freq_Value,AXIClockFreq_Value,CECFreq_Value,CKPERFreq_Value,CortexFreq_Value,CpuClockFreq_Value,D1CPREFreq_Value,D1PPRE,D2PPRE1,D2PPRE2,D3PPRE,DFSDMACLkFreq_Value,DFSDMFreq_Value,DIVM1,DIVN1,DIVP1Freq_Value,DIVP2Freq_Value,DIVP3Freq_Value,DIVQ1Freq_Value,DIVQ2Freq_Value,DIVQ3Freq_Value,DIVR1Freq_Value,DIVR2Freq_Value,DIVR3Freq_Value,FDCANFreq_Value,FMCFreq_Value,FamilyName,HCLK3ClockFreq_Value,HCLKFreq_Value,HPRE,HRTIMFreq_Value,HSE_VALUE,I2C123Freq_Value,I2C4Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM345Freq_Value,LPUART1Freq_Value,LTDCFreq_Value,MCO1PinFreq_Value,MCO2PinFreq_Value,PLL2FRACN,PLL3FRACN,PLLFRACN,PLLSourceVirtual,QSPIFreq_Value,RNGFreq_Value,RTCFreq_Value,SAI1Freq_Value,SAI23Freq_Value,SAI4AFreq_Value,SAI4BFreq_Value,SDMMCFreq_Value,SPDIFRXFreq_Value,SPI123Freq_Value,SPI45Freq_Value,SPI6Freq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,Tim1OutputFreq_Value,Tim2OutputFreq_Value,TraceFreq_Value,USART16Freq_Value,USART234578Freq_Value,USBFreq_Value,VCO1OutputFreq_Value,VCO2OutputFreq_Value,VCO3OutputFreq_Value,VCOInput1Freq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value
RCC.IPParameters=ADCFreq_Value,AHB12Freq_Value,AHB4Freq_Value,APB1Freq_Value,APB2Freq_Value,APB3Freq_Value,APB4Freq_Value,AXIClockFreq_Value,CECFreq_Value,CKPERFreq_Value,CortexFreq_Value,CpuClockFreq_Value,D1CPREFreq_Value,D1PPRE,D2PPRE1,D2PPRE2,D3PPRE,DFSDMACLkFreq_Value,DFSDMFreq_Value,DIVM1,DIVN1,DIVP1Freq_Value,DIVP2Freq_Value,DIVP3Freq_Value,DIVQ1,DIVQ1Freq_Value,DIVQ2Freq_Value,DIVQ3Freq_Value,DIVR1Freq_Value,DIVR2Freq_Value,DIVR3Freq_Value,FDCANFreq_Value,FMCFreq_Value,FamilyName,HCLK3ClockFreq_Value,HCLKFreq_Value,HPRE,HRTIMFreq_Value,HSE_VALUE,I2C123Freq_Value,I2C4Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM345Freq_Value,LPUART1Freq_Value,LTDCFreq_Value,MCO1PinFreq_Value,MCO2PinFreq_Value,PLL2FRACN,PLL3FRACN,PLLFRACN,PLLSourceVirtual,QSPIFreq_Value,RNGFreq_Value,RTCFreq_Value,SAI1Freq_Value,SAI23Freq_Value,SAI4AFreq_Value,SAI4BFreq_Value,SDMMCFreq_Value,SPDIFRXFreq_Value,SPI123Freq_Value,SPI45Freq_Value,SPI6Freq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,Tim1OutputFreq_Value,Tim2OutputFreq_Value,TraceFreq_Value,USART16Freq_Value,USART234578Freq_Value,USBCLockSelection,USBFreq_Value,VCO1OutputFreq_Value,VCO2OutputFreq_Value,VCO3OutputFreq_Value,VCOInput1Freq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value
RCC.LPTIM1Freq_Value=100000000
RCC.LPTIM2Freq_Value=100000000
RCC.LPTIM345Freq_Value=100000000
@ -387,13 +572,13 @@ RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
RCC.QSPIFreq_Value=200000000
RCC.RNGFreq_Value=48000000
RCC.RTCFreq_Value=32000
RCC.SAI1Freq_Value=400000000
RCC.SAI23Freq_Value=400000000
RCC.SAI4AFreq_Value=400000000
RCC.SAI4BFreq_Value=400000000
RCC.SDMMCFreq_Value=400000000
RCC.SPDIFRXFreq_Value=400000000
RCC.SPI123Freq_Value=400000000
RCC.SAI1Freq_Value=200000000
RCC.SAI23Freq_Value=200000000
RCC.SAI4AFreq_Value=200000000
RCC.SAI4BFreq_Value=200000000
RCC.SDMMCFreq_Value=200000000
RCC.SPDIFRXFreq_Value=200000000
RCC.SPI123Freq_Value=200000000
RCC.SPI45Freq_Value=100000000
RCC.SPI6Freq_Value=100000000
RCC.SWPMI1Freq_Value=100000000
@ -404,13 +589,16 @@ RCC.Tim2OutputFreq_Value=200000000
RCC.TraceFreq_Value=64000000
RCC.USART16Freq_Value=100000000
RCC.USART234578Freq_Value=100000000
RCC.USBFreq_Value=400000000
RCC.USBCLockSelection=RCC_USBCLKSOURCE_HSI48
RCC.USBFreq_Value=48000000
RCC.VCO1OutputFreq_Value=800000000
RCC.VCO2OutputFreq_Value=48375000
RCC.VCO3OutputFreq_Value=48375000
RCC.VCOInput1Freq_Value=4000000
RCC.VCOInput2Freq_Value=375000
RCC.VCOInput3Freq_Value=375000
SDMMC1.ClockDiv=4
SDMMC1.IPParameters=ClockDiv
SH.FMC_A0.0=FMC_A0,12b-sda1
SH.FMC_A0.ConfNb=1
SH.FMC_A1.0=FMC_A1,12b-sda1
@ -519,8 +707,21 @@ SH.FMC_SDNRAS.0=FMC_SDNRAS,12b-sda1
SH.FMC_SDNRAS.ConfNb=1
SH.FMC_SDNWE.0=FMC_SDNWE,12b-sda1
SH.FMC_SDNWE.ConfNb=1
SH.S_TIM1_CH1.0=TIM1_CH1,PWM Generation1 CH1
SH.S_TIM1_CH1.ConfNb=1
TIM1.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_ENABLE
TIM1.Channel-PWM\ Generation1\ CH1=TIM_CHANNEL_1
TIM1.IPParameters=Channel-PWM Generation1 CH1,Period,AutoReloadPreload,Pulse-PWM Generation1 CH1
TIM1.Period=7
TIM1.Pulse-PWM\ Generation1\ CH1=3
USART1.IPParameters=VirtualMode-Asynchronous
USART1.VirtualMode-Asynchronous=VM_ASYNC
USB_OTG_FS.IPParameters=VirtualMode
USB_OTG_FS.VirtualMode=Device_Only
VP_RTC_VS_RTC_Activate.Mode=RTC_Enabled
VP_RTC_VS_RTC_Activate.Signal=RTC_VS_RTC_Activate
VP_RTC_VS_RTC_Calendar.Mode=RTC_Calendar
VP_RTC_VS_RTC_Calendar.Signal=RTC_VS_RTC_Calendar
VP_SYS_VS_Systick.Mode=SysTick
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
board=custom

40
Ubiquitous/RT-Thread_Fusion_XiUOS/aiit_board/stm32h743_openmv_h7plus/board/Kconfig
View File

@ -48,12 +48,46 @@ menu "On-chip Peripheral Drivers"
default n
endif
config BSP_USING_SDRAM
bool "Enable SDRAM"
config BSP_USING_QSPI
bool "Enable QSPI BUS"
select RT_USING_QSPI
select RT_USING_SPI
default n
config BSP_USING_ONCHIP_RTC
bool "Enable RTC"
select RT_USING_RTC
default n
source "$RTT_DIR/bsp/stm32/libraries/HAL_Drivers/Kconfig"
endmenu
endmenu
menu "Onboard Peripheral Drivers"
config BSP_USING_SDRAM
bool "Enable SDRAM"
default n
config BSP_USING_QSPI_FLASH
bool "Enable QSPI FLASH (W25Q256 qspi)"
select BSP_USING_QSPI
select RT_USING_SFUD
select RT_SFUD_USING_QSPI
default n
config BSP_USING_SDMMC
bool "Enable SDMMC (SD card)"
select RT_USING_SDIO
select RT_USING_DFS
select RT_USING_DFS_ELMFAT
default n
config BSP_USING_USBD
bool "Enable OTGFS as USB device"
select RT_USING_USB_DEVICE
default n
endmenu
endmenu

9
Ubiquitous/RT-Thread_Fusion_XiUOS/aiit_board/stm32h743_openmv_h7plus/board/SConscript
View File

@ -14,6 +14,15 @@ CubeMX_Config/Core/Src/stm32h7xx_hal_msp.c
if GetDepend(['BSP_USING_SDRAM']):
src += Glob('ports/sdram_test.c')
if GetDepend(['BSP_USING_QSPI_FLASH']):
src += ['ports/drv_qspi_flash.c']
if GetDepend(['BSP_USING_SDMMC']):
src += ['ports/drv_sdio.c']
if GetDepend(['RT_USING_DFS_ROMFS']):
src += ['ports/romfs.c']
src += ['ports/mnt_romfs.c']
if GetDepend(['RT_USING_DFS_RAMFS']):
src += ['ports/mnt_ramfs.c']
path = [cwd]
path += [cwd + '/CubeMX_Config/Core/Inc']

7
Ubiquitous/RT-Thread_Fusion_XiUOS/aiit_board/stm32h743_openmv_h7plus/board/board.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@ -28,14 +28,15 @@ void SystemClock_Config(void)
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL.PLLM = 3;
RCC_OscInitStruct.PLL.PLLN = 200;
RCC_OscInitStruct.PLL.PLLP = 2;
RCC_OscInitStruct.PLL.PLLQ = 2;
RCC_OscInitStruct.PLL.PLLQ = 4;
RCC_OscInitStruct.PLL.PLLR = 2;
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;

4
Ubiquitous/RT-Thread_Fusion_XiUOS/aiit_board/stm32h743_openmv_h7plus/board/board.h
View File

@ -1,12 +1,12 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-12-14 supperthomas first version
* 2022-03-14 wwt add sram2
* 2022-03-16 Miaowulue add sram2
*/

99
Ubiquitous/RT-Thread_Fusion_XiUOS/aiit_board/stm32h743_openmv_h7plus/board/ports/drv_qspi_flash.c Normal file
View File

@ -0,0 +1,99 @@
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-11-27 zylx first version
* 2022-03-16 Miaowulue add dfs mount
*/
#include <board.h>
#include <drv_qspi.h>
#include <rtdevice.h>
#include <rthw.h>
#include <finsh.h>
#include <dfs_elm.h>
#include <dfs_fs.h>
#ifdef BSP_USING_QSPI_FLASH
#include "spi_flash.h"
#include "spi_flash_sfud.h"
char w25qxx_read_status_register2(struct rt_qspi_device *device)
{
/* 0x35 read status register2 */
char instruction = 0x35, status;
rt_qspi_send_then_recv(device, &instruction, 1, &status, 1);
return status;
}
void w25qxx_write_enable(struct rt_qspi_device *device)
{
/* 0x06 write enable */
char instruction = 0x06;
rt_qspi_send(device, &instruction, 1);
}
void w25qxx_enter_qspi_mode(struct rt_qspi_device *device)
{
char status = 0;
/* 0x38 enter qspi mode */
char instruction = 0x38;
char write_status2_buf[2] = {0};
/* 0x31 write status register2 */
write_status2_buf[0] = 0x31;
status = w25qxx_read_status_register2(device);
if (!(status & 0x02))
{
status |= 1 << 1;
w25qxx_write_enable(device);
write_status2_buf[1] = status;
rt_qspi_send(device, &write_status2_buf, 2);
rt_qspi_send(device, &instruction, 1);
rt_kprintf("flash already enter qspi mode\n");
rt_thread_mdelay(10);
}
}
static int rt_hw_qspi_flash_with_sfud_init(void)
{
stm32_qspi_bus_attach_device("qspi1", "qspi10", RT_NULL, 4, w25qxx_enter_qspi_mode, RT_NULL);
/* init W25Q256 */
if (RT_NULL == rt_sfud_flash_probe("W25Q256", "qspi10"))
{
return -RT_ERROR;
}
return RT_EOK;
}
INIT_DEVICE_EXPORT(rt_hw_qspi_flash_with_sfud_init);
static int mnt_qspi_flash_init(void)
{
#ifdef RT_USING_DFS_ROMFS
if (dfs_mount("W25Q256", "/FLASH", "elm", 0, 0) == RT_EOK)
#else
if (dfs_mount("W25Q256", "/", "elm", 0, 0) == RT_EOK)
#endif
{
rt_kprintf("Mount spi flash successfully!\n");
return RT_EOK;
}
else
{
rt_kprintf("Mount spi flash fail!\n");
return -RT_ERROR;
}
}
INIT_APP_EXPORT(mnt_qspi_flash_init);
#endif/* BSP_USING_QSPI_FLASH */

473
Ubiquitous/RT-Thread_Fusion_XiUOS/aiit_board/stm32h743_openmv_h7plus/board/ports/drv_sdio.c Normal file
View File

@ -0,0 +1,473 @@
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-05-23 liuduanfei first version
* 2022-03-16 Miaowulue change prompt message
*/
#include "board.h"
#include "drv_sdio.h"
#include <dfs_fs.h>
#ifdef BSP_USING_SDMMC
#define DBG_TAG "drv.sdio"
#ifdef DRV_DEBUG
#define DBG_LVL DBG_LOG
#else
#define DBG_LVL DBG_INFO
#endif /* DRV_DEBUG */
#include <rtdbg.h>
static struct rt_mmcsd_host *host;
#define SDIO_TX_RX_COMPLETE_TIMEOUT_LOOPS (100000)
struct sdio_pkg
{
struct rt_mmcsd_cmd *cmd;
void *buff;
rt_uint32_t flag;
};
struct rthw_sdio
{
struct rt_mmcsd_host *host;
struct stm32_sdio_des sdio_des;
struct rt_event event;
struct sdio_pkg *pkg;
};
ALIGN(SDIO_ALIGN_LEN)
static rt_uint8_t cache_buf[SDIO_BUFF_SIZE];
/**
* @brief This function get order from sdio.
* @param data
* @retval sdio order
*/
static int get_order(rt_uint32_t data)
{
int order = 0;
switch (data)
{
case 1:
order = 0;
break;
case 2:
order = 1;
break;
case 4:
order = 2;
break;
case 8:
order = 3;
break;
case 16:
order = 4;
break;
case 32:
order = 5;
break;
case 64:
order = 6;
break;
case 128:
order = 7;
break;
case 256:
order = 8;
break;
case 512:
order = 9;
break;
case 1024:
order = 10;
break;
case 2048:
order = 11;
break;
case 4096:
order = 12;
break;
case 8192:
order = 13;
break;
case 16384:
order = 14;
break;
default :
order = 0;
break;
}
return order;
}
/**
* @brief This function wait sdio cmd completed.
* @param sdio rthw_sdio
* @retval None
*/
static void rthw_sdio_wait_completed(struct rthw_sdio *sdio)
{
rt_uint32_t status;
struct rt_mmcsd_cmd *cmd = sdio->pkg->cmd;
struct stm32_sdio *hw_sdio = sdio->sdio_des.hw_sdio;
if (rt_event_recv(&sdio->event, 0xffffffff, RT_EVENT_FLAG_OR | RT_EVENT_FLAG_CLEAR,
rt_tick_from_millisecond(5000), &status) != RT_EOK)
{
LOG_E("wait cmd completed timeout");
cmd->err = -RT_ETIMEOUT;
return;
}
cmd->resp[0] = hw_sdio->resp1;
if (resp_type(cmd) == RESP_R2)
{
cmd->resp[1] = hw_sdio->resp2;
cmd->resp[2] = hw_sdio->resp3;
cmd->resp[3] = hw_sdio->resp4;
}
if (status & SDIO_ERRORS)
{
if ((status & SDMMC_STA_CCRCFAIL) && (resp_type(cmd) & (RESP_R3 | RESP_R4)))
{
cmd->err = RT_EOK;
}
else
{
cmd->err = -RT_ERROR;
}
}
if (cmd->err == RT_EOK)
{
LOG_D("sta:0x%08X [%08X %08X %08X %08X]", status, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]);
}
else
{
LOG_D("send command error = %d", cmd->err);
}
}
/**
* @brief This function send command.
* @param sdio rthw_sdio
* @param pkg sdio package
* @retval None
*/
static void rthw_sdio_send_command(struct rthw_sdio *sdio, struct sdio_pkg *pkg)
{
struct rt_mmcsd_cmd *cmd = pkg->cmd;
struct rt_mmcsd_data *data = cmd->data;
struct stm32_sdio *hw_sdio = sdio->sdio_des.hw_sdio;
rt_uint32_t reg_cmd;
/* save pkg */
sdio->pkg = pkg;
LOG_D("CMD:%d ARG:0x%08x RES:%s%s%s%s%s%s%s%s%s rw:%c len:%d blksize:%d\n",
cmd->cmd_code,
cmd->arg,
resp_type(cmd) == RESP_NONE ? "NONE" : "",
resp_type(cmd) == RESP_R1 ? "R1" : "",
resp_type(cmd) == RESP_R1B ? "R1B" : "",
resp_type(cmd) == RESP_R2 ? "R2" : "",
resp_type(cmd) == RESP_R3 ? "R3" : "",
resp_type(cmd) == RESP_R4 ? "R4" : "",
resp_type(cmd) == RESP_R5 ? "R5" : "",
resp_type(cmd) == RESP_R6 ? "R6" : "",
resp_type(cmd) == RESP_R7 ? "R7" : "",
data ? (data->flags & DATA_DIR_WRITE ? 'w' : 'r') : '-',
data ? data->blks * data->blksize : 0,
data ? data->blksize : 0
);
hw_sdio->mask |= SDIO_MASKR_ALL;
reg_cmd = cmd->cmd_code | SDMMC_CMD_CPSMEN;
/* data pre configuration */
if (data != RT_NULL)
{
SCB_CleanInvalidateDCache();
reg_cmd |= SDMMC_CMD_CMDTRANS;
hw_sdio->mask &= ~(SDMMC_MASK_CMDRENDIE | SDMMC_MASK_CMDSENTIE);
hw_sdio->dtimer = HW_SDIO_DATATIMEOUT;
hw_sdio->dlen = data->blks * data->blksize;
hw_sdio->dctrl = (get_order(data->blksize)<<4) | (data->flags & DATA_DIR_READ ? SDMMC_DCTRL_DTDIR : 0);
hw_sdio->idmabase0r = (rt_uint32_t)cache_buf;
hw_sdio->idmatrlr = SDMMC_IDMA_IDMAEN;
}
if (resp_type(cmd) == RESP_R2)
reg_cmd |= SDMMC_CMD_WAITRESP;
else if(resp_type(cmd) != RESP_NONE)
reg_cmd |= SDMMC_CMD_WAITRESP_0;
hw_sdio->arg = cmd->arg;
hw_sdio->cmd = reg_cmd;
/* wait completed */
rthw_sdio_wait_completed(sdio);
/* Waiting for data to be sent to completion */
if (data != RT_NULL)
{
volatile rt_uint32_t count = SDIO_TX_RX_COMPLETE_TIMEOUT_LOOPS;
while (count && (hw_sdio->sta & SDMMC_STA_DPSMACT))
{
count--;
}
if ((count == 0) || (hw_sdio->sta & SDIO_ERRORS))
{
cmd->err = -RT_ERROR;
}
}
/* data post configuration */
if (data != RT_NULL)
{
if (data->flags & DATA_DIR_READ)
{
rt_memcpy(data->buf, cache_buf, data->blks * data->blksize);
SCB_CleanInvalidateDCache();
}
}
}
/**
* @brief This function send sdio request.
* @param sdio rthw_sdio
* @param req request
* @retval None
*/
static void rthw_sdio_request(struct rt_mmcsd_host *host, struct rt_mmcsd_req *req)
{
struct sdio_pkg pkg;
struct rthw_sdio *sdio = host->private_data;
struct rt_mmcsd_data *data;
if (req->cmd != RT_NULL)
{
rt_memset(&pkg, 0, sizeof(pkg));
data = req->cmd->data;
pkg.cmd = req->cmd;
if (data != RT_NULL)
{
rt_uint32_t size = data->blks * data->blksize;
RT_ASSERT(size <= SDIO_BUFF_SIZE);
if (data->flags & DATA_DIR_WRITE)
{
rt_memcpy(cache_buf, data->buf, size);
}
}
rthw_sdio_send_command(sdio, &pkg);
}
if (req->stop != RT_NULL)
{
rt_memset(&pkg, 0, sizeof(pkg));
pkg.cmd = req->stop;
rthw_sdio_send_command(sdio, &pkg);
}
mmcsd_req_complete(sdio->host);
}
/**
* @brief This function interrupt process function.
* @param host rt_mmcsd_host
* @retval None
*/
void rthw_sdio_irq_process(struct rt_mmcsd_host *host)
{
struct rthw_sdio *sdio = host->private_data;
struct stm32_sdio *hw_sdio = sdio->sdio_des.hw_sdio;
rt_uint32_t intstatus = hw_sdio->sta;
/* clear irq flag*/
hw_sdio->icr = intstatus;
rt_event_send(&sdio->event, intstatus);
}
/**
* @brief This function config sdio.
* @param host rt_mmcsd_host
* @param io_cfg rt_mmcsd_io_cfg
* @retval None
*/
static void rthw_sdio_iocfg(struct rt_mmcsd_host *host, struct rt_mmcsd_io_cfg *io_cfg)
{
rt_uint32_t temp, clk_src;
rt_uint32_t clk = io_cfg->clock;
struct rthw_sdio *sdio = host->private_data;
struct stm32_sdio *hw_sdio = sdio->sdio_des.hw_sdio;
LOG_D("clk:%dK width:%s%s%s power:%s%s%s",
clk/1000,
io_cfg->bus_width == MMCSD_BUS_WIDTH_8 ? "8" : "",
io_cfg->bus_width == MMCSD_BUS_WIDTH_4 ? "4" : "",
io_cfg->bus_width == MMCSD_BUS_WIDTH_1 ? "1" : "",
io_cfg->power_mode == MMCSD_POWER_OFF ? "OFF" : "",
io_cfg->power_mode == MMCSD_POWER_UP ? "UP" : "",
io_cfg->power_mode == MMCSD_POWER_ON ? "ON" : ""
);
clk_src = SDIO_CLOCK_FREQ;
if (clk > 0)
{
if (clk > host->freq_max)
clk = host->freq_max;
temp = DIV_ROUND_UP(clk_src, 2 * clk);
if (temp > 0x3FF)
temp = 0x3FF;
}
if (io_cfg->bus_width == MMCSD_BUS_WIDTH_4)
temp |= SDMMC_CLKCR_WIDBUS_0;
else if (io_cfg->bus_width == MMCSD_BUS_WIDTH_8)
temp |= SDMMC_CLKCR_WIDBUS_1;
hw_sdio->clkcr = temp;
if (io_cfg->power_mode == MMCSD_POWER_ON)
hw_sdio->power |= SDMMC_POWER_PWRCTRL;
}
static const struct rt_mmcsd_host_ops ops =
{
rthw_sdio_request,
rthw_sdio_iocfg,
RT_NULL,
RT_NULL,
};
/**
* @brief This function create mmcsd host.
* @param sdio_des stm32_sdio_des
* @retval rt_mmcsd_host
*/
struct rt_mmcsd_host *sdio_host_create(struct stm32_sdio_des *sdio_des)
{
struct rt_mmcsd_host *host;
struct rthw_sdio *sdio = RT_NULL;
if (sdio_des == RT_NULL)
{
return RT_NULL;
}
sdio = rt_malloc(sizeof(struct rthw_sdio));
if (sdio == RT_NULL)
{
LOG_E("malloc rthw_sdio fail");
return RT_NULL;
}
rt_memset(sdio, 0, sizeof(struct rthw_sdio));
host = mmcsd_alloc_host();
if (host == RT_NULL)
{
LOG_E("alloc host fail");
goto err;
}
rt_memcpy(&sdio->sdio_des, sdio_des, sizeof(struct stm32_sdio_des));
sdio->sdio_des.hw_sdio = (struct stm32_sdio *)SDIO_BASE_ADDRESS;
rt_event_init(&sdio->event, "sdio", RT_IPC_FLAG_FIFO);
/* set host default attributes */
host->ops = &ops;
host->freq_min = 400 * 1000;
host->freq_max = SDIO_MAX_FREQ;
host->valid_ocr = VDD_32_33 | VDD_33_34;/* The voltage range supported is 3.2v-3.4v */
#ifndef SDIO_USING_1_BIT
host->flags = MMCSD_BUSWIDTH_4 | MMCSD_MUTBLKWRITE | MMCSD_SUP_HIGHSPEED;
#else
host->flags = MMCSD_MUTBLKWRITE | MMCSD_SUP_HIGHSPEED;
#endif
host->max_seg_size = SDIO_BUFF_SIZE;
host->max_dma_segs = 1;
host->max_blk_size = 512;
host->max_blk_count = 512;
/* link up host and sdio */
sdio->host = host;
host->private_data = sdio;
/* ready to change */
mmcsd_change(host);
return host;
err:
if (sdio) rt_free(sdio);
return RT_NULL;
}
void SDMMC1_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
/* Process All SDIO Interrupt Sources */
rthw_sdio_irq_process(host);
/* leave interrupt */
rt_interrupt_leave();
}
int rt_hw_sdio_init(void)
{
struct stm32_sdio_des sdio_des;
SD_HandleTypeDef hsd;
hsd.Instance = SDMMC1;
HAL_SD_MspInit(&hsd);
host = sdio_host_create(&sdio_des);
if (host == RT_NULL)
{
LOG_E("host create fail");
return RT_NULL;
}
return 0;
}
INIT_DEVICE_EXPORT(rt_hw_sdio_init);
int mnt_init(void)
{
rt_thread_delay(RT_TICK_PER_SECOND);
#ifdef RT_USING_DFS_ROMFS
if (dfs_mount("sd0", "/SD", "elm", 0, 0) == RT_EOK)
#else
if (dfs_mount("sd0", "/", "elm", 0, 0) == RT_EOK)
#endif
{
rt_kprintf("Mount sd card successfully!\n");
}
else
{
rt_kprintf("Mount sd card fail!\n");
}
return 0;
}
INIT_APP_EXPORT(mnt_init);
#endif /* BSP_USING_SDMMC */

106
Ubiquitous/RT-Thread_Fusion_XiUOS/aiit_board/stm32h743_openmv_h7plus/board/ports/drv_sdio.h Normal file
View File

@ -0,0 +1,106 @@
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-05-23 liuduanfei first version
*/
#ifndef __DRV_SDIO_H__
#define __DRV_SDIO_H__
#include <rtthread.h>
#include "rtdevice.h"
#include <rthw.h>
#include <drv_common.h>
#include <string.h>
#include <drivers/mmcsd_core.h>
#include <drivers/sdio.h>
#define SDIO_BUFF_SIZE 4096
#define SDIO_ALIGN_LEN 32
#ifndef SDIO_BASE_ADDRESS
#define SDIO_BASE_ADDRESS (0x52007000)
#endif
#ifndef SDIO_CLOCK_FREQ
#define SDIO_CLOCK_FREQ (200U * 1000 * 1000)
#endif
#ifndef SDIO_BUFF_SIZE
#define SDIO_BUFF_SIZE (4096)
#endif
#ifndef SDIO_ALIGN_LEN
#define SDIO_ALIGN_LEN (32)
#endif
#ifndef SDIO_MAX_FREQ
#define SDIO_MAX_FREQ (25 * 1000 * 1000)
#endif
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
#define SDIO_ERRORS \
(SDMMC_STA_IDMATE | SDMMC_STA_ACKTIMEOUT | \
SDMMC_STA_RXOVERR | SDMMC_STA_TXUNDERR | \
SDMMC_STA_DTIMEOUT | SDMMC_STA_CTIMEOUT | \
SDMMC_STA_DCRCFAIL | SDMMC_STA_CCRCFAIL)
#define SDIO_MASKR_ALL \
(SDMMC_MASK_CCRCFAILIE | SDMMC_MASK_DCRCFAILIE | SDMMC_MASK_CTIMEOUTIE | \
SDMMC_MASK_TXUNDERRIE | SDMMC_MASK_RXOVERRIE | SDMMC_MASK_CMDRENDIE | \
SDMMC_MASK_CMDSENTIE | SDMMC_MASK_DATAENDIE | SDMMC_MASK_ACKTIMEOUTIE)
#define HW_SDIO_DATATIMEOUT (0xFFFFFFFFU)
struct stm32_sdio
{
volatile rt_uint32_t power; /* offset 0x00 */
volatile rt_uint32_t clkcr; /* offset 0x04 */
volatile rt_uint32_t arg; /* offset 0x08 */
volatile rt_uint32_t cmd; /* offset 0x0C */
volatile rt_uint32_t respcmd; /* offset 0x10 */
volatile rt_uint32_t resp1; /* offset 0x14 */
volatile rt_uint32_t resp2; /* offset 0x18 */
volatile rt_uint32_t resp3; /* offset 0x1C */
volatile rt_uint32_t resp4; /* offset 0x20 */
volatile rt_uint32_t dtimer; /* offset 0x24 */
volatile rt_uint32_t dlen; /* offset 0x28 */
volatile rt_uint32_t dctrl; /* offset 0x2C */
volatile rt_uint32_t dcount; /* offset 0x30 */
volatile rt_uint32_t sta; /* offset 0x34 */
volatile rt_uint32_t icr; /* offset 0x38 */
volatile rt_uint32_t mask; /* offset 0x3C */
volatile rt_uint32_t acktimer; /* offset 0x40 */
volatile rt_uint32_t reserved0[3]; /* offset 0x44 ~ 0x4C */
volatile rt_uint32_t idmatrlr; /* offset 0x50 */
volatile rt_uint32_t idmabsizer; /* offset 0x54 */
volatile rt_uint32_t idmabase0r; /* offset 0x58 */
volatile rt_uint32_t idmabase1r; /* offset 0x5C */
volatile rt_uint32_t reserved1[8]; /* offset 0x60 ~ 7C */
volatile rt_uint32_t fifo; /* offset 0x80 */
};
typedef rt_uint32_t (*sdio_clk_get)(struct stm32_sdio *hw_sdio);
struct stm32_sdio_des
{
struct stm32_sdio *hw_sdio;
sdio_clk_get clk_get;
};
/* stm32 sdio dirver class */
struct stm32_sdio_class
{
struct stm32_sdio_des *des;
const struct stm32_sdio_config *cfg;
struct rt_mmcsd_host host;
};
extern void stm32_mmcsd_change(void);
#endif /* __DRV_SDIO_H__ */

22
Ubiquitous/RT-Thread_Fusion_XiUOS/aiit_board/stm32h743_openmv_h7plus/board/ports/mnt_ramfs.c Normal file
View File

@ -0,0 +1,22 @@
#include <rtthread.h>
#if defined RT_USING_DFS && defined RT_USING_DFS_RAMFS
#include <dfs_fs.h>
#include "dfs_ramfs.h"
int mnt_ramfs_init(void)
{
if (dfs_mount(RT_NULL, "/", "ram", 0, dfs_ramfs_create(rt_malloc(1024),1024)) == 0)
{
rt_kprintf("RAM file system initializated!\n");
}
else
{
rt_kprintf("RAM file system initializate failed!\n");
}
return 0;
}
INIT_ENV_EXPORT(mnt_ramfs_init);
#endif

22
Ubiquitous/RT-Thread_Fusion_XiUOS/aiit_board/stm32h743_openmv_h7plus/board/ports/mnt_romfs.c Normal file
View File

@ -0,0 +1,22 @@
#include <rtthread.h>
#if defined RT_USING_DFS && defined RT_USING_DFS_ROMFS
#include <dfs_fs.h>
#include "dfs_romfs.h"
int mnt_romfs_init(void)
{
if (dfs_mount(RT_NULL, "/", "rom", 0, &(romfs_root)) == 0)
{
rt_kprintf("ROM file system initializated!\n");
}
else
{
rt_kprintf("ROM file system initializate failed!\n");
}
return 0;
}
INIT_ENV_EXPORT(mnt_romfs_init);
#endif

23
Ubiquitous/RT-Thread_Fusion_XiUOS/aiit_board/stm32h743_openmv_h7plus/board/ports/romfs.c Normal file
View File

@ -0,0 +1,23 @@
/* Generated by mkromfs. Edit with caution. */
#include <rtthread.h>
#include <dfs_romfs.h>
#ifdef RT_USING_DFS_ROMFS
static const rt_uint8_t _romfs_root_hello_txt[] = {
0x58,0x49,0x55,0x4f,0x53,0x20,0x73,0x74,0x6d,0x33,0x32,0x68,0x37,0x20,0x52,0x6f,0x6d,0x46,0x53,0x20,0x73,0x75,0x63,0x63,0x65,0x73,0x73,0x21
};
static const struct romfs_dirent _romfs_root[] = {
#ifdef BSP_USING_QSPI_FLASH
{ROMFS_DIRENT_DIR, "FLASH", RT_NULL, 0},
#endif
#ifdef BSP_USING_SDMMC
{ROMFS_DIRENT_DIR, "SD", RT_NULL, 0},
#endif
{ROMFS_DIRENT_FILE, "hello.txt", (rt_uint8_t *)_romfs_root_hello_txt, sizeof(_romfs_root_hello_txt)/sizeof(_romfs_root_hello_txt[0])}
};
const struct romfs_dirent romfs_root = {
ROMFS_DIRENT_DIR, "/", (rt_uint8_t *)_romfs_root, sizeof(_romfs_root)/sizeof(_romfs_root[0])
};
#endif

2
Ubiquitous/RT-Thread_Fusion_XiUOS/aiit_board/stm32h743_openmv_h7plus/board/ports/sdram_port.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*

90
Ubiquitous/RT-Thread_Fusion_XiUOS/aiit_board/stm32h743_openmv_h7plus/rtconfig.h
View File

@ -18,6 +18,7 @@
#define RT_TICK_PER_SECOND 1000
#define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK
#define RT_HOOK_USING_FUNC_PTR
#define RT_USING_IDLE_HOOK
#define RT_IDLE_HOOK_LIST_SIZE 4
#define IDLE_THREAD_STACK_SIZE 256
@ -39,8 +40,9 @@
#define RT_USING_MEMPOOL
#define RT_USING_MEMHEAP
#define RT_USING_MEMHEAP_AUTO_BINDING
#define RT_MEMHEAP_FAST_MODE
#define RT_USING_MEMHEAP_AS_HEAP
#define RT_USING_MEMHEAP_AUTO_BINDING
#define RT_USING_HEAP
/* Kernel Device Object */
@ -49,7 +51,7 @@
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 256
#define RT_CONSOLE_DEVICE_NAME "uart1"
#define RT_VER_NUM 0x40004
#define RT_VER_NUM 0x40100
#define ARCH_ARM
#define RT_USING_CPU_FFS
#define ARCH_ARM_CORTEX_M
@ -61,15 +63,8 @@
#define RT_USING_USER_MAIN
#define RT_MAIN_THREAD_STACK_SIZE 2048
#define RT_MAIN_THREAD_PRIORITY 10
/* C++ features */
#define RT_USING_CPLUSPLUS
/* Command shell */
#define RT_USING_FINSH
#define RT_USING_MSH
#define RT_USING_FINSH
#define FINSH_USING_MSH
#define FINSH_THREAD_NAME "tshell"
#define FINSH_THREAD_PRIORITY 20
@ -81,10 +76,8 @@
#define MSH_USING_BUILT_IN_COMMANDS
#define FINSH_USING_DESCRIPTION
#define FINSH_ARG_MAX 10
/* Device virtual file system */
#define RT_USING_DFS
#define DFS_USING_POSIX
#define DFS_USING_WORKDIR
#define DFS_FILESYSTEMS_MAX 4
#define DFS_FILESYSTEM_TYPES_MAX 4
@ -105,46 +98,66 @@
#define RT_DFS_ELM_REENTRANT
#define RT_DFS_ELM_MUTEX_TIMEOUT 3000
#define RT_USING_DFS_DEVFS
#define RT_USING_DFS_ROMFS
#define RT_USING_DFS_RAMFS
/* Device Drivers */
#define RT_USING_DEVICE_IPC
#define RT_PIPE_BUFSZ 512
#define RT_USING_SERIAL
#define RT_USING_SERIAL_V1
#define RT_SERIAL_USING_DMA
#define RT_SERIAL_RB_BUFSZ 64
#define RT_USING_PIN
#define RT_USING_RTC
#define RT_USING_SDIO
#define RT_SDIO_STACK_SIZE 512
#define RT_SDIO_THREAD_PRIORITY 15
#define RT_MMCSD_STACK_SIZE 1024
#define RT_MMCSD_THREAD_PREORITY 22
#define RT_MMCSD_MAX_PARTITION 16
#define RT_USING_SPI
#define RT_USING_QSPI
#define RT_USING_SFUD
#define RT_SFUD_USING_SFDP
#define RT_SFUD_USING_FLASH_INFO_TABLE
#define RT_SFUD_USING_QSPI
#define RT_SFUD_SPI_MAX_HZ 50000000
/* Using USB */
#define RT_USING_USB
#define RT_USING_USB_DEVICE
#define RT_USBD_THREAD_STACK_SZ 4096
#define USB_VENDOR_ID 0x0FFE
#define USB_PRODUCT_ID 0x0001
#define _RT_USB_DEVICE_CDC
#define RT_USB_DEVICE_CDC
#define RT_VCOM_TASK_STK_SIZE 512
#define RT_CDC_RX_BUFSIZE 128
#define RT_VCOM_SERNO "32021919830108"
#define RT_VCOM_SER_LEN 14
#define RT_VCOM_TX_TIMEOUT 1000
/* POSIX layer and C standard library */
/* C/C++ and POSIX layer */
#define RT_USING_LIBC
#define RT_USING_PTHREADS
#define PTHREAD_NUM_MAX 8
#define RT_USING_POSIX
#define RT_LIBC_USING_TIME
#define RT_LIBC_DEFAULT_TIMEZONE 8
/* POSIX (Portable Operating System Interface) layer */
#define RT_USING_POSIX_DELAY
#define RT_USING_POSIX_CLOCK
#define RT_USING_PTHREADS
#define PTHREAD_NUM_MAX 8
/* Interprocess Communication (IPC) */
/* Socket is in the 'Network' category */
#define RT_USING_CPLUSPLUS
/* Network */
/* Socket abstraction layer */
/* Network interface device */
/* light weight TCP/IP stack */
/* AT commands */
/* VBUS(Virtual Software BUS) */
/* Utilities */
@ -163,7 +176,14 @@
#define BSP_USING_GPIO
#define BSP_USING_UART
#define BSP_USING_UART1
#define BSP_USING_QSPI
#define BSP_USING_ONCHIP_RTC
/* Onboard Peripheral Drivers */
#define BSP_USING_SDRAM
#define BSP_USING_SDMMC
#define BSP_USING_USBD
/* More Drivers */

2
Ubiquitous/RT-Thread_Fusion_XiUOS/aiit_board/stm32h743_openmv_h7plus/rtconfig.py
View File

@ -2,7 +2,7 @@ import os
SRC_APP_DIR = '../../../../APP_Framework'
# toolchains options
ARCH='arm'
CPU='cortex-m4'
CPU='cortex-m7'
CROSS_TOOL='gcc'
# bsp lib config