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change ch438 on nuttx

This commit is contained in:
wgzAIIT 2022-05-09 17:29:49 +08:00
parent de273145c3
commit ee132df28a
3 changed files with 375 additions and 424 deletions
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7
Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_bringup.c
View File

@ -184,12 +184,7 @@ int imxrt_bringup(void)
#endif #endif
#ifdef CONFIG_BSP_USING_CH438 #ifdef CONFIG_BSP_USING_CH438
ret = board_ch438_initialize(); board_ch438_initialize();
if (ret < 0)
{
syslog(LOG_ERR, "Failed to initialize ch438 Driver: %d\n", ret);
}
#endif #endif
UNUSED(ret); UNUSED(ret);

732
Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c
View File

@ -60,33 +60,33 @@ struct ch438_dev_s
static pthread_mutex_t mutex[CH438PORTNUM] = static pthread_mutex_t mutex[CH438PORTNUM] =
{ {
PTHREAD_MUTEX_INITIALIZER, PTHREAD_MUTEX_INITIALIZER,
PTHREAD_MUTEX_INITIALIZER, PTHREAD_MUTEX_INITIALIZER,
PTHREAD_MUTEX_INITIALIZER, PTHREAD_MUTEX_INITIALIZER,
PTHREAD_MUTEX_INITIALIZER, PTHREAD_MUTEX_INITIALIZER,
PTHREAD_MUTEX_INITIALIZER, PTHREAD_MUTEX_INITIALIZER,
PTHREAD_MUTEX_INITIALIZER, PTHREAD_MUTEX_INITIALIZER,
PTHREAD_MUTEX_INITIALIZER, PTHREAD_MUTEX_INITIALIZER,
PTHREAD_MUTEX_INITIALIZER PTHREAD_MUTEX_INITIALIZER
}; };
static pthread_cond_t cond[CH438PORTNUM] = static pthread_cond_t cond[CH438PORTNUM] =
{ {
PTHREAD_COND_INITIALIZER, PTHREAD_COND_INITIALIZER,
PTHREAD_COND_INITIALIZER, PTHREAD_COND_INITIALIZER,
PTHREAD_COND_INITIALIZER, PTHREAD_COND_INITIALIZER,
PTHREAD_COND_INITIALIZER, PTHREAD_COND_INITIALIZER,
PTHREAD_COND_INITIALIZER, PTHREAD_COND_INITIALIZER,
PTHREAD_COND_INITIALIZER, PTHREAD_COND_INITIALIZER,
PTHREAD_COND_INITIALIZER, PTHREAD_COND_INITIALIZER,
PTHREAD_COND_INITIALIZER PTHREAD_COND_INITIALIZER
}; };
volatile bool done[CH438PORTNUM] = {false,false,false,false,false,false,false,false}; volatile bool done[CH438PORTNUM] = {false,false,false,false,false,false,false,false};
static char buff[CH438PORTNUM][CH438_BUFFSIZE]; static char buff[CH438PORTNUM][CH438_BUFFSIZE];
static uint8_t buff_ptr[CH438PORTNUM]; static uint8_t buff_ptr[CH438PORTNUM];
static uint8_t Interruptnum[CH438PORTNUM] = {0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,}; /* SSR寄存器中断号对应值 */ static uint8_t Interruptnum[CH438PORTNUM] = {0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,}; /* SSR寄存器中断号对应值 */
static uint8_t offsetadd[CH438PORTNUM] = {0x00,0x10,0x20,0x30,0x08,0x18,0x28,0x38,}; /* 串口号的偏移地址 */ static uint8_t offsetadd[CH438PORTNUM] = {0x00,0x10,0x20,0x30,0x08,0x18,0x28,0x38,}; /* 串口号的偏移地址 */
static uint8_t gInterruptStatus; static uint8_t gInterruptStatus;
@ -111,27 +111,27 @@ static const struct file_operations g_ch438fops =
****************************************************************************/ ****************************************************************************/
static int getInterruptStatus(int argc, char **argv) static int getInterruptStatus(int argc, char **argv)
{ {
uint8_t ext_uart_no = 0; uint8_t ext_uart_no = 0;
while(1) while(1)
{ {
pthread_mutex_lock(&mutex[ext_uart_no]); pthread_mutex_lock(&mutex[ext_uart_no]);
gInterruptStatus = ReadCH438Data(REG_SSR_ADDR); gInterruptStatus = ReadCH438Data(REG_SSR_ADDR);
if(!gInterruptStatus) if(!gInterruptStatus)
{ {
pthread_mutex_unlock(&mutex[ext_uart_no]); pthread_mutex_unlock(&mutex[ext_uart_no]);
continue; continue;
} }
for(ext_uart_no = 0; ext_uart_no < CH438PORTNUM; ext_uart_no++) for(ext_uart_no = 0; ext_uart_no < CH438PORTNUM; ext_uart_no++)
{ {
if(gInterruptStatus & Interruptnum[ext_uart_no]) if(gInterruptStatus & Interruptnum[ext_uart_no])
{ {
done[ext_uart_no] = true; done[ext_uart_no] = true;
pthread_cond_signal(&cond[ext_uart_no]); pthread_cond_signal(&cond[ext_uart_no]);
pthread_mutex_unlock(&mutex[ext_uart_no]); pthread_mutex_unlock(&mutex[ext_uart_no]);
} }
} }
} }
} }
/**************************************************************************** /****************************************************************************
@ -143,14 +143,14 @@ static int getInterruptStatus(int argc, char **argv)
****************************************************************************/ ****************************************************************************/
static void CH438SetOutput(void) static void CH438SetOutput(void)
{ {
imxrt_config_gpio(CH438_D0_PIN_OUT); imxrt_config_gpio(CH438_D0_PIN_OUT);
imxrt_config_gpio(CH438_D1_PIN_OUT); imxrt_config_gpio(CH438_D1_PIN_OUT);
imxrt_config_gpio(CH438_D2_PIN_OUT); imxrt_config_gpio(CH438_D2_PIN_OUT);
imxrt_config_gpio(CH438_D3_PIN_OUT); imxrt_config_gpio(CH438_D3_PIN_OUT);
imxrt_config_gpio(CH438_D4_PIN_OUT); imxrt_config_gpio(CH438_D4_PIN_OUT);
imxrt_config_gpio(CH438_D5_PIN_OUT); imxrt_config_gpio(CH438_D5_PIN_OUT);
imxrt_config_gpio(CH438_D6_PIN_OUT); imxrt_config_gpio(CH438_D6_PIN_OUT);
imxrt_config_gpio(CH438_D7_PIN_OUT); imxrt_config_gpio(CH438_D7_PIN_OUT);
} }
/**************************************************************************** /****************************************************************************
@ -162,14 +162,14 @@ static void CH438SetOutput(void)
****************************************************************************/ ****************************************************************************/
static void CH438SetInput(void) static void CH438SetInput(void)
{ {
imxrt_config_gpio(CH438_D0_PIN_INPUT); imxrt_config_gpio(CH438_D0_PIN_INPUT);
imxrt_config_gpio(CH438_D1_PIN_INPUT); imxrt_config_gpio(CH438_D1_PIN_INPUT);
imxrt_config_gpio(CH438_D2_PIN_INPUT); imxrt_config_gpio(CH438_D2_PIN_INPUT);
imxrt_config_gpio(CH438_D3_PIN_INPUT); imxrt_config_gpio(CH438_D3_PIN_INPUT);
imxrt_config_gpio(CH438_D4_PIN_INPUT); imxrt_config_gpio(CH438_D4_PIN_INPUT);
imxrt_config_gpio(CH438_D5_PIN_INPUT); imxrt_config_gpio(CH438_D5_PIN_INPUT);
imxrt_config_gpio(CH438_D6_PIN_INPUT); imxrt_config_gpio(CH438_D6_PIN_INPUT);
imxrt_config_gpio(CH438_D7_PIN_INPUT); imxrt_config_gpio(CH438_D7_PIN_INPUT);
} }
/**************************************************************************** /****************************************************************************
@ -181,48 +181,48 @@ static void CH438SetInput(void)
****************************************************************************/ ****************************************************************************/
static uint8_t ReadCH438Data(uint8_t addr) static uint8_t ReadCH438Data(uint8_t addr)
{ {
uint8_t dat = 0; uint8_t dat = 0;
imxrt_gpio_write(CH438_NWR_PIN, true); imxrt_gpio_write(CH438_NWR_PIN, true);
imxrt_gpio_write(CH438_NRD_PIN, true); imxrt_gpio_write(CH438_NRD_PIN, true);
imxrt_gpio_write(CH438_ALE_PIN, true); imxrt_gpio_write(CH438_ALE_PIN, true);
CH438SetOutput(); CH438SetOutput();
up_udelay(1); up_udelay(1);
if(addr &0x80) imxrt_gpio_write(CH438_D7_PIN_OUT, true); else imxrt_gpio_write(CH438_D7_PIN_OUT, false); if(addr &0x80) imxrt_gpio_write(CH438_D7_PIN_OUT, true); else imxrt_gpio_write(CH438_D7_PIN_OUT, false);
if(addr &0x40) imxrt_gpio_write(CH438_D6_PIN_OUT, true); else imxrt_gpio_write(CH438_D6_PIN_OUT, false); if(addr &0x40) imxrt_gpio_write(CH438_D6_PIN_OUT, true); else imxrt_gpio_write(CH438_D6_PIN_OUT, false);
if(addr &0x20) imxrt_gpio_write(CH438_D5_PIN_OUT, true); else imxrt_gpio_write(CH438_D5_PIN_OUT, false); if(addr &0x20) imxrt_gpio_write(CH438_D5_PIN_OUT, true); else imxrt_gpio_write(CH438_D5_PIN_OUT, false);
if(addr &0x10) imxrt_gpio_write(CH438_D4_PIN_OUT, true); else imxrt_gpio_write(CH438_D4_PIN_OUT, false); if(addr &0x10) imxrt_gpio_write(CH438_D4_PIN_OUT, true); else imxrt_gpio_write(CH438_D4_PIN_OUT, false);
if(addr &0x08) imxrt_gpio_write(CH438_D3_PIN_OUT, true); else imxrt_gpio_write(CH438_D3_PIN_OUT, false); if(addr &0x08) imxrt_gpio_write(CH438_D3_PIN_OUT, true); else imxrt_gpio_write(CH438_D3_PIN_OUT, false);
if(addr &0x04) imxrt_gpio_write(CH438_D2_PIN_OUT, true); else imxrt_gpio_write(CH438_D2_PIN_OUT, false); if(addr &0x04) imxrt_gpio_write(CH438_D2_PIN_OUT, true); else imxrt_gpio_write(CH438_D2_PIN_OUT, false);
if(addr &0x02) imxrt_gpio_write(CH438_D1_PIN_OUT, true); else imxrt_gpio_write(CH438_D1_PIN_OUT, false); if(addr &0x02) imxrt_gpio_write(CH438_D1_PIN_OUT, true); else imxrt_gpio_write(CH438_D1_PIN_OUT, false);
if(addr &0x01) imxrt_gpio_write(CH438_D0_PIN_OUT, true); else imxrt_gpio_write(CH438_D0_PIN_OUT, false); if(addr &0x01) imxrt_gpio_write(CH438_D0_PIN_OUT, true); else imxrt_gpio_write(CH438_D0_PIN_OUT, false);
up_udelay(1); up_udelay(1);
imxrt_gpio_write(CH438_ALE_PIN, false); imxrt_gpio_write(CH438_ALE_PIN, false);
up_udelay(1); up_udelay(1);
CH438SetInput(); CH438SetInput();
up_udelay(1); up_udelay(1);
imxrt_gpio_write(CH438_NRD_PIN, false); imxrt_gpio_write(CH438_NRD_PIN, false);
up_udelay(1); up_udelay(1);
if (imxrt_gpio_read(CH438_D7_PIN_INPUT)) dat |= 0x80; if (imxrt_gpio_read(CH438_D7_PIN_INPUT)) dat |= 0x80;
if (imxrt_gpio_read(CH438_D6_PIN_INPUT)) dat |= 0x40; if (imxrt_gpio_read(CH438_D6_PIN_INPUT)) dat |= 0x40;
if (imxrt_gpio_read(CH438_D5_PIN_INPUT)) dat |= 0x20; if (imxrt_gpio_read(CH438_D5_PIN_INPUT)) dat |= 0x20;
if (imxrt_gpio_read(CH438_D4_PIN_INPUT)) dat |= 0x10; if (imxrt_gpio_read(CH438_D4_PIN_INPUT)) dat |= 0x10;
if (imxrt_gpio_read(CH438_D3_PIN_INPUT)) dat |= 0x08; if (imxrt_gpio_read(CH438_D3_PIN_INPUT)) dat |= 0x08;
if (imxrt_gpio_read(CH438_D2_PIN_INPUT)) dat |= 0x04; if (imxrt_gpio_read(CH438_D2_PIN_INPUT)) dat |= 0x04;
if (imxrt_gpio_read(CH438_D1_PIN_INPUT)) dat |= 0x02; if (imxrt_gpio_read(CH438_D1_PIN_INPUT)) dat |= 0x02;
if (imxrt_gpio_read(CH438_D0_PIN_INPUT)) dat |= 0x01; if (imxrt_gpio_read(CH438_D0_PIN_INPUT)) dat |= 0x01;
imxrt_gpio_write(CH438_NRD_PIN, true); imxrt_gpio_write(CH438_NRD_PIN, true);
imxrt_gpio_write(CH438_ALE_PIN, true); imxrt_gpio_write(CH438_ALE_PIN, true);
up_udelay(1); up_udelay(1);
return dat; return dat;
} }
/**************************************************************************** /****************************************************************************
@ -234,48 +234,48 @@ static uint8_t ReadCH438Data(uint8_t addr)
****************************************************************************/ ****************************************************************************/
static void WriteCH438Data(uint8_t addr, uint8_t dat) static void WriteCH438Data(uint8_t addr, uint8_t dat)
{ {
imxrt_gpio_write(CH438_ALE_PIN, true); imxrt_gpio_write(CH438_ALE_PIN, true);
imxrt_gpio_write(CH438_NRD_PIN, true); imxrt_gpio_write(CH438_NRD_PIN, true);
imxrt_gpio_write(CH438_NWR_PIN, true); imxrt_gpio_write(CH438_NWR_PIN, true);
CH438SetOutput(); CH438SetOutput();
up_udelay(1); up_udelay(1);
if(addr &0x80) imxrt_gpio_write(CH438_D7_PIN_OUT, true); else imxrt_gpio_write(CH438_D7_PIN_OUT, false); if(addr &0x80) imxrt_gpio_write(CH438_D7_PIN_OUT, true); else imxrt_gpio_write(CH438_D7_PIN_OUT, false);
if(addr &0x40) imxrt_gpio_write(CH438_D6_PIN_OUT, true); else imxrt_gpio_write(CH438_D6_PIN_OUT, false); if(addr &0x40) imxrt_gpio_write(CH438_D6_PIN_OUT, true); else imxrt_gpio_write(CH438_D6_PIN_OUT, false);
if(addr &0x20) imxrt_gpio_write(CH438_D5_PIN_OUT, true); else imxrt_gpio_write(CH438_D5_PIN_OUT, false); if(addr &0x20) imxrt_gpio_write(CH438_D5_PIN_OUT, true); else imxrt_gpio_write(CH438_D5_PIN_OUT, false);
if(addr &0x10) imxrt_gpio_write(CH438_D4_PIN_OUT, true); else imxrt_gpio_write(CH438_D4_PIN_OUT, false); if(addr &0x10) imxrt_gpio_write(CH438_D4_PIN_OUT, true); else imxrt_gpio_write(CH438_D4_PIN_OUT, false);
if(addr &0x08) imxrt_gpio_write(CH438_D3_PIN_OUT, true); else imxrt_gpio_write(CH438_D3_PIN_OUT, false); if(addr &0x08) imxrt_gpio_write(CH438_D3_PIN_OUT, true); else imxrt_gpio_write(CH438_D3_PIN_OUT, false);
if(addr &0x04) imxrt_gpio_write(CH438_D2_PIN_OUT, true); else imxrt_gpio_write(CH438_D2_PIN_OUT, false); if(addr &0x04) imxrt_gpio_write(CH438_D2_PIN_OUT, true); else imxrt_gpio_write(CH438_D2_PIN_OUT, false);
if(addr &0x02) imxrt_gpio_write(CH438_D1_PIN_OUT, true); else imxrt_gpio_write(CH438_D1_PIN_OUT, false); if(addr &0x02) imxrt_gpio_write(CH438_D1_PIN_OUT, true); else imxrt_gpio_write(CH438_D1_PIN_OUT, false);
if(addr &0x01) imxrt_gpio_write(CH438_D0_PIN_OUT, true); else imxrt_gpio_write(CH438_D0_PIN_OUT, false); if(addr &0x01) imxrt_gpio_write(CH438_D0_PIN_OUT, true); else imxrt_gpio_write(CH438_D0_PIN_OUT, false);
up_udelay(1); up_udelay(1);
imxrt_gpio_write(CH438_ALE_PIN, false); imxrt_gpio_write(CH438_ALE_PIN, false);
up_udelay(1); up_udelay(1);
if(dat &0x80) imxrt_gpio_write(CH438_D7_PIN_OUT, true); else imxrt_gpio_write(CH438_D7_PIN_OUT, false); if(dat &0x80) imxrt_gpio_write(CH438_D7_PIN_OUT, true); else imxrt_gpio_write(CH438_D7_PIN_OUT, false);
if(dat &0x40) imxrt_gpio_write(CH438_D6_PIN_OUT, true); else imxrt_gpio_write(CH438_D6_PIN_OUT, false); if(dat &0x40) imxrt_gpio_write(CH438_D6_PIN_OUT, true); else imxrt_gpio_write(CH438_D6_PIN_OUT, false);
if(dat &0x20) imxrt_gpio_write(CH438_D5_PIN_OUT, true); else imxrt_gpio_write(CH438_D5_PIN_OUT, false); if(dat &0x20) imxrt_gpio_write(CH438_D5_PIN_OUT, true); else imxrt_gpio_write(CH438_D5_PIN_OUT, false);
if(dat &0x10) imxrt_gpio_write(CH438_D4_PIN_OUT, true); else imxrt_gpio_write(CH438_D4_PIN_OUT, false); if(dat &0x10) imxrt_gpio_write(CH438_D4_PIN_OUT, true); else imxrt_gpio_write(CH438_D4_PIN_OUT, false);
if(dat &0x08) imxrt_gpio_write(CH438_D3_PIN_OUT, true); else imxrt_gpio_write(CH438_D3_PIN_OUT, false); if(dat &0x08) imxrt_gpio_write(CH438_D3_PIN_OUT, true); else imxrt_gpio_write(CH438_D3_PIN_OUT, false);
if(dat &0x04) imxrt_gpio_write(CH438_D2_PIN_OUT, true); else imxrt_gpio_write(CH438_D2_PIN_OUT, false); if(dat &0x04) imxrt_gpio_write(CH438_D2_PIN_OUT, true); else imxrt_gpio_write(CH438_D2_PIN_OUT, false);
if(dat &0x02) imxrt_gpio_write(CH438_D1_PIN_OUT, true); else imxrt_gpio_write(CH438_D1_PIN_OUT, false); if(dat &0x02) imxrt_gpio_write(CH438_D1_PIN_OUT, true); else imxrt_gpio_write(CH438_D1_PIN_OUT, false);
if(dat &0x01) imxrt_gpio_write(CH438_D0_PIN_OUT, true); else imxrt_gpio_write(CH438_D0_PIN_OUT, false); if(dat &0x01) imxrt_gpio_write(CH438_D0_PIN_OUT, true); else imxrt_gpio_write(CH438_D0_PIN_OUT, false);
up_udelay(1); up_udelay(1);
imxrt_gpio_write(CH438_NWR_PIN, false); imxrt_gpio_write(CH438_NWR_PIN, false);
up_udelay(1); up_udelay(1);
imxrt_gpio_write(CH438_NWR_PIN, true); imxrt_gpio_write(CH438_NWR_PIN, true);
imxrt_gpio_write(CH438_ALE_PIN, true); imxrt_gpio_write(CH438_ALE_PIN, true);
up_udelay(1); up_udelay(1);
CH438SetInput(); CH438SetInput();
return; return;
} }
/**************************************************************************** /****************************************************************************
@ -288,7 +288,7 @@ static void WriteCH438Data(uint8_t addr, uint8_t dat)
static void WriteCH438Block(uint8_t mAddr, uint8_t mLen, char *mBuf) static void WriteCH438Block(uint8_t mAddr, uint8_t mLen, char *mBuf)
{ {
while (mLen--) while (mLen--)
WriteCH438Data(mAddr, *mBuf++); WriteCH438Data(mAddr, *mBuf++);
} }
/**************************************************************************** /****************************************************************************
@ -301,9 +301,9 @@ static void WriteCH438Block(uint8_t mAddr, uint8_t mLen, char *mBuf)
****************************************************************************/ ****************************************************************************/
static void Ch438UartSend(uint8_t ext_uart_no, char *Data, uint16_t Num) static void Ch438UartSend(uint8_t ext_uart_no, char *Data, uint16_t Num)
{ {
uint8_t REG_LSR_ADDR,REG_THR_ADDR; uint8_t REG_LSR_ADDR,REG_THR_ADDR;
REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR; REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR;
REG_THR_ADDR = offsetadd[ext_uart_no] | REG_THR0_ADDR; REG_THR_ADDR = offsetadd[ext_uart_no] | REG_THR0_ADDR;
while(1) while(1)
{ {
@ -332,24 +332,24 @@ static void Ch438UartSend(uint8_t ext_uart_no, char *Data, uint16_t Num)
uint8_t CH438UARTRcv(uint8_t ext_uart_no, char* buf) uint8_t CH438UARTRcv(uint8_t ext_uart_no, char* buf)
{ {
uint8_t RcvNum = 0; uint8_t RcvNum = 0;
uint8_t dat = 0; uint8_t dat = 0;
uint8_t REG_LSR_ADDR,REG_RBR_ADDR; uint8_t REG_LSR_ADDR,REG_RBR_ADDR;
REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR; REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR;
REG_RBR_ADDR = offsetadd[ext_uart_no] | REG_RBR0_ADDR; REG_RBR_ADDR = offsetadd[ext_uart_no] | REG_RBR0_ADDR;
/* Wait for the data to be ready */ /* Wait for the data to be ready */
while((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_DATARDY) == 0 ); while((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_DATARDY) == 0 );
while((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_DATARDY) == 0x01 ) while((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_DATARDY) == 0x01 )
{ {
dat = ReadCH438Data(REG_RBR_ADDR); dat = ReadCH438Data(REG_RBR_ADDR);
buff[ext_uart_no][buff_ptr[ext_uart_no]] = dat; buff[ext_uart_no][buff_ptr[ext_uart_no]] = dat;
buff_ptr[ext_uart_no] = buff_ptr[ext_uart_no] + 1; buff_ptr[ext_uart_no] = buff_ptr[ext_uart_no] + 1;
if (buff_ptr[ext_uart_no] == CH438_BUFFSIZE) if (buff_ptr[ext_uart_no] == CH438_BUFFSIZE)
buff_ptr[ext_uart_no] = 0; buff_ptr[ext_uart_no] = 0;
RcvNum = RcvNum + 1; RcvNum = RcvNum + 1;
} }
return RcvNum; return RcvNum;
} }
@ -362,14 +362,14 @@ uint8_t CH438UARTRcv(uint8_t ext_uart_no, char* buf)
****************************************************************************/ ****************************************************************************/
static void ImxrtCH438Init(void) static void ImxrtCH438Init(void)
{ {
CH438SetOutput(); CH438SetOutput();
imxrt_config_gpio(CH438_NWR_PIN); imxrt_config_gpio(CH438_NWR_PIN);
imxrt_config_gpio(CH438_NRD_PIN); imxrt_config_gpio(CH438_NRD_PIN);
imxrt_config_gpio(CH438_ALE_PIN); imxrt_config_gpio(CH438_ALE_PIN);
imxrt_gpio_write(CH438_NWR_PIN,true); imxrt_gpio_write(CH438_NWR_PIN,true);
imxrt_gpio_write(CH438_NRD_PIN,true); imxrt_gpio_write(CH438_NRD_PIN,true);
imxrt_gpio_write(CH438_ALE_PIN,true); imxrt_gpio_write(CH438_ALE_PIN,true);
} }
/**************************************************************************** /****************************************************************************
@ -379,59 +379,59 @@ static void ImxrtCH438Init(void)
* ch438 port initialization * ch438 port initialization
* *
****************************************************************************/ ****************************************************************************/
static void CH438PortInit(uint8_t ext_uart_no, uint32_t baud_rate) static void CH438PortInit(uint8_t ext_uart_no, uint32_t baud_rate)
{ {
uint32_t div; uint32_t div;
uint8_t DLL,DLM,dlab; uint8_t DLL,DLM,dlab;
uint8_t REG_LCR_ADDR; uint8_t REG_LCR_ADDR;
uint8_t REG_DLL_ADDR; uint8_t REG_DLL_ADDR;
uint8_t REG_DLM_ADDR; uint8_t REG_DLM_ADDR;
uint8_t REG_IER_ADDR; uint8_t REG_IER_ADDR;
uint8_t REG_MCR_ADDR; uint8_t REG_MCR_ADDR;
uint8_t REG_FCR_ADDR; uint8_t REG_FCR_ADDR;
REG_LCR_ADDR = offsetadd[ext_uart_no] | REG_LCR0_ADDR; REG_LCR_ADDR = offsetadd[ext_uart_no] | REG_LCR0_ADDR;
REG_DLL_ADDR = offsetadd[ext_uart_no] | REG_DLL0_ADDR; REG_DLL_ADDR = offsetadd[ext_uart_no] | REG_DLL0_ADDR;
REG_DLM_ADDR = offsetadd[ext_uart_no] | REG_DLM0_ADDR; REG_DLM_ADDR = offsetadd[ext_uart_no] | REG_DLM0_ADDR;
REG_IER_ADDR = offsetadd[ext_uart_no] | REG_IER0_ADDR; REG_IER_ADDR = offsetadd[ext_uart_no] | REG_IER0_ADDR;
REG_MCR_ADDR = offsetadd[ext_uart_no] | REG_MCR0_ADDR; REG_MCR_ADDR = offsetadd[ext_uart_no] | REG_MCR0_ADDR;
REG_FCR_ADDR = offsetadd[ext_uart_no] | REG_FCR0_ADDR; REG_FCR_ADDR = offsetadd[ext_uart_no] | REG_FCR0_ADDR;
/* reset the uart */ /* reset the uart */
WriteCH438Data(REG_IER_ADDR, BIT_IER_RESET); WriteCH438Data(REG_IER_ADDR, BIT_IER_RESET);
up_mdelay(50); up_mdelay(50);
dlab = ReadCH438Data(REG_IER_ADDR); dlab = ReadCH438Data(REG_IER_ADDR);
dlab &= 0xDF; dlab &= 0xDF;
WriteCH438Data(REG_IER_ADDR, dlab); WriteCH438Data(REG_IER_ADDR, dlab);
/* set LCR register DLAB bit 1 */ /* set LCR register DLAB bit 1 */
dlab = ReadCH438Data(REG_LCR_ADDR); dlab = ReadCH438Data(REG_LCR_ADDR);
dlab |= 0x80; dlab |= 0x80;
WriteCH438Data(REG_LCR_ADDR, dlab); WriteCH438Data(REG_LCR_ADDR, dlab);
div = ( Fpclk >> 4 ) / baud_rate; div = ( Fpclk >> 4 ) / baud_rate;
DLM = div >> 8; DLM = div >> 8;
DLL = div & 0xff; DLL = div & 0xff;
/* set bps */ /* set bps */
WriteCH438Data(REG_DLL_ADDR, DLL); WriteCH438Data(REG_DLL_ADDR, DLL);
WriteCH438Data(REG_DLM_ADDR, DLM); WriteCH438Data(REG_DLM_ADDR, DLM);
/* set FIFO mode, 112 bytes */ /* set FIFO mode, 112 bytes */
WriteCH438Data(REG_FCR_ADDR, BIT_FCR_RECVTG1 | BIT_FCR_RECVTG0 | BIT_FCR_FIFOEN); WriteCH438Data(REG_FCR_ADDR, BIT_FCR_RECVTG1 | BIT_FCR_RECVTG0 | BIT_FCR_FIFOEN);
/* 8 bit word size, 1 bit stop bit, no crc */ /* 8 bit word size, 1 bit stop bit, no crc */
WriteCH438Data(REG_LCR_ADDR, BIT_LCR_WORDSZ1 | BIT_LCR_WORDSZ0); WriteCH438Data(REG_LCR_ADDR, BIT_LCR_WORDSZ1 | BIT_LCR_WORDSZ0);
/* enable interrupt */ /* enable interrupt */
WriteCH438Data(REG_IER_ADDR, BIT_IER_IERECV); WriteCH438Data(REG_IER_ADDR, BIT_IER_IERECV);
/* allow interrupt output, DTR and RTS is 1 */ /* allow interrupt output, DTR and RTS is 1 */
WriteCH438Data(REG_MCR_ADDR, BIT_MCR_OUT2); WriteCH438Data(REG_MCR_ADDR, BIT_MCR_OUT2);
/* release the data in FIFO */ /* release the data in FIFO */
WriteCH438Data(REG_FCR_ADDR, ReadCH438Data(REG_FCR_ADDR)| BIT_FCR_TFIFORST); WriteCH438Data(REG_FCR_ADDR, ReadCH438Data(REG_FCR_ADDR)| BIT_FCR_TFIFORST);
} }
/**************************************************************************** /****************************************************************************
@ -443,41 +443,41 @@ static void CH438PortInit(uint8_t ext_uart_no, uint32_t baud_rate)
****************************************************************************/ ****************************************************************************/
static int ImxrtCh438WriteData(uint8_t ext_uart_no, char *write_buffer, size_t size) static int ImxrtCh438WriteData(uint8_t ext_uart_no, char *write_buffer, size_t size)
{ {
int write_len, write_len_continue; int write_len, write_len_continue;
int i, write_index; int i, write_index;
DEBUGASSERT(write_buffer != NULL); DEBUGASSERT(write_buffer != NULL);
write_len = size;; write_len = size;;
write_len_continue = size; write_len_continue = size;
if (write_len > CH438_BUFFSIZE) if (write_len > CH438_BUFFSIZE)
{ {
if (0 == write_len % CH438_BUFFSIZE) if (0 == write_len % CH438_BUFFSIZE)
{ {
write_index = write_len / CH438_BUFFSIZE; write_index = write_len / CH438_BUFFSIZE;
for (i = 0; i < write_index; i ++) for (i = 0; i < write_index; i ++)
{ {
Ch438UartSend(ext_uart_no, write_buffer + i * CH438_BUFFSIZE, CH438_BUFFSIZE); Ch438UartSend(ext_uart_no, write_buffer + i * CH438_BUFFSIZE, CH438_BUFFSIZE);
} }
} }
else else
{ {
write_index = 0; write_index = 0;
while (write_len_continue > CH438_BUFFSIZE) while (write_len_continue > CH438_BUFFSIZE)
{ {
Ch438UartSend(ext_uart_no, write_buffer + write_index * CH438_BUFFSIZE, CH438_BUFFSIZE); Ch438UartSend(ext_uart_no, write_buffer + write_index * CH438_BUFFSIZE, CH438_BUFFSIZE);
write_index++; write_index++;
write_len_continue = write_len - write_index * CH438_BUFFSIZE; write_len_continue = write_len - write_index * CH438_BUFFSIZE;
} }
Ch438UartSend(ext_uart_no, write_buffer + write_index * CH438_BUFFSIZE, write_len_continue); Ch438UartSend(ext_uart_no, write_buffer + write_index * CH438_BUFFSIZE, write_len_continue);
} }
} }
else else
{ {
Ch438UartSend(ext_uart_no, write_buffer, write_len); Ch438UartSend(ext_uart_no, write_buffer, write_len);
} }
return 0; return 0;
} }
/**************************************************************************** /****************************************************************************
@ -489,51 +489,51 @@ static int ImxrtCh438WriteData(uint8_t ext_uart_no, char *write_buffer, size_t s
****************************************************************************/ ****************************************************************************/
static size_t ImxrtCh438ReadData(uint8_t ext_uart_no) static size_t ImxrtCh438ReadData(uint8_t ext_uart_no)
{ {
size_t RevLen = 0; size_t RevLen = 0;
uint8_t InterruptStatus; uint8_t InterruptStatus;
uint8_t REG_IIR_ADDR; uint8_t REG_IIR_ADDR;
uint8_t REG_LSR_ADDR; uint8_t REG_LSR_ADDR;
uint8_t REG_MSR_ADDR; uint8_t REG_MSR_ADDR;
pthread_mutex_lock(&mutex[ext_uart_no]); pthread_mutex_lock(&mutex[ext_uart_no]);
while(done[ext_uart_no] == false) while(done[ext_uart_no] == false)
pthread_cond_wait(&cond[ext_uart_no], &mutex[ext_uart_no]); pthread_cond_wait(&cond[ext_uart_no], &mutex[ext_uart_no]);
if (done[ext_uart_no] == true) if (done[ext_uart_no] == true)
{ {
REG_IIR_ADDR = offsetadd[ext_uart_no] | REG_IIR0_ADDR; REG_IIR_ADDR = offsetadd[ext_uart_no] | REG_IIR0_ADDR;
REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR; REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR;
REG_MSR_ADDR = offsetadd[ext_uart_no] | REG_MSR0_ADDR; REG_MSR_ADDR = offsetadd[ext_uart_no] | REG_MSR0_ADDR;
InterruptStatus = ReadCH438Data(REG_IIR_ADDR) & 0x0f; /* 读串口的中断状态 */ InterruptStatus = ReadCH438Data(REG_IIR_ADDR) & 0x0f; /* 读串口的中断状态 */
ch438info("InterruptStatus is %d\n", InterruptStatus); ch438info("InterruptStatus is %d\n", InterruptStatus);
switch(InterruptStatus) switch(InterruptStatus)
{ {
case INT_NOINT: /* 没有中断 */ case INT_NOINT: /* 没有中断 */
break; break;
case INT_THR_EMPTY: /* THR空中断 */ case INT_THR_EMPTY: /* THR空中断 */
break; break;
case INT_RCV_OVERTIME: /* 接收超时中断，收到数据后一般是触发这个 。在收到一帧数据后4个数据时间没有后续的数据时触发*/ case INT_RCV_OVERTIME: /* 接收超时中断，收到数据后一般是触发这个 。在收到一帧数据后4个数据时间没有后续的数据时触发*/
case INT_RCV_SUCCESS: /* 接收数据可用中断。这是一个数据帧超过缓存了才发生，否则一般是前面的超时中断。处理过程同上面的超时中断 */ case INT_RCV_SUCCESS: /* 接收数据可用中断。这是一个数据帧超过缓存了才发生，否则一般是前面的超时中断。处理过程同上面的超时中断 */
RevLen = CH438UARTRcv(ext_uart_no, buff[ext_uart_no]); RevLen = CH438UARTRcv(ext_uart_no, buff[ext_uart_no]);
buff_ptr[ext_uart_no] = 0; buff_ptr[ext_uart_no] = 0;
break; break;
case INT_RCV_LINES: /* 接收线路状态中断 */ case INT_RCV_LINES: /* 接收线路状态中断 */
ReadCH438Data(REG_LSR_ADDR); ReadCH438Data(REG_LSR_ADDR);
break; break;
case INT_MODEM_CHANGE: /* MODEM输入变化中断 */ case INT_MODEM_CHANGE: /* MODEM输入变化中断 */
ReadCH438Data(REG_MSR_ADDR); ReadCH438Data(REG_MSR_ADDR);
break; break;
default: default:
break; break;
} }
done[ext_uart_no] = false; done[ext_uart_no] = false;
} }
pthread_mutex_unlock(&mutex[ext_uart_no]); pthread_mutex_unlock(&mutex[ext_uart_no]);
return RevLen; return RevLen;
} }
/**************************************************************************** /****************************************************************************
@ -546,44 +546,45 @@ static size_t ImxrtCh438ReadData(uint8_t ext_uart_no)
static void Ch438InitDefault(void) static void Ch438InitDefault(void)
{ {
int ret, i; int ret = 0;
int i;
/* Initialize the mutex */ /* Initialize the mutex */
for(i = 0; i < CH438PORTNUM; i++) for(i = 0; i < CH438PORTNUM; i++)
{ {
ret = pthread_mutex_init(&mutex[i], NULL); ret = pthread_mutex_init(&mutex[i], NULL);
if (ret != 0) if (ret != 0)
{ {
ch438err("pthread_mutex_init failed, status=%d\n", ret); ch438err("pthread_mutex_init failed, status=%d\n", ret);
} }
} }
/* Initialize the condition variable */ /* Initialize the condition variable */
for(i = 0; i < CH438PORTNUM; i++) for(i = 0; i < CH438PORTNUM; i++)
{ {
ret = pthread_cond_init(&cond[i], NULL); ret = pthread_cond_init(&cond[i], NULL);
if (ret != 0) if (ret != 0)
{ {
ch438err("pthread_cond_init failed, status=%d\n", ret); ch438err("pthread_cond_init failed, status=%d\n", ret);
} }
} }
ret = task_create("ch438_task", 60, 8192, getInterruptStatus, NULL); ret = task_create("ch438_task", 60, 8192, getInterruptStatus, NULL);
if (ret < 0) if (ret < 0)
{ {
ch438err("task create failed, status=%d\n", ret); ch438err("task create failed, status=%d\n", ret);
} }
ImxrtCH438Init(); ImxrtCH438Init();
CH438PortInit(0,115200); CH438PortInit(0,115200);
CH438PortInit(1,115200); CH438PortInit(1,115200);
CH438PortInit(2,9600); CH438PortInit(2,9600);
CH438PortInit(3,9600); CH438PortInit(3,9600);
CH438PortInit(4,115200); CH438PortInit(4,115200);
CH438PortInit(5,115200); CH438PortInit(5,115200);
CH438PortInit(6,115200); CH438PortInit(6,115200);
CH438PortInit(7,115200); CH438PortInit(7,115200);
} }
/**************************************************************************** /****************************************************************************
@ -591,18 +592,18 @@ static void Ch438InitDefault(void)
****************************************************************************/ ****************************************************************************/
static int ch438_open(FAR struct file *filep) static int ch438_open(FAR struct file *filep)
{ {
FAR struct inode *inode = filep->f_inode; FAR struct inode *inode = filep->f_inode;
FAR struct ch438_dev_s *priv = inode->i_private; FAR struct ch438_dev_s *priv = inode->i_private;
uint8_t port = priv->port; uint8_t port = priv->port;
DEBUGASSERT(port >= 0 && port < CH438PORTNUM); DEBUGASSERT(port >= 0 && port < CH438PORTNUM);
if (g_ch438open[port]) if (g_ch438open[port])
{ {
return -EBUSY; return -EBUSY;
} }
g_ch438open[port] = true; g_ch438open[port] = true;
return OK; return OK;
} }
/**************************************************************************** /****************************************************************************
@ -610,13 +611,13 @@ static int ch438_open(FAR struct file *filep)
****************************************************************************/ ****************************************************************************/
static int ch438_close(FAR struct file *filep) static int ch438_close(FAR struct file *filep)
{ {
FAR struct inode *inode = filep->f_inode; FAR struct inode *inode = filep->f_inode;
FAR struct ch438_dev_s *priv = inode->i_private; FAR struct ch438_dev_s *priv = inode->i_private;
uint8_t port = priv->port; uint8_t port = priv->port;
DEBUGASSERT(port >= 0 && port < CH438PORTNUM); DEBUGASSERT(port >= 0 && port < CH438PORTNUM);
g_ch438open[port] = false; g_ch438open[port] = false;
return OK; return OK;
} }
/**************************************************************************** /****************************************************************************
@ -624,21 +625,21 @@ static int ch438_close(FAR struct file *filep)
****************************************************************************/ ****************************************************************************/
static ssize_t ch438_read(FAR struct file *filep, FAR char *buffer, size_t buflen) static ssize_t ch438_read(FAR struct file *filep, FAR char *buffer, size_t buflen)
{ {
size_t length = 0; size_t length = 0;
FAR struct inode *inode = filep->f_inode; FAR struct inode *inode = filep->f_inode;
FAR struct ch438_dev_s *priv = inode->i_private; FAR struct ch438_dev_s *priv = inode->i_private;
uint8_t port = priv->port; uint8_t port = priv->port;
DEBUGASSERT(port >= 0 && port < CH438PORTNUM); DEBUGASSERT(port >= 0 && port < CH438PORTNUM);
length = ImxrtCh438ReadData(port); length = ImxrtCh438ReadData(port);
memcpy(buffer, buff[port], length); memcpy(buffer, buff[port], length);
if (length > buflen) if (length > buflen)
{ {
length = buflen; length = buflen;
} }
return length; return length;
} }
/**************************************************************************** /****************************************************************************
@ -646,14 +647,14 @@ static ssize_t ch438_read(FAR struct file *filep, FAR char *buffer, size_t bufle
****************************************************************************/ ****************************************************************************/
static ssize_t ch438_write(FAR struct file *filep, FAR const char *buffer, size_t buflen) static ssize_t ch438_write(FAR struct file *filep, FAR const char *buffer, size_t buflen)
{ {
FAR struct inode *inode = filep->f_inode; FAR struct inode *inode = filep->f_inode;
FAR struct ch438_dev_s *priv = inode->i_private; FAR struct ch438_dev_s *priv = inode->i_private;
uint8_t port = priv->port; uint8_t port = priv->port;
DEBUGASSERT(port >= 0 && port < CH438PORTNUM); DEBUGASSERT(port >= 0 && port < CH438PORTNUM);
ImxrtCh438WriteData(port, buffer, buflen); ImxrtCh438WriteData(port, buffer, buflen);
return buflen; return buflen;
} }
@ -666,30 +667,30 @@ static ssize_t ch438_write(FAR struct file *filep, FAR const char *buffer, size_
****************************************************************************/ ****************************************************************************/
static int ch438_register(FAR const char *devpath, uint8_t port) static int ch438_register(FAR const char *devpath, uint8_t port)
{ {
FAR struct ch438_dev_s *priv; FAR struct ch438_dev_s *priv;
int ret = 0; int ret = 0;
/* port number check */ /* port number check */
DEBUGASSERT(port >= 0 && port < CH438PORTNUM); DEBUGASSERT(port >= 0 && port < CH438PORTNUM);
priv = (FAR struct ch438_dev_s *)kmm_malloc(sizeof(struct ch438_dev_s)); priv = (FAR struct ch438_dev_s *)kmm_malloc(sizeof(struct ch438_dev_s));
if (priv == NULL) if (priv == NULL)
{ {
ch438err("ERROR: Failed to allocate instance\n"); ch438err("ERROR: Failed to allocate instance\n");
return -ENOMEM; return -ENOMEM;
} }
priv->port = port; priv->port = port;
/* Register the character driver */ /* Register the character driver */
ret = register_driver(devpath, &g_ch438fops, 0666, priv); ret = register_driver(devpath, &g_ch438fops, 0666, priv);
if (ret < 0) if (ret < 0)
{ {
ch438err("ERROR: Failed to register driver: %d\n", ret); ch438err("ERROR: Failed to register driver: %d\n", ret);
kmm_free(priv); kmm_free(priv);
} }
return ret; return ret;
} }
/**************************************************************************** /****************************************************************************
@ -699,84 +700,39 @@ static int ch438_register(FAR const char *devpath, uint8_t port)
* ch438 initialize * ch438 initialize
* *
****************************************************************************/ ****************************************************************************/
int board_ch438_initialize(void) void board_ch438_initialize(void)
{ {
int ret = 0; Ch438InitDefault();
Ch438InitDefault();
#ifdef CONFIG_CH438_EXTUART0 #ifdef CONFIG_CH438_EXTUART0
ret = ch438_register("/dev/extuart_dev0", 0); ch438_register("/dev/extuart_dev0", 0);
if (ret < 0)
{
ch438err("Failed to register /dev/extuart_dev0: %d\n", ret);
goto __exit;
}
#endif #endif
#ifdef CONFIG_CH438_EXTUART1 #ifdef CONFIG_CH438_EXTUART1
ret = ch438_register("/dev/extuart_dev1", 1); ch438_register("/dev/extuart_dev1", 1);
if (ret < 0)
{
ch438err("Failed to register /dev/extuart_dev1: %d\n", ret);
goto __exit;
}
#endif #endif
#ifdef CONFIG_CH438_EXTUART2 #ifdef CONFIG_CH438_EXTUART2
ret = ch438_register("/dev/extuart_dev2", 2); ch438_register("/dev/extuart_dev2", 2);
if (ret < 0)
{
ch438err("Failed to register /dev/extuart_dev2: %d\n", ret);
goto __exit;
}
#endif #endif
#ifdef CONFIG_CH438_EXTUART3 #ifdef CONFIG_CH438_EXTUART3
ret = ch438_register("/dev/extuart_dev3", 3); ch438_register("/dev/extuart_dev3", 3);
if (ret < 0)
{
ch438err("Failed to register /dev/extuart_dev3: %d\n", ret);
goto __exit;
}
#endif #endif
#ifdef CONFIG_CH438_EXTUART4 #ifdef CONFIG_CH438_EXTUART4
ret = ch438_register("/dev/extuart_dev4", 4); ch438_register("/dev/extuart_dev4", 4);
if (ret < 0)
{
ch438err("Failed to register /dev/extuart_dev4: %d\n", ret);
goto __exit;
}
#endif #endif
#ifdef CONFIG_CH438_EXTUART5 #ifdef CONFIG_CH438_EXTUART5
ret = ch438_register("/dev/extuart_dev5", 5); ch438_register("/dev/extuart_dev5", 5);
if (ret < 0)
{
ch438err("Failed to register /dev/extuart_dev5: %d\n", ret);
goto __exit;
}
#endif #endif
#ifdef CONFIG_CH438_EXTUART6 #ifdef CONFIG_CH438_EXTUART6
ret = ch438_register("/dev/extuart_dev6", 6); ch438_register("/dev/extuart_dev6", 6);
if (ret < 0)
{
ch438err("Failed to register /dev/extuart_dev6: %d\n", ret);
goto __exit;
}
#endif #endif
#ifdef CONFIG_CH438_EXTUART7 #ifdef CONFIG_CH438_EXTUART7
ret = ch438_register("/dev/extuart_dev7", 7); ch438_register("/dev/extuart_dev7", 7);
if (ret < 0)
{
ch438err("Failed to register /dev/extuart_dev7: %d\n", ret);
goto __exit;
}
#endif #endif
__exit:
return ret;
} }

2
Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h
View File

@ -356,7 +356,7 @@
* Public Function Prototypes * Public Function Prototypes
****************************************************************************/ ****************************************************************************/
#ifdef CONFIG_BSP_USING_CH438 #ifdef CONFIG_BSP_USING_CH438
int board_ch438_initialize(void); void board_ch438_initialize(void);
#endif #endif
#endif /* __BOARDS_ARM_IMXRT_XIDATONG_SRC_IMXRT_CH438_H */ #endif /* __BOARDS_ARM_IMXRT_XIDATONG_SRC_IMXRT_CH438_H */