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fix heap memory error : start from _bss_end and conflict with stack segment

This commit is contained in:
Liu_Weichao 2022-10-19 14:27:44 +08:00
parent 9802c89fd6
commit e26c93a666
4 changed files with 7 additions and 29 deletions
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22
Ubiquitous/XiZi_IIoT/arch/arm/cortex-m4/hc32f4a0/boot.S
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@ -48,7 +48,7 @@ Modification:
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
;</h>
*/
.equ Stack_Size, 0x00002000
.equ Stack_Size, 0x00004000
.section .stack
.align 3
@ -60,26 +60,6 @@ __StackLimit:
__StackTop:
.size __StackTop, . - __StackTop
/*
;<h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
;</h>
*/
.equ Heap_Size, 0x00002000
.if Heap_Size != 0 /* Heap is provided */
.section .heap
.align 3
.globl __HeapBase
.globl __HeapLimit
__HeapBase:
.space Heap_Size
.size __HeapBase, . - __HeapBase
__HeapLimit:
.size __HeapLimit, . - __HeapLimit
.endif
/*
;<h> Reset handler start.
*/

4
Ubiquitous/XiZi_IIoT/board/hc32f4a0/.defconfig
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@ -75,7 +75,7 @@ CONFIG_KERNEL_SEMAPHORE=y
CONFIG_KERNEL_MUTEX=y
CONFIG_KERNEL_EVENT=y
CONFIG_KERNEL_MESSAGEQUEUE=y
CONFIG_KERNEL_SOFTTIMER=n
CONFIG_KERNEL_SOFTTIMER=y
CONFIG_SCHED_POLICY_RR_REMAINSLICE=y
# CONFIG_SCHED_POLICY_RR is not set
# CONFIG_SCHED_POLICY_FIFO is not set
@ -134,7 +134,7 @@ CONFIG_SHELL_HELP_LIST_VAR=y
# Kernel data structure Manage
#
CONFIG_KERNEL_QUEUEMANAGE=y
CONFIG_KERNEL_WORKQUEUE=n
CONFIG_KERNEL_WORKQUEUE=y
CONFIG_WORKQUEUE_KTASK_STACKSIZE=2048
CONFIG_WORKQUEUE_KTASK_PRIORITY=23
CONFIG_QUEUE_MAX=16

4
Ubiquitous/XiZi_IIoT/board/hc32f4a0/board.h
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@ -35,11 +35,11 @@ Modification:
#include <stdint.h>
extern int __bss_end;
extern int __heap_start;
extern unsigned int g_service_table_start;
extern unsigned int g_service_table_end;
#define MEMORY_START_ADDRESS (&__bss_end)
#define MEMORY_START_ADDRESS (&__heap_start)
#define HC32F4_SRAM_SIZE 512
#define MEMORY_END_ADDRESS (0x1FFE0000 + HC32F4_SRAM_SIZE * 1024)

6
Ubiquitous/XiZi_IIoT/board/hc32f4a0/link.lds
View File

@ -216,20 +216,18 @@ SECTIONS
__end__ = .;
PROVIDE(end = .);
PROVIDE(_end = .);
*(.heap*)
. = ALIGN(8);
__HeapLimit = .;
__StackLimit = .;
*(.stack*)
. = ALIGN(8);
__StackTop = .;
__heap_start = .;
} >RAM
.ARM.attributes 0 : { *(.ARM.attributes) }
PROVIDE(_stack = __StackTop);
PROVIDE(_Min_Heap_Size = __HeapLimit - __HeapBase);
PROVIDE(_Min_Stack_Size = __StackTop - __StackLimit);
__RamEnd = ORIGIN(RAM) + LENGTH(RAM);