forked from xuos/xiuos
modify XiUOS DIR : (1.add plc_demo in APP_Framework/control_app; 2.add industrial_network、industrial_fieldbus and industrial_wlan; 3.add XiZi_AIoT and modify XiZi as XiZi_IIoT.)
This commit is contained in:
@@ -0,0 +1,13 @@
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if BSP_USING_WDT
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config WDT_BUS_NAME
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string "watchdog bus name"
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default "wdt"
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config WDT_DRIVER_NAME
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string "watchdog driver name"
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default "wdt_drv"
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config WDT_DEVICE_NAME
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string "watchdog device name"
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default "wdt_dev"
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endif
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@@ -0,0 +1,3 @@
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SRC_FILES := connect_wdt.c fsl_wdog.c
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include $(KERNEL_ROOT)/compiler.mk
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@@ -0,0 +1,182 @@
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/*
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* Copyright (c) 2020 AIIT XUOS Lab
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* XiUOS is licensed under Mulan PSL v2.
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* You can use this software according to the terms and conditions of the Mulan PSL v2.
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* You may obtain a copy of Mulan PSL v2 at:
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* http://license.coscl.org.cn/MulanPSL2
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* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
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* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
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* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
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* See the Mulan PSL v2 for more details.
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*/
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/**
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* @file connect_wdt.c
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* @brief support imxrt1052-board watchdog(WDG1) function and register to bus framework
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* @version 2.0
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* @author AIIT XUOS Lab
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* @date 2022-05-06
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*/
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#include <connect_wdt.h>
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#include <fsl_wdog.h>
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static BusType wdt;
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static wdog_config_t wdog_config_t_param;
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void WDOG1_IRQHandler(void)
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{
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WDOG_ClearInterruptStatus(WDOG1, kWDOG_InterruptFlag);
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/* User code. User can do urgent case before timeout reset.
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* IE. user can backup the ram data or ram log to flash.
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* the period is set by config.interruptTimeValue, user need to
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* check the period between interrupt and timeout.
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*/
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}
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static uint32 Imxrt1052WdgOpen(void *dev)
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{
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return EOK;
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}
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static uint32 Imxrt1052WdgClose(void *dev)
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{
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WDOG_Deinit(WDOG1);
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return EOK;
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}
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static int Imxrt1052WdgInit(struct WdtHardwareDevice *dev, uint16_t timeout)
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{
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/*
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* wdogConfig->enableWdog = true;
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* wdogConfig->workMode.enableWait = true;
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* wdogConfig->workMode.enableStop = false;
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* wdogConfig->workMode.enableDebug = false;
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* wdogConfig->enableInterrupt = false;
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* wdogConfig->enablePowerdown = false;
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* wdogConfig->resetExtension = flase;
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* wdogConfig->timeoutValue = 0xFFU;
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* wdogConfig->interruptTimeValue = 0x04u;
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*/
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WDOG_GetDefaultConfig(&wdog_config_t_param);
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wdog_config_t_param.timeoutValue = timeout; /* Timeout value is 1 sec / 6.4 num, 5s means 32. */
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WDOG_Init(WDOG1, &wdog_config_t_param);
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return EOK;
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}
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static uint32 Imxrt1052WdgConfigure(void *drv, struct BusConfigureInfo *args)
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{
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struct WdtDriver *wdt_drv = (struct WdtDriver *)drv;
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struct WdtHardwareDevice *wdt_dev = (struct WdtHardwareDevice *)wdt_drv->driver.owner_bus->owner_haldev;
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uint16_t timeout;
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switch(args->configure_cmd)
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{
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case OPER_WDT_SET_TIMEOUT:
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timeout = *(uint16_t *)(args->private_data);
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if (timeout) {
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Imxrt1052WdgInit(wdt_dev, timeout);
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}
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break;
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case OPER_WDT_KEEPALIVE:
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WDOG_Refresh(WDOG1);
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break;
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default:
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return ERROR;
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}
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return EOK;
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}
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static const struct WdtDevDone dev_done =
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{
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Imxrt1052WdgOpen,
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Imxrt1052WdgClose,
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NONE,
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NONE,
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};
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/**
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* @description: Feed watchdog task function
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*/
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static void FeedWatchdogTask(void)
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{
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while (1)
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{
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/* keep watchdog alive in idle task */
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struct BusConfigureInfo cfg;
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cfg.configure_cmd = OPER_WDT_KEEPALIVE;
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cfg.private_data = NONE;
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BusDrvConfigure(wdt->owner_driver, &cfg);
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MdelayKTask(500);
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}
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}
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/**
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* @description: Watchdog function
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* @return success: EOK, failure: other
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*/
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int StartWatchdog(void)
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{
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int ret = EOK;
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uint16_t timeout = 32; /* timeout time 5s*/
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wdt = BusFind(WDT_BUS_NAME);
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wdt->owner_driver = BusFindDriver(wdt, WDT_DRIVER_NAME);
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/* set watchdog timeout time */
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struct BusConfigureInfo cfg;
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cfg.configure_cmd = OPER_WDT_SET_TIMEOUT;
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cfg.private_data = &timeout;
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ret = BusDrvConfigure(wdt->owner_driver, &cfg);
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int32 WdtTask = KTaskCreate("WdtTask", (void *)FeedWatchdogTask, NONE, 1024, 20);
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StartupKTask(WdtTask);
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return EOK;
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}
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int Imxrt1052HwWdgInit(void)
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{
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x_err_t ret = EOK;
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static struct WdtBus watch_dog_timer_bus;
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static struct WdtDriver watch_dog_timer_drv;
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static struct WdtHardwareDevice watch_dog_timer_dev;
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ret = WdtBusInit(&watch_dog_timer_bus, WDT_BUS_NAME);
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if (ret != EOK) {
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KPrintf("Watchdog bus init error %d\n", ret);
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return ERROR;
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}
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watch_dog_timer_drv.configure = Imxrt1052WdgConfigure;
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ret = WdtDriverInit(&watch_dog_timer_drv, WDT_DRIVER_NAME);
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if (ret != EOK) {
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KPrintf("Watchdog driver init error %d\n", ret);
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return ERROR;
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}
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ret = WdtDriverAttachToBus(WDT_DRIVER_NAME, WDT_BUS_NAME);
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if (ret != EOK) {
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KPrintf("Watchdog driver attach error %d\n", ret);
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return ERROR;
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}
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watch_dog_timer_dev.dev_done = &dev_done;
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ret = WdtDeviceRegister(&watch_dog_timer_dev, WDT_DEVICE_NAME);
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if (ret != EOK) {
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KPrintf("Watchdog device register error %d\n", ret);
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return ERROR;
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}
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ret = WdtDeviceAttachToBus(WDT_DEVICE_NAME, WDT_BUS_NAME);
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if (ret != EOK) {
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KPrintf("Watchdog device register error %d\n", ret);
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return ERROR;
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}
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return ret;
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}
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@@ -0,0 +1,206 @@
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/*
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* Copyright (c) 2016, Freescale Semiconductor, Inc.
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* Copyright 2016-2018 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "fsl_wdog.h"
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/* Component ID definition, used by tools. */
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#ifndef FSL_COMPONENT_ID
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#define FSL_COMPONENT_ID "platform.drivers.wdog01"
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#endif
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/*******************************************************************************
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* Variables
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******************************************************************************/
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static WDOG_Type *const s_wdogBases[] = WDOG_BASE_PTRS;
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#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
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/* Array of WDOG clock name. */
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static const clock_ip_name_t s_wdogClock[] = WDOG_CLOCKS;
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#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
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static const IRQn_Type s_wdogIRQ[] = WDOG_IRQS;
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/*******************************************************************************
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* Code
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******************************************************************************/
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static uint32_t WDOG_GetInstance(WDOG_Type *base)
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{
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uint32_t instance;
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/* Find the instance index from base address mappings. */
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for (instance = 0; instance < ARRAY_SIZE(s_wdogBases); instance++)
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{
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if (s_wdogBases[instance] == base)
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{
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break;
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}
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}
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assert(instance < ARRAY_SIZE(s_wdogBases));
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return instance;
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}
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/*!
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* brief Initializes the WDOG configuration structure.
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*
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* This function initializes the WDOG configuration structure to default values. The default
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* values are as follows.
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* code
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* wdogConfig->enableWdog = true;
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* wdogConfig->workMode.enableWait = true;
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* wdogConfig->workMode.enableStop = false;
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* wdogConfig->workMode.enableDebug = false;
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* wdogConfig->enableInterrupt = false;
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* wdogConfig->enablePowerdown = false;
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* wdogConfig->resetExtension = flase;
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* wdogConfig->timeoutValue = 0xFFU;
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* wdogConfig->interruptTimeValue = 0x04u;
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* endcode
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*
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* param config Pointer to the WDOG configuration structure.
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* see wdog_config_t
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*/
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void WDOG_GetDefaultConfig(wdog_config_t *config)
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{
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assert(config);
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/* Initializes the configure structure to zero. */
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memset(config, 0, sizeof(*config));
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config->enableWdog = true;
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config->workMode.enableWait = false;
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config->workMode.enableStop = false;
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config->workMode.enableDebug = false;
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config->enableInterrupt = false;
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config->softwareResetExtension = false;
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config->enablePowerDown = false;
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config->timeoutValue = 0xffu;
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config->interruptTimeValue = 0x04u;
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config->enableTimeOutAssert = false;
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}
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/*!
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* brief Initializes the WDOG.
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*
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* This function initializes the WDOG. When called, the WDOG runs according to the configuration.
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*
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* This is an example.
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* code
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* wdog_config_t config;
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* WDOG_GetDefaultConfig(&config);
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* config.timeoutValue = 0xffU;
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* config->interruptTimeValue = 0x04u;
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* WDOG_Init(wdog_base,&config);
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* endcode
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*
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* param base WDOG peripheral base address
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* param config The configuration of WDOG
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*/
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void WDOG_Init(WDOG_Type *base, const wdog_config_t *config)
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{
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assert(config);
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uint16_t value = 0u;
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value = WDOG_WCR_WDE(config->enableWdog) | WDOG_WCR_WDW(config->workMode.enableWait) |
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WDOG_WCR_WDZST(config->workMode.enableStop) | WDOG_WCR_WDBG(config->workMode.enableDebug) |
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WDOG_WCR_SRE(config->softwareResetExtension) | WDOG_WCR_WT(config->timeoutValue) |
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WDOG_WCR_WDT(config->enableTimeOutAssert) | WDOG_WCR_SRS_MASK | WDOG_WCR_WDA_MASK;
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#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
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/* Set configuration */
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CLOCK_EnableClock(s_wdogClock[WDOG_GetInstance(base)]);
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#endif
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base->WICR = WDOG_WICR_WICT(config->interruptTimeValue) | WDOG_WICR_WIE(config->enableInterrupt);
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base->WMCR = WDOG_WMCR_PDE(config->enablePowerDown);
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base->WCR = value;
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if (config->enableInterrupt)
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{
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EnableIRQ(s_wdogIRQ[WDOG_GetInstance(base)]);
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}
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}
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/*!
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* brief Shuts down the WDOG.
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*
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* This function shuts down the WDOG.
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* Watchdog Enable bit is a write one once only bit. It is not
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* possible to clear this bit by a software write, once the bit is set.
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* This bit(WDE) can be set/reset only in debug mode(exception).
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*/
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void WDOG_Deinit(WDOG_Type *base)
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{
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if (base->WCR & WDOG_WCR_WDBG_MASK)
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{
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WDOG_Disable(base);
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}
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}
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/*!
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* brief Gets the WDOG all reset status flags.
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*
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* This function gets all reset status flags.
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*
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* code
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* uint16_t status;
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* status = WDOG_GetStatusFlags (wdog_base);
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* endcode
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* param base WDOG peripheral base address
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* return State of the status flag: asserted (true) or not-asserted (false).see _wdog_status_flags
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* - true: a related status flag has been set.
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* - false: a related status flag is not set.
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*/
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uint16_t WDOG_GetStatusFlags(WDOG_Type *base)
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{
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uint16_t status_flag = 0U;
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status_flag |= (base->WCR & WDOG_WCR_WDE_MASK);
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status_flag |= (base->WRSR & WDOG_WRSR_POR_MASK);
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status_flag |= (base->WRSR & WDOG_WRSR_TOUT_MASK);
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status_flag |= (base->WRSR & WDOG_WRSR_SFTW_MASK);
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status_flag |= (base->WICR & WDOG_WICR_WTIS_MASK);
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return status_flag;
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}
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/*!
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* brief Clears the WDOG flag.
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*
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* This function clears the WDOG status flag.
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*
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* This is an example for clearing the interrupt flag.
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* code
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* WDOG_ClearStatusFlags(wdog_base,KWDOG_InterruptFlag);
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* endcode
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* param base WDOG peripheral base address
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* param mask The status flags to clear.
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* The parameter could be any combination of the following values.
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* kWDOG_TimeoutFlag
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*/
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void WDOG_ClearInterruptStatus(WDOG_Type *base, uint16_t mask)
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{
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if (mask & kWDOG_InterruptFlag)
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{
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base->WICR |= WDOG_WICR_WTIS_MASK;
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}
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}
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/*!
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* brief Refreshes the WDOG timer.
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*
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* This function feeds the WDOG.
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* This function should be called before the WDOG timer is in timeout. Otherwise, a reset is asserted.
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*
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* param base WDOG peripheral base address
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*/
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void WDOG_Refresh(WDOG_Type *base)
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{
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base->WSR = WDOG_REFRESH_KEY & 0xFFFFU;
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base->WSR = (WDOG_REFRESH_KEY >> 16U) & 0xFFFFU;
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}
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Reference in New Issue
Block a user