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add rv32m1 zero riscy jump entry

This commit is contained in:
Wang_Weigen 2022-03-02 15:35:46 +08:00
parent 0f8336c9e7
commit ccc9d8e72e
1 changed files with 2 additions and 2 deletions
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4
Ubiquitous/XiUOS/arch/risc-v/rv32m1_vega/startup_RV32M1_zero_riscy.S
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@ -33,7 +33,7 @@ History:
Author: AIIT XUOS Lab
Modification:
*************************************************/
.extern Rv32m1VgeaStart
#define EXCEPTION_STACK_SIZE 0x58
.text
@ -108,7 +108,7 @@ Reset_Handler:
# Enable global interrupt. */
csrsi mstatus, 8
jal main
jal Rv32m1VgeaStart
ebreak
.size Reset_Handler, . - Reset_Handler