forked from xuos/xiuos
Merge branch 'prepare_for_master' of https://gitlink.org.cn/xuos/xiuos into develop
This commit is contained in:
commit
a286b2292f
|
@ -11,16 +11,19 @@ void TestRTC(int argc,char *argv[])
|
|||
}
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||||
|
||||
if(argc>1){
|
||||
|
||||
int times = atoi(argv[1]);
|
||||
printf("Time will be printf %d times\n",times);
|
||||
|
||||
struct RtcDrvConfigureParam rtc_para;
|
||||
time_t my_time=0;
|
||||
|
||||
rtc_para.rtc_operation_cmd = OPER_RTC_SET_TIME;
|
||||
*(rtc_para.time) = 0;
|
||||
rtc_para.time = &my_time;
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||||
|
||||
struct PrivIoctlCfg ioctl_cfg;
|
||||
ioctl_cfg.ioctl_driver_type = RTC_TYPE;
|
||||
ioctl_cfg.args = (void *)&rtc_para;
|
||||
|
||||
PrivIoctl(rtc_fd,0,&ioctl_cfg);
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||||
|
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rtc_para.rtc_operation_cmd = OPER_RTC_GET_TIME;
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||||
|
|
|
@ -1,6 +1,6 @@
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|||
menuconfig USING_KPU_PROCESSING
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bool "kpu model processing"
|
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default y
|
||||
default n
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||||
if USING_KPU_PROCESSING
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||||
source "$APP_DIR/Framework/knowing/kpu/yolov2/Kconfig"
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||||
source "$APP_DIR/Framework/knowing/kpu/yolov2_json/Kconfig"
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|
|
|
@ -1,3 +1,7 @@
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SRC_DIR := k210_yolov2_detect_procedure yolov2 yolov2_json
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SRC_DIR :=
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|
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ifeq ($(CONFIG_USING_KPU_PROCESSING),y)
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SRC_DIR += k210_yolov2_detect_procedure yolov2 yolov2_json
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endif
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include $(KERNEL_ROOT)/compiler.mk
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|
|
|
@ -20,6 +20,7 @@
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#include <xs_base.h>
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#include <xs_isr.h>
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#include <hc32f4xx.h>
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|
||||
x_base __attribute__((naked)) DisableLocalInterrupt()
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||||
{
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||||
|
@ -36,6 +37,9 @@ void __attribute__((naked)) EnableLocalInterrupt(x_base level)
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|||
|
||||
int32 ArchEnableHwIrq(uint32 irq_num)
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||||
{
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||||
NVIC_ClearPendingIRQ(irq_num);
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NVIC_SetPriority(irq_num, 0);
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NVIC_EnableIRQ(irq_num);
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return EOK;
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}
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|
||||
|
|
|
@ -61,22 +61,22 @@ InterruptVectors:
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.long SysTick_Handler /* -1 SysTick Handler */
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|
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/* Interrupts */
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.long IRQ000_Handler
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.long IRQ001_Handler
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.long IRQ002_Handler
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.long IRQ003_Handler
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.long IRQ004_Handler
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||||
.long IRQ005_Handler
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.long IRQ006_Handler
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.long IRQ007_Handler
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.long IRQ008_Handler
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||||
.long IRQ009_Handler
|
||||
.long IRQ010_Handler
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||||
.long IRQ011_Handler
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.long IRQ012_Handler
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||||
.long IRQ013_Handler
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||||
.long IRQ014_Handler
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||||
.long IRQ015_Handler
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||||
.long IsrEntry
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.long IsrEntry
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.long IsrEntry
|
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.long IsrEntry
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.long IsrEntry
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||||
.long IsrEntry
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||||
.long IsrEntry
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||||
.long IsrEntry
|
||||
.long IsrEntry
|
||||
.long IsrEntry
|
||||
.long IsrEntry
|
||||
.long IsrEntry
|
||||
.long IsrEntry
|
||||
.long IsrEntry
|
||||
.long IsrEntry
|
||||
.long IsrEntry
|
||||
.long IRQ016_Handler
|
||||
.long IRQ017_Handler
|
||||
.long IRQ018_Handler
|
||||
|
|
|
@ -38,6 +38,14 @@ Modification:
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|||
#include <connect_gpio.h>
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#endif
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|
||||
#ifdef BSP_USING_ADC
|
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#include <connect_adc.h>
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#endif
|
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|
||||
#ifdef BSP_USING_DAC
|
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#include <connect_dac.h>
|
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#endif
|
||||
|
||||
#ifdef BSP_USING_SDIO
|
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#include <connect_sdio.h>
|
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#endif
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||||
|
@ -54,8 +62,17 @@ Modification:
|
|||
#include <connect_usb.h>
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_RTC
|
||||
#include <connect_rtc.h>
|
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#endif
|
||||
|
||||
#ifdef BSP_USING_WDT
|
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#include <connect_wdt.h>
|
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#endif
|
||||
|
||||
extern void entry(void);
|
||||
extern int HwUsartInit();
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extern int HwWdtInit();
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||||
|
||||
/* Peripheral register WE/WP selection */
|
||||
#define LL_PERIPH_SEL (LL_PERIPH_GPIO | LL_PERIPH_FCG | LL_PERIPH_PWC_CLK_RMU | \
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||||
|
@ -165,8 +182,20 @@ struct InitSequenceDesc _board_init[] =
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#ifdef BSP_USING_I2C
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{ "i2c", HwI2cInit },
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#endif
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#ifdef BSP_USING_ADC
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{"hw adc init", HwAdcInit},
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#endif
|
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#ifdef BSP_USING_DAC
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{"hw dac init", HwDacInit},
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#endif
|
||||
#ifdef BSP_USING_USB
|
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{ "usb", HwUsbHostInit },
|
||||
#endif
|
||||
#ifdef BSP_USING_RTC
|
||||
{ "rtc", HwRtcInit },
|
||||
#endif
|
||||
#ifdef BSP_USING_WDT
|
||||
{ "wdt", HwWdtInit },
|
||||
#endif
|
||||
{ " NONE ", NONE },
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||||
};
|
||||
|
|
|
@ -6,6 +6,23 @@ menuconfig BSP_USING_UART
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|||
source "$BSP_DIR/third_party_driver/usart/Kconfig"
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||||
endif
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||||
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||||
menuconfig BSP_USING_ADC
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bool "Using ADC device"
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||||
default n
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||||
select RESOURCES_ADC
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if BSP_USING_ADC
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source "$BSP_DIR/third_party_driver/adc/Kconfig"
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endif
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|
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menuconfig BSP_USING_DAC
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bool "Using DAC device"
|
||||
default n
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||||
select RESOURCES_DAC
|
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if BSP_USING_DAC
|
||||
source "$BSP_DIR/third_party_driver/dac/Kconfig"
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||||
endif
|
||||
|
||||
|
||||
menuconfig BSP_USING_GPIO
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||||
bool "Using GPIO device "
|
||||
default y
|
||||
|
@ -53,3 +70,19 @@ menuconfig BSP_USING_USB
|
|||
if BSP_USING_USB
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||||
source "$BSP_DIR/third_party_driver/usb/Kconfig"
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_RTC
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||||
bool "Using RTC device"
|
||||
default n
|
||||
select RESOURCES_RTC
|
||||
if BSP_USING_RTC
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||||
source "$BSP_DIR/third_party_driver/rtc/Kconfig"
|
||||
endif
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|
||||
menuconfig BSP_USING_WDT
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bool "Using WDT device"
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||||
default n
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select RESOURCES_WDT
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if BSP_USING_WDT
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||||
source "$BSP_DIR/third_party_driver/watchdog/Kconfig"
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||||
endif
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||||
|
|
|
@ -4,6 +4,14 @@ ifeq ($(CONFIG_BSP_USING_UART),y)
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|||
SRC_DIR += usart
|
||||
endif
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||||
|
||||
ifeq ($(CONFIG_BSP_USING_ADC),y)
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||||
SRC_DIR += adc
|
||||
endif
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||||
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||||
ifeq ($(CONFIG_BSP_USING_DAC),y)
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||||
SRC_DIR += dac
|
||||
endif
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||||
|
||||
ifeq ($(CONFIG_BSP_USING_GPIO),y)
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||||
SRC_DIR += gpio
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||||
endif
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||||
|
@ -28,4 +36,12 @@ ifeq ($(CONFIG_BSP_USING_USB),y)
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|||
SRC_DIR += usb
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||||
endif
|
||||
|
||||
ifeq ($(CONFIG_BSP_USING_RTC),y)
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||||
SRC_DIR += rtc
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_BSP_USING_WDT),y)
|
||||
SRC_DIR += watchdog
|
||||
endif
|
||||
|
||||
include $(KERNEL_ROOT)/compiler.mk
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||||
|
|
|
@ -0,0 +1,74 @@
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|||
menuconfig BSP_USING_ADC1
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bool "Enable ADC1"
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||||
default y
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||||
if BSP_USING_ADC1
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config ADC1_BUS_NAME
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string "adc 1 bus name"
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||||
default "adc1"
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||||
|
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config ADC1_DRIVER_NAME
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string "adc 1 driver name"
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||||
default "adc1_drv"
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|
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config ADC1_DEVICE_NAME
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string "adc 1 bus device name"
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default "adc1_dev"
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config ADC1_GPIO_NUM
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int "adc 1 gpio pin num"
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default "0"
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||||
|
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config ADC1_GPIO_DEF
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string "adc 1 gpio define type"
|
||||
default "A"
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_ADC2
|
||||
bool "Enable ADC2"
|
||||
default y
|
||||
if BSP_USING_ADC2
|
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config ADC2_BUS_NAME
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string "adc 2 bus name"
|
||||
default "adc2"
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||||
|
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config ADC2_DRIVER_NAME
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string "adc 2 driver name"
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||||
default "adc2_drv"
|
||||
|
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config ADC2_DEVICE_NAME
|
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string "adc 2 bus device name"
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default "adc2_dev"
|
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|
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config ADC2_GPIO_NUM
|
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int "adc 2 gpio pin num"
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default "6"
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||||
|
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config ADC2_GPIO_DEF
|
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string "adc 2 gpio define type"
|
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default "A"
|
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endif
|
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|
||||
menuconfig BSP_USING_ADC3
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bool "Enable ADC3"
|
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default y
|
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if BSP_USING_ADC3
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config ADC3_BUS_NAME
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string "adc 3 bus name"
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default "adc3"
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|
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config ADC3_DRIVER_NAME
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string "adc 3 driver name"
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default "adc3_drv"
|
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|
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config ADC3_DEVICE_NAME
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string "adc 3 bus device name"
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default "adc3_dev"
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|
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config ADC3_GPIO_NUM
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int "adc 3 gpio pin num"
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default "0"
|
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|
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config ADC3_GPIO_DEF
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string "adc 3 gpio define type"
|
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default "A"
|
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endif
|
|
@ -0,0 +1,3 @@
|
|||
SRC_FILES := connect_adc.c
|
||||
|
||||
include $(KERNEL_ROOT)/compiler.mk
|
|
@ -0,0 +1,289 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file connect_adc.c
|
||||
* @brief support to register ADC pointer and function
|
||||
* @version 1.1
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2023-02-09
|
||||
*/
|
||||
|
||||
#include <connect_adc.h>
|
||||
|
||||
#define _ADC_CONS(string1, string2) string1##string2
|
||||
#define ADC_CONS(string1, string2) _ADC_CONS(string1, string2)
|
||||
|
||||
#ifdef BSP_USING_ADC1
|
||||
#define ADC1_GPIO ADC_CONS(GPIO_Pin_, ADC1_GPIO_NUM)
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_ADC2
|
||||
#define ADC2_GPIO ADC_CONS(GPIO_Pin_, ADC2_GPIO_NUM)
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_ADC3
|
||||
#define ADC3_GPIO ADC_CONS(GPIO_Pin_, ADC3_GPIO_NUM)
|
||||
#endif
|
||||
|
||||
static int AdcUdelay(uint32 us)
|
||||
{
|
||||
uint32 ticks;
|
||||
uint32 told, tnow, tcnt = 0;
|
||||
uint32 reload = SysTick->LOAD;
|
||||
|
||||
ticks = us * reload / (1000000 / TICK_PER_SECOND);
|
||||
told = SysTick->VAL;
|
||||
while (1) {
|
||||
tnow = SysTick->VAL;
|
||||
if (tnow != told) {
|
||||
if (tnow < told) {
|
||||
tcnt += told - tnow;
|
||||
} else {
|
||||
tcnt += reload - tnow + told;
|
||||
}
|
||||
told = tnow;
|
||||
if (tcnt >= ticks) {
|
||||
return 0;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static uint16 GetAdcAverageValue(CM_ADC_TypeDef *ADCx, uint8 channel, uint8 times)
|
||||
{
|
||||
uint32 temp_val = 0;
|
||||
int i;
|
||||
|
||||
for(i = 0;i < times;i ++) {
|
||||
temp_val += ADC_GetValue(ADCx, channel) & 0x0FFF;
|
||||
KPrintf("GetAdcAverageValue val %u\n", ADC_GetValue(ADCx, channel));
|
||||
AdcUdelay(5000);
|
||||
}
|
||||
return temp_val / times;
|
||||
}
|
||||
|
||||
|
||||
static uint32 AdcOpen(void *dev)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
stc_adc_init_t stcAdcInit;
|
||||
ADC_StructInit(&stcAdcInit);
|
||||
struct AdcHardwareDevice* adc_dev = (struct AdcHardwareDevice*)dev;
|
||||
CM_ADC_TypeDef *ADCx= (CM_ADC_TypeDef *)adc_dev->private_data;
|
||||
ADC_Init((ADCx),&stcAdcInit);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
static uint32 AdcClose(void *dev)
|
||||
{
|
||||
// CM_ADC_TypeDef *adc_dev = (CM_ADC_TypeDef*)dev;
|
||||
struct AdcHardwareDevice* adc_dev = (struct AdcHardwareDevice*)dev;
|
||||
|
||||
CM_ADC_TypeDef *ADCx= (CM_ADC_TypeDef *)adc_dev->private_data;
|
||||
|
||||
ADC_DeInit(ADCx);
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
static uint32 AdcRead(void *dev, struct BusBlockReadParam *read_param)
|
||||
{
|
||||
struct AdcHardwareDevice *adc_dev = (struct AdcHardwareDevice *)dev;
|
||||
|
||||
struct HwAdc *adc_cfg = (struct HwAdc *)adc_dev->haldev.private_data;
|
||||
|
||||
uint16 adc_average_value = 0;
|
||||
uint8 times = 20;
|
||||
|
||||
adc_average_value = GetAdcAverageValue(adc_cfg->ADCx, adc_cfg->adc_channel, times);
|
||||
|
||||
*(uint16 *)read_param->buffer = adc_average_value;
|
||||
read_param->read_length = 2;
|
||||
|
||||
return read_param->read_length;
|
||||
}
|
||||
|
||||
static uint32 AdcDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
|
||||
{
|
||||
NULL_PARAM_CHECK(drv);
|
||||
NULL_PARAM_CHECK(configure_info);
|
||||
|
||||
x_err_t ret = EOK;
|
||||
uint8 adc_channel;
|
||||
|
||||
struct AdcDriver *adc_drv = (struct AdcDriver *)drv;
|
||||
struct AdcHardwareDevice *adc_dev = (struct AdcHardwareDevice *)adc_drv->driver.owner_bus->owner_haldev;
|
||||
struct HwAdc *adc_cfg = (struct HwAdc *)adc_dev->haldev.private_data;
|
||||
|
||||
switch (configure_info->configure_cmd)
|
||||
{
|
||||
case OPE_CFG:
|
||||
adc_cfg->adc_channel = *(uint8 *)configure_info->private_data;
|
||||
if (adc_cfg->adc_channel > 18) {
|
||||
KPrintf("AdcDrvConfigure set adc channel(0-18) %u error!", adc_cfg->adc_channel);
|
||||
adc_cfg->adc_channel = 0;
|
||||
ret = ERROR;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static const struct AdcDevDone dev_done =
|
||||
{
|
||||
AdcOpen,
|
||||
AdcClose,
|
||||
NONE,
|
||||
AdcRead,
|
||||
};
|
||||
|
||||
int HwAdcInit(void)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
|
||||
#ifdef BSP_USING_ADC1
|
||||
static struct AdcBus adc1_bus;
|
||||
static struct AdcDriver adc1_drv;
|
||||
static struct AdcHardwareDevice adc1_dev;
|
||||
static struct HwAdc adc1_cfg;
|
||||
|
||||
adc1_drv.configure = AdcDrvConfigure;
|
||||
|
||||
ret = AdcBusInit(&adc1_bus, ADC1_BUS_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("ADC1 bus init error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = AdcDriverInit(&adc1_drv, ADC1_DRIVER_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("ADC1 driver init error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
ret = AdcDriverAttachToBus(ADC1_DRIVER_NAME, ADC1_BUS_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("ADC1 driver attach error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
adc1_dev.adc_dev_done = &dev_done;
|
||||
adc1_cfg.ADCx = CM_ADC1;
|
||||
adc1_cfg.adc_channel = 0;
|
||||
|
||||
ret = AdcDeviceRegister(&adc1_dev, (void *)&adc1_cfg, ADC1_DEVICE_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("ADC1 device register error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
ret = AdcDeviceAttachToBus(ADC1_DEVICE_NAME, ADC1_BUS_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("ADC1 device register error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_ADC2
|
||||
static struct AdcBus adc2_bus;
|
||||
static struct AdcDriver adc2_drv;
|
||||
static struct AdcHardwareDevice adc2_dev;
|
||||
static struct HwAdc adc2_cfg;
|
||||
|
||||
adc2_drv.configure = AdcDrvConfigure;
|
||||
|
||||
ret = AdcBusInit(&adc2_bus, ADC2_BUS_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("ADC2 bus init error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = AdcDriverInit(&adc2_drv, ADC2_DRIVER_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("ADC2 driver init error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
ret = AdcDriverAttachToBus(ADC2_DRIVER_NAME, ADC2_BUS_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("ADC2 driver attach error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
adc2_dev.adc_dev_done = &dev_done;
|
||||
adc2_cfg.ADCx = CM_ADC2;
|
||||
adc2_cfg.adc_channel = 0;
|
||||
|
||||
ret = AdcDeviceRegister(&adc2_dev, (void *)&adc2_cfg, ADC2_DEVICE_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("ADC2 device register error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
ret = AdcDeviceAttachToBus(ADC2_DEVICE_NAME, ADC2_BUS_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("ADC2 device register error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_ADC3
|
||||
static struct AdcBus adc3_bus;
|
||||
static struct AdcDriver adc3_drv;
|
||||
static struct AdcHardwareDevice adc3_dev;
|
||||
static struct HwAdc adc3_cfg;
|
||||
|
||||
adc3_drv.configure = AdcDrvConfigure;
|
||||
|
||||
ret = AdcBusInit(&adc3_bus, ADC3_BUS_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("ADC3 bus init error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = AdcDriverInit(&adc3_drv, ADC3_DRIVER_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("ADC3 driver init error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
ret = AdcDriverAttachToBus(ADC3_DRIVER_NAME, ADC3_BUS_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("ADC3 driver attach error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
adc3_dev.adc_dev_done = &dev_done;
|
||||
adc3_cfg.ADCx = CM_ADC3;
|
||||
adc3_cfg.adc_channel = 0;
|
||||
|
||||
ret = AdcDeviceRegister(&adc3_dev, (void *)&adc3_cfg, ADC3_DEVICE_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("ADC3 device register error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
ret = AdcDeviceAttachToBus(ADC3_DEVICE_NAME, ADC3_BUS_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("ADC3 device register error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
#endif
|
||||
|
||||
return ret;
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
|
@ -4,6 +4,14 @@ ifeq ($(CONFIG_BSP_USING_UART),y)
|
|||
SRC_FILES += hc32_ll_usart.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_BSP_USING_ADC),y)
|
||||
SRC_FILES += hc32_ll_adc.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_BSP_USING_DAC),y)
|
||||
SRC_FILES += hc32_ll_dac.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_BSP_USING_SDIO),y)
|
||||
SRC_FILES += hc32_ll_sdioc.c
|
||||
endif
|
||||
|
@ -24,4 +32,12 @@ ifeq ($(CONFIG_BSP_USING_USB),y)
|
|||
SRC_FILES += hc32_ll_usb.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_BSP_USING_RTC),y)
|
||||
SRC_FILES += hc32_ll_rtc.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_BSP_USING_WDT),y)
|
||||
SRC_FILES += hc32_ll_wdt.c
|
||||
endif
|
||||
|
||||
include $(KERNEL_ROOT)/compiler.mk
|
||||
|
|
|
@ -0,0 +1,17 @@
|
|||
if BSP_USING_DAC
|
||||
config DAC_BUS_NAME
|
||||
string "dac bus name"
|
||||
default "dac"
|
||||
|
||||
config DAC_DRIVER_NAME
|
||||
string "dac driver name"
|
||||
default "dac_drv"
|
||||
|
||||
config DAC_DEVICE_NAME
|
||||
string "dac bus device name"
|
||||
default "dac_dev"
|
||||
|
||||
config DAC_GPIO_NUM
|
||||
int "dac gpio pin num(only support 4 or 5)"
|
||||
default "4"
|
||||
endif
|
|
@ -0,0 +1,3 @@
|
|||
SRC_FILES := connect_dac.c
|
||||
|
||||
include $(KERNEL_ROOT)/compiler.mk
|
|
@ -0,0 +1,155 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file connect_dac.c
|
||||
* @brief support to register DAC pointer and function
|
||||
* @version 2.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2023-02-09
|
||||
*/
|
||||
|
||||
#include <connect_dac.h>
|
||||
|
||||
#define _DAC_CONS(string1, string2) string1##string2
|
||||
#define DAC_CONS(string1, string2) _DAC_CONS(string1, string2)
|
||||
|
||||
#ifdef BSP_USING_DAC
|
||||
#define DAC_GPIO DAC_CONS(GPIO_Pin_, DAC_GPIO_NUM)
|
||||
#endif
|
||||
|
||||
|
||||
static uint32 DacOpen(void *dev)
|
||||
{
|
||||
struct DacHardwareDevice *dac_dev = (struct DacHardwareDevice *)dev;
|
||||
|
||||
CM_DAC_TypeDef *DACx = (CM_DAC_TypeDef *)dac_dev->private_data;
|
||||
|
||||
stc_dac_init_t pstcDacInit;
|
||||
|
||||
DAC_StructInit(&pstcDacInit);
|
||||
|
||||
DAC_Init(DACx,DAC_CH1,&pstcDacInit);
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
static uint32 DacClose(void *dev)
|
||||
{
|
||||
|
||||
struct DacHardwareDevice *dac_dev = (struct DacHardwareDevice *)dev;
|
||||
|
||||
CM_DAC_TypeDef *DACx = (CM_DAC_TypeDef *)dac_dev->private_data;
|
||||
|
||||
DAC_DeInit(DACx);
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
|
||||
static uint32 DacRead(void *dev, struct BusBlockReadParam *read_param)
|
||||
{
|
||||
struct DacHardwareDevice *dac_dev = (struct DacHardwareDevice *)dev;
|
||||
|
||||
CM_DAC_TypeDef *DACx = (CM_DAC_TypeDef *)dac_dev->private_data;
|
||||
|
||||
uint16 dac_set_value = 0;
|
||||
|
||||
dac_set_value = DAC_GetChConvertState(DACx,DAC_CH1);
|
||||
|
||||
*(uint16 *)read_param->buffer = dac_set_value;
|
||||
read_param->read_length = 2;
|
||||
|
||||
return read_param->read_length;
|
||||
return EOK;
|
||||
}
|
||||
|
||||
static uint32 DacDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
|
||||
{
|
||||
NULL_PARAM_CHECK(drv);
|
||||
NULL_PARAM_CHECK(configure_info);
|
||||
|
||||
x_err_t ret = EOK;
|
||||
|
||||
struct DacDriver *dac_drv = (struct DacDriver *)drv;
|
||||
struct DacHardwareDevice *dac_dev = (struct DacHardwareDevice *)dac_drv->driver.owner_bus->owner_haldev;
|
||||
struct HwDac *dac_cfg = (struct HwDac *)dac_dev->haldev.private_data;
|
||||
|
||||
switch (configure_info->configure_cmd)
|
||||
{
|
||||
case OPE_CFG:
|
||||
dac_cfg->digital_data = *(uint16 *)configure_info->private_data;
|
||||
// DAC_SetChannel1Data(DAC_Align_12b_R, dac_cfg->digital_data);//12 bits、R-Align data format, digital data
|
||||
DAC_SetChData(dac_cfg->DACx,DAC_CH1,dac_cfg->digital_data);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static const struct DacDevDone dev_done =
|
||||
{
|
||||
DacOpen,
|
||||
DacClose,
|
||||
NONE,
|
||||
DacRead,
|
||||
};
|
||||
|
||||
int HwDacInit(void)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
|
||||
#ifdef BSP_USING_DAC
|
||||
static struct DacBus dac_bus;
|
||||
static struct DacDriver dac_drv;
|
||||
static struct DacHardwareDevice dac_dev;
|
||||
static struct HwDac dac_cfg;
|
||||
|
||||
dac_drv.configure = DacDrvConfigure;
|
||||
|
||||
ret = DacBusInit(&dac_bus, DAC_BUS_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("DAC bus init error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = DacDriverInit(&dac_drv, DAC_DRIVER_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("DAC driver init error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
ret = DacDriverAttachToBus(DAC_DRIVER_NAME, DAC_BUS_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("DAC driver attach error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
dac_dev.dac_dev_done = &dev_done;
|
||||
dac_cfg.DACx = CM_DAC1;
|
||||
dac_cfg.digital_data = 0;
|
||||
|
||||
ret = DacDeviceRegister(&dac_dev, (void *)&dac_cfg, DAC_DEVICE_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("DAC device register error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
ret = DacDeviceAttachToBus(DAC_DEVICE_NAME, DAC_BUS_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("DAC device register error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
#endif
|
||||
|
||||
return ret;
|
||||
}
|
|
@ -33,9 +33,9 @@ Modification:
|
|||
|
||||
#include <connect_gpio.h>
|
||||
|
||||
#define GPIO_PIN_INDEX(pin) ((uint8_t)((pin) & 0x0F))
|
||||
|
||||
#define ITEM_NUM(items) sizeof(items) / sizeof(items[0])
|
||||
#define IRQ_INT(callback)
|
||||
#define INTSEL_REG (uint32_t)(&CM_INTC->SEL0)
|
||||
|
||||
#ifndef HC32_PIN_CONFIG
|
||||
#define HC32_PIN_CONFIG(pin, callback, config) \
|
||||
|
@ -48,6 +48,8 @@ Modification:
|
|||
|
||||
#define __HC32_PIN(index, gpio_port, gpio_pin) { 0, GPIO_PORT_##gpio_port, GPIO_PIN_##gpio_pin}
|
||||
#define __HC32_PIN_DEFAULT {-1, 0, 0}
|
||||
#define MAX_PIN_INDEX 15
|
||||
#define INT_VECTOR_OFFSET 16
|
||||
|
||||
struct PinIndex
|
||||
{
|
||||
|
@ -294,6 +296,17 @@ struct PinIrqHdr pin_irq_hdr_tab[] =
|
|||
{-1, 0, NONE, NONE}
|
||||
};
|
||||
|
||||
static int GpioPinIndex(uint16_t pin){
|
||||
int ret = 0;
|
||||
for(;ret<=MAX_PIN_INDEX;ret++){ //ret must be 16-bit
|
||||
if((0x0001U<<ret)&pin){
|
||||
KPrintf("the int pin is %d\n",ret);
|
||||
return ret;
|
||||
}
|
||||
};
|
||||
return -1;
|
||||
}
|
||||
|
||||
static void PinIrqHandler(uint16_t pinbit)
|
||||
{
|
||||
int32_t irqindex = -1;
|
||||
|
@ -418,6 +431,7 @@ static int32 GpioConfigMode(int mode, const struct PinIndex* index)
|
|||
break;
|
||||
case GPIO_CFG_INPUT:
|
||||
stcGpioInit.u16PinDir = PIN_DIR_IN;
|
||||
stcGpioInit.u16ExtInt = PIN_EXTINT_ON;
|
||||
break;
|
||||
case GPIO_CFG_INPUT_PULLUP:
|
||||
stcGpioInit.u16PinDir = PIN_DIR_IN;
|
||||
|
@ -434,8 +448,7 @@ static int32 GpioConfigMode(int mode, const struct PinIndex* index)
|
|||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
GPIO_Init(index->pin, index->pin, &stcGpioInit);
|
||||
GPIO_Init(index->port, index->pin, &stcGpioInit);
|
||||
}
|
||||
|
||||
static int32 GpioIrqRegister(int32 pin, int32 mode, void (*hdr)(void *args), void *args)
|
||||
|
@ -443,7 +456,9 @@ static int32 GpioIrqRegister(int32 pin, int32 mode, void (*hdr)(void *args), voi
|
|||
const struct PinIndex *index = GetPin(pin);
|
||||
int32 irqindex = -1;
|
||||
|
||||
irqindex = GPIO_PIN_INDEX(index->pin);
|
||||
stc_extint_init_t stcExtIntInit;
|
||||
|
||||
irqindex = GpioPinIndex(index->pin); // start from 0
|
||||
if (irqindex >= ITEM_NUM(pin_irq_map)) {
|
||||
return -ENONESYS;
|
||||
}
|
||||
|
@ -465,8 +480,31 @@ static int32 GpioIrqRegister(int32 pin, int32 mode, void (*hdr)(void *args), voi
|
|||
pin_irq_hdr_tab[irqindex].hdr = hdr;
|
||||
pin_irq_hdr_tab[irqindex].mode = mode;
|
||||
pin_irq_hdr_tab[irqindex].args = args;
|
||||
|
||||
/* Extint config */
|
||||
EXTINT_StructInit(&stcExtIntInit);
|
||||
switch (mode)
|
||||
{
|
||||
case GPIO_IRQ_EDGE_RISING:
|
||||
stcExtIntInit.u32Edge = EXTINT_TRIG_RISING;
|
||||
break;
|
||||
case GPIO_IRQ_EDGE_FALLING:
|
||||
stcExtIntInit.u32Edge = EXTINT_TRIG_FALLING;
|
||||
break;
|
||||
case GPIO_IRQ_EDGE_BOTH:
|
||||
stcExtIntInit.u32Edge = EXTINT_TRIG_BOTH;
|
||||
break;
|
||||
case GPIO_IRQ_LEVEL_LOW:
|
||||
stcExtIntInit.u32Edge = EXTINT_TRIG_LOW;
|
||||
break;
|
||||
}
|
||||
EXTINT_Init(index->pin, &stcExtIntInit);
|
||||
|
||||
__IO uint32_t *INTC_SELx = (__IO uint32_t *)(INTSEL_REG + (4U * (uint32_t)(irqindex)));
|
||||
WRITE_REG32(*INTC_SELx, irqindex);
|
||||
isrManager.done->registerIrq(irqindex+INT_VECTOR_OFFSET, (void(*)(int vector,void *))hdr, args);
|
||||
|
||||
CriticalAreaUnLock(level);
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
|
@ -475,7 +513,7 @@ static uint32 GpioIrqFree(x_base pin)
|
|||
const struct PinIndex* index = GetPin(pin);
|
||||
int32 irqindex = -1;
|
||||
|
||||
irqindex = GPIO_PIN_INDEX(index->pin);
|
||||
irqindex = GpioPinIndex(index->pin);
|
||||
if (irqindex >= ITEM_NUM(pin_irq_map)) {
|
||||
return -ENONESYS;
|
||||
}
|
||||
|
@ -485,6 +523,7 @@ static uint32 GpioIrqFree(x_base pin)
|
|||
CriticalAreaUnLock(level);
|
||||
return EOK;
|
||||
}
|
||||
isrManager.done->freeIrq(pin_irq_hdr_tab[irqindex].pin);
|
||||
pin_irq_hdr_tab[irqindex].pin = -1;
|
||||
pin_irq_hdr_tab[irqindex].hdr = NONE;
|
||||
pin_irq_hdr_tab[irqindex].mode = 0;
|
||||
|
@ -509,9 +548,8 @@ static int32 GpioIrqEnable(x_base pin)
|
|||
struct Hc32PinIrqMap *irq_map;
|
||||
const struct PinIndex* index = GetPin(pin);
|
||||
int32 irqindex = -1;
|
||||
stc_extint_init_t stcExtIntInit;
|
||||
|
||||
irqindex = GPIO_PIN_INDEX(index->pin);
|
||||
irqindex = GpioPinIndex(index->pin);
|
||||
if (irqindex >= ITEM_NUM(pin_irq_map)) {
|
||||
return -ENONESYS;
|
||||
}
|
||||
|
@ -522,28 +560,11 @@ static int32 GpioIrqEnable(x_base pin)
|
|||
return -ENONESYS;
|
||||
}
|
||||
|
||||
/* Extint config */
|
||||
EXTINT_StructInit(&stcExtIntInit);
|
||||
switch (pin_irq_hdr_tab[irqindex].mode)
|
||||
{
|
||||
case GPIO_IRQ_EDGE_RISING:
|
||||
stcExtIntInit.u32Edge = EXTINT_TRIG_RISING;
|
||||
break;
|
||||
case GPIO_IRQ_EDGE_FALLING:
|
||||
stcExtIntInit.u32Edge = EXTINT_TRIG_FALLING;
|
||||
break;
|
||||
case GPIO_IRQ_EDGE_BOTH:
|
||||
stcExtIntInit.u32Edge = EXTINT_TRIG_BOTH;
|
||||
break;
|
||||
case GPIO_IRQ_LEVEL_LOW:
|
||||
stcExtIntInit.u32Edge = EXTINT_TRIG_LOW;
|
||||
break;
|
||||
}
|
||||
EXTINT_Init(index->pin, &stcExtIntInit);
|
||||
NVIC_EnableIRQ(irq_map->irq_config.irq_num);
|
||||
GpioIrqConfig(index->pin, index->pin, PIN_EXTINT_ON);
|
||||
GpioIrqConfig(index->port, index->pin, PIN_EXTINT_ON);
|
||||
isrManager.done->enableIrq(GpioPinIndex(index->pin));
|
||||
|
||||
CriticalAreaUnLock(level);
|
||||
KPrintf("port%d,pin%04x has enable\n",index->port, index->pin);
|
||||
return EOK;
|
||||
}
|
||||
|
||||
|
@ -554,8 +575,8 @@ static int32 GpioIrqDisable(x_base pin)
|
|||
|
||||
x_base level = CriticalAreaLock();
|
||||
|
||||
GpioIrqConfig(index->pin, index->pin, PIN_EXTINT_OFF);
|
||||
NVIC_DisableIRQ(irq_map->irq_config.irq_num);
|
||||
GpioIrqConfig(index->port, index->pin, PIN_EXTINT_OFF);
|
||||
isrManager.done->disableIrq(GpioPinIndex(index->pin));
|
||||
|
||||
CriticalAreaUnLock(level);
|
||||
return EOK;
|
||||
|
@ -637,9 +658,9 @@ uint32 Hc32PinWrite(void *dev, struct BusBlockWriteParam *write_param)
|
|||
NULL_PARAM_CHECK(index);
|
||||
|
||||
if (GPIO_LOW == pinstat->val) {
|
||||
GPIO_ResetPins(index->pin, index->pin);
|
||||
GPIO_ResetPins(index->port, index->pin);
|
||||
} else {
|
||||
GPIO_SetPins(index->pin, index->pin);
|
||||
GPIO_SetPins(index->port, index->pin);
|
||||
}
|
||||
|
||||
return EOK;
|
||||
|
@ -653,7 +674,7 @@ uint32 Hc32PinRead(void *dev, struct BusBlockReadParam *read_param)
|
|||
const struct PinIndex* index = GetPin(pinstat->pin);
|
||||
NULL_PARAM_CHECK(index);
|
||||
|
||||
if(GPIO_ReadInputPins(index->pin, index->pin) == PIN_RESET) {
|
||||
if(GPIO_ReadInputPins(index->port, index->pin) == PIN_RESET) {
|
||||
pinstat->val = GPIO_LOW;
|
||||
} else {
|
||||
pinstat->val = GPIO_HIGH;
|
||||
|
|
|
@ -0,0 +1,42 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file connect_uart.h
|
||||
* @brief define hc32f4a0-board usart function and struct
|
||||
* @version 2.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2023-02-09
|
||||
*/
|
||||
|
||||
#include <device.h>
|
||||
#include <hardware_irq.h>
|
||||
#include <hc32_ll_adc.h>
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
struct HwAdc
|
||||
{
|
||||
CM_ADC_TypeDef *ADCx;
|
||||
uint8 adc_channel;
|
||||
};
|
||||
|
||||
int HwAdcInit(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
@ -0,0 +1,50 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file connect_uart.h
|
||||
* @brief define hc32f4a0-board usart function and struct
|
||||
* @version 2.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2023-02-09
|
||||
*/
|
||||
|
||||
#include <device.h>
|
||||
#include <hardware_irq.h>
|
||||
#include <hc32_ll_fcg.h>
|
||||
#include <hc32_ll_dac.h>
|
||||
#include <hc32_ll_gpio.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
struct HwDac
|
||||
{
|
||||
CM_DAC_TypeDef *DACx;
|
||||
uint16 digital_data;
|
||||
};
|
||||
|
||||
typedef struct {
|
||||
CM_DAC_TypeDef *pUnit;
|
||||
// en_dac_cvt_t enCvtType;
|
||||
uint16_t u16Ch;
|
||||
} stc_dac_handle_t;
|
||||
|
||||
|
||||
int HwDacInit(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
@ -0,0 +1,37 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file connect_rtc.h
|
||||
* @brief define hc32f4a0-board rtc function and struct
|
||||
* @version 3.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2023-02-02
|
||||
*/
|
||||
|
||||
#ifndef CONNECT_I2C_H
|
||||
#define CONNECT_I2C_H
|
||||
|
||||
#include <device.h>
|
||||
#include <hc32_ll_rtc.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
int HwRtcInit(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
|
@ -0,0 +1,37 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file connect_wdt.h
|
||||
* @brief define hc32f4a0-board watchdog function and struct
|
||||
* @version 3.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2023-02-02
|
||||
*/
|
||||
|
||||
#ifndef CONNECT_I2C_H
|
||||
#define CONNECT_I2C_H
|
||||
|
||||
#include <device.h>
|
||||
#include <hc32_ll_wdt.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
int HwWdtInit(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
|
@ -0,0 +1,11 @@
|
|||
if BSP_USING_RTC
|
||||
config RTC_BUS_NAME
|
||||
string "rtc bus name"
|
||||
default "rtc"
|
||||
config RTC_DRV_NAME
|
||||
string "rtc bus driver name"
|
||||
default "rtc_drv"
|
||||
config RTC_DEVICE_NAME
|
||||
string "rtc bus device name"
|
||||
default "rtc_dev"
|
||||
endif
|
|
@ -0,0 +1,2 @@
|
|||
SRC_FILES := connect_rtc.c
|
||||
include $(KERNEL_ROOT)/compiler.mk
|
|
@ -0,0 +1,185 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file connect_rtc.c
|
||||
* @brief support aiit-hc32f4a0-board rtc function and register to bus framework
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2023-02-02
|
||||
*/
|
||||
|
||||
#include <connect_rtc.h>
|
||||
#include <stdint.h>
|
||||
#include <stdlib.h>
|
||||
#include <time.h>
|
||||
|
||||
static uint32 RtcConfigure(void *drv, struct BusConfigureInfo *configure_info)
|
||||
{
|
||||
NULL_PARAM_CHECK(drv);
|
||||
|
||||
struct RtcDriver *rtc_drv = (struct RtcDriver *)drv;
|
||||
struct RtcDrvConfigureParam *drv_param = (struct RtcDrvConfigureParam *)configure_info->private_data;
|
||||
|
||||
int cmd = drv_param->rtc_operation_cmd;
|
||||
time_t *time = drv_param->time;
|
||||
|
||||
switch (cmd)
|
||||
{
|
||||
case OPER_RTC_GET_TIME:
|
||||
{
|
||||
struct tm ct;
|
||||
stc_rtc_date_t rtc_date;
|
||||
stc_rtc_time_t rtc_time;
|
||||
|
||||
// rtc_timer_get(&year, &month, &day, &hour, &minute, &second);
|
||||
RTC_GetDate(RTC_DATA_FMT_DEC, &rtc_date);
|
||||
RTC_GetTime(RTC_DATA_FMT_DEC, &rtc_time);
|
||||
|
||||
ct.tm_year = rtc_date.u8Year ;
|
||||
ct.tm_mon = rtc_date.u8Month ;
|
||||
ct.tm_mday = rtc_date.u8Day;
|
||||
ct.tm_wday = rtc_date.u8Weekday;
|
||||
|
||||
ct.tm_hour = rtc_time.u8Hour;
|
||||
ct.tm_min = rtc_time.u8Minute;
|
||||
ct.tm_sec = rtc_time.u8Second;
|
||||
|
||||
*time = mktime(&ct);
|
||||
}
|
||||
break;
|
||||
case OPER_RTC_SET_TIME:
|
||||
{
|
||||
struct tm *ct;
|
||||
stc_rtc_date_t rtc_date;
|
||||
stc_rtc_time_t rtc_time;
|
||||
x_base lock;
|
||||
|
||||
lock = CriticalAreaLock();
|
||||
ct = localtime(time);
|
||||
rtc_date.u8Year = ct->tm_year ;
|
||||
rtc_date.u8Month = ct->tm_mon ;
|
||||
rtc_date.u8Day = ct->tm_mday;
|
||||
rtc_date.u8Weekday = ct->tm_wday;
|
||||
rtc_time.u8Hour = ct->tm_hour;
|
||||
rtc_time.u8Minute = ct->tm_min;
|
||||
rtc_time.u8Second = ct->tm_sec;
|
||||
CriticalAreaUnLock(lock);
|
||||
|
||||
RTC_SetDate(RTC_DATA_FMT_DEC, &rtc_date);
|
||||
RTC_SetTime(RTC_DATA_FMT_DEC, &rtc_time);
|
||||
}
|
||||
break;
|
||||
}
|
||||
return EOK;
|
||||
}
|
||||
|
||||
/*manage the rtc device operations*/
|
||||
static const struct RtcDevDone dev_done =
|
||||
{
|
||||
.open = NONE,
|
||||
.close = NONE,
|
||||
.write = NONE,
|
||||
.read = NONE,
|
||||
};
|
||||
|
||||
static int BoardRtcBusInit(struct RtcBus *rtc_bus, struct RtcDriver *rtc_driver)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
|
||||
/*Init the rtc bus */
|
||||
ret = RtcBusInit(rtc_bus, RTC_BUS_NAME);
|
||||
if (EOK != ret) {
|
||||
KPrintf("HwRtcInit RtcBusInit error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
/*Init the rtc driver*/
|
||||
ret = RtcDriverInit(rtc_driver, RTC_DRV_NAME);
|
||||
if (EOK != ret) {
|
||||
KPrintf("HwRtcInit RtcDriverInit error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
/*Attach the rtc driver to the rtc bus*/
|
||||
ret = RtcDriverAttachToBus(RTC_DRV_NAME, RTC_BUS_NAME);
|
||||
if (EOK != ret) {
|
||||
KPrintf("HwRtcInit RtcDriverAttachToBus error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*Attach the rtc device to the rtc bus*/
|
||||
static int BoardRtcDevBend(void)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
|
||||
static struct RtcHardwareDevice rtc_device;
|
||||
memset(&rtc_device, 0, sizeof(struct RtcHardwareDevice));
|
||||
|
||||
rtc_device.dev_done = &(dev_done);
|
||||
|
||||
ret = RtcDeviceRegister(&rtc_device, NONE, RTC_DEVICE_NAME);
|
||||
if (EOK != ret) {
|
||||
KPrintf("HwRtcInit RtcDeviceInit device %s error %d\n", RTC_DEVICE_NAME, ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = RtcDeviceAttachToBus(RTC_DEVICE_NAME, RTC_BUS_NAME);
|
||||
if (EOK != ret) {
|
||||
KPrintf("HwRtcInit RtcDeviceAttachToBus device %s error %d\n", RTC_DEVICE_NAME, ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
int HwRtcInit(void)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
|
||||
static struct RtcBus rtc_bus;
|
||||
memset(&rtc_bus, 0, sizeof(struct RtcBus));
|
||||
|
||||
static struct RtcDriver rtc_driver;
|
||||
memset(&rtc_driver, 0, sizeof(struct RtcDriver));
|
||||
|
||||
rtc_driver.configure = &(RtcConfigure);
|
||||
|
||||
ret = BoardRtcBusInit(&rtc_bus, &rtc_driver);
|
||||
if (EOK != ret) {
|
||||
KPrintf("HwRtcInit error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = BoardRtcDevBend();
|
||||
if (EOK != ret) {
|
||||
KPrintf("HwRtcInit error ret %u\n", ret);
|
||||
}
|
||||
|
||||
stc_rtc_init_t stcRtcInit;
|
||||
/* Configure structure initialization */
|
||||
(void)RTC_StructInit(&stcRtcInit);
|
||||
|
||||
/* Configuration RTC structure */
|
||||
stcRtcInit.u8ClockSrc = RTC_CLK_SRC_XTAL32;
|
||||
stcRtcInit.u8HourFormat= RTC_HOUR_FMT_24H;
|
||||
stcRtcInit.u8IntPeriod = RTC_INT_PERIOD_PER_SEC;
|
||||
(void)RTC_Init(&stcRtcInit);
|
||||
|
||||
RTC_Cmd(LL_RTC_ENABLE);
|
||||
|
||||
return ret;
|
||||
}
|
|
@ -0,0 +1,15 @@
|
|||
if BSP_USING_WDT
|
||||
config WDT_BUS_NAME_0
|
||||
string "watchdog bus 0 name"
|
||||
default "wdt0"
|
||||
|
||||
config WDT_DRIVER_NAME_0
|
||||
string "watchdog driver 0 name"
|
||||
default "wdt0_drv"
|
||||
|
||||
config WDT_0_DEVICE_NAME_0
|
||||
string "watchdog device 0 name"
|
||||
default "wdt0_dev0"
|
||||
endif
|
||||
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
SRC_FILES := connect_wdt.c
|
||||
|
||||
include $(KERNEL_ROOT)/compiler.mk
|
|
@ -0,0 +1,145 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file connect_wdt.c
|
||||
* @brief support hc32f4a0-board watchdog function and register to bus framework
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2023-02-02
|
||||
*/
|
||||
|
||||
#include <connect_wdt.h>
|
||||
|
||||
#define WDT_COUNT_CYCLE 65536U
|
||||
|
||||
static uint32 WdtOpen(void *dev)
|
||||
{
|
||||
NULL_PARAM_CHECK(dev);
|
||||
|
||||
stc_wdt_init_t stcWdtInit;
|
||||
stcWdtInit.u32CountPeriod = WDT_CNT_PERIOD65536;
|
||||
stcWdtInit.u32ClockDiv = WDT_CLK_DIV1024;
|
||||
stcWdtInit.u32RefreshRange = WDT_RANGE_0TO25PCT;
|
||||
stcWdtInit.u32LPMCount = WDT_LPM_CNT_STOP;
|
||||
stcWdtInit.u32ExceptionType = WDT_EXP_TYPE_RST;
|
||||
(void)WDT_Init(&stcWdtInit);
|
||||
return EOK;
|
||||
}
|
||||
|
||||
static uint32 WdtConfigure(void *drv, struct BusConfigureInfo *args)
|
||||
{
|
||||
NULL_PARAM_CHECK(drv);
|
||||
NULL_PARAM_CHECK(args);
|
||||
|
||||
stc_wdt_init_t stcWdtInit;
|
||||
|
||||
int period_option = *((int*)args->private_data);
|
||||
if(period_option<=256){
|
||||
period_option = WDT_CNT_PERIOD256;
|
||||
}else if(period_option<=4096){
|
||||
period_option = WDT_CNT_PERIOD4096;
|
||||
}else if(period_option<=16384){
|
||||
period_option = WDT_CNT_PERIOD16384;
|
||||
}else{
|
||||
period_option = WDT_CNT_PERIOD65536;
|
||||
}
|
||||
|
||||
switch (args->configure_cmd)
|
||||
{
|
||||
case OPER_WDT_SET_TIMEOUT:
|
||||
stcWdtInit.u32CountPeriod = period_option;
|
||||
stcWdtInit.u32ClockDiv = WDT_CLK_DIV1024;
|
||||
stcWdtInit.u32RefreshRange = WDT_RANGE_0TO25PCT;
|
||||
stcWdtInit.u32LPMCount = WDT_LPM_CNT_STOP;
|
||||
stcWdtInit.u32ExceptionType = WDT_EXP_TYPE_RST;
|
||||
if (WDT_Init(&stcWdtInit) != 0) {
|
||||
return ERROR;
|
||||
}
|
||||
/* the chip SDK's feature:to start up watchdog counter, feed dog first after initialization*/
|
||||
WDT_FeedDog();
|
||||
break;
|
||||
case OPER_WDT_KEEPALIVE:
|
||||
/* must wait for count lower than 25%(division by 4) for a feed as RefreshRange is set as 0TO25PCT*/
|
||||
if (WDT_GetCountValue() < WDT_COUNT_CYCLE/4){
|
||||
WDT_FeedDog();
|
||||
}
|
||||
break;
|
||||
default:
|
||||
return ERROR;
|
||||
}
|
||||
return EOK;
|
||||
}
|
||||
|
||||
static const struct WdtDevDone dev_done =
|
||||
{
|
||||
WdtOpen,
|
||||
NONE,
|
||||
NONE,
|
||||
NONE,
|
||||
};
|
||||
|
||||
/**
|
||||
* @description: Watchdog function
|
||||
* @return success: EOK, failure: other
|
||||
*/
|
||||
int StartWatchdog(void)
|
||||
{
|
||||
//add feed watchdog task function
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
int HwWdtInit(void)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
|
||||
static struct WdtBus wdt0;
|
||||
|
||||
ret = WdtBusInit(&wdt0, WDT_BUS_NAME_0);
|
||||
if (ret != EOK) {
|
||||
KPrintf("Watchdog bus init error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
static struct WdtDriver drv0;
|
||||
drv0.configure = WdtConfigure;
|
||||
|
||||
ret = WdtDriverInit(&drv0, WDT_DRIVER_NAME_0);
|
||||
if (ret != EOK) {
|
||||
KPrintf("Watchdog driver init error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = WdtDriverAttachToBus(WDT_DRIVER_NAME_0, WDT_BUS_NAME_0);
|
||||
if (ret != EOK) {
|
||||
KPrintf("Watchdog driver attach error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
static struct WdtHardwareDevice dev0;
|
||||
dev0.dev_done = &dev_done;
|
||||
|
||||
ret = WdtDeviceRegister(&dev0, WDT_0_DEVICE_NAME_0);
|
||||
if (ret != EOK) {
|
||||
KPrintf("Watchdog device register error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = WdtDeviceAttachToBus(WDT_0_DEVICE_NAME_0, WDT_BUS_NAME_0);
|
||||
if (ret != EOK) {
|
||||
KPrintf("Watchdog device register error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
Loading…
Reference in New Issue