forked from xuos/xiuos
feat add 4G function for xishutong-arm32 board
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Liu_Weichao
parent
88e8cc4193
commit
94d3d37a19
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/*
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* Copyright (c) 2020 AIIT XUOS Lab
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* XiUOS is licensed under Mulan PSL v2.
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* You can use this software according to the terms and conditions of the Mulan PSL v2.
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* You may obtain a copy of Mulan PSL v2 at:
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* http://license.coscl.org.cn/MulanPSL2
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* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
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* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
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* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
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* See the Mulan PSL v2 for more details.
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*/
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/**
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* @file test_4g_ec200a.c
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* @brief Implement the connection 4G function, using QUECTEL EC200A device
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* @version 1.1
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* @author AIIT XUOS Lab
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* @date 2023.10.15
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*/
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#include <stdio.h>
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#include <string.h>
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#include <transform.h>
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#ifdef ADD_XIZI_FEATURES
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char *trans_data = "{\"saleid\": \"52330000MJ87322565\", \"gateid\": \"10100001011\", \"type\": \"report\", \"time\": \"2023-06-15 17:22:00\", \"sequence\": \"268\", \"source\": \"da\", \"meter\": [{\"id\": \"T100106\", \"status\": \"1\", \"name\": \"T100106\", \"values\": {}}]}\r\n";
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// const char chk_buad[] = {"AT+IPR?\r\n"};
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const char set_mode[] = {"AT+QMTCFG=\"recv/mode\",0,0,1\r\n"};
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// const char set_cfg[] = {"AT+QMTCFG=\"aliauth\",0,\"k0celEMx5DK\",\"test_device\",\"411aa14c0dc671f7ee869adced442d13\"\r\n"};
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const char set_server[] = {"AT+QMTOPEN=0,\"xyheqmx.e3.luyouxia.net\",13333\r\n"};
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// const char set_server[] = {"AT+QMTOPEN=0,\"iot-060a7p7c.mqtt.iothub.aliyuncs.com\",1883\r\n"};
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const char set_conn[] = {"AT+QMTCONN=0,\"quectel\",\"test\",\"test123456\"\r\n"};
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// const char set_conn[] = {"AT+QMTCONN=0,\"sysoul\"\r\n"};
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// const char set_get[] = {"AT+QMTSUB=0,1,\"/get\",0\r\n"};
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// const char set_reply[] = {"AT+QMTPUBEX=0,0,0,0,\"/reply\",1000\r\n"};
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char recv_buf[100] = {0};
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int buf_len = 0;
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void Test4G(void)
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{
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int quectel_fd = PrivOpen(ADAPTER_QUECTEL_DRIVER, O_RDWR);
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if (quectel_fd < 0) {
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printf("open quectel fd error:%d\n", quectel_fd);
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return;
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}
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printf("quectel fopen success\n");
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struct SerialDataCfg quectel_cfg;
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memset(&quectel_cfg, 0, sizeof(struct SerialDataCfg));
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quectel_cfg.serial_baud_rate = BAUD_RATE_115200;
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quectel_cfg.serial_data_bits = DATA_BITS_8;
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quectel_cfg.serial_stop_bits = STOP_BITS_1;
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quectel_cfg.serial_parity_mode = PARITY_NONE;
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quectel_cfg.serial_bit_order = BIT_ORDER_LSB;
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quectel_cfg.serial_invert_mode = NRZ_NORMAL;
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// quectel_cfg.serial_buffer_size = SERIAL_RB_BUFSZ;
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quectel_cfg.serial_buffer_size = 1024;
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quectel_cfg.serial_timeout = 1000;
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quectel_cfg.is_ext_uart = 0;
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// quectel_cfg.ext_uart_no = ADAPTER_QUECTEL_DRIVER_EXT_PORT;
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// quectel_cfg.port_configure = PORT_CFG_INIT;
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struct PrivIoctlCfg ioctl_cfg;
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ioctl_cfg.ioctl_driver_type = SERIAL_TYPE;
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ioctl_cfg.args = &quectel_cfg;
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if (0 != PrivIoctl(quectel_fd, OPE_INT, &ioctl_cfg)) {
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printf("ioctl quectel fd error %d\n", quectel_fd);
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PrivClose(quectel_fd);
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return;
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}
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printf("4G module set\n");
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// memset(recv_buf, 0, sizeof(recv_buf));
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// printf("chk_buad: %s\n", chk_buad);
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// printf("chk_buad_len: %d\n", strlen(chk_buad));
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// PrivWrite(quectel_fd, chk_buad, strlen(chk_buad));
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// PrivTaskDelay(30);
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// buf_len = PrivRead(quectel_fd, recv_buf, sizeof(recv_buf));
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// printf("buf_len: %d\n", buf_len);
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// printf("[%s] Info: Recv from uart: %s\n", __func__, recv_buf);
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// PrivTaskDelay(1000);
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memset(recv_buf, 0, sizeof(recv_buf));
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printf("set_mode: %s\n", set_mode);
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printf("set_mode_len: %d\n", strlen(set_mode));
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PrivWrite(quectel_fd, set_mode, strlen(set_mode));
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PrivTaskDelay(30);
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buf_len = PrivRead(quectel_fd, recv_buf, sizeof(recv_buf));
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printf("buf_len: %d\n", buf_len);
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printf("[%s] Info: Recv from uart: %s\n", __func__, recv_buf);
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PrivTaskDelay(1000);
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// memset(recv_buf, 0, sizeof(recv_buf));
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// printf("set_cfg: %s\n", set_cfg);
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// printf("set_cfg_len: %d\n", strlen(set_cfg));
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// PrivWrite(quectel_fd, set_cfg, strlen(set_cfg));
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// PrivTaskDelay(30);
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// buf_len = PrivRead(quectel_fd, recv_buf, sizeof(recv_buf));
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// printf("buf_len: %d\n", buf_len);
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// printf("[%s] Info: Recv from uart: %s\n", __func__, recv_buf);
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// PrivTaskDelay(1000);
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memset(recv_buf, 0, sizeof(recv_buf));
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printf("set_server: %s\n", set_server);
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printf("set_server_len: %d\n", strlen(set_server));
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PrivWrite(quectel_fd, set_server, strlen(set_server));
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PrivTaskDelay(30);
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buf_len = PrivRead(quectel_fd, recv_buf, sizeof(recv_buf));
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printf("buf_len: %d\n", buf_len);
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printf("[%s] Info: Recv from uart: %s\n", __func__, recv_buf);
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PrivTaskDelay(1000);
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memset(recv_buf, 0, sizeof(recv_buf));
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printf("set_conn: %s\n", set_conn);
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printf("set_conn_len: %d\n", strlen(set_conn));
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PrivWrite(quectel_fd, set_conn, strlen(set_conn));
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PrivTaskDelay(30);
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buf_len = PrivRead(quectel_fd, recv_buf, sizeof(recv_buf));
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printf("buf_len: %d\n", buf_len);
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printf("[%s] Info: Recv from uart: %s\n", __func__, recv_buf);
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PrivTaskDelay(1000);
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while (1) {
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printf("start send\n");
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char set_reply[50] = {"AT+QMTPUBEX=0,0,0,0,\"/reply\","};
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char data_len_str[20];
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sprintf(data_len_str, "%d", strlen(trans_data));
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printf("data_len_str: %s\n", data_len_str);
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strcat(set_reply, data_len_str);
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strcat(set_reply, "\r\n");
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memset(recv_buf, 0, sizeof(recv_buf));
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printf("set_reply: %s\n", set_reply);
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printf("set_reply_len: %d\n", strlen(set_reply));
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PrivWrite(quectel_fd, set_reply, strlen(set_reply));
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PrivTaskDelay(30);
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buf_len = PrivRead(quectel_fd, recv_buf, sizeof(recv_buf));
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printf("buf_len: %d\n", buf_len);
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printf("[%s] Info: Recv from uart: %s\n", __func__, recv_buf);
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PrivTaskDelay(500);
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memset(recv_buf, 0, sizeof(recv_buf));
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printf("send_data: %s\n", trans_data);
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printf("send_data_len: %d\n", strlen(trans_data));
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PrivWrite(quectel_fd, trans_data, strlen(trans_data));
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PrivTaskDelay(30);
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buf_len = PrivRead(quectel_fd, recv_buf, sizeof(recv_buf));
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printf("buf_len: %d\n", buf_len);
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printf("[%s] Info: Recv from uart: %s\n", __func__, recv_buf);
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PrivTaskDelay(5000);
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}
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PrivClose(quectel_fd);
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return;
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}
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PRIV_SHELL_CMD_FUNCTION(Test4G, a quectel test sample, PRIV_SHELL_CMD_MAIN_ATTR);
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#endif
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@ -51,19 +51,19 @@ Modification:
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#endif
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#if defined(BSP_USING_UART4)
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#define USART4_RX_PORT (GPIO_PORT_E)
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#define USART4_RX_PIN (GPIO_PIN_07)
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#define USART4_RX_PORT (GPIO_PORT_H)
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#define USART4_RX_PIN (GPIO_PIN_10)
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#define USART4_TX_PORT (GPIO_PORT_G)
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#define USART4_TX_PIN (GPIO_PIN_00)
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#define USART4_TX_PORT (GPIO_PORT_H)
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#define USART4_TX_PIN (GPIO_PIN_09)
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#endif
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#if defined(BSP_USING_UART6)
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#define USART6_RX_PORT (GPIO_PORT_H)
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#define USART6_RX_PIN (GPIO_PIN_06)
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#define USART6_RX_PIN (GPIO_PIN_08)
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#define USART6_TX_PORT (GPIO_PORT_E)
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#define USART6_TX_PIN (GPIO_PIN_06)
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#define USART6_TX_PORT (GPIO_PORT_H)
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#define USART6_TX_PIN (GPIO_PIN_07)
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#endif
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static void UartIsr(struct SerialBus *serial, struct SerialDriver *serial_drv, struct SerialHardwareDevice *serial_dev);
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