From 8f4e21741a30525dc5e134e194a71e0286978780 Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Thu, 24 Mar 2022 17:07:10 +0800 Subject: [PATCH 1/7] add README.md for xidatong --- Ubiquitous/Nuttx/aiit_board/xidatong/README.md | 1 + 1 file changed, 1 insertion(+) diff --git a/Ubiquitous/Nuttx/aiit_board/xidatong/README.md b/Ubiquitous/Nuttx/aiit_board/xidatong/README.md index 1e2496329..f0295446c 100644 --- a/Ubiquitous/Nuttx/aiit_board/xidatong/README.md +++ b/Ubiquitous/Nuttx/aiit_board/xidatong/README.md @@ -179,3 +179,4 @@ make时加上V=1参数可以看到较为详细的编译信息，但是编译过 按照3.1烧写步骤执行后，将拨码开关设置为1 off 2 off 3 off 4 off，重新上电后，重新打开该COM口串口终端，若程序正常，则串口终端上会显示启动信息打印输出。如下图所示： ![terminal](./img/terminal.png) + From ad657bd2e3996d95593e589ff4bcf058e809099c Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Mon, 28 Mar 2022 09:14:13 +0800 Subject: [PATCH 2/7] set PIN_USDHC1_CD_GPIO --- .../Nuttx/aiit_board/xidatong/include/board.h | 22 ++++++++----------- 1 file changed, 9 insertions(+), 13 deletions(-) diff --git a/Ubiquitous/Nuttx/aiit_board/xidatong/include/board.h b/Ubiquitous/Nuttx/aiit_board/xidatong/include/board.h index 076157b7c..e6021288c 100644 --- a/Ubiquitous/Nuttx/aiit_board/xidatong/include/board.h +++ b/Ubiquitous/Nuttx/aiit_board/xidatong/include/board.h @@ -207,20 +207,16 @@ * sure shapes are square with minimal ringing. */ -#define GPIO_USDHC1_DATA0 GPIO_USDHC1_DATA0_1 /* GPIO_SD_B0_02 */ -#define GPIO_USDHC1_DATA1 GPIO_USDHC1_DATA1_1 /* GPIO_SD_B0_03 */ -#define GPIO_USDHC1_DATA2 GPIO_USDHC1_DATA2_1 /* GPIO_SD_B0_04 */ -#define GPIO_USDHC1_DATA3 GPIO_USDHC1_DATA3_1 /* GPIO_SD_B0_05 */ -#define GPIO_USDHC1_CLK GPIO_USDHC1_CLK_1 /* GPIO_SD_B0_01 */ -#define GPIO_USDHC1_CMD GPIO_USDHC1_CMD_1 /* GPIO_SD_B0_00 */ -#define PIN_USDHC1_D0 (GPIO_USDHC1_DATA0 | IOMUX_USDHC1_DATAX_DEFAULT) -#define PIN_USDHC1_D1 (GPIO_USDHC1_DATA1 | IOMUX_USDHC1_DATAX_DEFAULT) -#define PIN_USDHC1_D2 (GPIO_USDHC1_DATA2 | IOMUX_USDHC1_DATAX_DEFAULT) -#define PIN_USDHC1_D3 (GPIO_USDHC1_DATA3 | IOMUX_USDHC1_DATAX_DEFAULT) -#define PIN_USDHC1_DCLK (GPIO_USDHC1_CLK | IOMUX_USDHC1_CLK_DEFAULT) -#define PIN_USDHC1_CMD (GPIO_USDHC1_CMD | IOMUX_USDHC1_CMD_DEFAULT) -#define PIN_USDHC1_CD (GPIO_USDHC1_CD_2 | IOMUX_USDHC1_CLK_DEFAULT) +#define PIN_USDHC1_D0 (GPIO_USDHC1_DATA0_1 | IOMUX_USDHC1_DATAX_DEFAULT) /* GPIO_SD_B0_02 */ +#define PIN_USDHC1_D1 (GPIO_USDHC1_DATA1_1 | IOMUX_USDHC1_DATAX_DEFAULT) /* GPIO_SD_B0_03 */ +#define PIN_USDHC1_D2 (GPIO_USDHC1_DATA2_1 | IOMUX_USDHC1_DATAX_DEFAULT) /* GPIO_SD_B0_04 */ +#define PIN_USDHC1_D3 (GPIO_USDHC1_DATA3_1 | IOMUX_USDHC1_DATAX_DEFAULT) /* GPIO_SD_B0_05 */ +#define PIN_USDHC1_DCLK (GPIO_USDHC1_CLK_1 | IOMUX_USDHC1_CLK_DEFAULT) /* GPIO_SD_B0_01 */ +#define PIN_USDHC1_CMD (GPIO_USDHC1_CMD_1 | IOMUX_USDHC1_CMD_DEFAULT) /* GPIO_SD_B0_00 */ +//#define PIN_USDHC1_CD (GPIO_USDHC1_CD_2 | IOMUX_USDHC1_CLK_DEFAULT) + +#define PIN_USDHC1_CD_GPIO (IOMUX_VSD_DEFAULT | GPIO_PORT2 | GPIO_PIN28) /* GPIO_B1_12 */ /* 386 KHz for initial inquiry stuff */ From c70910b65fb485dc595b7ed91eaffb0880338e19 Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Mon, 28 Mar 2022 09:28:07 +0800 Subject: [PATCH 3/7] add usdhc/defconfig --- .../xidatong/configs/usdhc/defconfig | 73 +++++++++++++++++++ 1 file changed, 73 insertions(+) create mode 100644 Ubiquitous/Nuttx/aiit_board/xidatong/configs/usdhc/defconfig diff --git a/Ubiquitous/Nuttx/aiit_board/xidatong/configs/usdhc/defconfig b/Ubiquitous/Nuttx/aiit_board/xidatong/configs/usdhc/defconfig new file mode 100644 index 000000000..c22671e64 --- /dev/null +++ b/Ubiquitous/Nuttx/aiit_board/xidatong/configs/usdhc/defconfig @@ -0,0 +1,73 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +CONFIG_ADD_NUTTX_FETURES=y +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="xidatong" +CONFIG_ARCH_BOARD_XIDATONG=y +CONFIG_ARCH_CHIP="imxrt" +CONFIG_ARCH_CHIP_IMXRT=y +CONFIG_ARCH_CHIP_MIMXRT1052CVL5B=y +CONFIG_ARCH_INTERRUPTSTACK=10240 +CONFIG_ARCH_STACKDUMP=y +CONFIG_ARMV7M_DCACHE=y +CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y +CONFIG_ARMV7M_ICACHE=y +CONFIG_ARMV7M_USEBASEPRI=y +CONFIG_BOARD_LOOPSPERMSEC=104926 +CONFIG_BUILTIN=y +CONFIG_DEBUG_FEATURES=y +CONFIG_DEBUG_FULLOPT=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_DEV_URANDOM=y +CONFIG_DEV_ZERO=y +CONFIG_FAT_LCNAMES=y +CONFIG_CLOCK_MONOTONIC=y +CONFIG_FAT_LFN=y +CONFIG_FS_FAT=y +CONFIG_FS_PROCFS=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_EXAMPLES_HELLO=y +CONFIG_IMXRT1020_EVK_QSPI_FLASH=y +CONFIG_IMXRT_GPIO1_0_15_IRQ=y +CONFIG_IMXRT_GPIO_IRQ=y +CONFIG_IMXRT_LPUART1=y +CONFIG_IMXRT_USDHC1=y +CONFIG_IMXRT_USDHC1_WIDTH_D1_D4=y +CONFIG_INTELHEX_BINARY=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_NCHAINS=8 +CONFIG_LIBC_STRERROR=y +CONFIG_LPUART1_RXBUFSIZE=1024 +CONFIG_LPUART1_SERIAL_CONSOLE=y +CONFIG_LPUART1_TXBUFSIZE=1024 +CONFIG_MMCSD=y +CONFIG_MMCSD_SDIO=y +CONFIG_MM_IOB=y +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_CMDOPT_DD_STATS=y +CONFIG_NSH_DISABLE_IFUPDOWN=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_RAM_SIZE=524288 +CONFIG_RAM_START=0x20200000 +CONFIG_RAW_BINARY=y +CONFIG_SCHED_CHILD_STATUS=y +CONFIG_SCHED_HAVE_PARENT=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_LPWORK=y +CONFIG_SCHED_WAITPID=y +CONFIG_SDIO_BLOCKSETUP=y +CONFIG_SERIAL_TERMIOS=y +CONFIG_START_DAY=14 +CONFIG_START_MONTH=3 +CONFIG_SYSTEM_CLE_CMD_HISTORY=y +CONFIG_SYSTEM_COLOR_CLE=y +CONFIG_SYSTEM_NSH=y +CONFIG_USER_ENTRYPOINT="nsh_main" From 0586c3bd07617de41d7ef2eb0b80d64ac5cd16b7 Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Mon, 28 Mar 2022 10:19:16 +0800 Subject: [PATCH 4/7] set mxrt-ok1052 board CONFIG_RAW_BINARY=y --- Ubiquitous/Nuttx/aiit_board/xidatong/configs/knsh/defconfig | 1 + .../Nuttx/aiit_board/xidatong/configs/libcxxtest/defconfig | 1 + Ubiquitous/Nuttx/aiit_board/xidatong/configs/netnsh/defconfig | 1 + Ubiquitous/Nuttx/aiit_board/xidatong/configs/nsh/defconfig | 1 + 4 files changed, 4 insertions(+) diff --git a/Ubiquitous/Nuttx/aiit_board/xidatong/configs/knsh/defconfig b/Ubiquitous/Nuttx/aiit_board/xidatong/configs/knsh/defconfig index c09996397..e0cd4e51b 100644 --- a/Ubiquitous/Nuttx/aiit_board/xidatong/configs/knsh/defconfig +++ b/Ubiquitous/Nuttx/aiit_board/xidatong/configs/knsh/defconfig @@ -37,6 +37,7 @@ CONFIG_NUTTX_USERSPACE=0x60200000 CONFIG_PASS1_BUILDIR="boards/arm/imxrt/xidatong/kernel" CONFIG_RAM_SIZE=524288 CONFIG_RAM_START=0x20200000 +CONFIG_RAW_BINARY=y CONFIG_SCHED_HPWORK=y CONFIG_SCHED_WAITPID=y CONFIG_START_DAY=8 diff --git a/Ubiquitous/Nuttx/aiit_board/xidatong/configs/libcxxtest/defconfig b/Ubiquitous/Nuttx/aiit_board/xidatong/configs/libcxxtest/defconfig index 415026558..a38942cd3 100644 --- a/Ubiquitous/Nuttx/aiit_board/xidatong/configs/libcxxtest/defconfig +++ b/Ubiquitous/Nuttx/aiit_board/xidatong/configs/libcxxtest/defconfig @@ -36,6 +36,7 @@ CONFIG_NSH_LINELEN=64 CONFIG_NSH_READLINE=y CONFIG_RAM_SIZE=536870912 CONFIG_RAM_START=0x20200000 +CONFIG_RAW_BINARY=y CONFIG_SCHED_CPULOAD=y CONFIG_SCHED_HPWORK=y CONFIG_SCHED_WAITPID=y diff --git a/Ubiquitous/Nuttx/aiit_board/xidatong/configs/netnsh/defconfig b/Ubiquitous/Nuttx/aiit_board/xidatong/configs/netnsh/defconfig index a20f54881..974ab7dd8 100644 --- a/Ubiquitous/Nuttx/aiit_board/xidatong/configs/netnsh/defconfig +++ b/Ubiquitous/Nuttx/aiit_board/xidatong/configs/netnsh/defconfig @@ -56,6 +56,7 @@ CONFIG_NSH_LINELEN=64 CONFIG_NSH_READLINE=y CONFIG_RAM_SIZE=524288 CONFIG_RAM_START=0x20200000 +CONFIG_RAW_BINARY=y CONFIG_SCHED_LPWORK=y CONFIG_SCHED_HPWORK=y CONFIG_SCHED_WAITPID=y diff --git a/Ubiquitous/Nuttx/aiit_board/xidatong/configs/nsh/defconfig b/Ubiquitous/Nuttx/aiit_board/xidatong/configs/nsh/defconfig index 7a393d08d..78b8bbd2d 100644 --- a/Ubiquitous/Nuttx/aiit_board/xidatong/configs/nsh/defconfig +++ b/Ubiquitous/Nuttx/aiit_board/xidatong/configs/nsh/defconfig @@ -35,6 +35,7 @@ CONFIG_NSH_LINELEN=64 CONFIG_NSH_READLINE=y CONFIG_RAM_SIZE=524288 CONFIG_RAM_START=0x20200000 +CONFIG_RAW_BINARY=y CONFIG_SCHED_HPWORK=y CONFIG_SCHED_WAITPID=y CONFIG_START_DAY=14 From 6b090b16ff5ee899b1b2d1ec66cc44a1704152ca Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Mon, 28 Mar 2022 13:29:32 +0800 Subject: [PATCH 5/7] add files --- .../xidatong/src/xip/imxrt_flexspi_nor_boot.c | 1135 +++++++++++++++++ .../xidatong/src/xip/imxrt_flexspi_nor_boot.h | 123 ++ .../src/xip/imxrt_flexspi_nor_flash..c | 88 ++ .../src/xip/imxrt_flexspi_nor_flash.h | 303 +++++ 4 files changed, 1649 insertions(+) create mode 100644 Ubiquitous/Nuttx/aiit_board/xidatong/src/xip/imxrt_flexspi_nor_boot.c create mode 100644 Ubiquitous/Nuttx/aiit_board/xidatong/src/xip/imxrt_flexspi_nor_boot.h create mode 100644 Ubiquitous/Nuttx/aiit_board/xidatong/src/xip/imxrt_flexspi_nor_flash..c create mode 100644 Ubiquitous/Nuttx/aiit_board/xidatong/src/xip/imxrt_flexspi_nor_flash.h diff --git a/Ubiquitous/Nuttx/aiit_board/xidatong/src/xip/imxrt_flexspi_nor_boot.c b/Ubiquitous/Nuttx/aiit_board/xidatong/src/xip/imxrt_flexspi_nor_boot.c new file mode 100644 index 000000000..a71e703cb --- /dev/null +++ b/Ubiquitous/Nuttx/aiit_board/xidatong/src/xip/imxrt_flexspi_nor_boot.c @@ -0,0 +1,1135 @@ +/* + * Copyright 2017 NXP + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * o Redistributions of source code must retain the above copyright notice, this list + * of conditions and the following disclaimer. + * + * o Redistributions in binary form must reproduce the above copyright notice, this + * list of conditions and the following disclaimer in the documentation and/or + * other materials provided with the distribution. + * + * o Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** +* @file imxrt_flexspi_nor_boot.c +* @brief support to register flexspi image vector table +* @version 2.0 +* @author AIIT XUOS Lab +* @date 2022-03-22 +*/ + +#include "imxrt_flexspi_nor_boot.h" + +locate_data(".boot_hdr.ivt") +const ivt g_image_vector_table = { + IVT_HEADER, /* IVT Header */ + 0x60002000, /* Image Entry Function */ + IVT_RSVD, /* Reserved = 0 */ + (uint32_t)DCD_ADDRESS, /* Address where DCD information is stored */ + (uint32_t)BOOT_DATA_ADDRESS, /* Address where BOOT Data Structure is stored */ + (uint32_t)&g_image_vector_table, /* Pointer to IVT Self (absolute address */ + (uint32_t)CSF_ADDRESS, /* Address where CSF file is stored */ + IVT_RSVD /* Reserved = 0 */ +}; + +locate_data(".boot_hdr.boot_data") +const BOOT_DATA_T g_boot_data = { + FLASH_BASE, /* boot start location */ + (FLASH_END-FLASH_BASE), /* size */ + PLUGIN_FLAG, /* Plugin flag*/ + 0xFFFFFFFF /* empty - extra data word */ +}; + + +locate_data(".boot_hdr.dcd_data") +const uint8_t dcd_sdram[1072] = { + /*0000*/ 0xD2, + 0x04, + 0x30, + 0x41, + 0xCC, + 0x03, + 0xAC, + 0x04, + 0x40, + 0x0F, + 0xC0, + 0x68, + 0xFF, + 0xFF, + 0xFF, + 0xFF, + /*0010*/ 0x40, + 0x0F, + 0xC0, + 0x6C, + 0xFF, + 0xFF, + 0xFF, + 0xFF, + 0x40, + 0x0F, + 0xC0, + 0x70, + 0xFF, + 0xFF, + 0xFF, + 0xFF, + /*0020*/ 0x40, + 0x0F, + 0xC0, + 0x74, + 0xFF, + 0xFF, + 0xFF, + 0xFF, + 0x40, + 0x0F, + 0xC0, + 0x78, + 0xFF, + 0xFF, + 0xFF, + 0xFF, + /*0030*/ 0x40, + 0x0F, + 0xC0, + 0x7C, + 0xFF, + 0xFF, + 0xFF, + 0xFF, + 0x40, + 0x0F, + 0xC0, + 0x80, + 0xFF, + 0xFF, + 0xFF, + 0xFF, + /*0040*/ 0x40, + 0x0D, + 0x80, + 0x30, + 0x00, + 0x00, + 0x20, + 0x01, + 0x40, + 0x0D, + 0x81, + 0x00, + 0x00, + 0x1D, + 0x00, + 0x00, + /*0050*/ 0x40, + 0x0F, + 0xC0, + 0x14, + 0x00, + 0x01, + 0x0D, + 0x40, + 0x40, + 0x1F, + 0x80, + 0x14, + 0x00, + 0x00, + 0x00, + 0x00, + /*0060*/ 0x40, + 0x1F, + 0x80, + 0x18, + 0x00, + 0x00, + 0x00, + 0x00, + 0x40, + 0x1F, + 0x80, + 0x1C, + 0x00, + 0x00, + 0x00, + 0x00, + /*0070*/ 0x40, + 0x1F, + 0x80, + 0x20, + 0x00, + 0x00, + 0x00, + 0x00, + 0x40, + 0x1F, + 0x80, + 0x24, + 0x00, + 0x00, + 0x00, + 0x00, + /*0080*/ 0x40, + 0x1F, + 0x80, + 0x28, + 0x00, + 0x00, + 0x00, + 0x00, + 0x40, + 0x1F, + 0x80, + 0x2C, + 0x00, + 0x00, + 0x00, + 0x00, + /*0090*/ 0x40, + 0x1F, + 0x80, + 0x30, + 0x00, + 0x00, + 0x00, + 0x00, + 0x40, + 0x1F, + 0x80, + 0x34, + 0x00, + 0x00, + 0x00, + 0x00, + /*00a0*/ 0x40, + 0x1F, + 0x80, + 0x38, + 0x00, + 0x00, + 0x00, + 0x00, + 0x40, + 0x1F, + 0x80, + 0x3C, + 0x00, + 0x00, + 0x00, + 0x00, + /*00b0*/ 0x40, + 0x1F, + 0x80, + 0x40, + 0x00, + 0x00, + 0x00, + 0x00, + 0x40, + 0x1F, + 0x80, + 0x44, + 0x00, + 0x00, + 0x00, + 0x00, + /*00c0*/ 0x40, + 0x1F, + 0x80, + 0x48, + 0x00, + 0x00, + 0x00, + 0x00, + 0x40, + 0x1F, + 0x80, + 0x4C, + 0x00, + 0x00, + 0x00, + 0x00, + /*00d0*/ 0x40, + 0x1F, + 0x80, + 0x50, + 0x00, + 0x00, + 0x00, + 0x00, + 0x40, + 0x1F, + 0x80, + 0x54, + 0x00, + 0x00, + 0x00, + 0x00, + /*00e0*/ 0x40, + 0x1F, + 0x80, + 0x58, + 0x00, + 0x00, + 0x00, + 0x00, + 0x40, + 0x1F, + 0x80, + 0x5C, + 0x00, + 0x00, + 0x00, + 0x00, + /*00f0*/ 0x40, + 0x1F, + 0x80, + 0x60, + 0x00, + 0x00, + 0x00, + 0x00, + 0x40, + 0x1F, + 0x80, + 0x64, + 0x00, + 0x00, + 0x00, + 0x00, + /*0100*/ 0x40, + 0x1F, + 0x80, + 0x68, + 0x00, + 0x00, + 0x00, + 0x00, + 0x40, + 0x1F, + 0x80, + 0x6C, + 0x00, + 0x00, + 0x00, + 0x00, + /*0110*/ 0x40, + 0x1F, + 0x80, + 0x70, + 0x00, + 0x00, + 0x00, + 0x00, + 0x40, + 0x1F, + 0x80, + 0x74, + 0x00, + 0x00, + 0x00, + 0x00, + /*0120*/ 0x40, + 0x1F, + 0x80, + 0x78, + 0x00, + 0x00, + 0x00, + 0x00, + 0x40, + 0x1F, + 0x80, + 0x7C, + 0x00, + 0x00, + 0x00, + 0x00, + /*0130*/ 0x40, + 0x1F, + 0x80, + 0x80, + 0x00, + 0x00, + 0x00, + 0x00, + 0x40, + 0x1F, + 0x80, + 0x84, + 0x00, + 0x00, + 0x00, + 0x00, + /*0140*/ 0x40, + 0x1F, + 0x80, + 0x88, + 0x00, + 0x00, + 0x00, + 0x00, + 0x40, + 0x1F, + 0x80, + 0x8C, + 0x00, + 0x00, + 0x00, + 0x00, + /*0150*/ 0x40, + 0x1F, + 0x80, + 0x90, + 0x00, + 0x00, + 0x00, + 0x00, + 0x40, + 0x1F, + 0x80, + 0x94, + 0x00, + 0x00, + 0x00, + 0x00, + /*0160*/ 0x40, + 0x1F, + 0x80, + 0x98, + 0x00, + 0x00, + 0x00, + 0x00, + 0x40, + 0x1F, + 0x80, + 0x9C, + 0x00, + 0x00, + 0x00, + 0x00, + /*0170*/ 0x40, + 0x1F, + 0x80, + 0xA0, + 0x00, + 0x00, + 0x00, + 0x00, + 0x40, + 0x1F, + 0x80, + 0xA4, + 0x00, + 0x00, + 0x00, + 0x00, + /*0180*/ 0x40, + 0x1F, + 0x80, + 0xA8, + 0x00, + 0x00, + 0x00, + 0x00, + 0x40, + 0x1F, + 0x80, + 0xAC, + 0x00, + 0x00, + 0x00, + 0x00, + /*0190*/ 0x40, + 0x1F, + 0x80, + 0xB0, + 0x00, + 0x00, + 0x00, + 0x10, + 0x40, + 0x1F, + 0x80, + 0xB4, + 0x00, + 0x00, + 0x00, + 0x00, + /*01a0*/ 0x40, + 0x1F, + 0x80, + 0xB8, + 0x00, + 0x00, + 0x00, + 0x00, + 0x40, + 0x1F, + 0x82, + 0x04, + 0x00, + 0x01, + 0x10, + 0xF9, + /*01b0*/ 0x40, + 0x1F, + 0x82, + 0x08, + 0x00, + 0x01, + 0x10, + 0xF9, + 0x40, + 0x1F, + 0x82, + 0x0C, + 0x00, + 0x01, + 0x10, + 0xF9, + /*01c0*/ 0x40, + 0x1F, + 0x82, + 0x10, + 0x00, + 0x01, + 0x10, + 0xF9, + 0x40, + 0x1F, + 0x82, + 0x14, + 0x00, + 0x01, + 0x10, + 0xF9, + /*01d0*/ 0x40, + 0x1F, + 0x82, + 0x18, + 0x00, + 0x01, + 0x10, + 0xF9, + 0x40, + 0x1F, + 0x82, + 0x1C, + 0x00, + 0x01, + 0x10, + 0xF9, + /*01e0*/ 0x40, + 0x1F, + 0x82, + 0x20, + 0x00, + 0x01, + 0x10, + 0xF9, + 0x40, + 0x1F, + 0x82, + 0x24, + 0x00, + 0x01, + 0x10, + 0xF9, + /*01f0*/ 0x40, + 0x1F, + 0x82, + 0x28, + 0x00, + 0x01, + 0x10, + 0xF9, + 0x40, + 0x1F, + 0x82, + 0x2C, + 0x00, + 0x01, + 0x10, + 0xF9, + /*0200*/ 0x40, + 0x1F, + 0x82, + 0x30, + 0x00, + 0x01, + 0x10, + 0xF9, + 0x40, + 0x1F, + 0x82, + 0x34, + 0x00, + 0x01, + 0x10, + 0xF9, + /*0210*/ 0x40, + 0x1F, + 0x82, + 0x38, + 0x00, + 0x01, + 0x10, + 0xF9, + 0x40, + 0x1F, + 0x82, + 0x3C, + 0x00, + 0x01, + 0x10, + 0xF9, + /*0220*/ 0x40, + 0x1F, + 0x82, + 0x40, + 0x00, + 0x01, + 0x10, + 0xF9, + 0x40, + 0x1F, + 0x82, + 0x44, + 0x00, + 0x01, + 0x10, + 0xF9, + /*0230*/ 0x40, + 0x1F, + 0x82, + 0x48, + 0x00, + 0x01, + 0x10, + 0xF9, + 0x40, + 0x1F, + 0x82, + 0x4C, + 0x00, + 0x01, + 0x10, + 0xF9, + /*0240*/ 0x40, + 0x1F, + 0x82, + 0x50, + 0x00, + 0x01, + 0x10, + 0xF9, + 0x40, + 0x1F, + 0x82, + 0x54, + 0x00, + 0x01, + 0x10, + 0xF9, + /*0250*/ 0x40, + 0x1F, + 0x82, + 0x58, + 0x00, + 0x01, + 0x10, + 0xF9, + 0x40, + 0x1F, + 0x82, + 0x5C, + 0x00, + 0x01, + 0x10, + 0xF9, + /*0260*/ 0x40, + 0x1F, + 0x82, + 0x60, + 0x00, + 0x01, + 0x10, + 0xF9, + 0x40, + 0x1F, + 0x82, + 0x64, + 0x00, + 0x01, + 0x10, + 0xF9, + /*0270*/ 0x40, + 0x1F, + 0x82, + 0x68, + 0x00, + 0x01, + 0x10, + 0xF9, + 0x40, + 0x1F, + 0x82, + 0x6C, + 0x00, + 0x01, + 0x10, + 0xF9, + /*0280*/ 0x40, + 0x1F, + 0x82, + 0x70, + 0x00, + 0x01, + 0x10, + 0xF9, + 0x40, + 0x1F, + 0x82, + 0x74, + 0x00, + 0x01, + 0x10, + 0xF9, + /*0290*/ 0x40, + 0x1F, + 0x82, + 0x78, + 0x00, + 0x01, + 0x10, + 0xF9, + 0x40, + 0x1F, + 0x82, + 0x7C, + 0x00, + 0x01, + 0x10, + 0xF9, + /*02a0*/ 0x40, + 0x1F, + 0x82, + 0x80, + 0x00, + 0x01, + 0x10, + 0xF9, + 0x40, + 0x1F, + 0x82, + 0x84, + 0x00, + 0x01, + 0x10, + 0xF9, + /*02b0*/ 0x40, + 0x1F, + 0x82, + 0x88, + 0x00, + 0x01, + 0x10, + 0xF9, + 0x40, + 0x1F, + 0x82, + 0x8C, + 0x00, + 0x01, + 0x10, + 0xF9, + /*02c0*/ 0x40, + 0x1F, + 0x82, + 0x90, + 0x00, + 0x01, + 0x10, + 0xF9, + 0x40, + 0x1F, + 0x82, + 0x94, + 0x00, + 0x01, + 0x10, + 0xF9, + /*02d0*/ 0x40, + 0x1F, + 0x82, + 0x98, + 0x00, + 0x01, + 0x10, + 0xF9, + 0x40, + 0x1F, + 0x82, + 0x9C, + 0x00, + 0x01, + 0x10, + 0xF9, + /*02e0*/ 0x40, + 0x1F, + 0x82, + 0xA0, + 0x00, + 0x01, + 0x10, + 0xF9, + 0x40, + 0x1F, + 0x82, + 0xA4, + 0x00, + 0x01, + 0x10, + 0xF9, + /*02f0*/ 0x40, + 0x1F, + 0x82, + 0xA8, + 0x00, + 0x01, + 0x10, + 0xF9, + 0x40, + 0x2F, + 0x00, + 0x00, + 0x10, + 0x00, + 0x00, + 0x04, + /*0300*/ 0x40, + 0x2F, + 0x00, + 0x08, + 0x00, + 0x03, + 0x05, + 0x24, + 0x40, + 0x2F, + 0x00, + 0x0C, + 0x06, + 0x03, + 0x05, + 0x24, + /*0310*/ 0x40, + 0x2F, + 0x00, + 0x10, + 0x80, + 0x00, + 0x00, + 0x1B, + 0x40, + 0x2F, + 0x00, + 0x14, + 0x82, + 0x00, + 0x00, + 0x1B, + /*0320*/ 0x40, + 0x2F, + 0x00, + 0x18, + 0x84, + 0x00, + 0x00, + 0x1B, + 0x40, + 0x2F, + 0x00, + 0x1C, + 0x86, + 0x00, + 0x00, + 0x1B, + /*0330*/ 0x40, + 0x2F, + 0x00, + 0x20, + 0x90, + 0x00, + 0x00, + 0x21, + 0x40, + 0x2F, + 0x00, + 0x24, + 0xA0, + 0x00, + 0x00, + 0x19, + /*0340*/ 0x40, + 0x2F, + 0x00, + 0x28, + 0xA8, + 0x00, + 0x00, + 0x17, + 0x40, + 0x2F, + 0x00, + 0x2C, + 0xA9, + 0x00, + 0x00, + 0x1B, + /*0350*/ 0x40, + 0x2F, + 0x00, + 0x30, + 0x00, + 0x00, + 0x00, + 0x21, + 0x40, + 0x2F, + 0x00, + 0x04, + 0x00, + 0x00, + 0x79, + 0xA8, + /*0360*/ 0x40, + 0x2F, + 0x00, + 0x40, + 0x00, + 0x00, + 0x0F, + 0x31, + 0x40, + 0x2F, + 0x00, + 0x44, + 0x00, + 0x65, + 0x29, + 0x22, + /*0370*/ 0x40, + 0x2F, + 0x00, + 0x48, + 0x00, + 0x01, + 0x09, + 0x20, + 0x40, + 0x2F, + 0x00, + 0x4C, + 0x50, + 0x21, + 0x0A, + 0x08, + /*0380*/ 0x40, + 0x2F, + 0x00, + 0x80, + 0x00, + 0x00, + 0x00, + 0x21, + 0x40, + 0x2F, + 0x00, + 0x84, + 0x00, + 0x88, + 0x88, + 0x88, + /*0390*/ 0x40, + 0x2F, + 0x00, + 0x94, + 0x00, + 0x00, + 0x00, + 0x02, + 0x40, + 0x2F, + 0x00, + 0x98, + 0x00, + 0x00, + 0x00, + 0x00, + /*03a0*/ 0x40, + 0x2F, + 0x00, + 0x90, + 0x80, + 0x00, + 0x00, + 0x00, + 0x40, + 0x2F, + 0x00, + 0x9C, + 0xA5, + 0x5A, + 0x00, + 0x0F, + /*03b0*/ 0xCF, + 0x00, + 0x0C, + 0x1C, + 0x40, + 0x2F, + 0x00, + 0x3C, + 0x00, + 0x00, + 0x00, + 0x01, + 0xCC, + 0x00, + 0x14, + 0x04, + /*03c0*/ 0x40, + 0x2F, + 0x00, + 0x90, + 0x80, + 0x00, + 0x00, + 0x00, + 0x40, + 0x2F, + 0x00, + 0x9C, + 0xA5, + 0x5A, + 0x00, + 0x0C, + /*03d0*/ 0xCF, + 0x00, + 0x0C, + 0x1C, + 0x40, + 0x2F, + 0x00, + 0x3C, + 0x00, + 0x00, + 0x00, + 0x01, + 0xCC, + 0x00, + 0x14, + 0x04, + /*03e0*/ 0x40, + 0x2F, + 0x00, + 0x90, + 0x80, + 0x00, + 0x00, + 0x00, + 0x40, + 0x2F, + 0x00, + 0x9C, + 0xA5, + 0x5A, + 0x00, + 0x0C, + /*03f0*/ 0xCF, + 0x00, + 0x0C, + 0x1C, + 0x40, + 0x2F, + 0x00, + 0x3C, + 0x00, + 0x00, + 0x00, + 0x01, + 0xCC, + 0x00, + 0x1C, + 0x04, + /*0400*/ 0x40, + 0x2F, + 0x00, + 0xA0, + 0x00, + 0x00, + 0x00, + 0x33, + 0x40, + 0x2F, + 0x00, + 0x90, + 0x80, + 0x00, + 0x00, + 0x00, + /*0410*/ 0x40, + 0x2F, + 0x00, + 0x9C, + 0xA5, + 0x5A, + 0x00, + 0x0A, + 0xCF, + 0x00, + 0x0C, + 0x1C, + 0x40, + 0x2F, + 0x00, + 0x3C, + /*0420*/ 0x00, + 0x00, + 0x00, + 0x01, + 0xCC, + 0x00, + 0x0C, + 0x04, + 0x40, + 0x2F, + 0x00, + 0x4C, + 0x50, + 0x07, + 0x0A, + 0x09, +}; diff --git a/Ubiquitous/Nuttx/aiit_board/xidatong/src/xip/imxrt_flexspi_nor_boot.h b/Ubiquitous/Nuttx/aiit_board/xidatong/src/xip/imxrt_flexspi_nor_boot.h new file mode 100644 index 000000000..47333fea7 --- /dev/null +++ b/Ubiquitous/Nuttx/aiit_board/xidatong/src/xip/imxrt_flexspi_nor_boot.h @@ -0,0 +1,123 @@ +/* + * Copyright 2017 NXP + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * o Redistributions of source code must retain the above copyright notice, this list + * of conditions and the following disclaimer. + * + * o Redistributions in binary form must reproduce the above copyright notice, this + * list of conditions and the following disclaimer in the documentation and/or + * other materials provided with the distribution. + * + * o Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** +* @file imxrt_flexspi_nor_boot.h +* @brief support to register flexspi image vector table +* @version 2.0 +* @author AIIT XUOS Lab +* @date 2022-03-22 +*/ + +#ifndef __BOARDS_ARM_IMXRT_XIDATONG_SRC_IMXRT_FLEXSPI_NOR_BOOT_H +#define __BOARDS_ARM_IMXRT_XIDATONG_SRC_IMXRT_FLEXSPI_NOR_BOOT_H + +#include + +/************************************* + * IVT Data + *************************************/ +typedef struct _ivt_ { + /** @ref hdr with tag #HAB_TAG_IVT, length and HAB version fields + * (see @ref data) + */ + uint32_t hdr; + /** Absolute address of the first instruction to execute from the + * image + */ + uint32_t entry; + /** Reserved in this version of HAB: should be NULL. */ + uint32_t reserved1; + /** Absolute address of the image DCD: may be NULL. */ + uint32_t dcd; + /** Absolute address of the Boot Data: may be NULL, but not interpreted + * any further by HAB + */ + uint32_t boot_data; + /** Absolute address of the IVT.*/ + uint32_t self; + /** Absolute address of the image CSF.*/ + uint32_t csf; + /** Reserved in this version of HAB: should be zero. */ + uint32_t reserved2; +} ivt; + +#define IVT_MAJOR_VERSION 0x4 +#define IVT_MAJOR_VERSION_SHIFT 0x4 +#define IVT_MAJOR_VERSION_MASK 0xF +#define IVT_MINOR_VERSION 0x1 +#define IVT_MINOR_VERSION_SHIFT 0x0 +#define IVT_MINOR_VERSION_MASK 0xF + +#define IVT_VERSION(major, minor) \ + ((((major) & IVT_MAJOR_VERSION_MASK) << IVT_MAJOR_VERSION_SHIFT) | \ + (((minor) & IVT_MINOR_VERSION_MASK) << IVT_MINOR_VERSION_SHIFT)) + +#define IVT_TAG_HEADER (0xD1) /**< Image Vector Table */ +#define IVT_SIZE 0x2000 +#define IVT_PAR IVT_VERSION(IVT_MAJOR_VERSION, IVT_MINOR_VERSION) + +#define IVT_HEADER (IVT_TAG_HEADER | (IVT_SIZE << 8) | (IVT_PAR << 24)) +#define IVT_RSVD (uint32_t)(0x00000000) + + +/************************************* + * Boot Data + *************************************/ +typedef struct _boot_data_ { + uint32_t start; /* boot start location */ + uint32_t size; /* size */ + uint32_t plugin; /* plugin flag - 1 if downloaded application is plugin */ + uint32_t placeholder; /* placehoder to make even 0x10 size */ +}BOOT_DATA_T; + + +/************************************* + * DCD Data + *************************************/ +#define DCD_TAG_HEADER (0xD2) +#define DCD_TAG_HEADER_SHIFT (24) +#define DCD_VERSION (0x40) +#define DCD_ARRAY_SIZE 1 + +#define FLASH_BASE 0x60000000 +#define FLASH_END 0x7F7FFFFF +#define SCLK 1 + +#define DCD_ADDRESS dcd_sdram +#define BOOT_DATA_ADDRESS &boot_data +#define CSF_ADDRESS 0 +#define PLUGIN_FLAG (uint32_t)0 + +/* External Variables */ +//extern const uint8_t dcd_sdram[1044]; +extern const uint8_t dcd_sdram[1072]; +extern const BOOT_DATA_T boot_data; + +#endif diff --git a/Ubiquitous/Nuttx/aiit_board/xidatong/src/xip/imxrt_flexspi_nor_flash..c b/Ubiquitous/Nuttx/aiit_board/xidatong/src/xip/imxrt_flexspi_nor_flash..c new file mode 100644 index 000000000..046642656 --- /dev/null +++ b/Ubiquitous/Nuttx/aiit_board/xidatong/src/xip/imxrt_flexspi_nor_flash..c @@ -0,0 +1,88 @@ +/* + * Copyright 2017 NXP + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * o Redistributions of source code must retain the above copyright notice, this list + * of conditions and the following disclaimer. + * + * o Redistributions in binary form must reproduce the above copyright notice, this + * list of conditions and the following disclaimer in the documentation and/or + * other materials provided with the distribution. + * + * o Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** +* @file imxrt_flexspi_nor_flash..c +* @brief support to define flexspi flash config +* @version 2.0 +* @author AIIT XUOS Lab +* @date 2022-03-22 +*/ + +#include "imxrt_flexspi_nor_flash.h" + +/******************************************************************************* + * Code + ******************************************************************************/ +#if defined(__CC_ARM) || defined(__GNUC__) + __attribute__((section(".boot_hdr.conf"))) +#elif defined(__ICCARM__) +#pragma location=".boot_hdr.conf" +#endif + +const flexspi_nor_config_t Qspiflash_config = +{ + .memConfig = + { + .tag = FLEXSPI_CFG_BLK_TAG, + .version = FLEXSPI_CFG_BLK_VERSION, + .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackInternally, + .csHoldTime = 3u, + .csSetupTime = 3u, + .deviceModeCfgEnable = true, + .deviceModeType = 1,//Quad Enable command + .deviceModeSeq.seqNum = 1, + .deviceModeSeq.seqId = 4, + .deviceModeArg = 0x000200,//Set QE + .deviceType = kFlexSpiDeviceType_SerialNOR, + .sflashPadType = kSerialFlash_4Pads, + .serialClkFreq = kFlexSpiSerialClk_60MHz,//80MHz for Winbond, 100MHz for GD, 133MHz for ISSI + .sflashA1Size = 16u * 1024u * 1024u,//4MBytes + .dataValidTime = {16u, 16u}, + .lookupTable = + { +// //Fast Read Sequence +// [0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x0B, RADDR_SDR, FLEXSPI_1PAD, 0x18), +// [1] = FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_1PAD, 0x08, READ_SDR, FLEXSPI_1PAD, 0x08), +// [2] = FLEXSPI_LUT_SEQ(JMP_ON_CS, 0, 0, 0, 0, 0), + //Quad Input/output read sequence + [0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18), + [1] = FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04), + [2] = FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), + //Read Status + [1*4] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x04), + //Write Enable + [3*4] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06, STOP, 0, 0), + //Write status + [4*4] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x01, WRITE_SDR, FLEXSPI_1PAD, 0x2), + }, + }, + .pageSize = 256u, + .sectorSize = 4u * 1024u, +}; diff --git a/Ubiquitous/Nuttx/aiit_board/xidatong/src/xip/imxrt_flexspi_nor_flash.h b/Ubiquitous/Nuttx/aiit_board/xidatong/src/xip/imxrt_flexspi_nor_flash.h new file mode 100644 index 000000000..9bda424c3 --- /dev/null +++ b/Ubiquitous/Nuttx/aiit_board/xidatong/src/xip/imxrt_flexspi_nor_flash.h @@ -0,0 +1,303 @@ +/* + * Copyright (c) 2016, Freescale Semiconductor, Inc. + * Copyright 2016-2017 NXP + * + * Redistribution and use in source and binary forms, with or without + * modification, + * are permitted provided that the following conditions are met: + * + * o Redistributions of source code must retain the above copyright notice, this + * list + * of conditions and the following disclaimer. + * + * o Redistributions in binary form must reproduce the above copyright notice, + * this + * list of conditions and the following disclaimer in the documentation and/or + * other materials provided with the distribution. + * + * o Neither the name of Freescale Semiconductor, Inc. nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** +* @file imxrt_flexspi_nor_flash..h +* @brief support to define flexspi flash config +* @version 2.0 +* @author AIIT XUOS Lab +* @date 2022-03-22 +*/ + +#ifndef __BOARDS_ARM_IMXRT_XIDATONG_SRC_IMXRT_FLEXSPI_NOR_FLASH_H +#define __BOARDS_ARM_IMXRT_XIDATONG_SRC_IMXRT_FLEXSPI_NOR_FLASH_H + +#include +#include +#include "fsl_common.h" + +/* FLEXSPI memory config block related defintions */ +#define FLEXSPI_CFG_BLK_TAG (0x42464346UL) // ascii "FCFB" Big Endian +#define FLEXSPI_CFG_BLK_VERSION (0x56010400UL) // V1.4.0 +#define FLEXSPI_CFG_BLK_SIZE (512) + +/* FLEXSPI Feature related definitions */ +#define FLEXSPI_FEATURE_HAS_PARALLEL_MODE 1 + +/* Lookup table related defintions */ +#define CMD_INDEX_READ 0 +#define CMD_INDEX_READSTATUS 1 +#define CMD_INDEX_WRITEENABLE 2 +#define CMD_INDEX_WRITE 4 + +#define CMD_LUT_SEQ_IDX_READ 0 +#define CMD_LUT_SEQ_IDX_READSTATUS 1 +#define CMD_LUT_SEQ_IDX_WRITEENABLE 3 +#define CMD_LUT_SEQ_IDX_WRITE 9 + +#define CMD_SDR 0x01 +#define CMD_DDR 0x21 +#define RADDR_SDR 0x02 +#define RADDR_DDR 0x22 +#define CADDR_SDR 0x03 +#define CADDR_DDR 0x23 +#define MODE1_SDR 0x04 +#define MODE1_DDR 0x24 +#define MODE2_SDR 0x05 +#define MODE2_DDR 0x25 +#define MODE4_SDR 0x06 +#define MODE4_DDR 0x26 +#define MODE8_SDR 0x07 +#define MODE8_DDR 0x27 +#define WRITE_SDR 0x08 +#define WRITE_DDR 0x28 +#define READ_SDR 0x09 +#define READ_DDR 0x29 +#define LEARN_SDR 0x0A +#define LEARN_DDR 0x2A +#define DATSZ_SDR 0x0B +#define DATSZ_DDR 0x2B +#define DUMMY_SDR 0x0C +#define DUMMY_DDR 0x2C +#define DUMMY_RWDS_SDR 0x0D +#define DUMMY_RWDS_DDR 0x2D +#define JMP_ON_CS 0x1F +#define STOP 0 + +#define FLEXSPI_1PAD 0 +#define FLEXSPI_2PAD 1 +#define FLEXSPI_4PAD 2 +#define FLEXSPI_8PAD 3 + +#define FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) \ + (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | \ + FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1)) + +//!@brief Definitions for FlexSPI Serial Clock Frequency +typedef enum _FlexSpiSerialClockFreq +{ + kFlexSpiSerialClk_30MHz = 1, + kFlexSpiSerialClk_50MHz = 2, + kFlexSpiSerialClk_60MHz = 3, + kFlexSpiSerialClk_75MHz = 4, + kFlexSpiSerialClk_80MHz = 5, + kFlexSpiSerialClk_100MHz = 6, + kFlexSpiSerialClk_133MHz = 7, + kFlexSpiSerialClk_166MHz = 8, + kFlexSpiSerialClk_200MHz = 9, +} flexspi_serial_clk_freq_t; + +//!@brief FlexSPI clock configuration type +enum +{ + kFlexSpiClk_SDR, //!< Clock configure for SDR mode + kFlexSpiClk_DDR, //!< Clock configurat for DDR mode +}; + +//!@brief FlexSPI Read Sample Clock Source definition +typedef enum _FlashReadSampleClkSource +{ + kFlexSPIReadSampleClk_LoopbackInternally = 0, + kFlexSPIReadSampleClk_LoopbackFromDqsPad = 1, + kFlexSPIReadSampleClk_LoopbackFromSckPad = 2, + kFlexSPIReadSampleClk_ExternalInputFromDqsPad = 3, +} flexspi_read_sample_clk_t; + + +//!@brief Misc feature bit definitions +enum +{ + kFlexSpiMiscOffset_DiffClkEnable = 0, //!< Bit for Differential clock enable + kFlexSpiMiscOffset_Ck2Enable = 1, //!< Bit for CK2 enable + kFlexSpiMiscOffset_ParallelEnable = 2, //!< Bit for Parallel mode enable + kFlexSpiMiscOffset_WordAddressableEnable = 3, //!< Bit for Word Addressable enable + kFlexSpiMiscOffset_SafeConfigFreqEnable = 4, //!< Bit for Safe Configuration Frequency enable + kFlexSpiMiscOffset_PadSettingOverrideEnable = 5, //!< Bit for Pad setting override enable + kFlexSpiMiscOffset_DdrModeEnable = 6, //!< Bit for DDR clock confiuration indication. +}; + +//!@brief Flash Type Definition +enum +{ + kFlexSpiDeviceType_SerialNOR = 1, //!< Flash devices are Serial NOR + kFlexSpiDeviceType_SerialNAND = 2, //!< Flash devices are Serial NAND + kFlexSpiDeviceType_SerialRAM = 3, //!< Flash devices are Serial RAM/HyperFLASH + kFlexSpiDeviceType_MCP_NOR_NAND = 0x12, //!< Flash device is MCP device, A1 is Serial NOR, A2 is Serial NAND + kFlexSpiDeviceType_MCP_NOR_RAM = 0x13, //!< Flash deivce is MCP device, A1 is Serial NOR, A2 is Serial RAMs +}; + +//!@brief Flash Pad Definitions +enum +{ + kSerialFlash_1Pad = 1, + kSerialFlash_2Pads = 2, + kSerialFlash_4Pads = 4, + kSerialFlash_8Pads = 8, +}; + +//!@brief FlexSPI LUT Sequence structure +typedef struct _lut_sequence +{ + uint8_t seqNum; //!< Sequence Number, valid number: 1-16 + uint8_t seqId; //!< Sequence Index, valid number: 0-15 + uint16_t reserved; +} flexspi_lut_seq_t; + +//!@brief Flash Configuration Command Type +enum +{ + kDeviceConfigCmdType_Generic, //!< Generic command, for example: configure dummy cycles, drive strength, etc + kDeviceConfigCmdType_QuadEnable, //!< Quad Enable command + kDeviceConfigCmdType_Spi2Xpi, //!< Switch from SPI to DPI/QPI/OPI mode + kDeviceConfigCmdType_Xpi2Spi, //!< Switch from DPI/QPI/OPI to SPI mode + kDeviceConfigCmdType_Spi2NoCmd, //!< Switch to 0-4-4/0-8-8 mode + kDeviceConfigCmdType_Reset, //!< Reset device command +}; + +//!@brief FlexSPI Memory Configuration Block +typedef struct _FlexSPIConfig +{ + uint32_t tag; //!< [0x000-0x003] Tag, fixed value 0x42464346UL + uint32_t version; //!< [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor, [7:0] - bugfix + uint32_t reserved0; //!< [0x008-0x00b] Reserved for future use + uint8_t readSampleClkSrc; //!< [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3 + uint8_t csHoldTime; //!< [0x00d-0x00d] CS hold time, default value: 3 + uint8_t csSetupTime; //!< [0x00e-0x00e] CS setup time, default value: 3 + uint8_t columnAddressWidth; //!< [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed to 3, For + //! Serial NAND, need to refer to datasheet + uint8_t deviceModeCfgEnable; //!< [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 - Disable + uint8_t deviceModeType; //!< [0x011-0x011] Specify the configuration command type:Quad Enable, DPI/QPI/OPI switch, + //! Generic configuration, etc. + uint16_t waitTimeCfgCommands; //!< [0x012-0x013] Wait time for all configuration commands, unit: 100us, Used for + //! DPI/QPI/OPI switch or reset command + flexspi_lut_seq_t deviceModeSeq; //!< [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id, [15:8] - LUt + //! sequence number, [31:16] Reserved + uint32_t deviceModeArg; //!< [0x018-0x01b] Argument/Parameter for device configuration + uint8_t configCmdEnable; //!< [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable + uint8_t configModeType[3]; //!< [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe + flexspi_lut_seq_t + configCmdSeqs[3]; //!< [0x020-0x02b] Sequence info for Device Configuration command, similar as deviceModeSeq + uint32_t reserved1; //!< [0x02c-0x02f] Reserved for future use + uint32_t configCmdArgs[3]; //!< [0x030-0x03b] Arguments/Parameters for device Configuration commands + uint32_t reserved2; //!< [0x03c-0x03f] Reserved for future use + uint32_t controllerMiscOption; //!< [0x040-0x043] Controller Misc Options, see Misc feature bit definitions for more + //! details + uint8_t deviceType; //!< [0x044-0x044] Device Type: See Flash Type Definition for more details + uint8_t sflashPadType; //!< [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8 - Octal + uint8_t serialClkFreq; //!< [0x046-0x046] Serial Flash Frequencey, device specific definitions, See System Boot + //! Chapter for more details + uint8_t lutCustomSeqEnable; //!< [0x047-0x047] LUT customization Enable, it is required if the program/erase cannot + //! be done using 1 LUT sequence, currently, only applicable to HyperFLASH + uint32_t reserved3[2]; //!< [0x048-0x04f] Reserved for future use + uint32_t sflashA1Size; //!< [0x050-0x053] Size of Flash connected to A1 + uint32_t sflashA2Size; //!< [0x054-0x057] Size of Flash connected to A2 + uint32_t sflashB1Size; //!< [0x058-0x05b] Size of Flash connected to B1 + uint32_t sflashB2Size; //!< [0x05c-0x05f] Size of Flash connected to B2 + uint32_t csPadSettingOverride; //!< [0x060-0x063] CS pad setting override value + uint32_t sclkPadSettingOverride; //!< [0x064-0x067] SCK pad setting override value + uint32_t dataPadSettingOverride; //!< [0x068-0x06b] data pad setting override value + uint32_t dqsPadSettingOverride; //!< [0x06c-0x06f] DQS pad setting override value + uint32_t timeoutInMs; //!< [0x070-0x073] Timeout threshold for read status command + uint32_t commandInterval; //!< [0x074-0x077] CS deselect interval between two commands + uint16_t dataValidTime[2]; //!< [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in terms of 0.1ns + uint16_t busyOffset; //!< [0x07c-0x07d] Busy offset, valid value: 0-31 + uint16_t busyBitPolarity; //!< [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device is busy, 1 - + //! busy flag is 0 when flash device is busy + uint32_t lookupTable[64]; //!< [0x080-0x17f] Lookup table holds Flash command sequences + flexspi_lut_seq_t lutCustomSeq[12]; //!< [0x180-0x1af] Customizable LUT Sequences + uint32_t reserved4[4]; //!< [0x1b0-0x1bf] Reserved for future use +} flexspi_mem_config_t; + +/* */ +#define NOR_CMD_INDEX_READ CMD_INDEX_READ //!< 0 +#define NOR_CMD_INDEX_READSTATUS CMD_INDEX_READSTATUS //!< 1 +#define NOR_CMD_INDEX_WRITEENABLE CMD_INDEX_WRITEENABLE //!< 2 +#define NOR_CMD_INDEX_ERASESECTOR 3 //!< 3 +#define NOR_CMD_INDEX_PAGEPROGRAM CMD_INDEX_WRITE //!< 4 +#define NOR_CMD_INDEX_CHIPERASE 5 //!< 5 +#define NOR_CMD_INDEX_DUMMY 6 //!< 6 +#define NOR_CMD_INDEX_ERASEBLOCK 7 //!< 7 + +#define NOR_CMD_LUT_SEQ_IDX_READ CMD_LUT_SEQ_IDX_READ //!< 0 READ LUT sequence id in lookupTable stored in config block +#define NOR_CMD_LUT_SEQ_IDX_READSTATUS \ + CMD_LUT_SEQ_IDX_READSTATUS //!< 1 Read Status LUT sequence id in lookupTable stored in config block +#define NOR_CMD_LUT_SEQ_IDX_READSTATUS_XPI \ + 2 //!< 2 Read status DPI/QPI/OPI sequence id in lookupTable stored in config block +#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE \ + CMD_LUT_SEQ_IDX_WRITEENABLE //!< 3 Write Enable sequence id in lookupTable stored in config block +#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE_XPI \ + 4 //!< 4 Write Enable DPI/QPI/OPI sequence id in lookupTable stored in config block +#define NOR_CMD_LUT_SEQ_IDX_ERASESECTOR 5 //!< 5 Erase Sector sequence id in lookupTable stored in config block +#define NOR_CMD_LUT_SEQ_IDX_ERASEBLOCK 8 //!< 8 Erase Block sequence id in lookupTable stored in config block +#define NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM \ + CMD_LUT_SEQ_IDX_WRITE //!< 9 Program sequence id in lookupTable stored in config block +#define NOR_CMD_LUT_SEQ_IDX_CHIPERASE 11 //!< 11 Chip Erase sequence in lookupTable id stored in config block +#define NOR_CMD_LUT_SEQ_IDX_READ_SFDP 13 //!< 13 Read SFDP sequence in lookupTable id stored in config block +#define NOR_CMD_LUT_SEQ_IDX_RESTORE_NOCMD \ + 14 //!< 14 Restore 0-4-4/0-8-8 mode sequence id in lookupTable stored in config block +#define NOR_CMD_LUT_SEQ_IDX_EXIT_NOCMD \ + 15 //!< 15 Exit 0-4-4/0-8-8 mode sequence id in lookupTable stored in config blobk + + +/* + * Serial NOR configuration block + */ +typedef struct _flexspi_nor_config +{ + flexspi_mem_config_t memConfig; //!< Common memory configuration info via FlexSPI + uint32_t pageSize; //!< Page size of Serial NOR + uint32_t sectorSize; //!< Sector size of Serial NOR + uint8_t ipcmdSerialClkFreq; //!< Clock frequency for IP command + uint8_t isUniformBlockSize; //!< Sector/Block size is the same + uint8_t reserved0[2]; //!< Reserved for future use + uint8_t serialNorType; //!< Serial NOR Flash type: 0/1/2/3 + uint8_t needExitNoCmdMode; //!< Need to exit NoCmd mode before other IP command + uint8_t halfClkForNonReadCmd; //!< Half the Serial Clock for non-read command: true/false + uint8_t needRestoreNoCmdMode; //!< Need to Restore NoCmd mode after IP commmand execution + uint32_t blockSize; //!< Block size + uint32_t reserve2[11]; //!< Reserved for future use +} flexspi_nor_config_t; + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef __cplusplus +} +#endif + +#endif // __FLEXSPI_NOR_FLASH_H__ From 3acf2c227ae38eddb4aa4d5db1edd78707667b8b Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Mon, 28 Mar 2022 14:23:03 +0800 Subject: [PATCH 6/7] delete xip --- .../xidatong/src/xip/imxrt_flexspi_nor_boot.c | 1135 ----------------- .../xidatong/src/xip/imxrt_flexspi_nor_boot.h | 123 -- .../src/xip/imxrt_flexspi_nor_flash..c | 88 -- .../src/xip/imxrt_flexspi_nor_flash.h | 303 ----- 4 files changed, 1649 deletions(-) delete mode 100644 Ubiquitous/Nuttx/aiit_board/xidatong/src/xip/imxrt_flexspi_nor_boot.c delete mode 100644 Ubiquitous/Nuttx/aiit_board/xidatong/src/xip/imxrt_flexspi_nor_boot.h delete mode 100644 Ubiquitous/Nuttx/aiit_board/xidatong/src/xip/imxrt_flexspi_nor_flash..c delete mode 100644 Ubiquitous/Nuttx/aiit_board/xidatong/src/xip/imxrt_flexspi_nor_flash.h diff --git a/Ubiquitous/Nuttx/aiit_board/xidatong/src/xip/imxrt_flexspi_nor_boot.c b/Ubiquitous/Nuttx/aiit_board/xidatong/src/xip/imxrt_flexspi_nor_boot.c deleted file mode 100644 index a71e703cb..000000000 --- a/Ubiquitous/Nuttx/aiit_board/xidatong/src/xip/imxrt_flexspi_nor_boot.c +++ /dev/null @@ -1,1135 +0,0 @@ -/* - * Copyright 2017 NXP - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * o Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * o Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * o Neither the name of the copyright holder nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** -* @file imxrt_flexspi_nor_boot.c -* @brief support to register flexspi image vector table -* @version 2.0 -* @author AIIT XUOS Lab -* @date 2022-03-22 -*/ - -#include "imxrt_flexspi_nor_boot.h" - -locate_data(".boot_hdr.ivt") -const ivt g_image_vector_table = { - IVT_HEADER, /* IVT Header */ - 0x60002000, /* Image Entry Function */ - IVT_RSVD, /* Reserved = 0 */ - (uint32_t)DCD_ADDRESS, /* Address where DCD information is stored */ - (uint32_t)BOOT_DATA_ADDRESS, /* Address where BOOT Data Structure is stored */ - (uint32_t)&g_image_vector_table, /* Pointer to IVT Self (absolute address */ - (uint32_t)CSF_ADDRESS, /* Address where CSF file is stored */ - IVT_RSVD /* Reserved = 0 */ -}; - -locate_data(".boot_hdr.boot_data") -const BOOT_DATA_T g_boot_data = { - FLASH_BASE, /* boot start location */ - (FLASH_END-FLASH_BASE), /* size */ - PLUGIN_FLAG, /* Plugin flag*/ - 0xFFFFFFFF /* empty - extra data word */ -}; - - -locate_data(".boot_hdr.dcd_data") -const uint8_t dcd_sdram[1072] = { - /*0000*/ 0xD2, - 0x04, - 0x30, - 0x41, - 0xCC, - 0x03, - 0xAC, - 0x04, - 0x40, - 0x0F, - 0xC0, - 0x68, - 0xFF, - 0xFF, - 0xFF, - 0xFF, - /*0010*/ 0x40, - 0x0F, - 0xC0, - 0x6C, - 0xFF, - 0xFF, - 0xFF, - 0xFF, - 0x40, - 0x0F, - 0xC0, - 0x70, - 0xFF, - 0xFF, - 0xFF, - 0xFF, - /*0020*/ 0x40, - 0x0F, - 0xC0, - 0x74, - 0xFF, - 0xFF, - 0xFF, - 0xFF, - 0x40, - 0x0F, - 0xC0, - 0x78, - 0xFF, - 0xFF, - 0xFF, - 0xFF, - /*0030*/ 0x40, - 0x0F, - 0xC0, - 0x7C, - 0xFF, - 0xFF, - 0xFF, - 0xFF, - 0x40, - 0x0F, - 0xC0, - 0x80, - 0xFF, - 0xFF, - 0xFF, - 0xFF, - /*0040*/ 0x40, - 0x0D, - 0x80, - 0x30, - 0x00, - 0x00, - 0x20, - 0x01, - 0x40, - 0x0D, - 0x81, - 0x00, - 0x00, - 0x1D, - 0x00, - 0x00, - /*0050*/ 0x40, - 0x0F, - 0xC0, - 0x14, - 0x00, - 0x01, - 0x0D, - 0x40, - 0x40, - 0x1F, - 0x80, - 0x14, - 0x00, - 0x00, - 0x00, - 0x00, - /*0060*/ 0x40, - 0x1F, - 0x80, - 0x18, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0x1C, - 0x00, - 0x00, - 0x00, - 0x00, - /*0070*/ 0x40, - 0x1F, - 0x80, - 0x20, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0x24, - 0x00, - 0x00, - 0x00, - 0x00, - /*0080*/ 0x40, - 0x1F, - 0x80, - 0x28, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0x2C, - 0x00, - 0x00, - 0x00, - 0x00, - /*0090*/ 0x40, - 0x1F, - 0x80, - 0x30, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0x34, - 0x00, - 0x00, - 0x00, - 0x00, - /*00a0*/ 0x40, - 0x1F, - 0x80, - 0x38, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0x3C, - 0x00, - 0x00, - 0x00, - 0x00, - /*00b0*/ 0x40, - 0x1F, - 0x80, - 0x40, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0x44, - 0x00, - 0x00, - 0x00, - 0x00, - /*00c0*/ 0x40, - 0x1F, - 0x80, - 0x48, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0x4C, - 0x00, - 0x00, - 0x00, - 0x00, - /*00d0*/ 0x40, - 0x1F, - 0x80, - 0x50, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0x54, - 0x00, - 0x00, - 0x00, - 0x00, - /*00e0*/ 0x40, - 0x1F, - 0x80, - 0x58, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0x5C, - 0x00, - 0x00, - 0x00, - 0x00, - /*00f0*/ 0x40, - 0x1F, - 0x80, - 0x60, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0x64, - 0x00, - 0x00, - 0x00, - 0x00, - /*0100*/ 0x40, - 0x1F, - 0x80, - 0x68, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0x6C, - 0x00, - 0x00, - 0x00, - 0x00, - /*0110*/ 0x40, - 0x1F, - 0x80, - 0x70, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0x74, - 0x00, - 0x00, - 0x00, - 0x00, - /*0120*/ 0x40, - 0x1F, - 0x80, - 0x78, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0x7C, - 0x00, - 0x00, - 0x00, - 0x00, - /*0130*/ 0x40, - 0x1F, - 0x80, - 0x80, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0x84, - 0x00, - 0x00, - 0x00, - 0x00, - /*0140*/ 0x40, - 0x1F, - 0x80, - 0x88, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0x8C, - 0x00, - 0x00, - 0x00, - 0x00, - /*0150*/ 0x40, - 0x1F, - 0x80, - 0x90, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0x94, - 0x00, - 0x00, - 0x00, - 0x00, - /*0160*/ 0x40, - 0x1F, - 0x80, - 0x98, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0x9C, - 0x00, - 0x00, - 0x00, - 0x00, - /*0170*/ 0x40, - 0x1F, - 0x80, - 0xA0, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0xA4, - 0x00, - 0x00, - 0x00, - 0x00, - /*0180*/ 0x40, - 0x1F, - 0x80, - 0xA8, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0xAC, - 0x00, - 0x00, - 0x00, - 0x00, - /*0190*/ 0x40, - 0x1F, - 0x80, - 0xB0, - 0x00, - 0x00, - 0x00, - 0x10, - 0x40, - 0x1F, - 0x80, - 0xB4, - 0x00, - 0x00, - 0x00, - 0x00, - /*01a0*/ 0x40, - 0x1F, - 0x80, - 0xB8, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x82, - 0x04, - 0x00, - 0x01, - 0x10, - 0xF9, - /*01b0*/ 0x40, - 0x1F, - 0x82, - 0x08, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x0C, - 0x00, - 0x01, - 0x10, - 0xF9, - /*01c0*/ 0x40, - 0x1F, - 0x82, - 0x10, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x14, - 0x00, - 0x01, - 0x10, - 0xF9, - /*01d0*/ 0x40, - 0x1F, - 0x82, - 0x18, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x1C, - 0x00, - 0x01, - 0x10, - 0xF9, - /*01e0*/ 0x40, - 0x1F, - 0x82, - 0x20, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x24, - 0x00, - 0x01, - 0x10, - 0xF9, - /*01f0*/ 0x40, - 0x1F, - 0x82, - 0x28, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x2C, - 0x00, - 0x01, - 0x10, - 0xF9, - /*0200*/ 0x40, - 0x1F, - 0x82, - 0x30, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x34, - 0x00, - 0x01, - 0x10, - 0xF9, - /*0210*/ 0x40, - 0x1F, - 0x82, - 0x38, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x3C, - 0x00, - 0x01, - 0x10, - 0xF9, - /*0220*/ 0x40, - 0x1F, - 0x82, - 0x40, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x44, - 0x00, - 0x01, - 0x10, - 0xF9, - /*0230*/ 0x40, - 0x1F, - 0x82, - 0x48, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x4C, - 0x00, - 0x01, - 0x10, - 0xF9, - /*0240*/ 0x40, - 0x1F, - 0x82, - 0x50, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x54, - 0x00, - 0x01, - 0x10, - 0xF9, - /*0250*/ 0x40, - 0x1F, - 0x82, - 0x58, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x5C, - 0x00, - 0x01, - 0x10, - 0xF9, - /*0260*/ 0x40, - 0x1F, - 0x82, - 0x60, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x64, - 0x00, - 0x01, - 0x10, - 0xF9, - /*0270*/ 0x40, - 0x1F, - 0x82, - 0x68, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x6C, - 0x00, - 0x01, - 0x10, - 0xF9, - /*0280*/ 0x40, - 0x1F, - 0x82, - 0x70, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x74, - 0x00, - 0x01, - 0x10, - 0xF9, - /*0290*/ 0x40, - 0x1F, - 0x82, - 0x78, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x7C, - 0x00, - 0x01, - 0x10, - 0xF9, - /*02a0*/ 0x40, - 0x1F, - 0x82, - 0x80, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x84, - 0x00, - 0x01, - 0x10, - 0xF9, - /*02b0*/ 0x40, - 0x1F, - 0x82, - 0x88, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x8C, - 0x00, - 0x01, - 0x10, - 0xF9, - /*02c0*/ 0x40, - 0x1F, - 0x82, - 0x90, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x94, - 0x00, - 0x01, - 0x10, - 0xF9, - /*02d0*/ 0x40, - 0x1F, - 0x82, - 0x98, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x9C, - 0x00, - 0x01, - 0x10, - 0xF9, - /*02e0*/ 0x40, - 0x1F, - 0x82, - 0xA0, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0xA4, - 0x00, - 0x01, - 0x10, - 0xF9, - /*02f0*/ 0x40, - 0x1F, - 0x82, - 0xA8, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x2F, - 0x00, - 0x00, - 0x10, - 0x00, - 0x00, - 0x04, - /*0300*/ 0x40, - 0x2F, - 0x00, - 0x08, - 0x00, - 0x03, - 0x05, - 0x24, - 0x40, - 0x2F, - 0x00, - 0x0C, - 0x06, - 0x03, - 0x05, - 0x24, - /*0310*/ 0x40, - 0x2F, - 0x00, - 0x10, - 0x80, - 0x00, - 0x00, - 0x1B, - 0x40, - 0x2F, - 0x00, - 0x14, - 0x82, - 0x00, - 0x00, - 0x1B, - /*0320*/ 0x40, - 0x2F, - 0x00, - 0x18, - 0x84, - 0x00, - 0x00, - 0x1B, - 0x40, - 0x2F, - 0x00, - 0x1C, - 0x86, - 0x00, - 0x00, - 0x1B, - /*0330*/ 0x40, - 0x2F, - 0x00, - 0x20, - 0x90, - 0x00, - 0x00, - 0x21, - 0x40, - 0x2F, - 0x00, - 0x24, - 0xA0, - 0x00, - 0x00, - 0x19, - /*0340*/ 0x40, - 0x2F, - 0x00, - 0x28, - 0xA8, - 0x00, - 0x00, - 0x17, - 0x40, - 0x2F, - 0x00, - 0x2C, - 0xA9, - 0x00, - 0x00, - 0x1B, - /*0350*/ 0x40, - 0x2F, - 0x00, - 0x30, - 0x00, - 0x00, - 0x00, - 0x21, - 0x40, - 0x2F, - 0x00, - 0x04, - 0x00, - 0x00, - 0x79, - 0xA8, - /*0360*/ 0x40, - 0x2F, - 0x00, - 0x40, - 0x00, - 0x00, - 0x0F, - 0x31, - 0x40, - 0x2F, - 0x00, - 0x44, - 0x00, - 0x65, - 0x29, - 0x22, - /*0370*/ 0x40, - 0x2F, - 0x00, - 0x48, - 0x00, - 0x01, - 0x09, - 0x20, - 0x40, - 0x2F, - 0x00, - 0x4C, - 0x50, - 0x21, - 0x0A, - 0x08, - /*0380*/ 0x40, - 0x2F, - 0x00, - 0x80, - 0x00, - 0x00, - 0x00, - 0x21, - 0x40, - 0x2F, - 0x00, - 0x84, - 0x00, - 0x88, - 0x88, - 0x88, - /*0390*/ 0x40, - 0x2F, - 0x00, - 0x94, - 0x00, - 0x00, - 0x00, - 0x02, - 0x40, - 0x2F, - 0x00, - 0x98, - 0x00, - 0x00, - 0x00, - 0x00, - /*03a0*/ 0x40, - 0x2F, - 0x00, - 0x90, - 0x80, - 0x00, - 0x00, - 0x00, - 0x40, - 0x2F, - 0x00, - 0x9C, - 0xA5, - 0x5A, - 0x00, - 0x0F, - /*03b0*/ 0xCF, - 0x00, - 0x0C, - 0x1C, - 0x40, - 0x2F, - 0x00, - 0x3C, - 0x00, - 0x00, - 0x00, - 0x01, - 0xCC, - 0x00, - 0x14, - 0x04, - /*03c0*/ 0x40, - 0x2F, - 0x00, - 0x90, - 0x80, - 0x00, - 0x00, - 0x00, - 0x40, - 0x2F, - 0x00, - 0x9C, - 0xA5, - 0x5A, - 0x00, - 0x0C, - /*03d0*/ 0xCF, - 0x00, - 0x0C, - 0x1C, - 0x40, - 0x2F, - 0x00, - 0x3C, - 0x00, - 0x00, - 0x00, - 0x01, - 0xCC, - 0x00, - 0x14, - 0x04, - /*03e0*/ 0x40, - 0x2F, - 0x00, - 0x90, - 0x80, - 0x00, - 0x00, - 0x00, - 0x40, - 0x2F, - 0x00, - 0x9C, - 0xA5, - 0x5A, - 0x00, - 0x0C, - /*03f0*/ 0xCF, - 0x00, - 0x0C, - 0x1C, - 0x40, - 0x2F, - 0x00, - 0x3C, - 0x00, - 0x00, - 0x00, - 0x01, - 0xCC, - 0x00, - 0x1C, - 0x04, - /*0400*/ 0x40, - 0x2F, - 0x00, - 0xA0, - 0x00, - 0x00, - 0x00, - 0x33, - 0x40, - 0x2F, - 0x00, - 0x90, - 0x80, - 0x00, - 0x00, - 0x00, - /*0410*/ 0x40, - 0x2F, - 0x00, - 0x9C, - 0xA5, - 0x5A, - 0x00, - 0x0A, - 0xCF, - 0x00, - 0x0C, - 0x1C, - 0x40, - 0x2F, - 0x00, - 0x3C, - /*0420*/ 0x00, - 0x00, - 0x00, - 0x01, - 0xCC, - 0x00, - 0x0C, - 0x04, - 0x40, - 0x2F, - 0x00, - 0x4C, - 0x50, - 0x07, - 0x0A, - 0x09, -}; diff --git a/Ubiquitous/Nuttx/aiit_board/xidatong/src/xip/imxrt_flexspi_nor_boot.h b/Ubiquitous/Nuttx/aiit_board/xidatong/src/xip/imxrt_flexspi_nor_boot.h deleted file mode 100644 index 47333fea7..000000000 --- a/Ubiquitous/Nuttx/aiit_board/xidatong/src/xip/imxrt_flexspi_nor_boot.h +++ /dev/null @@ -1,123 +0,0 @@ -/* - * Copyright 2017 NXP - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * o Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * o Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * o Neither the name of the copyright holder nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** -* @file imxrt_flexspi_nor_boot.h -* @brief support to register flexspi image vector table -* @version 2.0 -* @author AIIT XUOS Lab -* @date 2022-03-22 -*/ - -#ifndef __BOARDS_ARM_IMXRT_XIDATONG_SRC_IMXRT_FLEXSPI_NOR_BOOT_H -#define __BOARDS_ARM_IMXRT_XIDATONG_SRC_IMXRT_FLEXSPI_NOR_BOOT_H - -#include - -/************************************* - * IVT Data - *************************************/ -typedef struct _ivt_ { - /** @ref hdr with tag #HAB_TAG_IVT, length and HAB version fields - * (see @ref data) - */ - uint32_t hdr; - /** Absolute address of the first instruction to execute from the - * image - */ - uint32_t entry; - /** Reserved in this version of HAB: should be NULL. */ - uint32_t reserved1; - /** Absolute address of the image DCD: may be NULL. */ - uint32_t dcd; - /** Absolute address of the Boot Data: may be NULL, but not interpreted - * any further by HAB - */ - uint32_t boot_data; - /** Absolute address of the IVT.*/ - uint32_t self; - /** Absolute address of the image CSF.*/ - uint32_t csf; - /** Reserved in this version of HAB: should be zero. */ - uint32_t reserved2; -} ivt; - -#define IVT_MAJOR_VERSION 0x4 -#define IVT_MAJOR_VERSION_SHIFT 0x4 -#define IVT_MAJOR_VERSION_MASK 0xF -#define IVT_MINOR_VERSION 0x1 -#define IVT_MINOR_VERSION_SHIFT 0x0 -#define IVT_MINOR_VERSION_MASK 0xF - -#define IVT_VERSION(major, minor) \ - ((((major) & IVT_MAJOR_VERSION_MASK) << IVT_MAJOR_VERSION_SHIFT) | \ - (((minor) & IVT_MINOR_VERSION_MASK) << IVT_MINOR_VERSION_SHIFT)) - -#define IVT_TAG_HEADER (0xD1) /**< Image Vector Table */ -#define IVT_SIZE 0x2000 -#define IVT_PAR IVT_VERSION(IVT_MAJOR_VERSION, IVT_MINOR_VERSION) - -#define IVT_HEADER (IVT_TAG_HEADER | (IVT_SIZE << 8) | (IVT_PAR << 24)) -#define IVT_RSVD (uint32_t)(0x00000000) - - -/************************************* - * Boot Data - *************************************/ -typedef struct _boot_data_ { - uint32_t start; /* boot start location */ - uint32_t size; /* size */ - uint32_t plugin; /* plugin flag - 1 if downloaded application is plugin */ - uint32_t placeholder; /* placehoder to make even 0x10 size */ -}BOOT_DATA_T; - - -/************************************* - * DCD Data - *************************************/ -#define DCD_TAG_HEADER (0xD2) -#define DCD_TAG_HEADER_SHIFT (24) -#define DCD_VERSION (0x40) -#define DCD_ARRAY_SIZE 1 - -#define FLASH_BASE 0x60000000 -#define FLASH_END 0x7F7FFFFF -#define SCLK 1 - -#define DCD_ADDRESS dcd_sdram -#define BOOT_DATA_ADDRESS &boot_data -#define CSF_ADDRESS 0 -#define PLUGIN_FLAG (uint32_t)0 - -/* External Variables */ -//extern const uint8_t dcd_sdram[1044]; -extern const uint8_t dcd_sdram[1072]; -extern const BOOT_DATA_T boot_data; - -#endif diff --git a/Ubiquitous/Nuttx/aiit_board/xidatong/src/xip/imxrt_flexspi_nor_flash..c b/Ubiquitous/Nuttx/aiit_board/xidatong/src/xip/imxrt_flexspi_nor_flash..c deleted file mode 100644 index 046642656..000000000 --- a/Ubiquitous/Nuttx/aiit_board/xidatong/src/xip/imxrt_flexspi_nor_flash..c +++ /dev/null @@ -1,88 +0,0 @@ -/* - * Copyright 2017 NXP - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * o Redistributions of source code must retain the above copyright notice, this list - * of conditions and the following disclaimer. - * - * o Redistributions in binary form must reproduce the above copyright notice, this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * o Neither the name of the copyright holder nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** -* @file imxrt_flexspi_nor_flash..c -* @brief support to define flexspi flash config -* @version 2.0 -* @author AIIT XUOS Lab -* @date 2022-03-22 -*/ - -#include "imxrt_flexspi_nor_flash.h" - -/******************************************************************************* - * Code - ******************************************************************************/ -#if defined(__CC_ARM) || defined(__GNUC__) - __attribute__((section(".boot_hdr.conf"))) -#elif defined(__ICCARM__) -#pragma location=".boot_hdr.conf" -#endif - -const flexspi_nor_config_t Qspiflash_config = -{ - .memConfig = - { - .tag = FLEXSPI_CFG_BLK_TAG, - .version = FLEXSPI_CFG_BLK_VERSION, - .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackInternally, - .csHoldTime = 3u, - .csSetupTime = 3u, - .deviceModeCfgEnable = true, - .deviceModeType = 1,//Quad Enable command - .deviceModeSeq.seqNum = 1, - .deviceModeSeq.seqId = 4, - .deviceModeArg = 0x000200,//Set QE - .deviceType = kFlexSpiDeviceType_SerialNOR, - .sflashPadType = kSerialFlash_4Pads, - .serialClkFreq = kFlexSpiSerialClk_60MHz,//80MHz for Winbond, 100MHz for GD, 133MHz for ISSI - .sflashA1Size = 16u * 1024u * 1024u,//4MBytes - .dataValidTime = {16u, 16u}, - .lookupTable = - { -// //Fast Read Sequence -// [0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x0B, RADDR_SDR, FLEXSPI_1PAD, 0x18), -// [1] = FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_1PAD, 0x08, READ_SDR, FLEXSPI_1PAD, 0x08), -// [2] = FLEXSPI_LUT_SEQ(JMP_ON_CS, 0, 0, 0, 0, 0), - //Quad Input/output read sequence - [0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18), - [1] = FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04), - [2] = FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), - //Read Status - [1*4] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x04), - //Write Enable - [3*4] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06, STOP, 0, 0), - //Write status - [4*4] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x01, WRITE_SDR, FLEXSPI_1PAD, 0x2), - }, - }, - .pageSize = 256u, - .sectorSize = 4u * 1024u, -}; diff --git a/Ubiquitous/Nuttx/aiit_board/xidatong/src/xip/imxrt_flexspi_nor_flash.h b/Ubiquitous/Nuttx/aiit_board/xidatong/src/xip/imxrt_flexspi_nor_flash.h deleted file mode 100644 index 9bda424c3..000000000 --- a/Ubiquitous/Nuttx/aiit_board/xidatong/src/xip/imxrt_flexspi_nor_flash.h +++ /dev/null @@ -1,303 +0,0 @@ -/* - * Copyright (c) 2016, Freescale Semiconductor, Inc. - * Copyright 2016-2017 NXP - * - * Redistribution and use in source and binary forms, with or without - * modification, - * are permitted provided that the following conditions are met: - * - * o Redistributions of source code must retain the above copyright notice, this - * list - * of conditions and the following disclaimer. - * - * o Redistributions in binary form must reproduce the above copyright notice, - * this - * list of conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. - * - * o Neither the name of Freescale Semiconductor, Inc. nor the names of its - * contributors may be used to endorse or promote products derived from this - * software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** -* @file imxrt_flexspi_nor_flash..h -* @brief support to define flexspi flash config -* @version 2.0 -* @author AIIT XUOS Lab -* @date 2022-03-22 -*/ - -#ifndef __BOARDS_ARM_IMXRT_XIDATONG_SRC_IMXRT_FLEXSPI_NOR_FLASH_H -#define __BOARDS_ARM_IMXRT_XIDATONG_SRC_IMXRT_FLEXSPI_NOR_FLASH_H - -#include -#include -#include "fsl_common.h" - -/* FLEXSPI memory config block related defintions */ -#define FLEXSPI_CFG_BLK_TAG (0x42464346UL) // ascii "FCFB" Big Endian -#define FLEXSPI_CFG_BLK_VERSION (0x56010400UL) // V1.4.0 -#define FLEXSPI_CFG_BLK_SIZE (512) - -/* FLEXSPI Feature related definitions */ -#define FLEXSPI_FEATURE_HAS_PARALLEL_MODE 1 - -/* Lookup table related defintions */ -#define CMD_INDEX_READ 0 -#define CMD_INDEX_READSTATUS 1 -#define CMD_INDEX_WRITEENABLE 2 -#define CMD_INDEX_WRITE 4 - -#define CMD_LUT_SEQ_IDX_READ 0 -#define CMD_LUT_SEQ_IDX_READSTATUS 1 -#define CMD_LUT_SEQ_IDX_WRITEENABLE 3 -#define CMD_LUT_SEQ_IDX_WRITE 9 - -#define CMD_SDR 0x01 -#define CMD_DDR 0x21 -#define RADDR_SDR 0x02 -#define RADDR_DDR 0x22 -#define CADDR_SDR 0x03 -#define CADDR_DDR 0x23 -#define MODE1_SDR 0x04 -#define MODE1_DDR 0x24 -#define MODE2_SDR 0x05 -#define MODE2_DDR 0x25 -#define MODE4_SDR 0x06 -#define MODE4_DDR 0x26 -#define MODE8_SDR 0x07 -#define MODE8_DDR 0x27 -#define WRITE_SDR 0x08 -#define WRITE_DDR 0x28 -#define READ_SDR 0x09 -#define READ_DDR 0x29 -#define LEARN_SDR 0x0A -#define LEARN_DDR 0x2A -#define DATSZ_SDR 0x0B -#define DATSZ_DDR 0x2B -#define DUMMY_SDR 0x0C -#define DUMMY_DDR 0x2C -#define DUMMY_RWDS_SDR 0x0D -#define DUMMY_RWDS_DDR 0x2D -#define JMP_ON_CS 0x1F -#define STOP 0 - -#define FLEXSPI_1PAD 0 -#define FLEXSPI_2PAD 1 -#define FLEXSPI_4PAD 2 -#define FLEXSPI_8PAD 3 - -#define FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) \ - (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | \ - FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1)) - -//!@brief Definitions for FlexSPI Serial Clock Frequency -typedef enum _FlexSpiSerialClockFreq -{ - kFlexSpiSerialClk_30MHz = 1, - kFlexSpiSerialClk_50MHz = 2, - kFlexSpiSerialClk_60MHz = 3, - kFlexSpiSerialClk_75MHz = 4, - kFlexSpiSerialClk_80MHz = 5, - kFlexSpiSerialClk_100MHz = 6, - kFlexSpiSerialClk_133MHz = 7, - kFlexSpiSerialClk_166MHz = 8, - kFlexSpiSerialClk_200MHz = 9, -} flexspi_serial_clk_freq_t; - -//!@brief FlexSPI clock configuration type -enum -{ - kFlexSpiClk_SDR, //!< Clock configure for SDR mode - kFlexSpiClk_DDR, //!< Clock configurat for DDR mode -}; - -//!@brief FlexSPI Read Sample Clock Source definition -typedef enum _FlashReadSampleClkSource -{ - kFlexSPIReadSampleClk_LoopbackInternally = 0, - kFlexSPIReadSampleClk_LoopbackFromDqsPad = 1, - kFlexSPIReadSampleClk_LoopbackFromSckPad = 2, - kFlexSPIReadSampleClk_ExternalInputFromDqsPad = 3, -} flexspi_read_sample_clk_t; - - -//!@brief Misc feature bit definitions -enum -{ - kFlexSpiMiscOffset_DiffClkEnable = 0, //!< Bit for Differential clock enable - kFlexSpiMiscOffset_Ck2Enable = 1, //!< Bit for CK2 enable - kFlexSpiMiscOffset_ParallelEnable = 2, //!< Bit for Parallel mode enable - kFlexSpiMiscOffset_WordAddressableEnable = 3, //!< Bit for Word Addressable enable - kFlexSpiMiscOffset_SafeConfigFreqEnable = 4, //!< Bit for Safe Configuration Frequency enable - kFlexSpiMiscOffset_PadSettingOverrideEnable = 5, //!< Bit for Pad setting override enable - kFlexSpiMiscOffset_DdrModeEnable = 6, //!< Bit for DDR clock confiuration indication. -}; - -//!@brief Flash Type Definition -enum -{ - kFlexSpiDeviceType_SerialNOR = 1, //!< Flash devices are Serial NOR - kFlexSpiDeviceType_SerialNAND = 2, //!< Flash devices are Serial NAND - kFlexSpiDeviceType_SerialRAM = 3, //!< Flash devices are Serial RAM/HyperFLASH - kFlexSpiDeviceType_MCP_NOR_NAND = 0x12, //!< Flash device is MCP device, A1 is Serial NOR, A2 is Serial NAND - kFlexSpiDeviceType_MCP_NOR_RAM = 0x13, //!< Flash deivce is MCP device, A1 is Serial NOR, A2 is Serial RAMs -}; - -//!@brief Flash Pad Definitions -enum -{ - kSerialFlash_1Pad = 1, - kSerialFlash_2Pads = 2, - kSerialFlash_4Pads = 4, - kSerialFlash_8Pads = 8, -}; - -//!@brief FlexSPI LUT Sequence structure -typedef struct _lut_sequence -{ - uint8_t seqNum; //!< Sequence Number, valid number: 1-16 - uint8_t seqId; //!< Sequence Index, valid number: 0-15 - uint16_t reserved; -} flexspi_lut_seq_t; - -//!@brief Flash Configuration Command Type -enum -{ - kDeviceConfigCmdType_Generic, //!< Generic command, for example: configure dummy cycles, drive strength, etc - kDeviceConfigCmdType_QuadEnable, //!< Quad Enable command - kDeviceConfigCmdType_Spi2Xpi, //!< Switch from SPI to DPI/QPI/OPI mode - kDeviceConfigCmdType_Xpi2Spi, //!< Switch from DPI/QPI/OPI to SPI mode - kDeviceConfigCmdType_Spi2NoCmd, //!< Switch to 0-4-4/0-8-8 mode - kDeviceConfigCmdType_Reset, //!< Reset device command -}; - -//!@brief FlexSPI Memory Configuration Block -typedef struct _FlexSPIConfig -{ - uint32_t tag; //!< [0x000-0x003] Tag, fixed value 0x42464346UL - uint32_t version; //!< [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor, [7:0] - bugfix - uint32_t reserved0; //!< [0x008-0x00b] Reserved for future use - uint8_t readSampleClkSrc; //!< [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3 - uint8_t csHoldTime; //!< [0x00d-0x00d] CS hold time, default value: 3 - uint8_t csSetupTime; //!< [0x00e-0x00e] CS setup time, default value: 3 - uint8_t columnAddressWidth; //!< [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed to 3, For - //! Serial NAND, need to refer to datasheet - uint8_t deviceModeCfgEnable; //!< [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 - Disable - uint8_t deviceModeType; //!< [0x011-0x011] Specify the configuration command type:Quad Enable, DPI/QPI/OPI switch, - //! Generic configuration, etc. - uint16_t waitTimeCfgCommands; //!< [0x012-0x013] Wait time for all configuration commands, unit: 100us, Used for - //! DPI/QPI/OPI switch or reset command - flexspi_lut_seq_t deviceModeSeq; //!< [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id, [15:8] - LUt - //! sequence number, [31:16] Reserved - uint32_t deviceModeArg; //!< [0x018-0x01b] Argument/Parameter for device configuration - uint8_t configCmdEnable; //!< [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable - uint8_t configModeType[3]; //!< [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe - flexspi_lut_seq_t - configCmdSeqs[3]; //!< [0x020-0x02b] Sequence info for Device Configuration command, similar as deviceModeSeq - uint32_t reserved1; //!< [0x02c-0x02f] Reserved for future use - uint32_t configCmdArgs[3]; //!< [0x030-0x03b] Arguments/Parameters for device Configuration commands - uint32_t reserved2; //!< [0x03c-0x03f] Reserved for future use - uint32_t controllerMiscOption; //!< [0x040-0x043] Controller Misc Options, see Misc feature bit definitions for more - //! details - uint8_t deviceType; //!< [0x044-0x044] Device Type: See Flash Type Definition for more details - uint8_t sflashPadType; //!< [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8 - Octal - uint8_t serialClkFreq; //!< [0x046-0x046] Serial Flash Frequencey, device specific definitions, See System Boot - //! Chapter for more details - uint8_t lutCustomSeqEnable; //!< [0x047-0x047] LUT customization Enable, it is required if the program/erase cannot - //! be done using 1 LUT sequence, currently, only applicable to HyperFLASH - uint32_t reserved3[2]; //!< [0x048-0x04f] Reserved for future use - uint32_t sflashA1Size; //!< [0x050-0x053] Size of Flash connected to A1 - uint32_t sflashA2Size; //!< [0x054-0x057] Size of Flash connected to A2 - uint32_t sflashB1Size; //!< [0x058-0x05b] Size of Flash connected to B1 - uint32_t sflashB2Size; //!< [0x05c-0x05f] Size of Flash connected to B2 - uint32_t csPadSettingOverride; //!< [0x060-0x063] CS pad setting override value - uint32_t sclkPadSettingOverride; //!< [0x064-0x067] SCK pad setting override value - uint32_t dataPadSettingOverride; //!< [0x068-0x06b] data pad setting override value - uint32_t dqsPadSettingOverride; //!< [0x06c-0x06f] DQS pad setting override value - uint32_t timeoutInMs; //!< [0x070-0x073] Timeout threshold for read status command - uint32_t commandInterval; //!< [0x074-0x077] CS deselect interval between two commands - uint16_t dataValidTime[2]; //!< [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in terms of 0.1ns - uint16_t busyOffset; //!< [0x07c-0x07d] Busy offset, valid value: 0-31 - uint16_t busyBitPolarity; //!< [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device is busy, 1 - - //! busy flag is 0 when flash device is busy - uint32_t lookupTable[64]; //!< [0x080-0x17f] Lookup table holds Flash command sequences - flexspi_lut_seq_t lutCustomSeq[12]; //!< [0x180-0x1af] Customizable LUT Sequences - uint32_t reserved4[4]; //!< [0x1b0-0x1bf] Reserved for future use -} flexspi_mem_config_t; - -/* */ -#define NOR_CMD_INDEX_READ CMD_INDEX_READ //!< 0 -#define NOR_CMD_INDEX_READSTATUS CMD_INDEX_READSTATUS //!< 1 -#define NOR_CMD_INDEX_WRITEENABLE CMD_INDEX_WRITEENABLE //!< 2 -#define NOR_CMD_INDEX_ERASESECTOR 3 //!< 3 -#define NOR_CMD_INDEX_PAGEPROGRAM CMD_INDEX_WRITE //!< 4 -#define NOR_CMD_INDEX_CHIPERASE 5 //!< 5 -#define NOR_CMD_INDEX_DUMMY 6 //!< 6 -#define NOR_CMD_INDEX_ERASEBLOCK 7 //!< 7 - -#define NOR_CMD_LUT_SEQ_IDX_READ CMD_LUT_SEQ_IDX_READ //!< 0 READ LUT sequence id in lookupTable stored in config block -#define NOR_CMD_LUT_SEQ_IDX_READSTATUS \ - CMD_LUT_SEQ_IDX_READSTATUS //!< 1 Read Status LUT sequence id in lookupTable stored in config block -#define NOR_CMD_LUT_SEQ_IDX_READSTATUS_XPI \ - 2 //!< 2 Read status DPI/QPI/OPI sequence id in lookupTable stored in config block -#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE \ - CMD_LUT_SEQ_IDX_WRITEENABLE //!< 3 Write Enable sequence id in lookupTable stored in config block -#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE_XPI \ - 4 //!< 4 Write Enable DPI/QPI/OPI sequence id in lookupTable stored in config block -#define NOR_CMD_LUT_SEQ_IDX_ERASESECTOR 5 //!< 5 Erase Sector sequence id in lookupTable stored in config block -#define NOR_CMD_LUT_SEQ_IDX_ERASEBLOCK 8 //!< 8 Erase Block sequence id in lookupTable stored in config block -#define NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM \ - CMD_LUT_SEQ_IDX_WRITE //!< 9 Program sequence id in lookupTable stored in config block -#define NOR_CMD_LUT_SEQ_IDX_CHIPERASE 11 //!< 11 Chip Erase sequence in lookupTable id stored in config block -#define NOR_CMD_LUT_SEQ_IDX_READ_SFDP 13 //!< 13 Read SFDP sequence in lookupTable id stored in config block -#define NOR_CMD_LUT_SEQ_IDX_RESTORE_NOCMD \ - 14 //!< 14 Restore 0-4-4/0-8-8 mode sequence id in lookupTable stored in config block -#define NOR_CMD_LUT_SEQ_IDX_EXIT_NOCMD \ - 15 //!< 15 Exit 0-4-4/0-8-8 mode sequence id in lookupTable stored in config blobk - - -/* - * Serial NOR configuration block - */ -typedef struct _flexspi_nor_config -{ - flexspi_mem_config_t memConfig; //!< Common memory configuration info via FlexSPI - uint32_t pageSize; //!< Page size of Serial NOR - uint32_t sectorSize; //!< Sector size of Serial NOR - uint8_t ipcmdSerialClkFreq; //!< Clock frequency for IP command - uint8_t isUniformBlockSize; //!< Sector/Block size is the same - uint8_t reserved0[2]; //!< Reserved for future use - uint8_t serialNorType; //!< Serial NOR Flash type: 0/1/2/3 - uint8_t needExitNoCmdMode; //!< Need to exit NoCmd mode before other IP command - uint8_t halfClkForNonReadCmd; //!< Half the Serial Clock for non-read command: true/false - uint8_t needRestoreNoCmdMode; //!< Need to Restore NoCmd mode after IP commmand execution - uint32_t blockSize; //!< Block size - uint32_t reserve2[11]; //!< Reserved for future use -} flexspi_nor_config_t; - -#ifdef __cplusplus -extern "C" { -#endif - -#ifdef __cplusplus -} -#endif - -#endif // __FLEXSPI_NOR_FLASH_H__ From baae4c7204b9594982d676802fab6919a037fd97 Mon Sep 17 00:00:00 2001 From: wgzAIIT <820906721@qq.com> Date: Mon, 28 Mar 2022 15:59:22 +0800 Subject: [PATCH 7/7] xidatong support nuttx.bin --- Ubiquitous/Nuttx/aiit_board/xidatong/Kconfig | 4 +- .../xidatong/src/imxrt_flexspi_nor_flash.c | 138 ++++-------------- .../xidatong/src/imxrt_sdram_ini_dcd.c | 2 +- 3 files changed, 32 insertions(+), 112 deletions(-) diff --git a/Ubiquitous/Nuttx/aiit_board/xidatong/Kconfig b/Ubiquitous/Nuttx/aiit_board/xidatong/Kconfig index 9238d576f..27b484b4c 100644 --- a/Ubiquitous/Nuttx/aiit_board/xidatong/Kconfig +++ b/Ubiquitous/Nuttx/aiit_board/xidatong/Kconfig @@ -7,7 +7,7 @@ if ARCH_BOARD_XIDATONG choice prompt "Boot Flash" - default XIDATONG_HYPER_FLASH + default XIDATONG_QSPI_FLASH config XIDATONG_HYPER_FLASH bool "HYPER Flash" @@ -19,7 +19,7 @@ endchoice # Boot Flash config XIDATONG_SDRAM bool "Enable SDRAM" - default n + default y select IMXRT_SEMC_INIT_DONE ---help--- Activate DCD configuration of SDRAM diff --git a/Ubiquitous/Nuttx/aiit_board/xidatong/src/imxrt_flexspi_nor_flash.c b/Ubiquitous/Nuttx/aiit_board/xidatong/src/imxrt_flexspi_nor_flash.c index 5ca83cd80..b3ba34f0c 100644 --- a/Ubiquitous/Nuttx/aiit_board/xidatong/src/imxrt_flexspi_nor_flash.c +++ b/Ubiquitous/Nuttx/aiit_board/xidatong/src/imxrt_flexspi_nor_flash.c @@ -90,121 +90,41 @@ const struct flexspi_nor_config_s g_flash_config = { .mem_config = { - .tag = FLEXSPI_CFG_BLK_TAG, - .version = FLEXSPI_CFG_BLK_VERSION, - .read_sample_clksrc = FLASH_READ_SAMPLE_CLK_LOOPBACK_FROM_SCKPAD, - .cs_hold_time = 3u, - .cs_setup_time = 3u, - .column_address_width = 0u, - .device_type = FLEXSPI_DEVICE_TYPE_SERIAL_NOR, - .sflash_pad_type = SERIAL_FLASH_4PADS, - .serial_clk_freq = FLEXSPI_SERIAL_CLKFREQ_60MHz, - .sflash_a1size = 8u * 1024u * 1024u, - .data_valid_time = - { - 16u, 16u - }, - .lookup_table = + .tag = FLEXSPI_CFG_BLK_TAG, + .version = FLEXSPI_CFG_BLK_VERSION, + .read_sample_clksrc = FLASH_READ_SAMPLE_CLK_LOOPBACK_INTERNELLY, + .cs_hold_time = 3u, + .cs_setup_time = 3u, + .device_mode_cfg_enable = true, + .device_mode_type = 1, + .device_mode_seq.seq_num = 1, + .device_mode_seq.seq_id = 4, + .device_mode_arg = 0x000200, + .device_type = FLEXSPI_DEVICE_TYPE_SERIAL_NOR, + .sflash_pad_type = SERIAL_FLASH_4PADS, + .serial_clk_freq = FLEXSPI_SERIAL_CLKFREQ_60MHz, + .sflash_a1size = 16u * 1024u * 1024u, + .data_valid_time = {16u, 16u}, + + /* Enable DDR mode, Word addassable, + * Safe configuration, Differential clock + */ + .lookup_table = { - /* LUTs */ + /* Read LUTs */ + [0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18), + [1] = FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04), + [2] = FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), - /* 0 Fast read Quad IO DTR Mode Operation in SPI Mode (normal read) */ - - FLEXSPI_LUT_SEQ(CMD_SDR, - FLEXSPI_1PAD, 0xed, RADDR_DDR, FLEXSPI_4PAD, 0x18), - FLEXSPI_LUT_SEQ(DUMMY_DDR, - FLEXSPI_4PAD, 0x0c, READ_DDR, FLEXSPI_4PAD, 0x08), - FLEXSPI_LUT_SEQ(STOP, - FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0), - FLEXSPI_LUT_SEQ(STOP, - FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0), - - /* 1 Read Status */ - - FLEXSPI_LUT_SEQ(CMD_SDR, - FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x1), - FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0), - FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0), - FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0), - - /* 2 */ - - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - - /* 3 */ - - FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06, STOP, FLEXSPI_1PAD, 0x0), - FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0), - FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0), - FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0), - - /* 4 */ - - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - - /* 5 Erase Sector */ - - FLEXSPI_LUT_SEQ(CMD_SDR, - FLEXSPI_1PAD, 0xd7, RADDR_SDR, FLEXSPI_1PAD, 0x18), - FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0), - FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0), - FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0), - - /* 6 */ - - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - - /* 7 */ - - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - - /* 8 */ - - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - - /* 9 Page Program */ - - FLEXSPI_LUT_SEQ(CMD_SDR, - FLEXSPI_1PAD, 0x02, RADDR_SDR, FLEXSPI_1PAD, 0x18), - FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_1PAD, 0x8, STOP, FLEXSPI_1PAD, 0x0), - FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0), - FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0), - - /* 10 */ - - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - - /* 11 Chip Erase */ - - FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xc7, STOP, FLEXSPI_1PAD, 0x0), - FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0), - FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0), - FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0), + [1*4] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x04), + //Write Enable + [3*4] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06, STOP, 0, 0), + //Write status + [4*4] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x01, WRITE_SDR, FLEXSPI_1PAD, 0x2), }, }, - .page_size = 256u, .sector_size = 4u * 1024u, - .blocksize = 32u * 1024u, - .is_uniform_blocksize = false, }; #else # error Boot Flash type not chosen! diff --git a/Ubiquitous/Nuttx/aiit_board/xidatong/src/imxrt_sdram_ini_dcd.c b/Ubiquitous/Nuttx/aiit_board/xidatong/src/imxrt_sdram_ini_dcd.c index 10ffd2da3..91692c2b4 100644 --- a/Ubiquitous/Nuttx/aiit_board/xidatong/src/imxrt_sdram_ini_dcd.c +++ b/Ubiquitous/Nuttx/aiit_board/xidatong/src/imxrt_sdram_ini_dcd.c @@ -1256,7 +1256,7 @@ const uint8_t g_dcd_data[] = 0x00, 0x4c, 0x50, - 0x21, + 0x07, 0x0a, 0x09, };