forked from xuos/xiuos
add w5500 support.
This commit is contained in:
+70
-69
@@ -9,44 +9,49 @@
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*/
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/**
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* @file drv_io_config.c
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* @brief support xidatong-riscv64-board io configure
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* @version 2.0
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* @author AIIT XUOS Lab
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* @date 2022-07-25
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*/
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* @file drv_io_config.c
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* @brief support xidatong-riscv64-board io configure
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* @version 2.0
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* @author AIIT XUOS Lab
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* @date 2022-07-25
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*/
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/*************************************************
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File name: drv_io_config.c
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Description: support kd233-board io configure
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Others: take RT-Thread v4.0.2/bsp/k210/driver/drv_io_config.c for references
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https://github.com/RT-Thread/rt-thread/tree/v4.0.2
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History:
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History:
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1. Date: 2022-07-25
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Author: AIIT XUOS Lab
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Modification: support kd233-board io configure
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*************************************************/
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#include <xizi.h>
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#include <fpioa.h>
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#include "drv_io_config.h"
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#include <sysctl.h>
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#include <fpioa.h>
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#include <sysctl.h>
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#include <xizi.h>
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#define HS_GPIO(n) (FUNC_GPIOHS0 + n)
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#define IOCONFIG(pin,func) {pin, func, #func}
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#define IOCONFIG(pin, func) \
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{ pin, func, #func }
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static struct io_config
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{
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int io_num;
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fpioa_function_t func;
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const char * FuncName;
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} io_config[] =
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{
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static struct io_config {
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int io_num;
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fpioa_function_t func;
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const char* FuncName;
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} io_config[] = {
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#ifdef BSP_USING_LCD
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IOCONFIG(BSP_LCD_CS_PIN, FUNC_SPI0_SS0),
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IOCONFIG(BSP_LCD_WR_PIN, FUNC_SPI0_SCLK),
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IOCONFIG(BSP_LCD_DC_PIN, HS_GPIO(LCD_DC_PIN)),
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IOCONFIG(BSP_LCD_CS_PIN, FUNC_SPI0_SS0),
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IOCONFIG(BSP_LCD_WR_PIN, FUNC_SPI0_SCLK),
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IOCONFIG(BSP_LCD_DC_PIN, HS_GPIO(LCD_DC_PIN)),
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#endif
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#ifdef BSP_USING_W5500
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IOCONFIG(BSP_WIZ_RST_PIN, HS_GPIO(WIZ_RST_PIN)),
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IOCONFIG(BSP_WIZ_INT_PIN, HS_GPIO(WIZ_INT_PIN)),
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#endif
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#ifdef BSP_USING_SPI1
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@@ -83,63 +88,59 @@ static struct io_config
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#endif
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#ifdef BSP_USING_CH438
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IOCONFIG(BSP_CH438_ALE_PIN, HS_GPIO(FPIOA_CH438_ALE)),
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IOCONFIG(BSP_CH438_NWR_PIN, HS_GPIO(FPIOA_CH438_NWR)),
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IOCONFIG(BSP_CH438_NRD_PIN, HS_GPIO(FPIOA_CH438_NRD)),
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IOCONFIG(BSP_CH438_INT_PIN, HS_GPIO(FPIOA_CH438_INT)),
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IOCONFIG(BSP_CH438_D0_PIN, HS_GPIO(FPIOA_CH438_D0)),
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IOCONFIG(BSP_CH438_D1_PIN, HS_GPIO(FPIOA_CH438_D1)),
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IOCONFIG(BSP_CH438_D2_PIN, HS_GPIO(FPIOA_CH438_D2)),
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IOCONFIG(BSP_CH438_D3_PIN, HS_GPIO(FPIOA_CH438_D3)),
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IOCONFIG(BSP_CH438_D4_PIN, HS_GPIO(FPIOA_CH438_D4)),
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IOCONFIG(BSP_CH438_D5_PIN, HS_GPIO(FPIOA_CH438_D5)),
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IOCONFIG(BSP_CH438_D6_PIN, HS_GPIO(FPIOA_CH438_D6)),
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IOCONFIG(BSP_CH438_D7_PIN, HS_GPIO(FPIOA_CH438_D7))
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IOCONFIG(BSP_CH438_ALE_PIN, HS_GPIO(FPIOA_CH438_ALE)),
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IOCONFIG(BSP_CH438_NWR_PIN, HS_GPIO(FPIOA_CH438_NWR)),
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IOCONFIG(BSP_CH438_NRD_PIN, HS_GPIO(FPIOA_CH438_NRD)),
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IOCONFIG(BSP_CH438_INT_PIN, HS_GPIO(FPIOA_CH438_INT)),
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IOCONFIG(BSP_CH438_D0_PIN, HS_GPIO(FPIOA_CH438_D0)),
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IOCONFIG(BSP_CH438_D1_PIN, HS_GPIO(FPIOA_CH438_D1)),
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IOCONFIG(BSP_CH438_D2_PIN, HS_GPIO(FPIOA_CH438_D2)),
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IOCONFIG(BSP_CH438_D3_PIN, HS_GPIO(FPIOA_CH438_D3)),
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IOCONFIG(BSP_CH438_D4_PIN, HS_GPIO(FPIOA_CH438_D4)),
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IOCONFIG(BSP_CH438_D5_PIN, HS_GPIO(FPIOA_CH438_D5)),
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IOCONFIG(BSP_CH438_D6_PIN, HS_GPIO(FPIOA_CH438_D6)),
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IOCONFIG(BSP_CH438_D7_PIN, HS_GPIO(FPIOA_CH438_D7))
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#endif
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};
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static int PrintIoConfig()
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{
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int i;
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KPrintf("IO Configuration Table\n");
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KPrintf("┌───────┬────────────────────────┐\n");
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KPrintf("│Pin │Function │\n");
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KPrintf("├───────┼────────────────────────┤\n");
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for(i = 0; i < sizeof io_config / sizeof io_config[0]; i++)
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{
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KPrintf("│%-2d │%-24.24s│\n", io_config[i].io_num, io_config[i].FuncName);
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}
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KPrintf("└───────┴────────────────────────┘\n");
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return 0;
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static int PrintIoConfig() {
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int i;
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KPrintf("IO Configuration Table\n");
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KPrintf("┌───────┬────────────────────────┐\n");
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KPrintf("│Pin │Function │\n");
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KPrintf("├───────┼────────────────────────┤\n");
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for (i = 0; i < sizeof io_config / sizeof io_config[0]; i++) {
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KPrintf("│%-2d │%-24.24s│\n", io_config[i].io_num,
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io_config[i].FuncName);
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}
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KPrintf("└───────┴────────────────────────┘\n");
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return 0;
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}
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SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_FUNC)|SHELL_CMD_PARAM_NUM(0),
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io,PrintIoConfig,print io config);
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SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0) | SHELL_CMD_TYPE(SHELL_TYPE_CMD_FUNC) |
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SHELL_CMD_PARAM_NUM(0),
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io, PrintIoConfig, print io config);
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int IoConfigInit(void)
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{
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int count = sizeof(io_config) / sizeof(io_config[0]);
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int i;
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int ret = 0;
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int IoConfigInit(void) {
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int count = sizeof(io_config) / sizeof(io_config[0]);
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int i;
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int ret = 0;
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sysctl_set_power_mode(SYSCTL_POWER_BANK0, SYSCTL_POWER_V18);
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sysctl_set_power_mode(SYSCTL_POWER_BANK1, SYSCTL_POWER_V18);
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sysctl_set_power_mode(SYSCTL_POWER_BANK2, SYSCTL_POWER_V18);
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sysctl_set_power_mode(SYSCTL_POWER_BANK0, SYSCTL_POWER_V18);
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sysctl_set_power_mode(SYSCTL_POWER_BANK1, SYSCTL_POWER_V18);
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sysctl_set_power_mode(SYSCTL_POWER_BANK2, SYSCTL_POWER_V18);
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#ifdef BSP_USING_UART2
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// for IO-27/28
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sysctl_set_power_mode(SYSCTL_POWER_BANK4, SYSCTL_POWER_V33);
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// for IO-27/28
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sysctl_set_power_mode(SYSCTL_POWER_BANK4, SYSCTL_POWER_V33);
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#endif
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#if defined(BSP_USING_UART1) || defined(BSP_USING_UART3)
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// for IO-20~23
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sysctl_set_power_mode(SYSCTL_POWER_BANK3, SYSCTL_POWER_V33);
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#if defined(BSP_USING_UART1) || defined(BSP_USING_UART3)
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// for IO-20~23
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sysctl_set_power_mode(SYSCTL_POWER_BANK3, SYSCTL_POWER_V33);
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#endif
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for(i = 0; i < count; i++)
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{
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ret = FpioaSetFunction(io_config[i].io_num, io_config[i].func);
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if(ret != 0)
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return ret;
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}
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for (i = 0; i < count; i++) {
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ret = FpioaSetFunction(io_config[i].io_num, io_config[i].func);
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if (ret != 0) return ret;
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}
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return ret;
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return ret;
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}
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@@ -26,6 +26,7 @@
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#include "utils.h"
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#include "fpioa.h"
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#include "sysctl.h"
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#include <xs_base.h>
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#define GPIO_MAX_PINNO 8
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volatile gpio_t* const gpio = (volatile gpio_t*)GPIO_BASE_ADDR;
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