forked from xuos/xiuos
fix adc/dac funciton error on edu-arm32 baord
This commit is contained in:
Liu_Weichao
parent
8c1ad40f81
commit
5f642507b4
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@ -26,9 +26,8 @@
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void TestAdc(void)
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{
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int adc_fd;
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uint8 adc_channel = 0x0;
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uint16 adc_sample, adc_value_decimal = 0;
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float adc_value;
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uint8 adc_channel = 0x1;
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uint16 adc_sample = 0;
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adc_fd = PrivOpen(ADC_DEV_DRIVER, O_RDWR);
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if (adc_fd < 0) {
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@ -45,13 +44,11 @@ void TestAdc(void)
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return;
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}
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PrivRead(adc_fd, &adc_sample, 2);
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adc_value = (float)adc_sample * (3.3 / 4096);
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adc_value_decimal = (adc_value - (uint16)adc_value) * 1000;
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printf("adc sample %u value integer %u decimal %u\n", adc_sample, (uint16)adc_value, adc_value_decimal);
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for (int i = 0; i < 10; i ++) {
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PrivRead(adc_fd, &adc_sample, 2);
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printf("adc sample %u mv\n", adc_sample);
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PrivTaskDelay(500);
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}
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PrivClose(adc_fd);
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@ -22,17 +22,16 @@
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#include <transform.h>
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#ifdef ADD_XIZI_FEATURES
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void TestDac(void)
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static pthread_t test_dac_task;
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static void *TestDacTask(void *parameter)
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{
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int dac_fd;
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uint16 dac_set_value = 800;
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uint16 dac_sample, dac_value_decimal = 0;
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float dac_value;
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uint16 dac_set_value = 4096 * 10;//sin length
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dac_fd = PrivOpen(DAC_DEV_DRIVER, O_RDWR);
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if (dac_fd < 0) {
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KPrintf("open dac fd error %d\n", dac_fd);
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return;
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}
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struct PrivIoctlCfg ioctl_cfg;
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@ -41,20 +40,24 @@ void TestDac(void)
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if (0 != PrivIoctl(dac_fd, OPE_CFG, &ioctl_cfg)) {
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KPrintf("ioctl dac fd error %d\n", dac_fd);
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PrivClose(dac_fd);
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return;
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}
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PrivRead(dac_fd, &dac_sample, 2);
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dac_value = (float)dac_sample * (3.3 / 4096);//Vref+ need to be 3.3V
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dac_value_decimal = (dac_value - (uint16)dac_value) * 1000;
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printf("dac sample %u value integer %u decimal %u\n", dac_sample, (uint16)dac_value, dac_value_decimal);
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while (1) {
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//start dac output sin
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PrivWrite(dac_fd, NULL, 0);
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}
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PrivClose(dac_fd);
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}
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return;
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void TestDac(void)
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{
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pthread_attr_t tid;
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tid.schedparam.sched_priority = 20;
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tid.stacksize = 4096;
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PrivTaskCreate(&test_dac_task, &tid, &TestDacTask, NULL);
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PrivTaskStartup(&test_dac_task);
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}
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PRIV_SHELL_CMD_FUNCTION(TestDac, a dac test sample, PRIV_SHELL_CMD_MAIN_ATTR);
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#endif
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@ -28,11 +28,11 @@
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static uint16_t pin_fd=0;
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static struct PinStat pin_led;
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void ledflip(void *parameter)
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void LedFlip(void *parameter)
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{
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pin_led.pin = BSP_LED_PIN;
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pin_led.val = !pin_led.val;
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PrivWrite(pin_fd,&pin_led,NULL_PARAMETER);
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PrivWrite(pin_fd, &pin_led, NULL_PARAMETER);
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}
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void TestHwTimer(void)
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@ -40,22 +40,22 @@ void TestHwTimer(void)
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x_ticks_t period = 100000;
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pin_fd = PrivOpen(HWTIMER_PIN_DEV_DRIVER, O_RDWR);
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if(pin_fd<0){
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if(pin_fd<0) {
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printf("open pin fd error:%d\n",pin_fd);
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return;
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}
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int timer_fd = PrivOpen(HWTIMER_TIMER_DEV_DRIVER, O_RDWR);
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if(timer_fd<0){
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if(timer_fd<0) {
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printf("open timer fd error:%d\n",timer_fd);
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return;
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}
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//config led pin in board
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struct PinParam parameter;
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parameter.cmd = GPIO_CONFIG_MODE;
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parameter.pin = BSP_LED_PIN;
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parameter.mode = GPIO_CFG_OUTPUT;
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struct PinParam parameter;
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parameter.cmd = GPIO_CONFIG_MODE;
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parameter.pin = BSP_LED_PIN;
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parameter.mode = GPIO_CFG_OUTPUT;
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struct PrivIoctlCfg ioctl_cfg;
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ioctl_cfg.ioctl_driver_type = PIN_TYPE;
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@ -68,7 +68,7 @@ void TestHwTimer(void)
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}
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ioctl_cfg.ioctl_driver_type = TIME_TYPE;
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ioctl_cfg.args = (void *)&ledflip;
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ioctl_cfg.args = (void *)&LedFlip;
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if (0 != PrivIoctl(timer_fd, OPE_INT, &ioctl_cfg)) {
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printf("timer pin fd error %d\n", pin_fd);
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PrivClose(pin_fd);
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@ -82,13 +82,10 @@ void TestHwTimer(void)
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return;
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}
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while(1){
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while(1) {
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}
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// int32 timer_handle = KCreateTimer("LED on and off by 1s",&ledflip,&pin_fd,period,TIMER_TRIGGER_PERIODIC);
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// KTimerStartRun(timer_handle);
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PrivClose(pin_fd);
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PrivClose(timer_fd);
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}
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@ -1,74 +1,13 @@
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menuconfig BSP_USING_ADC1
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bool "Enable ADC1"
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default y
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if BSP_USING_ADC1
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config ADC1_BUS_NAME
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string "adc 1 bus name"
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default "adc1"
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if BSP_USING_ADC
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config ADC1_BUS_NAME
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string "adc 1 bus name"
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default "adc1"
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config ADC1_DRIVER_NAME
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string "adc 1 driver name"
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default "adc1_drv"
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config ADC1_DRIVER_NAME
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string "adc 1 driver name"
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default "adc1_drv"
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config ADC1_DEVICE_NAME
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string "adc 1 bus device name"
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default "adc1_dev"
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config ADC1_GPIO_NUM
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int "adc 1 gpio pin num"
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default "0"
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config ADC1_GPIO_DEF
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string "adc 1 gpio define type"
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default "A"
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endif
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menuconfig BSP_USING_ADC2
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bool "Enable ADC2"
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default y
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if BSP_USING_ADC2
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config ADC2_BUS_NAME
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string "adc 2 bus name"
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default "adc2"
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config ADC2_DRIVER_NAME
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string "adc 2 driver name"
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default "adc2_drv"
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config ADC2_DEVICE_NAME
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string "adc 2 bus device name"
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default "adc2_dev"
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config ADC2_GPIO_NUM
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int "adc 2 gpio pin num"
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default "6"
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config ADC2_GPIO_DEF
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string "adc 2 gpio define type"
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default "A"
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endif
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menuconfig BSP_USING_ADC3
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bool "Enable ADC3"
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default y
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if BSP_USING_ADC3
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config ADC3_BUS_NAME
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string "adc 3 bus name"
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default "adc3"
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config ADC3_DRIVER_NAME
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string "adc 3 driver name"
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default "adc3_drv"
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config ADC3_DEVICE_NAME
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string "adc 3 bus device name"
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default "adc3_dev"
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config ADC3_GPIO_NUM
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int "adc 3 gpio pin num"
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default "0"
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config ADC3_GPIO_DEF
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string "adc 3 gpio define type"
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default "A"
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endif
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config ADC1_DEVICE_NAME
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string "adc 1 bus device name"
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default "adc1_dev"
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endif
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@ -20,79 +20,251 @@
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#include <connect_adc.h>
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#define _ADC_CONS(string1, string2) string1##string2
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#define ADC_CONS(string1, string2) _ADC_CONS(string1, string2)
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/*******************************************************************************
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* Local pre-processor symbols/macros ('#define')
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******************************************************************************/
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#ifdef BSP_USING_ADC1
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#define ADC1_GPIO ADC_CONS(GPIO_Pin_, ADC1_GPIO_NUM)
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/* The clock source of ADC. */
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#define ADC_CLK_SYS_CLK (1U)
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#define ADC_CLK_PLLH (2U)
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#define ADC_CLK_PLLA (3U)
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/*
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* Selects a clock source according to the application requirements.
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* PCLK4 is the clock for digital interface.
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* PCLK2 is the clock for analog circuit.
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* PCLK4 and PCLK2 are synchronous when the clock source is PLL.
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* PCLK4 : PCLK2 = 1:1, 2:1, 4:1, 8:1, 1:2, 1:4.
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* PCLK2 is in range [1MHz, 60MHz].
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* If the system clock is selected as the ADC clock, macro 'ADC_ADC_CLK' can only be defined as 'CLK_PERIPHCLK_PCLK'.
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* If PLLH is selected as the ADC clock, macro 'ADC_ADC_CLK' can be defined as 'CLK_PERIPHCLK_PLLx'(x=Q, R).
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* If PLLA is selected as the ADC clock, macro 'ADC_ADC_CLK' can be defined as 'CLK_PERIPHCLK_PLLXx'(x=P, Q, R).
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*/
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#define ADC_CLK_SEL (ADC_CLK_SYS_CLK)
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#if (ADC_CLK_SEL == ADC_CLK_SYS_CLK)
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#define ADC_CLK (CLK_PERIPHCLK_PCLK)
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#elif (ADC_CLK_SEL == ADC_CLK_PLLH)
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#define ADC_CLK (CLK_PERIPHCLK_PLLQ)
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#elif (ADC_CLK_SEL == ADC_CLK_PLLA)
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#define ADC_CLK (CLK_PERIPHCLK_PLLXP)
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#else
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#error "The clock source your selected does not exist!!!"
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#endif
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#ifdef BSP_USING_ADC2
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#define ADC2_GPIO ADC_CONS(GPIO_Pin_, ADC2_GPIO_NUM)
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#endif
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/* ADC unit instance for this example. */
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#define ADC_UNIT (CM_ADC1)
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#define ADC_PERIPH_CLK (FCG3_PERIPH_ADC1)
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#ifdef BSP_USING_ADC3
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#define ADC3_GPIO ADC_CONS(GPIO_Pin_, ADC3_GPIO_NUM)
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#endif
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/* Selects ADC channels that needed. */
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#define ADC_CH_POTENTIOMETER (ADC_CH3)
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#define ADC_CH (ADC_CH_POTENTIOMETER)
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#define ADC_CH_PORT (GPIO_PORT_A)
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#define ADC_CH_PIN (GPIO_PIN_03)
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static int AdcUdelay(uint32 us)
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/* ADC sequence to be used. */
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#define ADC_SEQ (ADC_SEQ_A)
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/* Flag of conversion end. */
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#define ADC_EOC_FLAG (ADC_FLAG_EOCA)
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/* ADC reference voltage. The voltage of pin VREFH. */
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#define ADC_VREF (3.3F)
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/* ADC accuracy(according to the resolution of ADC). */
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#define ADC_ACCURACY (1UL << 12U)
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/* Calculate the voltage(mV). */
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#define ADC_CAL_VOL(adcVal) (uint16_t)((((float32_t)(adcVal) * ADC_VREF) / ((float32_t)ADC_ACCURACY)) * 1000.F)
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/* Timeout value. */
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#define ADC_TIMEOUT_VAL (1000U)
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/**
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* @brief Set specified ADC pin to analog mode.
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* @param None
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* @retval None
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*/
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static void AdcSetPinAnalogMode(void)
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{
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uint32 ticks;
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uint32 told, tnow, tcnt = 0;
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uint32 reload = SysTick->LOAD;
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stc_gpio_init_t stcGpioInit;
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ticks = us * reload / (1000000 / TICK_PER_SECOND);
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told = SysTick->VAL;
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while (1) {
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tnow = SysTick->VAL;
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if (tnow != told) {
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if (tnow < told) {
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tcnt += told - tnow;
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} else {
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tcnt += reload - tnow + told;
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}
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told = tnow;
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if (tcnt >= ticks) {
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return 0;
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break;
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}
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}
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}
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(void)GPIO_StructInit(&stcGpioInit);
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stcGpioInit.u16PinAttr = PIN_ATTR_ANALOG;
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(void)GPIO_Init(ADC_CH_PORT, ADC_CH_PIN, &stcGpioInit);
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}
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static uint16 GetAdcAverageValue(CM_ADC_TypeDef *ADCx, uint8 channel, uint8 times)
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/**
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* @brief Configures ADC clock.
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* @param None
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* @retval None
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*/
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static void AdcClockConfig(void)
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{
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uint32 temp_val = 0;
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int i;
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#if (ADC_CLK_SEL == ADC_CLK_SYS_CLK)
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/*
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* 1. Configures the clock divider of PCLK2 and PCLK4 here or in the function of configuring the system clock.
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* In this example, the system clock is MRC@8MHz.
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* PCLK4 is the digital interface clock, and PCLK2 is the analog circuit clock.
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* Make sure that PCLK2 and PCLK4 meet the following conditions:
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* PCLK4 : PCLK2 = 1:1, 2:1, 4:1, 8:1, 1:2, 1:4.
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* PCLK2 is in range [1MHz, 60MHz].
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*/
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CLK_SetClockDiv((CLK_BUS_PCLK2 | CLK_BUS_PCLK4), (CLK_PCLK2_DIV8 | CLK_PCLK4_DIV2));
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for(i = 0;i < times;i ++) {
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temp_val += ADC_GetValue(ADCx, channel) & 0x0FFF;
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KPrintf("GetAdcAverageValue val %u\n", ADC_GetValue(ADCx, channel));
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AdcUdelay(5000);
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}
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return temp_val / times;
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}
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#elif (ADC_CLK_SEL == ADC_CLK_PLLH)
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/*
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* 1. Configures PLLH and the divider of PLLHx(x=Q, R).
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* PLLHx(x=Q, R) is used as both the digital interface clock and the analog circuit clock.
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* PLLHx(x=Q, R) must be in range [1MHz, 60MHz] for ADC use.
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* The input source of PLLH is XTAL(8MHz).
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*/
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stc_clock_pll_init_t stcPLLHInit;
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stc_clock_xtal_init_t stcXtalInit;
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/* Configures XTAL. PLLH input source is XTAL. */
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(void)CLK_XtalStructInit(&stcXtalInit);
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stcXtalInit.u8State = CLK_XTAL_ON;
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stcXtalInit.u8Drv = CLK_XTAL_DRV_ULOW;
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stcXtalInit.u8Mode = CLK_XTAL_MD_OSC;
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stcXtalInit.u8StableTime = CLK_XTAL_STB_499US;
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(void)CLK_XtalInit(&stcXtalInit);
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(void)CLK_PLLStructInit(&stcPLLHInit);
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/*
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* PLLHx(x=Q, R) = ((PLL_source / PLLM) * PLLN) / PLLx
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* PLLHQ = (8 / 1) * 80 /16 = 40MHz
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* PLLHR = (8 / 1) * 80 /16 = 40MHz
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*/
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stcPLLHInit.u8PLLState = CLK_PLL_ON;
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stcPLLHInit.PLLCFGR = 0UL;
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stcPLLHInit.PLLCFGR_f.PLLM = (1UL - 1UL);
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stcPLLHInit.PLLCFGR_f.PLLN = (80UL - 1UL);
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stcPLLHInit.PLLCFGR_f.PLLP = (4UL - 1UL);
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stcPLLHInit.PLLCFGR_f.PLLQ = (16UL - 1UL);
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stcPLLHInit.PLLCFGR_f.PLLR = (16UL - 1UL);
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/* stcPLLHInit.PLLCFGR_f.PLLSRC = CLK_PLL_SRC_XTAL; */
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(void)CLK_PLLInit(&stcPLLHInit);
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#elif (ADC_CLK_SEL == ADC_CLK_PLLA)
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/*
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* 1. Configures PLLA and the divider of PLLAx(x=P, Q, R).
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* PLLAx(x=P, Q, R) is used as both the digital interface clock and the analog circuit clock.
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* PLLAx(x=P, Q, R) must be in range [1MHz, 60MHz] for ADC use.
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* The input source of PLLA is HRC(16MHz).
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*/
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stc_clock_pllx_init_t stcPLLAInit;
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/* Enable HRC(16MHz) for PLLA. */
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CLK_HrcCmd(ENABLE);
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/* Specify the input source of PLLA. NOTE!!! PLLA and PLLH use the same input source. */
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CLK_SetPLLSrc(CLK_PLL_SRC_HRC);
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/* PLLA configuration */
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(void)CLK_PLLxStructInit(&stcPLLAInit);
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/*
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* PLLAx(x=P, Q, R) = ((PLL_source / PLLM) * PLLN) / PLLx
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* PLLAP = (16 / 2) * 40 / 8 = 40MHz
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* PLLAQ = (16 / 2) * 40 / 10 = 32MHz
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* PLLAR = (16 / 2) * 40 / 16 = 20MHz
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*/
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stcPLLAInit.u8PLLState = CLK_PLLX_ON;
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stcPLLAInit.PLLCFGR = 0UL;
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stcPLLAInit.PLLCFGR_f.PLLM = (2UL - 1UL);
|
||||
stcPLLAInit.PLLCFGR_f.PLLN = (40UL - 1UL);
|
||||
stcPLLAInit.PLLCFGR_f.PLLR = (8UL - 1UL);
|
||||
stcPLLAInit.PLLCFGR_f.PLLQ = (10UL - 1UL);
|
||||
stcPLLAInit.PLLCFGR_f.PLLP = (16UL - 1UL);
|
||||
(void)CLK_PLLxInit(&stcPLLAInit);
|
||||
#endif
|
||||
/* 2. Specifies the clock source of ADC. */
|
||||
CLK_SetPeriClockSrc(ADC_CLK);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes ADC.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void AdcInitConfig(void)
|
||||
{
|
||||
stc_adc_init_t stcAdcInit;
|
||||
|
||||
/* 1. Enable ADC peripheral clock. */
|
||||
FCG_Fcg3PeriphClockCmd(ADC_PERIPH_CLK, ENABLE);
|
||||
|
||||
/* 2. Modify the default value depends on the application. Not needed here. */
|
||||
(void)ADC_StructInit(&stcAdcInit);
|
||||
|
||||
/* 3. Initializes ADC. */
|
||||
(void)ADC_Init(ADC_UNIT, &stcAdcInit);
|
||||
|
||||
/* 4. ADC channel configuration. */
|
||||
/* 4.1 Set the ADC pin to analog input mode. */
|
||||
AdcSetPinAnalogMode();
|
||||
/* 4.2 Enable ADC channels. Call ADC_ChCmd() again to enable more channels if needed. */
|
||||
ADC_ChCmd(ADC_UNIT, ADC_SEQ, ADC_CH, ENABLE);
|
||||
|
||||
/* 5. Conversion data average calculation function, if needed.
|
||||
Call ADC_ConvDataAverageChCmd() again to enable more average channels if needed. */
|
||||
ADC_ConvDataAverageConfig(ADC_UNIT, ADC_AVG_CNT8);
|
||||
ADC_ConvDataAverageChCmd(ADC_UNIT, ADC_CH, ENABLE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Use ADC in polling mode.
|
||||
* @param None
|
||||
* @retval uint16_t u16AdcValue
|
||||
*/
|
||||
static uint16_t AdcPolling(void)
|
||||
{
|
||||
uint16_t u16AdcValue = 0;
|
||||
int32_t iRet = LL_ERR;
|
||||
__IO uint32_t u32TimeCount = 0UL;
|
||||
|
||||
/* Can ONLY start sequence A conversion.
|
||||
Sequence B needs hardware trigger to start conversion. */
|
||||
ADC_Start(ADC_UNIT);
|
||||
do {
|
||||
if (ADC_GetStatus(ADC_UNIT, ADC_EOC_FLAG) == SET) {
|
||||
ADC_ClearStatus(ADC_UNIT, ADC_EOC_FLAG);
|
||||
iRet = LL_OK;
|
||||
break;
|
||||
}
|
||||
} while (u32TimeCount++ < ADC_TIMEOUT_VAL);
|
||||
|
||||
if (iRet == LL_OK) {
|
||||
/* Get any ADC value of sequence A channel that needed. */
|
||||
u16AdcValue = ADC_GetValue(ADC_UNIT, ADC_CH);
|
||||
KPrintf("The ADC value of potentiometer is %u, voltage is %u mV\r\n",
|
||||
u16AdcValue, ADC_CAL_VOL(u16AdcValue));
|
||||
} else {
|
||||
ADC_Stop(ADC_UNIT);
|
||||
KPrintf("ADC exception.\r\n");
|
||||
}
|
||||
|
||||
return ADC_CAL_VOL(u16AdcValue);
|
||||
}
|
||||
|
||||
static uint32 AdcOpen(void *dev)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
stc_adc_init_t stcAdcInit;
|
||||
ADC_StructInit(&stcAdcInit);
|
||||
struct AdcHardwareDevice* adc_dev = (struct AdcHardwareDevice*)dev;
|
||||
CM_ADC_TypeDef *ADCx= (CM_ADC_TypeDef *)adc_dev->private_data;
|
||||
ADC_Init((ADCx),&stcAdcInit);
|
||||
|
||||
AdcClockConfig();
|
||||
AdcInitConfig();
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
static uint32 AdcClose(void *dev)
|
||||
{
|
||||
// CM_ADC_TypeDef *adc_dev = (CM_ADC_TypeDef*)dev;
|
||||
struct AdcHardwareDevice* adc_dev = (struct AdcHardwareDevice*)dev;
|
||||
|
||||
CM_ADC_TypeDef *ADCx= (CM_ADC_TypeDef *)adc_dev->private_data;
|
||||
|
||||
|
||||
ADC_Stop(ADC_UNIT);
|
||||
ADC_DeInit(ADCx);
|
||||
|
||||
return EOK;
|
||||
|
|
@ -100,19 +272,10 @@ static uint32 AdcClose(void *dev)
|
|||
|
||||
static uint32 AdcRead(void *dev, struct BusBlockReadParam *read_param)
|
||||
{
|
||||
struct AdcHardwareDevice *adc_dev = (struct AdcHardwareDevice *)dev;
|
||||
*(uint16 *)read_param->buffer = AdcPolling();
|
||||
read_param->read_length = 2;
|
||||
|
||||
struct HwAdc *adc_cfg = (struct HwAdc *)adc_dev->haldev.private_data;
|
||||
|
||||
uint16 adc_average_value = 0;
|
||||
uint8 times = 20;
|
||||
|
||||
adc_average_value = GetAdcAverageValue(adc_cfg->ADCx, adc_cfg->adc_channel, times);
|
||||
|
||||
*(uint16 *)read_param->buffer = adc_average_value;
|
||||
read_param->read_length = 2;
|
||||
|
||||
return read_param->read_length;
|
||||
return EOK;
|
||||
}
|
||||
|
||||
static uint32 AdcDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
|
||||
|
|
@ -131,9 +294,9 @@ static uint32 AdcDrvConfigure(void *drv, struct BusConfigureInfo *configure_info
|
|||
{
|
||||
case OPE_CFG:
|
||||
adc_cfg->adc_channel = *(uint8 *)configure_info->private_data;
|
||||
if (adc_cfg->adc_channel > 18) {
|
||||
KPrintf("AdcDrvConfigure set adc channel(0-18) %u error!", adc_cfg->adc_channel);
|
||||
adc_cfg->adc_channel = 0;
|
||||
if (adc_cfg->adc_channel != 1) {
|
||||
KPrintf("AdcDrvConfigure set adc channel(1) %u error!", adc_cfg->adc_channel);
|
||||
adc_cfg->adc_channel = 1;
|
||||
ret = ERROR;
|
||||
}
|
||||
break;
|
||||
|
|
@ -156,7 +319,7 @@ int HwAdcInit(void)
|
|||
{
|
||||
x_err_t ret = EOK;
|
||||
|
||||
#ifdef BSP_USING_ADC1
|
||||
#ifdef BSP_USING_ADC
|
||||
static struct AdcBus adc1_bus;
|
||||
static struct AdcDriver adc1_drv;
|
||||
static struct AdcHardwareDevice adc1_dev;
|
||||
|
|
@ -183,7 +346,7 @@ int HwAdcInit(void)
|
|||
|
||||
adc1_dev.adc_dev_done = &dev_done;
|
||||
adc1_cfg.ADCx = CM_ADC1;
|
||||
adc1_cfg.adc_channel = 0;
|
||||
adc1_cfg.adc_channel = 1;
|
||||
|
||||
ret = AdcDeviceRegister(&adc1_dev, (void *)&adc1_cfg, ADC1_DEVICE_NAME);
|
||||
if (ret != EOK) {
|
||||
|
|
@ -197,88 +360,6 @@ int HwAdcInit(void)
|
|||
}
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_ADC2
|
||||
static struct AdcBus adc2_bus;
|
||||
static struct AdcDriver adc2_drv;
|
||||
static struct AdcHardwareDevice adc2_dev;
|
||||
static struct HwAdc adc2_cfg;
|
||||
|
||||
adc2_drv.configure = AdcDrvConfigure;
|
||||
|
||||
ret = AdcBusInit(&adc2_bus, ADC2_BUS_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("ADC2 bus init error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = AdcDriverInit(&adc2_drv, ADC2_DRIVER_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("ADC2 driver init error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
ret = AdcDriverAttachToBus(ADC2_DRIVER_NAME, ADC2_BUS_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("ADC2 driver attach error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
adc2_dev.adc_dev_done = &dev_done;
|
||||
adc2_cfg.ADCx = CM_ADC2;
|
||||
adc2_cfg.adc_channel = 0;
|
||||
|
||||
ret = AdcDeviceRegister(&adc2_dev, (void *)&adc2_cfg, ADC2_DEVICE_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("ADC2 device register error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
ret = AdcDeviceAttachToBus(ADC2_DEVICE_NAME, ADC2_BUS_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("ADC2 device register error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_ADC3
|
||||
static struct AdcBus adc3_bus;
|
||||
static struct AdcDriver adc3_drv;
|
||||
static struct AdcHardwareDevice adc3_dev;
|
||||
static struct HwAdc adc3_cfg;
|
||||
|
||||
adc3_drv.configure = AdcDrvConfigure;
|
||||
|
||||
ret = AdcBusInit(&adc3_bus, ADC3_BUS_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("ADC3 bus init error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = AdcDriverInit(&adc3_drv, ADC3_DRIVER_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("ADC3 driver init error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
ret = AdcDriverAttachToBus(ADC3_DRIVER_NAME, ADC3_BUS_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("ADC3 driver attach error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
adc3_dev.adc_dev_done = &dev_done;
|
||||
adc3_cfg.ADCx = CM_ADC3;
|
||||
adc3_cfg.adc_channel = 0;
|
||||
|
||||
ret = AdcDeviceRegister(&adc3_dev, (void *)&adc3_cfg, ADC3_DEVICE_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("ADC3 device register error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
ret = AdcDeviceAttachToBus(ADC3_DEVICE_NAME, ADC3_BUS_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("ADC3 device register error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
#endif
|
||||
|
||||
return ret;
|
||||
|
||||
}
|
||||
|
|
|
|||
|
|
@ -9,7 +9,7 @@ ifeq ($(CONFIG_BSP_USING_ADC),y)
|
|||
endif
|
||||
|
||||
ifeq ($(CONFIG_BSP_USING_DAC),y)
|
||||
SRC_FILES += hc32_ll_dac.c
|
||||
SRC_FILES += hc32_ll_dac.c hc32_ll_mau.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_BSP_USING_SDIO),y)
|
||||
|
|
|
|||
|
|
@ -20,56 +20,301 @@
|
|||
|
||||
#include <connect_dac.h>
|
||||
|
||||
#define _DAC_CONS(string1, string2) string1##string2
|
||||
#define DAC_CONS(string1, string2) _DAC_CONS(string1, string2)
|
||||
/*******************************************************************************
|
||||
* Local pre-processor symbols/macros ('#define')
|
||||
******************************************************************************/
|
||||
#define DAC_UNIT1_PORT (GPIO_PORT_A)
|
||||
#define DAC_UNIT1_CHN1_PIN (GPIO_PIN_04)
|
||||
|
||||
#ifdef BSP_USING_DAC
|
||||
#define DAC_GPIO DAC_CONS(GPIO_Pin_, DAC_GPIO_NUM)
|
||||
#define VREFH (3.3F)
|
||||
#define DAC_CHN1 (0U)
|
||||
#define DAC_CHN2 (1U)
|
||||
#define DAC_DATA_ALIGN_12b_R (0U)
|
||||
#define DAC_DATA_ALIGN_12b_L (1U)
|
||||
|
||||
#define SUPPORT_AMP
|
||||
#define SUPPORT_ADP
|
||||
#define SINGLE_WAVE_DAC_CHN (DAC_CHN1)
|
||||
#define DAC_DATA_ALIGN (DAC_DATA_ALIGN_12b_L)
|
||||
|
||||
#define SINE_DOT_NUMBER (4096U)
|
||||
#define SINE_NEGATIVE_TO_POSITVE (1.0F)
|
||||
|
||||
/*******************************************************************************
|
||||
* Local type definitions ('typedef')
|
||||
******************************************************************************/
|
||||
typedef enum {
|
||||
DAC_Unit1,
|
||||
DAC_Unit2,
|
||||
DAC_Unit_Max,
|
||||
}en_dac_unit_t;
|
||||
|
||||
typedef enum {
|
||||
E_Dac_Single,
|
||||
E_Dac_Dual,
|
||||
}en_dac_cvt_t;
|
||||
|
||||
typedef struct {
|
||||
CM_DAC_TypeDef *pUnit;
|
||||
en_dac_cvt_t enCvtType;
|
||||
uint16_t u16Ch;
|
||||
} stc_dac_handle_t;
|
||||
|
||||
/*******************************************************************************
|
||||
* Local variable definitions ('static')
|
||||
******************************************************************************/
|
||||
static stc_dac_handle_t m_stcDACHandle[DAC_Unit_Max] = {0};
|
||||
static uint32_t gu32SinTable[SINE_DOT_NUMBER];
|
||||
static stc_dac_handle_t *pSingleDac;
|
||||
|
||||
/*******************************************************************************
|
||||
* Function implementation - global ('extern') and local ('static')
|
||||
******************************************************************************/
|
||||
/**
|
||||
* @brief MAU Initialization
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void MauInit(void)
|
||||
{
|
||||
/* Enable MAU peripheral clock. */
|
||||
FCG_Fcg0PeriphClockCmd(PWC_FCG0_MAU, ENABLE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief MAU De-Initialization
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void MauDeinit(void)
|
||||
{
|
||||
/* Enable MAU peripheral clock. */
|
||||
FCG_Fcg0PeriphClockCmd(PWC_FCG0_MAU, DISABLE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Sin table Initialization
|
||||
* @param [in] pSinTable sin table
|
||||
* @param [in] u32count number of pSinTable items
|
||||
* @retval None
|
||||
*/
|
||||
static void SinTableInit(uint32_t pSinTable[], uint32_t u32count)
|
||||
{
|
||||
uint32_t i;
|
||||
uint32_t u32AngAvg = (uint32_t)(float32_t)((float32_t)((float32_t)MAU_SIN_ANGIDX_TOTAL / (float32_t)u32count) + 0.5);
|
||||
float32_t fSin;
|
||||
for (i = 0U; i < u32count; i++) {
|
||||
fSin = (((float32_t)MAU_Sin(CM_MAU, (uint16_t)(u32AngAvg * i))
|
||||
/ (float32_t)MAU_SIN_Q15_SCALAR + SINE_NEGATIVE_TO_POSITVE) / VREFH) *
|
||||
(float32_t)DAC_DATAREG_VALUE_MAX + 0.5F;
|
||||
|
||||
#if (DAC_DATA_ALIGN == DAC_DATA_ALIGN_12b_L)
|
||||
{
|
||||
pSinTable[i] = (uint32_t)fSin << 4;
|
||||
}
|
||||
#else
|
||||
{
|
||||
pSinTable[i] = (uint32_t)fSin;
|
||||
}
|
||||
#endif
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable DAC peripheral clock
|
||||
* @param [in] enUnit The selected DAC unit
|
||||
* @retval None
|
||||
*/
|
||||
static void DacPClkEnable(en_dac_unit_t enUnit)
|
||||
{
|
||||
uint32_t u32PClk;
|
||||
switch (enUnit) {
|
||||
case DAC_Unit1:
|
||||
u32PClk = PWC_FCG3_DAC1;
|
||||
break;
|
||||
case DAC_Unit2:
|
||||
u32PClk = PWC_FCG3_DAC2;
|
||||
break;
|
||||
default:
|
||||
u32PClk = PWC_FCG3_DAC1 | PWC_FCG3_DAC2;
|
||||
break;
|
||||
}
|
||||
/* Enable DAC peripheral clock. */
|
||||
FCG_Fcg3PeriphClockCmd(u32PClk, ENABLE);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Init DAC single channel
|
||||
* @param [in] enUnit The selected DAC unit
|
||||
* @retval A pointer of DAC handler
|
||||
*/
|
||||
static stc_dac_handle_t *DacSingleConversionInit(en_dac_unit_t enUnit)
|
||||
{
|
||||
uint8_t u8Port;
|
||||
uint16_t u16Pin;
|
||||
stc_dac_handle_t *pDac;
|
||||
|
||||
if (enUnit == DAC_Unit1) {
|
||||
pDac = &m_stcDACHandle[DAC_Unit1];
|
||||
pDac->pUnit = CM_DAC1;
|
||||
} else {
|
||||
pDac = &m_stcDACHandle[DAC_Unit2];
|
||||
pDac->pUnit = CM_DAC2;
|
||||
}
|
||||
DacPClkEnable(enUnit);
|
||||
|
||||
pDac->enCvtType = E_Dac_Single;
|
||||
#if (SINGLE_WAVE_DAC_CHN == DAC_CHN1)
|
||||
pDac->u16Ch = DAC_CH1;
|
||||
#else
|
||||
pDac->u16Ch = DAC_CH2;
|
||||
#endif
|
||||
|
||||
/* Init DAC by default value: source from data register and output enabled*/
|
||||
DAC_DeInit(pDac->pUnit);
|
||||
stc_dac_init_t stInit;
|
||||
(void)DAC_StructInit(&stInit);
|
||||
(void)DAC_Init(pDac->pUnit, pDac->u16Ch, &stInit);
|
||||
#if (DAC_DATA_ALIGN == DAC_DATA_ALIGN_12b_L)
|
||||
DAC_DataRegAlignConfig(pDac->pUnit, DAC_DATA_ALIGN_L);
|
||||
#else
|
||||
DAC_DataRegAlignConfig(pDac->pUnit, DAC_DATA_ALIGN_R);
|
||||
#endif
|
||||
|
||||
/* Set DAC pin attribute to analog */
|
||||
if (enUnit == DAC_Unit1) {
|
||||
u8Port = DAC_UNIT1_PORT;
|
||||
#if (SINGLE_WAVE_DAC_CHN == DAC_CHN1)
|
||||
u16Pin = DAC_UNIT1_CHN1_PIN;
|
||||
#endif
|
||||
}
|
||||
stc_gpio_init_t stcGpioInit;
|
||||
(void)GPIO_StructInit(&stcGpioInit);
|
||||
stcGpioInit.u16PinAttr = PIN_ATTR_ANALOG;
|
||||
(void)GPIO_Init(u8Port, u16Pin, &stcGpioInit);
|
||||
|
||||
#ifdef SUPPORT_ADP
|
||||
/* Set ADC first */
|
||||
/* Enable ADC peripheral clock. */
|
||||
FCG_Fcg3PeriphClockCmd(PWC_FCG3_ADC1 | PWC_FCG3_ADC2 | PWC_FCG3_ADC3, ENABLE);
|
||||
if (CM_ADC1->STR == 0U) {
|
||||
if (CM_ADC2->STR == 0U) {
|
||||
if (CM_ADC3->STR == 0U) {
|
||||
DAC_ADCPrioConfig(pDac->pUnit, DAC_ADP_SELECT_ALL, ENABLE);
|
||||
DAC_ADCPrioCmd(pDac->pUnit, ENABLE);
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
return pDac;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Start single DAC conversions
|
||||
* @param [in] pDac A pointer of DAC handler
|
||||
* @retval None
|
||||
*/
|
||||
static void DacStartSingleConversion(const stc_dac_handle_t *pDac)
|
||||
{
|
||||
/* Enalbe AMP */
|
||||
#ifdef SUPPORT_AMP
|
||||
(void)DAC_AMPCmd(pDac->pUnit, pDac->u16Ch, ENABLE);
|
||||
#endif
|
||||
|
||||
(void)DAC_Start(pDac->pUnit, pDac->u16Ch);
|
||||
|
||||
#ifdef SUPPORT_AMP
|
||||
/* delay 3us before setting data*/
|
||||
DDL_DelayMS(1U);
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Convert data by single DAC channel
|
||||
* @param [in] pDac A pointer of DAC handler
|
||||
* @param [in] pDataTable The data table to be converted
|
||||
* @param [in] u32count Number of data table items
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void DacSetSingleConversionData(const stc_dac_handle_t *pDac, uint32_t const pDataTable[], uint32_t u32count)
|
||||
{
|
||||
uint32_t i = 0U;
|
||||
|
||||
for (i = 0U; i < u32count; i++) {
|
||||
#ifdef SUPPORT_ADP
|
||||
uint32_t u32TryCount = 100U;
|
||||
while (u32TryCount != 0U) {
|
||||
u32TryCount--;
|
||||
if (SET != DAC_GetChConvertState(pDac->pUnit, pDac->u16Ch)) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
DAC_SetChData(pDac->pUnit, pDac->u16Ch, (uint16_t)pDataTable[i]);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief stop DAC conversion
|
||||
* @param [in] pDac A pointer of DAC handler
|
||||
* @retval None
|
||||
*/
|
||||
static void DAC_StopConversion(const stc_dac_handle_t *pDac)
|
||||
{
|
||||
if (NULL == pDac) {
|
||||
DAC_DeInit(CM_DAC1);
|
||||
DAC_DeInit(CM_DAC2);
|
||||
} else if (pDac->enCvtType != E_Dac_Dual) {
|
||||
(void)DAC_Stop(pDac->pUnit, pDac->u16Ch);
|
||||
} else {
|
||||
DAC_StopDualCh(pDac->pUnit);
|
||||
}
|
||||
}
|
||||
|
||||
static uint32 DacOpen(void *dev)
|
||||
{
|
||||
struct DacHardwareDevice *dac_dev = (struct DacHardwareDevice *)dev;
|
||||
|
||||
CM_DAC_TypeDef *DACx = (CM_DAC_TypeDef *)dac_dev->private_data;
|
||||
/* Init MAU for generating sine data*/
|
||||
MauInit();
|
||||
/* Init sine data table */
|
||||
SinTableInit(gu32SinTable, SINE_DOT_NUMBER);
|
||||
|
||||
stc_dac_init_t pstcDacInit;
|
||||
|
||||
DAC_StructInit(&pstcDacInit);
|
||||
|
||||
DAC_Init(DACx,DAC_CH1,&pstcDacInit);
|
||||
/* Init single DAC */
|
||||
pSingleDac = DacSingleConversionInit(DAC_Unit1);
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
static uint32 DacClose(void *dev)
|
||||
{
|
||||
|
||||
struct DacHardwareDevice *dac_dev = (struct DacHardwareDevice *)dev;
|
||||
|
||||
CM_DAC_TypeDef *DACx = (CM_DAC_TypeDef *)dac_dev->private_data;
|
||||
|
||||
|
||||
DAC_StopConversion(pSingleDac);
|
||||
|
||||
DAC_DeInit(DACx);
|
||||
|
||||
MauDeinit();
|
||||
|
||||
memset(gu32SinTable, 0 , sizeof(gu32SinTable));
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
|
||||
static uint32 DacRead(void *dev, struct BusBlockReadParam *read_param)
|
||||
static uint32 DacWrite(void *dev, struct BusBlockWriteParam *write_param)
|
||||
{
|
||||
struct DacHardwareDevice *dac_dev = (struct DacHardwareDevice *)dev;
|
||||
struct HwDac *dac_cfg = (struct HwDac *)dac_dev->haldev.private_data;
|
||||
|
||||
CM_DAC_TypeDef *DACx = (CM_DAC_TypeDef *)dac_dev->private_data;
|
||||
for (int i = 0; i < dac_cfg->digital_data; i ++) {
|
||||
DacStartSingleConversion(pSingleDac);
|
||||
DacSetSingleConversionData(pSingleDac, &gu32SinTable[i], 1U);
|
||||
if (i > SINE_DOT_NUMBER) {
|
||||
i = 0;
|
||||
}
|
||||
}
|
||||
|
||||
uint16 dac_set_value = 0;
|
||||
|
||||
dac_set_value = DAC_GetChConvertState(DACx,DAC_CH1);
|
||||
|
||||
*(uint16 *)read_param->buffer = dac_set_value;
|
||||
read_param->read_length = 2;
|
||||
|
||||
return read_param->read_length;
|
||||
return EOK;
|
||||
}
|
||||
|
||||
|
|
@ -88,8 +333,6 @@ static uint32 DacDrvConfigure(void *drv, struct BusConfigureInfo *configure_info
|
|||
{
|
||||
case OPE_CFG:
|
||||
dac_cfg->digital_data = *(uint16 *)configure_info->private_data;
|
||||
// DAC_SetChannel1Data(DAC_Align_12b_R, dac_cfg->digital_data);//12 bits、R-Align data format, digital data
|
||||
DAC_SetChData(dac_cfg->DACx,DAC_CH1,dac_cfg->digital_data);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
|
|
@ -102,8 +345,8 @@ static const struct DacDevDone dev_done =
|
|||
{
|
||||
DacOpen,
|
||||
DacClose,
|
||||
DacWrite,
|
||||
NONE,
|
||||
DacRead,
|
||||
};
|
||||
|
||||
int HwDacInit(void)
|
||||
|
|
|
|||
|
|
@ -34,13 +34,6 @@ struct HwDac
|
|||
uint16 digital_data;
|
||||
};
|
||||
|
||||
typedef struct {
|
||||
CM_DAC_TypeDef *pUnit;
|
||||
// en_dac_cvt_t enCvtType;
|
||||
uint16_t u16Ch;
|
||||
} stc_dac_handle_t;
|
||||
|
||||
|
||||
int HwDacInit(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
|
|
|||
Loading…
Reference in New Issue