Merge pull request 'fix bug aiit-arm32-board support sx127x on nuttx' (#4) from prepare_for_master into ok1052

ok
This commit is contained in:
wgzAIIT 2022-03-14 14:52:01 +08:00
commit 5b10efa5e7
29 changed files with 225 additions and 96 deletions

View File

@ -73,14 +73,14 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_OTGFS=y
CONFIG_STM32_PWR=y
CONFIG_STM32_SPI2=y
CONFIG_STM32_USART2=y
CONFIG_STM32_USART1=y
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_SYSTEM_ADBD=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_NSH_SYMTAB=y
CONFIG_SYSTEM_NSH_SYMTAB_ARRAYNAME="g_symtab"
CONFIG_SYSTEM_NSH_SYMTAB_COUNTNAME="g_nsymbols"
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART1_SERIAL_CONSOLE=y
CONFIG_USBADB=y
CONFIG_USBDEV=y
CONFIG_USERMAIN_STACKSIZE=3072

View File

@ -67,13 +67,13 @@ CONFIG_STM32_PWR=y
CONFIG_STM32_SPI1=y
CONFIG_STM32_SPI3=y
CONFIG_STM32_SPI_DMA=y
CONFIG_STM32_USART2=y
CONFIG_STM32_USART1=y
CONFIG_STM32_USBHOST=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_NXPLAYER=y
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USART1_RXBUFSIZE=128
CONFIG_USART1_SERIAL_CONSOLE=y
CONFIG_USART1_TXBUFSIZE=128
CONFIG_USBHOST_ISOC_DISABLE=y
CONFIG_USBHOST_MSC=y
CONFIG_USER_ENTRYPOINT="nsh_main"

View File

@ -48,10 +48,10 @@ CONFIG_STM32_CAN1_BAUD=500000
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_PWR=y
CONFIG_STM32_SPI1=y
CONFIG_STM32_USART2=y
CONFIG_STM32_USART1=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_TIME64=y
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USART1_RXBUFSIZE=128
CONFIG_USART1_SERIAL_CONSOLE=y
CONFIG_USART1_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="nsh_main"

View File

@ -35,11 +35,11 @@ CONFIG_START_DAY=2
CONFIG_START_MONTH=11
CONFIG_START_YEAR=2012
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_USART2=y
CONFIG_STM32_USART1=y
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_TESTING_CXXTEST=y
CONFIG_UCLIBCXX=y
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USART1_RXBUFSIZE=128
CONFIG_USART1_SERIAL_CONSOLE=y
CONFIG_USART1_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="cxxtest_main"

View File

@ -41,8 +41,8 @@ CONFIG_START_DAY=26
CONFIG_START_MONTH=10
CONFIG_START_YEAR=2012
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_USART2=y
CONFIG_STM32_USART1=y
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART1_SERIAL_CONSOLE=y
CONFIG_USERMAIN_STACKSIZE=4096
CONFIG_USER_ENTRYPOINT="elf_main"

View File

@ -38,13 +38,14 @@ CONFIG_START_DAY=22
CONFIG_START_MONTH=3
CONFIG_START_YEAR=2013
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_USART2=y
CONFIG_STM32_SPI2=y
CONFIG_STM32_USART1=y
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_SYS_RESERVED=9
CONFIG_TESTING_OSTEST=y
CONFIG_TESTING_OSTEST_NBARRIER_THREADS=3
CONFIG_TESTING_OSTEST_STACKSIZE=2048
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USART1_RXBUFSIZE=128
CONFIG_USART1_SERIAL_CONSOLE=y
CONFIG_USART1_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="ostest_main"

View File

@ -50,9 +50,9 @@ CONFIG_STM32_I2C1=y
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_PWR=y
CONFIG_STM32_SPI1=y
CONFIG_STM32_USART2=y
CONFIG_STM32_USART1=y
CONFIG_SYSTEM_NSH=y
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USART1_RXBUFSIZE=128
CONFIG_USART1_SERIAL_CONSOLE=y
CONFIG_USART1_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="nsh_main"

View File

@ -48,9 +48,9 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_PWR=y
CONFIG_STM32_SPI1=y
CONFIG_STM32_SPI2=y
CONFIG_STM32_USART2=y
CONFIG_STM32_USART1=y
CONFIG_SYSTEM_NSH=y
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USART1_RXBUFSIZE=128
CONFIG_USART1_SERIAL_CONSOLE=y
CONFIG_USART1_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="nsh_main"

View File

@ -78,9 +78,9 @@ CONFIG_START_MONTH=4
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_PWR=y
CONFIG_STM32_SPI1=y
CONFIG_STM32_USART2=y
CONFIG_STM32_USART1=y
CONFIG_SYSTEM_NSH=y
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USART1_RXBUFSIZE=128
CONFIG_USART1_SERIAL_CONSOLE=y
CONFIG_USART1_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="nsh_main"

View File

@ -65,10 +65,10 @@ CONFIG_STM32_DMA2=y
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_PWR=y
CONFIG_STM32_SPI2=y
CONFIG_STM32_USART2=y
CONFIG_STM32_USART1=y
CONFIG_SYSTEM_NSH=y
CONFIG_TESTING_OSTEST=y
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USART1_RXBUFSIZE=128
CONFIG_USART1_SERIAL_CONSOLE=y
CONFIG_USART1_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="nsh_main"

View File

@ -54,12 +54,12 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_PWR=y
CONFIG_STM32_SPI1=y
CONFIG_STM32_USART1=y
CONFIG_STM32_USART2=y
CONFIG_STM32_USART1=y
CONFIG_SYSTEM_NSH=y
CONFIG_USART1_BAUD=38400
CONFIG_USART1_PARITY=2
CONFIG_USART1_RS485=y
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USART1_RXBUFSIZE=128
CONFIG_USART1_SERIAL_CONSOLE=y
CONFIG_USART1_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="nsh_main"

View File

@ -47,9 +47,9 @@ CONFIG_START_YEAR=2011
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_PWR=y
CONFIG_STM32_SPI1=y
CONFIG_STM32_USART2=y
CONFIG_STM32_USART1=y
CONFIG_SYSTEM_NSH=y
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USART1_RXBUFSIZE=128
CONFIG_USART1_SERIAL_CONSOLE=y
CONFIG_USART1_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="nsh_main"

View File

@ -45,10 +45,10 @@ CONFIG_START_MONTH=12
CONFIG_START_YEAR=2011
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_PWR=y
CONFIG_STM32_SPI1=y
CONFIG_STM32_USART2=y
CONFIG_STM32_SPI2=y
CONFIG_STM32_USART1=y
CONFIG_SYSTEM_NSH=y
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USART1_RXBUFSIZE=128
CONFIG_USART1_SERIAL_CONSOLE=y
CONFIG_USART1_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="nsh_main"

View File

@ -66,9 +66,9 @@ CONFIG_STM32_FSMC=y
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_PWR=y
CONFIG_STM32_SPI1=y
CONFIG_STM32_USART2=y
CONFIG_STM32_USART1=y
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USART1_RXBUFSIZE=128
CONFIG_USART1_SERIAL_CONSOLE=y
CONFIG_USART1_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="nxlines_main"

View File

@ -49,9 +49,9 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_PWR=y
CONFIG_STM32_RTC=y
CONFIG_STM32_TIM1=y
CONFIG_STM32_USART2=y
CONFIG_STM32_USART1=y
CONFIG_SYSTEM_NSH=y
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USART1_RXBUFSIZE=128
CONFIG_USART1_SERIAL_CONSOLE=y
CONFIG_USART1_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="nsh_main"

View File

@ -43,9 +43,9 @@ CONFIG_START_DAY=26
CONFIG_START_MONTH=10
CONFIG_START_YEAR=2012
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_USART2=y
CONFIG_STM32_USART1=y
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USART1_RXBUFSIZE=128
CONFIG_USART1_SERIAL_CONSOLE=y
CONFIG_USART1_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="posix_spawn_main"

View File

@ -46,10 +46,10 @@ CONFIG_START_YEAR=2011
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_PWR=y
CONFIG_STM32_SPI1=y
CONFIG_STM32_USART2=y
CONFIG_STM32_USART1=y
CONFIG_STM32_USART3=y
CONFIG_SYSTEM_NSH=y
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USART1_RXBUFSIZE=128
CONFIG_USART1_SERIAL_CONSOLE=y
CONFIG_USART1_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="nsh_main"

View File

@ -57,9 +57,9 @@ CONFIG_STM32_TIM3=y
CONFIG_STM32_TIM3_CH3OUT=y
CONFIG_STM32_TIM3_CHANNEL=3
CONFIG_STM32_TIM3_PWM=y
CONFIG_STM32_USART2=y
CONFIG_STM32_USART1=y
CONFIG_SYSTEM_NSH=y
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USART1_RXBUFSIZE=128
CONFIG_USART1_SERIAL_CONSOLE=y
CONFIG_USART1_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="rgbled_main"

View File

@ -88,14 +88,14 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_OTGFS=y
CONFIG_STM32_PWR=y
CONFIG_STM32_SPI1=y
CONFIG_STM32_USART2=y
CONFIG_STM32_USART1=y
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_NSH_SYMTAB=y
CONFIG_SYSTEM_NSH_SYMTAB_ARRAYNAME="g_symtab"
CONFIG_SYSTEM_NSH_SYMTAB_COUNTNAME="g_nsymbols"
CONFIG_SYSTEM_PING=y
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART1_SERIAL_CONSOLE=y
CONFIG_USBDEV=y
CONFIG_USERMAIN_STACKSIZE=3072
CONFIG_USER_ENTRYPOINT="nsh_main"

View File

@ -59,10 +59,10 @@ CONFIG_START_YEAR=2011
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_PWR=y
CONFIG_STM32_SPI1=y
CONFIG_STM32_USART2=y
CONFIG_STM32_USART1=y
CONFIG_SYSTEM_NSH=y
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USART1_RXBUFSIZE=128
CONFIG_USART1_SERIAL_CONSOLE=y
CONFIG_USART1_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="nsh_main"
CONFIG_VIDEO_FB=y

View File

@ -44,10 +44,10 @@ CONFIG_START_DAY=2
CONFIG_START_MONTH=11
CONFIG_START_YEAR=2012
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_USART2=y
CONFIG_STM32_USART1=y
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_SYSTEM_NSH=y
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USART1_RXBUFSIZE=128
CONFIG_USART1_SERIAL_CONSOLE=y
CONFIG_USART1_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="nsh_main"

View File

@ -47,14 +47,14 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_OTGFS=y
CONFIG_STM32_PWR=y
CONFIG_STM32_SPI1=y
CONFIG_STM32_USART2=y
CONFIG_STM32_USART1=y
CONFIG_SYSLOG_CHAR=y
CONFIG_SYSLOG_DEVPATH="/dev/ttyS0"
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_USBMSC=y
CONFIG_SYSTEM_USBMSC_DEVPATH1="/dev/ram0"
CONFIG_TASK_NAME_SIZE=0
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART1_SERIAL_CONSOLE=y
CONFIG_USBDEV=y
CONFIG_USBMSC=y
CONFIG_USBMSC_REMOVABLE=y

View File

@ -54,7 +54,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_OTGFS=y
CONFIG_STM32_PWR=y
CONFIG_STM32_SPI1=y
CONFIG_STM32_USART2=y
CONFIG_STM32_USART1=y
CONFIG_SYSTEM_NSH=y
CONFIG_USBDEV=y
CONFIG_USER_ENTRYPOINT="nsh_main"

View File

@ -92,7 +92,7 @@ CONFIG_STM32_SPI2_DMA=y
CONFIG_STM32_SPI3=y
CONFIG_STM32_SPI3_DMA=y
CONFIG_STM32_SPI_DMA=y
CONFIG_STM32_USART2=y
CONFIG_STM32_USART1=y
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_SYSTEM_DHCPC_RENEW=y
CONFIG_SYSTEM_NSH=y
@ -102,9 +102,9 @@ CONFIG_SYSTEM_NSH_SYMTAB_COUNTNAME="g_nsymbols"
CONFIG_SYSTEM_NTPC=y
CONFIG_TESTING_OSTEST=y
CONFIG_TESTING_OSTEST_FPUSIZE=132
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USART1_RXBUFSIZE=128
CONFIG_USART1_SERIAL_CONSOLE=y
CONFIG_USART1_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="nsh_main"
CONFIG_WIRELESS_GS2200M=y
CONFIG_WL_GS2200M=y

View File

@ -32,13 +32,13 @@ CONFIG_START_DAY=21
CONFIG_START_MONTH=9
CONFIG_START_YEAR=2009
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_USART2=y
CONFIG_STM32_USART1=y
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_TESTING_OSTEST=y
CONFIG_TESTING_OSTEST_NBARRIER_THREADS=3
CONFIG_TESTING_OSTEST_STACKSIZE=2048
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USART1_RXBUFSIZE=128
CONFIG_USART1_SERIAL_CONSOLE=y
CONFIG_USART1_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="ostest_main"
CONFIG_WINDOWS_NATIVE=y

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@ -50,9 +50,9 @@ CONFIG_STM32_SPI1=y
CONFIG_STM32_TIM1=y
CONFIG_STM32_TIM1_CH1OUT=y
CONFIG_STM32_TIM1_PWM=y
CONFIG_STM32_USART2=y
CONFIG_STM32_USART1=y
CONFIG_SYSTEM_NSH=y
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USART1_RXBUFSIZE=128
CONFIG_USART1_SERIAL_CONSOLE=y
CONFIG_USART1_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="nsh_main"

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@ -143,7 +143,7 @@ static int sx127x_freq_select(uint32_t freq)
/* Only HF supported (BAND3 - 860-930 MHz) */
if (freq < SX127X_HFBAND_THR)
if (freq > SX127X_HFBAND_THR)
{
ret = -EINVAL;
wlerr("LF band not supported\n");

View File

@ -0,0 +1,88 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
if DRIVERS_LPWAN
config LPWAN_SX127X
bool "SX127X Low Power Long Range transceiver support"
default n
select SPI
select SCHED_HPWORK
---help---
This options adds driver support for the Samtech SX127X chip.
if LPWAN_SX127X
config LPWAN_SX127X_RFFREQ_DEFAULT
int "SX127X default RF frequency"
default 433000000
config LPWAN_SX127X_SPIFREQ
int "SX127X SPI frequency"
default 1000000
---help---
SX127X SPI frequency up to 10MHz
config LPWAN_SX127X_TXPOWER_DEFAULT
int "SX127X default TX power"
default 20
config LPWAN_SX127X_PREAMBLE_DEFAULT
int "SX127X default preamble length"
default 8
config LPWAN_SX127X_MODULATION_DEFAULT
int "SX127X default modulation scheme"
default 3 if LPWAN_SX127X_LORA
default 1 if LPWAN_SX127X_FSKOOK
range 1 3
---help---
1 - FSK, 2 - OOK, 3 - LORA
config LPWAN_SX127X_CRCON
int "SX127X CRC ON"
range 0 1
default 1
config LPWAN_SX127X_RXSUPPORT
bool "SX127X RX support"
default y
if LPWAN_SX127X_RXSUPPORT
config LPWAN_SX127X_RXFIFO_LEN
int "SX127X RX FIFO length"
default 5
config LPWAN_SX127X_RXFIFO_DATA_LEN
int "SX127X RX FIFO data length"
default 256
endif #LPWAN_SX127X_RXSUPPORT
config LPWAN_SX127X_TXSUPPORT
bool "SX127X TX support"
default y
config LPWAN_SX127X_LORA
bool "SX127X LORA support"
default y
if LPWAN_SX127X_LORA
config LPWAN_SX127X_LORA_IMPHEADER
int "SX127X LORA implicit header ON"
range 0 1
default 0
endif # LPWAN_SX127X_LORA
config LPWAN_SX127X_FSKOOK
bool "SX127X FSK/OOK support"
default n
endif # WL_SX127X
endif # DRIVERS_LPWAN

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@ -769,6 +769,36 @@ static int sx127x_open(FAR struct file *filep)
goto errout;
}
/* Set modulation */
wlinfo("Set modulation mode to %d\n", CONFIG_LPWAN_SX127X_MODULATION_DEFAULT);
ret = sx127x_modulation_set(dev, CONFIG_LPWAN_SX127X_MODULATION_DEFAULT);
if (ret < 0)
{
wlerr("modulation_set failed\n");
goto errout;
}
/* Set RF frequency */
wlinfo("Set frequency to %" PRId32 "\n", CONFIG_LPWAN_SX127X_RFFREQ_DEFAULT);
ret = sx127x_frequency_set(dev, CONFIG_LPWAN_SX127X_RFFREQ_DEFAULT);
if (ret < 0)
{
wlerr("failed to change frequency %d!\n", ret);
goto errout;
}
/* Set TX power */
wlinfo("Set power to %d\n", CONFIG_LPWAN_SX127X_TXPOWER_DEFAULT);
ret = sx127x_power_set(dev, CONFIG_LPWAN_SX127X_TXPOWER_DEFAULT);
if (ret < 0)
{
wlerr("failed to change power %d!\n", ret);
goto errout;
}
dev->nopens++;
errout:
@ -844,6 +874,13 @@ static ssize_t sx127x_read(FAR struct file *filep, FAR char *buffer,
DEBUGASSERT(inode && inode->i_private);
dev = (FAR struct sx127x_dev_s *)inode->i_private;
/* Set mode to RX */
wlinfo("Set opmode to %" PRId32 "\n", SX127X_OPMODE_RX);
sx127x_opmode_set(dev, SX127X_OPMODE_RX);
sx127x_writeregbyte(dev, SX127X_LRM_IRQ, 8);
ret = nxsem_wait(&dev->dev_sem);
if (ret < 0)
{
@ -912,9 +949,10 @@ static ssize_t sx127x_write(FAR struct file *filep, FAR const char *buffer,
sx127x_opmode_set(dev, SX127X_OPMODE_STANDBY);
/* Initialize TX mode */
sx127x_writeregbyte(dev, SX127X_LRM_IRQ, 8);
/* Initialize TX mode */
ret = sx127x_opmode_init(dev, SX127X_OPMODE_TX);
if (ret < 0)
{
@ -940,6 +978,8 @@ static ssize_t sx127x_write(FAR struct file *filep, FAR const char *buffer,
nxsem_wait(&dev->tx_sem);
sx127x_writeregbyte(dev, SX127X_LRM_IRQ, 8);
errout:
/* Change mode to IDLE after transfer
* NOTE: if sequencer for FSK/OOK is ON - this should be done automatically