forked from xuos/xiuos
Merge branch 'prepare_for_master' of https://gitlink.org.cn/xuos/xiuos into prepare_for_master
This commit is contained in:
WuZheng
@@ -47,37 +47,102 @@
|
||||
.endm
|
||||
|
||||
.macro ZERO_F_REGISTERS
|
||||
fssr x31
|
||||
|
||||
fmv.d.x f0, x31
|
||||
FSubDS f0, f0, f0
|
||||
|
||||
fmv.d.x f1, x31
|
||||
FSubDS f1, f1, f1
|
||||
|
||||
fmv.d.x f2, x31
|
||||
FSubDS f2, f2, f2
|
||||
|
||||
fmv.d.x f3, x31
|
||||
FSubDS f3, f3, f3
|
||||
|
||||
fmv.d.x f4, x31
|
||||
FSubDS f4, f4, f4
|
||||
|
||||
fmv.d.x f5, x31
|
||||
FSubDS f5, f5, f5
|
||||
|
||||
fmv.d.x f6, x31
|
||||
FSubDS f6, f6, f6
|
||||
|
||||
fmv.d.x f7, x31
|
||||
FSubDS f7, f7, f7
|
||||
|
||||
fmv.d.x f8, x31
|
||||
FSubDS f8, f8, f8
|
||||
|
||||
fmv.d.x f9, x31
|
||||
FSubDS f9, f9, f9
|
||||
|
||||
fmv.d.x f10, x31
|
||||
FSubDS f10,f10,f10
|
||||
|
||||
fmv.d.x f11, x31
|
||||
FSubDS f11,f11,f11
|
||||
|
||||
fmv.d.x f12, x31
|
||||
FSubDS f12,f12,f12
|
||||
|
||||
fmv.d.x f13, x31
|
||||
FSubDS f13,f13,f13
|
||||
|
||||
fmv.d.x f14, x31
|
||||
FSubDS f14,f14,f14
|
||||
|
||||
fmv.d.x f15, x31
|
||||
FSubDS f15,f15,f15
|
||||
|
||||
fmv.d.x f16, x31
|
||||
FSubDS f16,f16,f16
|
||||
|
||||
fmv.d.x f17, x31
|
||||
FSubDS f17,f17,f17
|
||||
|
||||
fmv.d.x f18, x31
|
||||
FSubDS f18,f18,f18
|
||||
|
||||
fmv.d.x f19, x31
|
||||
FSubDS f19,f19,f19
|
||||
|
||||
fmv.d.x f20, x31
|
||||
FSubDS f20,f20,f20
|
||||
|
||||
fmv.d.x f21, x31
|
||||
FSubDS f21,f21,f21
|
||||
|
||||
fmv.d.x f22, x31
|
||||
FSubDS f22,f22,f22
|
||||
|
||||
fmv.d.x f23, x31
|
||||
FSubDS f23,f23,f23
|
||||
|
||||
fmv.d.x f24, x31
|
||||
FSubDS f24,f24,f24
|
||||
|
||||
fmv.d.x f25, x31
|
||||
FSubDS f25,f25,f25
|
||||
|
||||
fmv.d.x f26, x31
|
||||
FSubDS f26,f26,f26
|
||||
|
||||
fmv.d.x f27, x31
|
||||
FSubDS f27,f27,f27
|
||||
|
||||
fmv.d.x f28, x31
|
||||
FSubDS f28,f28,f28
|
||||
|
||||
fmv.d.x f29, x31
|
||||
FSubDS f29,f29,f29
|
||||
|
||||
fmv.d.x f30, x31
|
||||
FSubDS f30,f30,f30
|
||||
|
||||
fmv.d.x f31, x31
|
||||
FSubDS f31,f31,f31
|
||||
.endm
|
||||
|
||||
|
||||
@@ -478,7 +478,7 @@ static x_err_t I2cBitSendAddress(struct I2cBus *bus, struct I2cDataStandard *msg
|
||||
|
||||
retries = ignore_nack ? 0 : msg->retries;
|
||||
|
||||
if (flags & I2C_ADDR_10BIT) {
|
||||
if (flags & I2C_ADDR_10BIT_MODE) {
|
||||
addr1 = 0xf0 | ((msg->addr >> 7) & 0x06);
|
||||
addr2 = msg->addr & 0xff;
|
||||
|
||||
|
||||
@@ -385,7 +385,7 @@ static x_err_t I2cBitSendAddress(struct I2cBus *bus, struct I2cDataStandard *msg
|
||||
|
||||
retries = ignore_nack ? 0 : msg->retries;
|
||||
|
||||
if (flags & I2C_ADDR_10BIT) {
|
||||
if (flags & I2C_ADDR_10BIT_MODE) {
|
||||
addr1 = 0xf0 | ((msg->addr >> 7) & 0x06);
|
||||
addr2 = msg->addr & 0xff;
|
||||
|
||||
|
||||
@@ -376,7 +376,7 @@ static x_err_t I2cBitSendAddress(struct I2cBus *bus, struct I2cDataStandard *msg
|
||||
|
||||
retries = ignore_nack ? 0 : msg->retries;
|
||||
|
||||
if (flags & I2C_ADDR_10BIT) {
|
||||
if (flags & I2C_ADDR_10BIT_MODE) {
|
||||
addr1 = 0xf0 | ((msg->addr >> 7) & 0x06);
|
||||
addr2 = msg->addr & 0xff;
|
||||
|
||||
|
||||
@@ -34,6 +34,10 @@ Modification:
|
||||
#include <hc32_ll.h>
|
||||
#include <connect_usart.h>
|
||||
|
||||
#ifdef BSP_USING_GPIO
|
||||
#include <connect_gpio.h>
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_SDIO
|
||||
#include <connect_sdio.h>
|
||||
#endif
|
||||
@@ -42,6 +46,10 @@ Modification:
|
||||
#include <connect_spi.h>
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_I2C
|
||||
#include <connect_i2c.h>
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_USB
|
||||
#include <connect_usb.h>
|
||||
#endif
|
||||
@@ -145,12 +153,18 @@ void SysTick_Handler(void)
|
||||
|
||||
struct InitSequenceDesc _board_init[] =
|
||||
{
|
||||
#ifdef BSP_USING_GPIO
|
||||
{ "hw_pin", HwGpioInit },
|
||||
#endif
|
||||
#ifdef BSP_USING_SDIO
|
||||
{ "sdio", HwSdioInit },
|
||||
#endif
|
||||
#ifdef BSP_USING_SPI
|
||||
{ "spi", HwSpiInit },
|
||||
#endif
|
||||
#ifdef BSP_USING_I2C
|
||||
{ "i2c", HwI2cInit },
|
||||
#endif
|
||||
#ifdef BSP_USING_USB
|
||||
{ "usb", HwUsbHostInit },
|
||||
#endif
|
||||
|
||||
@@ -9,4 +9,8 @@ export APPLFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -
|
||||
|
||||
export DEFINES := -DHAVE_CCONFIG_H -DHC32F4A0 -DUSE_DDL_DRIVER -DHAVE_SIGINFO
|
||||
|
||||
ifeq ($(CONFIG_RESOURCES_LWIP), y)
|
||||
export LINK_LWIP := $(KERNEL_ROOT)/resources/ethernet/LwIP/liblwip.a
|
||||
endif
|
||||
|
||||
export ARCH = arm
|
||||
|
||||
@@ -6,6 +6,22 @@ menuconfig BSP_USING_UART
|
||||
source "$BSP_DIR/third_party_driver/usart/Kconfig"
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_GPIO
|
||||
bool "Using GPIO device "
|
||||
default y
|
||||
select RESOURCES_PIN
|
||||
if BSP_USING_GPIO
|
||||
source "$BSP_DIR/third_party_driver/gpio/Kconfig"
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_LWIP
|
||||
bool "Using LwIP by ethernet device"
|
||||
default n
|
||||
select RESOURCES_LWIP
|
||||
if BSP_USING_LWIP
|
||||
source "$BSP_DIR/third_party_driver/ethernet/Kconfig"
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_SPI
|
||||
bool "Using SPI device"
|
||||
default n
|
||||
@@ -14,6 +30,14 @@ menuconfig BSP_USING_SPI
|
||||
source "$BSP_DIR/third_party_driver/spi/Kconfig"
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_I2C
|
||||
bool "Using I2C device"
|
||||
default n
|
||||
select RESOURCES_I2C
|
||||
if BSP_USING_I2C
|
||||
source "$BSP_DIR/third_party_driver/i2c/Kconfig"
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_SDIO
|
||||
bool "Using SD CARD device"
|
||||
default n
|
||||
|
||||
@@ -4,10 +4,22 @@ ifeq ($(CONFIG_BSP_USING_UART),y)
|
||||
SRC_DIR += usart
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_BSP_USING_GPIO),y)
|
||||
SRC_DIR += gpio
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_BSP_USING_LWIP),y)
|
||||
SRC_DIR += ethernet
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_BSP_USING_SPI),y)
|
||||
SRC_DIR += spi
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_BSP_USING_I2C),y)
|
||||
SRC_DIR += i2c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_BSP_USING_SDIO),y)
|
||||
SRC_DIR += sdio
|
||||
endif
|
||||
|
||||
+8
@@ -12,6 +12,14 @@ ifeq ($(CONFIG_BSP_USING_SPI),y)
|
||||
SRC_FILES += hc32_ll_spi.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_BSP_USING_I2C),y)
|
||||
SRC_FILES += hc32_ll_i2c.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_BSP_USING_LWIP),y)
|
||||
SRC_FILES += hc32_ll_eth.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_BSP_USING_USB),y)
|
||||
SRC_FILES += hc32_ll_usb.c
|
||||
endif
|
||||
|
||||
@@ -0,0 +1 @@
|
||||
|
||||
@@ -0,0 +1,3 @@
|
||||
SRC_FILES := ethernetif.c
|
||||
|
||||
include $(KERNEL_ROOT)/compiler.mk
|
||||
@@ -0,0 +1,783 @@
|
||||
/**
|
||||
*******************************************************************************
|
||||
* @file eth/eth_loopback/source/ethernetif.c
|
||||
* @brief This file implements Ethernet network interface drivers.
|
||||
@verbatim
|
||||
Change Logs:
|
||||
Date Author Notes
|
||||
2022-03-31 CDT First version
|
||||
@endverbatim
|
||||
*******************************************************************************
|
||||
* Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd. All rights reserved.
|
||||
*
|
||||
* This software component is licensed by XHSC under BSD 3-Clause license
|
||||
* (the "License"); You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file ethernetif.c
|
||||
* @brief support hc32f4a0-board ethernetif function and register to Lwip
|
||||
* @version 3.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2022-12-05
|
||||
*/
|
||||
|
||||
/*************************************************
|
||||
File name: ethernetif.c
|
||||
Description: support hc32f4a0-board ethernetif configure and register to Lwip
|
||||
Others: take projects\ev_hc32f4a0_lqfp176\examples\eth\eth_loopback\source\ethernetif.c for references
|
||||
History:
|
||||
1. Date: 2022-12-05
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1、include harware_ethernetif.h、hc32_ll_eth.h、hc32_ll_gpio.h、hc32_ll_utility.h、hc32_ll_fcg.h and lwip H files;
|
||||
2、modify ethernetif_init as err_t;
|
||||
3、add ETH_RST_PORT and ETH_RST_PIN;
|
||||
4、add ETH_LINK_LED_PORT and ETH_LINK_LED_PIN;
|
||||
5、add ethernetif_config_enet_set;
|
||||
6、add ETHERNET_LOOPBACK_TEST with testnetif and txPbuf.
|
||||
*************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
* Include files
|
||||
******************************************************************************/
|
||||
#include <hardware_ethernetif.h>
|
||||
#include <hc32_ll_eth.h>
|
||||
#include <hc32_ll_gpio.h>
|
||||
#include <hc32_ll_utility.h>
|
||||
#include <hc32_ll_fcg.h>
|
||||
#include <lwip/timeouts.h>
|
||||
#include <netif/etharp.h>
|
||||
|
||||
/**
|
||||
* @addtogroup HC32F4A0_DDL_Examples
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup ETH_Loopback
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*******************************************************************************
|
||||
* Local type definitions ('typedef')
|
||||
******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
* Local pre-processor symbols/macros ('#define')
|
||||
******************************************************************************/
|
||||
/* Define those to better describe your network interface. */
|
||||
#define IFNAME0 'h'
|
||||
#define IFNAME1 'd'
|
||||
|
||||
/* PHY hardware reset time */
|
||||
#define PHY_HW_RST_DELAY (0x40U)
|
||||
|
||||
/* ETH_RST = PH11 */
|
||||
#define ETH_RST_PORT (GPIO_PORT_H)
|
||||
#define ETH_RST_PIN (GPIO_PIN_11)
|
||||
|
||||
/* ETH_LINK_LED = PD00 LED2 */
|
||||
#define ETH_LINK_LED_PORT (GPIO_PORT_D)
|
||||
#define ETH_LINK_LED_PIN (GPIO_PIN_00)
|
||||
|
||||
//#define ETHERNET_LOOPBACK_TEST
|
||||
#ifdef ETHERNET_LOOPBACK_TEST
|
||||
|
||||
#define USER_KEY_PORT (GPIO_PORT_I)
|
||||
#define USER_KEY_PIN (GPIO_PIN_07)
|
||||
|
||||
/* ethe global netif */
|
||||
static struct netif testnetif;
|
||||
/* eth tx buffer */
|
||||
static struct pbuf txPbuf;
|
||||
static char txBuf[] = "Ethernet Loop-Back Test";
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* Global variable definitions (declared in header file with 'extern')
|
||||
******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
* Local function prototypes ('static')
|
||||
******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
* Local variable definitions ('static')
|
||||
******************************************************************************/
|
||||
/* Global Ethernet handle*/
|
||||
static stc_eth_handle_t EthHandle;
|
||||
/* Ethernet Tx DMA Descriptor */
|
||||
__ALIGN_BEGIN static stc_eth_dma_desc_t EthDmaTxDscrTab[ETH_TX_BUF_NUM];
|
||||
/* Ethernet Rx DMA Descriptor */
|
||||
__ALIGN_BEGIN static stc_eth_dma_desc_t EthDmaRxDscrTab[ETH_RX_BUF_NUM];
|
||||
/* Ethernet Transmit Buffer */
|
||||
__ALIGN_BEGIN static uint8_t EthTxBuff[ETH_TX_BUF_NUM][ETH_TX_BUF_SIZE];
|
||||
/* Ethernet Receive Buffer */
|
||||
__ALIGN_BEGIN static uint8_t EthRxBuff[ETH_RX_BUF_NUM][ETH_RX_BUF_SIZE];
|
||||
|
||||
/* Ethernet link status */
|
||||
static uint8_t u8PhyLinkStatus = 0U, u8EthInitStatus = 0U;
|
||||
|
||||
/*******************************************************************************
|
||||
* Function implementation - global ('extern') and local ('static')
|
||||
******************************************************************************/
|
||||
/**
|
||||
* @defgroup ETH_IF_Global_Functions Ethernet Interface Global Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
void *ethernetif_config_enet_set(uint8_t enet_port)
|
||||
{
|
||||
return NONE;
|
||||
}
|
||||
|
||||
void Time_Update_LwIP(void)
|
||||
{
|
||||
//no need to do
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the Ethernet GPIO.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void Ethernet_GpioInit(void)
|
||||
{
|
||||
/* ETH_RST */
|
||||
stc_gpio_init_t stcGpioInit;
|
||||
(void)GPIO_StructInit(&stcGpioInit);
|
||||
stcGpioInit.u16PinState = PIN_STAT_RST;
|
||||
stcGpioInit.u16PinDir = PIN_DIR_OUT;
|
||||
(void)GPIO_Init(ETH_RST_PORT, ETH_RST_PIN, &stcGpioInit);
|
||||
GPIO_ResetPins(ETH_RST_PORT, ETH_RST_PIN);
|
||||
|
||||
SysTick_Delay(PHY_HW_RST_DELAY);
|
||||
GPIO_SetPins(ETH_RST_PORT, ETH_RST_PIN);
|
||||
SysTick_Delay(PHY_HW_RST_DELAY);
|
||||
|
||||
/* ETH_LINK_LED LED2 */
|
||||
(void)GPIO_StructInit(&stcGpioInit);
|
||||
stcGpioInit.u16PinState = PIN_STAT_RST;
|
||||
stcGpioInit.u16PinDir = PIN_DIR_OUT;
|
||||
(void)GPIO_Init(ETH_LINK_LED_PORT, ETH_LINK_LED_PIN, &stcGpioInit);
|
||||
GPIO_ResetPins(ETH_LINK_LED_PORT, ETH_LINK_LED_PIN);
|
||||
|
||||
/* Configure MII/RMII selection IO for ETH */
|
||||
#ifdef ETH_INTERFACE_RMII
|
||||
/* Ethernet RMII pins configuration */
|
||||
/*
|
||||
ETH_SMI_MDIO ----------------> PA2
|
||||
ETH_SMI_MDC -----------------> PC1
|
||||
ETH_RMII_TX_EN --------------> PG11
|
||||
ETH_RMII_TXD0 ---------------> PG13
|
||||
ETH_RMII_TXD1 ---------------> PG14
|
||||
ETH_RMII_REF_CLK ------------> PA1
|
||||
ETH_RMII_CRS_DV -------------> PA7
|
||||
ETH_RMII_RXD0 ---------------> PC4
|
||||
ETH_RMII_RXD1 ---------------> PC5
|
||||
ETH_RMII_RX_ER --------------> PI10
|
||||
*/
|
||||
/* Configure PA1, PA2 and PA7 */
|
||||
GPIO_SetFunc(GPIO_PORT_A, (GPIO_PIN_01 | GPIO_PIN_02 | GPIO_PIN_07), GPIO_FUNC_11);
|
||||
/* Configure PC1, PC4 and PC5 */
|
||||
GPIO_SetFunc(GPIO_PORT_C, (GPIO_PIN_01 | GPIO_PIN_04 | GPIO_PIN_05), GPIO_FUNC_11);
|
||||
/* Configure PG11, PG13 and PG14 */
|
||||
GPIO_SetFunc(GPIO_PORT_G, (GPIO_PIN_11 | GPIO_PIN_13 | GPIO_PIN_14), GPIO_FUNC_11);
|
||||
/* Configure PI10 */
|
||||
GPIO_SetFunc(GPIO_PORT_I, GPIO_PIN_10, GPIO_FUNC_11);
|
||||
#else
|
||||
/* Ethernet MII pins configuration */
|
||||
/*
|
||||
ETH_SMI_MDIO ----------------> PA2
|
||||
ETH_SMI_MDC -----------------> PC1
|
||||
ETH_MII_TX_CLK --------------> PB6
|
||||
ETH_MII_TX_EN ---------------> PG11
|
||||
ETH_MII_TXD0 ----------------> PG13
|
||||
ETH_MII_TXD1 ----------------> PG14
|
||||
ETH_MII_TXD2 ----------------> PB9
|
||||
ETH_MII_TXD3 ----------------> PB8
|
||||
ETH_MII_RX_CLK --------------> PA1
|
||||
ETH_MII_RX_DV ---------------> PA7
|
||||
ETH_MII_RXD0 ----------------> PC4
|
||||
ETH_MII_RXD1 ----------------> PC5
|
||||
ETH_MII_RXD2 ----------------> PB0
|
||||
ETH_MII_RXD3 ----------------> PB1
|
||||
ETH_MII_RX_ER ---------------> PI10
|
||||
ETH_MII_CRS -----------------> PH2
|
||||
ETH_MII_COL -----------------> PH3
|
||||
*/
|
||||
/* Configure PA1, PA2 and PA7 */
|
||||
GPIO_SetFunc(GPIO_PORT_A, (GPIO_PIN_01 | GPIO_PIN_02 | GPIO_PIN_07), GPIO_FUNC_11);
|
||||
/* Configure PB0, PB1, PB6, PB8 and PB9 */
|
||||
GPIO_SetFunc(GPIO_PORT_B, (GPIO_PIN_00 | GPIO_PIN_01 | GPIO_PIN_06 | GPIO_PIN_08 | GPIO_PIN_09), GPIO_FUNC_11);
|
||||
/* Configure PC1, PC4 and PC5 */
|
||||
GPIO_SetFunc(GPIO_PORT_C, (GPIO_PIN_01 | GPIO_PIN_04 | GPIO_PIN_05), GPIO_FUNC_11);
|
||||
/* Configure PG11, PG13 and PG14 */
|
||||
GPIO_SetFunc(GPIO_PORT_G, (GPIO_PIN_11 | GPIO_PIN_13 | GPIO_PIN_14), GPIO_FUNC_11);
|
||||
/* Configure PH2, PH3 */
|
||||
GPIO_SetFunc(GPIO_PORT_H, (GPIO_PIN_02 | GPIO_PIN_03), GPIO_FUNC_11);
|
||||
/* Configure PI10 */
|
||||
GPIO_SetFunc(GPIO_PORT_I, GPIO_PIN_10, GPIO_FUNC_11);
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief In this function, the hardware should be initialized.
|
||||
* @param netif The already initialized network interface structure for this ethernetif.
|
||||
* @retval int32_t:
|
||||
* - LL_OK: Initialize success
|
||||
* - LL_ERR: Initialize failed
|
||||
*/
|
||||
static int32_t low_level_init(struct netif *netif)
|
||||
{
|
||||
int32_t i32Ret = LL_ERR;
|
||||
stc_eth_init_t stcEthInit;
|
||||
uint16_t u16RegVal;
|
||||
|
||||
/* Enable ETH clock */
|
||||
FCG_Fcg1PeriphClockCmd(FCG1_PERIPH_ETHMAC, ENABLE);
|
||||
/* Init Ethernet GPIO */
|
||||
Ethernet_GpioInit();
|
||||
/* Reset ETHERNET */
|
||||
(void)ETH_DeInit();
|
||||
/* Configure structure initialization */
|
||||
(void)ETH_CommStructInit(&EthHandle.stcCommInit);
|
||||
(void)ETH_StructInit(&stcEthInit);
|
||||
#ifdef ETH_INTERFACE_RMII
|
||||
EthHandle.stcCommInit.u32Interface = ETH_MAC_IF_RMII;
|
||||
#else
|
||||
EthHandle.stcCommInit.u32Interface = ETH_MAC_IF_MII;
|
||||
#endif
|
||||
stcEthInit.stcMacInit.u32ReceiveAll = ETH_MAC_RX_ALL_ENABLE;
|
||||
|
||||
/* Configure ethernet peripheral */
|
||||
if (LL_OK == ETH_Init(&EthHandle, &stcEthInit)) {
|
||||
u8EthInitStatus = 1U;
|
||||
i32Ret = LL_OK;
|
||||
}
|
||||
|
||||
#ifdef ETHERNET_LOOPBACK_TEST
|
||||
/* Enable PHY loopback */
|
||||
(void)ETH_PHY_LoopBackCmd(&EthHandle, ENABLE);
|
||||
#endif
|
||||
|
||||
/* Initialize Tx Descriptors list: Chain Mode */
|
||||
(void)ETH_DMA_TxDescListInit(&EthHandle, EthDmaTxDscrTab, &EthTxBuff[0][0], ETH_TX_BUF_NUM);
|
||||
/* Initialize Rx Descriptors list: Chain Mode */
|
||||
(void)ETH_DMA_RxDescListInit(&EthHandle, EthDmaRxDscrTab, &EthRxBuff[0][0], ETH_RX_BUF_NUM);
|
||||
|
||||
/* set MAC hardware address length */
|
||||
netif->hwaddr_len = 6U;
|
||||
/* set MAC hardware address */
|
||||
netif->hwaddr[0] = (EthHandle.stcCommInit).au8MacAddr[0];
|
||||
netif->hwaddr[1] = (EthHandle.stcCommInit).au8MacAddr[1];
|
||||
netif->hwaddr[2] = (EthHandle.stcCommInit).au8MacAddr[2];
|
||||
netif->hwaddr[3] = (EthHandle.stcCommInit).au8MacAddr[3];
|
||||
netif->hwaddr[4] = (EthHandle.stcCommInit).au8MacAddr[4];
|
||||
netif->hwaddr[5] = (EthHandle.stcCommInit).au8MacAddr[5];
|
||||
/* maximum transfer unit */
|
||||
netif->mtu = 1500U;
|
||||
/* Enable MAC and DMA transmission and reception */
|
||||
(void)ETH_Start();
|
||||
|
||||
/* Configure PHY LED mode */
|
||||
u16RegVal = PHY_PAGE_ADDR_7;
|
||||
(void)ETH_PHY_WriteReg(&EthHandle, PHY_PSR, u16RegVal);
|
||||
(void)ETH_PHY_ReadReg(&EthHandle, PHY_P7_IWLFR, &u16RegVal);
|
||||
MODIFY_REG16(u16RegVal, PHY_LED_SELECT, PHY_LED_SELECT_10);
|
||||
(void)ETH_PHY_WriteReg(&EthHandle, PHY_P7_IWLFR, u16RegVal);
|
||||
u16RegVal = PHY_PAGE_ADDR_0;
|
||||
(void)ETH_PHY_WriteReg(&EthHandle, PHY_PSR, u16RegVal);
|
||||
|
||||
#ifdef ETH_INTERFACE_RMII
|
||||
/* Disable Power Saving Mode */
|
||||
(void)ETH_PHY_ReadReg(&EthHandle, PHY_PSMR, &u16RegVal);
|
||||
CLR_REG16_BIT(u16RegVal, PHY_EN_PWR_SAVE);
|
||||
(void)ETH_PHY_WriteReg(&EthHandle, PHY_PSMR, u16RegVal);
|
||||
|
||||
/* Configure PHY to generate an interrupt when Eth Link state changes */
|
||||
u16RegVal = PHY_PAGE_ADDR_7;
|
||||
(void)ETH_PHY_WriteReg(&EthHandle, PHY_PSR, u16RegVal);
|
||||
/* Enable Interrupt on change of link status */
|
||||
(void)ETH_PHY_ReadReg(&EthHandle, PHY_P7_IWLFR, &u16RegVal);
|
||||
SET_REG16_BIT(u16RegVal, PHY_INT_LINK_CHANGE);
|
||||
(void)ETH_PHY_WriteReg(&EthHandle, PHY_P7_IWLFR, u16RegVal);
|
||||
u16RegVal = PHY_PAGE_ADDR_0;
|
||||
(void)ETH_PHY_WriteReg(&EthHandle, PHY_PSR, u16RegVal);
|
||||
#endif
|
||||
|
||||
return i32Ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function should do the actual transmission of the packet.
|
||||
* @param netif The network interface structure for this ethernetif.
|
||||
* @param p The MAC packet to send.
|
||||
* @retval int32_t:
|
||||
* - LL_OK: The packet could be sent
|
||||
* - LL_ERR: The packet couldn't be sent
|
||||
*/
|
||||
int32_t low_level_output(struct netif *netif, struct pbuf *p)
|
||||
{
|
||||
int32_t i32Ret;
|
||||
struct pbuf *q;
|
||||
uint8_t *txBuffer;
|
||||
__IO stc_eth_dma_desc_t *DmaTxDesc;
|
||||
uint32_t byteCnt;
|
||||
uint32_t frameLength = 0UL;
|
||||
uint32_t bufferOffset;
|
||||
uint32_t payloadOffset;
|
||||
|
||||
DmaTxDesc = EthHandle.stcTxDesc;
|
||||
txBuffer = (uint8_t *)((EthHandle.stcTxDesc)->u32Buf1Addr);
|
||||
bufferOffset = 0UL;
|
||||
/* Copy frame from pbufs to driver buffers */
|
||||
for (q = p; q != NULL; q = q->next) {
|
||||
/* If this buffer isn't available, goto error */
|
||||
if (0UL != (DmaTxDesc->u32ControlStatus & ETH_DMA_TXDESC_OWN)) {
|
||||
i32Ret = LL_ERR;
|
||||
goto error;
|
||||
}
|
||||
|
||||
/* Get bytes in current buffer */
|
||||
byteCnt = q->len;
|
||||
payloadOffset = 0UL;
|
||||
/* Check if the length of data to copy is bigger than Tx buffer size */
|
||||
while ((byteCnt + bufferOffset) > ETH_TX_BUF_SIZE) {
|
||||
/* Copy data to Tx buffer*/
|
||||
(void)memcpy((uint8_t *) & (txBuffer[bufferOffset]), (uint8_t *) & (((uint8_t *)q->payload)[payloadOffset]), (ETH_TX_BUF_SIZE - bufferOffset));
|
||||
/* Point to next descriptor */
|
||||
DmaTxDesc = (stc_eth_dma_desc_t *)(DmaTxDesc->u32Buf2NextDescAddr);
|
||||
/* Check if the buffer is available */
|
||||
if (0UL != (DmaTxDesc->u32ControlStatus & ETH_DMA_TXDESC_OWN)) {
|
||||
i32Ret = LL_ERR;
|
||||
goto error;
|
||||
}
|
||||
|
||||
txBuffer = (uint8_t *)(DmaTxDesc->u32Buf1Addr);
|
||||
byteCnt = byteCnt - (ETH_TX_BUF_SIZE - bufferOffset);
|
||||
payloadOffset = payloadOffset + (ETH_TX_BUF_SIZE - bufferOffset);
|
||||
frameLength = frameLength + (ETH_TX_BUF_SIZE - bufferOffset);
|
||||
bufferOffset = 0UL;
|
||||
}
|
||||
/* Copy the remaining bytes */
|
||||
(void)memcpy((uint8_t *) & (txBuffer[bufferOffset]), (uint8_t *) & (((uint8_t *)q->payload)[payloadOffset]), byteCnt);
|
||||
bufferOffset = bufferOffset + byteCnt;
|
||||
frameLength = frameLength + byteCnt;
|
||||
}
|
||||
/* Prepare transmit descriptors to give to DMA */
|
||||
(void)ETH_DMA_SetTransFrame(&EthHandle, frameLength);
|
||||
i32Ret = LL_OK;
|
||||
|
||||
error:
|
||||
/* When Transmit Underflow flag is set, clear it and issue a Transmit Poll Demand to resume transmission */
|
||||
if (RESET != ETH_DMA_GetStatus(ETH_DMA_FLAG_UNS)) {
|
||||
/* Clear DMA UNS flag */
|
||||
ETH_DMA_ClearStatus(ETH_DMA_FLAG_UNS);
|
||||
/* Resume DMA transmission */
|
||||
WRITE_REG32(CM_ETH->DMA_TXPOLLR, 0UL);
|
||||
}
|
||||
|
||||
return i32Ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Should allocate a pbuf and transfer the bytes of the incoming packet from the interface into the pbuf.
|
||||
* @param netif The network interface structure for this ethernetif.
|
||||
* @retval A pbuf filled with the received packet (including MAC header) or NULL on memory error.
|
||||
*/
|
||||
static struct pbuf *low_level_input(struct netif *netif)
|
||||
{
|
||||
struct pbuf *p = NULL;
|
||||
struct pbuf *q;
|
||||
uint32_t len;
|
||||
uint8_t *rxBuffer;
|
||||
__IO stc_eth_dma_desc_t *DmaRxDesc;
|
||||
uint32_t byteCnt;
|
||||
uint32_t bufferOffset;
|
||||
uint32_t payloadOffset;
|
||||
uint32_t i;
|
||||
|
||||
/* Get received frame */
|
||||
if (LL_OK != ETH_DMA_GetReceiveFrame(&EthHandle)) {
|
||||
return NULL;
|
||||
}
|
||||
|
||||
/* Obtain the size of the packet */
|
||||
len = (EthHandle.stcRxFrame).u32Len;
|
||||
rxBuffer = (uint8_t *)(EthHandle.stcRxFrame).u32Buf;
|
||||
if (len > 0UL) {
|
||||
/* Allocate a pbuf chain of pbufs from the buffer */
|
||||
p = (struct pbuf *)malloc(sizeof(struct pbuf) + len);
|
||||
if (NULL != p) {
|
||||
p->next = NULL;
|
||||
p->payload = &((uint8_t *)p)[sizeof(struct pbuf)];
|
||||
p->len = len;
|
||||
(void)memset(p->payload, 0, p->len);
|
||||
}
|
||||
}
|
||||
if (p != NULL) {
|
||||
DmaRxDesc = (EthHandle.stcRxFrame).pstcFSDesc;
|
||||
bufferOffset = 0UL;
|
||||
for (q = p; q != NULL; q = q->next) {
|
||||
byteCnt = q->len;
|
||||
payloadOffset = 0UL;
|
||||
|
||||
/* Check if the length of bytes to copy in current pbuf is bigger than Rx buffer size */
|
||||
while ((byteCnt + bufferOffset) > ETH_RX_BUF_SIZE) {
|
||||
/* Copy data to pbuf */
|
||||
(void)memcpy((uint8_t *) & (((uint8_t *)q->payload)[payloadOffset]), (uint8_t *) & (rxBuffer[bufferOffset]), (ETH_RX_BUF_SIZE - bufferOffset));
|
||||
/* Point to next descriptor */
|
||||
DmaRxDesc = (stc_eth_dma_desc_t *)(DmaRxDesc->u32Buf2NextDescAddr);
|
||||
rxBuffer = (uint8_t *)(DmaRxDesc->u32Buf1Addr);
|
||||
byteCnt = byteCnt - (ETH_RX_BUF_SIZE - bufferOffset);
|
||||
payloadOffset = payloadOffset + (ETH_RX_BUF_SIZE - bufferOffset);
|
||||
bufferOffset = 0UL;
|
||||
}
|
||||
|
||||
/* Copy remaining data in pbuf */
|
||||
(void)memcpy((uint8_t *) & (((uint8_t *)q->payload)[payloadOffset]), (uint8_t *) & (rxBuffer[bufferOffset]), byteCnt);
|
||||
bufferOffset = bufferOffset + byteCnt;
|
||||
}
|
||||
}
|
||||
/* Release descriptors to DMA */
|
||||
DmaRxDesc = (EthHandle.stcRxFrame).pstcFSDesc;
|
||||
for (i = 0UL; i < (EthHandle.stcRxFrame).u32SegCount; i++) {
|
||||
DmaRxDesc->u32ControlStatus |= ETH_DMA_RXDESC_OWN;
|
||||
DmaRxDesc = (stc_eth_dma_desc_t *)(DmaRxDesc->u32Buf2NextDescAddr);
|
||||
}
|
||||
/* Clear Segment_Count */
|
||||
(EthHandle.stcRxFrame).u32SegCount = 0UL;
|
||||
|
||||
/* When Rx Buffer unavailable flag is set, clear it and resume reception */
|
||||
if (RESET != ETH_DMA_GetStatus(ETH_DMA_FLAG_RUS)) {
|
||||
/* Clear DMA RUS flag */
|
||||
ETH_DMA_ClearStatus(ETH_DMA_FLAG_RUS);
|
||||
/* Resume DMA reception */
|
||||
WRITE_REG32(CM_ETH->DMA_RXPOLLR, 0UL);
|
||||
}
|
||||
|
||||
return p;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Should be called at the beginning of the program to set up the network interface.
|
||||
* @param netif The network interface structure for this ethernetif.
|
||||
* @retval err_t:
|
||||
* - LL_OK: The IF is initialized
|
||||
* - LL_ERR: The IF is uninitialized
|
||||
*/
|
||||
err_t ethernetif_init(struct netif *netif)
|
||||
{
|
||||
netif->name[0] = IFNAME0;
|
||||
netif->name[1] = IFNAME1;
|
||||
/* initialize the hardware */
|
||||
return low_level_init(netif);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function should be called when a packet is ready to be read from the interface.
|
||||
* @param netif The network interface structure for this ethernetif.
|
||||
* @retval None
|
||||
*/
|
||||
void ethernetif_input(struct netif *netif)
|
||||
{
|
||||
struct pbuf *p;
|
||||
|
||||
/* Move received packet into a new pbuf */
|
||||
p = low_level_input(netif);
|
||||
/* No packet could be read, silently ignore this */
|
||||
if (p != NULL) {
|
||||
EthernetIF_InputCallback(netif, p);
|
||||
free(p);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Check the netif link status.
|
||||
* @param netif the network interface
|
||||
* @retval None
|
||||
*/
|
||||
void EthernetIF_CheckLink(struct netif *netif)
|
||||
{
|
||||
uint16_t u16RegVal = 0U;
|
||||
static uint8_t u8PreStatus = 0U;
|
||||
|
||||
if (1U == u8EthInitStatus) {
|
||||
u8EthInitStatus = 0U;
|
||||
u8PhyLinkStatus = ETH_LINK_UP;
|
||||
u8PreStatus = 1U;
|
||||
/* Notify link status change */
|
||||
EthernetIF_NotifyLinkChange(netif);
|
||||
} else {
|
||||
/* Read PHY_BSR */
|
||||
(void)ETH_PHY_ReadReg(&EthHandle, PHY_BSR, &u16RegVal);
|
||||
/* Check whether the link is up or down*/
|
||||
if ((0x0000U != u16RegVal) && (0xFFFFU != u16RegVal)) {
|
||||
if ((0U != (u16RegVal & PHY_LINK_STATUS)) && (0U == u8PreStatus)) {
|
||||
u8PhyLinkStatus = ETH_LINK_UP;
|
||||
u8PreStatus = 1U;
|
||||
EthernetIF_LinkCallback(netif);
|
||||
}
|
||||
if ((0U == (u16RegVal & PHY_LINK_STATUS)) && (1U == u8PreStatus)) {
|
||||
u8PhyLinkStatus = ETH_LINK_DOWN;
|
||||
u8PreStatus = 0U;
|
||||
EthernetIF_LinkCallback(netif);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Update the netif link status.
|
||||
* @param netif The network interface.
|
||||
* @retval None
|
||||
*/
|
||||
void EthernetIF_UpdateLink(struct netif *netif)
|
||||
{
|
||||
uint16_t u16RegVal;
|
||||
|
||||
if (1U == u8EthInitStatus) {
|
||||
u8EthInitStatus = 0U;
|
||||
u8PhyLinkStatus = ETH_LINK_UP;
|
||||
/* Notify link status change */
|
||||
EthernetIF_NotifyLinkChange(netif);
|
||||
} else {
|
||||
u16RegVal = PHY_PAGE_ADDR_0;
|
||||
(void)ETH_PHY_WriteReg(&EthHandle, PHY_PSR, u16RegVal);
|
||||
/* Read PHY_IISDR */
|
||||
(void)ETH_PHY_ReadReg(&EthHandle, PHY_IISDR, &u16RegVal);
|
||||
/* Check whether the link interrupt has occurred or not */
|
||||
if (0U != (u16RegVal & PHY_FLAG_LINK_STATUS_CHANGE)) {
|
||||
/* Read PHY_BSR */
|
||||
(void)ETH_PHY_ReadReg(&EthHandle, PHY_BSR, &u16RegVal);
|
||||
if ((0x0000U != u16RegVal) && (0xFFFFU != u16RegVal)) {
|
||||
if (ETH_LINK_UP != u8PhyLinkStatus) {
|
||||
/* Wait until the auto-negotiation will be completed */
|
||||
SysTick_Delay(2U);
|
||||
(void)ETH_PHY_ReadReg(&EthHandle, PHY_BSR, &u16RegVal);
|
||||
}
|
||||
/* Check whether the link is up or down*/
|
||||
if (0U != (u16RegVal & PHY_LINK_STATUS)) {
|
||||
u8PhyLinkStatus = ETH_LINK_UP;
|
||||
} else {
|
||||
u8PhyLinkStatus = ETH_LINK_DOWN;
|
||||
}
|
||||
EthernetIF_LinkCallback(netif);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Ethernet interface periodic handle
|
||||
* @param netif The network interface
|
||||
* @retval None
|
||||
*/
|
||||
void EthernetIF_PeriodicHandle(struct netif *netif)
|
||||
{
|
||||
#ifndef ETH_INTERFACE_RMII
|
||||
uint32_t curTick;
|
||||
static uint32_t u32LinkTimer = 0UL;
|
||||
|
||||
curTick = SysTick_GetTick();
|
||||
/* Check link status periodically */
|
||||
if ((curTick - u32LinkTimer) >= LINK_TIMER_INTERVAL) {
|
||||
u32LinkTimer = curTick;
|
||||
EthernetIF_CheckLink(netif);
|
||||
}
|
||||
#endif /* ETH_INTERFACE_RMII */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Link callback function
|
||||
* @note This function is called on change of link status to update low level driver configuration.
|
||||
* @param netif The network interface
|
||||
* @retval None
|
||||
*/
|
||||
void EthernetIF_LinkCallback(struct netif *netif)
|
||||
{
|
||||
__IO uint32_t tickStart = 0UL;
|
||||
uint16_t u16RegVal = 0U;
|
||||
int32_t i32negoResult = LL_ERR;
|
||||
|
||||
if (ETH_LINK_UP == u8PhyLinkStatus) {
|
||||
/* Restart the auto-negotiation */
|
||||
if (ETH_AUTO_NEGO_DISABLE != (EthHandle.stcCommInit).u16AutoNego) {
|
||||
/* Enable Auto-Negotiation */
|
||||
(void)ETH_PHY_ReadReg(&EthHandle, PHY_BCR, &u16RegVal);
|
||||
u16RegVal |= PHY_AUTONEGOTIATION;
|
||||
(void)ETH_PHY_WriteReg(&EthHandle, PHY_BCR, u16RegVal);
|
||||
|
||||
/* Wait until the auto-negotiation will be completed */
|
||||
tickStart = SysTick_GetTick();
|
||||
do {
|
||||
(void)ETH_PHY_ReadReg(&EthHandle, PHY_BSR, &u16RegVal);
|
||||
if (PHY_AUTONEGO_COMPLETE == (u16RegVal & PHY_AUTONEGO_COMPLETE)) {
|
||||
break;
|
||||
}
|
||||
/* Check for the Timeout (3s) */
|
||||
} while ((SysTick_GetTick() - tickStart) <= 3000U);
|
||||
if (PHY_AUTONEGO_COMPLETE == (u16RegVal & PHY_AUTONEGO_COMPLETE)) {
|
||||
i32negoResult = LL_OK;
|
||||
/* Configure ETH duplex mode according to the result of automatic negotiation */
|
||||
if (0U != (u16RegVal & (PHY_100BASE_TX_FD | PHY_10BASE_T_FD))) {
|
||||
(EthHandle.stcCommInit).u32DuplexMode = ETH_MAC_DUPLEX_MD_FULL;
|
||||
} else {
|
||||
(EthHandle.stcCommInit).u32DuplexMode = ETH_MAC_DUPLEX_MD_HALF;
|
||||
}
|
||||
|
||||
/* Configure ETH speed according to the result of automatic negotiation */
|
||||
if (0U != (u16RegVal & (PHY_100BASE_TX_FD | PHY_100BASE_TX_HD))) {
|
||||
(EthHandle.stcCommInit).u32Speed = ETH_MAC_SPEED_100M;
|
||||
} else {
|
||||
(EthHandle.stcCommInit).u32Speed = ETH_MAC_SPEED_10M;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* AutoNegotiation disable or failed*/
|
||||
if (LL_ERR == i32negoResult) {
|
||||
(void)ETH_PHY_ReadReg(&EthHandle, PHY_BCR, &u16RegVal);
|
||||
CLR_REG16_BIT(u16RegVal, PHY_FULLDUPLEX_100M);
|
||||
/* Set MAC Speed and Duplex Mode to PHY */
|
||||
(void)ETH_PHY_WriteReg(&EthHandle, PHY_BCR,
|
||||
((uint16_t)((EthHandle.stcCommInit).u32DuplexMode >> 3U) |
|
||||
(uint16_t)((EthHandle.stcCommInit).u32Speed >> 1U) | u16RegVal));
|
||||
}
|
||||
/* ETH MAC Re-Configuration */
|
||||
ETH_MAC_SetDuplexSpeed((EthHandle.stcCommInit).u32DuplexMode, (EthHandle.stcCommInit).u32Speed);
|
||||
/* Restart MAC interface */
|
||||
(void)ETH_Start();
|
||||
} else {
|
||||
/* Stop MAC interface */
|
||||
(void)ETH_Stop();
|
||||
}
|
||||
/* Notify link status change */
|
||||
EthernetIF_NotifyLinkChange(netif);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Ethernet interface periodic handle
|
||||
* @param netif The network interface
|
||||
* @retval int32_t:
|
||||
* - LL_OK: The IF is link up
|
||||
* - LL_ERR: The IF is link down
|
||||
*/
|
||||
int32_t EthernetIF_IsLinkUp(struct netif *netif)
|
||||
{
|
||||
return (0U != u8PhyLinkStatus) ? LL_OK : LL_ERR;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Notify link status change.
|
||||
* @param netif The network interface
|
||||
* @retval None
|
||||
*/
|
||||
__WEAKDEF void EthernetIF_NotifyLinkChange(struct netif *netif)
|
||||
{
|
||||
/* This is function could be implemented in user file when the callback is needed */
|
||||
if (LL_OK == EthernetIF_IsLinkUp(netif)) {
|
||||
GPIO_SetPins(ETH_LINK_LED_PORT, ETH_LINK_LED_PIN);
|
||||
} else {
|
||||
GPIO_ResetPins(ETH_LINK_LED_PORT, ETH_LINK_LED_PIN);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Input data handle callback.
|
||||
* @param netif The network interface structure for this ethernetif
|
||||
* @param p The MAC packet to receive
|
||||
* @retval None
|
||||
*/
|
||||
__WEAKDEF void EthernetIF_InputCallback(struct netif *netif, struct pbuf *p)
|
||||
{
|
||||
/* This is function could be implemented in user file when the callback is needed */
|
||||
#ifdef ETHERNET_LOOPBACK_TEST
|
||||
if ((0 == (memcmp(p->payload, txPbuf.payload, p->len))) && (p->len == txPbuf.len)) {
|
||||
KPrintf("eth receive data OK! \r\n");
|
||||
KPrintf("receive data %d %s\n", p->len, p->payload);
|
||||
} else {
|
||||
KPrintf("eth receive data error! \r\n");
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef ETHERNET_LOOPBACK_TEST
|
||||
|
||||
static void EthLoopBackTask(void *parameter)
|
||||
{
|
||||
while (1) {
|
||||
if (RESET == GPIO_ReadInputPins(USER_KEY_PORT, USER_KEY_PIN)) {
|
||||
KPrintf("ready to send eth data\n");
|
||||
if (LL_OK != low_level_output(&testnetif, &txPbuf)) {
|
||||
KPrintf("eth send data error! \r\n");
|
||||
}
|
||||
}
|
||||
|
||||
//KPrintf("ready to receive eth loop back data\n");
|
||||
/* Read a received packet */
|
||||
ethernetif_input(&testnetif);
|
||||
/* Handle periodic timers */
|
||||
EthernetIF_PeriodicHandle(&testnetif);
|
||||
}
|
||||
}
|
||||
|
||||
static void EthLoopBackTest(void)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
|
||||
stc_gpio_init_t stcGpioInit;
|
||||
|
||||
/* KEY initialize */
|
||||
(void)GPIO_StructInit(&stcGpioInit);
|
||||
stcGpioInit.u16PinState = PIN_STAT_RST;
|
||||
stcGpioInit.u16PinDir = PIN_DIR_IN;
|
||||
(void)GPIO_Init(USER_KEY_PORT, USER_KEY_PIN, &stcGpioInit);
|
||||
GPIO_ResetPins(USER_KEY_PORT, USER_KEY_PIN);
|
||||
|
||||
/* Configure the Ethernet */
|
||||
(void)ethernetif_init(&testnetif);
|
||||
|
||||
/* fill data to txPbuf */
|
||||
txPbuf.next = NULL;
|
||||
txPbuf.payload = txBuf;
|
||||
txPbuf.len = strlen(txBuf);
|
||||
|
||||
int eth_loopback_task = 0;
|
||||
eth_loopback_task = KTaskCreate("eth_loopback", EthLoopBackTask, NONE,
|
||||
2048, 8);
|
||||
if(eth_loopback_task < 0) {
|
||||
KPrintf("eth_loopback_task create failed ...%s %d.\n", __FUNCTION__,__LINE__);
|
||||
return;
|
||||
}
|
||||
|
||||
StartupKTask(eth_loopback_task);
|
||||
|
||||
return;
|
||||
}
|
||||
SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN),
|
||||
EthLoopBackTest, EthLoopBackTest, EthLoopBackTest);
|
||||
|
||||
#endif
|
||||
|
||||
/******************************************************************************
|
||||
* EOF (not truncated)
|
||||
*****************************************************************************/
|
||||
@@ -0,0 +1,11 @@
|
||||
config PIN_BUS_NAME
|
||||
string "pin bus name"
|
||||
default "pin"
|
||||
|
||||
config PIN_DRIVER_NAME
|
||||
string "pin driver name"
|
||||
default "pin_drv"
|
||||
|
||||
config PIN_DEVICE_NAME
|
||||
string "pin device name"
|
||||
default "pin_dev"
|
||||
@@ -0,0 +1,3 @@
|
||||
SRC_FILES := connect_gpio.c
|
||||
|
||||
include $(KERNEL_ROOT)/compiler.mk
|
||||
@@ -0,0 +1,795 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2022, RT-Thread Development Team
|
||||
*******************************************************************************
|
||||
* Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd. All rights reserved.
|
||||
*
|
||||
* This software component is licensed by XHSC under BSD 3-Clause license
|
||||
* (the "License"); You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file connect_gpio.c
|
||||
* @brief support hc32f4a0-board gpio function using bus driver framework
|
||||
* @version 3.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2022-12-05
|
||||
*/
|
||||
|
||||
/*************************************************
|
||||
File name: connect_gpio.c
|
||||
Description: support hc32f4a0-board gpio configure and gpio bus register function
|
||||
Others: take projects/ev_hc32f4a0_lqfp176/examples/gpio/gpio_output/source/main.c for references
|
||||
History:
|
||||
1. Date: 2022-12-05
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. support hc32f4a0-board gpio configure, write and read
|
||||
2. support hc32f4a0-board gpio bus device and driver register
|
||||
*************************************************/
|
||||
|
||||
#include <connect_gpio.h>
|
||||
|
||||
#define GPIO_PIN_INDEX(pin) ((uint8_t)((pin) & 0x0F))
|
||||
|
||||
#define ITEM_NUM(items) sizeof(items) / sizeof(items[0])
|
||||
|
||||
#ifndef HC32_PIN_CONFIG
|
||||
#define HC32_PIN_CONFIG(pin, callback, config) \
|
||||
{ \
|
||||
.pinbit = pin, \
|
||||
.irq_callback = callback, \
|
||||
.irq_config = config, \
|
||||
}
|
||||
#endif /* HC32_PIN_CONFIG */
|
||||
|
||||
#define __HC32_PIN(index, gpio_port, gpio_pin) { 0, GPIO_PORT_##gpio_port, GPIO_PIN_##gpio_pin}
|
||||
#define __HC32_PIN_DEFAULT {-1, 0, 0}
|
||||
|
||||
struct PinIndex
|
||||
{
|
||||
int index;
|
||||
uint8_t port;
|
||||
uint16_t pin;
|
||||
};
|
||||
|
||||
static void EXTINT0_IRQHandler(void);
|
||||
static void EXTINT1_IRQHandler(void);
|
||||
static void EXTINT2_IRQHandler(void);
|
||||
static void EXTINT3_IRQHandler(void);
|
||||
static void EXTINT4_IRQHandler(void);
|
||||
static void EXTINT5_IRQHandler(void);
|
||||
static void EXTINT6_IRQHandler(void);
|
||||
static void EXTINT7_IRQHandler(void);
|
||||
static void EXTINT8_IRQHandler(void);
|
||||
static void EXTINT9_IRQHandler(void);
|
||||
static void EXTINT10_IRQHandler(void);
|
||||
static void EXTINT11_IRQHandler(void);
|
||||
static void EXTINT12_IRQHandler(void);
|
||||
static void EXTINT13_IRQHandler(void);
|
||||
static void EXTINT14_IRQHandler(void);
|
||||
static void EXTINT15_IRQHandler(void);
|
||||
|
||||
static struct Hc32PinIrqMap pin_irq_map[] =
|
||||
{
|
||||
HC32_PIN_CONFIG(GPIO_PIN_00, EXTINT0_IRQHandler, EXTINT0_IRQ_CONFIG),
|
||||
HC32_PIN_CONFIG(GPIO_PIN_01, EXTINT1_IRQHandler, EXTINT1_IRQ_CONFIG),
|
||||
HC32_PIN_CONFIG(GPIO_PIN_02, EXTINT2_IRQHandler, EXTINT2_IRQ_CONFIG),
|
||||
HC32_PIN_CONFIG(GPIO_PIN_03, EXTINT3_IRQHandler, EXTINT3_IRQ_CONFIG),
|
||||
HC32_PIN_CONFIG(GPIO_PIN_04, EXTINT4_IRQHandler, EXTINT4_IRQ_CONFIG),
|
||||
HC32_PIN_CONFIG(GPIO_PIN_05, EXTINT5_IRQHandler, EXTINT5_IRQ_CONFIG),
|
||||
HC32_PIN_CONFIG(GPIO_PIN_06, EXTINT6_IRQHandler, EXTINT6_IRQ_CONFIG),
|
||||
HC32_PIN_CONFIG(GPIO_PIN_07, EXTINT7_IRQHandler, EXTINT7_IRQ_CONFIG),
|
||||
HC32_PIN_CONFIG(GPIO_PIN_08, EXTINT8_IRQHandler, EXTINT8_IRQ_CONFIG),
|
||||
HC32_PIN_CONFIG(GPIO_PIN_09, EXTINT9_IRQHandler, EXTINT9_IRQ_CONFIG),
|
||||
HC32_PIN_CONFIG(GPIO_PIN_10, EXTINT10_IRQHandler, EXTINT10_IRQ_CONFIG),
|
||||
HC32_PIN_CONFIG(GPIO_PIN_11, EXTINT11_IRQHandler, EXTINT11_IRQ_CONFIG),
|
||||
HC32_PIN_CONFIG(GPIO_PIN_12, EXTINT12_IRQHandler, EXTINT12_IRQ_CONFIG),
|
||||
HC32_PIN_CONFIG(GPIO_PIN_13, EXTINT13_IRQHandler, EXTINT13_IRQ_CONFIG),
|
||||
HC32_PIN_CONFIG(GPIO_PIN_14, EXTINT14_IRQHandler, EXTINT14_IRQ_CONFIG),
|
||||
HC32_PIN_CONFIG(GPIO_PIN_15, EXTINT15_IRQHandler, EXTINT15_IRQ_CONFIG),
|
||||
};
|
||||
|
||||
static const struct PinIndex pins[] =
|
||||
{
|
||||
__HC32_PIN_DEFAULT,
|
||||
__HC32_PIN(1, E, 02),
|
||||
__HC32_PIN(2, E, 03),
|
||||
__HC32_PIN(3, E, 04),
|
||||
__HC32_PIN(4, E, 05),
|
||||
__HC32_PIN(5, E, 06),
|
||||
__HC32_PIN_DEFAULT,
|
||||
__HC32_PIN(7, I, 08),
|
||||
__HC32_PIN_DEFAULT,
|
||||
__HC32_PIN(9, C, 14),
|
||||
__HC32_PIN(10, C, 15),
|
||||
__HC32_PIN(11, I, 09),
|
||||
__HC32_PIN(12, I, 10),
|
||||
__HC32_PIN(13, I, 11),
|
||||
__HC32_PIN_DEFAULT,
|
||||
__HC32_PIN_DEFAULT,
|
||||
__HC32_PIN(16, F, 00),
|
||||
__HC32_PIN(17, F, 01),
|
||||
__HC32_PIN(18, F, 02),
|
||||
__HC32_PIN(19, F, 03),
|
||||
__HC32_PIN(20, F, 04),
|
||||
__HC32_PIN(21, F, 05),
|
||||
__HC32_PIN_DEFAULT,
|
||||
__HC32_PIN_DEFAULT,
|
||||
__HC32_PIN(24, F, 06),
|
||||
__HC32_PIN(25, F, 07),
|
||||
__HC32_PIN(26, F, 08),
|
||||
__HC32_PIN(27, F, 09),
|
||||
__HC32_PIN(28, F, 10),
|
||||
__HC32_PIN(29, H, 00),
|
||||
__HC32_PIN(30, H, 01),
|
||||
__HC32_PIN_DEFAULT,
|
||||
__HC32_PIN(32, C, 00),
|
||||
__HC32_PIN(33, C, 01),
|
||||
__HC32_PIN(34, C, 02),
|
||||
__HC32_PIN(35, C, 03),
|
||||
__HC32_PIN_DEFAULT,
|
||||
__HC32_PIN_DEFAULT,
|
||||
__HC32_PIN_DEFAULT,
|
||||
__HC32_PIN_DEFAULT,
|
||||
__HC32_PIN(40, A, 00),
|
||||
__HC32_PIN(41, A, 01),
|
||||
__HC32_PIN(42, A, 02),
|
||||
__HC32_PIN(43, H, 02),
|
||||
__HC32_PIN(44, H, 03),
|
||||
__HC32_PIN(45, H, 04),
|
||||
__HC32_PIN(46, H, 05),
|
||||
__HC32_PIN(47, A, 03),
|
||||
__HC32_PIN_DEFAULT,
|
||||
__HC32_PIN_DEFAULT,
|
||||
__HC32_PIN(50, A, 04),
|
||||
__HC32_PIN(51, A, 05),
|
||||
__HC32_PIN(52, A, 06),
|
||||
__HC32_PIN(53, A, 07),
|
||||
__HC32_PIN(54, C, 04),
|
||||
__HC32_PIN(55, C, 05),
|
||||
__HC32_PIN(56, B, 00),
|
||||
__HC32_PIN(57, B, 01),
|
||||
__HC32_PIN(58, B, 02),
|
||||
__HC32_PIN(59, F, 11),
|
||||
__HC32_PIN(60, F, 12),
|
||||
__HC32_PIN_DEFAULT,
|
||||
__HC32_PIN_DEFAULT,
|
||||
__HC32_PIN(63, F, 13),
|
||||
__HC32_PIN(64, F, 14),
|
||||
__HC32_PIN(65, F, 15),
|
||||
__HC32_PIN(66, G, 00),
|
||||
__HC32_PIN(67, G, 01),
|
||||
__HC32_PIN(68, E, 07),
|
||||
__HC32_PIN(69, E, 08),
|
||||
__HC32_PIN(70, E, 09),
|
||||
__HC32_PIN_DEFAULT,
|
||||
__HC32_PIN_DEFAULT,
|
||||
__HC32_PIN(73, E, 10),
|
||||
__HC32_PIN(74, E, 11),
|
||||
__HC32_PIN(75, E, 12),
|
||||
__HC32_PIN(76, E, 13),
|
||||
__HC32_PIN(77, E, 14),
|
||||
__HC32_PIN(78, E, 15),
|
||||
__HC32_PIN(79, B, 10),
|
||||
__HC32_PIN(80, B, 11),
|
||||
__HC32_PIN_DEFAULT,
|
||||
__HC32_PIN_DEFAULT,
|
||||
__HC32_PIN(83, H, 06),
|
||||
__HC32_PIN(84, H, 07),
|
||||
__HC32_PIN(85, H, 08),
|
||||
__HC32_PIN(86, H, 09),
|
||||
__HC32_PIN(87, H, 10),
|
||||
__HC32_PIN(88, H, 11),
|
||||
__HC32_PIN(89, H, 12),
|
||||
__HC32_PIN_DEFAULT,
|
||||
__HC32_PIN_DEFAULT,
|
||||
__HC32_PIN(92, B, 12),
|
||||
__HC32_PIN(93, B, 13),
|
||||
__HC32_PIN(94, B, 14),
|
||||
__HC32_PIN(95, B, 15),
|
||||
__HC32_PIN(96, D, 08),
|
||||
__HC32_PIN(97, D, 09),
|
||||
__HC32_PIN(98, D, 10),
|
||||
__HC32_PIN(99, D, 11),
|
||||
__HC32_PIN(100, D, 12),
|
||||
__HC32_PIN(101, D, 13),
|
||||
__HC32_PIN_DEFAULT,
|
||||
__HC32_PIN_DEFAULT,
|
||||
__HC32_PIN(104, D, 14),
|
||||
__HC32_PIN(105, D, 15),
|
||||
__HC32_PIN(106, G, 02),
|
||||
__HC32_PIN(107, G, 03),
|
||||
__HC32_PIN(108, G, 04),
|
||||
__HC32_PIN(109, G, 05),
|
||||
__HC32_PIN(110, G, 06),
|
||||
__HC32_PIN(111, G, 07),
|
||||
__HC32_PIN(112, G, 08),
|
||||
__HC32_PIN_DEFAULT,
|
||||
__HC32_PIN_DEFAULT,
|
||||
__HC32_PIN(115, C, 06),
|
||||
__HC32_PIN(116, C, 07),
|
||||
__HC32_PIN(117, C, 08),
|
||||
__HC32_PIN(118, C, 09),
|
||||
__HC32_PIN(119, A, 08),
|
||||
__HC32_PIN(120, A, 09),
|
||||
__HC32_PIN(121, A, 10),
|
||||
__HC32_PIN(122, A, 11),
|
||||
__HC32_PIN(123, A, 12),
|
||||
__HC32_PIN(124, A, 13),
|
||||
__HC32_PIN_DEFAULT,
|
||||
__HC32_PIN_DEFAULT,
|
||||
__HC32_PIN_DEFAULT,
|
||||
__HC32_PIN(128, H, 13),
|
||||
__HC32_PIN(129, H, 14),
|
||||
__HC32_PIN(130, H, 15),
|
||||
__HC32_PIN(131, I, 00),
|
||||
__HC32_PIN(132, I, 01),
|
||||
__HC32_PIN(133, I, 02),
|
||||
__HC32_PIN(134, I, 03),
|
||||
__HC32_PIN_DEFAULT,
|
||||
__HC32_PIN_DEFAULT,
|
||||
__HC32_PIN(137, A, 14),
|
||||
__HC32_PIN(138, A, 15),
|
||||
__HC32_PIN(139, C, 10),
|
||||
__HC32_PIN(140, C, 11),
|
||||
__HC32_PIN(141, C, 12),
|
||||
__HC32_PIN(142, D, 00),
|
||||
__HC32_PIN(143, D, 01),
|
||||
__HC32_PIN(144, D, 02),
|
||||
__HC32_PIN(145, D, 03),
|
||||
__HC32_PIN(146, D, 04),
|
||||
__HC32_PIN(147, D, 05),
|
||||
__HC32_PIN_DEFAULT,
|
||||
__HC32_PIN_DEFAULT,
|
||||
__HC32_PIN(150, D, 06),
|
||||
__HC32_PIN(151, D, 07),
|
||||
__HC32_PIN(152, G, 09),
|
||||
__HC32_PIN(153, G, 10),
|
||||
__HC32_PIN(154, G, 11),
|
||||
__HC32_PIN(155, G, 12),
|
||||
__HC32_PIN(156, G, 13),
|
||||
__HC32_PIN(157, G, 14),
|
||||
__HC32_PIN_DEFAULT,
|
||||
__HC32_PIN_DEFAULT,
|
||||
__HC32_PIN(160, G, 15),
|
||||
__HC32_PIN(161, B, 03),
|
||||
__HC32_PIN(162, B, 04),
|
||||
__HC32_PIN(163, B, 05),
|
||||
__HC32_PIN(164, B, 06),
|
||||
__HC32_PIN(165, B, 07),
|
||||
__HC32_PIN(166, I, 13),
|
||||
__HC32_PIN(167, B, 08),
|
||||
__HC32_PIN(168, B, 09),
|
||||
__HC32_PIN(169, E, 00),
|
||||
__HC32_PIN(170, E, 01),
|
||||
__HC32_PIN(171, I, 12),
|
||||
__HC32_PIN_DEFAULT,
|
||||
__HC32_PIN(173, I, 04),
|
||||
__HC32_PIN(174, I, 05),
|
||||
__HC32_PIN(175, I, 06),
|
||||
__HC32_PIN(176, I, 07),
|
||||
};
|
||||
|
||||
struct PinIrqHdr pin_irq_hdr_tab[] =
|
||||
{
|
||||
{-1, 0, NONE, NONE},
|
||||
{-1, 0, NONE, NONE},
|
||||
{-1, 0, NONE, NONE},
|
||||
{-1, 0, NONE, NONE},
|
||||
{-1, 0, NONE, NONE},
|
||||
{-1, 0, NONE, NONE},
|
||||
{-1, 0, NONE, NONE},
|
||||
{-1, 0, NONE, NONE},
|
||||
{-1, 0, NONE, NONE},
|
||||
{-1, 0, NONE, NONE},
|
||||
{-1, 0, NONE, NONE},
|
||||
{-1, 0, NONE, NONE},
|
||||
{-1, 0, NONE, NONE},
|
||||
{-1, 0, NONE, NONE},
|
||||
{-1, 0, NONE, NONE},
|
||||
{-1, 0, NONE, NONE}
|
||||
};
|
||||
|
||||
static void PinIrqHandler(uint16_t pinbit)
|
||||
{
|
||||
int32_t irqindex = -1;
|
||||
|
||||
if (SET == EXTINT_GetExtIntStatus(pinbit))
|
||||
{
|
||||
EXTINT_ClearExtIntStatus(pinbit);
|
||||
irqindex = __CLZ(__RBIT(pinbit));
|
||||
if (pin_irq_hdr_tab[irqindex].hdr) {
|
||||
pin_irq_hdr_tab[irqindex].hdr(pin_irq_hdr_tab[irqindex].args);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void EXTINT0_IRQHandler(void)
|
||||
{
|
||||
PinIrqHandler(pin_irq_map[0].pinbit);
|
||||
}
|
||||
|
||||
static void EXTINT1_IRQHandler(void)
|
||||
{
|
||||
PinIrqHandler(pin_irq_map[1].pinbit);
|
||||
}
|
||||
|
||||
static void EXTINT2_IRQHandler(void)
|
||||
{
|
||||
PinIrqHandler(pin_irq_map[2].pinbit);
|
||||
}
|
||||
|
||||
static void EXTINT3_IRQHandler(void)
|
||||
{
|
||||
PinIrqHandler(pin_irq_map[3].pinbit);
|
||||
}
|
||||
|
||||
static void EXTINT4_IRQHandler(void)
|
||||
{
|
||||
PinIrqHandler(pin_irq_map[4].pinbit);
|
||||
}
|
||||
|
||||
static void EXTINT5_IRQHandler(void)
|
||||
{
|
||||
PinIrqHandler(pin_irq_map[5].pinbit);
|
||||
}
|
||||
|
||||
static void EXTINT6_IRQHandler(void)
|
||||
{
|
||||
PinIrqHandler(pin_irq_map[6].pinbit);
|
||||
}
|
||||
|
||||
static void EXTINT7_IRQHandler(void)
|
||||
{
|
||||
PinIrqHandler(pin_irq_map[7].pinbit);
|
||||
}
|
||||
|
||||
static void EXTINT8_IRQHandler(void)
|
||||
{
|
||||
PinIrqHandler(pin_irq_map[8].pinbit);
|
||||
}
|
||||
|
||||
static void EXTINT9_IRQHandler(void)
|
||||
{
|
||||
PinIrqHandler(pin_irq_map[9].pinbit);
|
||||
}
|
||||
|
||||
static void EXTINT10_IRQHandler(void)
|
||||
{
|
||||
PinIrqHandler(pin_irq_map[10].pinbit);
|
||||
}
|
||||
|
||||
static void EXTINT11_IRQHandler(void)
|
||||
{
|
||||
PinIrqHandler(pin_irq_map[11].pinbit);
|
||||
}
|
||||
|
||||
static void EXTINT12_IRQHandler(void)
|
||||
{
|
||||
PinIrqHandler(pin_irq_map[12].pinbit);
|
||||
}
|
||||
|
||||
static void EXTINT13_IRQHandler(void)
|
||||
{
|
||||
PinIrqHandler(pin_irq_map[13].pinbit);
|
||||
}
|
||||
|
||||
static void EXTINT14_IRQHandler(void)
|
||||
{
|
||||
PinIrqHandler(pin_irq_map[14].pinbit);
|
||||
}
|
||||
|
||||
static void EXTINT15_IRQHandler(void)
|
||||
{
|
||||
PinIrqHandler(pin_irq_map[15].pinbit);
|
||||
}
|
||||
|
||||
const struct PinIndex *GetPin(uint8_t pin)
|
||||
{
|
||||
const struct PinIndex *index;
|
||||
|
||||
if (pin < ITEM_NUM(pins)) {
|
||||
index = &pins[pin];
|
||||
if (index->index == -1)
|
||||
index = NONE;
|
||||
} else {
|
||||
index = NONE;
|
||||
}
|
||||
|
||||
return index;
|
||||
}
|
||||
|
||||
static int32 GpioConfigMode(int mode, const struct PinIndex* index)
|
||||
{
|
||||
stc_gpio_init_t stcGpioInit;
|
||||
NULL_PARAM_CHECK(index);
|
||||
|
||||
GPIO_StructInit(&stcGpioInit);
|
||||
|
||||
switch (mode)
|
||||
{
|
||||
case GPIO_CFG_OUTPUT:
|
||||
stcGpioInit.u16PinDir = PIN_DIR_OUT;
|
||||
stcGpioInit.u16PinOutputType = PIN_OUT_TYPE_CMOS;
|
||||
break;
|
||||
case GPIO_CFG_INPUT:
|
||||
stcGpioInit.u16PinDir = PIN_DIR_IN;
|
||||
break;
|
||||
case GPIO_CFG_INPUT_PULLUP:
|
||||
stcGpioInit.u16PinDir = PIN_DIR_IN;
|
||||
stcGpioInit.u16PullUp = PIN_PU_ON;
|
||||
break;
|
||||
case GPIO_CFG_INPUT_PULLDOWN:
|
||||
stcGpioInit.u16PinDir = PIN_DIR_IN;
|
||||
stcGpioInit.u16PullUp = PIN_PU_OFF;
|
||||
break;
|
||||
case GPIO_CFG_OUTPUT_OD:
|
||||
stcGpioInit.u16PinDir = PIN_DIR_OUT;
|
||||
stcGpioInit.u16PinOutputType = PIN_OUT_TYPE_NMOS;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
GPIO_Init(index->pin, index->pin, &stcGpioInit);
|
||||
}
|
||||
|
||||
static int32 GpioIrqRegister(int32 pin, int32 mode, void (*hdr)(void *args), void *args)
|
||||
{
|
||||
const struct PinIndex *index = GetPin(pin);
|
||||
int32 irqindex = -1;
|
||||
|
||||
irqindex = GPIO_PIN_INDEX(index->pin);
|
||||
if (irqindex >= ITEM_NUM(pin_irq_map)) {
|
||||
return -ENONESYS;
|
||||
}
|
||||
|
||||
x_base level = CriticalAreaLock();
|
||||
if (pin_irq_hdr_tab[irqindex].pin == pin &&
|
||||
pin_irq_hdr_tab[irqindex].hdr == hdr &&
|
||||
pin_irq_hdr_tab[irqindex].mode == mode &&
|
||||
pin_irq_hdr_tab[irqindex].args == args
|
||||
) {
|
||||
CriticalAreaUnLock(level);
|
||||
return EOK;
|
||||
}
|
||||
if (pin_irq_hdr_tab[irqindex].pin != -1) {
|
||||
CriticalAreaUnLock(level);
|
||||
return -EDEV_BUSY;
|
||||
}
|
||||
pin_irq_hdr_tab[irqindex].pin = pin;
|
||||
pin_irq_hdr_tab[irqindex].hdr = hdr;
|
||||
pin_irq_hdr_tab[irqindex].mode = mode;
|
||||
pin_irq_hdr_tab[irqindex].args = args;
|
||||
CriticalAreaUnLock(level);
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
static uint32 GpioIrqFree(x_base pin)
|
||||
{
|
||||
const struct PinIndex* index = GetPin(pin);
|
||||
int32 irqindex = -1;
|
||||
|
||||
irqindex = GPIO_PIN_INDEX(index->pin);
|
||||
if (irqindex >= ITEM_NUM(pin_irq_map)) {
|
||||
return -ENONESYS;
|
||||
}
|
||||
|
||||
x_base level = CriticalAreaLock();
|
||||
if (pin_irq_hdr_tab[irqindex].pin == -1) {
|
||||
CriticalAreaUnLock(level);
|
||||
return EOK;
|
||||
}
|
||||
pin_irq_hdr_tab[irqindex].pin = -1;
|
||||
pin_irq_hdr_tab[irqindex].hdr = NONE;
|
||||
pin_irq_hdr_tab[irqindex].mode = 0;
|
||||
pin_irq_hdr_tab[irqindex].args = NONE;
|
||||
CriticalAreaUnLock(level);
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
static void GpioIrqConfig(uint8_t u8Port, uint16_t u16Pin, uint16_t u16ExInt)
|
||||
{
|
||||
__IO uint16_t *PCRx;
|
||||
uint16_t pin_num;
|
||||
|
||||
pin_num = __CLZ(__RBIT(u16Pin));
|
||||
PCRx = (__IO uint16_t *)((uint32_t)(&CM_GPIO->PCRA0) + ((uint32_t)u8Port * 0x40UL) + (pin_num * 4UL));
|
||||
MODIFY_REG16(*PCRx, GPIO_PCR_INTE, u16ExInt);
|
||||
}
|
||||
|
||||
static int32 GpioIrqEnable(x_base pin)
|
||||
{
|
||||
struct Hc32PinIrqMap *irq_map;
|
||||
const struct PinIndex* index = GetPin(pin);
|
||||
int32 irqindex = -1;
|
||||
stc_extint_init_t stcExtIntInit;
|
||||
|
||||
irqindex = GPIO_PIN_INDEX(index->pin);
|
||||
if (irqindex >= ITEM_NUM(pin_irq_map)) {
|
||||
return -ENONESYS;
|
||||
}
|
||||
|
||||
x_base level = CriticalAreaLock();
|
||||
if (pin_irq_hdr_tab[irqindex].pin == -1) {
|
||||
CriticalAreaUnLock(level);
|
||||
return -ENONESYS;
|
||||
}
|
||||
|
||||
/* Extint config */
|
||||
EXTINT_StructInit(&stcExtIntInit);
|
||||
switch (pin_irq_hdr_tab[irqindex].mode)
|
||||
{
|
||||
case GPIO_IRQ_EDGE_RISING:
|
||||
stcExtIntInit.u32Edge = EXTINT_TRIG_RISING;
|
||||
break;
|
||||
case GPIO_IRQ_EDGE_FALLING:
|
||||
stcExtIntInit.u32Edge = EXTINT_TRIG_FALLING;
|
||||
break;
|
||||
case GPIO_IRQ_EDGE_BOTH:
|
||||
stcExtIntInit.u32Edge = EXTINT_TRIG_BOTH;
|
||||
break;
|
||||
case GPIO_IRQ_LEVEL_LOW:
|
||||
stcExtIntInit.u32Edge = EXTINT_TRIG_LOW;
|
||||
break;
|
||||
}
|
||||
EXTINT_Init(index->pin, &stcExtIntInit);
|
||||
NVIC_EnableIRQ(irq_map->irq_config.irq_num);
|
||||
GpioIrqConfig(index->pin, index->pin, PIN_EXTINT_ON);
|
||||
|
||||
CriticalAreaUnLock(level);
|
||||
return EOK;
|
||||
}
|
||||
|
||||
static int32 GpioIrqDisable(x_base pin)
|
||||
{
|
||||
struct Hc32PinIrqMap *irq_map;
|
||||
const struct PinIndex* index = GetPin(pin);
|
||||
|
||||
x_base level = CriticalAreaLock();
|
||||
|
||||
GpioIrqConfig(index->pin, index->pin, PIN_EXTINT_OFF);
|
||||
NVIC_DisableIRQ(irq_map->irq_config.irq_num);
|
||||
|
||||
CriticalAreaUnLock(level);
|
||||
return EOK;
|
||||
}
|
||||
|
||||
static uint32 Hc32PinConfigure(struct PinParam *param)
|
||||
{
|
||||
NULL_PARAM_CHECK(param);
|
||||
uint32 ret = EOK;
|
||||
|
||||
const struct PinIndex *index = GetPin(param->pin);
|
||||
switch(param->cmd)
|
||||
{
|
||||
case GPIO_CONFIG_MODE:
|
||||
GpioConfigMode(param->mode, index);
|
||||
break;
|
||||
case GPIO_IRQ_REGISTER:
|
||||
ret = GpioIrqRegister(param->pin, param->irq_set.irq_mode, param->irq_set.hdr, param->irq_set.args);
|
||||
break;
|
||||
case GPIO_IRQ_FREE:
|
||||
ret = GpioIrqFree(param->pin);
|
||||
break;
|
||||
case GPIO_IRQ_ENABLE:
|
||||
ret = GpioIrqEnable(param->pin);
|
||||
break;
|
||||
case GPIO_IRQ_DISABLE:
|
||||
ret = GpioIrqDisable(param->pin);
|
||||
break;
|
||||
default:
|
||||
ret = -EINVALED;
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static uint32 Hc32PinInit(void)
|
||||
{
|
||||
static x_bool pin_init_flag = RET_FALSE;
|
||||
|
||||
if (!pin_init_flag) {
|
||||
pin_init_flag = RET_TRUE;
|
||||
}
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
static uint32 Hc32GpioDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
|
||||
{
|
||||
NULL_PARAM_CHECK(drv);
|
||||
NULL_PARAM_CHECK(configure_info);
|
||||
|
||||
x_err_t ret = EOK;
|
||||
struct PinParam *param;
|
||||
|
||||
switch (configure_info->configure_cmd)
|
||||
{
|
||||
case OPE_INT:
|
||||
ret = Hc32PinInit();
|
||||
break;
|
||||
case OPE_CFG:
|
||||
param = (struct PinParam *)configure_info->private_data;
|
||||
ret = Hc32PinConfigure(param);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
uint32 Hc32PinWrite(void *dev, struct BusBlockWriteParam *write_param)
|
||||
{
|
||||
NULL_PARAM_CHECK(dev);
|
||||
NULL_PARAM_CHECK(write_param);
|
||||
|
||||
struct PinStat *pinstat = (struct PinStat *)write_param->buffer;
|
||||
const struct PinIndex* index = GetPin(pinstat->pin);
|
||||
NULL_PARAM_CHECK(index);
|
||||
|
||||
if (GPIO_LOW == pinstat->val) {
|
||||
GPIO_ResetPins(index->pin, index->pin);
|
||||
} else {
|
||||
GPIO_SetPins(index->pin, index->pin);
|
||||
}
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
uint32 Hc32PinRead(void *dev, struct BusBlockReadParam *read_param)
|
||||
{
|
||||
NULL_PARAM_CHECK(dev);
|
||||
NULL_PARAM_CHECK(read_param);
|
||||
struct PinStat *pinstat = (struct PinStat *)read_param->buffer;
|
||||
const struct PinIndex* index = GetPin(pinstat->pin);
|
||||
NULL_PARAM_CHECK(index);
|
||||
|
||||
if(GPIO_ReadInputPins(index->pin, index->pin) == PIN_RESET) {
|
||||
pinstat->val = GPIO_LOW;
|
||||
} else {
|
||||
pinstat->val = GPIO_HIGH;
|
||||
}
|
||||
return pinstat->val;
|
||||
}
|
||||
|
||||
static const struct PinDevDone dev_done =
|
||||
{
|
||||
.open = NONE,
|
||||
.close = NONE,
|
||||
.write = Hc32PinWrite,
|
||||
.read = Hc32PinRead,
|
||||
};
|
||||
|
||||
int HwGpioInit(void)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
|
||||
static struct PinBus pin;
|
||||
memset(&pin, 0, sizeof(struct PinBus));
|
||||
|
||||
ret = PinBusInit(&pin, PIN_BUS_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("gpio bus init error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
static struct PinDriver drv;
|
||||
memset(&drv, 0, sizeof(struct PinDriver));
|
||||
drv.configure = &Hc32GpioDrvConfigure;
|
||||
|
||||
ret = PinDriverInit(&drv, PIN_DRIVER_NAME, NONE);
|
||||
if (ret != EOK) {
|
||||
KPrintf("pin driver init error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = PinDriverAttachToBus(PIN_DRIVER_NAME, PIN_BUS_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("pin driver attach error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
static struct PinHardwareDevice dev;
|
||||
memset(&dev, 0, sizeof(struct PinHardwareDevice));
|
||||
dev.dev_done = &dev_done;
|
||||
|
||||
ret = PinDeviceRegister(&dev, NONE, PIN_DEVICE_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("pin device register error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = PinDeviceAttachToBus(PIN_DEVICE_NAME, PIN_BUS_NAME);
|
||||
if (ret != EOK) {
|
||||
KPrintf("pin device register error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
//#define GPIO_LED_TEST
|
||||
#ifdef GPIO_LED_TEST
|
||||
|
||||
static void GpioLedDelay(void)
|
||||
{
|
||||
volatile uint32_t i = 0;
|
||||
for (i = 0; i < 8000000; ++i)
|
||||
{
|
||||
__asm("NOP"); /* delay */
|
||||
}
|
||||
}
|
||||
|
||||
void GpioLedTest(void)
|
||||
{
|
||||
BusType pin;
|
||||
struct BusConfigureInfo configure_info;
|
||||
struct BusBlockWriteParam write_param;
|
||||
|
||||
int ret = 0;
|
||||
int pinSet = -1;
|
||||
|
||||
pin = BusFind(PIN_BUS_NAME);
|
||||
if (!pin) {
|
||||
KPrintf("find %s failed!\n", PIN_BUS_NAME);
|
||||
return;
|
||||
}
|
||||
pin->owner_driver = BusFindDriver(pin, PIN_DRIVER_NAME);
|
||||
pin->owner_haldev = BusFindDevice(pin, PIN_DEVICE_NAME);
|
||||
|
||||
configure_info.configure_cmd = OPE_INT;
|
||||
ret = BusDrvConfigure(pin->owner_driver, &configure_info);
|
||||
if (ret != EOK) {
|
||||
KPrintf("initialize %s failed!\n", PIN_BUS_NAME);
|
||||
return;
|
||||
}
|
||||
|
||||
struct PinParam led_gpio_param;
|
||||
struct PinStat led_gpio_stat;
|
||||
|
||||
// 134 -> PortI Pin03 LED3
|
||||
x_base pinIndex = 134;
|
||||
led_gpio_param.cmd = GPIO_CONFIG_MODE;
|
||||
led_gpio_param.pin = pinIndex;
|
||||
led_gpio_param.mode = GPIO_CFG_OUTPUT;
|
||||
|
||||
configure_info.configure_cmd = OPE_CFG;
|
||||
configure_info.private_data = (void *)&led_gpio_param;
|
||||
ret = BusDrvConfigure(pin->owner_driver, &configure_info);
|
||||
if (ret != EOK) {
|
||||
KPrintf("config pin failed!\n");
|
||||
return;
|
||||
}
|
||||
|
||||
while (1) {
|
||||
GpioLedDelay();
|
||||
|
||||
if (pinSet) {
|
||||
/* set led pin as high*/
|
||||
led_gpio_stat.pin = pinIndex;
|
||||
led_gpio_stat.val = GPIO_HIGH;
|
||||
write_param.buffer = (void *)&led_gpio_stat;
|
||||
BusDevWriteData(pin->owner_haldev, &write_param);
|
||||
pinSet = 0;
|
||||
} else {
|
||||
/* set led pin as low*/
|
||||
led_gpio_stat.pin = pinIndex;
|
||||
led_gpio_stat.val = GPIO_LOW;
|
||||
write_param.buffer = (void *)&led_gpio_stat;
|
||||
BusDevWriteData(pin->owner_haldev, &write_param);
|
||||
pinSet = 1;
|
||||
}
|
||||
}
|
||||
}
|
||||
SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN),
|
||||
GpioLedTest, GpioLedTest, gpio led test);
|
||||
#endif
|
||||
@@ -0,0 +1,22 @@
|
||||
config I2C_BUS_NAME_1
|
||||
string "i2c 1 bus name"
|
||||
default "i2c1"
|
||||
config I2C_DRV_NAME_1
|
||||
string "i2c bus 1 driver name"
|
||||
default "i2c1_drv"
|
||||
config I2C_1_DEVICE_NAME_0
|
||||
string "i2c bus 1 device 0 name"
|
||||
default "i2c1_dev0"
|
||||
config I2C_DEVICE_MODE
|
||||
bool "choose i2c device mode as master or slave"
|
||||
default y
|
||||
choice
|
||||
prompt "choose i2c mode"
|
||||
default I2C_DEVICE_MASTER
|
||||
|
||||
config I2C_DEVICE_MASTER
|
||||
bool "set i2c master"
|
||||
|
||||
config I2C_DEVICE_SLAVE
|
||||
bool "set i2c slave"
|
||||
endchoice
|
||||
@@ -0,0 +1,3 @@
|
||||
SRC_FILES := connect_i2c.c
|
||||
|
||||
include $(KERNEL_ROOT)/compiler.mk
|
||||
@@ -0,0 +1,485 @@
|
||||
/*
|
||||
*******************************************************************************
|
||||
* Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd. All rights reserved.
|
||||
*
|
||||
* This software component is licensed by XHSC under BSD 3-Clause license
|
||||
* (the "License"); You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file connect_i2c.c
|
||||
* @brief support hc32f4a0-board i2c function and register to bus framework
|
||||
* @version 3.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2022-12-05
|
||||
*/
|
||||
|
||||
/*************************************************
|
||||
File name: connect_i2c.c
|
||||
Description: support hc32f4a0-board i2c configure and i2c bus register function
|
||||
Others: take projects/ev_hc32f4a0_lqfp176/examples/i2c/i2c_master_polling/source/main.c for references
|
||||
History:
|
||||
1. Date: 2022-12-05
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. support hc32f4a0-board i2c configure, write and read
|
||||
2. support hc32f4a0-board i2c bus device and driver register
|
||||
*************************************************/
|
||||
|
||||
#include <connect_i2c.h>
|
||||
|
||||
#define I2C_UNIT (CM_I2C1)
|
||||
#define I2C_FCG_USE (FCG1_PERIPH_I2C1)
|
||||
|
||||
#define I2C_TIMEOUT (0x40000UL)
|
||||
#define I2C_BAUDRATE (400000UL)
|
||||
|
||||
/* Define port and pin for SDA and SCL */
|
||||
#define I2C_SCL_PORT (GPIO_PORT_D)
|
||||
#define I2C_SCL_PIN (GPIO_PIN_03)
|
||||
#define I2C_SDA_PORT (GPIO_PORT_F)
|
||||
#define I2C_SDA_PIN (GPIO_PIN_10)
|
||||
#define I2C_GPIO_SCL_FUNC (GPIO_FUNC_49)
|
||||
#define I2C_GPIO_SDA_FUNC (GPIO_FUNC_48)
|
||||
|
||||
static x_err_t I2cGpioInit(void)
|
||||
{
|
||||
GPIO_SetFunc(I2C_SDA_PORT, I2C_SDA_PIN, I2C_GPIO_SDA_FUNC);
|
||||
GPIO_SetFunc(I2C_SCL_PORT, I2C_SCL_PIN, I2C_GPIO_SCL_FUNC);
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
static uint32 I2cInit(struct I2cDriver *i2c_drv, struct BusConfigureInfo *configure_info)
|
||||
{
|
||||
NULL_PARAM_CHECK(i2c_drv);
|
||||
|
||||
struct I2cHardwareDevice *i2c_dev = (struct I2cHardwareDevice *)i2c_drv->driver.owner_bus->owner_haldev;
|
||||
|
||||
stc_i2c_init_t i2c_init;
|
||||
(void)I2C_StructInit(&i2c_init);
|
||||
i2c_init.u32Baudrate = I2C_BAUDRATE;
|
||||
i2c_init.u32SclTime = 3UL;
|
||||
i2c_init.u32ClockDiv = I2C_CLK_DIV4;
|
||||
|
||||
if (configure_info->private_data) {
|
||||
i2c_dev->i2c_dev_addr = *((uint16 *)configure_info->private_data);
|
||||
} else {
|
||||
KPrintf("I2cInit need set i2c dev addr\n");
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
/* Configure I2C */
|
||||
float32_t f32Error;
|
||||
int32_t i32Ret = LL_ERR;
|
||||
I2C_DeInit(I2C_UNIT);
|
||||
i32Ret = I2C_Init(I2C_UNIT, &i2c_init, &f32Error);
|
||||
|
||||
#ifdef I2C_DEVICE_SLAVE
|
||||
if (LL_OK == i32Ret) {
|
||||
/* Set slave address */
|
||||
I2C_SlaveAddrConfig(I2C_UNIT, I2C_ADDR0, I2C_ADDR_7BIT, i2c_dev->i2c_dev_addr);
|
||||
}
|
||||
#endif
|
||||
|
||||
if(i32Ret != LL_OK) {
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
I2C_BusWaitCmd(I2C_UNIT, ENABLE);
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
static uint32 I2cDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
|
||||
{
|
||||
NULL_PARAM_CHECK(drv);
|
||||
NULL_PARAM_CHECK(configure_info);
|
||||
|
||||
x_err_t ret = EOK;
|
||||
struct I2cDriver *i2c_drv = (struct I2cDriver *)drv;
|
||||
|
||||
switch (configure_info->configure_cmd)
|
||||
{
|
||||
case OPE_INT:
|
||||
ret = I2cInit(i2c_drv, configure_info);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static uint32 I2cMasterWriteData(struct I2cHardwareDevice *i2c_dev, struct I2cDataStandard *msg)
|
||||
{
|
||||
uint32 i32Ret;
|
||||
|
||||
I2C_Cmd(I2C_UNIT, ENABLE);
|
||||
DDL_DelayMS(20UL);
|
||||
I2C_SWResetCmd(I2C_UNIT, ENABLE);
|
||||
I2C_SWResetCmd(I2C_UNIT, DISABLE);
|
||||
DDL_DelayMS(20UL);
|
||||
i32Ret = I2C_Start(I2C_UNIT, I2C_TIMEOUT);
|
||||
if (LL_OK == i32Ret) {
|
||||
i32Ret = I2C_TransAddr(I2C_UNIT, i2c_dev->i2c_dev_addr, I2C_DIR_TX, I2C_TIMEOUT);
|
||||
|
||||
if (i32Ret == LL_OK) {
|
||||
i32Ret = I2C_TransData(I2C_UNIT, msg->buf, msg->len, I2C_TIMEOUT);
|
||||
KPrintf("Master Send Success!\n");
|
||||
}
|
||||
}
|
||||
|
||||
(void)I2C_Stop(I2C_UNIT, I2C_TIMEOUT);
|
||||
I2C_Cmd(I2C_UNIT, DISABLE);
|
||||
|
||||
return i32Ret;
|
||||
}
|
||||
|
||||
static uint32 I2cMasterReadData(struct I2cHardwareDevice *i2c_dev, struct I2cDataStandard *msg)
|
||||
{
|
||||
uint32 i32Ret;
|
||||
|
||||
I2C_Cmd(I2C_UNIT, ENABLE);
|
||||
I2C_SWResetCmd(I2C_UNIT, ENABLE);
|
||||
I2C_SWResetCmd(I2C_UNIT, DISABLE);
|
||||
i32Ret = I2C_Start(I2C_UNIT, I2C_TIMEOUT);
|
||||
if (LL_OK == i32Ret) {
|
||||
if (msg->len == 1U) {
|
||||
I2C_AckConfig(I2C_UNIT, I2C_NACK);
|
||||
}
|
||||
|
||||
i32Ret = I2C_TransAddr(I2C_UNIT, i2c_dev->i2c_dev_addr, I2C_DIR_RX, I2C_TIMEOUT);
|
||||
|
||||
if (LL_OK == i32Ret) {
|
||||
i32Ret = I2C_MasterReceiveDataAndStop(I2C_UNIT, msg->buf, msg->len, I2C_TIMEOUT);
|
||||
KPrintf("Master Receive Success!\n");
|
||||
}
|
||||
|
||||
I2C_AckConfig(I2C_UNIT, I2C_ACK);
|
||||
}
|
||||
|
||||
if (LL_OK != i32Ret) {
|
||||
(void)I2C_Stop(I2C_UNIT, I2C_TIMEOUT);
|
||||
}
|
||||
I2C_Cmd(I2C_UNIT, DISABLE);
|
||||
return i32Ret;
|
||||
}
|
||||
|
||||
static uint32 I2cSlaveWriteData(struct I2cHardwareDevice *i2c_dev, struct I2cDataStandard *msg) {
|
||||
uint32 i32Ret;
|
||||
|
||||
I2C_Cmd(I2C_UNIT, ENABLE);
|
||||
|
||||
/* Clear status */
|
||||
I2C_ClearStatus(I2C_UNIT, I2C_CLR_STOPFCLR | I2C_CLR_NACKFCLR);
|
||||
|
||||
/* Wait slave address matched */
|
||||
while (RESET == I2C_GetStatus(I2C_UNIT, I2C_FLAG_MATCH_ADDR0)) {
|
||||
;
|
||||
}
|
||||
|
||||
I2C_ClearStatus(I2C_UNIT, I2C_CLR_SLADDR0FCLR);
|
||||
|
||||
if (RESET == I2C_GetStatus(I2C_UNIT, I2C_FLAG_TRA)) {
|
||||
i32Ret = LL_ERR;
|
||||
} else {
|
||||
i32Ret = I2C_TransData(I2C_UNIT, msg->buf, msg->len, I2C_TIMEOUT);
|
||||
KPrintf("Slave send success!\r\n");
|
||||
|
||||
if ((LL_OK == i32Ret) || (LL_ERR_TIMEOUT == i32Ret)) {
|
||||
/* Release SCL pin */
|
||||
(void)I2C_ReadData(I2C_UNIT);
|
||||
|
||||
/* Wait stop condition */
|
||||
i32Ret = I2C_WaitStatus(I2C_UNIT, I2C_FLAG_STOP, SET, I2C_TIMEOUT);
|
||||
}
|
||||
}
|
||||
|
||||
I2C_Cmd(I2C_UNIT, DISABLE);
|
||||
return i32Ret;
|
||||
}
|
||||
|
||||
static uint32 I2cSlaveReadData(struct I2cHardwareDevice *i2c_dev, struct I2cDataStandard *msg) {
|
||||
uint32 i32Ret;
|
||||
|
||||
I2C_Cmd(I2C_UNIT, ENABLE);
|
||||
|
||||
/* Clear status */
|
||||
I2C_ClearStatus(I2C_UNIT, I2C_CLR_STOPFCLR | I2C_CLR_NACKFCLR);
|
||||
|
||||
/* Wait slave address matched */
|
||||
while (RESET == I2C_GetStatus(I2C_UNIT, I2C_FLAG_MATCH_ADDR0)) {
|
||||
;
|
||||
}
|
||||
|
||||
I2C_ClearStatus(I2C_UNIT, I2C_CLR_SLADDR0FCLR);
|
||||
|
||||
if (RESET == I2C_GetStatus(I2C_UNIT, I2C_FLAG_TRA)) {
|
||||
/* Slave receive data*/
|
||||
i32Ret = I2C_ReceiveData(I2C_UNIT, msg->buf, msg->len, I2C_TIMEOUT);
|
||||
KPrintf("Slave receive success!\r\n");
|
||||
|
||||
if ((LL_OK == i32Ret) || (LL_ERR_TIMEOUT == i32Ret)) {
|
||||
/* Wait stop condition */
|
||||
i32Ret = I2C_WaitStatus(I2C_UNIT, I2C_FLAG_STOP, SET, I2C_TIMEOUT);
|
||||
}
|
||||
} else {
|
||||
i32Ret = LL_ERR;
|
||||
}
|
||||
|
||||
I2C_Cmd(I2C_UNIT, DISABLE);
|
||||
return i32Ret;
|
||||
}
|
||||
|
||||
|
||||
/* manage the i2c device operations*/
|
||||
static const struct I2cDevDone i2c_dev_done =
|
||||
{
|
||||
.dev_open = NONE,
|
||||
.dev_close = NONE,
|
||||
#ifdef I2C_DEVICE_SLAVE
|
||||
.dev_write = I2cSlaveWriteData,
|
||||
.dev_read = I2cSlaveReadData,
|
||||
#else
|
||||
.dev_write = I2cMasterWriteData,
|
||||
.dev_read = I2cMasterReadData,
|
||||
#endif
|
||||
};
|
||||
|
||||
/* Init i2c bus */
|
||||
static int BoardI2cBusInit(struct I2cBus *i2c_bus, struct I2cDriver *i2c_driver)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
|
||||
/* Init the i2c bus */
|
||||
ret = I2cBusInit(i2c_bus, I2C_BUS_NAME_1);
|
||||
if (EOK != ret) {
|
||||
KPrintf("board_i2c_init I2cBusInit error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
/* Init the i2c driver*/
|
||||
ret = I2cDriverInit(i2c_driver, I2C_DRV_NAME_1);
|
||||
if (EOK != ret) {
|
||||
KPrintf("board_i2c_init I2cDriverInit error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
/* Attach the i2c driver to the i2c bus*/
|
||||
ret = I2cDriverAttachToBus(I2C_DRV_NAME_1, I2C_BUS_NAME_1);
|
||||
if (EOK != ret) {
|
||||
KPrintf("board_i2c_init I2cDriverAttachToBus error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Attach the i2c device to the i2c bus*/
|
||||
static int BoardI2cDevBend(void)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
static struct I2cHardwareDevice i2c_device0;
|
||||
memset(&i2c_device0, 0, sizeof(struct I2cHardwareDevice));
|
||||
|
||||
i2c_device0.i2c_dev_done = &i2c_dev_done;
|
||||
|
||||
ret = I2cDeviceRegister(&i2c_device0, NONE, I2C_1_DEVICE_NAME_0);
|
||||
if (EOK != ret) {
|
||||
KPrintf("board_i2c_init I2cDeviceInit device %s error %d\n", I2C_1_DEVICE_NAME_0, ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = I2cDeviceAttachToBus(I2C_1_DEVICE_NAME_0, I2C_BUS_NAME_1);
|
||||
if (EOK != ret) {
|
||||
KPrintf("board_i2c_init I2cDeviceAttachToBus device %s error %d\n", I2C_1_DEVICE_NAME_0, ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* HC32F4A0 BOARD I2C INIT*/
|
||||
int HwI2cInit(void)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
static struct I2cBus i2c_bus;
|
||||
memset(&i2c_bus, 0, sizeof(struct I2cBus));
|
||||
|
||||
static struct I2cDriver i2c_driver;
|
||||
memset(&i2c_driver, 0, sizeof(struct I2cDriver));
|
||||
|
||||
I2cGpioInit();
|
||||
|
||||
/* Enable I2C Peripheral*/
|
||||
FCG_Fcg1PeriphClockCmd(I2C_FCG_USE, ENABLE);
|
||||
|
||||
i2c_driver.configure = I2cDrvConfigure;
|
||||
|
||||
ret = BoardI2cBusInit(&i2c_bus, &i2c_driver);
|
||||
if (ret != EOK) {
|
||||
KPrintf("board_i2c_init error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = BoardI2cDevBend();
|
||||
if (EOK != ret) {
|
||||
KPrintf("board_i2c_init error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
//#define I2C_TEST
|
||||
#ifdef I2C_TEST
|
||||
|
||||
#define USER_KEY_PORT (GPIO_PORT_I)
|
||||
#define USER_KEY_PIN (GPIO_PIN_07)
|
||||
|
||||
#define DEVICE_ADDR (0x06U)
|
||||
|
||||
static struct Bus *bus1;
|
||||
static struct I2cDriver *i2c_drv1;
|
||||
|
||||
void I2cInitTest(void)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
|
||||
stc_gpio_init_t stcGpioInit;
|
||||
|
||||
/* KEY initialize */
|
||||
(void)GPIO_StructInit(&stcGpioInit);
|
||||
stcGpioInit.u16PinState = PIN_STAT_RST;
|
||||
stcGpioInit.u16PinDir = PIN_DIR_IN;
|
||||
(void)GPIO_Init(USER_KEY_PORT, USER_KEY_PIN, &stcGpioInit);
|
||||
|
||||
bus1 = BusFind(I2C_BUS_NAME_1);
|
||||
bus1->owner_driver = BusFindDriver(bus1, I2C_DRV_NAME_1);
|
||||
bus1->owner_haldev = BusFindDevice(bus1, I2C_1_DEVICE_NAME_0);
|
||||
|
||||
struct BusConfigureInfo configure_info;
|
||||
configure_info.configure_cmd = OPE_INT;
|
||||
configure_info.private_data = (void *)DEVICE_ADDR;
|
||||
|
||||
ret = I2cDrvConfigure(bus1->owner_driver, &configure_info);
|
||||
if (ret != EOK) {
|
||||
KPrintf("initialize %s failed!\n", I2C_UNIT);
|
||||
return;
|
||||
}
|
||||
|
||||
i2c_drv1 = (struct I2cDriver *)bus1->owner_driver;
|
||||
|
||||
return;
|
||||
}
|
||||
SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN),
|
||||
I2cInitTest, I2cInitTest, i2c init);
|
||||
|
||||
void I2cMasterTest(void)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
|
||||
struct I2cHardwareDevice *i2c_dev1 = (struct I2cHardwareDevice *)i2c_drv1->driver.owner_bus->owner_haldev;
|
||||
|
||||
struct I2cDataStandard msg;
|
||||
uint8 u8TxBuf[256U] = {1, 2, 3, 4, 5};
|
||||
uint8 u8RxBuf[256U];
|
||||
|
||||
(void)memset(u8RxBuf, 0, 256U);
|
||||
|
||||
msg.len = 5;
|
||||
msg.buf = u8TxBuf;
|
||||
|
||||
while (SET == GPIO_ReadInputPins(USER_KEY_PORT, USER_KEY_PIN)) {
|
||||
;
|
||||
}
|
||||
|
||||
KPrintf("I2C send data\n");
|
||||
|
||||
ret = I2cMasterWriteData(i2c_dev1, &msg);
|
||||
if (EOK != ret) {
|
||||
KPrintf("I2C send failed! ret %d\n", ret);
|
||||
return;
|
||||
}
|
||||
|
||||
KPrintf("Master send data: ");
|
||||
|
||||
for (uint16 i = 0; i < msg.len; i++) {
|
||||
KPrintf("%d ", (msg.buf)[i]);
|
||||
}
|
||||
|
||||
KPrintf("\n");
|
||||
|
||||
/* 50mS delay for device*/
|
||||
DDL_DelayMS(50UL);
|
||||
|
||||
msg.buf = u8RxBuf;
|
||||
|
||||
(void)I2cMasterReadData(i2c_dev1, &msg);
|
||||
|
||||
KPrintf("Master receive data: ");
|
||||
|
||||
for (uint16 i = 0; i < msg.len; i++) {
|
||||
KPrintf("%d ", (msg.buf)[i]);
|
||||
}
|
||||
|
||||
KPrintf("\n");
|
||||
|
||||
return;
|
||||
}
|
||||
SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN),
|
||||
I2cMasterTest, I2cMasterTest, i2c master send and receive data);
|
||||
|
||||
void I2cSlaveTest(void)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
|
||||
struct I2cHardwareDevice *i2c_dev1 = (struct I2cHardwareDevice *)i2c_drv1->driver.owner_bus->owner_haldev;
|
||||
|
||||
struct I2cDataStandard msg;
|
||||
uint8 u8RxBuf[256U];
|
||||
|
||||
(void)memset(u8RxBuf, 0, 256U);
|
||||
|
||||
msg.len = 5;
|
||||
msg.buf = u8RxBuf;
|
||||
|
||||
KPrintf("I2C receive data\n");
|
||||
|
||||
for (;;) {
|
||||
ret = I2cSlaveReadData(i2c_dev1, &msg);
|
||||
if (ret != EOK) {
|
||||
KPrintf("I2C receive failed!\n");
|
||||
break;
|
||||
} else {
|
||||
KPrintf("Slave receive data: ");
|
||||
for (uint16 i = 0; i < msg.len; i++) {
|
||||
KPrintf("%d ", (msg.buf)[i]);
|
||||
}
|
||||
KPrintf("\n");
|
||||
}
|
||||
|
||||
ret = I2cSlaveWriteData(i2c_dev1, &msg);
|
||||
if (ret != EOK) {
|
||||
KPrintf("I2C send failed!\n");
|
||||
break;
|
||||
} else {
|
||||
KPrintf("Slave send data: ");
|
||||
for (uint16 i = 0; i < msg.len; i++) {
|
||||
KPrintf("%d ", (msg.buf)[i]);
|
||||
}
|
||||
KPrintf("\n");
|
||||
}
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN),
|
||||
I2cSlaveTest, I2cSlaveTest, i2c slave receive and send data);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,35 @@
|
||||
/*
|
||||
* Copyright (c) 2021 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file connect_ethernet.h
|
||||
* @brief Adapted network software protocol stack and hardware operation functions
|
||||
* @version 2.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2022-12-05
|
||||
*/
|
||||
|
||||
#ifndef CONNECT_ETHERNET_H
|
||||
#define CONNECT_ETHERNET_H
|
||||
|
||||
#include "hardware_ethernetif.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,191 @@
|
||||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file connect_gpio.h
|
||||
* @brief define hc32f4a0-board gpio function and struct
|
||||
* @version 3.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2022-12-05
|
||||
*/
|
||||
|
||||
#ifndef CONNECT_GPIO_H
|
||||
#define CONNECT_GPIO_H
|
||||
|
||||
#include <device.h>
|
||||
#include <hc32_ll.h>
|
||||
#include <hc32_ll_gpio.h>
|
||||
#include <hc32_ll_utility.h>
|
||||
#include <hardware_irq.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
struct Hc32PinIrqMap
|
||||
{
|
||||
uint16_t pinbit;
|
||||
func_ptr_t irq_callback;
|
||||
struct Hc32IrqConfig irq_config;
|
||||
};
|
||||
|
||||
#ifndef EXTINT0_IRQ_CONFIG
|
||||
#define EXTINT0_IRQ_CONFIG \
|
||||
{ \
|
||||
.irq_num = BSP_EXTINT0_IRQ_NUM, \
|
||||
.irq_prio = BSP_EXTINT0_IRQ_PRIO, \
|
||||
.int_src = INT_SRC_PORT_EIRQ0, \
|
||||
}
|
||||
#endif /* EXTINT1_IRQ_CONFIG */
|
||||
|
||||
#ifndef EXTINT1_IRQ_CONFIG
|
||||
#define EXTINT1_IRQ_CONFIG \
|
||||
{ \
|
||||
.irq_num = BSP_EXTINT1_IRQ_NUM, \
|
||||
.irq_prio = BSP_EXTINT1_IRQ_PRIO, \
|
||||
.int_src = INT_SRC_PORT_EIRQ1, \
|
||||
}
|
||||
#endif /* EXTINT1_IRQ_CONFIG */
|
||||
|
||||
#ifndef EXTINT2_IRQ_CONFIG
|
||||
#define EXTINT2_IRQ_CONFIG \
|
||||
{ \
|
||||
.irq_num = BSP_EXTINT2_IRQ_NUM, \
|
||||
.irq_prio = BSP_EXTINT2_IRQ_PRIO, \
|
||||
.int_src = INT_SRC_PORT_EIRQ2, \
|
||||
}
|
||||
#endif /* EXTINT2_IRQ_CONFIG */
|
||||
|
||||
#ifndef EXTINT3_IRQ_CONFIG
|
||||
#define EXTINT3_IRQ_CONFIG \
|
||||
{ \
|
||||
.irq_num = BSP_EXTINT3_IRQ_NUM, \
|
||||
.irq_prio = BSP_EXTINT3_IRQ_PRIO, \
|
||||
.int_src = INT_SRC_PORT_EIRQ3, \
|
||||
}
|
||||
#endif /* EXTINT3_IRQ_CONFIG */
|
||||
|
||||
#ifndef EXTINT4_IRQ_CONFIG
|
||||
#define EXTINT4_IRQ_CONFIG \
|
||||
{ \
|
||||
.irq_num = BSP_EXTINT4_IRQ_NUM, \
|
||||
.irq_prio = BSP_EXTINT4_IRQ_PRIO, \
|
||||
.int_src = INT_SRC_PORT_EIRQ4, \
|
||||
}
|
||||
#endif /* EXTINT4_IRQ_CONFIG */
|
||||
|
||||
#ifndef EXTINT5_IRQ_CONFIG
|
||||
#define EXTINT5_IRQ_CONFIG \
|
||||
{ \
|
||||
.irq_num = BSP_EXTINT5_IRQ_NUM, \
|
||||
.irq_prio = BSP_EXTINT5_IRQ_PRIO, \
|
||||
.int_src = INT_SRC_PORT_EIRQ5, \
|
||||
}
|
||||
#endif /* EXTINT5_IRQ_CONFIG */
|
||||
|
||||
#ifndef EXTINT6_IRQ_CONFIG
|
||||
#define EXTINT6_IRQ_CONFIG \
|
||||
{ \
|
||||
.irq_num = BSP_EXTINT6_IRQ_NUM, \
|
||||
.irq_prio = BSP_EXTINT6_IRQ_PRIO, \
|
||||
.int_src = INT_SRC_PORT_EIRQ6, \
|
||||
}
|
||||
#endif /* EXTINT6_IRQ_CONFIG */
|
||||
|
||||
#ifndef EXTINT7_IRQ_CONFIG
|
||||
#define EXTINT7_IRQ_CONFIG \
|
||||
{ \
|
||||
.irq_num = BSP_EXTINT7_IRQ_NUM, \
|
||||
.irq_prio = BSP_EXTINT7_IRQ_PRIO, \
|
||||
.int_src = INT_SRC_PORT_EIRQ7, \
|
||||
}
|
||||
#endif /* EXTINT7_IRQ_CONFIG */
|
||||
|
||||
#ifndef EXTINT8_IRQ_CONFIG
|
||||
#define EXTINT8_IRQ_CONFIG \
|
||||
{ \
|
||||
.irq_num = BSP_EXTINT8_IRQ_NUM, \
|
||||
.irq_prio = BSP_EXTINT8_IRQ_PRIO, \
|
||||
.int_src = INT_SRC_PORT_EIRQ8, \
|
||||
}
|
||||
#endif /* EXTINT8_IRQ_CONFIG */
|
||||
|
||||
#ifndef EXTINT9_IRQ_CONFIG
|
||||
#define EXTINT9_IRQ_CONFIG \
|
||||
{ \
|
||||
.irq_num = BSP_EXTINT9_IRQ_NUM, \
|
||||
.irq_prio = BSP_EXTINT9_IRQ_PRIO, \
|
||||
.int_src = INT_SRC_PORT_EIRQ9, \
|
||||
}
|
||||
#endif /* EXTINT9_IRQ_CONFIG */
|
||||
|
||||
#ifndef EXTINT10_IRQ_CONFIG
|
||||
#define EXTINT10_IRQ_CONFIG \
|
||||
{ \
|
||||
.irq_num = BSP_EXTINT10_IRQ_NUM, \
|
||||
.irq_prio = BSP_EXTINT10_IRQ_PRIO, \
|
||||
.int_src = INT_SRC_PORT_EIRQ10, \
|
||||
}
|
||||
#endif /* EXTINT10_IRQ_CONFIG */
|
||||
|
||||
#ifndef EXTINT11_IRQ_CONFIG
|
||||
#define EXTINT11_IRQ_CONFIG \
|
||||
{ \
|
||||
.irq_num = BSP_EXTINT11_IRQ_NUM, \
|
||||
.irq_prio = BSP_EXTINT11_IRQ_PRIO, \
|
||||
.int_src = INT_SRC_PORT_EIRQ11, \
|
||||
}
|
||||
#endif /* EXTINT11_IRQ_CONFIG */
|
||||
|
||||
#ifndef EXTINT12_IRQ_CONFIG
|
||||
#define EXTINT12_IRQ_CONFIG \
|
||||
{ \
|
||||
.irq_num = BSP_EXTINT12_IRQ_NUM, \
|
||||
.irq_prio = BSP_EXTINT12_IRQ_PRIO, \
|
||||
.int_src = INT_SRC_PORT_EIRQ12, \
|
||||
}
|
||||
#endif /* EXTINT12_IRQ_CONFIG */
|
||||
|
||||
#ifndef EXTINT13_IRQ_CONFIG
|
||||
#define EXTINT13_IRQ_CONFIG \
|
||||
{ \
|
||||
.irq_num = BSP_EXTINT13_IRQ_NUM, \
|
||||
.irq_prio = BSP_EXTINT13_IRQ_PRIO, \
|
||||
.int_src = INT_SRC_PORT_EIRQ13, \
|
||||
}
|
||||
#endif /* EXTINT13_IRQ_CONFIG */
|
||||
|
||||
#ifndef EXTINT14_IRQ_CONFIG
|
||||
#define EXTINT14_IRQ_CONFIG \
|
||||
{ \
|
||||
.irq_num = BSP_EXTINT14_IRQ_NUM, \
|
||||
.irq_prio = BSP_EXTINT14_IRQ_PRIO, \
|
||||
.int_src = INT_SRC_PORT_EIRQ14, \
|
||||
}
|
||||
#endif /* EXTINT14_IRQ_CONFIG */
|
||||
|
||||
#ifndef EXTINT15_IRQ_CONFIG
|
||||
#define EXTINT15_IRQ_CONFIG \
|
||||
{ \
|
||||
.irq_num = BSP_EXTINT15_IRQ_NUM, \
|
||||
.irq_prio = BSP_EXTINT15_IRQ_PRIO, \
|
||||
.int_src = INT_SRC_PORT_EIRQ15, \
|
||||
}
|
||||
#endif /* EXTINT15_IRQ_CONFIG */
|
||||
|
||||
int HwGpioInit(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,42 @@
|
||||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file connect_i2c.h
|
||||
* @brief define hc32f4a0-board i2c function and struct
|
||||
* @version 3.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2022-12-05
|
||||
*/
|
||||
|
||||
#ifndef CONNECT_I2C_H
|
||||
#define CONNECT_I2C_H
|
||||
|
||||
#include <device.h>
|
||||
#include <hc32_ll.h>
|
||||
#include <hc32_ll_i2c.h>
|
||||
#include <hc32_ll_utility.h>
|
||||
#include <hc32_ll_fcg.h>
|
||||
#include <hc32_ll_gpio.h>
|
||||
#include <hc32_ll_def.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
int HwI2cInit(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,172 @@
|
||||
/**
|
||||
*******************************************************************************
|
||||
* @file eth/eth_loopback/source/ethernetif.h
|
||||
* @brief Ethernet interface header file.
|
||||
@verbatim
|
||||
Change Logs:
|
||||
Date Author Notes
|
||||
2022-03-31 CDT First version
|
||||
@endverbatim
|
||||
*******************************************************************************
|
||||
* Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd. All rights reserved.
|
||||
*
|
||||
* This software component is licensed by XHSC under BSD 3-Clause license
|
||||
* (the "License"); You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file hardware_ethernetif.h
|
||||
* @brief define hc32f4a0-board ethernetif function and struct
|
||||
* @version 3.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2022-12-05
|
||||
*/
|
||||
|
||||
#ifndef HARDWARE_ETHERNETIF_H
|
||||
#define HARDWARE_ETHERNETIF_H
|
||||
|
||||
/* C binding of definitions if building with C++ compiler */
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* Include files
|
||||
******************************************************************************/
|
||||
#include <hc32f4xx.h>
|
||||
#include <device.h>
|
||||
#include <lwip/err.h>
|
||||
#include <lwip/netif.h>
|
||||
|
||||
/**
|
||||
* @addtogroup HC32F4A0_DDL_Examples
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup ETH_Loopback
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*******************************************************************************
|
||||
* Global type definitions ('typedef')
|
||||
******************************************************************************/
|
||||
/**
|
||||
* @defgroup ETH_IF_Global_Types Ethernet Interface Global Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/*******************************************************************************
|
||||
* Global pre-processor symbols/macros ('#define')
|
||||
******************************************************************************/
|
||||
/**
|
||||
* @defgroup ETH_IF_Global_Macros Ethernet Interface Global Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Ethernet PHY interface */
|
||||
// #define ETH_INTERFACE_RMII
|
||||
|
||||
/* Number of milliseconds when to check for link status from PHY */
|
||||
#ifndef LINK_TIMER_INTERVAL
|
||||
#define LINK_TIMER_INTERVAL (1000U)
|
||||
#endif
|
||||
|
||||
/* ETH PHY link status */
|
||||
#define ETH_LINK_DOWN (0U)
|
||||
#define ETH_LINK_UP (1U)
|
||||
|
||||
/* Extended PHY Registers */
|
||||
#define PHY_PSMR (0x18U) /*!< Power Saving Mode Register */
|
||||
#define PHY_IISDR (0x1EU) /*!< Interrupt Indicators and SNR Display Register */
|
||||
#define PHY_PSR (0x1FU) /*!< Page Select Register */
|
||||
#define PHY_P7_RMSR (0x10U) /*!< RMII Mode Setting Register */
|
||||
#define PHY_P7_IWLFR (0x13U) /*!< Interrupt, WOL Enable, and LED Function Registers */
|
||||
|
||||
/* The following parameters will return to default values after a software reset */
|
||||
#define PHY_EN_PWR_SAVE (0x8000U) /*!< Enable Power Saving Mode */
|
||||
|
||||
#define PHY_FLAG_AUTO_NEGO_ERROR (0x8000U) /*!< Auto-Negotiation Error Interrupt Flag */
|
||||
#define PHY_FLAG_SPEED_MODE_CHANGE (0x4000U) /*!< Speed Mode Change Interrupt Flag */
|
||||
#define PHY_FLAG_DUPLEX_MODE_CHANGE (0x2000U) /*!< Duplex Mode Change Interrupt Flag */
|
||||
#define PHY_FLAG_LINK_STATUS_CHANGE (0x0800U) /*!< Link Status Change Interrupt Flag */
|
||||
|
||||
#define PHY_PAGE_ADDR_0 (0x0000U) /*!< Page Address 0 (default) */
|
||||
#define PHY_PAGE_ADDR_7 (0x0007U) /*!< Page Address 7 */
|
||||
|
||||
#define PHY_RMII_CLK_DIR (0x1000U) /*!< TXC direction in RMII Mode */
|
||||
#define PHY_RMII_MODE (0x0008U) /*!< RMII Mode or MII Mode */
|
||||
#define PHY_RMII_RXDV_CRSDV (0x0004U) /*!< CRS_DV or RXDV select */
|
||||
|
||||
#define PHY_INT_LINK_CHANGE (0x2000U) /*!< Link Change Interrupt Mask */
|
||||
#define PHY_INT_DUPLEX_CHANGE (0x1000U) /*!< Duplex Change Interrupt Mask */
|
||||
#define PHY_INT_AUTO_NEGO_ERROR (0x0800U) /*!< Auto-Negotiation Error Interrupt Mask */
|
||||
#define PHY_LED_WOL_SELECT (0x0400U) /*!< LED and Wake-On-LAN Function Selection */
|
||||
#define PHY_LED_SELECT (0x0030U) /*!< Traditional LED Function Selection. */
|
||||
#define PHY_LED_SELECT_00 (0x0000U) /*!< LED0: ACT(all) LED1: LINK(100) */
|
||||
#define PHY_LED_SELECT_01 (0x0010U) /*!< LED0: LINK(ALL)/ACT(all) LED1: LINK(100) */
|
||||
#define PHY_LED_SELECT_10 (0x0020U) /*!< LED0: LINK(10)/ACT(all) LED1: LINK(100) */
|
||||
#define PHY_LED_SELECT_11 (0x0030U) /*!< LED0: LINK(10)/ACT(10) LED1: LINK(100)/ACT(100) */
|
||||
#define PHY_EN_10M_LED_FUNC (0x0001U) /*!< Enable 10M LPI LED Function */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/*******************************************************************************
|
||||
* Global variable definitions ('extern')
|
||||
******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
Global function prototypes (definition in C source)
|
||||
******************************************************************************/
|
||||
/**
|
||||
* @addtogroup ETH_IF_Global_Functions
|
||||
* @{
|
||||
*/
|
||||
err_t ethernetif_init(struct netif *netif);
|
||||
void ethernetif_input(struct netif *netif);
|
||||
int32_t low_level_output(struct netif *netif, struct pbuf *p);
|
||||
|
||||
void EthernetIF_CheckLink(struct netif *netif);
|
||||
void EthernetIF_UpdateLink(struct netif *netif);
|
||||
void EthernetIF_PeriodicHandle(struct netif *netif);
|
||||
void EthernetIF_LinkCallback(struct netif *netif);
|
||||
int32_t EthernetIF_IsLinkUp(struct netif *netif);
|
||||
|
||||
void EthernetIF_NotifyLinkChange(struct netif *netif);
|
||||
void EthernetIF_InputCallback(struct netif *netif, struct pbuf *p);
|
||||
|
||||
void *ethernetif_config_enet_set(uint8_t enet_port);
|
||||
#define NETIF_ENET0_INIT_FUNC ethernetif_init
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ETHERNETIF_H__ */
|
||||
|
||||
/*******************************************************************************
|
||||
* EOF (not truncated)
|
||||
******************************************************************************/
|
||||
@@ -140,7 +140,7 @@ CONFIG_SHELL_HELP_SHOW_PERMISSION=y
|
||||
# CONFIG_SHELL_HELP_LIST_VAR is not set
|
||||
# CONFIG_SHELL_HELP_LIST_KEY is not set
|
||||
#CONFIG_KERNEL_QUEUEMANAGE=y
|
||||
# CONFIG_KERNEL_WORKQUEUE is not set
|
||||
CONFIG_KERNEL_WORKQUEUE=y
|
||||
CONFIG_WORKQUEUE_KTASK_STACKSIZE=256
|
||||
CONFIG_WORKQUEUE_KTASK_PRIORITY=2
|
||||
CONFIG_QUEUE_MAX=2
|
||||
|
||||
@@ -376,7 +376,7 @@ static x_err_t I2cBitSendAddress(struct I2cBus *bus, struct I2cDataStandard *msg
|
||||
|
||||
retries = ignore_nack ? 0 : msg->retries;
|
||||
|
||||
if (flags & I2C_ADDR_10BIT) {
|
||||
if (flags & I2C_ADDR_10BIT_MODE) {
|
||||
addr1 = 0xf0 | ((msg->addr >> 7) & 0x06);
|
||||
addr2 = msg->addr & 0xff;
|
||||
|
||||
|
||||
@@ -1,4 +1,4 @@
|
||||
export CFLAGS := -mcmodel=medany -march=rv64imafdc -mabi=lp64d -fno-common -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -O0 -ggdb -fgnu89-inline -Werror
|
||||
export CFLAGS := -mcmodel=medany -march=rv64imafdc -mabi=lp64d -fno-common -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -O0 -ggdb -fgnu89-inline
|
||||
# $(warning, "DEBUG, here add cflags.")
|
||||
# export CFLAGS += -nostdlib -nostdinc -fno-builtin
|
||||
export AFLAGS := -c -mcmodel=medany -march=rv64imafdc -mabi=lp64d -x assembler-with-cpp -ggdb
|
||||
@@ -16,7 +16,7 @@ ifeq ($(CONFIG_RESOURCES_LWIP), y)
|
||||
export LINK_LWIP := $(KERNEL_ROOT)/resources/ethernet/LwIP/liblwip.a
|
||||
endif
|
||||
|
||||
export CXXFLAGS := -mcmodel=medany -march=rv64imafdc -mabi=lp64d -fno-common -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -O0 -ggdb -Werror
|
||||
export CXXFLAGS := -mcmodel=medany -march=rv64imafdc -mabi=lp64d -fno-common -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -O0 -ggdb
|
||||
|
||||
export CROSS_COMPILE ?=/opt/gnu-mcu-eclipse/riscv-none-gcc/8.2.0-2.1-20190425-1021/bin/riscv-none-embed-
|
||||
|
||||
|
||||
@@ -376,7 +376,7 @@ static x_err_t I2cBitSendAddress(struct I2cBus *bus, struct I2cDataStandard *msg
|
||||
|
||||
retries = ignore_nack ? 0 : msg->retries;
|
||||
|
||||
if (flags & I2C_ADDR_10BIT) {
|
||||
if (flags & I2C_ADDR_10BIT_MODE) {
|
||||
addr1 = 0xf0 | ((msg->addr >> 7) & 0x06);
|
||||
addr2 = msg->addr & 0xff;
|
||||
|
||||
|
||||
+1
-1
@@ -479,7 +479,7 @@ static x_err_t I2cBitSendAddress(struct I2cBus *bus, struct I2cDataStandard *msg
|
||||
|
||||
retries = ignore_nack ? 0 : msg->retries;
|
||||
|
||||
if (flags & I2C_ADDR_10BIT) {
|
||||
if (flags & I2C_ADDR_10BIT_MODE) {
|
||||
addr1 = 0xf0 | ((msg->addr >> 7) & 0x06);
|
||||
addr2 = msg->addr & 0xff;
|
||||
|
||||
|
||||
@@ -48,8 +48,7 @@ Modification:
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400;
|
||||
STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x1000;
|
||||
STACK_SIZE = 0x4000;
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
|
||||
@@ -49,6 +49,7 @@ menuconfig BSP_USING_SDIO
|
||||
if BSP_USING_SDIO
|
||||
source "$BSP_DIR/third_party_driver/sdio/Kconfig"
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_LCD
|
||||
bool "Using LCD device"
|
||||
default n
|
||||
@@ -56,6 +57,7 @@ menuconfig BSP_USING_LCD
|
||||
if BSP_USING_LCD
|
||||
source "$BSP_DIR/third_party_driver/lcd/Kconfig"
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_TOUCH
|
||||
bool "Using TOUCH device"
|
||||
default n
|
||||
|
||||
+1
-1
@@ -85,7 +85,7 @@
|
||||
void enet_delay(void)
|
||||
{
|
||||
volatile uint32_t i = 0;
|
||||
for (i = 0; i < 1000000; ++i)
|
||||
for (i = 0; i < 10000000; ++i)
|
||||
{
|
||||
__asm("NOP"); /* delay */
|
||||
}
|
||||
|
||||
+1
@@ -5,6 +5,7 @@
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
#include "board.h"
|
||||
#include <shell.h>
|
||||
|
||||
#define EXAMPLE_SEMC_START_ADDRESS (0x80000000U)
|
||||
|
||||
|
||||
@@ -376,7 +376,7 @@ static x_err_t I2cBitSendAddress(struct I2cBus *bus, struct I2cDataStandard *msg
|
||||
|
||||
retries = ignore_nack ? 0 : msg->retries;
|
||||
|
||||
if (flags & I2C_ADDR_10BIT) {
|
||||
if (flags & I2C_ADDR_10BIT_MODE) {
|
||||
addr1 = 0xf0 | ((msg->addr >> 7) & 0x06);
|
||||
addr2 = msg->addr & 0xff;
|
||||
|
||||
|
||||
@@ -407,6 +407,19 @@ KERNELPATHS += \
|
||||
-I$(BSP_ROOT)/third_party_driver/usb/hc32_usb_driver/usb_host_lib/host_class/msc \
|
||||
-I$(BSP_ROOT)/third_party_driver/usb/hc32_usb_driver/usb_host_lib/host_core \
|
||||
-I$(KERNEL_ROOT)/include #
|
||||
|
||||
ifeq ($(CONFIG_RESOURCES_LWIP),y)
|
||||
KERNELPATHS += \
|
||||
-I$(KERNEL_ROOT)/resources/ethernet/LwIP/include \
|
||||
-I$(KERNEL_ROOT)/resources/ethernet/LwIP \
|
||||
-I$(KERNEL_ROOT)/resources/ethernet/LwIP/include/compat \
|
||||
-I$(KERNEL_ROOT)/resources/ethernet/LwIP/include/lwip \
|
||||
-I$(KERNEL_ROOT)/resources/ethernet/LwIP/include/netif \
|
||||
-I$(KERNEL_ROOT)/resources/ethernet/LwIP/include/lwip/apps \
|
||||
-I$(KERNEL_ROOT)/resources/ethernet/LwIP/include/lwip/priv \
|
||||
-I$(KERNEL_ROOT)/resources/ethernet/LwIP/include/lwip/prot \
|
||||
-I$(KERNEL_ROOT)/resources/ethernet/LwIP/arch
|
||||
endif
|
||||
endif
|
||||
|
||||
KERNELPATHS += -I$(KERNEL_ROOT)/arch \
|
||||
@@ -440,6 +453,7 @@ endif
|
||||
|
||||
endif
|
||||
|
||||
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Applications/general_functions/circular_area #
|
||||
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Applications/general_functions/list #
|
||||
|
||||
ifeq ($(CONFIG_SUPPORT_SENSOR_FRAMEWORK), y)
|
||||
@@ -475,9 +489,11 @@ ifeq ($(CONFIG_SUPPORT_CONTROL_FRAMEWORK), y)
|
||||
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/control #
|
||||
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/control/shared #
|
||||
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/control/ipc_protocol #
|
||||
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/control/ipc_protocol/include #
|
||||
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/control/ipc_protocol/modbus_tcp #
|
||||
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/control/ipc_protocol/modbus_uart #
|
||||
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/control/plc_protocol #
|
||||
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/control/plc_protocol/include #
|
||||
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/control/plc_protocol/fins #
|
||||
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/control/plc_protocol/melsec #
|
||||
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/control/plc_protocol/opcua #
|
||||
|
||||
@@ -269,7 +269,7 @@ typedef unsigned int nfds_t;
|
||||
#define MEMP_LIB_MALLOC 1
|
||||
#define MEMP_MEM_MALLOC 1
|
||||
|
||||
#define lw_print //KPrintf
|
||||
#define lw_print KPrintf
|
||||
#define lw_error KPrintf
|
||||
#define lw_notice KPrintf
|
||||
|
||||
|
||||
@@ -68,7 +68,6 @@
|
||||
#include "board.h"
|
||||
#include "ethernet.h"
|
||||
#include "connect_ethernet.h"
|
||||
#include <transform.h>
|
||||
|
||||
char lwip_ipaddr[20] = {192, 168, 131, 77};
|
||||
char lwip_netmask[20] = {255, 255, 254, 0};
|
||||
|
||||
@@ -18,8 +18,8 @@
|
||||
* @date 2021.12.15
|
||||
*/
|
||||
|
||||
#include "board.h"
|
||||
#include "sys_arch.h"
|
||||
#include <board.h>
|
||||
#include <sys_arch.h>
|
||||
#include <shell.h>
|
||||
#include <sys.h>
|
||||
#include <string.h>
|
||||
@@ -73,7 +73,9 @@ SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0) | SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN) |
|
||||
|
||||
void LwipShowIPTask(int argc, char *argv[])
|
||||
{
|
||||
#ifdef configMAC_ADDR
|
||||
char mac_addr0[] = configMAC_ADDR;
|
||||
#endif
|
||||
|
||||
lw_notice("\r\n************************************************\r\n");
|
||||
lw_notice(" Network Configuration\r\n");
|
||||
@@ -84,8 +86,10 @@ void LwipShowIPTask(int argc, char *argv[])
|
||||
((u8_t *)&lwip_eth0_netmask)[2], ((u8_t *)&lwip_eth0_netmask)[3]);
|
||||
lw_notice(" ETH0 IPv4 Gateway : %u.%u.%u.%u\r\n", ((u8_t *)&lwip_gwaddr)[0], ((u8_t *)&lwip_eth0_gwaddr)[1],
|
||||
((u8_t *)&lwip_eth0_gwaddr)[2], ((u8_t *)&lwip_eth0_gwaddr)[3]);
|
||||
#ifdef configMAC_ADDR
|
||||
lw_notice(" ETH0 MAC Address : %x:%x:%x:%x:%x:%x\r\n", mac_addr0[0], mac_addr0[1], mac_addr0[2],
|
||||
mac_addr0[3], mac_addr0[4], mac_addr0[5]);
|
||||
#endif
|
||||
#ifdef BOARD_NET_COUNT
|
||||
if(BOARD_NET_COUNT > 1)
|
||||
{
|
||||
|
||||
@@ -27,12 +27,12 @@
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define I2C_WR 0x0000
|
||||
#define I2C_RD (1u << 0)
|
||||
#define I2C_ADDR_10BIT (1u << 2)
|
||||
#define I2C_NO_START (1u << 4)
|
||||
#define I2C_WR 0x0000
|
||||
#define I2C_RD (1u << 0)
|
||||
#define I2C_ADDR_10BIT_MODE (1u << 2)
|
||||
#define I2C_NO_START (1u << 4)
|
||||
#define I2C_IGNORE_NACK (1u << 5)
|
||||
#define I2C_NO_READ_ACK (1u << 6)
|
||||
#define I2C_NO_READ_ACK (1u << 6)
|
||||
|
||||
struct I2cDataStandard
|
||||
{
|
||||
|
||||
Reference in New Issue
Block a user