forked from xuos/xiuos
delete drivers which are not test yet
This commit is contained in:
Liu_Weichao
@@ -1,17 +0,0 @@
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if BSP_USING_DAC
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config DAC_BUS_NAME
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string "dac bus name"
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default "dac"
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config DAC_DRIVER_NAME
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string "dac driver name"
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default "dac_drv"
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config DAC_DEVICE_NAME
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string "dac bus device name"
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default "dac_dev"
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config DAC_GPIO_NUM
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int "dac gpio pin num(only support 4 or 5)"
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default "4"
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endif
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@@ -1,3 +0,0 @@
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SRC_FILES := connect_dac.c
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include $(KERNEL_ROOT)/compiler.mk
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@@ -1,398 +0,0 @@
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/*
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* Copyright (c) 2020 AIIT XUOS Lab
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* XiUOS is licensed under Mulan PSL v2.
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* You can use this software according to the terms and conditions of the Mulan PSL v2.
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* You may obtain a copy of Mulan PSL v2 at:
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* http://license.coscl.org.cn/MulanPSL2
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* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
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* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
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* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
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* See the Mulan PSL v2 for more details.
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*/
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/**
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* @file connect_dac.c
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* @brief support to register DAC pointer and function
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* @version 2.0
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* @author AIIT XUOS Lab
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* @date 2023-02-09
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*/
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#include <connect_dac.h>
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/*******************************************************************************
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* Local pre-processor symbols/macros ('#define')
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******************************************************************************/
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#define DAC_UNIT1_PORT (GPIO_PORT_A)
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#define DAC_UNIT1_CHN1_PIN (GPIO_PIN_04)
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#define VREFH (3.3F)
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#define DAC_CHN1 (0U)
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#define DAC_CHN2 (1U)
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#define DAC_DATA_ALIGN_12b_R (0U)
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#define DAC_DATA_ALIGN_12b_L (1U)
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#define SUPPORT_AMP
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#define SUPPORT_ADP
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#define SINGLE_WAVE_DAC_CHN (DAC_CHN1)
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#define DAC_DATA_ALIGN (DAC_DATA_ALIGN_12b_L)
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#define SINE_DOT_NUMBER (4096U)
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#define SINE_NEGATIVE_TO_POSITVE (1.0F)
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/*******************************************************************************
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* Local type definitions ('typedef')
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******************************************************************************/
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typedef enum {
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DAC_Unit1,
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DAC_Unit2,
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DAC_Unit_Max,
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}en_dac_unit_t;
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typedef enum {
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E_Dac_Single,
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E_Dac_Dual,
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}en_dac_cvt_t;
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typedef struct {
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CM_DAC_TypeDef *pUnit;
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en_dac_cvt_t enCvtType;
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uint16_t u16Ch;
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} stc_dac_handle_t;
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/*******************************************************************************
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* Local variable definitions ('static')
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******************************************************************************/
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static stc_dac_handle_t m_stcDACHandle[DAC_Unit_Max] = {0};
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static uint32_t gu32SinTable[SINE_DOT_NUMBER];
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static stc_dac_handle_t *pSingleDac;
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/*******************************************************************************
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* Function implementation - global ('extern') and local ('static')
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******************************************************************************/
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/**
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* @brief MAU Initialization
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* @param None
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* @retval None
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*/
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static void MauInit(void)
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{
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/* Enable MAU peripheral clock. */
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FCG_Fcg0PeriphClockCmd(PWC_FCG0_MAU, ENABLE);
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}
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/**
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* @brief MAU De-Initialization
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* @param None
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* @retval None
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*/
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static void MauDeinit(void)
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{
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/* Enable MAU peripheral clock. */
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FCG_Fcg0PeriphClockCmd(PWC_FCG0_MAU, DISABLE);
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}
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/**
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* @brief Sin table Initialization
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* @param [in] pSinTable sin table
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* @param [in] u32count number of pSinTable items
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* @retval None
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*/
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static void SinTableInit(uint32_t pSinTable[], uint32_t u32count)
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{
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uint32_t i;
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uint32_t u32AngAvg = (uint32_t)(float32_t)((float32_t)((float32_t)MAU_SIN_ANGIDX_TOTAL / (float32_t)u32count) + 0.5);
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float32_t fSin;
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for (i = 0U; i < u32count; i++) {
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fSin = (((float32_t)MAU_Sin(CM_MAU, (uint16_t)(u32AngAvg * i))
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/ (float32_t)MAU_SIN_Q15_SCALAR + SINE_NEGATIVE_TO_POSITVE) / VREFH) *
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(float32_t)DAC_DATAREG_VALUE_MAX + 0.5F;
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#if (DAC_DATA_ALIGN == DAC_DATA_ALIGN_12b_L)
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{
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pSinTable[i] = (uint32_t)fSin << 4;
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}
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#else
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{
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pSinTable[i] = (uint32_t)fSin;
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}
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#endif
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}
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}
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/**
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* @brief Enable DAC peripheral clock
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* @param [in] enUnit The selected DAC unit
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* @retval None
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*/
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static void DacPClkEnable(en_dac_unit_t enUnit)
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{
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uint32_t u32PClk;
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switch (enUnit) {
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case DAC_Unit1:
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u32PClk = PWC_FCG3_DAC1;
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break;
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case DAC_Unit2:
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u32PClk = PWC_FCG3_DAC2;
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break;
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default:
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u32PClk = PWC_FCG3_DAC1 | PWC_FCG3_DAC2;
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break;
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}
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/* Enable DAC peripheral clock. */
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FCG_Fcg3PeriphClockCmd(u32PClk, ENABLE);
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}
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/**
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* @brief Init DAC single channel
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* @param [in] enUnit The selected DAC unit
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* @retval A pointer of DAC handler
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*/
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static stc_dac_handle_t *DacSingleConversionInit(en_dac_unit_t enUnit)
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{
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uint8_t u8Port;
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uint16_t u16Pin;
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stc_dac_handle_t *pDac;
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if (enUnit == DAC_Unit1) {
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pDac = &m_stcDACHandle[DAC_Unit1];
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pDac->pUnit = CM_DAC1;
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} else {
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pDac = &m_stcDACHandle[DAC_Unit2];
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pDac->pUnit = CM_DAC2;
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}
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DacPClkEnable(enUnit);
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pDac->enCvtType = E_Dac_Single;
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#if (SINGLE_WAVE_DAC_CHN == DAC_CHN1)
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pDac->u16Ch = DAC_CH1;
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#else
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pDac->u16Ch = DAC_CH2;
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#endif
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/* Init DAC by default value: source from data register and output enabled*/
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DAC_DeInit(pDac->pUnit);
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stc_dac_init_t stInit;
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(void)DAC_StructInit(&stInit);
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(void)DAC_Init(pDac->pUnit, pDac->u16Ch, &stInit);
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#if (DAC_DATA_ALIGN == DAC_DATA_ALIGN_12b_L)
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DAC_DataRegAlignConfig(pDac->pUnit, DAC_DATA_ALIGN_L);
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#else
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DAC_DataRegAlignConfig(pDac->pUnit, DAC_DATA_ALIGN_R);
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#endif
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/* Set DAC pin attribute to analog */
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if (enUnit == DAC_Unit1) {
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u8Port = DAC_UNIT1_PORT;
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#if (SINGLE_WAVE_DAC_CHN == DAC_CHN1)
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u16Pin = DAC_UNIT1_CHN1_PIN;
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#endif
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}
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stc_gpio_init_t stcGpioInit;
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(void)GPIO_StructInit(&stcGpioInit);
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stcGpioInit.u16PinAttr = PIN_ATTR_ANALOG;
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(void)GPIO_Init(u8Port, u16Pin, &stcGpioInit);
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#ifdef SUPPORT_ADP
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/* Set ADC first */
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/* Enable ADC peripheral clock. */
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FCG_Fcg3PeriphClockCmd(PWC_FCG3_ADC1 | PWC_FCG3_ADC2 | PWC_FCG3_ADC3, ENABLE);
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if (CM_ADC1->STR == 0U) {
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if (CM_ADC2->STR == 0U) {
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if (CM_ADC3->STR == 0U) {
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DAC_ADCPrioConfig(pDac->pUnit, DAC_ADP_SELECT_ALL, ENABLE);
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DAC_ADCPrioCmd(pDac->pUnit, ENABLE);
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}
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}
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}
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#endif
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return pDac;
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}
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/**
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* @brief Start single DAC conversions
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* @param [in] pDac A pointer of DAC handler
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* @retval None
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*/
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static void DacStartSingleConversion(const stc_dac_handle_t *pDac)
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{
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/* Enalbe AMP */
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#ifdef SUPPORT_AMP
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(void)DAC_AMPCmd(pDac->pUnit, pDac->u16Ch, ENABLE);
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#endif
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(void)DAC_Start(pDac->pUnit, pDac->u16Ch);
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#ifdef SUPPORT_AMP
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/* delay 3us before setting data*/
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DDL_DelayMS(1U);
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#endif
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}
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/**
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* @brief Convert data by single DAC channel
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* @param [in] pDac A pointer of DAC handler
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* @param [in] pDataTable The data table to be converted
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* @param [in] u32count Number of data table items
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* @retval None
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*/
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__STATIC_INLINE void DacSetSingleConversionData(const stc_dac_handle_t *pDac, uint32_t const pDataTable[], uint32_t u32count)
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{
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uint32_t i = 0U;
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for (i = 0U; i < u32count; i++) {
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#ifdef SUPPORT_ADP
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uint32_t u32TryCount = 100U;
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while (u32TryCount != 0U) {
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u32TryCount--;
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if (SET != DAC_GetChConvertState(pDac->pUnit, pDac->u16Ch)) {
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break;
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}
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}
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#endif
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DAC_SetChData(pDac->pUnit, pDac->u16Ch, (uint16_t)pDataTable[i]);
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}
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}
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/**
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* @brief stop DAC conversion
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* @param [in] pDac A pointer of DAC handler
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* @retval None
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*/
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static void DAC_StopConversion(const stc_dac_handle_t *pDac)
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{
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if (NULL == pDac) {
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DAC_DeInit(CM_DAC1);
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DAC_DeInit(CM_DAC2);
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} else if (pDac->enCvtType != E_Dac_Dual) {
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(void)DAC_Stop(pDac->pUnit, pDac->u16Ch);
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} else {
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DAC_StopDualCh(pDac->pUnit);
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}
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}
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static uint32 DacOpen(void *dev)
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{
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struct DacHardwareDevice *dac_dev = (struct DacHardwareDevice *)dev;
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/* Init MAU for generating sine data*/
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MauInit();
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/* Init sine data table */
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SinTableInit(gu32SinTable, SINE_DOT_NUMBER);
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/* Init single DAC */
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pSingleDac = DacSingleConversionInit(DAC_Unit1);
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return EOK;
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}
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static uint32 DacClose(void *dev)
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{
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struct DacHardwareDevice *dac_dev = (struct DacHardwareDevice *)dev;
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CM_DAC_TypeDef *DACx = (CM_DAC_TypeDef *)dac_dev->private_data;
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DAC_StopConversion(pSingleDac);
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DAC_DeInit(DACx);
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MauDeinit();
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memset(gu32SinTable, 0 , sizeof(gu32SinTable));
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return EOK;
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}
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static uint32 DacWrite(void *dev, struct BusBlockWriteParam *write_param)
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{
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struct DacHardwareDevice *dac_dev = (struct DacHardwareDevice *)dev;
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struct HwDac *dac_cfg = (struct HwDac *)dac_dev->haldev.private_data;
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for (int i = 0; i < dac_cfg->digital_data; i ++) {
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DacStartSingleConversion(pSingleDac);
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DacSetSingleConversionData(pSingleDac, &gu32SinTable[i], 1U);
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if (i > SINE_DOT_NUMBER) {
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i = 0;
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}
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}
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return EOK;
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}
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static uint32 DacDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
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{
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NULL_PARAM_CHECK(drv);
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NULL_PARAM_CHECK(configure_info);
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x_err_t ret = EOK;
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struct DacDriver *dac_drv = (struct DacDriver *)drv;
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struct DacHardwareDevice *dac_dev = (struct DacHardwareDevice *)dac_drv->driver.owner_bus->owner_haldev;
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struct HwDac *dac_cfg = (struct HwDac *)dac_dev->haldev.private_data;
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switch (configure_info->configure_cmd)
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{
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case OPE_CFG:
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dac_cfg->digital_data = *(uint16 *)configure_info->private_data;
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break;
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default:
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break;
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}
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return ret;
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}
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static const struct DacDevDone dev_done =
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{
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DacOpen,
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DacClose,
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DacWrite,
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NONE,
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};
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int HwDacInit(void)
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{
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x_err_t ret = EOK;
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#ifdef BSP_USING_DAC
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static struct DacBus dac_bus;
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static struct DacDriver dac_drv;
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static struct DacHardwareDevice dac_dev;
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static struct HwDac dac_cfg;
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dac_drv.configure = DacDrvConfigure;
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ret = DacBusInit(&dac_bus, DAC_BUS_NAME);
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if (ret != EOK) {
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KPrintf("DAC bus init error %d\n", ret);
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return ERROR;
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}
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ret = DacDriverInit(&dac_drv, DAC_DRIVER_NAME);
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if (ret != EOK) {
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KPrintf("DAC driver init error %d\n", ret);
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return ERROR;
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}
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ret = DacDriverAttachToBus(DAC_DRIVER_NAME, DAC_BUS_NAME);
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if (ret != EOK) {
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KPrintf("DAC driver attach error %d\n", ret);
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return ERROR;
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}
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dac_dev.dac_dev_done = &dev_done;
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dac_cfg.DACx = CM_DAC1;
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dac_cfg.digital_data = 0;
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ret = DacDeviceRegister(&dac_dev, (void *)&dac_cfg, DAC_DEVICE_NAME);
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if (ret != EOK) {
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KPrintf("DAC device register error %d\n", ret);
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return ERROR;
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}
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ret = DacDeviceAttachToBus(DAC_DEVICE_NAME, DAC_BUS_NAME);
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if (ret != EOK) {
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KPrintf("DAC device register error %d\n", ret);
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return ERROR;
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}
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#endif
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return ret;
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}
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Reference in New Issue
Block a user