diff --git a/.gitmodules b/.gitmodules index 389e23ce1..4db194dfe 100644 --- a/.gitmodules +++ b/.gitmodules @@ -22,3 +22,10 @@ [submodule "Ubiquitous/RT-Thread_Fusion_XiUOS/aiit_board/xidatong-riscv64/kendryte-sdk/kendryte-sdk-source"] path = Ubiquitous/RT-Thread_Fusion_XiUOS/aiit_board/xidatong-riscv64/kendryte-sdk/kendryte-sdk-source url = https://code.gitlink.org.cn/chunyexixiaoyu/kendryte-sdk-source.git +[submodule "APP_Framework/lib/lorawan/lora_radio_driver"] + path = APP_Framework/lib/lorawan/lora_radio_driver + url = https://gitlink.org.cn/IACU/lora_radio_driver.git +[submodule "APP_Framework/lib/lorawan/lorawan_devicenode"] + path = APP_Framework/lib/lorawan/lorawan_devicenode + url = https://gitlink.org.cn/IACU/lorawan_devicenode.git + branch = master diff --git a/APP_Framework/Applications/app_test/Kconfig b/APP_Framework/Applications/app_test/Kconfig index 271d4cde6..45df5f5d5 100644 --- a/APP_Framework/Applications/app_test/Kconfig +++ b/APP_Framework/Applications/app_test/Kconfig @@ -235,6 +235,10 @@ menu "test app" default "/dev/qspi_W25Q128" endif endif - + + menuconfig USER_TEST_TIMER + bool "Config test soft timer" + default n + endif endmenu diff --git a/APP_Framework/Applications/app_test/Makefile b/APP_Framework/Applications/app_test/Makefile index 080fbe113..1cf919846 100644 --- a/APP_Framework/Applications/app_test/Makefile +++ b/APP_Framework/Applications/app_test/Makefile @@ -97,5 +97,9 @@ ifeq ($(CONFIG_ADD_XIZI_FETURES),y) SRC_FILES += test_can.c endif + ifeq ($(CONFIG_USER_TEST_TIMER),y) + SRC_FILES += test_timer.c + endif + include $(KERNEL_ROOT)/compiler.mk endif diff --git a/APP_Framework/Applications/app_test/test_timer.c b/APP_Framework/Applications/app_test/test_timer.c new file mode 100644 index 000000000..35ec844e3 --- /dev/null +++ b/APP_Framework/Applications/app_test/test_timer.c @@ -0,0 +1,67 @@ +/* +* Copyright (c) 2020 AIIT XUOS Lab +* XiUOS is licensed under Mulan PSL v2. +* You can use this software according to the terms and conditions of the Mulan PSL v2. +* You may obtain a copy of Mulan PSL v2 at: +* http://license.coscl.org.cn/MulanPSL2 +* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, +* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, +* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. +* See the Mulan PSL v2 for more details. +*/ + +/** +* @file: test_timer.c +* @brief: a application of soft timer function +* @version: 3.0 +* @author: AIIT XUOS Lab +* @date: 2023/03/09 +*/ + +#include + +void TimerFunction(union sigval sig_val) +{ + static int cnt = 0; + printf("%s cnt %d\n", __func__, cnt++); +} + +void TestTimer(void) +{ + int ret = 0; + int timer_flags; + timer_t timer_id; + struct sigevent evp; + memset(&evp, 0, sizeof(struct sigevent)); + + timer_flags = TIMER_TRIGGER_PERIODIC; + + evp.sigev_notify = SIGEV_THREAD; + evp.sigev_notify_function = TimerFunction; + evp.sigev_notify_attributes = &timer_flags; + + ret = timer_create(CLOCK_REALTIME, &evp, &timer_id); + if (ret < 0) { + printf("%s create timer failed ret %d\n", __func__, ret); + return; + } + + struct itimerspec value; + //active time interval + value.it_interval.tv_sec = 2; + value.it_interval.tv_nsec = 0; + + //first timer set time + value.it_value.tv_sec = 2; + value.it_value.tv_nsec = 0; + + ret = timer_settime(timer_id, 1, &value, NULL); + if (ret < 0) { + printf("%s set timer time failed ret %d\n", __func__, ret); + return; + } + + printf("%s success\n", __func__); +} +PRIV_SHELL_CMD_FUNCTION(TestTimer, soft timer test, PRIV_SHELL_CMD_MAIN_ATTR); + diff --git a/APP_Framework/Applications/control_app/plc_demo/Makefile b/APP_Framework/Applications/control_app/plc_demo/Makefile index 723d7c32c..e6f45b376 100755 --- a/APP_Framework/Applications/control_app/plc_demo/Makefile +++ b/APP_Framework/Applications/control_app/plc_demo/Makefile @@ -1,3 +1,3 @@ -SRC_DIR := advantech beckhoff br delta mitsubishi omron schneider siemens ge xinje +SRC_DIR := advantech beckhoff br delta mitsubishi omron schneider siemens ge xinje inovance include $(KERNEL_ROOT)/compiler.mk diff --git a/APP_Framework/Applications/control_app/plc_demo/br/Makefile b/APP_Framework/Applications/control_app/plc_demo/br/Makefile index 5ed1ef7ee..e7701d2c3 100755 --- a/APP_Framework/Applications/control_app/plc_demo/br/Makefile +++ b/APP_Framework/Applications/control_app/plc_demo/br/Makefile @@ -1,3 +1,3 @@ -SRC_FILES := br_x20cp0410.c br_x20cp1381.c br_x20cp1586.c +SRC_FILES := br_x20cp0410.c br_x20cp1381.c br_x20cp1586.c br_ppc2100.c include $(KERNEL_ROOT)/compiler.mk diff --git a/APP_Framework/Applications/control_app/plc_demo/br/README.md b/APP_Framework/Applications/control_app/plc_demo/br/README.md new file mode 100644 index 000000000..23bb4aae4 --- /dev/null +++ b/APP_Framework/Applications/control_app/plc_demo/br/README.md @@ -0,0 +1,23 @@ +# 贝加莱 PPC2100通信测试 + +[TOC] + +## 通信接线及参数设置 + +* 网口 + * 通过ETH1 RJ45 网口连接 + * 网口参数:IP:192.168.250.26 Port:502 + * 测试的协议:Modbus TCP + +## 存储区 + +- 贝加莱PLC与其他PLC不同,没有明确类似M,D等这样的存储区的概念,Modbus地址取决于库函数中结构体变量索引。 + +## 通信测试 + +- 共测试BOOL,INT16,INT32,FLOAT,DOUBLE 共五种类型数据。 +- 测试BOOL型变量,用功能码01,测其他类型变量用功能码03。 +- + + + diff --git a/APP_Framework/Applications/control_app/plc_demo/br/br_ppc2100.c b/APP_Framework/Applications/control_app/plc_demo/br/br_ppc2100.c new file mode 100644 index 000000000..faaa476a2 --- /dev/null +++ b/APP_Framework/Applications/control_app/plc_demo/br/br_ppc2100.c @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2022 AIIT XUOS Lab + * XiUOS is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * http://license.coscl.org.cn/MulanPSL2 + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, + * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, + * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ + +/** + * @file br_ppc2100.c + * @brief PLC BR PPC2100 app + * @version 3.0 + * @author AIIT XUOS Lab + * @date 2023.5.8 + */ + +#include + +extern int Adapter4GActive(void); + +void ControlBrTest_PPC2100(void) +{ + int i, j = 0; + int read_data_length = 0; + uint8_t read_data[128] = {0}; + +#ifdef CONNECTION_ADAPTER_4G + Adapter4GActive(); +#endif + + ControlProtocolType modbus_tcp_protocol = ControlProtocolFind(); + if (NULL == modbus_tcp_protocol) { + printf("%s get modbus tcp protocol %p failed\n", __func__, modbus_tcp_protocol); + return; + } + + printf("%s get modbus tcp protocol %p successfull\n", __func__, modbus_tcp_protocol); + + if (CONTROL_REGISTERED == modbus_tcp_protocol->protocol_status) { + ControlProtocolOpen(modbus_tcp_protocol); + + for (;;) { + read_data_length = ControlProtocolRead(modbus_tcp_protocol, read_data, sizeof(read_data)); + printf("%s read [%d] modbus tcp data %d using receipe file\n", __func__, i, read_data_length); + if (read_data_length) { + for (j = 0; j < read_data_length; j ++) { + printf("j %d data 0x%x\n", j, read_data[j]); + } + } + i++; + memset(read_data, 0, sizeof(read_data)); + PrivTaskDelay(10000); + } + + //ControlProtocolClose(modbus_tcp_protocol); + } +} +PRIV_SHELL_CMD_FUNCTION(ControlBrTest_PPC2100, Delta ppc2100 Demo, PRIV_SHELL_CMD_MAIN_ATTR); + + diff --git a/APP_Framework/Applications/control_app/plc_demo/br/test_recipe_br_ppc2100.json b/APP_Framework/Applications/control_app/plc_demo/br/test_recipe_br_ppc2100.json new file mode 100644 index 000000000..566b15e05 --- /dev/null +++ b/APP_Framework/Applications/control_app/plc_demo/br/test_recipe_br_ppc2100.json @@ -0,0 +1,93 @@ +{ + "device_id": 1, + "device_name": "BR_PPC2100", + "communication_type": 0, + "socket_config": { + "plc_ip": "192.168.250.26", + "local_ip": "192.168.250.233", + "gateway": "192.168.250.1", + "netmask": "255.255.254.0", + "port": 502 + }, + "protocol_type": 2, + "read_period": 2000, + "read_item_list": [ + { + "value_name": "motorrun", + "value_type": 1, + "function_code": 2, + "start_address": 0, + "quantity": 1 + }, + { + "value_name": "motorstop", + "value_type": 1, + "function_code": 2, + "start_address": 1, + "quantity": 1 + }, + { + "value_name": "valueopen", + "value_type": 1, + "function_code": 1, + "start_address": 100, + "quantity": 1 + }, + { + "value_name": "valueclose", + "value_type": 1, + "function_code": 1, + "start_address": 101, + "quantity": 1 + }, + { + "value_name": "step", + "value_type": 3, + "function_code": 4, + "start_address": 100, + "quantity": 1 + }, + { + "value_name": "temperature", + "value_type": 9, + "function_code": 4, + "start_address": 101, + "quantity": 2 + }, + { + "value_name": "status", + "value_type": 4, + "function_code": 4, + "start_address": 103, + "quantity": 2 + }, + { + "value_name": "mode", + "value_type": 3, + "function_code": 3, + "start_address": 200, + "quantity": 1 + }, + { + "value_name": "setTemperature", + "value_type": 9, + "function_code": 3, + "start_address": 201, + "quantity": 2 + }, + { + "value_name": "setConuter", + "value_type": 4, + "function_code": 3, + "start_address": 203, + "quantity": 2 + }, + { + "value_name": "LrealTest", + "value_type": 8, + "function_code": 3, + "start_address": 205, + "quantity": 4 + } + ] +} \ No newline at end of file diff --git a/APP_Framework/Applications/control_app/plc_demo/delta/README.md b/APP_Framework/Applications/control_app/plc_demo/delta/README.md new file mode 100644 index 000000000..16ba6225c --- /dev/null +++ b/APP_Framework/Applications/control_app/plc_demo/delta/README.md @@ -0,0 +1,22 @@ +# 台达 DVP通信测试 + +[TOC] + +## 通信接线及参数设置 + +* 网口 + * 通过自带 RJ45 网口连接 + * 网口参数:IP:192.168.250.27 Port:502 + * 测试的协议:Modbus TCP + +## 存储区 + +- 含M,D,X,Y。台达PLC中 各存储区地址和Modbus地址有明确的对应表,详见台达DVP协议解析测试文档。 + +## 通信测试 + +- 共测试BOOL,INT16,INT32,FLOAT 共四种类型数据。 +- 测试D区,M区和Y区。 + + + diff --git a/APP_Framework/Applications/control_app/plc_demo/delta/test_recipe_delta_dvp.json b/APP_Framework/Applications/control_app/plc_demo/delta/test_recipe_delta_dvp.json new file mode 100644 index 000000000..426eca883 --- /dev/null +++ b/APP_Framework/Applications/control_app/plc_demo/delta/test_recipe_delta_dvp.json @@ -0,0 +1,80 @@ +{ + "device_id": 1, + "device_name": "DELTA_DVP", + "communication_type": 0, + "socket_config": { + "plc_ip": "192.168.250.27", + "local_ip": "192.168.250.233", + "gateway": "192.168.250.1", + "netmask": "255.255.254.0", + "port": 502 + }, + "protocol_type": 2, + "read_period": 2000, + "read_item_list": [ + { + "value_name": "M20", + "value_type": 1, + "function_code": 1, + "start_address": 2068, + "quantity": 1 + }, + { + "value_name": "M100", + "value_type": 1, + "function_code": 1, + "start_address":2148, + "quantity": 1 + }, + { + "value_name": "Y10", + "value_type": 1, + "function_code": 1, + "start_address": 1288, + "quantity": 1 + }, + { + "value_name": "D200", + "value_type": 3, + "function_code": 3, + "start_address":4296, + "quantity": 1 + }, + { + "value_name": "D201", + "value_type": 3, + "function_code": 3, + "start_address": 4297, + "quantity": 1 + }, + { + "value_name": "D220", + "value_type": 4, + "function_code": 3, + "start_address": 4316, + "quantity": 2 + }, + { + "value_name": "D222", + "value_type": 4, + "function_code": 3, + "start_address": 4318, + "quantity": 2 + }, + { + "value_name": "D300", + "value_type": 9, + "function_code": 3, + "start_address": 4396, + "quantity": 2 + }, + { + "value_name": "D302", + "value_type": 9, + "function_code": 3, + "start_address": 4398, + "quantity": 2 + } + + ] +} \ No newline at end of file diff --git a/APP_Framework/Applications/control_app/plc_demo/ge/Makefile b/APP_Framework/Applications/control_app/plc_demo/ge/Makefile index 1b9589bee..395ba6518 100644 --- a/APP_Framework/Applications/control_app/plc_demo/ge/Makefile +++ b/APP_Framework/Applications/control_app/plc_demo/ge/Makefile @@ -1,3 +1,3 @@ -SRC_FILES := ge_versamax001.c +SRC_FILES := ge_versamax001.c ge_cpe100.c include $(KERNEL_ROOT)/compiler.mk \ No newline at end of file diff --git a/APP_Framework/Applications/control_app/plc_demo/ge/ge README.md b/APP_Framework/Applications/control_app/plc_demo/ge/ge README.md new file mode 100644 index 000000000..6a605ce43 --- /dev/null +++ b/APP_Framework/Applications/control_app/plc_demo/ge/ge README.md @@ -0,0 +1,57 @@ +--- +typora-copy-images-to: upload +--- + +# 艾默生(原GE) 通信测试 + +[TOC] + +## 小型VersaMAX CPU001测试 + +### 通信接线及参数设置 + +* 串口 + * COM2为15孔D型 RS485。波特率:19200,数据位:8位,停止位:1位,校验:偶校验。接线按下图典型双线接法。 + + ![ge_versamax_serial](./img/ge_versamax_serial.png) + +### 存储区 + +- 存储区 I,Q,AI,R区。其他内存区如M,AQ不能直接访问,要通过程序转换访问。 + +### 通信测试 + +- 共测试BOOL,INT16,FLOAT共三种类型数据。 + + +- 测试R区及Q区数据。 + + +- R区数据测试,用功能码03,以字为单位读取。配方中start_address字段为PLC地址直接减1。 + + +- Q区数据测试,用功能码01,以位为单位读取。配方中start_address字段为PLC地址直接减1。 + +## 中型PLC CPE100通信测试 + +### 通信接线及参数设置 + +- 网口 + - 网口RJ45,参数 IP:192.168.250.28 端口号:502 + +### 存储区 + +- 存储区 I,Q,AI,R区。其他内存区如M,AQ不能直接访问,要通过程序转换访问。 + +### 通信测试 + +- 共测试BOOL,INT16,INT32,FLOAT,DOUBLE共五种类型数据。 + + +- 测试R区及Q区数据。 + + +- R区数据测试,用功能码03,以字为单位读取。配方中start_address字段为PLC地址直接减1。 + + +- Q区数据测试,用功能码01,以位为单位读取。配方中start_address字段为PLC地址直接减1。 diff --git a/APP_Framework/Applications/control_app/plc_demo/ge/ge_cpe100.c b/APP_Framework/Applications/control_app/plc_demo/ge/ge_cpe100.c new file mode 100644 index 000000000..a018e2bdf --- /dev/null +++ b/APP_Framework/Applications/control_app/plc_demo/ge/ge_cpe100.c @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2022 AIIT XUOS Lab + * XiUOS is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * http://license.coscl.org.cn/MulanPSL2 + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, + * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, + * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ + +/** + * @file ge_cpe100.c + * @brief PLC GE Versamax app + * @version 3.0 + * @author AIIT XUOS Lab + * @date 2022.9.27 + */ + +#include + +extern int Adapter4GActive(void); + +void ControlGecpe100Test(void) +{ + int i, j = 0; + int read_data_length = 0; + uint8_t read_data[128] = {0}; + +#ifdef CONNECTION_ADAPTER_4G + Adapter4GActive(); +#endif + + ControlProtocolType modbus_tcp_protocol = ControlProtocolFind(); + if (NULL == modbus_tcp_protocol) { + printf("%s get modbus tcp protocol %p failed\n", __func__, modbus_tcp_protocol); + return; + } + + printf("%s get modbus tcp protocol %p successfull\n", __func__, modbus_tcp_protocol); + + if (CONTROL_REGISTERED == modbus_tcp_protocol->protocol_status) { + ControlProtocolOpen(modbus_tcp_protocol); + + for (;;) { + read_data_length = ControlProtocolRead(modbus_tcp_protocol, read_data, sizeof(read_data)); + printf("%s read [%d] modbus tcp data %d using receipe file\n", __func__, i, read_data_length); + if (read_data_length) { + for (j = 0; j < read_data_length; j ++) { + printf("j %d data 0x%x\n", j, read_data[j]); + } + } + i++; + memset(read_data, 0, sizeof(read_data)); + PrivTaskDelay(10000); + } + + //ControlProtocolClose(modbus_tcp_protocol); + } +} +PRIV_SHELL_CMD_FUNCTION(ControlGecpe100Test, ge cpe100 Demo, PRIV_SHELL_CMD_MAIN_ATTR); + + diff --git a/APP_Framework/Applications/control_app/plc_demo/ge/img/ge_versamax_serial.png b/APP_Framework/Applications/control_app/plc_demo/ge/img/ge_versamax_serial.png new file mode 100644 index 000000000..f1337958e Binary files /dev/null and b/APP_Framework/Applications/control_app/plc_demo/ge/img/ge_versamax_serial.png differ diff --git a/APP_Framework/Applications/control_app/plc_demo/ge/test_recipe_ge_cpe_tcp.json b/APP_Framework/Applications/control_app/plc_demo/ge/test_recipe_ge_cpe_tcp.json new file mode 100644 index 000000000..cd022aaf5 --- /dev/null +++ b/APP_Framework/Applications/control_app/plc_demo/ge/test_recipe_ge_cpe_tcp.json @@ -0,0 +1,73 @@ +{ + "device_id": 1, + "device_name": "GE_CPE100_TCP", + "communication_type": 0, + "socket_config": { + "plc_ip": "192.168.250.28", + "local_ip": "192.168.250.233", + "gateway": "192.168.250.1", + "netmask": "255.255.254.0", + "port": 502 + }, + "protocol_type": 2, + "read_period": 2000, + "read_item_list": [ + { + "value_name": "Q001", + "value_type": 1, + "function_code": 1, + "start_address": 0, + "quantity": 1 + }, + { + "value_name": "Q010", + "value_type": 1, + "function_code": 1, + "start_address":9, + "quantity": 1 + }, + { + "value_name": "Q066", + "value_type": 1, + "function_code": 1, + "start_address": 65, + "quantity": 1 + }, + { + "value_name": "Q100", + "value_type": 1, + "function_code": 1, + "start_address":99, + "quantity": 1 + }, + { + "value_name": "R11", + "value_type": 3, + "function_code": 3, + "start_address": 10, + "quantity": 1 + }, + { + "value_name": "R12", + "value_type": 9, + "function_code": 3, + "start_address": 11, + "quantity": 2 + }, + { + "value_name": "R14", + "value_type": 8, + "function_code": 3, + "start_address": 13, + "quantity": 4 + }, + { + "value_name": "R18", + "value_type": 4, + "function_code": 3, + "start_address": 17, + "quantity": 2 + } + + ] +} \ No newline at end of file diff --git a/APP_Framework/Applications/control_app/plc_demo/ge/test_recipe_ge_versamax_rtu.json b/APP_Framework/Applications/control_app/plc_demo/ge/test_recipe_ge_versamax_rtu.json new file mode 100644 index 000000000..d3834f322 --- /dev/null +++ b/APP_Framework/Applications/control_app/plc_demo/ge/test_recipe_ge_versamax_rtu.json @@ -0,0 +1,58 @@ +{ + "device_id": 1, + "device_name": "GE_VersaMAX_RTU", + "communication_type": 1, + "serial_config": { + "station": 1, + "baud_rate": 19200, + "data_bits": 8, + "stop_bits": 1, + "check_mode": 2 + }, + "protocol_type": 3, + "read_period": 2000, + "read_item_list": [ + { + "value_name": "Q001", + "value_type": 1, + "function_code": 1, + "start_address": 0, + "quantity": 1 + }, + { + "value_name": "Q010", + "value_type": 1, + "function_code": 1, + "start_address": 9, + "quantity": 1 + }, + { + "value_name": "Q066", + "value_type": 1, + "function_code": 1, + "start_address": 65, + "quantity": 1 + }, + { + "value_name": "Q100", + "value_type": 1, + "function_code": 1, + "start_address": 99, + "quantity": 1 + }, + { + "value_name": "R11", + "value_type": 3, + "function_code": 3, + "start_address": 10, + "quantity": 1 + }, + { + "value_name": "R12", + "value_type": 9, + "function_code": 3, + "start_address": 11, + "quantity": 2 + } + ] +} \ No newline at end of file diff --git a/APP_Framework/Applications/control_app/plc_demo/inovance/Makefile b/APP_Framework/Applications/control_app/plc_demo/inovance/Makefile new file mode 100644 index 000000000..5b7f58eef --- /dev/null +++ b/APP_Framework/Applications/control_app/plc_demo/inovance/Makefile @@ -0,0 +1,3 @@ +SRC_FILES := inovance_am401_cpu1608tn_ethernet.c + +include $(KERNEL_ROOT)/compiler.mk \ No newline at end of file diff --git a/APP_Framework/Applications/control_app/plc_demo/inovance/README.md b/APP_Framework/Applications/control_app/plc_demo/inovance/README.md new file mode 100644 index 000000000..3e774abc4 --- /dev/null +++ b/APP_Framework/Applications/control_app/plc_demo/inovance/README.md @@ -0,0 +1,26 @@ +# INOVANCE AM4011608TN通信测试 + +[TOC] + +## 通信接线及参数设置 + +* 网口 + + * CN3 EtherNET,Mosbus TCP协议,IP:192.168.250.50,Port:502 + +* 串口 + * CN1 RS485,AM401只支持一路串口,AM600可支持两路串口。AM401接线:pin1:485-,pin2:485+。波特率:9600,数据位:8位,停止位:1位,校验:偶校验 + +## 存储区 + +- 存储区 I,Q,M区。 + +## 通信测试 + +(1)共测试BOOL,INT16,INT32,FLOAT共四种类型数据。 + +(2)测试M区及Q区数据。 + +(3)M区数据测试,用功能码03,以字为单位读取。如读MX0.3,则读取MW0,然后按位拆解。如读MW100,则配方文件中起始地址则直接写100即可。如读MDx,则配方文件中起始地址应为2*x,这是汇川的地址编码规则决定,如MD200,则对应400。 + +(4)Q区数据测试,用功能码01,以位为单位读取。如读QX.Y,则配方文件中起始地址为X*8+Y;如读QW,QD等,则需按位进行读取后然后组合得到。 diff --git a/APP_Framework/Applications/control_app/plc_demo/inovance/inovance_am401_cpu1608tn_ethernet.c b/APP_Framework/Applications/control_app/plc_demo/inovance/inovance_am401_cpu1608tn_ethernet.c new file mode 100644 index 000000000..5ed855108 --- /dev/null +++ b/APP_Framework/Applications/control_app/plc_demo/inovance/inovance_am401_cpu1608tn_ethernet.c @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2022 AIIT XUOS Lab + * XiUOS is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * http://license.coscl.org.cn/MulanPSL2 + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, + * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, + * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ + +/** + * @file inovance_am401_cpu1608tn_ethernet.c + * @brief PLC inovance am401 app + * @version 3.0 + * @author AIIT XUOS Lab + * @date 2023.4.25 + */ + +#include + +extern int Adapter4GActive(void); + +void ControlInovanceam401EthernetTest(void) +{ + int i, j = 0; + int read_data_length = 0; + uint8_t read_data[128] = {0}; + +#ifdef CONNECTION_ADAPTER_4G + Adapter4GActive(); +#endif + + ControlProtocolType modbus_tcp_protocol = ControlProtocolFind(); + if (NULL == modbus_tcp_protocol) { + printf("%s get modbus tcp protocol %p failed\n", __func__, modbus_tcp_protocol); + return; + } + + printf("%s get modbus tcp protocol %p successfull\n", __func__, modbus_tcp_protocol); + + if (CONTROL_REGISTERED == modbus_tcp_protocol->protocol_status) { + ControlProtocolOpen(modbus_tcp_protocol); + + for (;;) { + read_data_length = ControlProtocolRead(modbus_tcp_protocol, read_data, sizeof(read_data)); + printf("%s read [%d] modbus tcp data %d using receipe file\n", __func__, i, read_data_length); + if (read_data_length) { + for (j = 0; j < read_data_length; j ++) { + printf("j %d data 0x%x\n", j, read_data[j]); + } + } + i++; + memset(read_data, 0, sizeof(read_data)); + PrivTaskDelay(10000); + } + + //ControlProtocolClose(modbus_tcp_protocol); + } +} +PRIV_SHELL_CMD_FUNCTION(ControlInovanceam401EthernetTest, inovance am401 ethernet Demo, PRIV_SHELL_CMD_MAIN_ATTR); + + diff --git a/APP_Framework/Applications/control_app/plc_demo/inovance/test_recipe_inovance_am401_tcp.json b/APP_Framework/Applications/control_app/plc_demo/inovance/test_recipe_inovance_am401_tcp.json new file mode 100644 index 000000000..0f75a0366 --- /dev/null +++ b/APP_Framework/Applications/control_app/plc_demo/inovance/test_recipe_inovance_am401_tcp.json @@ -0,0 +1,80 @@ +{ + "device_id": 1, + "device_name": "INOVANCE_AM401_TCP", + "communication_type": 0, + "socket_config": { + "plc_ip": "192.168.250.50", + "local_ip": "192.168.250.233", + "gateway": "192.168.250.1", + "netmask": "255.255.254.0", + "port": 502 + }, + "protocol_type": 2, + "read_period": 2000, + "read_item_list": [ + { + "value_name": "q00", + "value_type": 1, + "function_code": 1, + "start_address": 0, + "quantity": 1 + }, + { + "value_name": "q01", + "value_type": 1, + "function_code": 1, + "start_address":1, + "quantity": 1 + }, + { + "value_name": "q10", + "value_type": 1, + "function_code": 1, + "start_address": 8, + "quantity": 1 + }, + { + "value_name": "mw100", + "value_type": 3, + "function_code": 3, + "start_address": 100, + "quantity": 1 + }, + { + "value_name": "mw101", + "value_type": 3, + "function_code": 3, + "start_address": 101, + "quantity": 1 + }, + { + "value_name": "md200", + "value_type": 4, + "function_code": 3, + "start_address": 400, + "quantity": 2 + }, + { + "value_name": "md201", + "value_type": 4, + "function_code": 3, + "start_address": 402, + "quantity": 2 + }, + { + "value_name": "md300", + "value_type": 9, + "function_code": 3, + "start_address": 600, + "quantity": 2 + }, + { + "value_name": "md301", + "value_type": 9, + "function_code": 3, + "start_address": 602, + "quantity": 2 + } + + ] +} \ No newline at end of file diff --git a/APP_Framework/Applications/control_app/plc_demo/mitsubishi/README.md b/APP_Framework/Applications/control_app/plc_demo/mitsubishi/README.md new file mode 100644 index 000000000..a5fa32bb6 --- /dev/null +++ b/APP_Framework/Applications/control_app/plc_demo/mitsubishi/README.md @@ -0,0 +1,24 @@ +# 三菱 FX2N通信测试 + +[TOC] + +## 通信接线及参数设置 + +* 串口 + * FX2N自带8针圆口422,用于程序的下载。全系列不支持网口,且需购买串口拓展模块FX2N-485-BD用于通信测试。 + * 接线:RDA和SDA短接,引出A;RDB与SDB短接,引出B。 + * 串口模块支持MC-1C协议,通信速率:9600;数据位:7bit;停止位:1bit;校验:偶校验 + +## 存储区 + +- 存储区 I,Q,M,D区。 + +## 通信测试 + +- 共测试BOOL,INT16,FLOAT共三种类型数据。 + + +- 测试M区及D区数据。 + + + diff --git a/APP_Framework/Applications/control_app/plc_demo/mitsubishi/test_recipe_mc_1c.json b/APP_Framework/Applications/control_app/plc_demo/mitsubishi/test_recipe_mc_1c.json new file mode 100644 index 000000000..264a0accf --- /dev/null +++ b/APP_Framework/Applications/control_app/plc_demo/mitsubishi/test_recipe_mc_1c.json @@ -0,0 +1,331 @@ +{ + "device_id": 769, + "device_name": "S01", + "communication_type": 1, + "serial_config": { + "station": 1, + "baud_rate": 9600, + "data_bits": 7, + "stop_bits": 1, + "check_mode": 3 + }, + "protocol_type": 9, + "read_period": 1000, + "read_item_list": [ + { + "value_name": "", + "value_type": 1, + "device_code": "M", + "head_device_number_string": "0", + "device_points_count": 1, + "command_type": 0, + "monitoring_timer": 100 + }, + { + "value_name": "ֹͣ", + "value_type": 1, + "device_code": "M", + "head_device_number_string": "1", + "device_points_count": 1, + "command_type": 0, + "monitoring_timer": 100 + }, + { + "value_name": "ʹ", + "value_type": 1, + "device_code": "M", + "head_device_number_string": "2", + "device_points_count": 1, + "command_type": 0, + "monitoring_timer": 100 + }, + { + "value_name": "", + "value_type": 1, + "device_code": "M", + "head_device_number_string": "3", + "device_points_count": 1, + "command_type": 0, + "monitoring_timer": 100 + }, + { + "value_name": "ͣ", + "value_type": 1, + "device_code": "M", + "head_device_number_string": "4", + "device_points_count": 1, + "command_type": 0, + "monitoring_timer": 100 + }, + { + "value_name": "λ", + "value_type": 1, + "device_code": "M", + "head_device_number_string": "5", + "device_points_count": 1, + "command_type": 0, + "monitoring_timer": 100 + }, + { + "value_name": "λ", + "value_type": 1, + "device_code": "M", + "head_device_number_string": "6", + "device_points_count": 1, + "command_type": 0, + "monitoring_timer": 100 + }, + { + "value_name": "Զ", + "value_type": 1, + "device_code": "M", + "head_device_number_string": "20", + "device_points_count": 1, + "command_type": 0, + "monitoring_timer": 100 + }, + { + "value_name": "", + "value_type": 1, + "device_code": "M", + "head_device_number_string": "21", + "device_points_count": 1, + "command_type": 0, + "monitoring_timer": 100 + }, + { + "value_name": "", + "value_type": 1, + "device_code": "M", + "head_device_number_string": "22", + "device_points_count": 1, + "command_type": 0, + "monitoring_timer": 100 + }, + { + "value_name": "ֶģʽ", + "value_type": 1, + "device_code": "M", + "head_device_number_string": "23", + "device_points_count": 1, + "command_type": 0, + "monitoring_timer": 100 + }, + { + "value_name": "Զģʽ", + "value_type": 1, + "device_code": "M", + "head_device_number_string": "24", + "device_points_count": 1, + "command_type": 0, + "monitoring_timer": 100 + }, + { + "value_name": "з", + "value_type": 1, + "device_code": "M", + "head_device_number_string": "25", + "device_points_count": 1, + "command_type": 0, + "monitoring_timer": 100 + }, + { + "value_name": "λ", + "value_type": 1, + "device_code": "M", + "head_device_number_string": "26", + "device_points_count": 1, + "command_type": 0, + "monitoring_timer": 100 + }, + { + "value_name": "1", + "value_type": 1, + "device_code": "M", + "head_device_number_string": "27", + "device_points_count": 1, + "command_type": 0, + "monitoring_timer": 100 + }, + { + "value_name": "", + "value_type": 3, + "device_code": "D", + "head_device_number_string": "0", + "device_points_count": 1, + "command_type": 1, + "monitoring_timer": 100 + }, + { + "value_name": "1", + "value_type": 3, + "device_code": "D", + "head_device_number_string": "1", + "device_points_count": 1, + "command_type": 1, + "monitoring_timer": 100 + }, + { + "value_name": "2", + "value_type": 3, + "device_code": "D", + "head_device_number_string": "2", + "device_points_count": 1, + "command_type": 1, + "monitoring_timer": 100 + }, + { + "value_name": "3", + "value_type": 3, + "device_code": "D", + "head_device_number_string": "3", + "device_points_count": 1, + "command_type": 1, + "monitoring_timer": 100 + }, + { + "value_name": "4", + "value_type": 3, + "device_code": "D", + "head_device_number_string": "4", + "device_points_count": 1, + "command_type": 1, + "monitoring_timer": 100 + }, + { + "value_name": "5", + "value_type": 3, + "device_code": "D", + "head_device_number_string": "5", + "device_points_count": 1, + "command_type": 1, + "monitoring_timer": 100 + }, + { + "value_name": "6", + "value_type": 3, + "device_code": "D", + "head_device_number_string": "50", + "device_points_count": 1, + "command_type": 1, + "monitoring_timer": 100 + }, + { + "value_name": "7", + "value_type": 3, + "device_code": "D", + "head_device_number_string": "51", + "device_points_count": 1, + "command_type": 1, + "monitoring_timer": 100 + }, + { + "value_name": "8", + "value_type": 3, + "device_code": "D", + "head_device_number_string": "52", + "device_points_count": 1, + "command_type": 1, + "monitoring_timer": 100 + }, + { + "value_name": "9", + "value_type": 3, + "device_code": "D", + "head_device_number_string": "53", + "device_points_count": 1, + "command_type": 1, + "monitoring_timer": 100 + }, + { + "value_name": "ٶ", + "value_type": 9, + "device_code": "D", + "head_device_number_string": "200", + "device_points_count": 2, + "command_type": 1, + "monitoring_timer": 100 + }, + { + "value_name": "ٶ", + "value_type": 9, + "device_code": "D", + "head_device_number_string": "202", + "device_points_count": 2, + "command_type": 1, + "monitoring_timer": 100 + }, + { + "value_name": "ٶ", + "value_type": 9, + "device_code": "D", + "head_device_number_string": "204", + "device_points_count": 2, + "command_type": 1, + "monitoring_timer": 100 + }, + { + "value_name": "ʼλ", + "value_type": 9, + "device_code": "D", + "head_device_number_string": "206", + "device_points_count": 2, + "command_type": 1, + "monitoring_timer": 100 + }, + { + "value_name": "յλ", + "value_type": 9, + "device_code": "D", + "head_device_number_string": "208", + "device_points_count": 2, + "command_type": 1, + "monitoring_timer": 100 + }, + { + "value_name": "ֵ", + "value_type": 9, + "device_code": "D", + "head_device_number_string": "300", + "device_points_count": 2, + "command_type": 1, + "monitoring_timer": 100 + }, + { + "value_name": "1", + "value_type": 9, + "device_code": "D", + "head_device_number_string": "302", + "device_points_count": 2, + "command_type": 1, + "monitoring_timer": 100 + }, + { + "value_name": "2", + "value_type": 9, + "device_code": "D", + "head_device_number_string": "304", + "device_points_count": 2, + "command_type": 1, + "monitoring_timer": 100 + }, + { + "value_name": "3", + "value_type": 9, + "device_code": "D", + "head_device_number_string": "306", + "device_points_count": 2, + "command_type": 1, + "monitoring_timer": 100 + }, + { + "value_name": "4", + "value_type": 9, + "device_code": "D", + "head_device_number_string": "308", + "device_points_count": 2, + "command_type": 1, + "monitoring_timer": 100 + } + ] +} \ No newline at end of file diff --git a/APP_Framework/Applications/control_app/plc_demo/omron/README.md b/APP_Framework/Applications/control_app/plc_demo/omron/README.md new file mode 100755 index 000000000..b7dd8af5e --- /dev/null +++ b/APP_Framework/Applications/control_app/plc_demo/omron/README.md @@ -0,0 +1,70 @@ +# OMRON_CP1L通信测试 + +[TOC] + +## 通信接线及参数设置 + +* 本体无接口,增加CP1W-CIF41网络板卡 + +* FINS协议,PLC IP:192.168.250.31,Port:9600 + +## 存储区 + +- 存储区 W,D区。 + +## JSON配方设计 + +* 共测试BOOL,INT16共2种类型数据,以下为JSON文件解释。 + + - ```json + { + "device_id": 1, //设备ID默认是1,此参数无效 + "device_name": "CP1L", //设备名称,自定义 + "communication_type": 0, //通讯协议类型 0是以太网,1是串口 + "socket_config": { //以太网配置 + "plc_ip": "192.168.250.31", //PLC的IP地址 + "local_ip": "192.168.250.233", //矽达通IP地址设定 + "gateway": "192.168.250.1", //矽达通的网关地址设定 + "netmask": "255.255.255.0", //矽达通子网掩码设定 + "port": 9600 //端口号设定 + }, + "protocol_type": 5, //通讯协议,5代表FINS协议 + "read_period": 100, //交互周期ms + "read_item_list": [ + { + "value_name": "停止", //变量名称,自定义 + "value_type": 1, //变量类型,BOOL = 1,INT8 = 2,INT16,INT32,UINT8,UINT16,UINT32,DOUBLE,FLOAT = 9 + "area_char": "W", //变量功能块 + "data_type": 0, //数据传输类型,BOOL = 0,WORD = 1 + "start_address": 100, //起始地址 + "bit_address": 1, //BOOL地址偏移位,采集变量地址是W100.1 + "data_length": 1 //BOOL长度,默认是1,代表读取1个BOOL长度 + }, + { + "value_name": "转速", //变量名称,自定义 + "value_type": 3, //变量类型,BOOL = 1,INT8 = 2,INT16,INT32,UINT8,UINT16,UINT32,DOUBLE,FLOAT = 9 + "area_char": "D", //变量功能块 + "data_type": 1, //数据传输类型,BOOL = 0,WORD = 1 + "start_address": 101, //起始地址 + "bit_address": 0, //以WORD采集方式时此参数无效,采集变量地址是D101 + "data_length": 1 //WORD长度,默认是1,代表读取1个WORD长度,2个字节 + } + ] + } + ``` + +## 通信测试 + + (1) 新增1个通信demo,命名为omron_cp1l.c; + + (2) 复制样例代码程序到omron_cp1l.c文件中; + + (3) void **ControlOmronCP1LTest**(void) 更改函数名; + + (4) PRIV_SHELL_CMD_FUNCTION(**ControlOmronCP1LTest**, **Omron Plc Cp1l Demo**, PRIV_SHELL_CMD_MAIN_ATTR);更改测试指令; + + (5) 剪裁配置完成后,用过烧写器下载至矽达通中,重启后完成测试。 + + + + \ No newline at end of file diff --git a/APP_Framework/Applications/control_app/plc_demo/omron/omron_cp1h.c b/APP_Framework/Applications/control_app/plc_demo/omron/omron_cp1h.c index ba28d4533..4985c435c 100644 --- a/APP_Framework/Applications/control_app/plc_demo/omron/omron_cp1h.c +++ b/APP_Framework/Applications/control_app/plc_demo/omron/omron_cp1h.c @@ -11,10 +11,39 @@ */ /** - * @file omron_cj2m.c - * @brief PLC OMRON CJ2M app + * @file omron_cp1h.c + * @brief PLC OMRON CP1H app * @version 3.0 * @author AIIT XUOS Lab - * @date 2022.9.27 + * @date 2023.4.1 */ +#include + +void ControlOmronCP1HTest(void) +{ + int i = 0; + uint16_t read_data_length = 0; + uint8_t read_data[1024] = {0}; + ControlProtocolType fins_protocol = ControlProtocolFind(); + if (NULL == fins_protocol) { + printf("%s get fins protocol %p failed\n", __func__, fins_protocol); + return; + } + + printf("%s get fins protocol %p successfull\n", __func__, fins_protocol); + + if (CONTROL_REGISTERED == fins_protocol->protocol_status) { + ControlProtocolOpen(fins_protocol); + + for (;;) { + read_data_length = ControlProtocolRead(fins_protocol, read_data, sizeof(read_data)); + printf("%s read [%d] fins data %d using receipe file\n", __func__, i, read_data_length); + i++; + PrivTaskDelay(100000); + } + + //ControlProtocolClose(fins_protocol); + } +} +PRIV_SHELL_CMD_FUNCTION(ControlOmronCP1HTest, Omron Plc Cp1h Demo, PRIV_SHELL_CMD_MAIN_ATTR); diff --git a/APP_Framework/Applications/control_app/plc_demo/omron/omron_cp1l.c b/APP_Framework/Applications/control_app/plc_demo/omron/omron_cp1l.c index 814af8f3b..86fe2ce1d 100644 --- a/APP_Framework/Applications/control_app/plc_demo/omron/omron_cp1l.c +++ b/APP_Framework/Applications/control_app/plc_demo/omron/omron_cp1l.c @@ -45,4 +45,4 @@ void ControlOmronCP1LTest(void) //ControlProtocolClose(fins_protocol); } } -PRIV_SHELL_CMD_FUNCTION(ControlOmronCP1LTest, Omron Plc FINS Demo, PRIV_SHELL_CMD_MAIN_ATTR); \ No newline at end of file +PRIV_SHELL_CMD_FUNCTION(ControlOmronCP1LTest, Omron Plc Cp1l Demo, PRIV_SHELL_CMD_MAIN_ATTR); \ No newline at end of file diff --git a/APP_Framework/Applications/control_app/plc_demo/omron/omron_nx102.c b/APP_Framework/Applications/control_app/plc_demo/omron/omron_nx102.c index 0b091db28..1d242e93c 100644 --- a/APP_Framework/Applications/control_app/plc_demo/omron/omron_nx102.c +++ b/APP_Framework/Applications/control_app/plc_demo/omron/omron_nx102.c @@ -18,6 +18,34 @@ * @date 2022.9.27 */ - +#include + +void ControlOmronNX102Test(void) +{ + int i = 0; + uint16_t read_data_length = 0; + uint8_t read_data[1024] = {0}; + ControlProtocolType fins_protocol = ControlProtocolFind(); + if (NULL == fins_protocol) { + printf("%s get fins protocol %p failed\n", __func__, fins_protocol); + return; + } + + printf("%s get fins protocol %p successfull\n", __func__, fins_protocol); + + if (CONTROL_REGISTERED == fins_protocol->protocol_status) { + ControlProtocolOpen(fins_protocol); + + for (;;) { + read_data_length = ControlProtocolRead(fins_protocol, read_data, sizeof(read_data)); + printf("%s read [%d] fins data %d using receipe file\n", __func__, i, read_data_length); + i++; + PrivTaskDelay(10000); + } + + // ControlProtocolClose(fins_protocol); + } +} +PRIV_SHELL_CMD_FUNCTION(ControlOmronNX102Test, Omron Plc FINS Demo, PRIV_SHELL_CMD_MAIN_ATTR); diff --git a/APP_Framework/Applications/control_app/plc_demo/omron/test_recipe_CP1H.json b/APP_Framework/Applications/control_app/plc_demo/omron/test_recipe_CP1H.json new file mode 100644 index 000000000..00c641e8f --- /dev/null +++ b/APP_Framework/Applications/control_app/plc_demo/omron/test_recipe_CP1H.json @@ -0,0 +1,70 @@ +{ + "device_id": 1, + "device_name": "CP1H", + "communication_type": 0, + "socket_config": { + "plc_ip": "192.168.250.46", + "local_ip": "192.168.250.233", + "gateway": "192.168.250.1", + "netmask": "255.255.255.0", + "port": 9600 + }, + "protocol_type": 5, + "read_period": 100, + "read_item_list": [ + { + "value_name": "启动", + "value_type": 1, + "area_char": "W", + "data_type": 0, + "start_address": 10, + "bit_address": 0, + "data_length": 1 + }, + { + "value_name": "停止", + "value_type": 1, + "area_char": "W", + "data_type": 0, + "start_address": 10, + "bit_address": 1, + "data_length": 1 + }, + { + "value_name": "暂停", + "value_type": 1, + "area_char": "W", + "data_type": 0, + "start_address": 10, + "bit_address": 2, + "data_length": 1 + }, + { + "value_name": "整型1", + "value_type": 3, + "area_char": "D", + "data_type": 1, + "start_address": 100, + "bit_address": 0, + "data_length": 1 + }, + { + "value_name": "整型2", + "value_type": 3, + "area_char": "D", + "data_type": 1, + "start_address": 101, + "bit_address": 0, + "data_length": 1 + }, + { + "value_name": "浮点", + "value_type": 9, + "area_char": "D", + "data_type": 1, + "start_address": 110, + "bit_address": 0, + "data_length": 2 + } + ] +} \ No newline at end of file diff --git a/APP_Framework/Applications/control_app/plc_demo/omron/test_recipe_CP1L.json b/APP_Framework/Applications/control_app/plc_demo/omron/test_recipe_CP1L.json new file mode 100644 index 000000000..ae11016da --- /dev/null +++ b/APP_Framework/Applications/control_app/plc_demo/omron/test_recipe_CP1L.json @@ -0,0 +1,52 @@ +{ + "device_id": 1, + "device_name": "CP1L", + "communication_type": 0, + "socket_config": { + "plc_ip": "192.168.250.31", + "local_ip": "192.168.250.233", + "gateway": "192.168.250.1", + "netmask": "255.255.255.0", + "port": 9600 + }, + "protocol_type": 5, + "read_period": 100, + "read_item_list": [ + { + "value_name": "启动", + "value_type": 1, + "area_char": "W", + "data_type": 0, + "start_address": 100, + "bit_address": 0, + "data_length": 1 + }, + { + "value_name": "停止", + "value_type": 1, + "area_char": "W", + "data_type": 0, + "start_address": 100, + "bit_address": 1, + "data_length": 1 + }, + { + "value_name": "转速", + "value_type": 3, + "area_char": "D", + "data_type": 1, + "start_address": 101, + "bit_address": 0, + "data_length": 1 + }, + { + "value_name": "产量", + "value_type": 3, + "area_char": "D", + "data_type": 1, + "start_address": 102, + "bit_address": 0, + "data_length": 1 + } + ] +} \ No newline at end of file diff --git a/APP_Framework/Applications/control_app/plc_demo/schneider/schneider_m241.c b/APP_Framework/Applications/control_app/plc_demo/schneider/schneider_m241.c index 60fb1d2b6..4fcdb35bb 100644 --- a/APP_Framework/Applications/control_app/plc_demo/schneider/schneider_m241.c +++ b/APP_Framework/Applications/control_app/plc_demo/schneider/schneider_m241.c @@ -19,9 +19,6 @@ */ #include - -extern int Adapter4GActive(void); - void ControlM241Test(void) { int i, j = 0; diff --git a/APP_Framework/Applications/control_app/plc_demo/siemens/README.md b/APP_Framework/Applications/control_app/plc_demo/siemens/README.md new file mode 100644 index 000000000..be90b92b8 --- /dev/null +++ b/APP_Framework/Applications/control_app/plc_demo/siemens/README.md @@ -0,0 +1,79 @@ +# SIEMENS - S7-1512通信测试 + +[TOC] + +## 通信接线及参数设置 + +* 本体以太网口 + +* S7协议,PLC IP:192.168.250.2,Port:102 + +## 存储区 + +- 存储区 Q,DB区。 + +## JSON配方设计 + +* 共测试BOOL,INT16共2种类型数据,以下为JSON文件解释。 + + - ```json + { + "device_id": 1, //设备ID默认是1,此参数无效 + "device_name": "S7-1512", //设备名称,自定义 + "communication_type": 0, //通讯协议类型 0是以太网,1是串口 + "socket_config": { //以太网配置 + "plc_ip": "192.168.250.2", //PLC的IP地址 + "local_ip": "192.168.250.233", //矽达通IP地址设定 + "gateway": "192.168.250.1", //矽达通的网关地址设定 + "netmask": "255.255.255.0", //矽达通子网掩码设定 + "port": 102 //端口号设定 + }, + "protocol_type": 1, //通讯协议,5代表FINS协议 + "read_period": 100, //交互周期ms + "read_item_list": [ + { + "value_name": "布尔1", //变量名称,自定义 + "value_type": 1, //变量类型,BOOL = 1,INT8 = 2,INT16,INT32,UINT8,UINT16,UINT32,DOUBLE,FLOAT = 9 + "area": "Q", //变量功能块 + "wordlen": "Bit", //变量字长类型,有:Bit Byte Word DWord Real Counter Timer + "db_number": 1, //如为DB区,填写对应的DB块编号,如不是DB区,无效 + "start": 1, //BOOL地址偏移位,采集变量地址是Q0.1 + "amount": 1 //BOOL长度,默认是1,代表读取1个BOOL长度 + }, + { + "value_name": "整型", //变量名称,自定义 + "value_type": 3, //变量类型,BOOL = 1,INT8 = 2,INT16,INT32,UINT8,UINT16,UINT32,DOUBLE,FLOAT = 9 + "area": "DB", //变量功能块 + "wordlen": "Word", //变量字长类型,有:Bit Byte Word DWord Real Counter Timer + "db_number": 18, //如为DB区,即DB18块 + "start": 2, //Word地址偏移位,采集变量地址是DB18.DBW2 + "amount": 1 //Word长度,默认是1,代表读取1个WORD长度,2个字节 + }, + { + "value_name": "浮点数", //变量名称,自定义 + "value_type": 9, //变量类型,BOOL = 1,INT8 = 2,INT16,INT32,UINT8,UINT16,UINT32,DOUBLE,FLOAT = 9 + "area": "DB", //变量功能块 + "wordlen": "Real", //变量字长类型,有:Bit Byte Word DWord Real Counter Timer + "db_number": 18, //如为DB区,即DB18块 + "start": 18, //Real地址偏移位,采集变量地址是DB18.DBD18 + "amount": 1 //Real长度,默认是1,代表读取1个Real长度,4个字节 + } + ] + } + ``` + +## 通信测试 + + (1) 新增1个通信demo,命名为simens_s7_1500.c; + + (2) 复制样例代码程序到simens_s7_1500.c文件中; + + (3) void **ControlS71500Test**(void)更改函数名; + + (4) PRIV_SHELL_CMD_FUNCTION(**ControlS71500Test, Siemens Plc S7_1512 Demo**, PRIV_SHELL_CMD_MAIN_ATTR);更改测试指令; + + (5) 剪裁配置完成后,用过烧写器下载至矽达通中,重启后完成测试。 + + + + \ No newline at end of file diff --git a/APP_Framework/Applications/control_app/plc_demo/siemens/siemens_s7_1200.c b/APP_Framework/Applications/control_app/plc_demo/siemens/siemens_s7_1200.c index 541b17d5c..9cbbeae1a 100644 --- a/APP_Framework/Applications/control_app/plc_demo/siemens/siemens_s7_1200.c +++ b/APP_Framework/Applications/control_app/plc_demo/siemens/siemens_s7_1200.c @@ -15,9 +15,6 @@ * @brief PLC SIEMENS S7-1200 app * @version 3.0 * @author AIIT XUOS Lab - * @date 2022.9.27 + * @date 2023.3.27 */ - - - diff --git a/APP_Framework/Applications/control_app/plc_demo/siemens/siemens_s7_1500.c b/APP_Framework/Applications/control_app/plc_demo/siemens/siemens_s7_1500.c index 9f4d5a822..10aa2d722 100644 --- a/APP_Framework/Applications/control_app/plc_demo/siemens/siemens_s7_1500.c +++ b/APP_Framework/Applications/control_app/plc_demo/siemens/siemens_s7_1500.c @@ -15,9 +15,31 @@ * @brief PLC SIEMENS S7-1500 app * @version 3.0 * @author AIIT XUOS Lab - * @date 2022.9.27 + * @date 2023.3.27 */ +#include +void ControlS71500Test(void) +{ + int i = 0; + uint16_t read_data_length = 0; + uint8_t read_data[1024] = {0}; + ControlProtocolType s7_protocol = ControlProtocolFind(); + if (NULL == s7_protocol) { + printf("%s get s7 protocol %p failed\n", __func__, s7_protocol); + return; + } + printf("%s get s7 protocol %p successfull\n", __func__, s7_protocol); + if (CONTROL_REGISTERED == s7_protocol->protocol_status) { + ControlProtocolOpen(s7_protocol); + for (;;) { + read_data_length = ControlProtocolRead(s7_protocol, read_data, sizeof(read_data)); + printf("%s read [%d] s7 data %d using receipe file\n", __func__, i, read_data_length); + i++; + memset(read_data, 0, sizeof(read_data)); + PrivTaskDelay(10000); + } + } +} - - +PRIV_SHELL_CMD_FUNCTION(ControlS71500Test, Siemens Plc S7_1512 Demo, PRIV_SHELL_CMD_MAIN_ATTR); \ No newline at end of file diff --git a/APP_Framework/Applications/control_app/plc_demo/siemens/siemens_s7_200_smart.c b/APP_Framework/Applications/control_app/plc_demo/siemens/siemens_s7_200_smart.c index 61a3ea207..848cf3374 100644 --- a/APP_Framework/Applications/control_app/plc_demo/siemens/siemens_s7_200_smart.c +++ b/APP_Framework/Applications/control_app/plc_demo/siemens/siemens_s7_200_smart.c @@ -11,13 +11,10 @@ */ /** - * @file siemens_s7_200_smart.c - * @brief PLC SIEMENS S7-200 SMART app + * @file siemens_s7_200 smart.c + * @brief PLC SIEMENS S7-200 smart app * @version 3.0 * @author AIIT XUOS Lab - * @date 2022.9.27 + * @date 2023.3.27 */ - - - diff --git a/APP_Framework/Applications/control_app/plc_demo/siemens/siemens_s7_300.c b/APP_Framework/Applications/control_app/plc_demo/siemens/siemens_s7_300.c index 0f8f88a96..88d09209e 100644 --- a/APP_Framework/Applications/control_app/plc_demo/siemens/siemens_s7_300.c +++ b/APP_Framework/Applications/control_app/plc_demo/siemens/siemens_s7_300.c @@ -15,9 +15,6 @@ * @brief PLC SIEMENS S7-300 app * @version 3.0 * @author AIIT XUOS Lab - * @date 2022.9.27 + * @date 2023.3.27 */ - - - diff --git a/APP_Framework/Applications/control_app/plc_demo/siemens/test_recipe_S7_1512.json b/APP_Framework/Applications/control_app/plc_demo/siemens/test_recipe_S7_1512.json new file mode 100644 index 000000000..f9530f371 --- /dev/null +++ b/APP_Framework/Applications/control_app/plc_demo/siemens/test_recipe_S7_1512.json @@ -0,0 +1,70 @@ +{ + "device_id": 1, + "device_name": "S7-1512", + "communication_type": 0, + "socket_config": { + "plc_ip": "192.168.250.2", + "local_ip": "192.168.250.233", + "gateway": "192.168.250.252", + "netmask": "255.255.255.0", + "port": 102 + }, + "protocol_type": 1, + "read_period": 100, + "read_item_list": [ + { + "value_name": "布尔1", + "value_type": 1, + "area": "Q", + "wordlen": "Bit", + "db_number": 1, + "start": 1, + "amount": 1 + }, + { + "value_name": "布尔2", + "value_type": 1, + "area": "Q", + "wordlen": "Bit", + "db_number": 1, + "start": 2, + "amount": 1 + }, + { + "value_name": "布尔3", + "value_type": 1, + "area": "Q", + "wordlen": "Bit", + "db_number": 1, + "start": 3, + "amount": 1 + }, + { + "value_name": "布尔4", + "value_type": 1, + "area": "Q", + "wordlen": "Bit", + "db_number": 1, + "start": 4, + "amount": 1 + }, + { + "value_name": "整型", + "value_type": 3, + "area": "DB", + "wordlen": "Word", + "db_number": 18, + "start": 2, + "amount": 1 + }, + { + "value_name": "浮点数", + "value_type": 9, + "area": "DB", + "wordlen": "Real", + "db_number": 18, + "start": 18, + "amount": 1 + } + ] +} \ No newline at end of file diff --git a/APP_Framework/Applications/control_app/plc_demo/xinje/Makefile b/APP_Framework/Applications/control_app/plc_demo/xinje/Makefile index fcf6b1e27..a9157a614 100755 --- a/APP_Framework/Applications/control_app/plc_demo/xinje/Makefile +++ b/APP_Framework/Applications/control_app/plc_demo/xinje/Makefile @@ -1,3 +1,3 @@ -SRC_FILES := xsdh-60a32-e.c xdh-60t4-e.c +SRC_FILES := xdh_60t4_e.c xsdh_60a32_e.c include $(KERNEL_ROOT)/compiler.mk diff --git a/APP_Framework/Applications/control_app/plc_demo/xinje/test_recipe_xdh_60t4-e.json b/APP_Framework/Applications/control_app/plc_demo/xinje/test_recipe_xdh_60t4-e.json new file mode 100644 index 000000000..a0e38b514 --- /dev/null +++ b/APP_Framework/Applications/control_app/plc_demo/xinje/test_recipe_xdh_60t4-e.json @@ -0,0 +1,184 @@ +{ + "device_id": 1, + "device_name": "OP01", + "communication_type": 0, + "socket_config": { + "plc_ip": "192.168.250.32", + "local_ip": "192.168.250.233", + "gateway": "192.168.250.1", + "netmask": "255.255.255.0", + "port": 502 + }, + "protocol_type": 2, + "read_period": 100, + "read_item_list": [ + { + "value_name": "M19", + "value_type": 1, + "function_code": 5, + "start_address": 19, + "quantity": 1 + }, + { + "value_name": "M20", + "value_type": 1, + "function_code": 5, + "start_address":20, + "quantity": 1 + }, + { + "value_name": "D500", + "value_type": 4, + "function_code": 6, + "start_address": 500, + "quantity": 1 + }, + { + "value_name": "D501", + "value_type": 4, + "function_code": 6, + "start_address": 501, + "quantity": 1 + }, + { + "value_name": "D502", + "value_type": 4, + "function_code": 6, + "start_address": 502, + "quantity": 1 + }, + { + "value_name": "D503", + "value_type": 4, + "function_code": 6, + "start_address": 503, + "quantity": 1 + }, + { + "value_name": "D504", + "value_type": 4, + "function_code": 6, + "start_address": 504, + "quantity": 1 + }, + { + "value_name": "M22", + "value_type": 1, + "function_code": 5, + "start_address": 22, + "quantity": 1 + }, + { + "value_name": "D505", + "value_type": 4, + "function_code": 6, + "start_address": 505, + "quantity": 1 + }, + { + "value_name": "D506", + "value_type": 4, + "function_code": 6, + "start_address": 506, + "quantity": 1 + }, + { + "value_name": "D507", + "value_type": 4, + "function_code": 6, + "start_address": 507, + "quantity": 1 + }, + { + "value_name": "D508", + "value_type": 4, + "function_code": 6, + "start_address": 508, + "quantity": 1 + }, + { + "value_name": "D509", + "value_type": 4, + "function_code": 6, + "start_address": 509, + "quantity": 1 + }, + { + "value_name": "D510", + "value_type": 4, + "function_code": 6, + "start_address": 510, + "quantity": 1 + }, + { + "value_name": "D511", + "value_type": 4, + "function_code": 6, + "start_address": 511, + "quantity": 1 + }, + { + "value_name": "M23", + "value_type": 1, + "function_code": 5, + "start_address": 23, + "quantity": 1 + }, + { + "value_name": "M24", + "value_type": 1, + "function_code": 5, + "start_address":24, + "quantity": 1 + }, + { + "value_name": "M25", + "value_type": 1, + "function_code": 5, + "start_address": 25, + "quantity": 1 + }, + { + "value_name": "M26", + "value_type": 1, + "function_code": 5, + "start_address": 26, + "quantity": 1 + }, + { + "value_name": "M29", + "value_type": 1, + "function_code": 5, + "start_address": 29, + "quantity": 1 + }, + { + "value_name": "D513", + "value_type": 4, + "function_code": 3, + "start_address": 513, + "quantity": 1 + }, + { + "value_name": "D515", + "value_type": 4, + "function_code": 3, + "start_address": 515, + "quantity": 1 + }, + { + "value_name": "M27", + "value_type": 1, + "function_code": 1, + "start_address":27, + "quantity": 1 + }, + { + "value_name": "M28", + "value_type": 1, + "function_code": 1, + "start_address":28, + "quantity": 1 + } + ] +} \ No newline at end of file diff --git a/APP_Framework/Applications/control_app/plc_demo/xinje/test_recipe_xsdh-60a32-e.json b/APP_Framework/Applications/control_app/plc_demo/xinje/test_recipe_xsdh-60a32-e.json new file mode 100644 index 000000000..0adc210a0 --- /dev/null +++ b/APP_Framework/Applications/control_app/plc_demo/xinje/test_recipe_xsdh-60a32-e.json @@ -0,0 +1,93 @@ +{ + "device_id": 255, + "device_name": "GJ2", + "communication_type": 0, + "socket_config": { + "plc_ip": "192.168.250.45", + "local_ip": "192.168.250.233", + "gateway": "192.168.250.1", + "netmask": "255.255.255.0", + "port": 502 + }, + "protocol_type": 2, + "read_period": 100, + "read_item_list": [ + { + "value_name": "QX40.0", + "value_type": 1, + "function_code": 1, + "start_address":0, + "quantity": 1 + }, + { + "value_name": "QX40.1", + "value_type": 1, + "function_code": 1, + "start_address": 1, + "quantity": 1 + }, + { + "value_name": "QX40.2", + "value_type": 1, + "function_code": 1, + "start_address": 2, + "quantity": 1 + }, + { + "value_name": "QX40.3", + "value_type": 1, + "function_code": 1, + "start_address":3, + "quantity": 1 + }, + { + "value_name": "QX40.4", + "value_type": 1, + "function_code": 1, + "start_address": 4, + "quantity": 1 + }, + { + "value_name": "QW0", + "value_type": 3, + "function_code": 3, + "start_address": 0, + "quantity": 2 + }, + { + "value_name": "QW1", + "value_type": 3, + "function_code": 3, + "start_address": 1, + "quantity": 2 + }, + { + "value_name": "QW2", + "value_type": 3, + "function_code": 3, + "start_address": 2, + "quantity": 2 + }, + { + "value_name": "QW3", + "value_type": 3, + "function_code": 3, + "start_address": 3, + "quantity": 2 + }, + { + "value_name": "QW10", + "value_type": 3, + "function_code": 4, + "start_address": 0, + "quantity": 2 + }, + { + "value_name": "QW11", + "value_type": 3, + "function_code": 4, + "start_address": 1, + "quantity": 2 + } + ] +} \ No newline at end of file diff --git a/APP_Framework/Applications/control_app/plc_demo/xinje/xdh-60t4-e.c b/APP_Framework/Applications/control_app/plc_demo/xinje/xdh-60t4-e.c deleted file mode 100644 index 823be9644..000000000 --- a/APP_Framework/Applications/control_app/plc_demo/xinje/xdh-60t4-e.c +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Copyright (c) 2022 AIIT XUOS Lab - * XiUOS is licensed under Mulan PSL v2. - * You can use this software according to the terms and conditions of the Mulan PSL v2. - * You may obtain a copy of Mulan PSL v2 at: - * http://license.coscl.org.cn/MulanPSL2 - * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, - * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, - * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. - * See the Mulan PSL v2 for more details. - */ - -/** - * @file mitsubishi_fx3u.c - * @brief PLC MITSUBISHI FX3U app - * @version 3.0 - * @author AIIT XUOS Lab - * @date 2023.2.1 - */ - diff --git a/APP_Framework/Applications/control_app/plc_demo/xinje/xdh_60t4_e.c b/APP_Framework/Applications/control_app/plc_demo/xinje/xdh_60t4_e.c new file mode 100644 index 000000000..3ed40cccd --- /dev/null +++ b/APP_Framework/Applications/control_app/plc_demo/xinje/xdh_60t4_e.c @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2022 AIIT XUOS Lab + * XiUOS is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * http://license.coscl.org.cn/MulanPSL2 + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, + * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, + * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ + +/** + * @file xdh-60t4-e.c + * @brief PLC XINJE XDH-60T4-E app + * @version 3.0 + * @author AIIT XUOS Lab + * @date 2023.4.5 + */ + +#include + +void ControlXDHTest(void) +{ + int i, j = 0; + int read_data_length = 0; + uint8_t read_data[128] = {0}; + ControlProtocolType modbus_tcp_protocol = ControlProtocolFind(); + if (NULL == modbus_tcp_protocol) { + printf("%s get modbus tcp protocol %p failed\n", __func__, modbus_tcp_protocol); + return; + } + printf("%s get modbus tcp protocol %p successfull\n", __func__, modbus_tcp_protocol); + + if (CONTROL_REGISTERED == modbus_tcp_protocol->protocol_status) { + ControlProtocolOpen(modbus_tcp_protocol); + for (;;) { + read_data_length = ControlProtocolRead(modbus_tcp_protocol, read_data, sizeof(read_data)); + printf("%s read [%d] modbus tcp data %d using receipe file\n", __func__, i, read_data_length); + if (read_data_length) { + for (j = 0; j < read_data_length; j ++) { + printf("j %d data 0x%x\n", j, read_data[j]); + } + } + i++; + memset(read_data, 0, sizeof(read_data)); + PrivTaskDelay(10000); + } + //ControlProtocolClose(modbus_tcp_protocol); + } +} +PRIV_SHELL_CMD_FUNCTION(ControlXDHTest, Xinje Plc XDH_60T4_E Demo, PRIV_SHELL_CMD_MAIN_ATTR); \ No newline at end of file diff --git a/APP_Framework/Applications/control_app/plc_demo/xinje/xsdh-60a32-e.c b/APP_Framework/Applications/control_app/plc_demo/xinje/xsdh-60a32-e.c deleted file mode 100644 index ed106879b..000000000 --- a/APP_Framework/Applications/control_app/plc_demo/xinje/xsdh-60a32-e.c +++ /dev/null @@ -1,19 +0,0 @@ -/* - * Copyright (c) 2022 AIIT XUOS Lab - * XiUOS is licensed under Mulan PSL v2. - * You can use this software according to the terms and conditions of the Mulan PSL v2. - * You may obtain a copy of Mulan PSL v2 at: - * http://license.coscl.org.cn/MulanPSL2 - * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, - * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, - * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. - * See the Mulan PSL v2 for more details. - */ - -/** - * @file mitsubishi_fx3u.c - * @brief PLC MITSUBISHI FX3U app - * @version 3.0 - * @author AIIT XUOS Lab - * @date 2023.3.1 - */ diff --git a/APP_Framework/Applications/control_app/plc_demo/xinje/xsdh_60a32_e.c b/APP_Framework/Applications/control_app/plc_demo/xinje/xsdh_60a32_e.c new file mode 100644 index 000000000..87b6a7780 --- /dev/null +++ b/APP_Framework/Applications/control_app/plc_demo/xinje/xsdh_60a32_e.c @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2022 AIIT XUOS Lab + * XiUOS is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * http://license.coscl.org.cn/MulanPSL2 + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, + * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, + * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ + +/** + * @file xsdh-60a32-e.c + * @brief PLC XINJE XSDH-60A32-E app + * @version 3.0 + * @author AIIT XUOS Lab + * @date 2023.3.28 + */ + + +#include + +void ControlXSDHTest(void) +{ + int i, j = 0; + int read_data_length = 0; + uint8_t read_data[128] = {0}; + ControlProtocolType modbus_tcp_protocol = ControlProtocolFind(); + if (NULL == modbus_tcp_protocol) { + printf("%s get modbus tcp protocol %p failed\n", __func__, modbus_tcp_protocol); + return; + } + printf("%s get modbus tcp protocol %p successfull\n", __func__, modbus_tcp_protocol); + + if (CONTROL_REGISTERED == modbus_tcp_protocol->protocol_status) { + ControlProtocolOpen(modbus_tcp_protocol); + for (;;) { + read_data_length = ControlProtocolRead(modbus_tcp_protocol, read_data, sizeof(read_data)); + printf("%s read [%d] modbus tcp data %d using receipe file\n", __func__, i, read_data_length); + if (read_data_length) { + for (j = 0; j < read_data_length; j ++) { + printf("j %d data 0x%x\n", j, read_data[j]); + } + } + i++; + memset(read_data, 0, sizeof(read_data)); + PrivTaskDelay(10000); + } + //ControlProtocolClose(modbus_tcp_protocol); + } +} +PRIV_SHELL_CMD_FUNCTION(ControlXSDHTest, Xinje Plc XSDH_60A32_E Demo, PRIV_SHELL_CMD_MAIN_ATTR); \ No newline at end of file diff --git a/APP_Framework/Framework/control/ipc_protocol/include/modbus_tcp.h b/APP_Framework/Framework/control/ipc_protocol/include/modbus_tcp.h index 3d1532ace..4dcb5afa1 100755 --- a/APP_Framework/Framework/control/ipc_protocol/include/modbus_tcp.h +++ b/APP_Framework/Framework/control/ipc_protocol/include/modbus_tcp.h @@ -27,7 +27,7 @@ extern "C" { #endif -#define MODBUS_TCP_UNIT_ID 0x01 + #define MODBUS_TCP_READ_CMD_LENGTH 0x0C #define MODBUS_TCP_WRITE_SINGLE_CMD_LENGTH 0x0C diff --git a/APP_Framework/Framework/control/ipc_protocol/modbus_tcp/modbus_tcp.c b/APP_Framework/Framework/control/ipc_protocol/modbus_tcp/modbus_tcp.c index dfd0f3577..6babdf9a5 100755 --- a/APP_Framework/Framework/control/ipc_protocol/modbus_tcp/modbus_tcp.c +++ b/APP_Framework/Framework/control/ipc_protocol/modbus_tcp/modbus_tcp.c @@ -225,7 +225,7 @@ static int ModbusTcpInitialDataInfo(ModbusTcpReadItem *p_read_item, uint16_t ind p_base_data_info->p_command[5] = 0x09; } - p_base_data_info->p_command[6] = MODBUS_TCP_UNIT_ID; + p_base_data_info->p_command[6] = control_protocol->recipe->device_id; p_base_data_info->p_command[7] = function_code; p_base_data_info->p_command[8] = start_address >> 8; p_base_data_info->p_command[9] = start_address; diff --git a/APP_Framework/Framework/control/plc_protocol/Kconfig b/APP_Framework/Framework/control/plc_protocol/Kconfig index 91e27b474..315d9600f 100755 --- a/APP_Framework/Framework/control/plc_protocol/Kconfig +++ b/APP_Framework/Framework/control/plc_protocol/Kconfig @@ -23,6 +23,7 @@ endif config CONTROL_PROTOCOL_S7 bool "Using s7 control protocol" default n + select CONTROL_USING_SOCKET if CONTROL_PROTOCOL_S7 source "$APP_DIR/Framework/control/plc_protocol/s7/Kconfig" endif diff --git a/APP_Framework/Framework/control/plc_protocol/fins/fins.c b/APP_Framework/Framework/control/plc_protocol/fins/fins.c index 0a8c20125..aef282046 100644 --- a/APP_Framework/Framework/control/plc_protocol/fins/fins.c +++ b/APP_Framework/Framework/control/plc_protocol/fins/fins.c @@ -329,7 +329,11 @@ void *ReceivePlcDataTask(void *parameter) /*read all variable item data, put them into circular_area*/ if (i == control_protocol->recipe->read_item_count) { printf("%s get %d item %d length\n", __func__, i, data_length); + // for(int i = 0; i < data_length; i++){ + // printf("%x\n",fins_data[i]); + // } CircularAreaAppWrite(circular_area, fins_data, data_length, 0); + printf("%s\n",fins_data); } /*read data every single 'read_period' ms*/ diff --git a/APP_Framework/Framework/control/plc_protocol/include/libs7.h b/APP_Framework/Framework/control/plc_protocol/include/libs7.h new file mode 100644 index 000000000..ed3fa1e8c --- /dev/null +++ b/APP_Framework/Framework/control/plc_protocol/include/libs7.h @@ -0,0 +1,408 @@ +/* + * Copyright (c) 2022 AIIT XUOS Lab + * XiUOS is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * http://license.coscl.org.cn/MulanPSL2 + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, + * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, + * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ + +#ifndef snap7_h +#define snap7_h +//--------------------------------------------------------------------------- +# include +# include + +//****************************************************************************** +// COMMON +//****************************************************************************** +// Exact length types regardless of platform/processor +typedef uint8_t byte; +typedef uint16_t word; +typedef uint32_t longword; +typedef byte* pbyte; +typedef word* pword; +typedef uintptr_t S7Object; // multi platform/processor object reference + // DON'T CONFUSE IT WITH AN OLE OBJECT, IT'S SIMPLY + // AN INTEGER VALUE (32 OR 64 BIT) USED AS HANDLE. + +#ifndef __cplusplus +typedef struct +{ + int tm_sec; + int tm_min; + int tm_hour; + int tm_mday; + int tm_mon; + int tm_year; + int tm_wday; + int tm_yday; + int tm_isdst; +}tm; + +typedef int bool; +#define false 0; +#define true 1; +#endif + +static const int errLibInvalidParam = -1; +static const int errLibInvalidObject = -2; + +// CPU status +#define S7CpuStatusUnknown 0x00 +#define S7CpuStatusRun 0x08 +#define S7CpuStatusStop 0x04 + +// ISO Errors +static const longword errIsoConnect = 0x00010000; // Connection error +static const longword errIsoDisconnect = 0x00020000; // Disconnect error +static const longword errIsoInvalidPDU = 0x00030000; // Bad format +static const longword errIsoInvalidDataSize = 0x00040000; // Bad Datasize passed to send/recv buffer is invalid +static const longword errIsoNullPointer = 0x00050000; // Null passed as pointer +static const longword errIsoShortPacket = 0x00060000; // A short packet received +static const longword errIsoTooManyFragments = 0x00070000; // Too many packets without EoT flag +static const longword errIsoPduOverflow = 0x00080000; // The sum of fragments data exceded maximum packet size +static const longword errIsoSendPacket = 0x00090000; // An error occurred during send +static const longword errIsoRecvPacket = 0x000A0000; // An error occurred during recv +static const longword errIsoInvalidParams = 0x000B0000; // Invalid TSAP params +static const longword errIsoResvd_1 = 0x000C0000; // Unassigned +static const longword errIsoResvd_2 = 0x000D0000; // Unassigned +static const longword errIsoResvd_3 = 0x000E0000; // Unassigned +static const longword errIsoResvd_4 = 0x000F0000; // Unassigned + +// Tag Struct +typedef struct { + int Area; + int DBNumber; + int Start; + int Size; + int WordLen; +}TS7Tag, * PS7Tag; + +//------------------------------------------------------------------------------ +// PARAMS LIST +//------------------------------------------------------------------------------ +static const int p_u16_LocalPort = 1; +static const int p_u16_RemotePort = 2; +static const int p_i32_PingTimeout = 3; +static const int p_i32_SendTimeout = 4; +static const int p_i32_RecvTimeout = 5; +static const int p_i32_WorkInterval = 6; +static const int p_u16_SrcRef = 7; +static const int p_u16_DstRef = 8; +static const int p_u16_SrcTSap = 9; +static const int p_i32_PDURequest = 10; +static const int p_i32_MaxClients = 11; +static const int p_i32_BSendTimeout = 12; +static const int p_i32_BRecvTimeout = 13; +static const int p_u32_RecoveryTime = 14; +static const int p_u32_KeepAliveTime = 15; + +// Client/Partner Job status +static const int JobComplete = 0; +static const int JobPending = 1; + +//****************************************************************************** +// CLIENT +//****************************************************************************** + +// Error codes +static const longword errNegotiatingPDU = 0x00100000; +static const longword errCliInvalidParams = 0x00200000; +static const longword errCliJobPending = 0x00300000; +static const longword errCliTooManyItems = 0x00400000; +static const longword errCliInvalidWordLen = 0x00500000; +static const longword errCliPartialDataWritten = 0x00600000; +static const longword errCliSizeOverPDU = 0x00700000; +static const longword errCliInvalidPlcAnswer = 0x00800000; +static const longword errCliAddressOutOfRange = 0x00900000; +static const longword errCliInvalidTransportSize = 0x00A00000; +static const longword errCliWriteDataSizeMismatch = 0x00B00000; +static const longword errCliItemNotAvailable = 0x00C00000; +static const longword errCliInvalidValue = 0x00D00000; +static const longword errCliCannotStartPLC = 0x00E00000; +static const longword errCliAlreadyRun = 0x00F00000; +static const longword errCliCannotStopPLC = 0x01000000; +static const longword errCliCannotCopyRamToRom = 0x01100000; +static const longword errCliCannotCompress = 0x01200000; +static const longword errCliAlreadyStop = 0x01300000; +static const longword errCliFunNotAvailable = 0x01400000; +static const longword errCliUploadSequenceFailed = 0x01500000; +static const longword errCliInvalidDataSizeRecvd = 0x01600000; +static const longword errCliInvalidBlockType = 0x01700000; +static const longword errCliInvalidBlockNumber = 0x01800000; +static const longword errCliInvalidBlockSize = 0x01900000; +static const longword errCliDownloadSequenceFailed = 0x01A00000; +static const longword errCliInsertRefused = 0x01B00000; +static const longword errCliDeleteRefused = 0x01C00000; +static const longword errCliNeedPassword = 0x01D00000; +static const longword errCliInvalidPassword = 0x01E00000; +static const longword errCliNoPasswordToSetOrClear = 0x01F00000; +static const longword errCliJobTimeout = 0x02000000; +static const longword errCliPartialDataRead = 0x02100000; +static const longword errCliBufferTooSmall = 0x02200000; +static const longword errCliFunctionRefused = 0x02300000; +static const longword errCliDestroying = 0x02400000; +static const longword errCliInvalidParamNumber = 0x02500000; +static const longword errCliCannotChangeParam = 0x02600000; + +static const int MaxVars = 20; // Max vars that can be transferred with MultiRead/MultiWrite + +// Client Connection Type +static const word CONNTYPE_PG = 0x0001; // Connect to the PLC as a PG +static const word CONNTYPE_OP = 0x0002; // Connect to the PLC as an OP +static const word CONNTYPE_BASIC = 0x0003; // Basic connection + +// Area ID +static const byte S7AreaPE = 0x81; +static const byte S7AreaPA = 0x82; +static const byte S7AreaMK = 0x83; +static const byte S7AreaDB = 0x84; +static const byte S7AreaCT = 0x1C; +static const byte S7AreaTM = 0x1D; + +// Word Length +static const int S7WLBit = 0x01; +static const int S7WLByte = 0x02; +static const int S7WLWord = 0x04; +static const int S7WLDWord = 0x06; +static const int S7WLReal = 0x08; +static const int S7WLCounter = 0x1C; +static const int S7WLTimer = 0x1D; + +// Block type +static const byte Block_OB = 0x38; +static const byte Block_DB = 0x41; +static const byte Block_SDB = 0x42; +static const byte Block_FC = 0x43; +static const byte Block_SFC = 0x44; +static const byte Block_FB = 0x45; +static const byte Block_SFB = 0x46; + +// Sub Block Type +static const byte SubBlk_OB = 0x08; +static const byte SubBlk_DB = 0x0A; +static const byte SubBlk_SDB = 0x0B; +static const byte SubBlk_FC = 0x0C; +static const byte SubBlk_SFC = 0x0D; +static const byte SubBlk_FB = 0x0E; +static const byte SubBlk_SFB = 0x0F; + +// Block languages +static const byte BlockLangAWL = 0x01; +static const byte BlockLangKOP = 0x02; +static const byte BlockLangFUP = 0x03; +static const byte BlockLangSCL = 0x04; +static const byte BlockLangDB = 0x05; +static const byte BlockLangGRAPH = 0x06; + +// Read/Write Multivars +typedef struct { + int Area; + int WordLen; + int Result; + int DBNumber; + int Start; + int Amount; + void* pdata; +} TS7DataItem, * PS7DataItem; + +//typedef int TS7ResultItems[MaxVars]; +//typedef TS7ResultItems *PS7ResultItems; + +// List Blocks +typedef struct { + int OBCount; + int FBCount; + int FCCount; + int SFBCount; + int SFCCount; + int DBCount; + int SDBCount; +} TS7BlocksList, * PS7BlocksList; + +// Blocks info +typedef struct { + int BlkType; // Block Type (OB, DB) + int BlkNumber; // Block number + int BlkLang; // Block Language + int BlkFlags; // Block flags + int MC7Size; // The real size in bytes + int LoadSize; // Load memory size + int LocalData; // Local data + int SBBLength; // SBB Length + int CheckSum; // Checksum + int Version; // Block version + // Chars info + char CodeDate[11]; // Code date + char IntfDate[11]; // Interface date + char Author[9]; // Author + char Family[9]; // Family + char Header[9]; // Header +} TS7BlockInfo, * PS7BlockInfo; + +typedef word TS7BlocksOfType[0x2000]; +typedef TS7BlocksOfType* PS7BlocksOfType; + +// Order code +typedef struct { + char Code[21]; + byte V1; + byte V2; + byte V3; +} TS7OrderCode, * PS7OrderCode; + +// CPU Info +typedef struct { + char ModuleTypeName[33]; + char SerialNumber[25]; + char ASName[25]; + char Copyright[27]; + char ModuleName[25]; +} TS7CpuInfo, * PS7CpuInfo; + +// CP Info +typedef struct { + int MaxPduLengt; + int MaxConnections; + int MaxMpiRate; + int MaxBusRate; +} TS7CpInfo, * PS7CpInfo; + +// See §33.1 of "System Software for S7-300/400 System and Standard Functions" +// and see SFC51 description too +typedef struct { + word LENTHDR; + word N_DR; +} SZL_HEADER, * PSZL_HEADER; + +typedef struct { + SZL_HEADER Header; + byte Data[0x4000 - 4]; +} TS7SZL, * PS7SZL; + +// SZL List of available SZL IDs : same as SZL but List items are big-endian adjusted +typedef struct { + SZL_HEADER Header; + word List[0x2000 - 2]; +} TS7SZLList, * PS7SZLList; + +// See §33.19 of "System Software for S7-300/400 System and Standard Functions" +typedef struct { + word sch_schal; + word sch_par; + word sch_rel; + word bart_sch; + word anl_sch; +} TS7Protection, * PS7Protection; + +// Client completion callback +typedef void (*pfn_CliCompletion) (void* usrPtr, int opCode, int opResult); +//------------------------------------------------------------------------------ +// Import prototypes +//------------------------------------------------------------------------------ +S7Object Cli_Create(); +void Cli_Destroy(S7Object* Client); +int Cli_ConnectTo(S7Object Client, const char* Address, int Rack, int Slot); +int Cli_SetConnectionParams(S7Object Client, const char* Address, word LocalTSAP, word RemoteTSAP); +int Cli_SetConnectionType(S7Object Client, word ConnectionType); +int Cli_Connect(S7Object Client); +int Cli_Disconnect(S7Object Client); +int Cli_GetParam(S7Object Client, int ParamNumber, void* pValue); +int Cli_SetParam(S7Object Client, int ParamNumber, void* pValue); +int Cli_SetAsCallback(S7Object Client, pfn_CliCompletion pCompletion, void* usrPtr); +// Data I/O main functions +int Cli_ReadArea(S7Object Client, int Area, int DBNumber, int Start, int Amount, int WordLen, void* pUsrData); +int Cli_WriteArea(S7Object Client, int Area, int DBNumber, int Start, int Amount, int WordLen, void* pUsrData); +int Cli_ReadMultiVars(S7Object Client, PS7DataItem Item, int ItemsCount); +int Cli_WriteMultiVars(S7Object Client, PS7DataItem Item, int ItemsCount); +// Data I/O Lean functions +int Cli_DBRead(S7Object Client, int DBNumber, int Start, int Size, void* pUsrData); +int Cli_DBWrite(S7Object Client, int DBNumber, int Start, int Size, void* pUsrData); +int Cli_MBRead(S7Object Client, int Start, int Size, void* pUsrData); +int Cli_MBWrite(S7Object Client, int Start, int Size, void* pUsrData); +int Cli_EBRead(S7Object Client, int Start, int Size, void* pUsrData); +int Cli_EBWrite(S7Object Client, int Start, int Size, void* pUsrData); +int Cli_ABRead(S7Object Client, int Start, int Size, void* pUsrData); +int Cli_ABWrite(S7Object Client, int Start, int Size, void* pUsrData); +int Cli_TMRead(S7Object Client, int Start, int Amount, void* pUsrData); +int Cli_TMWrite(S7Object Client, int Start, int Amount, void* pUsrData); +int Cli_CTRead(S7Object Client, int Start, int Amount, void* pUsrData); +int Cli_CTWrite(S7Object Client, int Start, int Amount, void* pUsrData); +// Directory functions +int Cli_ListBlocks(S7Object Client, TS7BlocksList* pUsrData); +int Cli_GetAgBlockInfo(S7Object Client, int BlockType, int BlockNum, TS7BlockInfo* pUsrData); +int Cli_GetPgBlockInfo(S7Object Client, void* pBlock, TS7BlockInfo* pUsrData, int Size); +int Cli_ListBlocksOfType(S7Object Client, int BlockType, TS7BlocksOfType* pUsrData, int* ItemsCount); +// Blocks functions +int Cli_Upload(S7Object Client, int BlockType, int BlockNum, void* pUsrData, int* Size); +int Cli_FullUpload(S7Object Client, int BlockType, int BlockNum, void* pUsrData, int* Size); +int Cli_Download(S7Object Client, int BlockNum, void* pUsrData, int Size); +int Cli_Delete(S7Object Client, int BlockType, int BlockNum); +int Cli_DBGet(S7Object Client, int DBNumber, void* pUsrData, int* Size); +int Cli_DBFill(S7Object Client, int DBNumber, int FillChar); +// Date/Time functions +int Cli_GetPlcDateTime(S7Object Client, tm* DateTime); +int Cli_SetPlcDateTime(S7Object Client, tm* DateTime); +int Cli_SetPlcSystemDateTime(S7Object Client); +// System Info functions +int Cli_GetOrderCode(S7Object Client, TS7OrderCode* pUsrData); +int Cli_GetCpuInfo(S7Object Client, TS7CpuInfo* pUsrData); +int Cli_GetCpInfo(S7Object Client, TS7CpInfo* pUsrData); +int Cli_ReadSZL(S7Object Client, int ID, int Index, TS7SZL* pUsrData, int* Size); +int Cli_ReadSZLList(S7Object Client, TS7SZLList* pUsrData, int* ItemsCount); +// Control functions +int Cli_PlcHotStart(S7Object Client); +int Cli_PlcColdStart(S7Object Client); +int Cli_PlcStop(S7Object Client); +int Cli_CopyRamToRom(S7Object Client, int Timeout); +int Cli_Compress(S7Object Client, int Timeout); +int Cli_GetPlcStatus(S7Object Client, int* Status); +// Security functions +int Cli_GetProtection(S7Object Client, TS7Protection* pUsrData); +int Cli_SetSessionPassword(S7Object Client, char* Password); +int Cli_ClearSessionPassword(S7Object Client); +// Low level +int Cli_IsoExchangeBuffer(S7Object Client, void* pUsrData, int* Size); +// Misc +int Cli_GetExecTime(S7Object Client, int* Time); +int Cli_GetLastError(S7Object Client, int* LastError); +int Cli_GetPduLength(S7Object Client, int* Requested, int* Negotiated); +int Cli_ErrorText(int Error, char* Text, int TextLen); +// 1.1.0 +int Cli_GetConnected(S7Object Client, int* Connected); +//------------------------------------------------------------------------------ +// Async functions +//------------------------------------------------------------------------------ +int Cli_AsReadArea(S7Object Client, int Area, int DBNumber, int Start, int Amount, int WordLen, void* pUsrData); +int Cli_AsWriteArea(S7Object Client, int Area, int DBNumber, int Start, int Amount, int WordLen, void* pUsrData); +int Cli_AsDBRead(S7Object Client, int DBNumber, int Start, int Size, void* pUsrData); +int Cli_AsDBWrite(S7Object Client, int DBNumber, int Start, int Size, void* pUsrData); +int Cli_AsMBRead(S7Object Client, int Start, int Size, void* pUsrData); +int Cli_AsMBWrite(S7Object Client, int Start, int Size, void* pUsrData); +int Cli_AsEBRead(S7Object Client, int Start, int Size, void* pUsrData); +int Cli_AsEBWrite(S7Object Client, int Start, int Size, void* pUsrData); +int Cli_AsABRead(S7Object Client, int Start, int Size, void* pUsrData); +int Cli_AsABWrite(S7Object Client, int Start, int Size, void* pUsrData); +int Cli_AsTMRead(S7Object Client, int Start, int Amount, void* pUsrData); +int Cli_AsTMWrite(S7Object Client, int Start, int Amount, void* pUsrData); +int Cli_AsCTRead(S7Object Client, int Start, int Amount, void* pUsrData); +int Cli_AsCTWrite(S7Object Client, int Start, int Amount, void* pUsrData); +int Cli_AsListBlocksOfType(S7Object Client, int BlockType, TS7BlocksOfType* pUsrData, int* ItemsCount); +int Cli_AsReadSZL(S7Object Client, int ID, int Index, TS7SZL* pUsrData, int* Size); +int Cli_AsReadSZLList(S7Object Client, TS7SZLList* pUsrData, int* ItemsCount); +int Cli_AsUpload(S7Object Client, int BlockType, int BlockNum, void* pUsrData, int* Size); +int Cli_AsFullUpload(S7Object Client, int BlockType, int BlockNum, void* pUsrData, int* Size); +int Cli_AsDownload(S7Object Client, int BlockNum, void* pUsrData, int Size); +int Cli_AsCopyRamToRom(S7Object Client, int Timeout); +int Cli_AsCompress(S7Object Client, int Timeout); +int Cli_AsDBGet(S7Object Client, int DBNumber, void* pUsrData, int* Size); +int Cli_AsDBFill(S7Object Client, int DBNumber, int FillChar); +int Cli_CheckAsCompletion(S7Object Client, int* opResult); +int Cli_WaitAsCompletion(S7Object Client, int Timeout); + + +#endif // snap7_h diff --git a/APP_Framework/Framework/control/plc_protocol/include/s7.h b/APP_Framework/Framework/control/plc_protocol/include/s7.h index f89f1f122..9021d3d5a 100644 --- a/APP_Framework/Framework/control/plc_protocol/include/s7.h +++ b/APP_Framework/Framework/control/plc_protocol/include/s7.h @@ -16,4 +16,27 @@ * @version 3.0 * @author AIIT XUOS Lab * @date 2022-10-08 - */ \ No newline at end of file + */ + +#ifndef S7_H +#define S7_H + +#include +#include "libs7.h" + +#define BASE_PLC_RECV_BUFF_SIZE 1024 + +ControlProtocolType control_protocol; + +int8_t ReadPlcDataByRecipe(struct ControlRecipe *p_recipe); +void voidpush(uint8_t *datastack,uint8_t* args,uint16_t length); +static uint8_t GetUniformValueTypeMemorySize(UniformValueType uniform_value_type); + +typedef struct +{ + TS7DataItem data_info; + UniformValueType value_type; + char value_name[20]; +}S7ReadItem; + +#endif \ No newline at end of file diff --git a/APP_Framework/Framework/control/plc_protocol/s7/Kconfig b/APP_Framework/Framework/control/plc_protocol/s7/Kconfig index 139597f9c..e69de29bb 100755 --- a/APP_Framework/Framework/control/plc_protocol/s7/Kconfig +++ b/APP_Framework/Framework/control/plc_protocol/s7/Kconfig @@ -1,2 +0,0 @@ - - diff --git a/APP_Framework/Framework/control/plc_protocol/s7/Makefile b/APP_Framework/Framework/control/plc_protocol/s7/Makefile old mode 100755 new mode 100644 index 608656f03..1271dfd9f --- a/APP_Framework/Framework/control/plc_protocol/s7/Makefile +++ b/APP_Framework/Framework/control/plc_protocol/s7/Makefile @@ -1,4 +1,2 @@ -SRC_FILES := - +SRC_FILES := libs7.a s7.c include $(KERNEL_ROOT)/compiler.mk - diff --git a/APP_Framework/Framework/control/plc_protocol/s7/libs7.a b/APP_Framework/Framework/control/plc_protocol/s7/libs7.a new file mode 100644 index 000000000..33e08b109 Binary files /dev/null and b/APP_Framework/Framework/control/plc_protocol/s7/libs7.a differ diff --git a/APP_Framework/Framework/control/plc_protocol/s7/s7.c b/APP_Framework/Framework/control/plc_protocol/s7/s7.c new file mode 100644 index 000000000..900fd379b --- /dev/null +++ b/APP_Framework/Framework/control/plc_protocol/s7/s7.c @@ -0,0 +1,242 @@ +/* + * Copyright (c) 2022 AIIT XUOS Lab + * XiUOS is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * http://license.coscl.org.cn/MulanPSL2 + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, + * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, + * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ + +/** + * @file s7.c + * @brief plc protocol s7 + * @version 3.0 + * @author AIIT XUOS Lab + * @date 2023-4-14 + */ + +#include + +/** + * @description: S7 Receive Plc Data Task + * @param parameter - parameter pointer + * @return + */ +void *ReceivePlcDataTask(void *parameter) +{ + printf("%s %d\n", __func__, __LINE__); + ReadPlcDataByRecipe(control_protocol->recipe); +} + +/** + * @description: S7 Protocol Open + * @param control_protocol - control protocol pointer + * @return success : 0 error + */ +int S7Open(struct ControlProtocol *control_protocol) +{ + ControlProtocolOpenDef(control_protocol); + return 0; +} + +/** + * @description: S7 Protocol Close + * @param control_protocol - control protocol pointer + * @return success : 0 error + */ +int S7Close(struct ControlProtocol *control_protocol) +{ + ControlProtocolCloseDef(); + + return 0; +} + +/** + * @description: S7 Protocol Read Data + * @param control_protocol - control protocol pointer + * @param buf - read data buffer pointer + * @param len - read data length + * @return success : data length error : 0 + */ +int S7Read(struct ControlProtocol *control_protocol, void *buf, size_t len) +{ + struct CircularAreaApp *circular_area = (struct CircularAreaApp *)control_protocol->args; + return CircularAreaAppRead(circular_area, buf, len); +} + +static struct ControlDone s7_protocol_done = +{ + ._open = S7Open, + ._close = S7Close, + ._read = S7Read, + ._write = NULL, + ._ioctl = NULL, +}; + +/** + * @description: Push Data Onto a Stack One By One + * @param datastack - data stack pointer + * @param args - data pointer + * @param length - data length + * @return + */ +void PushDataIntoStack(uint8_t *datastack,uint8_t* args,uint16_t length) +{ + static int index = 8; + for(int i =0; i < length; i ++) { + datastack[index] = args[i]; + index++; + if(index >= control_protocol->recipe->protocol_data.data_length){ + index = 8; + } + } +} + +/** + * @description: Read PLC Data By Recipe + * @param p_recipe - recipe pointer + * @return success : 0 error : -1 + */ +int8_t ReadPlcDataByRecipe(struct ControlRecipe *p_recipe) +{ + uint16_t data_length = control_protocol->recipe->protocol_data.data_length; + uint8_t *s7_data = control_protocol->recipe->protocol_data.data; + struct CircularAreaApp *circular_area = (struct CircularAreaApp *)control_protocol->args; + + S7Object s7_plc = {0}; + char plc_ip_string[15] = {0}; + s7_plc = Cli_Create(); + sprintf(plc_ip_string, "%u.%u.%u.%u", + p_recipe->socket_config.plc_ip[0], + p_recipe->socket_config.plc_ip[1], + p_recipe->socket_config.plc_ip[2], + p_recipe->socket_config.plc_ip[3]); + int16_t read_item_count = p_recipe->read_item_count; + uint8_t *p_read_item = (uint8_t *)(p_recipe->read_item); + + while (1) { + int8_t error = 0; + while (!error) { + uint16_t i = 0; + for (i = 0; i < read_item_count; i ++) { + int is_connected = 0; + Cli_GetConnected(s7_plc, &is_connected); + while (!is_connected) { + if (Cli_ConnectTo(s7_plc, plc_ip_string, 0, 1) != 0) { + PrivTaskDelay(1000); + } else { + break; + } + } + TS7DataItem data_info = ((S7ReadItem*)p_read_item + i)->data_info; + Cli_ReadMultiVars(s7_plc, &data_info, 1); + uint16_t Size = GetValueTypeMemorySize(((S7ReadItem*)p_read_item + i)->value_type); + ControlPrintfList("S7 RECV", data_info.pdata,Size); + PushDataIntoStack(s7_data,data_info.pdata,Size); + PrivTaskDelay(100); + } + + /*read all variable item data, put them into circular_area*/ + if (i == read_item_count) { + printf("%s get %d item %d length\n", __func__, i, data_length); + CircularAreaAppWrite(circular_area, s7_data, data_length, 0); + } + } + } + return 0; +} + +/** + * @description: S7 Protocol read item Init + * @param p_read_item - read item pointer + * @param read_item_json - read item json pointer + * @param p_data - unused + * @return success : 0 error : -1 + */ +static uint8_t InitialS7ReadItem(S7ReadItem* p_read_item, cJSON* read_item_json, uint8_t* p_data) +{ + p_read_item->value_type = cJSON_GetObjectItem(read_item_json, "value_type")->valueint; + strncpy(p_read_item->value_name, cJSON_GetObjectItem(read_item_json, "value_name")->valuestring, 20); + TS7DataItem* p_data_info = &(p_read_item->data_info); + p_data_info->Amount = cJSON_GetObjectItem(read_item_json, "amount")->valueint; + p_data_info->Start = cJSON_GetObjectItem(read_item_json, "start")->valueint; + p_data_info->DBNumber = cJSON_GetObjectItem(read_item_json, "db_number")->valueint; + char* area_valuestring = cJSON_GetObjectItem(read_item_json, "area")->valuestring; + if (strcmp(area_valuestring, "I") == 0) + p_data_info->Area = S7AreaPE; + else if (strcmp(area_valuestring, "Q") == 0) + p_data_info->Area = S7AreaPA; + else if (strcmp(area_valuestring, "M") == 0) + p_data_info->Area = S7AreaMK; + else if (strcmp(area_valuestring, "DB") == 0) + p_data_info->Area = S7AreaDB; + else if (strcmp(area_valuestring, "C") == 0) + p_data_info->Area = S7AreaCT; + else if (strcmp(area_valuestring, "T") == 0) + p_data_info->Area = S7AreaTM; + char* wordlen_valuestring = cJSON_GetObjectItem(read_item_json, "wordlen")->valuestring; + if (strcmp(wordlen_valuestring, "Bit") == 0) + p_data_info->WordLen = S7WLBit; + else if (strcmp(wordlen_valuestring, "Byte") == 0) + p_data_info->WordLen = S7WLByte; + else if (strcmp(wordlen_valuestring, "Word") == 0) + p_data_info->WordLen = S7WLWord; + else if (strcmp(wordlen_valuestring, "DWord") == 0) + p_data_info->WordLen = S7WLDWord; + else if (strcmp(wordlen_valuestring, "Real") == 0) + p_data_info->WordLen = S7WLReal; + else if (strcmp(wordlen_valuestring, "Counter") == 0) + p_data_info->WordLen = S7WLCounter; + else if (strcmp(wordlen_valuestring, "Timer") == 0) + p_data_info->WordLen = S7WLTimer; + p_data_info->pdata = p_data; + printf("value_type is %d, amount is %d, start is %04d, db_number is %d, area is 0x%03x, wordlen is %d.\n", + p_read_item->value_type, p_data_info->Amount, p_data_info->Start, p_data_info->DBNumber, + p_data_info->Area, p_data_info->WordLen); + return GetValueTypeMemorySize(p_read_item->value_type); +} + +/** + * @description: S7 Protocol Cmd Generate + * @param p_recipe - recipe pointer + * @param protocol_format_info - protocol format info pointer + * @return success : 0 error : -1 + */ +int S7ProtocolFormatCmd(struct ControlRecipe *p_recipe, ProtocolFormatInfo *protocol_format_info) +{ + int ret = 0; + uint8_t *S7_plc_read_data = PrivMalloc(p_recipe->protocol_data.data_length); + uint16_t S7_plc_read_data_index = 8; + cJSON *read_single_item_json = protocol_format_info->read_single_item_json; + int i = protocol_format_info->read_item_index; + if (0 == i) + p_recipe->read_item = PrivMalloc(sizeof(S7ReadItem) * p_recipe->read_item_count); + S7_plc_read_data_index += InitialS7ReadItem((S7ReadItem *)(p_recipe->read_item) + i, + read_single_item_json, S7_plc_read_data + S7_plc_read_data_index); + if (S7_plc_read_data_index == 8) { + ret = -1; + printf("%s read %d item failed!\n", __func__, i); + } + return ret; +} +/** + * @description: S7 Protocol Init + * @param p_recipe - recipe pointer + * @return success : 0 error : -1 + */ +int S7ProtocolInit(struct ControlRecipe *p_recipe) +{ + p_recipe->read_item = PrivMalloc(sizeof(S7ReadItem) * p_recipe->read_item_count); + if (NULL == p_recipe->read_item) { + PrivFree(p_recipe->read_item); + return -1; + } + memset(p_recipe->read_item, 0, sizeof(S7ReadItem)); + p_recipe->ControlProtocolFormatCmd = S7ProtocolFormatCmd; + p_recipe->done = &s7_protocol_done; + + return 0; +} diff --git a/APP_Framework/Framework/control/plc_protocol/s7/test_recipe_s7.json b/APP_Framework/Framework/control/plc_protocol/s7/test_recipe_s7.json new file mode 100644 index 000000000..31df9a200 --- /dev/null +++ b/APP_Framework/Framework/control/plc_protocol/s7/test_recipe_s7.json @@ -0,0 +1,88 @@ +{ + "device_id": 1, + "device_name": "demo", + "communication_type": 0, + "socket_config": { + "plc_ip": "192.168.250.2", + "local_ip": "192.168.250.233", + "gateway": "192.168.250.252", + "netmask": "255.255.255.0", + "port": 102 + }, + "protocol_type": 1, + "read_period": 100, + "read_item_list": [ + { + "value_name": "浮点数", + "value_type": 9, + "area": "DB", + "wordlen": "Real", + "db_number": 18, + "start": 18, + "amount": 1 + }, + { + "value_name": "整型1", + "value_type": 3, + "area": "M", + "wordlen": "WORD", + "db_number": 1, + "start": 100, + "amount": 1 + }, + { + "value_name": "整型2", + "value_type": 3, + "area": "M", + "wordlen": "WORD", + "db_number": 1, + "start": 102, + "amount": 1 + }, + { + "value_name": "布尔1", + "value_type": 1, + "area": "Q", + "wordlen": "Bit", + "db_number": 1, + "start": 1, + "amount": 1 + }, + { + "value_name": "布尔2", + "value_type": 1, + "area": "Q", + "wordlen": "Bit", + "db_number": 1, + "start": 2, + "amount": 1 + }, + { + "value_name": "布尔3", + "value_type": 1, + "area": "Q", + "wordlen": "Bit", + "db_number": 1, + "start": 3, + "amount": 1 + }, + { + "value_name": "布尔4", + "value_type": 1, + "area": "Q", + "wordlen": "Bit", + "db_number": 1, + "start": 4, + "amount": 1 + }, + { + "value_name": "整型3", + "value_type": 3, + "area": "DB", + "wordlen": "Word", + "db_number": 18, + "start": 2, + "amount": 1 + } + ] +} \ No newline at end of file diff --git a/APP_Framework/Framework/control/shared/control.c b/APP_Framework/Framework/control/shared/control.c index 871e31eb6..fc0ff7fe8 100755 --- a/APP_Framework/Framework/control/shared/control.c +++ b/APP_Framework/Framework/control/shared/control.c @@ -21,8 +21,6 @@ #include #include -ControlProtocolType control_protocol; - /** * @description: Control Framework Find certain Protocol * @param void @@ -126,6 +124,7 @@ static int ControlAnalyzeRecipe(ControlProtocolType control_protocol, const char return -1; } + strncpy(control_protocol->device->dev_name, control_protocol->recipe->device_name, 20); control_protocol->protocol_type = control_protocol->recipe->protocol_type; /*Get the variable need to read from recipe file*/ @@ -254,6 +253,15 @@ int ControlFrameworkInit(void) ret = -1; goto _out; } + + control_protocol->device = (struct ControlDevice *)PrivMalloc(sizeof(struct ControlDevice)); + if (NULL == control_protocol->device) { + printf("%s malloc control device failed!\n", __func__); + PrivFree(control_protocol->device); + PrivFree(control_protocol); + ret = -1; + goto _out; + } //Control Protocol Struct Init ret = ControlProtocolInit(control_protocol); @@ -274,6 +282,7 @@ int ControlFrameworkInit(void) } control_protocol->protocol_status = CONTROL_REGISTERED; + control_protocol->device->status = CONTROL_REGISTERED; ret = ControlPeripheralInit(control_protocol->recipe); if (ret < 0) { @@ -281,9 +290,65 @@ int ControlFrameworkInit(void) PrivFree(control_protocol); goto _out; } + + printf("%u %u\n",control_protocol->recipe->total_data_length,control_protocol->recipe->device_id); printf("%s ControlPeripheralInit done\n", __func__); _out: return ret; } + +static char *const protocol_type_str[] = +{ + "TYPE_START", + "S7", + "MODBUS_TCP", + "MODBUS_UART", + "OPC_UA", + "FINS", + "MELSEC_1E", + "MELSEC_3E_Q_L", + "MELSEC_3E_IQ_R", + "MELSEC_1C", + "MELSEC_3C", + "TYPE_END" +}; + +/** + * @description: Control Framework Shell Cmd Information + * @param void + * @return success : 0 error : -1 + */ +void ShowControl(void) +{ + int i = 0; + int maxlen; + const char *item_type = "control_protocol_type"; + const char *item_name_0 = "control_protocol_name"; + const char *item_name_1 = "control_device_name"; + const char *item_status = "status"; + + ControlProtocolType control_protocol = ControlProtocolFind(); + + printf(" %-28s%-28s%-26s%-20s\n", item_type, item_name_0, item_name_1, item_status); + maxlen = 90; + while (i < maxlen) { + i++; + if (maxlen == i) { + printf("-\n"); + } else { + printf("-"); + } + } + + if (control_protocol) { + printf("%s", " "); + KPrintf("%-28s%-28s%-26s%-8d\n", + protocol_type_str[1], + protocol_type_str[1], + control_protocol->device->dev_name, + control_protocol->device->status); + } +} +PRIV_SHELL_CMD_FUNCTION(ShowControl, show control framework information, PRIV_SHELL_CMD_FUNC_ATTR); diff --git a/APP_Framework/Framework/control/shared/control.h b/APP_Framework/Framework/control/shared/control.h index c64467a3e..2639a4719 100644 --- a/APP_Framework/Framework/control/shared/control.h +++ b/APP_Framework/Framework/control/shared/control.h @@ -24,10 +24,13 @@ #include #include + #ifdef __cplusplus extern "C" { #endif + + struct ControlProtocol; typedef struct ControlProtocol *ControlProtocolType; @@ -62,6 +65,15 @@ typedef enum CONTROL_UNREGISTERED, }ProtocolStatus; +struct ControlDevice +{ + char *dev_name; + int status; + + //to do + void *dev_done; +}; + struct ControlProtocol { char *name; @@ -70,6 +82,7 @@ struct ControlProtocol struct ControlRecipe *recipe; struct ControlDone *done; + struct ControlDevice *device; void *args; @@ -98,6 +111,9 @@ int ControlProtocolWrite(struct ControlProtocol *control_protocol, const void *b /*Control Framework Protocol Ioctl*/ int ControlProtocolIoctl(struct ControlProtocol *control_protocol, int cmd, void *args); +/*Control Framework new certain Protocol*/ +ControlProtocolType control_protocol; + #ifdef __cplusplus } #endif diff --git a/APP_Framework/Framework/control/shared/control_def.c b/APP_Framework/Framework/control/shared/control_def.c index c19ae9757..4808b2423 100644 --- a/APP_Framework/Framework/control/shared/control_def.c +++ b/APP_Framework/Framework/control/shared/control_def.c @@ -45,6 +45,10 @@ extern int ModbusTcpProtocolInit(struct ControlRecipe *p_recipe); extern int ModbusUartProtocolInit(struct ControlRecipe *p_recipe); #endif +#ifdef CONTROL_PROTOCOL_S7 +extern int S7ProtocolInit(struct ControlRecipe *p_recipe); +#endif + /* CONTROL FRAMEWORK READ DATA FORMAT: | HEAD |device_id|read data length|read item count| data | @@ -80,6 +84,9 @@ static struct ControlProtocolInitParam protocol_init[] = #ifdef CONTROL_PROTOCOL_MODBUS_UART { PROTOCOL_MODBUS_UART, ModbusUartProtocolInit }, #endif +#ifdef CONTROL_PROTOCOL_S7 + { PROTOCOL_S7, S7ProtocolInit }, +#endif { PROTOCOL_END, NULL }, }; @@ -445,30 +452,24 @@ void RecipeReadVariableItem(struct ControlRecipe *p_recipe, cJSON *p_recipe_file p_recipe->protocol_data.data = PrivMalloc(CONTROL_DATA_HEAD_LENGTH + p_recipe->total_data_length); p_recipe->protocol_data.data_length = CONTROL_DATA_HEAD_LENGTH + p_recipe->total_data_length; memset(p_recipe->protocol_data.data, 0, p_recipe->protocol_data.data_length); - protocol_format_info.p_read_item_data = p_recipe->protocol_data.data + CONTROL_DATA_HEAD_LENGTH; - /*Init The Control Protocol*/ ControlProtocolInitDesc(p_recipe, protocol_init); - /*Format Data Header, Reference "CONTROL FRAMEWORK READ DATA FORMAT"*/ FormatDataHeader(p_recipe); - uint16_t read_item_count = p_recipe->read_item_count; - for (i = 0; i < read_item_count; i ++) { cJSON *read_single_item_json = cJSON_GetArrayItem(read_item_list_json, i); - protocol_format_info.read_single_item_json = read_single_item_json; protocol_format_info.read_item_index = i; - /*Format Protocol Cmd By Analyze Variable Item One By One*/ ret = p_recipe->ControlProtocolFormatCmd(p_recipe, &protocol_format_info); - if (ret < 0) { - printf("%s read %d item failed!\n", __func__, i); - continue; + if (ret < 0) { + printf("%s read %d item failed!\n", __func__, i); + continue; } } } + } diff --git a/APP_Framework/Framework/control/shared/control_def.h b/APP_Framework/Framework/control/shared/control_def.h index 96957ad20..dec7a189a 100644 --- a/APP_Framework/Framework/control/shared/control_def.h +++ b/APP_Framework/Framework/control/shared/control_def.h @@ -44,6 +44,7 @@ extern "C" { } \ }while (0) + typedef enum { UNIFORM_BOOL = 1, diff --git a/APP_Framework/Framework/transform_layer/xizi/transform.c b/APP_Framework/Framework/transform_layer/xizi/transform.c index 8ac037c0b..002c8f1be 100644 --- a/APP_Framework/Framework/transform_layer/xizi/transform.c +++ b/APP_Framework/Framework/transform_layer/xizi/transform.c @@ -68,6 +68,30 @@ int PrivSemaphoreAbandon(sem_t *sem) return sem_post(sem); } +/**********************event****************************/ +#ifndef SEPARATE_COMPILE +int PrivEventCreate(uint8_t flag) +{ + return UserEventCreate(flag); +} + +int PrivEvenDelete(int event) +{ + UserEventDelete(event); + return 1; +} + +int PrivEvenTrigger(int event, uint32_t set) +{ + return UserEventTrigger(event, set); +} + +int PrivEventProcess(int event, uint32_t set, uint8_t option, int32_t wait_time, unsigned int *Recved) +{ + return UserEventProcess(event, set, option, wait_time, Recved); +} +#endif + /**************************task*************************/ int PrivTaskCreate(pthread_t *thread, const pthread_attr_t *attr, void *(*start_routine)(void *), void *arg) @@ -107,6 +131,36 @@ uint32_t PrivGetTickTime() return CalculateTimeMsFromTick(CurrentTicksGain()); } #endif + +/******************Soft Timer*********************/ +int PrivTimerCreate(clockid_t clockid, struct sigevent * evp, timer_t * timerid) +{ + return timer_create(clockid, evp, timerid); +} + +int PrivTimerDelete(timer_t timerid) +{ + return timer_delete(timerid); +} + +int PrivTimerStartRun(timer_t timerid) +{ + return UserTimerStartRun(timerid); +} + +int PrivTimerQuitRun(timer_t timerid) +{ + return UserTimerQuitRun(timerid); +} + +int PrivTimerModify(timer_t timerid, int flags, const struct itimerspec *restrict value, + struct itimerspec *restrict ovalue) +{ + return timer_settime(timerid, flags, value, ovalue); +} + +/*************************************************/ + /*********************fs**************************/ #ifdef FS_VFS /************************Driver Posix Transform***********************/ @@ -165,6 +219,7 @@ int PrivIoctl(int fd, int cmd, void *args) case LCD_TYPE: ret = PrivLcdIoctl(fd, cmd, ioctl_cfg->args); break; + case SPI_TYPE: case I2C_TYPE: case RTC_TYPE: case ADC_TYPE: diff --git a/APP_Framework/Framework/transform_layer/xizi/transform.h b/APP_Framework/Framework/transform_layer/xizi/transform.h index dd39d1c61..fe817f18a 100644 --- a/APP_Framework/Framework/transform_layer/xizi/transform.h +++ b/APP_Framework/Framework/transform_layer/xizi/transform.h @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include @@ -42,6 +43,16 @@ extern "C" { #define NAME_NUM_MAX 32 +#ifndef EVENT_AND +#define EVENT_AND (1 << 0) +#endif +#ifndef EVENT_OR +#define EVENT_OR (1 << 1) +#endif +#ifndef EVENT_AUTOCLEAN +#define EVENT_AUTOCLEAN (1 << 2) +#endif + /*********************GPIO define*********************/ #define GPIO_LOW 0x00 #define GPIO_HIGH 0x01 @@ -93,6 +104,30 @@ extern "C" { #define SERIAL_RB_BUFSZ 128 #endif +/********************SPI define*******************/ +#define SPI_MAX_CLOCK 40000000 +#define spi_device_max_num 4 + +#define SPI_LINE_CPHA (1 << 0) +#define SPI_LINE_CPOL (1 << 1) + +#define SPI_LSB (0 << 2) +#define SPI_MSB (1 << 2) + +#define SPI_DEV_MASTER (0 << 3) +#define SPI_DEV_SLAVE (1 << 3) + +#define SPI_MODE_0 (0 | 0) +#define SPI_MODE_1 (0 | SPI_LINE_CPHA) +#define SPI_MODE_2 (SPI_LINE_CPOL | 0) +#define SPI_MODE_3 (SPI_LINE_CPOL | SPI_LINE_CPHA) +#define SPI_MODE_MASK (SPI_LINE_CPHA | SPI_LINE_CPOL | SPI_MSB) + +#define SPI_CS_HIGH (1 << 4) +#define SPI_NO_CS (1 << 5) +#define SPI_3WIRE (1 << 6) +#define SPI_READY (1 << 7) + struct PinDevIrq { int irq_mode;//< RISING/FALLING/HIGH/LOW @@ -139,6 +174,15 @@ struct SerialDataCfg enum ExtSerialPortConfigure port_configure; }; +struct SpiMasterParam +{ + uint8 spi_work_mode;//CPOL CPHA + uint8 spi_frame_format;//frame format + uint8 spi_data_bit_width;//bit width + uint8 spi_data_endian;//little endian:0,big endian:1 + uint32 spi_maxfrequency;//work frequency +}; + enum IoctlDriverType { SERIAL_TYPE = 0, @@ -362,6 +406,14 @@ int PrivSemaphoreObtainNoWait(sem_t *sem); int PrivSemaphoreAbandon(sem_t *sem); int32_t PrivSemaphoreSetValue(int32_t sem, uint16_t val); +/*********************event**********************/ +#ifndef SEPARATE_COMPILE +int PrivEventCreate(uint8_t flag); +int PrivEvenDelete(int event); +int PrivEvenTrigger(int event, uint32_t set); +int PrivEventProcess(int event, uint32_t set, uint8_t option, int32_t wait_time, unsigned int *Recved); +#endif + /*********************task**************************/ int PrivTaskCreate(pthread_t *thread, const pthread_attr_t *attr, @@ -388,6 +440,13 @@ void *PrivRealloc(void *pointer, size_t size); void *PrivCalloc(size_t count, size_t size); void PrivFree(void *pointer); +/******************soft timer*********************/ +int PrivTimerCreate(clockid_t clockid, struct sigevent * evp, timer_t * timerid); +int PrivTimerDelete(timer_t timerid); +int PrivTimerStartRun(timer_t timerid); +int PrivTimerQuitRun(timer_t timerid); +int PrivTimerModify(timer_t timerid, int flags, const struct itimerspec *restrict value, + struct itimerspec *restrict ovalue); #ifdef __cplusplus } diff --git a/APP_Framework/Framework/transform_layer/xizi/user_api/posix_support/Makefile b/APP_Framework/Framework/transform_layer/xizi/user_api/posix_support/Makefile index abdf776a8..c6f238b2b 100644 --- a/APP_Framework/Framework/transform_layer/xizi/user_api/posix_support/Makefile +++ b/APP_Framework/Framework/transform_layer/xizi/user_api/posix_support/Makefile @@ -11,4 +11,8 @@ ifeq ($(CONFIG_KERNEL_MESSAGEQUEUE),y) SRC_FILES += mqueue.c endif +ifeq ($(CONFIG_KERNEL_SOFTTIMER),y) + SRC_FILES += timer.c +endif + include $(KERNEL_ROOT)/compiler.mk \ No newline at end of file diff --git a/APP_Framework/Framework/transform_layer/xizi/user_api/posix_support/include/pthread arm.h b/APP_Framework/Framework/transform_layer/xizi/user_api/posix_support/include/pthread arm.h index e179162c5..c5b23a0f1 100644 --- a/APP_Framework/Framework/transform_layer/xizi/user_api/posix_support/include/pthread arm.h +++ b/APP_Framework/Framework/transform_layer/xizi/user_api/posix_support/include/pthread arm.h @@ -32,33 +32,33 @@ extern "C" { typedef int pid_t; typedef unsigned long int pthread_t; -// struct sched_param { -// int sched_priority; /* process execution scheduling priority */ -// size_t slice; /* time slice in SCHED_RR mode (ms) */ -// }; -// typedef struct pthread_attr { -// unsigned char is_initialized; /* if the attr is initialized set to 1, otherwise set to 0 */ -// void *stackaddr; /* the start addr of the stack of the pthead */ -// size_t stacksize; /* the size of the stack of the pthead */ -// unsigned char contentionscope; /* the scope of contention, only PTHREAD_SCOPE_SYSTEM is supported */ -// unsigned char inheritsched; /* when set to PTHREAD_INHERIT_SCHED, specifies that the thread scheduling attributes -// shall be inherited from the creating thread, and the scheduling attributes in this -// attr argument shall be ignored */ -// unsigned char schedpolicy; /* the sched policy of the thread */ -// struct sched_param schedparam; /* the parameter of the thread scheduling */ -// size_t guardsize; /* guardsize is set to protect the stack, not supported */ -// unsigned char detachstate; /* when set to PTHREAD_CREATE_JOINABLE, thread will not end untill the creating thread end */ -// } pthread_attr_t; +struct sched_param { + int sched_priority; /* process execution scheduling priority */ + size_t slice; /* time slice in SCHED_RR mode (ms) */ +}; +typedef struct pthread_attr { + unsigned char is_initialized; /* if the attr is initialized set to 1, otherwise set to 0 */ + void *stackaddr; /* the start addr of the stack of the pthead */ + size_t stacksize; /* the size of the stack of the pthead */ + unsigned char contentionscope; /* the scope of contention, only PTHREAD_SCOPE_SYSTEM is supported */ + unsigned char inheritsched; /* when set to PTHREAD_INHERIT_SCHED, specifies that the thread scheduling attributes + shall be inherited from the creating thread, and the scheduling attributes in this + attr argument shall be ignored */ + unsigned char schedpolicy; /* the sched policy of the thread */ + struct sched_param schedparam; /* the parameter of the thread scheduling */ + size_t guardsize; /* guardsize is set to protect the stack, not supported */ + unsigned char detachstate; /* when set to PTHREAD_CREATE_JOINABLE, thread will not end untill the creating thread end */ +} pthread_attr_t; -// typedef struct pthread_mutexattr { -// int is_initialized; -// int type; -// int protocol; -// int prioceiling; -// int pshared; -// } pthread_mutexattr_t; +typedef struct pthread_mutexattr { + int is_initialized; + int type; + int protocol; + int prioceiling; + int pshared; +} pthread_mutexattr_t; -// typedef int pthread_mutex_t ; +typedef int pthread_mutex_t ; #ifdef __cplusplus } diff --git a/APP_Framework/Framework/transform_layer/xizi/user_api/posix_support/include/signal.h b/APP_Framework/Framework/transform_layer/xizi/user_api/posix_support/include/signal.h new file mode 100644 index 000000000..fd77b03bd --- /dev/null +++ b/APP_Framework/Framework/transform_layer/xizi/user_api/posix_support/include/signal.h @@ -0,0 +1,151 @@ +/* + * Copyright (c) 2020 AIIT XUOS Lab + * XiUOS is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * http://license.coscl.org.cn/MulanPSL2 + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, + * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, + * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ + +/** +* @file: signal.h +* @brief: the function definition of posix signal +* @version: 3.0 +* @author: AIIT XUOS Lab +* @date: 2023/3/9 +* +*/ + +#ifndef SIGNAL_H +#define SIGNAL_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include + +/* sigev_notify values + NOTE: P1003.1c/D10, p. 34 adds SIGEV_THREAD. */ + +#define SIGEV_NONE 1 /* No asynchronous notification shall be delivered */ + /* when the event of interest occurs. */ +#define SIGEV_SIGNAL 2 /* A queued signal, with an application defined */ + /* value, shall be delivered when the event of */ + /* interest occurs. */ +#define SIGEV_THREAD 3 /* A notification function shall be called to */ + /* perform notification. */ + +/* Signal Generation and Delivery, P1003.1b-1993, p. 63 + NOTE: P1003.1c/D10, p. 34 adds sigev_notify_function and + sigev_notify_attributes to the sigevent structure. */ +union sigval +{ + int sival_int; /* Integer signal value */ + void *sival_ptr; /* Pointer signal value */ +}; + +struct sigevent +{ + int sigev_notify; /* Notification type */ + int sigev_signo; /* Signal number */ + union sigval sigev_value; /* Signal value */ + void (*sigev_notify_function)( union sigval ); + /* Notification function */ + void *sigev_notify_attributes; /* Notification Attributes, really pthread_attr_t */ +}; + +struct siginfo +{ + uint16_t si_signo; + uint16_t si_code; + + union sigval si_value; +}; +typedef struct siginfo siginfo_t; + +#define SI_USER 0x01 /* Signal sent by kill(). */ +#define SI_QUEUE 0x02 /* Signal sent by sigqueue(). */ +#define SI_TIMER 0x03 /* Signal generated by expiration of a timer set by timer_settime(). */ +#define SI_ASYNCIO 0x04 /* Signal generated by completion of an asynchronous I/O request. */ +#define SI_MESGQ 0x05 /* Signal generated by arrival of a message on an empty message queue. */ + +typedef void (*_sig_func_ptr)(int); +typedef unsigned long sigset_t; + +struct sigaction +{ + _sig_func_ptr sa_handler; + sigset_t sa_mask; + int sa_flags; +}; + +/* + * Structure used in sigaltstack call. + */ +typedef struct sigaltstack +{ + void *ss_sp; /* Stack base or pointer. */ + int ss_flags; /* Flags. */ + size_t ss_size; /* Stack size. */ +} stack_t; + +#define SIG_SETMASK 0 /* set mask with sigprocmask() */ +#define SIG_BLOCK 1 /* set of signals to block */ +#define SIG_UNBLOCK 2 /* set of signals to, well, unblock */ + +#define sigaddset(what,sig) (*(what) |= (1<<(sig)), 0) +#define sigdelset(what,sig) (*(what) &= ~(1<<(sig)), 0) +#define sigemptyset(what) (*(what) = 0, 0) +#define sigfillset(what) (*(what) = ~(0), 0) +#define sigismember(what,sig) (((*(what)) & (1<<(sig))) != 0) + +#if defined(__GNUC__) + +#define SIGHUP 1 /* hangup */ +#define SIGINT 2 /* interrupt */ +#define SIGQUIT 3 /* quit */ +#define SIGILL 4 /* illegal instruction (not reset when caught) */ +#define SIGTRAP 5 /* trace trap (not reset when caught) */ +#define SIGIOT 6 /* IOT instruction */ +#define SIGABRT 6 /* used by abort, replace SIGIOT in the future */ +#define SIGEMT 7 /* EMT instruction */ +#define SIGFPE 8 /* floating point exception */ +#define SIGKILL 9 /* kill (cannot be caught or ignored) */ +#define SIGBUS 10 /* bus error */ +#define SIGSEGV 11 /* segmentation violation */ +#define SIGSYS 12 /* bad argument to system call */ +#define SIGPIPE 13 /* write on a pipe with no one to read it */ +#define SIGALRM 14 /* alarm clock */ +#define SIGTERM 15 /* software termination signal from kill */ +#define SIGURG 16 /* urgent condition on IO channel */ +#define SIGSTOP 17 /* sendable stop signal not from tty */ +#define SIGTSTP 18 /* stop signal from tty */ +#define SIGCONT 19 /* continue a stopped process */ +#define SIGCHLD 20 /* to parent on child stop or exit */ +#define SIGCLD 20 /* System V name for SIGCHLD */ +#define SIGTTIN 21 /* to readers pgrp upon background tty read */ +#define SIGTTOU 22 /* like TTIN for output if (tp->t_local<OSTOP) */ +#define SIGIO 23 /* input/output possible signal */ +#define SIGPOLL SIGIO /* System V name for SIGIO */ +#define SIGXCPU 24 /* exceeded CPU time limit */ +#define SIGXFSZ 25 /* exceeded file size limit */ +#define SIGVTALRM 26 /* virtual time alarm */ +#define SIGPROF 27 /* profiling time alarm */ +#define SIGWINCH 28 /* window changed */ +#define SIGLOST 29 /* resource lost (eg, record-lock lost) */ +#define SIGUSR1 30 /* user defined signal 1 */ +#define SIGUSR2 31 /* user defined signal 2 */ +#define NSIG 32 /* signal 0 implied */ + +#endif + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif diff --git a/APP_Framework/Framework/transform_layer/xizi/user_api/posix_support/include/timer.h b/APP_Framework/Framework/transform_layer/xizi/user_api/posix_support/include/timer.h new file mode 100644 index 000000000..91bc76101 --- /dev/null +++ b/APP_Framework/Framework/transform_layer/xizi/user_api/posix_support/include/timer.h @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2020 AIIT XUOS Lab + * XiUOS is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * http://license.coscl.org.cn/MulanPSL2 + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, + * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, + * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ + +/** +* @file: timer.h +* @brief: the function definition of posix soft timer +* @version: 3.0 +* @author: AIIT XUOS Lab +* @date: 2023/3/8 +* +*/ + +#ifndef TIMER_H +#define TIMER_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "../../switch_api/user_api.h" + +#if !defined(LIB_MUSLLIB) +#include "signal.h" +#endif + +#include + +#ifndef TIMER_TRIGGER_ONCE +#define TIMER_TRIGGER_ONCE (1 << 0) +#endif +#ifndef TIMER_TRIGGER_PERIODIC +#define TIMER_TRIGGER_PERIODIC (1 << 1) +#endif + +int timer_create(clockid_t clockid, struct sigevent * evp, timer_t * timerid); +int timer_delete(timer_t timerid); +int timer_settime(timer_t timerid, int flags, const struct itimerspec *restrict value, + struct itimerspec *restrict ovalue); + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif diff --git a/APP_Framework/Framework/transform_layer/xizi/user_api/posix_support/timer.c b/APP_Framework/Framework/transform_layer/xizi/user_api/posix_support/timer.c new file mode 100644 index 000000000..a13523237 --- /dev/null +++ b/APP_Framework/Framework/transform_layer/xizi/user_api/posix_support/timer.c @@ -0,0 +1,123 @@ +/* + * Copyright (c) 2020 AIIT XUOS Lab + * XiUOS is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * http://license.coscl.org.cn/MulanPSL2 + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, + * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, + * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ + +/** +* @file: timer.c +* @brief: posix api of soft timer +* @version: 3.0 +* @author: AIIT XUOS Lab +* @date: 2023/3/8 +* +*/ + +#include +#include +#include "include/timer.h" +#include "include/semaphore.h" +#include "include/pthread.h" + +static sem_t timer_sem; +static pthread_t timer_task; + +struct timer_func { + union sigval value; + int timer_flags; + void (* user_timer_function)(union sigval val); +}; + +struct timer_func g_timer_func; + +static void *timer_callback(void *args) +{ + struct sigevent *evp = (struct sigevent *)args; + + while (1) { + if (g_timer_func.user_timer_function != NULL) { + if (0 == sem_timedwait(&timer_sem, NULL)) { + g_timer_func.user_timer_function(g_timer_func.value); + } + } + } +} + +int timer_create(clockid_t clockid, struct sigevent * evp, timer_t * timerid) +{ + int timer_id; + char timer_name[16]; + + if ((NULL == evp) || (NULL == timerid)) { + errno = EINVAL; + return -1; + } + + /* Only support SIGEV_THREAD. */ + if (evp->sigev_notify != SIGEV_THREAD) { + errno = ENOTSUP; + return -1; + } + + memset(timer_name, 0, sizeof(timer_name)); + snprintf(timer_name, sizeof(timer_name), "timer_%d", clockid); + + sem_init(&timer_sem, 0, 0); + + g_timer_func.value = evp->sigev_value; + g_timer_func.user_timer_function = evp->sigev_notify_function; + g_timer_func.timer_flags = *(int *)(evp->sigev_notify_attributes); + + pthread_attr_t attr; + attr.schedparam.sched_priority = 22; + attr.stacksize = 2048; + + pthread_create(&timer_task, &attr, &timer_callback, (void *)evp); + + timer_id = UserTimerCreate(timer_name, NULL, (void *)&timer_sem, 1000, g_timer_func.timer_flags); + *timerid = timer_id; + return timer_id; +} + +int timer_delete(timer_t timerid) +{ + pthread_kill(timer_task, 0); + + UserTimerQuitRun(timerid); + + sem_destroy(&timer_sem); + + return 0; +} + +int timer_settime(timer_t timerid, int flags, const struct itimerspec *restrict value, + struct itimerspec *restrict ovalue) +{ + if (NULL == value) { + errno = EFAULT; + return -1; + } + + //reference from RTT + /* calculate timer period(tick); To avoid lost of accuracy, because "TICK_PER_SECOND" maybe 100, 1000, 1024 and so on. + * + * tick millisecond millisecond * TICK_PER_SECOND + * ------------------------- = -------------------------- ---> tick = ------------------------------------- + * TICK_PER_SECOND MILLISECOND_PER_SECOND MILLISECOND_PER_SECOND + * + */ + uint32_t ms_value = value->it_interval.tv_nsec / 1000000; + uint32_t ticks = (value->it_interval.tv_sec * TICK_PER_SECOND) + (ms_value * TICK_PER_SECOND) / 1000; + + UserTimerModify(timerid, ticks); + + if (flags) { + UserTimerStartRun(timerid); + } +} diff --git a/APP_Framework/Framework/transform_layer/xizi/user_api/switch_api/Makefile b/APP_Framework/Framework/transform_layer/xizi/user_api/switch_api/Makefile index 02b6b0c75..68a10858a 100644 --- a/APP_Framework/Framework/transform_layer/xizi/user_api/switch_api/Makefile +++ b/APP_Framework/Framework/transform_layer/xizi/user_api/switch_api/Makefile @@ -17,6 +17,10 @@ ifeq ($(CONFIG_SEPARATE_COMPILE),y) SRC_FILES += user_msg.c endif + ifeq ($(CONFIG_KERNEL_SOFTTIMER),y) + SRC_FILES += user_timer.c + endif + ifeq ($(CONFIG_FS_VFS),y) SRC_FILES += user_fs.c endif diff --git a/APP_Framework/Framework/transform_layer/xizi/user_api/switch_api/user_api.h b/APP_Framework/Framework/transform_layer/xizi/user_api/switch_api/user_api.h index c2b3c7c8c..66b77bc97 100644 --- a/APP_Framework/Framework/transform_layer/xizi/user_api/switch_api/user_api.h +++ b/APP_Framework/Framework/transform_layer/xizi/user_api/switch_api/user_api.h @@ -123,6 +123,14 @@ long UserMsgQueueRecv(int32_t mq, void *buffer, size_t size,int32_t wait_time); long UserMsgQueueReinit(int32_t mq); #endif +#ifdef KERNEL_SOFTTIMER +int32_t UserTimerCreate(const char *name, void (*timeout)(void *parameter), void *parameter, uint32_t time, uint8_t trigger_mode); +long UserTimerDelete(int32_t timer_id); +long UserTimerStartRun(int32_t timer_id); +long UserTimerQuitRun(int32_t timer_id); +long UserTimerModify(int32_t timer_id, uint32_t ticks); +#endif + int open(const char *path, int flags, ...); int read(int fd, void *buf, size_t len); int write(int fd, const void *buf, size_t len); @@ -240,6 +248,14 @@ uint8_t UserGetTaskPriority(int32_t id); #define UserMsgQueueReinit KMsgQueueReinit #endif +#ifdef KERNEL_SOFTTIMER +int32_t UserTimerCreate(const char *name, void (*timeout)(void *parameter), void *parameter, uint32_t time, uint8_t trigger_mode); +long UserTimerDelete(int32_t timer_id); +long UserTimerStartRun(int32_t timer_id); +long UserTimerQuitRun(int32_t timer_id); +long UserTimerModify(int32_t timer_id, uint32_t ticks); +#endif + #define UserPrintf KPrintf #endif diff --git a/APP_Framework/Framework/transform_layer/xizi/user_api/switch_api/user_timer.c b/APP_Framework/Framework/transform_layer/xizi/user_api/switch_api/user_timer.c new file mode 100644 index 000000000..3057bde8e --- /dev/null +++ b/APP_Framework/Framework/transform_layer/xizi/user_api/switch_api/user_timer.c @@ -0,0 +1,90 @@ +/* + * Copyright (c) 2020 AIIT XUOS Lab + * XiUOS is licensed under Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * http://license.coscl.org.cn/MulanPSL2 + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, + * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, + * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. + * See the Mulan PSL v2 for more details. + */ + +/** +* @file: user_timer.c +* @brief: the priviate user api of soft timer for application +* @version: 3.0 +* @author: AIIT XUOS Lab +* @date: 2023/3/8 +* +*/ + +#include "user_api.h" + +/** + * This function will create a soft timer. + * + * @param name the name of the timer. + * @param timeout the callback of the timer. + * @param parameter the parameter of the callback function + * @param time the timeout time + * @param trigger_mode the trigger way of the timer + * + * @return id on success;ENOMEMORY/ERROR on failure + */ +int32_t UserTimerCreate(const char *name, + void (*timeout)(void *parameter), + void *parameter, + uint32_t time, + uint8_t trigger_mode) { + return (int32_t)KSwitch5(KS_USER_TIMER_CREATE, (uintptr_t)name, (uintptr_t)timeout, (uintptr_t)parameter, (uintptr_t)time, (uintptr_t)trigger_mode); +} + +/** + * This function will delete a timer. + * + * @param timer_id the id number of timer. + * + * @return EOK on success;EINVALED on failure + * + */ +x_err_t UserTimerDelete(int32_t timer_id) { + return (x_err_t)KSwitch1(KS_USER_TIMER_DELETE, (uintptr_t)timer_id); +} + +/** + * This function will startup a timer. + * + * @param timer_id the id number of timer. + * + * @return EOK on success;EINVALED on failure + * + */ +x_err_t UserTimerStartRun(int32_t timer_id) { + return (x_err_t)KSwitch1(KS_USER_TIMER_STARTRUN, (uintptr_t)timer_id); +} + +/** + * This function will stop a timer. + * + * @param timer_id the id number of timer. + * + * @return EOK on success;EINVALED on failure + * + */ +x_err_t UserTimerQuitRun(int32_t timer_id) { + return (x_err_t)KSwitch1(KS_USER_TIMER_QUITRUN, (uintptr_t)timer_id); +} + +/** + * This function will modify the timeout of a timer. + * + * @param timer_id the id number of timer. + * @param ticks timeout ticks + * + * @return EOK on success;EINVALED on failure + * + */ +x_err_t UserTimerModify(int32_t timer_id, uint32_t ticks) { + return (x_err_t)KSwitch2(KS_USER_TIMER_MODIFY, (uintptr_t)timer_id, (uintptr_t)ticks); +} diff --git a/APP_Framework/lib/Kconfig b/APP_Framework/lib/Kconfig index 1e209d73b..c13ad7a4c 100755 --- a/APP_Framework/lib/Kconfig +++ b/APP_Framework/lib/Kconfig @@ -9,8 +9,9 @@ menu "app lib" config APP_SELECT_OTHER_LIB bool "app select other lib" endchoice - source "$APP_DIR/lib/cJSON/Kconfig" - source "$APP_DIR/lib/queue/Kconfig" - source "$APP_DIR/lib/lvgl/Kconfig" - source "$APP_DIR/lib/embedded_database/Kconfig" + source "$APP_DIR/lib/cJSON/Kconfig" + source "$APP_DIR/lib/queue/Kconfig" + source "$APP_DIR/lib/lvgl/Kconfig" + source "$APP_DIR/lib/embedded_database/Kconfig" + source "$APP_DIR/lib/lorawan/Kconfig" endmenu diff --git a/APP_Framework/lib/Makefile b/APP_Framework/lib/Makefile index 12f2ae7d5..327c69ef2 100644 --- a/APP_Framework/lib/Makefile +++ b/APP_Framework/lib/Makefile @@ -14,4 +14,8 @@ ifeq ($(CONFIG_LIB_USING_CJSON),y) SRC_DIR += cJSON endif +ifeq ($(CONFIG_LIB_USING_LORAWAN),y) + SRC_DIR += lorawan +endif + include $(KERNEL_ROOT)/compiler.mk diff --git a/APP_Framework/lib/cJSON/Kconfig b/APP_Framework/lib/cJSON/Kconfig index 79a2d5892..4246e364e 100644 --- a/APP_Framework/lib/cJSON/Kconfig +++ b/APP_Framework/lib/cJSON/Kconfig @@ -1,3 +1,5 @@ -menuconfig LIB_USING_CJSON - bool "USING cJSON" - default n +menu "lib using cJSON" + menuconfig LIB_USING_CJSON + bool "USING cJSON" + default n +endmenu diff --git a/APP_Framework/lib/embedded_database/Kconfig b/APP_Framework/lib/embedded_database/Kconfig index 83f2c675e..c652d2599 100644 --- a/APP_Framework/lib/embedded_database/Kconfig +++ b/APP_Framework/lib/embedded_database/Kconfig @@ -1,6 +1,10 @@ -menuconfig USING_EMBEDDED_DATABASE - bool "embedded database" - default n -if USING_EMBEDDED_DATABASE - source "$APP_DIR/lib/embedded_database/flashdb/Kconfig" -endif +menu "lib using embedded_database" + + menuconfig USING_EMBEDDED_DATABASE + bool "embedded database" + default n + if USING_EMBEDDED_DATABASE + source "$APP_DIR/lib/embedded_database/flashdb/Kconfig" + endif + +endmenu diff --git a/APP_Framework/lib/lorawan/Kconfig b/APP_Framework/lib/lorawan/Kconfig new file mode 100644 index 000000000..ec6f54332 --- /dev/null +++ b/APP_Framework/lib/lorawan/Kconfig @@ -0,0 +1,30 @@ +menu "lib using LoRaWan" + +menuconfig LIB_USING_LORAWAN + bool "Using LoRaWan lib" + default n + + if LIB_USING_LORAWAN + menuconfig LIB_USING_LORAWAN_ED_STACK + help + Please add "source "$APP_DIR/lib/lorawan/lorawan_devicenode/Kconfig"" when using lorawan_devicenode + bool "LoRaWan using lorawan_ed_stack lib" + default n + select LIB_USING_LORA_RADIO + + if LIB_USING_LORAWAN_ED_STACK + + endif + + menuconfig LIB_USING_LORA_RADIO + help + Please add "source "$APP_DIR/lib/lorawan/lora_radio_driver/Kconfig"" when using lora_radio_driver + bool "LoRaWan using lora-radio-driver lib" + default n + + if LIB_USING_LORA_RADIO + + endif + endif + +endmenu diff --git a/APP_Framework/lib/lorawan/Makefile b/APP_Framework/lib/lorawan/Makefile new file mode 100644 index 000000000..dd6c0721f --- /dev/null +++ b/APP_Framework/lib/lorawan/Makefile @@ -0,0 +1,11 @@ +SRC_DIR := + +ifeq ($(CONFIG_LIB_USING_LORA_RADIO),y) + SRC_DIR += lora_radio_driver +endif + +ifeq ($(CONFIG_LIB_USING_LORAWAN_ED_STACK),y) + SRC_DIR += lorawan_devicenode +endif + +include $(KERNEL_ROOT)/compiler.mk diff --git a/APP_Framework/lib/lorawan/README.md b/APP_Framework/lib/lorawan/README.md new file mode 100644 index 000000000..7fb6c76e2 --- /dev/null +++ b/APP_Framework/lib/lorawan/README.md @@ -0,0 +1,47 @@ +# lorawan子模块调试说明 + +矽璓工业物联操作系统XiUOS目前支持lorawan相关开源库,通过子模块形式管理,该目录主要内容是包含**lora_radio_driver**、**lorawan_devicenode**等。 + +## 目录内容 + +``` +xiuos/APP_Framework/lib/lorawan + ├── README.md + ├── lora_radio_driver lora_radio驱动库 + ├── lorawan_devicenode lorawan节点协议栈 + ├── Kconfig lorawan Kconfig配置 + └── Makefile lorawan Makefile +``` + +## 使用 + +使用前执行以下操作: + +``` +# 下载代码 +# 进入APP_Framework/lib/lorawan目录下载更新子模块 +git submodule init +git submodule update APP_Framework/lib/lorawan/lora_radio_driver +git submodule update APP_Framework/lib/lorawan/lorawan_devicenode + +# 进入 APP_Framework/lib/lorawan/Kconfig 配置,增加子模块source路径 +menuconfig LIB_USING_LORAWAN_ED_STACK + bool "LoRaWan using lorawan_ed_stack lib" + default n + select LIB_USING_LORA_RADIO + +if LIB_USING_LORAWAN_ED_STACK + source "$APP_DIR/lib/lorawan/lorawan_devicenode/Kconfig" +endif + +menuconfig LIB_USING_LORA_RADIO + bool "LoRaWan using lora-radio-driver lib" + default n + +if LIB_USING_LORA_RADIO + source "$APP_DIR/lib/lorawan/lora_radio_driver/Kconfig" +endif + +#编译对应OS即可 +``` + diff --git a/APP_Framework/lib/lorawan/lora_radio_driver b/APP_Framework/lib/lorawan/lora_radio_driver new file mode 160000 index 000000000..bc03d64f4 --- /dev/null +++ b/APP_Framework/lib/lorawan/lora_radio_driver @@ -0,0 +1 @@ +Subproject commit bc03d64f4b7408f85512735064dc5569431d6c8d diff --git a/APP_Framework/lib/lorawan/lorawan_devicenode b/APP_Framework/lib/lorawan/lorawan_devicenode new file mode 160000 index 000000000..2896d7234 --- /dev/null +++ b/APP_Framework/lib/lorawan/lorawan_devicenode @@ -0,0 +1 @@ +Subproject commit 2896d7234688de77992e7e1872a7e67a9456b420 diff --git a/APP_Framework/lib/lvgl/Kconfig b/APP_Framework/lib/lvgl/Kconfig index 856f00324..de80e1c88 100644 --- a/APP_Framework/lib/lvgl/Kconfig +++ b/APP_Framework/lib/lvgl/Kconfig @@ -1,866 +1,870 @@ # Kconfig file for LVGL v8.0 -menuconfig LIB_LV - bool "Enable LittleVGL " - default n +menu "lib using LVGL" - menu "LVGL configuration" - config LV_CONF_MINIMAL - bool "LVGL minimal configuration." - default n - endmenu + menuconfig LIB_LV + bool "Enable LittleVGL " + default n -if 0 - menu "LVGL configuration" - - # Define CONFIG_LV_CONF_SKIP so we can use LVGL - # without lv_conf.h file, the lv_conf_internal.h and - # lv_conf_kconfig.h files are used instead. - config LV_CONF_SKIP - bool - default n - - config LV_CONF_MINIMAL - bool "LVGL minimal configuration." - - menu "Color settings" - choice - prompt "Color depth." - default LV_COLOR_DEPTH_16 - help - Color depth to be used. - - config LV_COLOR_DEPTH_32 - bool "32: ARGB8888" - config LV_COLOR_DEPTH_16 - bool "16: RGB565" - config LV_COLOR_DEPTH_8 - bool "8: RGB232" - config LV_COLOR_DEPTH_1 - bool "1: 1 byte per pixel" - endchoice - - config LV_COLOR_DEPTH - int - default 1 if LV_COLOR_DEPTH_1 - default 8 if LV_COLOR_DEPTH_8 - default 16 if LV_COLOR_DEPTH_16 - default 32 if LV_COLOR_DEPTH_32 - - config LV_COLOR_16_SWAP - bool "Swap the 2 bytes of RGB565 color. Useful if the display has an 8-bit interface (e.g. SPI)." - depends on LV_COLOR_DEPTH_16 - - config LV_COLOR_SCREEN_TRANSP - bool "Enable more complex drawing routines to manage screens transparency." - depends on LV_COLOR_DEPTH_32 - help - Can be used if the UI is above another layer, e.g. an OSD menu or video player. - Requires `LV_COLOR_DEPTH = 32` colors and the screen's `bg_opa` should be set to - non LV_OPA_COVER value - - config LV_COLOR_MIX_ROUND_OFS - int "Adjust color mix functions rounding" - default 128 if !LV_COLOR_DEPTH_32 - default 0 if LV_COLOR_DEPTH_32 - range 0 254 - help - 0: no adjustment, get the integer part of the result (round down) - 64: round up from x.75 - 128: round up from half - 192: round up from x.25 - 254: round up - - config LV_COLOR_CHROMA_KEY_HEX - hex "Images pixels with this color will not be drawn (if they are chroma keyed)." - range 0x000000 0xFFFFFF - default 0x00FF00 - help - See misc/lv_color.h for some color values examples. - endmenu - - menu "Memory settings" - config LV_MEM_CUSTOM - bool "If true use custom malloc/free, otherwise use the built-in `lv_mem_alloc()` and `lv_mem_free()`" - - config LV_MEM_SIZE_KILOBYTES - int "Size of the memory used by `lv_mem_alloc` in kilobytes (>= 2kB)" - range 2 128 - default 32 - depends on !LV_MEM_CUSTOM - - config LV_MEM_ADDR - hex "Address for the memory pool instead of allocating it as a normal array" - default 0x0 - depends on !LV_MEM_CUSTOM - - config LV_MEM_CUSTOM_INCLUDE - string "Header to include for the custom memory function" - default "stdlib.h" - depends on LV_MEM_CUSTOM - - config LV_MEM_BUF_MAX_NUM - int "Number of the memory buffer" - default 16 - help - Number of the intermediate memory buffer used during rendering and other - internal processing mechanisms. You will see an error log message if - there wasn't enough buffers. - - config LV_MEMCPY_MEMSET_STD - bool "Use the standard memcpy and memset instead of LVGL's own functions" - endmenu - - menu "HAL Settings" - config LV_DISP_DEF_REFR_PERIOD - int "Default display refresh period (ms)." - default 30 - help - Can be changed in the display driver (`lv_disp_drv_t`). - - config LV_INDEV_DEF_READ_PERIOD - int "Input device read period [ms]." - default 30 - - config LV_TICK_CUSTOM - bool "Use a custom tick source" - - config LV_TICK_CUSTOM_INCLUDE - string "Header for the system time function" - default "Arduino.h" - depends on LV_TICK_CUSTOM - - config LV_DPI_DEF - int "Default Dots Per Inch (in px)." - default 130 - help - Used to initialize default sizes such as widgets sized, style paddings. - (Not so important, you can adjust it to modify default sizes and spaces) - endmenu - - menu "Feature configuration" - - menu "Drawing" - config LV_DRAW_COMPLEX - bool "Enable complex draw engine" - default y - help - Required to draw shadow, gradient, rounded corners, circles, arc, skew lines, - image transformations or any masks. - - config LV_SHADOW_CACHE_SIZE - int "Allow buffering some shadow calculation" - depends on LV_DRAW_COMPLEX - default 0 - help - LV_SHADOW_CACHE_SIZE is the max shadow size to buffer, where - shadow size is `shadow_width + radius`. - Caching has LV_SHADOW_CACHE_SIZE^2 RAM cost. - - config LV_CIRCLE_CACHE_SIZE - int "Set number of maximally cached circle data" - depends on LV_DRAW_COMPLEX - default 4 - help - The circumference of 1/4 circle are saved for anti-aliasing - radius * 4 bytes are used per circle (the most often used - radiuses are saved). - Set to 0 to disable caching. - - config LV_IMG_CACHE_DEF_SIZE - int "Default image cache size. 0 to disable caching." - default 0 - help - If only the built-in image formats are used there is no real advantage of caching. - (I.e. no new image decoder is added). - - With complex image decoders (e.g. PNG or JPG) caching can - save the continuous open/decode of images. - However the opened images might consume additional RAM. - - config LV_DISP_ROT_MAX_BUF - int "Maximum buffer size to allocate for rotation" - default 10240 - help - Only used if software rotation is enabled in the display driver. - endmenu - - menu "GPU" - config LV_USE_EXTERNAL_RENDERER - bool - - config LV_USE_GPU_STM32_DMA2D - bool "Enable STM32 DMA2D (aka Chrom Art) GPU." - config LV_GPU_DMA2D_CMSIS_INCLUDE - string "include path of CMSIS header of target processor" - depends on LV_USE_GPU_STM32_DMA2D - default "" - help - Must be defined to include path of CMSIS header of target processor - e.g. "stm32f769xx.h" or "stm32f429xx.h" - - config LV_USE_GPU_NXP_PXP - bool "Use NXP's PXP GPU iMX RTxxx platforms." - config LV_USE_GPU_NXP_PXP_AUTO_INIT - bool "Call lv_gpu_nxp_pxp_init() automatically or manually." - depends on LV_USE_GPU_NXP_PXP - help - 1: Add default bare metal and FreeRTOS interrupt handling - routines for PXP (lv_gpu_nxp_pxp_osa.c) and call - lv_gpu_nxp_pxp_init() automatically during lv_init(). - Note that symbol SDK_OS_FREE_RTOS has to be defined in order - to use FreeRTOS OSA, otherwise bare-metal implementation is - selected. - 0: lv_gpu_nxp_pxp_init() has to be called manually before - lv_init(). - - config LV_USE_GPU_NXP_VG_LITE - bool "Use NXP's VG-Lite GPU iMX RTxxx platforms." - - config LV_USE_GPU_SDL - bool "Use SDL renderer API" - select LV_USE_EXTERNAL_RENDERER + if LIB_LV + config LV_CONF_MINIMAL + bool "LVGL minimal configuration." default n - config LV_GPU_SDL_INCLUDE_PATH - string "include path of SDL header" - depends on LV_USE_GPU_SDL - default "SDL2/SDL.h" - endmenu + endif - menu "Logging" - config LV_USE_LOG - bool "Enable the log module" + if 0 + menu "LVGL configuration" + # Define CONFIG_LV_CONF_SKIP so we can use LVGL + # without lv_conf.h file, the lv_conf_internal.h and + # lv_conf_kconfig.h files are used instead. + config LV_CONF_SKIP + bool + default n + + config LV_CONF_MINIMAL + bool "LVGL minimal configuration." + + menu "Color settings" choice - bool "Default log verbosity" if LV_USE_LOG - default LV_LOG_LEVEL_WARN + prompt "Color depth." + default LV_COLOR_DEPTH_16 help - Specify how important log should be added. + Color depth to be used. - config LV_LOG_LEVEL_TRACE - bool "A lot of logs to give detailed information" - config LV_LOG_LEVEL_INFO - bool "Log important events" - config LV_LOG_LEVEL_WARN - bool "Log if something unwanted happened but didn't cause a problem" - config LV_LOG_LEVEL_ERROR - bool "Only critical issues, when the system may fail" - config LV_LOG_LEVEL_USER - bool "Only logs added by the user" - config LV_LOG_LEVEL_NONE - bool "Do not log anything" + config LV_COLOR_DEPTH_32 + bool "32: ARGB8888" + config LV_COLOR_DEPTH_16 + bool "16: RGB565" + config LV_COLOR_DEPTH_8 + bool "8: RGB232" + config LV_COLOR_DEPTH_1 + bool "1: 1 byte per pixel" endchoice - config LV_LOG_LEVEL + config LV_COLOR_DEPTH int - default 0 if LV_LOG_LEVEL_TRACE - default 1 if LV_LOG_LEVEL_INFO - default 2 if LV_LOG_LEVEL_WARN - default 3 if LV_LOG_LEVEL_ERROR - default 4 if LV_LOG_LEVEL_USER - default 5 if LV_LOG_LEVEL_NONE + default 1 if LV_COLOR_DEPTH_1 + default 8 if LV_COLOR_DEPTH_8 + default 16 if LV_COLOR_DEPTH_16 + default 32 if LV_COLOR_DEPTH_32 - config LV_LOG_PRINTF - bool "Print the log with 'printf'" if LV_USE_LOG + config LV_COLOR_16_SWAP + bool "Swap the 2 bytes of RGB565 color. Useful if the display has an 8-bit interface (e.g. SPI)." + depends on LV_COLOR_DEPTH_16 + + config LV_COLOR_SCREEN_TRANSP + bool "Enable more complex drawing routines to manage screens transparency." + depends on LV_COLOR_DEPTH_32 help - Use printf for log output. - If not set the user needs to register a callback with `lv_log_register_print_cb`. + Can be used if the UI is above another layer, e.g. an OSD menu or video player. + Requires `LV_COLOR_DEPTH = 32` colors and the screen's `bg_opa` should be set to + non LV_OPA_COVER value - config LV_LOG_TRACE_MEM - bool "Enable/Disable LV_LOG_TRACE in mem module" - default y - depends on LV_USE_LOG + config LV_COLOR_MIX_ROUND_OFS + int "Adjust color mix functions rounding" + default 128 if !LV_COLOR_DEPTH_32 + default 0 if LV_COLOR_DEPTH_32 + range 0 254 + help + 0: no adjustment, get the integer part of the result (round down) + 64: round up from x.75 + 128: round up from half + 192: round up from x.25 + 254: round up - config LV_LOG_TRACE_TIMER - bool "Enable/Disable LV_LOG_TRACE in timer module" - default y - depends on LV_USE_LOG - - config LV_LOG_TRACE_INDEV - bool "Enable/Disable LV_LOG_TRACE in indev module" - default y - depends on LV_USE_LOG - - config LV_LOG_TRACE_DISP_REFR - bool "Enable/Disable LV_LOG_TRACE in disp refr module" - default y - depends on LV_USE_LOG - - config LV_LOG_TRACE_EVENT - bool "Enable/Disable LV_LOG_TRACE in event module" - default y - depends on LV_USE_LOG - - config LV_LOG_TRACE_OBJ_CREATE - bool "Enable/Disable LV_LOG_TRACE in obj create module" - default y - depends on LV_USE_LOG - - config LV_LOG_TRACE_LAYOUT - bool "Enable/Disable LV_LOG_TRACE in layout module" - default y - depends on LV_USE_LOG - - config LV_LOG_TRACE_ANIM - bool "Enable/Disable LV_LOG_TRACE in anim module" - default y - depends on LV_USE_LOG + config LV_COLOR_CHROMA_KEY_HEX + hex "Images pixels with this color will not be drawn (if they are chroma keyed)." + range 0x000000 0xFFFFFF + default 0x00FF00 + help + See misc/lv_color.h for some color values examples. endmenu - menu "Asserts" - config LV_USE_ASSERT_NULL - bool "Check if the parameter is NULL. (Very fast, recommended)" + menu "Memory settings" + config LV_MEM_CUSTOM + bool "If true use custom malloc/free, otherwise use the built-in `lv_mem_alloc()` and `lv_mem_free()`" + + config LV_MEM_SIZE_KILOBYTES + int "Size of the memory used by `lv_mem_alloc` in kilobytes (>= 2kB)" + range 2 128 + default 32 + depends on !LV_MEM_CUSTOM + + config LV_MEM_ADDR + hex "Address for the memory pool instead of allocating it as a normal array" + default 0x0 + depends on !LV_MEM_CUSTOM + + config LV_MEM_CUSTOM_INCLUDE + string "Header to include for the custom memory function" + default "stdlib.h" + depends on LV_MEM_CUSTOM + + config LV_MEM_BUF_MAX_NUM + int "Number of the memory buffer" + default 16 + help + Number of the intermediate memory buffer used during rendering and other + internal processing mechanisms. You will see an error log message if + there wasn't enough buffers. + + config LV_MEMCPY_MEMSET_STD + bool "Use the standard memcpy and memset instead of LVGL's own functions" + endmenu + + menu "HAL Settings" + config LV_DISP_DEF_REFR_PERIOD + int "Default display refresh period (ms)." + default 30 + help + Can be changed in the display driver (`lv_disp_drv_t`). + + config LV_INDEV_DEF_READ_PERIOD + int "Input device read period [ms]." + default 30 + + config LV_TICK_CUSTOM + bool "Use a custom tick source" + + config LV_TICK_CUSTOM_INCLUDE + string "Header for the system time function" + default "Arduino.h" + depends on LV_TICK_CUSTOM + + config LV_DPI_DEF + int "Default Dots Per Inch (in px)." + default 130 + help + Used to initialize default sizes such as widgets sized, style paddings. + (Not so important, you can adjust it to modify default sizes and spaces) + endmenu + + menu "Feature configuration" + + menu "Drawing" + config LV_DRAW_COMPLEX + bool "Enable complex draw engine" + default y + help + Required to draw shadow, gradient, rounded corners, circles, arc, skew lines, + image transformations or any masks. + + config LV_SHADOW_CACHE_SIZE + int "Allow buffering some shadow calculation" + depends on LV_DRAW_COMPLEX + default 0 + help + LV_SHADOW_CACHE_SIZE is the max shadow size to buffer, where + shadow size is `shadow_width + radius`. + Caching has LV_SHADOW_CACHE_SIZE^2 RAM cost. + + config LV_CIRCLE_CACHE_SIZE + int "Set number of maximally cached circle data" + depends on LV_DRAW_COMPLEX + default 4 + help + The circumference of 1/4 circle are saved for anti-aliasing + radius * 4 bytes are used per circle (the most often used + radiuses are saved). + Set to 0 to disable caching. + + config LV_IMG_CACHE_DEF_SIZE + int "Default image cache size. 0 to disable caching." + default 0 + help + If only the built-in image formats are used there is no real advantage of caching. + (I.e. no new image decoder is added). + + With complex image decoders (e.g. PNG or JPG) caching can + save the continuous open/decode of images. + However the opened images might consume additional RAM. + + config LV_DISP_ROT_MAX_BUF + int "Maximum buffer size to allocate for rotation" + default 10240 + help + Only used if software rotation is enabled in the display driver. + endmenu + + menu "GPU" + config LV_USE_EXTERNAL_RENDERER + bool + + config LV_USE_GPU_STM32_DMA2D + bool "Enable STM32 DMA2D (aka Chrom Art) GPU." + config LV_GPU_DMA2D_CMSIS_INCLUDE + string "include path of CMSIS header of target processor" + depends on LV_USE_GPU_STM32_DMA2D + default "" + help + Must be defined to include path of CMSIS header of target processor + e.g. "stm32f769xx.h" or "stm32f429xx.h" + + config LV_USE_GPU_NXP_PXP + bool "Use NXP's PXP GPU iMX RTxxx platforms." + config LV_USE_GPU_NXP_PXP_AUTO_INIT + bool "Call lv_gpu_nxp_pxp_init() automatically or manually." + depends on LV_USE_GPU_NXP_PXP + help + 1: Add default bare metal and FreeRTOS interrupt handling + routines for PXP (lv_gpu_nxp_pxp_osa.c) and call + lv_gpu_nxp_pxp_init() automatically during lv_init(). + Note that symbol SDK_OS_FREE_RTOS has to be defined in order + to use FreeRTOS OSA, otherwise bare-metal implementation is + selected. + 0: lv_gpu_nxp_pxp_init() has to be called manually before + lv_init(). + + config LV_USE_GPU_NXP_VG_LITE + bool "Use NXP's VG-Lite GPU iMX RTxxx platforms." + + config LV_USE_GPU_SDL + bool "Use SDL renderer API" + select LV_USE_EXTERNAL_RENDERER + default n + config LV_GPU_SDL_INCLUDE_PATH + string "include path of SDL header" + depends on LV_USE_GPU_SDL + default "SDL2/SDL.h" + endmenu + + menu "Logging" + config LV_USE_LOG + bool "Enable the log module" + + choice + bool "Default log verbosity" if LV_USE_LOG + default LV_LOG_LEVEL_WARN + help + Specify how important log should be added. + + config LV_LOG_LEVEL_TRACE + bool "A lot of logs to give detailed information" + config LV_LOG_LEVEL_INFO + bool "Log important events" + config LV_LOG_LEVEL_WARN + bool "Log if something unwanted happened but didn't cause a problem" + config LV_LOG_LEVEL_ERROR + bool "Only critical issues, when the system may fail" + config LV_LOG_LEVEL_USER + bool "Only logs added by the user" + config LV_LOG_LEVEL_NONE + bool "Do not log anything" + endchoice + + config LV_LOG_LEVEL + int + default 0 if LV_LOG_LEVEL_TRACE + default 1 if LV_LOG_LEVEL_INFO + default 2 if LV_LOG_LEVEL_WARN + default 3 if LV_LOG_LEVEL_ERROR + default 4 if LV_LOG_LEVEL_USER + default 5 if LV_LOG_LEVEL_NONE + + config LV_LOG_PRINTF + bool "Print the log with 'printf'" if LV_USE_LOG + help + Use printf for log output. + If not set the user needs to register a callback with `lv_log_register_print_cb`. + + config LV_LOG_TRACE_MEM + bool "Enable/Disable LV_LOG_TRACE in mem module" + default y + depends on LV_USE_LOG + + config LV_LOG_TRACE_TIMER + bool "Enable/Disable LV_LOG_TRACE in timer module" + default y + depends on LV_USE_LOG + + config LV_LOG_TRACE_INDEV + bool "Enable/Disable LV_LOG_TRACE in indev module" + default y + depends on LV_USE_LOG + + config LV_LOG_TRACE_DISP_REFR + bool "Enable/Disable LV_LOG_TRACE in disp refr module" + default y + depends on LV_USE_LOG + + config LV_LOG_TRACE_EVENT + bool "Enable/Disable LV_LOG_TRACE in event module" + default y + depends on LV_USE_LOG + + config LV_LOG_TRACE_OBJ_CREATE + bool "Enable/Disable LV_LOG_TRACE in obj create module" + default y + depends on LV_USE_LOG + + config LV_LOG_TRACE_LAYOUT + bool "Enable/Disable LV_LOG_TRACE in layout module" + default y + depends on LV_USE_LOG + + config LV_LOG_TRACE_ANIM + bool "Enable/Disable LV_LOG_TRACE in anim module" + default y + depends on LV_USE_LOG + endmenu + + menu "Asserts" + config LV_USE_ASSERT_NULL + bool "Check if the parameter is NULL. (Very fast, recommended)" + default y if !LV_CONF_MINIMAL + + config LV_USE_ASSERT_MALLOC + bool "Checks if the memory is successfully allocated or no. (Very fast, recommended)" + default y if !LV_CONF_MINIMAL + + config LV_USE_ASSERT_STYLE + bool "Check if the styles are properly initialized. (Very fast, recommended)" + + config LV_USE_ASSERT_MEM_INTEGRITY + bool "Check the integrity of `lv_mem` after critical operations. (Slow)" + + config LV_USE_ASSERT_OBJ + bool "Check NULL, the object's type and existence (e.g. not deleted). (Slow)." + + config LV_ASSERT_HANDLER_INCLUDE + string "Header to include for the custom assert function" + default "assert.h" + endmenu + + menu "Others" + config LV_USE_PERF_MONITOR + bool "Show CPU usage and FPS count in the right bottom corner." + + config LV_USE_MEM_MONITOR + bool "Show the used memory and the memory fragmentation in the left bottom corner." + depends on !LV_MEM_CUSTOM + + config LV_USE_REFR_DEBUG + bool "Draw random colored rectangles over the redrawn areas." + + config LV_SPRINTF_CUSTOM + bool "Change the built-in (v)snprintf functions" + + config LV_SPRINTF_INCLUDE + string "Header to include for the custom sprintf function" + depends on LV_SPRINTF_CUSTOM + default "stdio.h" + + config LV_SPRINTF_USE_FLOAT + bool "Enable float in built-in (v)snprintf functions" + depends on !LV_SPRINTF_CUSTOM + + config LV_USE_USER_DATA + bool "Add a 'user_data' to drivers and objects." + default y + + config LV_ENABLE_GC + bool "Enable garbage collector" + + config LV_GC_INCLUDE + string "Header to include for the garbage collector related things" + depends on LV_ENABLE_GC + default "gc.h" + endmenu + + menu "Compiler settings" + config LV_BIG_ENDIAN_SYSTEM + bool "For big endian systems set to 1" + + config LV_ATTRIBUTE_MEM_ALIGN_SIZE + int "Required alignment size for buffers" + default 1 + + config LV_ATTRIBUTE_FAST_MEM_USE_IRAM + bool "Set IRAM as LV_ATTRIBUTE_FAST_MEM" + help + Set this option to configure IRAM as LV_ATTRIBUTE_FAST_MEM + + config LV_USE_LARGE_COORD + bool "Extend the default -32k..32k coordinate range to -4M..4M by using int32_t for coordinates instead of int16_t" + endmenu + endmenu + + menu "Font usage" + menu "Enable built-in fonts" + config LV_FONT_MONTSERRAT_8 + bool "Enable Montserrat 8" + config LV_FONT_MONTSERRAT_10 + bool "Enable Montserrat 10" + config LV_FONT_MONTSERRAT_12 + bool "Enable Montserrat 12" + config LV_FONT_MONTSERRAT_14 + bool "Enable Montserrat 14" + default y if !LV_CONF_MINIMAL + config LV_FONT_MONTSERRAT_16 + bool "Enable Montserrat 16" + config LV_FONT_MONTSERRAT_18 + bool "Enable Montserrat 18" + config LV_FONT_MONTSERRAT_20 + bool "Enable Montserrat 20" + config LV_FONT_MONTSERRAT_22 + bool "Enable Montserrat 22" + config LV_FONT_MONTSERRAT_24 + bool "Enable Montserrat 24" + config LV_FONT_MONTSERRAT_26 + bool "Enable Montserrat 26" + config LV_FONT_MONTSERRAT_28 + bool "Enable Montserrat 28" + config LV_FONT_MONTSERRAT_30 + bool "Enable Montserrat 30" + config LV_FONT_MONTSERRAT_32 + bool "Enable Montserrat 32" + config LV_FONT_MONTSERRAT_34 + bool "Enable Montserrat 34" + config LV_FONT_MONTSERRAT_36 + bool "Enable Montserrat 36" + config LV_FONT_MONTSERRAT_38 + bool "Enable Montserrat 38" + config LV_FONT_MONTSERRAT_40 + bool "Enable Montserrat 40" + config LV_FONT_MONTSERRAT_42 + bool "Enable Montserrat 42" + config LV_FONT_MONTSERRAT_44 + bool "Enable Montserrat 44" + config LV_FONT_MONTSERRAT_46 + bool "Enable Montserrat 46" + config LV_FONT_MONTSERRAT_48 + bool "Enable Montserrat 48" + + config LV_FONT_MONTSERRAT_12_SUBPX + bool "Enable Montserrat 12 sub-pixel" + config LV_FONT_MONTSERRAT_28_COMPRESSED + bool "Enable Montserrat 28 compressed" + config LV_FONT_DEJAVU_16_PERSIAN_HEBREW + bool "Enable Dejavu 16 Persian, Hebrew, Arabic letters" + config LV_FONT_SIMSUN_16_CJK + bool "Enable Simsun 16 CJK" + + config LV_FONT_UNSCII_8 + bool "Enable UNSCII 8 (Perfect monospace font)" + default y if LV_CONF_MINIMAL + config LV_FONT_UNSCII_16 + bool "Enable UNSCII 16 (Perfect monospace font)" + + config LV_FONT_CUSTOM + bool "Enable the custom font" + config LV_FONT_CUSTOM_DECLARE + string "Header to include for the custom font" + depends on LV_FONT_CUSTOM + endmenu + + choice LV_FONT_DEFAULT + prompt "Select theme default title font" + default LV_FONT_DEFAULT_MONTSERRAT_14 if !LV_CONF_MINIMAL + default LV_FONT_DEFAULT_UNSCII_8 if LV_CONF_MINIMAL + help + Select theme default title font + + config LV_FONT_DEFAULT_MONTSERRAT_8 + bool "Montserrat 8" + select LV_FONT_MONTSERRAT_8 + config LV_FONT_DEFAULT_MONTSERRAT_12 + bool "Montserrat 12" + select LV_FONT_MONTSERRAT_12 + config LV_FONT_DEFAULT_MONTSERRAT_14 + bool "Montserrat 14" + select LV_FONT_MONTSERRAT_14 + config LV_FONT_DEFAULT_MONTSERRAT_16 + bool "Montserrat 16" + select LV_FONT_MONTSERRAT_16 + config LV_FONT_DEFAULT_MONTSERRAT_18 + bool "Montserrat 18" + select LV_FONT_MONTSERRAT_18 + config LV_FONT_DEFAULT_MONTSERRAT_20 + bool "Montserrat 20" + select LV_FONT_MONTSERRAT_20 + config LV_FONT_DEFAULT_MONTSERRAT_22 + bool "Montserrat 22" + select LV_FONT_MONTSERRAT_22 + config LV_FONT_DEFAULT_MONTSERRAT_24 + bool "Montserrat 24" + select LV_FONT_MONTSERRAT_24 + config LV_FONT_DEFAULT_MONTSERRAT_26 + bool "Montserrat 26" + select LV_FONT_MONTSERRAT_26 + config LV_FONT_DEFAULT_MONTSERRAT_28 + bool "Montserrat 28" + select LV_FONT_MONTSERRAT_28 + config LV_FONT_DEFAULT_MONTSERRAT_30 + bool "Montserrat 30" + select LV_FONT_MONTSERRAT_30 + config LV_FONT_DEFAULT_MONTSERRAT_32 + bool "Montserrat 32" + select LV_FONT_MONTSERRAT_32 + config LV_FONT_DEFAULT_MONTSERRAT_34 + bool "Montserrat 34" + select LV_FONT_MONTSERRAT_34 + config LV_FONT_DEFAULT_MONTSERRAT_36 + bool "Montserrat 36" + select LV_FONT_MONTSERRAT_36 + config LV_FONT_DEFAULT_MONTSERRAT_38 + bool "Montserrat 38" + select LV_FONT_MONTSERRAT_38 + config LV_FONT_DEFAULT_MONTSERRAT_40 + bool "Montserrat 40" + select LV_FONT_MONTSERRAT_40 + config LV_FONT_DEFAULT_MONTSERRAT_42 + bool "Montserrat 42" + select LV_FONT_MONTSERRAT_42 + config LV_FONT_DEFAULT_MONTSERRAT_44 + bool "Montserrat 44" + select LV_FONT_MONTSERRAT_44 + config LV_FONT_DEFAULT_MONTSERRAT_46 + bool "Montserrat 46" + select LV_FONT_MONTSERRAT_46 + config LV_FONT_DEFAULT_MONTSERRAT_48 + bool "Montserrat 48" + select LV_FONT_MONTSERRAT_48 + config LV_FONT_DEFAULT_MONTSERRAT_12_SUBPX + bool "Montserrat 12 sub-pixel" + select LV_FONT_MONTSERRAT_12_SUBPX + config LV_FONT_DEFAULT_MONTSERRAT_28_COMPRESSED + bool "Montserrat 28 compressed" + select LV_FONT_MONTSERRAT_28_COMPRESSED + config LV_FONT_DEFAULT_DEJAVU_16_PERSIAN_HEBREW + bool "Dejavu 16 Persian, Hebrew, Arabic letters" + select LV_FONT_DEJAVU_16_PERSIAN_HEBREW + config LV_FONT_DEFAULT_SIMSUN_16_CJK + bool "Simsun 16 CJK" + select LV_FONT_SIMSUN_16_CJK + config LV_FONT_DEFAULT_UNSCII_8 + bool "UNSCII 8 (Perfect monospace font)" + select LV_FONT_UNSCII_8 + config LV_FONT_DEFAULT_UNSCII_16 + bool "UNSCII 16 (Perfect monospace font)" + select LV_FONT_UNSCII_16 + endchoice + + config LV_FONT_FMT_TXT_LARGE + bool "Enable it if you have fonts with a lot of characters." + help + The limit depends on the font size, font face and bpp + but with > 10,000 characters if you see issues probably you + need to enable it. + + config LV_USE_FONT_COMPRESSED + bool "Sets support for compressed fonts." + + config LV_USE_FONT_SUBPX + bool "Enable subpixel rendering." + + config LV_FONT_SUBPX_BGR + bool "Use BGR instead RGB for sub-pixel rendering." + depends on LV_USE_FONT_SUBPX + help + Set the pixel order of the display. + Important only if "subpx fonts" are used. + With "normal" font it doesn't matter. + endmenu + + menu "Text Settings" + choice LV_TXT_ENC + prompt "Select a character encoding for strings" + help + Select a character encoding for strings. Your IDE or editor should have the same character encoding. + default LV_TXT_ENC_UTF8 if !LV_CONF_MINIMAL + default LV_TXT_ENC_ASCII if LV_CONF_MINIMAL + + config LV_TXT_ENC_UTF8 + bool "UTF8" + config LV_TXT_ENC_ASCII + bool "ASCII" + endchoice + + config LV_TXT_BREAK_CHARS + string "Can break (wrap) texts on these chars" + default " ,.;:-_" + + config LV_TXT_LINE_BREAK_LONG_LEN + int "Line break long length" + default 0 + help + If a word is at least this long, will break wherever 'prettiest'. + To disable, set to a value <= 0. + + config LV_TXT_LINE_BREAK_LONG_PRE_MIN_LEN + int "Min num chars before break" + default 3 + depends on LV_TXT_LINE_BREAK_LONG_LEN > 0 + help + Minimum number of characters in a long word to put on a line before a break. + + config LV_TXT_LINE_BREAK_LONG_POST_MIN_LEN + int "Min num chars after break" + default 3 + depends on LV_TXT_LINE_BREAK_LONG_LEN > 0 + help + Minimum number of characters in a long word to put on a line after a break. + + config LV_TXT_COLOR_CMD + string "The control character to use for signalling text recoloring" + default "#" + + config LV_USE_BIDI + bool "Support bidirectional texts" + help + Allows mixing Left-to-Right and Right-to-Left texts. + The direction will be processed according to the Unicode Bidirectional Algorithm: + https://www.w3.org/International/articles/inline-bidi-markup/uba-basics + + choice + prompt "Set the default BIDI direction" + default LV_BIDI_DIR_AUTO + depends on LV_USE_BIDI + + config LV_BIDI_DIR_LTR + bool "Left-to-Right" + config LV_BIDI_DIR_RTL + bool "Right-to-Left" + config LV_BIDI_DIR_AUTO + bool "Detect texts base direction" + endchoice + + config LV_USE_ARABIC_PERSIAN_CHARS + bool "Enable Arabic/Persian processing" + help + In these languages characters should be replaced with + an other form based on their position in the text. + endmenu + + menu "Widget usage" + config LV_USE_ARC + bool "Arc." default y if !LV_CONF_MINIMAL - - config LV_USE_ASSERT_MALLOC - bool "Checks if the memory is successfully allocated or no. (Very fast, recommended)" + config LV_USE_BAR + bool "Bar." default y if !LV_CONF_MINIMAL + config LV_USE_BTN + bool "Button." + default y if !LV_CONF_MINIMAL + config LV_USE_BTNMATRIX + bool "Button matrix." + default y if !LV_CONF_MINIMAL + config LV_USE_CANVAS + bool "Canvas. Dependencies: lv_img." + default y if !LV_CONF_MINIMAL + config LV_USE_CHECKBOX + bool "Check Box" + default y if !LV_CONF_MINIMAL + config LV_USE_DROPDOWN + bool "Drop down list. Requires: lv_label." + select LV_USE_LABEL + default y if !LV_CONF_MINIMAL + config LV_USE_IMG + bool "Image. Requires: lv_label." + select LV_USE_LABEL + default y if !LV_CONF_MINIMAL + config LV_USE_LABEL + bool "Label." + default y if !LV_CONF_MINIMAL + config LV_LABEL_TEXT_SELECTION + bool "Enable selecting text of the label." + depends on LV_USE_LABEL + default y + config LV_LABEL_LONG_TXT_HINT + bool "Store extra some info in labels (12 bytes) to speed up drawing of very long texts." + depends on LV_USE_LABEL + default y + config LV_USE_LINE + bool "Line." + default y if !LV_CONF_MINIMAL + config LV_USE_ROLLER + bool "Roller. Requires: lv_label." + select LV_USE_LABEL + default y if !LV_CONF_MINIMAL + config LV_ROLLER_INF_PAGES + int "Number of extra 'pages' when the controller is infinite." + default 7 + depends on LV_USE_ROLLER + config LV_USE_SLIDER + bool "Slider. Requires: lv_bar." + select LV_USE_BAR + default y if !LV_CONF_MINIMAL + config LV_USE_SWITCH + bool "Switch." + default y if !LV_CONF_MINIMAL + config LV_USE_TEXTAREA + bool "Text area. Requires: lv_label." + select LV_USE_LABEL + default y if !LV_CONF_MINIMAL + config LV_TEXTAREA_DEF_PWD_SHOW_TIME + int "Text area def. pwd show time [ms]." + default 1500 + depends on LV_USE_TEXTAREA + config LV_USE_TABLE + bool "Table." + default y if !LV_CONF_MINIMAL + endmenu - config LV_USE_ASSERT_STYLE - bool "Check if the styles are properly initialized. (Very fast, recommended)" + menu "Extra Widgets" + config LV_USE_ANIMIMG + bool "Anim image." + default y if !LV_CONF_MINIMAL + config LV_USE_CALENDAR + bool "Calendar." + default y if !LV_CONF_MINIMAL + config LV_CALENDAR_WEEK_STARTS_MONDAY + bool "Calendar week starts monday." + depends on LV_USE_CALENDAR + config LV_USE_CALENDAR_HEADER_ARROW + bool "Use calendar header arrow" + depends on LV_USE_CALENDAR + default y + config LV_USE_CALENDAR_HEADER_DROPDOWN + bool "Use calendar header dropdown" + depends on LV_USE_CALENDAR + default y + config LV_USE_CHART + bool "Chart." + default y if !LV_CONF_MINIMAL + config LV_USE_COLORWHEEL + bool "Colorwheel." + default y if !LV_CONF_MINIMAL + config LV_USE_IMGBTN + bool "Imgbtn." + default y if !LV_CONF_MINIMAL + config LV_USE_KEYBOARD + bool "Keyboard." + default y if !LV_CONF_MINIMAL + config LV_USE_LED + bool "LED." + default y if !LV_CONF_MINIMAL + config LV_USE_LIST + bool "List." + default y if !LV_CONF_MINIMAL + config LV_USE_METER + bool "Meter." + default y if !LV_CONF_MINIMAL + config LV_USE_MSGBOX + bool "Msgbox." + default y if !LV_CONF_MINIMAL + config LV_USE_SPINBOX + bool "Spinbox." + default y if !LV_CONF_MINIMAL + config LV_USE_SPINNER + bool "Spinner." + default y if !LV_CONF_MINIMAL + config LV_USE_TABVIEW + bool "Tabview." + default y if !LV_CONF_MINIMAL + config LV_USE_TILEVIEW + bool "Tileview" + default y if !LV_CONF_MINIMAL + config LV_USE_WIN + bool "Win" + default y if !LV_CONF_MINIMAL + config LV_USE_SPAN + bool "span" + default y if !LV_CONF_MINIMAL + config LV_SPAN_SNIPPET_STACK_SIZE + int "Maximum number of span descriptor" + default 64 + depends on LV_USE_SPAN + endmenu - config LV_USE_ASSERT_MEM_INTEGRITY - bool "Check the integrity of `lv_mem` after critical operations. (Slow)" + menu "Themes" + config LV_USE_THEME_DEFAULT + bool "A simple, impressive and very complete theme" + default y if !LV_CONF_MINIMAL + config LV_THEME_DEFAULT_DARK + bool "Yes to set dark mode, No to set light mode" + depends on LV_USE_THEME_DEFAULT + config LV_THEME_DEFAULT_GROW + bool "Enable grow on press" + default y + depends on LV_USE_THEME_DEFAULT + config LV_THEME_DEFAULT_TRANSITION_TIME + int "Default transition time in [ms]" + default 80 + depends on LV_USE_THEME_DEFAULT + config LV_USE_THEME_BASIC + bool "A very simple theme that is a good starting point for a custom theme" + default y if !LV_CONF_MINIMAL + endmenu - config LV_USE_ASSERT_OBJ - bool "Check NULL, the object's type and existence (e.g. not deleted). (Slow)." + menu "Layouts" + config LV_USE_FLEX + bool "A layout similar to Flexbox in CSS." + default y if !LV_CONF_MINIMAL + config LV_USE_GRID + bool "A layout similar to Grid in CSS." + default y if !LV_CONF_MINIMAL + endmenu - config LV_ASSERT_HANDLER_INCLUDE - string "Header to include for the custom assert function" - default "assert.h" + menu "3rd Party Libraries" + config LV_USE_FS_STDIO + int "File system on top of stdio API" + default 0 + config LV_FS_STDIO_PATH + string "Set the working directory" + depends on LV_USE_FS_STDIO + + config LV_USE_FS_POSIX + int "File system on top of posix API" + default 0 + config LV_FS_POSIX_PATH + string "Set the working directory" + depends on LV_USE_FS_POSIX + + config LV_USE_FS_WIN32 + int "File system on top of Win32 API" + default 0 + config LV_FS_WIN32_PATH + string "Set the working directory" + depends on LV_USE_FS_WIN32 + + config LV_USE_FS_FATFS + int "File system on top of FatFS" + default 0 + + config LV_USE_PNG + bool "PNG decoder library" + + config LV_USE_BMP + bool "BMP decoder library" + + config LV_USE_SJPG + bool "JPG + split JPG decoder library" + + config LV_USE_GIF + bool "GIF decoder library" + + config LV_USE_QRCODE + bool "QR code library" + + config LV_USE_FREETYPE + bool "FreeType library" + config LV_FREETYPE_CACHE_SIZE + int "Memory used by FreeType to cache characters [bytes] (-1: no caching)" + depends on LV_USE_FREETYPE + default 16384 + + config LV_USE_RLOTTIE + bool "Lottie library" endmenu menu "Others" - config LV_USE_PERF_MONITOR - bool "Show CPU usage and FPS count in the right bottom corner." - - config LV_USE_MEM_MONITOR - bool "Show the used memory and the memory fragmentation in the left bottom corner." - depends on !LV_MEM_CUSTOM - - config LV_USE_REFR_DEBUG - bool "Draw random colored rectangles over the redrawn areas." - - config LV_SPRINTF_CUSTOM - bool "Change the built-in (v)snprintf functions" - - config LV_SPRINTF_INCLUDE - string "Header to include for the custom sprintf function" - depends on LV_SPRINTF_CUSTOM - default "stdio.h" - - config LV_SPRINTF_USE_FLOAT - bool "Enable float in built-in (v)snprintf functions" - depends on !LV_SPRINTF_CUSTOM - - config LV_USE_USER_DATA - bool "Add a 'user_data' to drivers and objects." - default y - - config LV_ENABLE_GC - bool "Enable garbage collector" - - config LV_GC_INCLUDE - string "Header to include for the garbage collector related things" - depends on LV_ENABLE_GC - default "gc.h" - endmenu - - menu "Compiler settings" - config LV_BIG_ENDIAN_SYSTEM - bool "For big endian systems set to 1" - - config LV_ATTRIBUTE_MEM_ALIGN_SIZE - int "Required alignment size for buffers" - default 1 - - config LV_ATTRIBUTE_FAST_MEM_USE_IRAM - bool "Set IRAM as LV_ATTRIBUTE_FAST_MEM" - help - Set this option to configure IRAM as LV_ATTRIBUTE_FAST_MEM - - config LV_USE_LARGE_COORD - bool "Extend the default -32k..32k coordinate range to -4M..4M by using int32_t for coordinates instead of int16_t" - endmenu - endmenu - - menu "Font usage" - menu "Enable built-in fonts" - config LV_FONT_MONTSERRAT_8 - bool "Enable Montserrat 8" - config LV_FONT_MONTSERRAT_10 - bool "Enable Montserrat 10" - config LV_FONT_MONTSERRAT_12 - bool "Enable Montserrat 12" - config LV_FONT_MONTSERRAT_14 - bool "Enable Montserrat 14" + config LV_USE_SNAPSHOT + bool "Enable API to take snapshot" default y if !LV_CONF_MINIMAL - config LV_FONT_MONTSERRAT_16 - bool "Enable Montserrat 16" - config LV_FONT_MONTSERRAT_18 - bool "Enable Montserrat 18" - config LV_FONT_MONTSERRAT_20 - bool "Enable Montserrat 20" - config LV_FONT_MONTSERRAT_22 - bool "Enable Montserrat 22" - config LV_FONT_MONTSERRAT_24 - bool "Enable Montserrat 24" - config LV_FONT_MONTSERRAT_26 - bool "Enable Montserrat 26" - config LV_FONT_MONTSERRAT_28 - bool "Enable Montserrat 28" - config LV_FONT_MONTSERRAT_30 - bool "Enable Montserrat 30" - config LV_FONT_MONTSERRAT_32 - bool "Enable Montserrat 32" - config LV_FONT_MONTSERRAT_34 - bool "Enable Montserrat 34" - config LV_FONT_MONTSERRAT_36 - bool "Enable Montserrat 36" - config LV_FONT_MONTSERRAT_38 - bool "Enable Montserrat 38" - config LV_FONT_MONTSERRAT_40 - bool "Enable Montserrat 40" - config LV_FONT_MONTSERRAT_42 - bool "Enable Montserrat 42" - config LV_FONT_MONTSERRAT_44 - bool "Enable Montserrat 44" - config LV_FONT_MONTSERRAT_46 - bool "Enable Montserrat 46" - config LV_FONT_MONTSERRAT_48 - bool "Enable Montserrat 48" - - config LV_FONT_MONTSERRAT_12_SUBPX - bool "Enable Montserrat 12 sub-pixel" - config LV_FONT_MONTSERRAT_28_COMPRESSED - bool "Enable Montserrat 28 compressed" - config LV_FONT_DEJAVU_16_PERSIAN_HEBREW - bool "Enable Dejavu 16 Persian, Hebrew, Arabic letters" - config LV_FONT_SIMSUN_16_CJK - bool "Enable Simsun 16 CJK" - - config LV_FONT_UNSCII_8 - bool "Enable UNSCII 8 (Perfect monospace font)" - default y if LV_CONF_MINIMAL - config LV_FONT_UNSCII_16 - bool "Enable UNSCII 16 (Perfect monospace font)" - - config LV_FONT_CUSTOM - bool "Enable the custom font" - config LV_FONT_CUSTOM_DECLARE - string "Header to include for the custom font" - depends on LV_FONT_CUSTOM endmenu - choice LV_FONT_DEFAULT - prompt "Select theme default title font" - default LV_FONT_DEFAULT_MONTSERRAT_14 if !LV_CONF_MINIMAL - default LV_FONT_DEFAULT_UNSCII_8 if LV_CONF_MINIMAL - help - Select theme default title font + menu "Examples" + config LV_BUILD_EXAMPLES + bool "Enable the examples to be built" + default y if !LV_CONF_MINIMAL + endmenu - config LV_FONT_DEFAULT_MONTSERRAT_8 - bool "Montserrat 8" - select LV_FONT_MONTSERRAT_8 - config LV_FONT_DEFAULT_MONTSERRAT_12 - bool "Montserrat 12" - select LV_FONT_MONTSERRAT_12 - config LV_FONT_DEFAULT_MONTSERRAT_14 - bool "Montserrat 14" - select LV_FONT_MONTSERRAT_14 - config LV_FONT_DEFAULT_MONTSERRAT_16 - bool "Montserrat 16" - select LV_FONT_MONTSERRAT_16 - config LV_FONT_DEFAULT_MONTSERRAT_18 - bool "Montserrat 18" - select LV_FONT_MONTSERRAT_18 - config LV_FONT_DEFAULT_MONTSERRAT_20 - bool "Montserrat 20" - select LV_FONT_MONTSERRAT_20 - config LV_FONT_DEFAULT_MONTSERRAT_22 - bool "Montserrat 22" - select LV_FONT_MONTSERRAT_22 - config LV_FONT_DEFAULT_MONTSERRAT_24 - bool "Montserrat 24" - select LV_FONT_MONTSERRAT_24 - config LV_FONT_DEFAULT_MONTSERRAT_26 - bool "Montserrat 26" - select LV_FONT_MONTSERRAT_26 - config LV_FONT_DEFAULT_MONTSERRAT_28 - bool "Montserrat 28" - select LV_FONT_MONTSERRAT_28 - config LV_FONT_DEFAULT_MONTSERRAT_30 - bool "Montserrat 30" - select LV_FONT_MONTSERRAT_30 - config LV_FONT_DEFAULT_MONTSERRAT_32 - bool "Montserrat 32" - select LV_FONT_MONTSERRAT_32 - config LV_FONT_DEFAULT_MONTSERRAT_34 - bool "Montserrat 34" - select LV_FONT_MONTSERRAT_34 - config LV_FONT_DEFAULT_MONTSERRAT_36 - bool "Montserrat 36" - select LV_FONT_MONTSERRAT_36 - config LV_FONT_DEFAULT_MONTSERRAT_38 - bool "Montserrat 38" - select LV_FONT_MONTSERRAT_38 - config LV_FONT_DEFAULT_MONTSERRAT_40 - bool "Montserrat 40" - select LV_FONT_MONTSERRAT_40 - config LV_FONT_DEFAULT_MONTSERRAT_42 - bool "Montserrat 42" - select LV_FONT_MONTSERRAT_42 - config LV_FONT_DEFAULT_MONTSERRAT_44 - bool "Montserrat 44" - select LV_FONT_MONTSERRAT_44 - config LV_FONT_DEFAULT_MONTSERRAT_46 - bool "Montserrat 46" - select LV_FONT_MONTSERRAT_46 - config LV_FONT_DEFAULT_MONTSERRAT_48 - bool "Montserrat 48" - select LV_FONT_MONTSERRAT_48 - config LV_FONT_DEFAULT_MONTSERRAT_12_SUBPX - bool "Montserrat 12 sub-pixel" - select LV_FONT_MONTSERRAT_12_SUBPX - config LV_FONT_DEFAULT_MONTSERRAT_28_COMPRESSED - bool "Montserrat 28 compressed" - select LV_FONT_MONTSERRAT_28_COMPRESSED - config LV_FONT_DEFAULT_DEJAVU_16_PERSIAN_HEBREW - bool "Dejavu 16 Persian, Hebrew, Arabic letters" - select LV_FONT_DEJAVU_16_PERSIAN_HEBREW - config LV_FONT_DEFAULT_SIMSUN_16_CJK - bool "Simsun 16 CJK" - select LV_FONT_SIMSUN_16_CJK - config LV_FONT_DEFAULT_UNSCII_8 - bool "UNSCII 8 (Perfect monospace font)" - select LV_FONT_UNSCII_8 - config LV_FONT_DEFAULT_UNSCII_16 - bool "UNSCII 16 (Perfect monospace font)" - select LV_FONT_UNSCII_16 - endchoice - - config LV_FONT_FMT_TXT_LARGE - bool "Enable it if you have fonts with a lot of characters." - help - The limit depends on the font size, font face and bpp - but with > 10,000 characters if you see issues probably you - need to enable it. - - config LV_USE_FONT_COMPRESSED - bool "Sets support for compressed fonts." - - config LV_USE_FONT_SUBPX - bool "Enable subpixel rendering." - - config LV_FONT_SUBPX_BGR - bool "Use BGR instead RGB for sub-pixel rendering." - depends on LV_USE_FONT_SUBPX - help - Set the pixel order of the display. - Important only if "subpx fonts" are used. - With "normal" font it doesn't matter. - endmenu - - menu "Text Settings" - choice LV_TXT_ENC - prompt "Select a character encoding for strings" - help - Select a character encoding for strings. Your IDE or editor should have the same character encoding. - default LV_TXT_ENC_UTF8 if !LV_CONF_MINIMAL - default LV_TXT_ENC_ASCII if LV_CONF_MINIMAL - - config LV_TXT_ENC_UTF8 - bool "UTF8" - config LV_TXT_ENC_ASCII - bool "ASCII" - endchoice - - config LV_TXT_BREAK_CHARS - string "Can break (wrap) texts on these chars" - default " ,.;:-_" - - config LV_TXT_LINE_BREAK_LONG_LEN - int "Line break long length" - default 0 - help - If a word is at least this long, will break wherever 'prettiest'. - To disable, set to a value <= 0. - - config LV_TXT_LINE_BREAK_LONG_PRE_MIN_LEN - int "Min num chars before break" - default 3 - depends on LV_TXT_LINE_BREAK_LONG_LEN > 0 - help - Minimum number of characters in a long word to put on a line before a break. - - config LV_TXT_LINE_BREAK_LONG_POST_MIN_LEN - int "Min num chars after break" - default 3 - depends on LV_TXT_LINE_BREAK_LONG_LEN > 0 - help - Minimum number of characters in a long word to put on a line after a break. - - config LV_TXT_COLOR_CMD - string "The control character to use for signalling text recoloring" - default "#" - - config LV_USE_BIDI - bool "Support bidirectional texts" - help - Allows mixing Left-to-Right and Right-to-Left texts. - The direction will be processed according to the Unicode Bidirectional Algorithm: - https://www.w3.org/International/articles/inline-bidi-markup/uba-basics - - choice - prompt "Set the default BIDI direction" - default LV_BIDI_DIR_AUTO - depends on LV_USE_BIDI - - config LV_BIDI_DIR_LTR - bool "Left-to-Right" - config LV_BIDI_DIR_RTL - bool "Right-to-Left" - config LV_BIDI_DIR_AUTO - bool "Detect texts base direction" - endchoice - - config LV_USE_ARABIC_PERSIAN_CHARS - bool "Enable Arabic/Persian processing" - help - In these languages characters should be replaced with - an other form based on their position in the text. - endmenu - - menu "Widget usage" - config LV_USE_ARC - bool "Arc." - default y if !LV_CONF_MINIMAL - config LV_USE_BAR - bool "Bar." - default y if !LV_CONF_MINIMAL - config LV_USE_BTN - bool "Button." - default y if !LV_CONF_MINIMAL - config LV_USE_BTNMATRIX - bool "Button matrix." - default y if !LV_CONF_MINIMAL - config LV_USE_CANVAS - bool "Canvas. Dependencies: lv_img." - default y if !LV_CONF_MINIMAL - config LV_USE_CHECKBOX - bool "Check Box" - default y if !LV_CONF_MINIMAL - config LV_USE_DROPDOWN - bool "Drop down list. Requires: lv_label." - select LV_USE_LABEL - default y if !LV_CONF_MINIMAL - config LV_USE_IMG - bool "Image. Requires: lv_label." - select LV_USE_LABEL - default y if !LV_CONF_MINIMAL - config LV_USE_LABEL - bool "Label." - default y if !LV_CONF_MINIMAL - config LV_LABEL_TEXT_SELECTION - bool "Enable selecting text of the label." - depends on LV_USE_LABEL - default y - config LV_LABEL_LONG_TXT_HINT - bool "Store extra some info in labels (12 bytes) to speed up drawing of very long texts." - depends on LV_USE_LABEL - default y - config LV_USE_LINE - bool "Line." - default y if !LV_CONF_MINIMAL - config LV_USE_ROLLER - bool "Roller. Requires: lv_label." - select LV_USE_LABEL - default y if !LV_CONF_MINIMAL - config LV_ROLLER_INF_PAGES - int "Number of extra 'pages' when the controller is infinite." - default 7 - depends on LV_USE_ROLLER - config LV_USE_SLIDER - bool "Slider. Requires: lv_bar." - select LV_USE_BAR - default y if !LV_CONF_MINIMAL - config LV_USE_SWITCH - bool "Switch." - default y if !LV_CONF_MINIMAL - config LV_USE_TEXTAREA - bool "Text area. Requires: lv_label." - select LV_USE_LABEL - default y if !LV_CONF_MINIMAL - config LV_TEXTAREA_DEF_PWD_SHOW_TIME - int "Text area def. pwd show time [ms]." - default 1500 - depends on LV_USE_TEXTAREA - config LV_USE_TABLE - bool "Table." - default y if !LV_CONF_MINIMAL - endmenu - - menu "Extra Widgets" - config LV_USE_ANIMIMG - bool "Anim image." - default y if !LV_CONF_MINIMAL - config LV_USE_CALENDAR - bool "Calendar." - default y if !LV_CONF_MINIMAL - config LV_CALENDAR_WEEK_STARTS_MONDAY - bool "Calendar week starts monday." - depends on LV_USE_CALENDAR - config LV_USE_CALENDAR_HEADER_ARROW - bool "Use calendar header arrow" - depends on LV_USE_CALENDAR - default y - config LV_USE_CALENDAR_HEADER_DROPDOWN - bool "Use calendar header dropdown" - depends on LV_USE_CALENDAR - default y - config LV_USE_CHART - bool "Chart." - default y if !LV_CONF_MINIMAL - config LV_USE_COLORWHEEL - bool "Colorwheel." - default y if !LV_CONF_MINIMAL - config LV_USE_IMGBTN - bool "Imgbtn." - default y if !LV_CONF_MINIMAL - config LV_USE_KEYBOARD - bool "Keyboard." - default y if !LV_CONF_MINIMAL - config LV_USE_LED - bool "LED." - default y if !LV_CONF_MINIMAL - config LV_USE_LIST - bool "List." - default y if !LV_CONF_MINIMAL - config LV_USE_METER - bool "Meter." - default y if !LV_CONF_MINIMAL - config LV_USE_MSGBOX - bool "Msgbox." - default y if !LV_CONF_MINIMAL - config LV_USE_SPINBOX - bool "Spinbox." - default y if !LV_CONF_MINIMAL - config LV_USE_SPINNER - bool "Spinner." - default y if !LV_CONF_MINIMAL - config LV_USE_TABVIEW - bool "Tabview." - default y if !LV_CONF_MINIMAL - config LV_USE_TILEVIEW - bool "Tileview" - default y if !LV_CONF_MINIMAL - config LV_USE_WIN - bool "Win" - default y if !LV_CONF_MINIMAL - config LV_USE_SPAN - bool "span" - default y if !LV_CONF_MINIMAL - config LV_SPAN_SNIPPET_STACK_SIZE - int "Maximum number of span descriptor" - default 64 - depends on LV_USE_SPAN - endmenu - - menu "Themes" - config LV_USE_THEME_DEFAULT - bool "A simple, impressive and very complete theme" - default y if !LV_CONF_MINIMAL - config LV_THEME_DEFAULT_DARK - bool "Yes to set dark mode, No to set light mode" - depends on LV_USE_THEME_DEFAULT - config LV_THEME_DEFAULT_GROW - bool "Enable grow on press" - default y - depends on LV_USE_THEME_DEFAULT - config LV_THEME_DEFAULT_TRANSITION_TIME - int "Default transition time in [ms]" - default 80 - depends on LV_USE_THEME_DEFAULT - config LV_USE_THEME_BASIC - bool "A very simple theme that is a good starting point for a custom theme" - default y if !LV_CONF_MINIMAL - endmenu - - menu "Layouts" - config LV_USE_FLEX - bool "A layout similar to Flexbox in CSS." - default y if !LV_CONF_MINIMAL - config LV_USE_GRID - bool "A layout similar to Grid in CSS." - default y if !LV_CONF_MINIMAL - endmenu - - menu "3rd Party Libraries" - config LV_USE_FS_STDIO - int "File system on top of stdio API" - default 0 - config LV_FS_STDIO_PATH - string "Set the working directory" - depends on LV_USE_FS_STDIO - - config LV_USE_FS_POSIX - int "File system on top of posix API" - default 0 - config LV_FS_POSIX_PATH - string "Set the working directory" - depends on LV_USE_FS_POSIX - - config LV_USE_FS_WIN32 - int "File system on top of Win32 API" - default 0 - config LV_FS_WIN32_PATH - string "Set the working directory" - depends on LV_USE_FS_WIN32 - - config LV_USE_FS_FATFS - int "File system on top of FatFS" - default 0 - - config LV_USE_PNG - bool "PNG decoder library" - - config LV_USE_BMP - bool "BMP decoder library" - - config LV_USE_SJPG - bool "JPG + split JPG decoder library" - - config LV_USE_GIF - bool "GIF decoder library" - - config LV_USE_QRCODE - bool "QR code library" - - config LV_USE_FREETYPE - bool "FreeType library" - config LV_FREETYPE_CACHE_SIZE - int "Memory used by FreeType to cache characters [bytes] (-1: no caching)" - depends on LV_USE_FREETYPE - default 16384 - - config LV_USE_RLOTTIE - bool "Lottie library" - endmenu - - menu "Others" - config LV_USE_SNAPSHOT - bool "Enable API to take snapshot" - default y if !LV_CONF_MINIMAL - endmenu - - menu "Examples" config LV_BUILD_EXAMPLES - bool "Enable the examples to be built" - default y if !LV_CONF_MINIMAL + bool "Enable the examples to be built with the library." + default y + endmenu + endif - config LV_BUILD_EXAMPLES - bool "Enable the examples to be built with the library." - default y - - endmenu -endif +endmenu diff --git a/APP_Framework/lib/queue/Kconfig b/APP_Framework/lib/queue/Kconfig index 6e5e210bd..1f7882513 100644 --- a/APP_Framework/lib/queue/Kconfig +++ b/APP_Framework/lib/queue/Kconfig @@ -1,3 +1,7 @@ -menuconfig LIB_USING_QUEUE - bool "USING QUEUE" - default n +menu "lib using queue" + + menuconfig LIB_USING_QUEUE + bool "USING QUEUE" + default n + +endmenu diff --git a/Ubiquitous/XiZi_IIoT/Kconfig b/Ubiquitous/XiZi_IIoT/Kconfig index 2272a4f79..c2ce0865d 100644 --- a/Ubiquitous/XiZi_IIoT/Kconfig +++ b/Ubiquitous/XiZi_IIoT/Kconfig @@ -5,4 +5,6 @@ source "$KERNEL_DIR/lib/Kconfig" source "$KERNEL_DIR/fs/Kconfig" +source "$KERNEL_DIR/tool/Kconfig" + source "$KERNEL_DIR/../../APP_Framework/Kconfig" diff --git a/Ubiquitous/XiZi_IIoT/Makefile b/Ubiquitous/XiZi_IIoT/Makefile index 0e389f724..251cd08de 100755 --- a/Ubiquitous/XiZi_IIoT/Makefile +++ b/Ubiquitous/XiZi_IIoT/Makefile @@ -62,6 +62,10 @@ PART += COMPILE_KERNEL else ifeq ($(CONFIG_COMPILER_APP)_$(CONFIG_COMPILER_KERNEL),y_y) PART := COMPILE_APP COMPILE_KERNEL +else ifeq ($(CONFIG_MCUBOOT_BOOTLOADER), y) +PART := COMPILE_BOOTLOADER +else ifeq ($(CONFIG_MCUBOOT_APPLICATION), y) +PART := COMPILE_APPLICATION else PART := @@ -88,6 +92,22 @@ COMPILE_ALL: @$(MAKE) -C build TARGET=XiZi-$(BOARD).elf LINK_FLAGS=LFLAGS @rm build/Makefile build/make.obj +COMPILE_BOOTLOADER: + @for dir in $(SRC_DIR);do \ + $(MAKE) -C $$dir; \ + done + @cp link.mk build/Makefile + @$(MAKE) -C build COMPILE_TYPE="-boot" TARGET=XiZi-$(BOARD)-boot.elf LINK_FLAGS=LFLAGS + @rm build/Makefile build/make.obj + +COMPILE_APPLICATION: + @for dir in $(SRC_DIR);do \ + $(MAKE) -C $$dir; \ + done + @cp link.mk build/Makefile + @$(MAKE) -C build COMPILE_TYPE="-app" TARGET=XiZi-$(BOARD)-app.elf LINK_FLAGS=LFLAGS + @rm build/Makefile build/make.obj + COMPILE_MUSL: @for dir in $(MUSL_DIR);do \ $(MAKE) -C $$dir COMPILE_TYPE=$@ CONFIG_RESOURCES_LWIP=n; \ diff --git a/Ubiquitous/XiZi_IIoT/arch/arm/cortex-m7/boot.S b/Ubiquitous/XiZi_IIoT/arch/arm/cortex-m7/boot.S index 57083c7ea..2eb699f9c 100644 --- a/Ubiquitous/XiZi_IIoT/arch/arm/cortex-m7/boot.S +++ b/Ubiquitous/XiZi_IIoT/arch/arm/cortex-m7/boot.S @@ -49,6 +49,61 @@ Modification: .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: +#ifdef __BOOTLOADER /* BOOT */ + cpsid i /* Mask interrupts */ + .equ VTOR, 0xE000ED08 + ldr r0, =VTOR + ldr r1, =__isr_vector + str r1, [r0] + ldr r2, [r1] + msr msp, r2 + + ldr r0,=SystemInit + blx r0 + +/* Loop to copy data from read only memory to RAM. The ranges + * of copy from/to are specified by following symbols evaluated in + * linker script. + * __bootloader_end: End of code section, i.e., begin of data sections to copy from. + * __data_start__/__data_end__: RAM address range that data should be + * __noncachedata_start__/__noncachedata_end__ : none cachable region + * copied to. Both must be aligned to 4 bytes boundary. */ + + ldr r1, =__etext + ldr r2, =__data_start__ + ldr r3, =__data_end__ + + /* Here are two copies of loop implemenations. First one favors code size + * and the second one favors performance. Default uses the first one. + * Change to "#if 0" to use the second one */ +.LoopCopy0: + cmp r2, r3 + ittt lt + ldrlt r0, [r1], #4 + strlt r0, [r2], #4 + blt .LoopCopy0 + + /* This part of work usually is done in C library startup code. Otherwise, + * define this macro to enable it in this startup. + * + * Loop to zero out BSS section, which uses following symbols + * in linker script: + * __bss_start__: start of BSS section. Must align to 4 + * __bss_end__: end of BSS section. Must align to 4 + */ + ldr r1, =__bss_start__ + ldr r2, =__bss_end__ + + movs r0, 0 +.LoopCopy1: + cmp r1, r2 + itt lt + strlt r0, [r1], #4 + blt .LoopCopy1 + + ldr r0,=ota_entry + blx r0 +#else /* APP */ cpsid i /* Mask interrupts */ .equ VTOR, 0xE000ED08 ldr r0, =VTOR @@ -122,7 +177,7 @@ Reset_Handler: blt .LC4 #endif /* __STARTUP_INITIALIZE_NONCACHEDATA */ -#ifdef __STARTUP_CLEAR_BSS +#if 1 /* This part of work usually is done in C library startup code. Otherwise, * define this macro to enable it in this startup. * @@ -144,5 +199,6 @@ Reset_Handler: ldr r0,=entry blx r0 +#endif /* MCUBOOT_BOOTLOADER */ .size Reset_Handler, . - Reset_Handler \ No newline at end of file diff --git a/Ubiquitous/XiZi_IIoT/board/aiit-arm32-board/third_party_driver/spi/connect_lora_spi.c b/Ubiquitous/XiZi_IIoT/board/aiit-arm32-board/third_party_driver/spi/connect_lora_spi.c index 76cdb61db..c8255cf7a 100644 --- a/Ubiquitous/XiZi_IIoT/board/aiit-arm32-board/third_party_driver/spi/connect_lora_spi.c +++ b/Ubiquitous/XiZi_IIoT/board/aiit-arm32-board/third_party_driver/spi/connect_lora_spi.c @@ -22,7 +22,7 @@ static struct HardwareDev *g_spi_lora_dev; static BusType buspin; -tRadioDriver *Radio = NONE; +static tRadioDriver *Radio = NONE; void SX1276InitIo(void) { struct PinParam PinCfg; diff --git a/Ubiquitous/XiZi_IIoT/board/aiit-riscv64-board/third_party_driver/spi/connect_lora_spi.c b/Ubiquitous/XiZi_IIoT/board/aiit-riscv64-board/third_party_driver/spi/connect_lora_spi.c index 5d3e7c7a2..37c969cff 100644 --- a/Ubiquitous/XiZi_IIoT/board/aiit-riscv64-board/third_party_driver/spi/connect_lora_spi.c +++ b/Ubiquitous/XiZi_IIoT/board/aiit-riscv64-board/third_party_driver/spi/connect_lora_spi.c @@ -22,7 +22,7 @@ static struct HardwareDev *g_spi_lora_dev; static BusType buspin; -tRadioDriver *Radio = NONE; +static tRadioDriver *Radio = NONE; void SX1276InitIo(void) { struct PinParam PinCfg; diff --git a/Ubiquitous/XiZi_IIoT/board/edu-riscv64/third_party_driver/touch/connect_touch.c b/Ubiquitous/XiZi_IIoT/board/edu-riscv64/third_party_driver/touch/connect_touch.c index 54efb4a73..d0ed1ef4f 100644 --- a/Ubiquitous/XiZi_IIoT/board/edu-riscv64/third_party_driver/touch/connect_touch.c +++ b/Ubiquitous/XiZi_IIoT/board/edu-riscv64/third_party_driver/touch/connect_touch.c @@ -77,7 +77,7 @@ static x_err_t ReadRegs(struct HardwareDev* dev, uint8 len, uint8* buf) // not used in polling mode static void touch_pin_irqhandler(void* arg) { - KPrintf("int hdr working.\n"); + //KPrintf("int hdr working.\n"); if (!SemReleaseFlag) { KSemaphoreAbandon(touch_sem); diff --git a/Ubiquitous/XiZi_IIoT/board/hc32f4a0/config.mk b/Ubiquitous/XiZi_IIoT/board/hc32f4a0/config.mk index 258d2dca3..c52aca76a 100644 --- a/Ubiquitous/XiZi_IIoT/board/hc32f4a0/config.mk +++ b/Ubiquitous/XiZi_IIoT/board/hc32f4a0/config.mk @@ -1,11 +1,11 @@ export CROSS_COMPILE ?=/usr/bin/arm-none-eabi- -export CFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -fgnu89-inline -Wa,-mimplicit-it=thumb -Werror -export AFLAGS := -c -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -x assembler-with-cpp -Wa,-mimplicit-it=thumb -gdwarf-2 -export LFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiZi_hc32f4a0.map,-cref,-u,Reset_Handler -T $(BSP_ROOT)/link.lds -export CXXFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -Werror +export CFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -fgnu89-inline -Wa,-mimplicit-it=thumb -Werror +export AFLAGS := -c -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -ffunction-sections -fdata-sections -x assembler-with-cpp -Wa,-mimplicit-it=thumb -gdwarf-2 +export LFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiZi_hc32f4a0.map,-cref,-u,Reset_Handler -T $(BSP_ROOT)/link.lds +export CXXFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -Werror -export APPLFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiZi_app.map,-cref,-u, -T $(BSP_ROOT)/link_userspace.lds +export APPLFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiZi_app.map,-cref,-u, -T $(BSP_ROOT)/link_userspace.lds export DEFINES := -DHAVE_CCONFIG_H -DHC32F4A0 -DUSE_DDL_DRIVER -DHAVE_SIGINFO diff --git a/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/spi/connect_lora_spi.c b/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/spi/connect_lora_spi.c index baa130571..c949d38e7 100644 --- a/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/spi/connect_lora_spi.c +++ b/Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/spi/connect_lora_spi.c @@ -25,7 +25,7 @@ #define LORA_RST_PIN (GPIO_PIN_02) static struct HardwareDev *g_spi_lora_dev; -tRadioDriver *Radio = NONE; +static tRadioDriver *Radio = NONE; void SX1276InitIo(void) { diff --git a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/board.c b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/board.c index af87f9229..614c8264c 100644 --- a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/board.c +++ b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/board.c @@ -64,6 +64,10 @@ Modification: #include #endif +#ifdef TOOL_USING_OTA +#include +#endif + #ifdef BSP_USING_SEMC extern status_t BOARD_InitSEMC(void); #ifdef BSP_USING_EXTSRAM @@ -330,12 +334,12 @@ struct InitSequenceDesc _board_init[] = #endif #ifdef BSP_USING_SDIO - { "sdio", Imxrt1052HwSdioInit }, + { "sdio", Imxrt1052HwSdioInit }, #endif #ifdef BSP_USING_USB #ifdef BSP_USING_NXP_USBH - { "nxp hw usb", Imxrt1052HwUsbHostInit }, + { "nxp hw usb", Imxrt1052HwUsbHostInit }, #endif #endif @@ -344,7 +348,7 @@ struct InitSequenceDesc _board_init[] = #endif #ifdef BSP_USING_LCD - { "hw_lcd", Imxrt1052HwLcdInit }, + { "hw_lcd", Imxrt1052HwLcdInit }, #endif #ifdef BSP_USING_TOUCH @@ -358,7 +362,7 @@ struct InitSequenceDesc _board_init[] = #ifdef BSP_USING_WDT { "hw_wdt", Imxrt1052HwWdgInit }, #endif - { " NONE ",NONE }, + { " NONE ",NONE }, }; /** @@ -367,7 +371,7 @@ struct InitSequenceDesc _board_init[] = void InitBoardHardware() { int i = 0; - int ret = 0; + int ret = 0; BOARD_ConfigMPU(); BOARD_InitPins(); @@ -403,10 +407,14 @@ void InitBoardHardware() KPrintf("board initialization......\n"); for(i = 0; _board_init[i].fn != NONE; i++) { - ret = _board_init[i].fn(); - KPrintf("initialize %s %s\n",_board_init[i].fn_name, ret == 0 ? "success" : "failed"); - } + ret = _board_init[i].fn(); + KPrintf("initialize %s %s\n",_board_init[i].fn_name, ret == 0 ? "success" : "failed"); + } KPrintf("board init done.\n"); - KPrintf("start kernel...\n"); -} + KPrintf("start kernel...\n"); +#ifdef TOOL_USING_OTA + //跳转成功设置lastjumpflag为JUMP_SUCCESS_FLAG + app_clear_jumpflag(); +#endif +} diff --git a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/config.mk b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/config.mk index e05bd2e19..4da08fe5c 100644 --- a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/config.mk +++ b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/config.mk @@ -15,7 +15,11 @@ ifeq ($(CONFIG_RESOURCES_LWIP), y) export LINK_LWIP := $(KERNEL_ROOT)/resources/ethernet/LwIP/liblwip.a endif -ifeq ($(CONFIG_BSP_USING_USB),y) +ifeq ($(CONFIG_MCUBOOT_BOOTLOADER),y) +export LFLAGS += -mcpu=cortex-m7 -mthumb -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiZi-xidatong-arm32-boot.map,-cref,-u,Reset_Handler -T $(BSP_ROOT)/link-bootloader.lds +else ifeq ($(CONFIG_MCUBOOT_APPLICATION),y) +export LFLAGS += -mcpu=cortex-m7 -mthumb -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiZi-xidatong-arm32-app.map,-cref,-u,Reset_Handler -T $(BSP_ROOT)/link-application.lds +else ifeq ($(CONFIG_BSP_USING_USB),y) export LFLAGS += -mcpu=cortex-m7 -mthumb -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiZi-xidatong-arm32.map,-cref,-u,Reset_Handler -T $(BSP_ROOT)/link-usb.lds else export LFLAGS += -mcpu=cortex-m7 -mthumb -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiZi-xidatong-arm32.map,-cref,-u,Reset_Handler -T $(BSP_ROOT)/link.lds @@ -28,5 +32,9 @@ export APPLFLAGS := -mcpu=cortex-m7 -mthumb -ffunction-sections -fdata-sections export DEFINES := -DHAVE_CCONFIG_H -DCPU_MIMXRT1052CVL5B -DSKIP_SYSCLK_INIT -DEVK_MCIMXRM -DFSL_SDK_ENABLE_DRIVER_CACHE_CONTROL=1 -DXIP_EXTERNAL_FLASH=1 -D__STARTUP_INITIALIZE_NONCACHEDATA -D__STARTUP_CLEAR_BSS +ifeq ($(CONFIG_MCUBOOT_BOOTLOADER),y) +export DEFINES += -D__BOOTLOADER +endif + export ARCH = arm export MCU = cortex-m7 diff --git a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/include/board.h b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/include/board.h index c96c9805f..e0ed54d25 100755 --- a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/include/board.h +++ b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/include/board.h @@ -33,7 +33,7 @@ Modification: #include "fsl_clock.h" #include "fsl_enet.h" #include "clock_config.h" -// #include +#include #include extern int heap_start; diff --git a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/include/clock_config.h b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/include/clock_config.h index 96d9691c3..29570d854 100755 --- a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/include/clock_config.h +++ b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/include/clock_config.h @@ -50,6 +50,53 @@ void BOARD_InitBootClocks(void); ******************************************************************************/ #define BOARD_BOOTCLOCKRUN_CORE_CLOCK 600000000U /*!< Core clock frequency: 600000000Hz */ +/* Clock outputs (values are in Hz): */ +#define BOARD_BOOTCLOCKRUN_AHB_CLK_ROOT 600000000UL +#define BOARD_BOOTCLOCKRUN_CAN_CLK_ROOT 40000000UL +#define BOARD_BOOTCLOCKRUN_CKIL_SYNC_CLK_ROOT 32768UL +#define BOARD_BOOTCLOCKRUN_CLKO1_CLK 0UL +#define BOARD_BOOTCLOCKRUN_CLKO2_CLK 0UL +#define BOARD_BOOTCLOCKRUN_CLK_1M 1000000UL +#define BOARD_BOOTCLOCKRUN_CLK_24M 24000000UL +#define BOARD_BOOTCLOCKRUN_CSI_CLK_ROOT 12000000UL +#define BOARD_BOOTCLOCKRUN_ENET1_TX_CLK 2400000UL +#define BOARD_BOOTCLOCKRUN_ENET_125M_CLK 2400000UL +#define BOARD_BOOTCLOCKRUN_ENET_25M_REF_CLK 1200000UL +#define BOARD_BOOTCLOCKRUN_FLEXIO1_CLK_ROOT 30000000UL +#define BOARD_BOOTCLOCKRUN_FLEXIO2_CLK_ROOT 30000000UL +#define BOARD_BOOTCLOCKRUN_FLEXSPI_CLK_ROOT 160000000UL +#define BOARD_BOOTCLOCKRUN_GPT1_IPG_CLK_HIGHFREQ 75000000UL +#define BOARD_BOOTCLOCKRUN_GPT2_IPG_CLK_HIGHFREQ 75000000UL +#define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT 150000000UL +#define BOARD_BOOTCLOCKRUN_LCDIF_CLK_ROOT 9642857UL +#define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT 60000000UL +#define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT 105600000UL +#define BOARD_BOOTCLOCKRUN_LVDS1_CLK 1200000000UL +#define BOARD_BOOTCLOCKRUN_MQS_MCLK 63529411UL +#define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT 75000000UL +#define BOARD_BOOTCLOCKRUN_PLL7_MAIN_CLK 24000000UL +#define BOARD_BOOTCLOCKRUN_SAI1_CLK_ROOT 63529411UL +#define BOARD_BOOTCLOCKRUN_SAI1_MCLK1 63529411UL +#define BOARD_BOOTCLOCKRUN_SAI1_MCLK2 63529411UL +#define BOARD_BOOTCLOCKRUN_SAI1_MCLK3 30000000UL +#define BOARD_BOOTCLOCKRUN_SAI2_CLK_ROOT 63529411UL +#define BOARD_BOOTCLOCKRUN_SAI2_MCLK1 63529411UL +#define BOARD_BOOTCLOCKRUN_SAI2_MCLK2 0UL +#define BOARD_BOOTCLOCKRUN_SAI2_MCLK3 30000000UL +#define BOARD_BOOTCLOCKRUN_SAI3_CLK_ROOT 63529411UL +#define BOARD_BOOTCLOCKRUN_SAI3_MCLK1 63529411UL +#define BOARD_BOOTCLOCKRUN_SAI3_MCLK2 0UL +#define BOARD_BOOTCLOCKRUN_SAI3_MCLK3 30000000UL +#define BOARD_BOOTCLOCKRUN_SEMC_CLK_ROOT 75000000UL +#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL +#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL +#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 117333333UL +#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL +#define BOARD_BOOTCLOCKRUN_USBPHY1_CLK 0UL +#define BOARD_BOOTCLOCKRUN_USBPHY2_CLK 0UL +#define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT 198000000UL +#define BOARD_BOOTCLOCKRUN_USDHC2_CLK_ROOT 198000000UL + /*! @brief Arm PLL set for BOARD_BootClockRUN configuration. */ extern const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN; diff --git a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/link-application.lds b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/link-application.lds new file mode 100644 index 000000000..6769453e6 --- /dev/null +++ b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/link-application.lds @@ -0,0 +1,264 @@ +/* +** ################################################################### +** Processors: MIMXRT1052CVJ5B +** MIMXRT1052CVL5B +** MIMXRT1052DVJ6B +** MIMXRT1052DVL6B +** +** Compiler: GNU C Compiler +** Reference manual: IMXRT1050RM Rev.1, 03/2018 +** Version: rev. 1.0, 2018-09-21 +** Build: b180921 +** +** Abstract: +** Linker file for the GNU C Compiler +** +** Copyright 2016 Freescale Semiconductor, Inc. +** Copyright 2016-2018 NXP +** All rights reserved. +** +** SPDX-License-Identifier: BSD-3-Clause +** +** http: www.nxp.com +** mail: support@nxp.com +** +** ################################################################### +*/ + + +/** +* @file link.lds +* @brief xidatong-arm32 Linker script +* @version 1.0 +* @author AIIT XUOS Lab +* @date 2021-05-28 +*/ + +/************************************************* +File name: link.lds +Description: xidatong-arm32 Linker script +Others: take MIMXRT1052xxxxx_flexspi_nor.ld for references +History: +1. Date: 2021-05-28 +Author: AIIT XUOS Lab +Modification: +1. add shell cmd table and g_service_table +*************************************************/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +STACK_SIZE = 0x4000; + +/* Specify the memory areas */ +MEMORY +{ + m_interrupts (RX) : ORIGIN = 0x60100000, LENGTH = 0x00000400 + m_text (RX) : ORIGIN = 0x60100400, LENGTH = 0x000FFC00 + + m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000 + m_data2 (RW) : ORIGIN = 0x20200000, LENGTH = 0x00060000 + + m_sdram (RW) : ORIGIN = 0x80000000, LENGTH = 0x01E00000 + m_nocache (RW) : ORIGIN = 0x81E00000, LENGTH = 0x00200000 +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into internal RAM */ + .interrupts : + { + __VECTOR_TABLE = .; + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } > m_interrupts + + __VECTOR_RAM = __VECTOR_TABLE; + __RAM_VECTOR_TABLE_SIZE_BYTES = 0x0; + + /* The program code and other data goes into internal RAM */ + .text : + { + . = ALIGN(4); + *(EXCLUDE_FILE( + /* Exclude flash and frequently executed functions from XIP */ + *fsl_romapi.o + *flash.o + ) .text) /* .text sections (code) */ + *(EXCLUDE_FILE( + /* Exclude flash and frequently executed functions from XIP */ + *fsl_romapi.o + *flash.o + ) .text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + KEEP (*(.init)) + KEEP (*(.fini)) + . = ALIGN(4); + + + /* section information for shell */ + . = ALIGN(4); + _shell_command_start = .; + KEEP (*(shellCommand)) + _shell_command_end = .; + . = ALIGN(4); + + __isrtbl_idx_start = .; + KEEP(*(.isrtbl.idx)) + __isrtbl_start = .; + KEEP(*(.isrtbl)) + __isrtbl_end = .; + . = ALIGN(4); + + PROVIDE(g_service_table_start = ABSOLUTE(.)); + KEEP(*(.g_service_table)) + PROVIDE(g_service_table_end = ABSOLUTE(.)); + } > m_text + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > m_text + + .ARM : + { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } > m_text + + .ctors : + { + __CTOR_LIST__ = .; + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. The wildcard also means that it + doesn't matter which directory crtbegin.o + is in. */ + KEEP (*crtbegin.o(.ctors)) + KEEP (*crtbegin?.o(.ctors)) + /* We don't want to include the .ctor section from + from the crtend.o file until after the sorted ctors. + The .ctor section from the crtend file contains the + end of ctors marker and it must be last */ + KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + __CTOR_END__ = .; + } > m_text + + .dtors : + { + __DTOR_LIST__ = .; + KEEP (*crtbegin.o(.dtors)) + KEEP (*crtbegin?.o(.dtors)) + KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + __DTOR_END__ = .; + } > m_text + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } > m_text + + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } > m_text + + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } > m_text + + __etext = .; /* define a global symbol at end of code */ + __DATA_ROM = .; /* Symbol is used by startup for data initialization */ + + .data : AT(__DATA_ROM) + { + . = ALIGN(4); + __DATA_RAM = .; + __data_start__ = .; /* create a global symbol at data start */ + /* Explicit placement of flash and frequently executed functions in RAM */ + *fsl_romapi.o + *flash.o + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + KEEP(*(.jcr*)) + . = ALIGN(4); + PROVIDE(_sramfuncs = ABSOLUTE(.)); + KEEP(*(RamFunction)) + PROVIDE(_eramfuncs = ABSOLUTE(.)); + __data_end__ = .; /* define a global symbol at data end */ + } > m_data + + __NDATA_ROM = __DATA_ROM + (__data_end__ - __data_start__); + .ncache.init : AT(__NDATA_ROM) + { + __noncachedata_start__ = .; /* create a global symbol at ncache data start */ + *(NonCacheable.init) + . = ALIGN(4); + __noncachedata_init_end__ = .; /* create a global symbol at initialized ncache data end */ + } > m_nocache + . = __noncachedata_init_end__; + .ncache : + { + *(NonCacheable) + . = ALIGN(4); + __noncachedata_end__ = .; /* define a global symbol at ncache data end */ + } > m_nocache + + __DATA_END = __NDATA_ROM + (__noncachedata_init_end__ - __noncachedata_start__); + text_end = ORIGIN(m_text) + LENGTH(m_text); + ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data") + + /* Uninitialized data section */ + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + . = ALIGN(4); + __START_BSS = .; + __bss_start__ = .; + *(.bss) + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + __END_BSS = .; + } > m_data + + .stack : + { + . = ALIGN(8); + stack_start = .; + . += STACK_SIZE; + stack_end = .; + __StackTop = .; + heap_start = .; + } > m_data2 + + PROVIDE(heap_end = ORIGIN(m_data2) + LENGTH(m_data2)); + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + diff --git a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/link-bootloader.lds b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/link-bootloader.lds new file mode 100644 index 000000000..4ce000519 --- /dev/null +++ b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/link-bootloader.lds @@ -0,0 +1,280 @@ +/* +** ################################################################### +** Processors: MIMXRT1052CVJ5B +** MIMXRT1052CVL5B +** MIMXRT1052DVJ6B +** MIMXRT1052DVL6B +** +** Compiler: GNU C Compiler +** Reference manual: IMXRT1050RM Rev.1, 03/2018 +** Version: rev. 1.0, 2018-09-21 +** Build: b180921 +** +** Abstract: +** Linker file for the GNU C Compiler +** +** Copyright 2016 Freescale Semiconductor, Inc. +** Copyright 2016-2018 NXP +** All rights reserved. +** +** SPDX-License-Identifier: BSD-3-Clause +** +** http: www.nxp.com +** mail: support@nxp.com +** +** ################################################################### +*/ + + +/** +* @file link.lds +* @brief xidatong-arm32 Linker script +* @version 1.0 +* @author AIIT XUOS Lab +* @date 2021-05-28 +*/ + +/************************************************* +File name: link.lds +Description: xidatong-arm32 Linker script +Others: take MIMXRT1052xxxxx_flexspi_nor.ld for references +History: +1. Date: 2021-05-28 +Author: AIIT XUOS Lab +Modification: +1. add shell cmd table and g_service_table +*************************************************/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +STACK_SIZE = 0x8000; + +/* Specify the memory areas */ +MEMORY +{ + m_boot_data (RX) : ORIGIN = 0x60000000, LENGTH = 0x00001000 + m_image_vertor_table (RX) : ORIGIN = 0x60001000, LENGTH = 0x00001000 + + /*bootloader*/ + m_interrupts (RX) : ORIGIN = 0x60002000, LENGTH = 0x00000400 + m_text (RX) : ORIGIN = 0x60002400, LENGTH = 0x0007DC00 + + m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000 + m_data2 (RW) : ORIGIN = 0x20200000, LENGTH = 0x00060000 + + m_sdram (RW) : ORIGIN = 0x80000000, LENGTH = 0x01E00000 + m_nocache (RW) : ORIGIN = 0x81E00000, LENGTH = 0x00200000 +} + +/* Define output sections */ +SECTIONS +{ + .boot_data : + { + KEEP(*(.boot_hdr.conf)) + } > m_boot_data + + .image_vertor_table : + { + KEEP(*(.boot_hdr.ivt)) + KEEP(*(.boot_hdr.boot_data)) + KEEP(*(.boot_hdr.dcd_data)) + } > m_image_vertor_table + + /* The startup code goes first into internal RAM */ + .interrupts : + { + __VECTOR_TABLE = .; + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } > m_interrupts + + __VECTOR_RAM = __VECTOR_TABLE; + __RAM_VECTOR_TABLE_SIZE_BYTES = 0x0; + + /* The program code and other data goes into internal RAM */ + .text : + { + . = ALIGN(4); + *(EXCLUDE_FILE( + /* Exclude flash and frequently executed functions from XIP */ + *fsl_romapi.o + *flash.o + ) .text) /* .text sections (code) */ + *(EXCLUDE_FILE( + /* Exclude flash and frequently executed functions from XIP */ + *fsl_romapi.o + *flash.o + ) .text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + KEEP (*(.init)) + KEEP (*(.fini)) + . = ALIGN(4); + + + /* section information for shell */ + . = ALIGN(4); + _shell_command_start = .; + KEEP (*(shellCommand)) + _shell_command_end = .; + . = ALIGN(4); + + __isrtbl_idx_start = .; + KEEP(*(.isrtbl.idx)) + __isrtbl_start = .; + KEEP(*(.isrtbl)) + __isrtbl_end = .; + . = ALIGN(4); + + PROVIDE(g_service_table_start = ABSOLUTE(.)); + KEEP(*(.g_service_table)) + PROVIDE(g_service_table_end = ABSOLUTE(.)); + } > m_text + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > m_text + + .ARM : + { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } > m_text + + .ctors : + { + __CTOR_LIST__ = .; + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. The wildcard also means that it + doesn't matter which directory crtbegin.o + is in. */ + KEEP (*crtbegin.o(.ctors)) + KEEP (*crtbegin?.o(.ctors)) + /* We don't want to include the .ctor section from + from the crtend.o file until after the sorted ctors. + The .ctor section from the crtend file contains the + end of ctors marker and it must be last */ + KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + __CTOR_END__ = .; + } > m_text + + .dtors : + { + __DTOR_LIST__ = .; + KEEP (*crtbegin.o(.dtors)) + KEEP (*crtbegin?.o(.dtors)) + KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + __DTOR_END__ = .; + } > m_text + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } > m_text + + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } > m_text + + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } > m_text + + __etext = .; /* define a global symbol at end of code */ + __DATA_ROM = .; /* Symbol is used by startup for data initialization */ + + .data : AT(__DATA_ROM) + { + . = ALIGN(4); + __DATA_RAM = .; + __data_start__ = .; /* create a global symbol at data start */ + /* Explicit placement of flash and frequently executed functions in RAM */ + *fsl_romapi.o + *flash.o + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + KEEP(*(.jcr*)) + . = ALIGN(4); + PROVIDE(_sramfuncs = ABSOLUTE(.)); + KEEP(*(RamFunction)) + PROVIDE(_eramfuncs = ABSOLUTE(.)); + __data_end__ = .; /* define a global symbol at data end */ + } > m_data + + __NDATA_ROM = __DATA_ROM + (__data_end__ - __data_start__); + .ncache.init : AT(__NDATA_ROM) + { + __noncachedata_start__ = .; /* create a global symbol at ncache data start */ + *(NonCacheable.init) + . = ALIGN(4); + __noncachedata_init_end__ = .; /* create a global symbol at initialized ncache data end */ + } > m_nocache + . = __noncachedata_init_end__; + .ncache : + { + *(NonCacheable) + . = ALIGN(4); + __noncachedata_end__ = .; /* define a global symbol at ncache data end */ + } > m_nocache + + __DATA_END = __NDATA_ROM + (__noncachedata_init_end__ - __noncachedata_start__); + text_end = ORIGIN(m_text) + LENGTH(m_text); + ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data") + + /* Uninitialized data section */ + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + . = ALIGN(4); + __START_BSS = .; + __bss_start__ = .; + *(.bss) + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + __END_BSS = .; + } > m_data + + .stack : + { + . = ALIGN(8); + stack_start = .; + . += STACK_SIZE; + stack_end = .; + __StackTop = .; + heap_start = .; + } > m_data + + PROVIDE(heap_end = ORIGIN(m_data) + LENGTH(m_data)); + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + diff --git a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/link.lds b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/link.lds index 1940e5b81..0147853db 100644 --- a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/link.lds +++ b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/link.lds @@ -260,5 +260,4 @@ SECTIONS PROVIDE(heap_end = ORIGIN(m_data2) + LENGTH(m_data2)); .ARM.attributes 0 : { *(.ARM.attributes) } -} - +} \ No newline at end of file diff --git a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/common/Makefile b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/common/Makefile index 7fda1f6bc..811164369 100755 --- a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/common/Makefile +++ b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/common/Makefile @@ -4,4 +4,8 @@ ifeq ($(CONFIG_BSP_USING_SDIO),y) SRC_FILES += fsl_usdhc.c endif +ifeq ($(CONFIG_TOOL_USING_OTA),y) + SRC_FILES += fsl_romapi.c flash.c mcuboot.c common.c ymodem.c +endif + include $(KERNEL_ROOT)/compiler.mk diff --git a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/common/clock_config.c b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/common/clock_config.c index 3e514b72e..b4c9a5fcd 100755 --- a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/common/clock_config.c +++ b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/common/clock_config.c @@ -78,11 +78,11 @@ outputs: - {id: ENET_25M_REF_CLK.outFreq, value: 1.2 MHz} - {id: FLEXIO1_CLK_ROOT.outFreq, value: 30 MHz} - {id: FLEXIO2_CLK_ROOT.outFreq, value: 30 MHz} -- {id: FLEXSPI_CLK_ROOT.outFreq, value: 2880/11 MHz} +- {id: FLEXSPI_CLK_ROOT.outFreq, value: 160 MHz} - {id: GPT1_ipg_clk_highfreq.outFreq, value: 75 MHz} - {id: GPT2_ipg_clk_highfreq.outFreq, value: 75 MHz} - {id: IPG_CLK_ROOT.outFreq, value: 150 MHz} -- {id: LCDIF_CLK_ROOT.outFreq, value: 67.5/7 MHz} +- {id: LCDIF_CLK_ROOT.outFreq, value: 67.5 MHz} - {id: LPI2C_CLK_ROOT.outFreq, value: 60 MHz} - {id: LPSPI_CLK_ROOT.outFreq, value: 105.6 MHz} - {id: LVDS1_CLK.outFreq, value: 1.2 GHz} @@ -108,10 +108,8 @@ outputs: settings: - {id: CCM.AHB_PODF.scale, value: '1', locked: true} - {id: CCM.ARM_PODF.scale, value: '2', locked: true} -- {id: CCM.FLEXSPI_PODF.scale, value: '1', locked: true} -- {id: CCM.FLEXSPI_SEL.sel, value: CCM_ANALOG.PLL3_PFD0_CLK} -- {id: CCM.LCDIF_PODF.scale, value: '8', locked: true} -- {id: CCM.LCDIF_PRED.scale, value: '7', locked: true} +- {id: CCM.FLEXSPI_PODF.scale, value: '3', locked: true} +- {id: CCM.FLEXSPI_SEL.sel, value: CCM.PLL3_SW_CLK_SEL} - {id: CCM.LPSPI_PODF.scale, value: '5', locked: true} - {id: CCM.PERCLK_PODF.scale, value: '2', locked: true} - {id: CCM.SEMC_PODF.scale, value: '8'} @@ -148,23 +146,20 @@ sources: /******************************************************************************* * Variables for BOARD_BootClockRUN configuration ******************************************************************************/ -const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN = - { - .loopDivider = 100, /* PLL loop divider, Fout = Fin * 50 */ - .src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */ - }; -const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN = - { - .loopDivider = 1, /* PLL loop divider, Fout = Fin * ( 20 + loopDivider*2 + numerator / denominator ) */ - .numerator = 0, /* 30 bit numerator of fractional loop divider */ - .denominator = 1, /* 30 bit denominator of fractional loop divider */ - .src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */ - }; -const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN = - { - .loopDivider = 0, /* PLL loop divider, Fout = Fin * 20 */ - .src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */ - }; +const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN = { + .loopDivider = 100, /* PLL loop divider, Fout = Fin * 50 */ + .src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */ +}; +const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN = { + .loopDivider = 1, /* PLL loop divider, Fout = Fin * ( 20 + loopDivider*2 + numerator / denominator ) */ + .numerator = 0, /* 30 bit numerator of fractional loop divider */ + .denominator = 1, /* 30 bit denominator of fractional loop divider */ + .src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */ +}; +const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN = { + .loopDivider = 0, /* PLL loop divider, Fout = Fin * 20 */ + .src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */ +}; /******************************************************************************* * Code for BOARD_BootClockRUN configuration ******************************************************************************/ @@ -229,9 +224,10 @@ void BOARD_BootClockRUN(void) CLOCK_SetDiv(kCLOCK_Usdhc2Div, 1); /* Set Usdhc2 clock source. */ CLOCK_SetMux(kCLOCK_Usdhc2Mux, 0); - /* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd. - * With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left unchanged. - * Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as well.*/ +/* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd. + * With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left + * unchanged. + * Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as well.*/ #ifndef SKIP_SYSCLK_INIT /* Disable Semc clock gate. */ CLOCK_DisableClock(kCLOCK_Semc); @@ -242,16 +238,17 @@ void BOARD_BootClockRUN(void) /* Set Semc clock source. */ CLOCK_SetMux(kCLOCK_SemcMux, 0); #endif - /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd. - * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged. - * Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/ +/* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd. + * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left + * unchanged. + * Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/ #if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1)) /* Disable Flexspi clock gate. */ CLOCK_DisableClock(kCLOCK_FlexSpi); /* Set FLEXSPI_PODF. */ - CLOCK_SetDiv(kCLOCK_FlexspiDiv, 0); + CLOCK_SetDiv(kCLOCK_FlexspiDiv, 2); /* Set Flexspi clock source. */ - CLOCK_SetMux(kCLOCK_FlexspiMux, 3); + CLOCK_SetMux(kCLOCK_FlexspiMux, 1); #endif /* Disable CSI clock gate. */ CLOCK_DisableClock(kCLOCK_Csi); @@ -331,9 +328,9 @@ void BOARD_BootClockRUN(void) /* Disable LCDIF clock gate. */ CLOCK_DisableClock(kCLOCK_LcdPixel); /* Set LCDIF_PRED. */ - CLOCK_SetDiv(kCLOCK_LcdifPreDiv, 6); + CLOCK_SetDiv(kCLOCK_LcdifPreDiv, 1); /* Set LCDIF_CLK_PODF. */ - CLOCK_SetDiv(kCLOCK_LcdifDiv, 7); + CLOCK_SetDiv(kCLOCK_LcdifDiv, 3); /* Set Lcdif pre clock source. */ CLOCK_SetMux(kCLOCK_LcdifPreMux, 5); /* Disable SPDIF clock gate. */ @@ -365,8 +362,9 @@ void BOARD_BootClockRUN(void) /* Init ARM PLL. */ CLOCK_InitArmPll(&armPllConfig_BOARD_BootClockRUN); /* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd. - * With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left unchanged. - * Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as well.*/ + * With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left + * unchanged. Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as + * well.*/ #ifndef SKIP_SYSCLK_INIT /* Init System PLL. */ CLOCK_InitSysPll(&sysPllConfig_BOARD_BootClockRUN); @@ -382,8 +380,9 @@ void BOARD_BootClockRUN(void) CCM_ANALOG->PLL_SYS &= ~CCM_ANALOG_PLL_SYS_PFD_OFFSET_EN_MASK; #endif /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd. - * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged. - * Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/ + * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left + * unchanged. Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as + * well.*/ #if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1)) /* Init Usb1 PLL. */ CLOCK_InitUsb1Pll(&usb1PllConfig_BOARD_BootClockRUN); @@ -420,7 +419,8 @@ void BOARD_BootClockRUN(void) /* Bypass Enet PLL. */ CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllEnet, 1); /* Set Enet output divider. */ - CCM_ANALOG->PLL_ENET = (CCM_ANALOG->PLL_ENET & (~CCM_ANALOG_PLL_ENET_DIV_SELECT_MASK)) | CCM_ANALOG_PLL_ENET_DIV_SELECT(1); + CCM_ANALOG->PLL_ENET = + (CCM_ANALOG->PLL_ENET & (~CCM_ANALOG_PLL_ENET_DIV_SELECT_MASK)) | CCM_ANALOG_PLL_ENET_DIV_SELECT(1); /* Enable Enet output. */ CCM_ANALOG->PLL_ENET |= CCM_ANALOG_PLL_ENET_ENABLE_MASK; /* Enable Enet25M output. */ @@ -440,7 +440,8 @@ void BOARD_BootClockRUN(void) /* Set per clock source. */ CLOCK_SetMux(kCLOCK_PerclkMux, 0); /* Set lvds1 clock source. */ - CCM_ANALOG->MISC1 = (CCM_ANALOG->MISC1 & (~CCM_ANALOG_MISC1_LVDS1_CLK_SEL_MASK)) | CCM_ANALOG_MISC1_LVDS1_CLK_SEL(0); + CCM_ANALOG->MISC1 = + (CCM_ANALOG->MISC1 & (~CCM_ANALOG_MISC1_LVDS1_CLK_SEL_MASK)) | CCM_ANALOG_MISC1_LVDS1_CLK_SEL(0); /* Set clock out1 divider. */ CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_DIV_MASK)) | CCM_CCOSR_CLKO1_DIV(0); /* Set clock out1 source. */ @@ -466,7 +467,7 @@ void BOARD_BootClockRUN(void) /* Set SAI3 MCLK3 clock source. */ IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI3MClk3Sel, 0); /* Set MQS configuration. */ - IOMUXC_MQSConfig(IOMUXC_GPR,kIOMUXC_MqsPwmOverSampleRate32, 0); + IOMUXC_MQSConfig(IOMUXC_GPR, kIOMUXC_MqsPwmOverSampleRate32, 0); /* Set ENET Tx clock source. */ IOMUXC_EnableMode(IOMUXC_GPR, kIOMUXC_GPR_ENET1RefClkMode, false); /* Set GPT1 High frequency reference clock source. */ @@ -476,4 +477,3 @@ void BOARD_BootClockRUN(void) /* Set SystemCoreClock variable. */ SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK; } - diff --git a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/common/common.c b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/common/common.c new file mode 100644 index 000000000..c85f9ba88 --- /dev/null +++ b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/common/common.c @@ -0,0 +1,301 @@ + +/* +* Copyright (c) 2020 AIIT XUOS Lab +* XiUOS is licensed under Mulan PSL v2. +* You can use this software according to the terms and conditions of the Mulan PSL v2. +* You may obtain a copy of Mulan PSL v2 at: +* http://license.coscl.org.cn/MulanPSL2 +* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, +* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, +* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. +* See the Mulan PSL v2 for more details. +*/ + +/** +* @file: common.c +* @brief: file common.c +* @version: 1.0 +* @author: AIIT XUOS Lab +* @date: 2023/3/24 +*/ + + +#include "common.h" + +static uint32_t UartSrcFreq(void) +{ + uint32_t freq; + + if (CLOCK_GetMux(kCLOCK_UartMux) == 0){ + freq = (CLOCK_GetPllFreq(kCLOCK_PllUsb1) / 6U) / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U); + } else { + freq = CLOCK_GetOscFreq() / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U); + } + + return freq; +} + + +void UartConfig(void) +{ + lpuart_config_t config; + LPUART_GetDefaultConfig(&config); + config.baudRate_Bps = 115200u; + config.enableTx = true; + config.enableRx = true; + + LPUART_Init(LPUART1, &config, UartSrcFreq()); +} + + +/** + * @brief Convert an Integer to a string + * @param str: The string + * @param intnum: The intger to be converted + * @retval None + */ +void Int2Str(uint8_t* str, int32_t intnum) +{ + uint32_t i, Div = 1000000000, j = 0, Status = 0; + + for (i = 0; i < 10; i++) + { + str[j++] = (intnum / Div) + 48; + + intnum = intnum % Div; + Div /= 10; + if ((str[j-1] == '0') & (Status == 0)) + { + j = 0; + } + else + { + Status++; + } + } +} + +/** + * @brief Convert a string to an integer + * @param inputstr: The string to be converted + * @param intnum: The intger value + * @retval 1: Correct + * 0: Error + */ +uint32_t Str2Int(uint8_t *inputstr, int32_t *intnum) +{ + uint32_t i = 0, res = 0; + uint32_t val = 0; + + if (inputstr[0] == '0' && (inputstr[1] == 'x' || inputstr[1] == 'X')) + { + if (inputstr[2] == '\0') + { + return 0; + } + for (i = 2; i < 11; i++) + { + if (inputstr[i] == '\0') + { + *intnum = val; + /* return 1; */ + res = 1; + break; + } + if (ISVALIDHEX(inputstr[i])) + { + val = (val << 4) + CONVERTHEX(inputstr[i]); + } + else + { + /* return 0, Invalid input */ + res = 0; + break; + } + } + /* over 8 digit hex --invalid */ + if (i >= 11) + { + res = 0; + } + } + else /* max 10-digit decimal input */ + { + for (i = 0;i < 11;i++) + { + if (inputstr[i] == '\0') + { + *intnum = val; + /* return 1 */ + res = 1; + break; + } + else if ((inputstr[i] == 'k' || inputstr[i] == 'K') && (i > 0)) + { + val = val << 10; + *intnum = val; + res = 1; + break; + } + else if ((inputstr[i] == 'm' || inputstr[i] == 'M') && (i > 0)) + { + val = val << 20; + *intnum = val; + res = 1; + break; + } + else if (ISVALIDDEC(inputstr[i])) + { + val = val * 10 + CONVERTDEC(inputstr[i]); + } + else + { + /* return 0, Invalid input */ + res = 0; + break; + } + } + /* Over 10 digit decimal --invalid */ + if (i >= 11) + { + res = 0; + } + } + + return res; +} + +/** + * @brief Get an integer from the HyperTerminal + * @param num: The inetger + * @retval 1: Correct + * 0: Error + */ +uint32_t GetIntegerInput(int32_t * num) +{ + uint8_t inputstr[16]; + + while (1) + { + GetInputString(inputstr); + if (inputstr[0] == '\0') continue; + if ((inputstr[0] == 'a' || inputstr[0] == 'A') && inputstr[1] == '\0') + { + Serial_PutString("User Cancelled \r\n"); + return 0; + } + + if (Str2Int(inputstr, num) == 0) + { + Serial_PutString("Error, Input again: \r\n"); + } + else + { + return 1; + } + } +} + +/** + * @brief Test to see if a key has been pressed on the HyperTerminal + * @param key: The key pressed + * @retval 1: Correct + * 0: Error + */ +uint32_t SerialKeyPressed(uint8_t *key) +{ + if ((kLPUART_RxDataRegFullFlag)&LPUART_GetStatusFlags(LPUART1)) + { + *key = LPUART_ReadByte(LPUART1); + return 1; + } + else + { + return 0; + } +} + +/** + * @brief Get a key from the HyperTerminal + * @param None + * @retval The Key Pressed + */ +uint8_t GetKey(void) +{ + uint8_t key = 0; + + /* Waiting for user input */ + while (1) + { + if (SerialKeyPressed((uint8_t*)&key)) break; + } + return key; + +} + +/** + * @brief Print a character on the HyperTerminal + * @param c: The character to be printed + * @retval None + */ +void SerialPutChar(uint8_t c) +{ + LPUART_WriteByte(LPUART1,c); + while(!(kLPUART_TxDataRegEmptyFlag & LPUART_GetStatusFlags(LPUART1))) + { + } +} + +/** + * @brief Print a string on the HyperTerminal + * @param s: The string to be printed + * @retval None + */ +void Serial_PutString(uint8_t *s) +{ + while (*s != '\0') + { + SerialPutChar(*s); + s++; + } +} + +/** + * @brief Get Input string from the HyperTerminal + * @param buffP: The input string + * @retval None + */ +void GetInputString (uint8_t * buffP) +{ + uint32_t bytes_read = 0; + uint8_t c = 0; + do + { + c = GetKey(); + if (c == '\r') + break; + if (c == '\b') /* Backspace */ + { + if (bytes_read > 0) + { + Serial_PutString("\b \b"); + bytes_read --; + } + continue; + } + if (bytes_read >= CMD_STRING_SIZE ) + { + Serial_PutString("Command string size overflow\r\n"); + bytes_read = 0; + continue; + } + if (c >= 0x20 && c <= 0x7E) + { + buffP[bytes_read++] = c; + SerialPutChar(c); + } + } + while (1); + Serial_PutString(("\n\r")); + buffP[bytes_read] = '\0'; +} diff --git a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/common/flash.c b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/common/flash.c new file mode 100644 index 000000000..b10baee6b --- /dev/null +++ b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/common/flash.c @@ -0,0 +1,1059 @@ +/* + * Copyright 2018-2020 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/** +* @file fsl_flash.c +* @brief support flexspi norflash function +* @version 2.0 +* @author AIIT XUOS Lab +* @date 2023-04-03 +*/ + +#include +#include "flash.h" +#include "MIMXRT1052.h" + +uint8_t NorFlash_BUFFER[4096]; //4K buffer cache +uint8_t buffer[FLASH_PAGE_SIZE]; //256 bytes buffer cache +/******************************************************************************* + * Prototypes + ******************************************************************************/ +static status_t Flexspi_Nor_Wait_Busy(uint32_t instance, uint32_t baseAddr); +static status_t Flexspi_Nor_Write_Enable(uint32_t instance, uint32_t baseAddr); +static void flexspi_clock_config(uint32_t instance, uint32_t freq, uint32_t sampleClkMode); +static void flexspi_clock_gate_enable(void); +static void flexspi_clock_gate_disable(void); +static status_t flexspi_get_clock(uint32_t instance, flexspi_clock_type_t type, uint32_t *freq); +static status_t flexspi_get_ticks(uint32_t *ticks, uint32_t intervalNs, uint32_t freq, uint32_t unit); +static status_t flexspi_configure_dll(uint32_t instance, flexspi_mem_config_t *config); +static status_t flexspi_config_mcr1(uint32_t instance, flexspi_mem_config_t *config); + +static const lookuptable_t FlashLookupTable={ +.ReadStatus_Seq= +{ + FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x04), +}, +/* Write Enable */ +.WriteEnable_Seq= +{ + FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06, STOP, FLEXSPI_1PAD, 0x00), +}, +/* Erase Sector */ +.EraseSector_Seq= +{ + FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x20, RADDR_SDR, FLEXSPI_1PAD, 0x18), +}, +/* Page Program */ +.PageProgram_Seq= +{ + FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x32, RADDR_SDR, FLEXSPI_1PAD, 0x18), + FSL_ROM_FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_4PAD, 0x00, 0x00, 0x00, 0x00), +}, +}; + + +/******************************************************************************* +* 函 数 名: Flexspi_Nor_Wait_Busy +* 功能描述: 等待FlexSPI NOR Flash忙碌状态结束 +* 形 参: instance:FlexSPI实例号 + baseAddr:开始读取的Flash地址(32bit) +* 返 回 值: 如果函数执行成功,状态值为 kStatus_Success,否则状态值为其他错误码 +*******************************************************************************/ +static status_t Flexspi_Nor_Wait_Busy(uint32_t instance, uint32_t baseAddr) +{ + status_t status = kStatus_InvalidArgument; + flexspi_xfer_t flashXfer; + uint32_t statusDataBuffer; + uint32_t busyMask; + uint32_t busyPolarity; + bool isBusy = false; + + flashXfer.operation = kFLEXSPIOperation_Read; + flashXfer.seqNum = 1; + busyMask = 1; + busyPolarity = 0; + flashXfer.seqId = NOR_CMD_LUT_SEQ_IDX_READSTATUS; + flashXfer.isParallelModeEnable = false; + flashXfer.baseAddress = baseAddr; + flashXfer.rxBuffer = &statusDataBuffer; + flashXfer.rxSize = sizeof(statusDataBuffer); + do + { + status = ROM_FLEXSPI_NorFlash_CommandXfer(instance, &flashXfer); + // Busy bit is 0 if polarity is 1 + if(busyPolarity) + { + isBusy = (~statusDataBuffer) & busyMask; + } + else + { + isBusy = statusDataBuffer & busyMask; + } + }while (isBusy); + + return status; +} + + +/******************************************************************************* +* 函 数 名: Flexspi_Nor_Write_Enable +* 功能描述: 使能 FlexSPI NOR Flash的写入操作 +* 形 参: instance:FlexSPI实例号 + baseAddr:开始读取的Flash地址(32bit) +* 返 回 值: 如果函数执行成功,状态值为 kStatus_Success,否则状态值为其他错误码 +*******************************************************************************/ +static status_t Flexspi_Nor_Write_Enable(uint32_t instance, uint32_t baseAddr) +{ + status_t status = kStatus_InvalidArgument; + flexspi_xfer_t flashXfer; + + flashXfer.operation = kFLEXSPIOperation_Command; + flashXfer.seqNum = 1; + flashXfer.seqId = NOR_CMD_LUT_SEQ_IDX_WRITEENABLE; + flashXfer.isParallelModeEnable = false; + flashXfer.baseAddress = baseAddr; + + status = ROM_FLEXSPI_NorFlash_CommandXfer(instance, &flashXfer); + + return status; +} + + +/******************************************************************************* +* 函 数 名: flexspi_clock_config +* 功能描述: 配置FlexSPI模块的时钟 +* 形 参: instance:FlexSPI实例号 + freq:表示所需的FlexSPI时钟频率 + sampleClkMode:指定FlexSPI时钟的采样时钟模式,可以选择SDR或DDR模式 +* 返 回 值: 如果函数执行成功,状态值为 kStatus_Success,否则状态值为其他错误码 +*******************************************************************************/ +static void flexspi_clock_config(uint32_t instance, uint32_t freq, uint32_t sampleClkMode) +{ + uint32_t pfd480 = 0; + uint32_t cscmr1 = 0; + uint32_t frac = 0; + uint32_t podf = 0; + + typedef struct _flexspi_clock_param + { + uint8_t frac; + uint8_t podf; + } flexspi_clock_param_t; + + const flexspi_clock_param_t k_sdr_clock_config[kFLEXSPISerialClk_200MHz + 1] = { + //Reserved, 30MHz 50MHz 60MHz 75MHz 80MHz 100MHz 133MHz 166MHz 200MHz + {0, 0}, {34, 8}, {22, 8}, {24, 6}, {30, 4}, {18, 6}, {14, 6}, {17, 4}, {26, 2}, {22, 2} + }; + const flexspi_clock_param_t k_ddr_clock_config[kFLEXSPISerialClk_200MHz + 1] = { + //Reserved, 30MHz 50MHz 60MHz 75MHz 80MHz 100MHz 133MHz 166MHz 200MHz + {0, 0}, {24, 6}, {22, 4}, {12, 6}, {30, 2}, {18, 3}, {22, 2}, {33, 1}, {26, 1}, {22, 1} + }; + + do + { + if((sampleClkMode != kFLEXSPIClk_SDR) && (sampleClkMode != kFLEXSPIClk_DDR)) + { + break; + } + + pfd480 = CCM_ANALOG->PFD_480 & (~CCM_ANALOG_PFD_480_PFD0_FRAC_MASK); + cscmr1 = CCM->CSCMR1 & (~CCM_CSCMR1_FLEXSPI_PODF_MASK); + + const flexspi_clock_param_t *flexspi_config_array = NULL; + if(sampleClkMode == kFLEXSPIClk_SDR) + { + flexspi_config_array = &k_sdr_clock_config[0]; + } + else + { + flexspi_config_array = &k_ddr_clock_config[0]; + } + + if(freq >= kFLEXSPISerialClk_30MHz) + { + if(freq > kFLEXSPISerialClk_200MHz) + { + freq = kFLEXSPISerialClk_30MHz; + } + + frac = flexspi_config_array[freq].frac; + podf = flexspi_config_array[freq].podf; + + pfd480 |= CCM_ANALOG_PFD_480_PFD0_FRAC(frac); + cscmr1 |= CCM_CSCMR1_FLEXSPI_PODF(podf - 1); + + FLEXSPI->MCR0 |= FLEXSPI_MCR0_MDIS_MASK; + flexspi_clock_gate_disable(); + + if(pfd480 != CCM_ANALOG->PFD_480) + { + CCM_ANALOG->PFD_480 = pfd480; + } + if(cscmr1 != CCM->CSCMR1) + { + CCM->CSCMR1 = cscmr1; + } + flexspi_clock_gate_enable(); + FLEXSPI->MCR0 &= ~FLEXSPI_MCR0_MDIS_MASK; + } + else + { + //Do nothing + } + } while (0); +} + + +/******************************************************************************* +* 函 数 名: flexspi_clock_gate_enable +* 功能描述: 开启FlexSPI模块的时钟门控 +* 形 参: 无 +* 返 回 值: 无 +*******************************************************************************/ +static void flexspi_clock_gate_enable(void) +{ + CCM->CCGR6 |= CCM_CCGR6_CG5_MASK; +} + + +/******************************************************************************* +* 函 数 名: flexspi_clock_gate_disable +* 功能描述: 关闭FlexSPI模块的时钟门控 +* 形 参: 无 +* 返 回 值: 无 +*******************************************************************************/ +static void flexspi_clock_gate_disable(void) +{ + CCM->CCGR6 &= (uint32_t)~CCM_CCGR6_CG5_MASK; +} + + +/******************************************************************************* +* 函 数 名: flexspi_get_clock +* 功能描述: 获取FlexSPI时钟频率 +* 形 参: instance:FlexSPI实例号 + type:所需时钟类型 + freq:用于存储获取到的时钟频率类型 +* 返 回 值: 如果函数执行成功,状态值为 kStatus_Success,否则状态值为其他错误码 +*******************************************************************************/ +static status_t flexspi_get_clock(uint32_t instance, flexspi_clock_type_t type, uint32_t *freq) +{ + uint32_t clockFrequency = 0; + status_t status = kStatus_Success; + + uint32_t ahbBusDivider; + uint32_t seralRootClkDivider; + uint32_t arm_clock = SystemCoreClock; + + switch (type) + { + case kFlexSpiClock_CoreClock: + clockFrequency = SystemCoreClock; + break; + case kFlexSpiClock_AhbClock: + { + // Note: In I.MXRT_512, actual AHB clock is IPG_CLOCK_ROOT + ahbBusDivider = ((CCM->CBCDR & CCM_CBCDR_IPG_PODF_MASK) >> CCM_CBCDR_IPG_PODF_SHIFT) + 1; + clockFrequency = arm_clock / ahbBusDivider; + } + break; + case kFlexSpiClock_SerialRootClock: + { + uint32_t pfdFrac; + uint32_t pfdClk; + + // FLEXPI CLK SEL + uint32_t flexspi_clk_src = + (CCM->CSCMR1 & CCM_CSCMR1_FLEXSPI_CLK_SEL_MASK) >> CCM_CSCMR1_FLEXSPI_CLK_SEL_SHIFT; + + // PLL_480_PFD0 + pfdFrac = (CCM_ANALOG->PFD_480 & CCM_ANALOG_PFD_480_PFD0_FRAC_MASK) >> CCM_ANALOG_PFD_480_PFD0_FRAC_SHIFT; + pfdClk = (480000000UL) / pfdFrac * 18; + + seralRootClkDivider = ((CCM->CSCMR1 & CCM_CSCMR1_FLEXSPI_PODF_MASK) >> CCM_CSCMR1_FLEXSPI_PODF_SHIFT) + 1; + + clockFrequency = pfdClk / seralRootClkDivider; + } + break; + default: + status = kStatus_InvalidArgument; + break; + } + *freq = clockFrequency; + + return status; +} + + +/******************************************************************************* +* 函 数 名: flexspi_get_ticks +* 功能描述: 计算FlexSPI时钟周期数 +* 形 参: ticks:用于存储计算结果的指针,即所需的时钟周期数; + intervalNs:所需的时间间隔,以纳秒(ns)为单位; + freq:FlexSPI时钟频率,单位为MHz; + unit:时钟周期单位,即计算结果中每个时钟周期代表的时间长度,以ns为单位 +* 返 回 值: 如果函数执行成功,状态值为 kStatus_Success,否则状态值为其他错误码 +*******************************************************************************/ +static status_t flexspi_get_ticks(uint32_t *ticks, uint32_t intervalNs, uint32_t freq, uint32_t unit) +{ + status_t status = kStatus_InvalidArgument; + do + { + if((ticks == NULL) || (freq < 1) || (unit < 1)) + { + break; + } + + // Get clock cycle in terms of ns + int32_t calculatedTicks; + uint32_t cycleNs = FLEXSPI_FREQ_1GHz / freq; + + calculatedTicks = intervalNs / (cycleNs * unit); + while(calculatedTicks * cycleNs * unit < intervalNs) + { + calculatedTicks++; + } + + *ticks = calculatedTicks; + + status = kStatus_Success; + + } while (0); + + return status; +} + + +/******************************************************************************* +* 函 数 名: flexspi_configure_dll +* 功能描述: 用来配置FLEXSPI存储器的DLL(延迟锁存器) +* 形 参: instance:FLEXSPI实例号 + config:存储器配置信息,包括读取时钟源、数据有效时间等参数 +* 返 回 值: 如果函数执行成功,状态值为 kStatus_Success,否则状态值为其他错误码 +*******************************************************************************/ +static status_t flexspi_configure_dll(uint32_t instance, flexspi_mem_config_t *config) +{ + status_t status = kStatus_InvalidArgument; + bool mdisConfigRequired; + + do + { + bool isUnifiedConfig = true; + uint32_t flexspiRootClk; + uint32_t flexspiDll[2]; + uint32_t dllValue; + uint32_t temp; + if(config->readSampleClkSrc > kFLEXSPIReadSampleClk_ExternalInputFromDqsPad) + { + break; + } + switch (config->readSampleClkSrc) + { + case kFLEXSPIReadSampleClk_LoopbackInternally: + case kFLEXSPIReadSampleClk_LoopbackFromDqsPad: + case kFLEXSPIReadSampleClk_LoopbackFromSckPad: + isUnifiedConfig = true; + break; + case kFLEXSPIReadSampleClk_ExternalInputFromDqsPad: + isUnifiedConfig = false; + break; + default: // Never reach here + break; + } + + if(isUnifiedConfig) + { + flexspiDll[0] = FLEXSPI_DLLCR_DEFAULT; // 1 fixed delay cells in DLL delay chain) + flexspiDll[1] = FLEXSPI_DLLCR_DEFAULT; // 1 fixed delay cells in DLL delay chain) + } + else + { + flexspi_get_clock(instance, kFlexSpiClock_SerialRootClock, &flexspiRootClk); + + bool useDLL = false; + + //See FlexSPI Chapter for more details + if((flexspiRootClk >= 100 * FREQ_1MHz) && + (!(config->controllerMiscOption & (1U << kFLEXSPIMiscOffset_UseValidTimeForAllFreq)))) + { + useDLL = true; + } + if(useDLL) + { + flexspiDll[0] = FLEXSPI_DLLCR_DLLEN(1) | FLEXSPI_DLLCR_SLVDLYTARGET(0x0F); + flexspiDll[1] = FLEXSPI_DLLCR_DLLEN(1) | FLEXSPI_DLLCR_SLVDLYTARGET(0x0F); + } + else + { + for(uint32_t i = 0; i < 2; i++) + { + uint32_t dataValidTimeH = config->dataValidTime[i].delay_cells; + uint32_t dataValidTimeL = config->dataValidTime[i].time_100ps; + if(dataValidTimeH < 1) + { + // Convert the data valid time to n ps. + temp = dataValidTimeL * 100ul; + if(temp < 1) + { + uint32_t maxFreq = (166UL * 1000 * 1000); + bool is_ddr_enabled = (config->controllerMiscOption & 1<< kFLEXSPIMiscOffset_DdrModeEnable)?true:false; + /* For SDR mode, the delay cell configuration must ensure that the delay time is greater + than Half cycle of max supported frequency*/ + if(!is_ddr_enabled) + { + dllValue = FLEXSPI_FREQ_1GHz / maxFreq / 2 * 1000 / kFlexSpiDelayCellUnit_Min + 1; + } + /* For SDR mode, the delay cell configuration must ensure that the delay time is greater + than 1/4 cycle of max supported frequency */ + else + { + dllValue = FLEXSPI_FREQ_1GHz / maxFreq / 4 * 1000 / kFlexSpiDelayCellUnit_Min + 1; + } + } + else + { + dllValue = temp / kFlexSpiDelayCellUnit_Min; + if(dllValue * kFlexSpiDelayCellUnit_Min < temp) + { + dllValue++; + } + } + } + else + { + dllValue = dataValidTimeH; + } + // Calculate maximum dll value; + temp = (FLEXSPI_DLLCR_OVRDVAL_MASK >> FLEXSPI_DLLCR_OVRDVAL_SHIFT); + if(dllValue > temp) + { + dllValue = temp; + } + flexspiDll[i] = FLEXSPI_DLLCR_OVRDEN(1) | FLEXSPI_DLLCR_OVRDVAL(dllValue); + } + } + } + + if(FLEXSPI->MCR0 & FLEXSPI_MCR0_MDIS_MASK) + { + mdisConfigRequired = false; + } + else + { + mdisConfigRequired = true; + } + + if(mdisConfigRequired) + { + FLEXSPI->MCR0 |= FLEXSPI_MCR0_MDIS_MASK; + } + + FLEXSPI->DLLCR[0] = flexspiDll[0]; + FLEXSPI->DLLCR[1] = flexspiDll[1]; + + if(mdisConfigRequired) + { + FLEXSPI->MCR0 &= (uint32_t)~FLEXSPI_MCR0_MDIS_MASK; + } + /* Wait at least 100 NOPs*/ + for(uint8_t delay = 100U; delay > 0U; delay--) + { + __NOP(); + } + status = kStatus_Success; + } while (0); + + return status; +} + + +/******************************************************************************* +* 函 数 名: flexspi_config_mcr1 +* 功能描述: 配置FlexSPI模块的MCR1寄存器 +* 形 参: instance:FLEXSPI实例号 + onfig指向FlexSPI存储器配置结构体的指针 +* 返 回 值: 如果函数执行成功,状态值为 kStatus_Success,否则状态值为其他错误码 +*******************************************************************************/ +static status_t flexspi_config_mcr1(uint32_t instance, flexspi_mem_config_t *config) +{ + uint32_t seqWaitTicks = 0xFFFFu; + uint32_t ahbBusWaitTicks = 0xFFFFu; + uint32_t serialRootClockFreq; + uint32_t ahbBusClockFreq; + + if(config == NULL) + { + return kStatus_InvalidArgument; + } + + flexspi_get_clock(instance, kFlexSpiClock_SerialRootClock, &serialRootClockFreq); + flexspi_get_clock(instance, kFlexSpiClock_AhbClock, &ahbBusClockFreq); + flexspi_get_ticks(&seqWaitTicks, FLEXSPI_WAIT_TIMEOUT_NS, serialRootClockFreq, 1024); + flexspi_get_ticks(&ahbBusWaitTicks, FLEXSPI_WAIT_TIMEOUT_NS, ahbBusClockFreq, 1024); + + if(seqWaitTicks > 0xFFFF) + { + seqWaitTicks = 0xFFFF; + } + if(ahbBusWaitTicks > 0xFFFF) + { + ahbBusWaitTicks = 0xFFFF; + } + + // Configure MCR1 + FLEXSPI->MCR1 = FLEXSPI_MCR1_SEQWAIT(seqWaitTicks) | FLEXSPI_MCR1_AHBBUSWAIT(ahbBusWaitTicks); + + return kStatus_Success; +} + + +/******************************************************************************* +* 函 数 名: FLASH_GetSectorSize +* 功能描述: 获取扇区大小 +* 形 参: 无 +* 返 回 值: 返回扇区大小,HYPER FLASH为64K字节,NOR FLASH为4K字节 +*******************************************************************************/ +uint32_t FLASH_GetSectorSize(void) +{ +#ifndef HYPER_FLASH + return 4096;//QSPI Flash Sector Size +#else + return 256*1024UL;//Hyper Flash Sector Size +#endif +} + + +/******************************************************************************* +* 函 数 名: FLASH_GetProgramCmd +* 功能描述: 获取页大小 +* 形 参: 无 +* 返 回 值: 返回页大小,HYPER FLASH为512字节,NOR FLASH为256字节 +*******************************************************************************/ +uint32_t FLASH_GetProgramCmd(void) +{ + uint32_t Program_Unit; +#ifndef HYPER_FLASH + Program_Unit = 256;//QSPI Flash Page Program +#else + Program_Unit = 512;//Hyper Flash Page Program +#endif + + return Program_Unit; +} + + +/******************************************************************************* +* 函 数 名: FLASH_Init +* 功能描述: Flash接口初始化,需在进行Flash相关操作前进行调用 +* 形 参: 无 +* 返 回 值: 无 +*******************************************************************************/ +void FLASH_Init(void) +{ + /* Update LUT Table for Status, Write Enable, Erase and Program */ + ROM_FLEXSPI_NorFlash_UpdateLut(0, NOR_CMD_LUT_SEQ_IDX_READSTATUS, (const uint32_t *)FlashLookupTable.ReadStatus_Seq, 10U); + /* Use 30MHz Flexspi clock for safe operation */ + flexspi_clock_config(0, kFLEXSPISerialClk_30MHz, kFLEXSPIClk_DDR); + extern flexspi_nor_config_t Qspiflash_config; + flexspi_config_mcr1(0, &Qspiflash_config.memConfig); + flexspi_configure_dll(0, &Qspiflash_config.memConfig); + ROM_FLEXSPI_NorFlash_ClearCache(0); +} + + +/******************************************************************************* +* 函 数 名: FLASH_DeInit +* 功能描述: Flash接口反初始化,需在完成Flash相关操作后进行调用 +* 形 参: 无 +* 返 回 值: 无 +*******************************************************************************/ +void FLASH_DeInit(void) +{ + lookuptable_t clearlut; + memset(&clearlut, 0, sizeof(lookuptable_t)); + ROM_FLEXSPI_NorFlash_UpdateLut(0, NOR_CMD_LUT_SEQ_IDX_READSTATUS, (const uint32_t *)FlashLookupTable.ReadStatus_Seq, 10U); + /* Use 30MHz Flexspi clock for safe operation */ + flexspi_clock_config(0, kFLEXSPISerialClk_30MHz, kFLEXSPIClk_DDR); +} + + +/******************************************************************************* +* 函 数 名: FLASH_EraseSector +* 功能描述: 擦除一个Flash扇区 +* 形 参: addr:擦除区域起始地址 +* 返 回 值: None +* 注 释: 擦除一个扇区的最少时间:30ms~200/400ms +*******************************************************************************/ +uint8_t FLASH_EraseSector(uint32_t addr) +{ + status_t status; + flexspi_xfer_t flashXfer; + addr &= 0x0FFFFFFF; + + flashXfer.operation = kFLEXSPIOperation_Command; + flashXfer.seqNum = 1; + flashXfer.seqId = NOR_CMD_LUT_SEQ_IDX_ERASESECTOR; + flashXfer.baseAddress = addr; + flashXfer.isParallelModeEnable = false; + + __disable_irq(); + status = Flexspi_Nor_Write_Enable(0, addr); + status = ROM_FLEXSPI_NorFlash_CommandXfer(0, &flashXfer); + status = Flexspi_Nor_Wait_Busy(0, addr); + ROM_FLEXSPI_NorFlash_ClearCache(0); + __enable_irq(); + + return status; +} + + +/******************************************************************************* +* 函 数 名: FLASH_WritePage +* 功能描述: 写Flash一个页 +* 形 参: addr:写入区域起始地址 + buf:数据存储区 + len:要写入的字节数(最大256) +* 返 回 值: 如果函数执行成功,状态值为 kStatus_Success,否则状态值为其他错误码 +* 注 释: 在指定地址开始写入最大256字节的数据 +*******************************************************************************/ +uint8_t FLASH_WritePage(uint32_t addr, const uint32_t *buf, uint32_t len) +{ + status_t status; + flexspi_xfer_t flashXfer; + addr &= 0x0FFFFFFF; + + + flashXfer.operation = kFLEXSPIOperation_Write; + flashXfer.seqNum = 1; + flashXfer.seqId = NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM; + flashXfer.baseAddress = addr; + flashXfer.isParallelModeEnable = false; + flashXfer.txBuffer = (uint32_t *)buf; + flashXfer.txSize = len; + + __disable_irq(); + status = Flexspi_Nor_Write_Enable(0, addr); + status = ROM_FLEXSPI_NorFlash_CommandXfer(0, &flashXfer); + status = Flexspi_Nor_Wait_Busy(0, addr); + ROM_FLEXSPI_NorFlash_ClearCache(0); + __enable_irq(); + + return status; +} + + +/******************************************************************************* +* 函 数 名: FLASH_Read +* 功能描述: 读Flash内容 +* 形 参: addr:读取区域起始地址 + buf:数据存储区 + len:要读取的字节数 +* 返 回 值: 如果函数执行成功,状态值为 kStatus_Success,否则状态值为其他错误码 +*******************************************************************************/ +status_t FLASH_Read(uint32_t addr, uint32_t *buf, uint32_t len) +{ + status_t status; + flexspi_xfer_t flashXfer; + + addr &= 0x0FFFFFFF; + + flashXfer.operation = kFLEXSPIOperation_Read; + flashXfer.seqNum = 1; + flashXfer.seqId = NOR_CMD_LUT_SEQ_IDX_READ; + flashXfer.baseAddress = addr; + flashXfer.isParallelModeEnable = false; + flashXfer.rxBuffer = buf; + flashXfer.rxSize = len; + + __disable_irq(); + ROM_FLEXSPI_NorFlash_ClearCache(0); + status = ROM_FLEXSPI_NorFlash_CommandXfer(0, &flashXfer); + __enable_irq(); + + return status; +} + + +/******************************************************************************* +* 函 数 名: flash_erase +* 功能描述: 擦除Flash指定长度的空间 +* 形 参: addr:擦除区域起始地址 + byte_cnt:要擦除的字节数,以4k字节为最小擦除单位 +* 返 回 值: 如果函数执行成功,状态值为 kStatus_Success,否则状态值为其他错误码 +* 注 释: 不满4k字节的,也需要擦除掉4k字节 +*******************************************************************************/ +status_t flash_erase(uint32_t start_addr, uint32_t byte_cnt) +{ + uint32_t addr; + status_t status; + + addr = start_addr; + while(addr < (byte_cnt + start_addr)) + { + status = FLASH_EraseSector(addr); + if(status != kStatus_Success) + { + return status; + } + addr += FLASH_GetSectorSize(); + } + return status; +} + + +/******************************************************************************* +* 函 数 名: flash_write +* 功能描述: 在指定的flash起始地址写入指定长度的数据 +* 形 参: addr:写入区域起始地址 + buf:数据存储区 + byte_cnt:要写入的字节数 +* 返 回 值: 如果函数执行成功,状态值为 kStatus_Success,否则状态值为其他错误码 +*******************************************************************************/ +status_t flash_write(uint32_t start_addr, uint8_t *buf, uint32_t byte_cnt) +{ + uint32_t size; + status_t status; + while(byte_cnt > 0) + { + size = byte_cnt > FLASH_PAGE_SIZE ? FLASH_PAGE_SIZE : byte_cnt; + status = FLASH_WritePage(start_addr, (void *)buf, size); + if(status != kStatus_Success) + { + return status; + } + start_addr += size; + buf += size; + byte_cnt -= size; + } + + return kStatus_Success; +} + + +/******************************************************************************* +* 函 数 名: flash_read +* 功能描述: 读Flash内容 +* 形 参: addr:读取区域起始地址 + buf:数据存储区 + len:要读取的字节数 +* 返 回 值: 如果函数执行成功,状态值为 kStatus_Success,否则状态值为其他错误码 +*******************************************************************************/ +status_t flash_read(uint32_t addr, uint8_t *buf, uint32_t len) +{ + /* For FlexSPI Memory ReadBack, use IP Command instead of AXI command for security */ + if((addr >= 0x60000000) && (addr < 0x61000000)) + { + return FLASH_Read(addr, (void *)buf, len); + } + + else + { + void* result = memcpy(buf, (void*)addr, len); + if(result == NULL) + { + return (status_t)kStatus_Fail; + } + else + { + return (status_t)kStatus_Success; + } + + } +} + + +/******************************************************************************* +* 函 数 名: flash_copy +* 功能描述: 实现flash数据在分区之间的拷贝 +* 形 参: srcAddr:源flash的起始地址 + dstAddr:目标flash的起始地址; + imageSize:要拷贝的flash空间大小,单位为字节 +* 返 回 值: 如果函数执行成功,状态值为 kStatus_Success,否则状态值为其他错误码 +*******************************************************************************/ +status_t flash_copy(uint32_t srcAddr,uint32_t dstAddr, uint32_t imageSize) +{ + uint32_t PageNum, Remain, i; + status_t status; + + if((srcAddr == dstAddr) || imageSize > APP_FLASH_SIZE) + { + return (status_t)kStatus_Fail; + } + + status = flash_erase(dstAddr,imageSize); + if(status != kStatus_Success) + { + KPrintf("Erase flash 0x%08x failure !\r\n",dstAddr); + return status; + } + + PageNum = imageSize/FLASH_PAGE_SIZE; + Remain = imageSize%FLASH_PAGE_SIZE; + + for(i=0;ipageRemain + { + pBuffer += pageRemain; + WriteAddr += pageRemain; + + NumByteToWrite -= pageRemain;//减去已经写入了的字节数 + if(NumByteToWrite > 256) + { + pageRemain = 256;//一次可以写入256个字节 + } + else + { + pageRemain = NumByteToWrite;//不够256个字节了 + } + } + } +} + + +/******************************************************************************* +* 函 数 名: NorFlash_Write +* 功能描述: 写入W25QXX在指定地址开始写入指定长度的数据 +* 形 参: pBuffer:数据存储区 + WriteAddr:开始写入的地址(24bit) + NumByteToWrite:要写入的字节数(最大65535) +* 返 回 值: None +* 注 释: 该函数带擦除操作 +*******************************************************************************/ +void NorFlash_Write(uint8_t* pBuffer,uint32_t WriteAddr,uint16_t NumByteToWrite) +{ + uint32_t secPos; + uint16_t secOff; + uint16_t secRemain; + uint16_t i; + uint8_t *NorFlash_BUF = 0; + + NorFlash_BUF = NorFlash_BUFFER;//RAM缓冲区4K + + WriteAddr &= 0x0FFFFFFF; + + secPos = WriteAddr/SECTOR_SIZE;//扇区地址 + secOff = WriteAddr%SECTOR_SIZE;//在扇区内的偏移 + secRemain = SECTOR_SIZE - secOff;//扇区剩余空间大小 + + if(NumByteToWrite <= secRemain) + { + secRemain = NumByteToWrite;//不大于4096个字节 + } + while(1) + { + FLASH_Read(CHIP_FLAH_BASE + secPos*SECTOR_SIZE, (void *)NorFlash_BUF, SECTOR_SIZE);//读出整个扇区的内容 + for(i=0;i SECTOR_SIZE) + { + secRemain = SECTOR_SIZE;//下一个扇区还是写不完 + } + else + { + secRemain = NumByteToWrite;//下一个扇区可以写完了 + } + } + } +} + + +/******************************************************************************* +* 函 数 名: NOR_FLASH_Write +* 功能描述: 写入W25QXX在指定地址开始写入指定长度的数据 +* 形 参: FlashAddress:用于存储当前写入Flash地址的指针,写入过程中会移动 + Data:要写入数据存储区 + DataLength:要写入的字节数 +* 返 回 值: 0 +*******************************************************************************/ +#ifndef USE_HIGHT_SPEED_TRANS +uint32_t NOR_FLASH_Write(uint32_t* FlashAddress, uint8_t* Data ,uint16_t DataLength) +{ + uint32_t WriteAddr; + WriteAddr = *FlashAddress; + NorFlash_Write(Data,WriteAddr,DataLength); + *FlashAddress += DataLength; + return 0; +} +#else +uint8_t packetNum = 0; +uint32_t dataLen = 0; +uint32_t WriteAddr; +uint8_t dataBuff[5*1024]; +uint32_t NOR_FLASH_Write(uint32_t* FlashAddress, uint8_t* Data ,uint16_t DataLength,uint8_t doneFlag) +{ + if(!doneFlag) + { + memcpy(&dataBuff[dataLen],Data,DataLength); + dataLen += DataLength; + packetNum ++; + if(1 == packetNum) + { + WriteAddr = *FlashAddress; + } + + if(dataLen>=SECTOR_SIZE) + { + NorFlash_Write(dataBuff,WriteAddr,dataLen); + packetNum = 0; + dataLen = 0; + } + *FlashAddress += DataLength; + } + else + { + NorFlash_Write(dataBuff,WriteAddr,dataLen); + packetNum = 0; + dataLen = 0; + } + return (0); +} +#endif diff --git a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/common/fsl_clock.c b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/common/fsl_clock.c index fae70f54a..b4a4ca2d5 100755 --- a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/common/fsl_clock.c +++ b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/common/fsl_clock.c @@ -1,5 +1,5 @@ /* - * Copyright 2017 NXP + * Copyright 2017 - 2020 NXP * All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause @@ -26,7 +26,7 @@ achieve better performance, it is depend on the IDE Floating point settings, if in IDE, clock_64b_t will switch to double type automatically. only support IAR and MDK here */ #if __FPU_USED -#if ((defined(__ICCARM__)) || (defined(__GNUC__))) +#if (defined(__ICCARM__)) #if (__ARMVFP__ >= __ARMFPV5__) && \ (__ARM_FP == 0xE) /*0xe implies support for half, single and double precision operations*/ @@ -35,6 +35,14 @@ typedef double clock_64b_t; typedef uint64_t clock_64b_t; #endif +#elif (defined(__GNUC__)) + +#if (__ARM_FP == 0xE) /*0xe implies support for half, single and double precision operations*/ +typedef double clock_64b_t; +#else +typedef uint64_t clock_64b_t; +#endif + #elif defined(__CC_ARM) || defined(__ARMCC_VERSION) #if defined __TARGET_FPU_FPV5_D16 @@ -71,6 +79,13 @@ volatile uint32_t g_rtcXtalFreq; */ static uint32_t CLOCK_GetPeriphClkFreq(void); +/*! + * @brief Get the frequency of PLL USB1 software clock. + * + * @return The frequency of PLL USB1 software clock. + */ +static uint32_t CLOCK_GetPllUsb1SWFreq(void); + /******************************************************************************* * Code ******************************************************************************/ @@ -80,7 +95,7 @@ static uint32_t CLOCK_GetPeriphClkFreq(void) uint32_t freq; /* Periph_clk2_clk ---> Periph_clk */ - if (CCM->CBCDR & CCM_CBCDR_PERIPH_CLK_SEL_MASK) + if ((CCM->CBCDR & CCM_CBCDR_PERIPH_CLK_SEL_MASK) != 0U) { switch (CCM->CBCMR & CCM_CBCMR_PERIPH_CLK2_SEL_MASK) { @@ -141,6 +156,30 @@ static uint32_t CLOCK_GetPeriphClkFreq(void) return freq; } +static uint32_t CLOCK_GetPllUsb1SWFreq(void) +{ + uint32_t freq; + + switch ((CCM->CCSR & CCM_CCSR_PLL3_SW_CLK_SEL_MASK) >> CCM_CCSR_PLL3_SW_CLK_SEL_SHIFT) + { + case 0: + { + freq = CLOCK_GetPllFreq(kCLOCK_PllUsb1); + break; + } + case 1: + { + freq = 24000000UL; + break; + } + default: + freq = 0UL; + break; + } + + return freq; +} + /*! * brief Initialize the external 24MHz clock. * @@ -161,11 +200,11 @@ void CLOCK_InitExternalClk(bool bypassXtalOsc) assert(!bypassXtalOsc); CCM_ANALOG->MISC0_CLR = CCM_ANALOG_MISC0_XTAL_24M_PWD_MASK; /* Power up */ - while ((XTALOSC24M->LOWPWR_CTRL & XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MASK) == 0) + while ((XTALOSC24M->LOWPWR_CTRL & XTALOSC24M_LOWPWR_CTRL_XTALOSC_PWRUP_STAT_MASK) == 0U) { } CCM_ANALOG->MISC0_SET = CCM_ANALOG_MISC0_OSC_XTALOK_EN_MASK; /* detect freq */ - while ((CCM_ANALOG->MISC0 & CCM_ANALOG_MISC0_OSC_XTALOK_MASK) == 0) + while ((CCM_ANALOG->MISC0 & CCM_ANALOG_MISC0_OSC_XTALOK_MASK) == 0UL) { } CCM_ANALOG->MISC0_CLR = CCM_ANALOG_MISC0_OSC_XTALOK_EN_MASK; @@ -194,9 +233,13 @@ void CLOCK_DeinitExternalClk(void) void CLOCK_SwitchOsc(clock_osc_t osc) { if (osc == kCLOCK_RcOsc) + { XTALOSC24M->LOWPWR_CTRL_SET = XTALOSC24M_LOWPWR_CTRL_SET_OSC_SEL_MASK; + } else + { XTALOSC24M->LOWPWR_CTRL_CLR = XTALOSC24M_LOWPWR_CTRL_CLR_OSC_SEL_MASK; + } } /*! @@ -235,10 +278,10 @@ uint32_t CLOCK_GetSemcFreq(void) uint32_t freq; /* SEMC alternative clock ---> SEMC Clock */ - if (CCM->CBCDR & CCM_CBCDR_SEMC_CLK_SEL_MASK) + if ((CCM->CBCDR & CCM_CBCDR_SEMC_CLK_SEL_MASK) != 0U) { /* PLL3 PFD1 ---> SEMC alternative clock ---> SEMC Clock */ - if (CCM->CBCDR & CCM_CBCDR_SEMC_ALT_CLK_SEL_MASK) + if ((CCM->CBCDR & CCM_CBCDR_SEMC_ALT_CLK_SEL_MASK) != 0U) { freq = CLOCK_GetUsb1PfdFreq(kCLOCK_Pfd1); } @@ -279,14 +322,14 @@ uint32_t CLOCK_GetPerClkFreq(void) uint32_t freq; /* Osc_clk ---> PER Clock*/ - if (CCM->CSCMR1 & CCM_CSCMR1_PERCLK_CLK_SEL_MASK) + if ((CCM->CSCMR1 & CCM_CSCMR1_PERCLK_CLK_SEL_MASK) != 0U) { freq = CLOCK_GetOscFreq(); } /* Periph_clk ---> AHB Clock ---> IPG Clock ---> PER Clock */ else { - freq = CLOCK_GetFreq(kCLOCK_IpgClk); + freq = CLOCK_GetIpgFreq(); } freq /= (((CCM->CSCMR1 & CCM_CSCMR1_PERCLK_PODF_MASK) >> CCM_CSCMR1_PERCLK_PODF_SHIFT) + 1U); @@ -350,6 +393,18 @@ uint32_t CLOCK_GetFreq(clock_name_t name) case kCLOCK_Usb1PllPfd3Clk: freq = CLOCK_GetUsb1PfdFreq(kCLOCK_Pfd3); break; + case kCLOCK_Usb1SwClk: + freq = CLOCK_GetPllUsb1SWFreq(); + break; + case kCLOCK_Usb1Sw120MClk: + freq = CLOCK_GetPllUsb1SWFreq() / 4UL; + break; + case kCLOCK_Usb1Sw60MClk: + freq = CLOCK_GetPllUsb1SWFreq() / 8UL; + break; + case kCLOCK_Usb1Sw80MClk: + freq = CLOCK_GetPllUsb1SWFreq() / 6UL; + break; case kCLOCK_Usb2PllClk: freq = CLOCK_GetPllFreq(kCLOCK_PllUsb2); break; @@ -388,6 +443,45 @@ uint32_t CLOCK_GetFreq(clock_name_t name) return freq; } +/*! + * brief Gets the frequency of selected clock root. + * + * param clockRoot The clock root used to get the frequency, please refer to @ref clock_root_t. + * return The frequency of selected clock root. + */ +uint32_t CLOCK_GetClockRootFreq(clock_root_t clockRoot) +{ + const clock_name_t clockRootSourceArray[][6] = CLOCK_ROOT_SOUCE; + const clock_mux_t clockRootMuxTupleArray[] = CLOCK_ROOT_MUX_TUPLE; + const clock_div_t clockRootDivTupleArray[][2] = CLOCK_ROOT_DIV_TUPLE; + uint32_t freq = 0UL; + clock_mux_t clockRootMuxTuple = clockRootMuxTupleArray[(uint8_t)clockRoot]; + clock_div_t clockRootPreDivTuple = clockRootDivTupleArray[(uint8_t)clockRoot][0]; + clock_div_t clockRootPostDivTuple = clockRootDivTupleArray[(uint8_t)clockRoot][1]; + uint32_t clockRootMuxValue = (CCM_TUPLE_REG(CCM, clockRootMuxTuple) & CCM_TUPLE_MASK(clockRootMuxTuple)) >> + CCM_TUPLE_SHIFT(clockRootMuxTuple); + clock_name_t clockSourceName; + + clockSourceName = clockRootSourceArray[(uint8_t)clockRoot][clockRootMuxValue]; + + assert(clockSourceName != kCLOCK_NoneName); + + freq = CLOCK_GetFreq(clockSourceName); + + if (clockRootPreDivTuple != kCLOCK_NonePreDiv) + { + freq /= ((CCM_TUPLE_REG(CCM, clockRootPreDivTuple) & CCM_TUPLE_MASK(clockRootPreDivTuple)) >> + CCM_TUPLE_SHIFT(clockRootPreDivTuple)) + + 1UL; + } + + freq /= ((CCM_TUPLE_REG(CCM, clockRootPostDivTuple) & CCM_TUPLE_MASK(clockRootPostDivTuple)) >> + CCM_TUPLE_SHIFT(clockRootPostDivTuple)) + + 1UL; + + return freq; +} + /*! brief Enable USB HS clock. * * This function only enables the access to USB HS prepheral, upper layer @@ -401,10 +495,12 @@ uint32_t CLOCK_GetFreq(clock_name_t name) */ bool CLOCK_EnableUsbhs0Clock(clock_usb_src_t src, uint32_t freq) { + uint32_t i; CCM->CCGR6 |= CCM_CCGR6_CG0_MASK; USB1->USBCMD |= USBHS_USBCMD_RST_MASK; - for (volatile uint32_t i = 0; i < 400000; - i++) /* Add a delay between RST and RS so make sure there is a DP pullup sequence*/ + + /* Add a delay between RST and RS so make sure there is a DP pullup sequence*/ + for (i = 0; i < 400000U; i++) { __ASM("nop"); } @@ -426,10 +522,12 @@ bool CLOCK_EnableUsbhs0Clock(clock_usb_src_t src, uint32_t freq) */ bool CLOCK_EnableUsbhs1Clock(clock_usb_src_t src, uint32_t freq) { + uint32_t i = 0; CCM->CCGR6 |= CCM_CCGR6_CG0_MASK; USB2->USBCMD |= USBHS_USBCMD_RST_MASK; - for (volatile uint32_t i = 0; i < 400000; - i++) /* Add a delay between RST and RS so make sure there is a DP pullup sequence*/ + + /* Add a delay between RST and RS so make sure there is a DP pullup sequence*/ + for (i = 0; i < 400000U; i++) { __ASM("nop"); } @@ -450,7 +548,7 @@ bool CLOCK_EnableUsbhs1Clock(clock_usb_src_t src, uint32_t freq) bool CLOCK_EnableUsbhs0PhyPllClock(clock_usb_phy_src_t src, uint32_t freq) { const clock_usb_pll_config_t g_ccmConfigUsbPll = {.loopDivider = 0U}; - if (CCM_ANALOG->PLL_USB1 & CCM_ANALOG_PLL_USB1_ENABLE_MASK) + if ((CCM_ANALOG->PLL_USB1 & CCM_ANALOG_PLL_USB1_ENABLE_MASK) != 0U) { CCM_ANALOG->PLL_USB1 |= CCM_ANALOG_PLL_USB1_EN_USB_CLKS_MASK; } @@ -494,7 +592,7 @@ void CLOCK_InitArmPll(const clock_arm_pll_config_t *config) (CCM_ANALOG->PLL_ARM & (~(CCM_ANALOG_PLL_ARM_DIV_SELECT_MASK | CCM_ANALOG_PLL_ARM_POWERDOWN_MASK))) | CCM_ANALOG_PLL_ARM_ENABLE_MASK | CCM_ANALOG_PLL_ARM_DIV_SELECT(config->loopDivider); - while ((CCM_ANALOG->PLL_ARM & CCM_ANALOG_PLL_ARM_LOCK_MASK) == 0) + while ((CCM_ANALOG->PLL_ARM & CCM_ANALOG_PLL_ARM_LOCK_MASK) == 0UL) { } @@ -528,7 +626,7 @@ void CLOCK_InitSysPll(const clock_sys_pll_config_t *config) CCM_ANALOG_PLL_SYS_ENABLE_MASK | CCM_ANALOG_PLL_SYS_DIV_SELECT(config->loopDivider); /* Initialize the fractional mode */ - CCM_ANALOG->PLL_SYS_NUM = CCM_ANALOG_PLL_SYS_NUM_A(config->numerator); + CCM_ANALOG->PLL_SYS_NUM = CCM_ANALOG_PLL_SYS_NUM_A(config->numerator); CCM_ANALOG->PLL_SYS_DENOM = CCM_ANALOG_PLL_SYS_DENOM_B(config->denominator); /* Initialize the spread spectrum mode */ @@ -536,7 +634,7 @@ void CLOCK_InitSysPll(const clock_sys_pll_config_t *config) CCM_ANALOG_PLL_SYS_SS_ENABLE(config->ss_enable) | CCM_ANALOG_PLL_SYS_SS_STOP(config->ss_stop); - while ((CCM_ANALOG->PLL_SYS & CCM_ANALOG_PLL_SYS_LOCK_MASK) == 0) + while ((CCM_ANALOG->PLL_SYS & CCM_ANALOG_PLL_SYS_LOCK_MASK) == 0UL) { } @@ -569,7 +667,7 @@ void CLOCK_InitUsb1Pll(const clock_usb_pll_config_t *config) CCM_ANALOG_PLL_USB1_ENABLE_MASK | CCM_ANALOG_PLL_USB1_POWER_MASK | CCM_ANALOG_PLL_USB1_EN_USB_CLKS_MASK | CCM_ANALOG_PLL_USB1_DIV_SELECT(config->loopDivider); - while ((CCM_ANALOG->PLL_USB1 & CCM_ANALOG_PLL_USB1_LOCK_MASK) == 0) + while ((CCM_ANALOG->PLL_USB1 & CCM_ANALOG_PLL_USB1_LOCK_MASK) == 0UL) { } @@ -602,7 +700,7 @@ void CLOCK_InitUsb2Pll(const clock_usb_pll_config_t *config) CCM_ANALOG_PLL_USB2_ENABLE_MASK | CCM_ANALOG_PLL_USB2_POWER_MASK | CCM_ANALOG_PLL_USB2_EN_USB_CLKS_MASK | CCM_ANALOG_PLL_USB2_DIV_SELECT(config->loopDivider); - while ((CCM_ANALOG->PLL_USB2 & CCM_ANALOG_PLL_USB2_LOCK_MASK) == 0) + while ((CCM_ANALOG->PLL_USB2 & CCM_ANALOG_PLL_USB2_LOCK_MASK) == 0UL) { } @@ -634,7 +732,7 @@ void CLOCK_InitAudioPll(const clock_audio_pll_config_t *config) CCM_ANALOG->PLL_AUDIO = (CCM_ANALOG->PLL_AUDIO & (~CCM_ANALOG_PLL_AUDIO_BYPASS_CLK_SRC_MASK)) | CCM_ANALOG_PLL_AUDIO_BYPASS_MASK | CCM_ANALOG_PLL_AUDIO_BYPASS_CLK_SRC(config->src); - CCM_ANALOG->PLL_AUDIO_NUM = CCM_ANALOG_PLL_AUDIO_NUM_A(config->numerator); + CCM_ANALOG->PLL_AUDIO_NUM = CCM_ANALOG_PLL_AUDIO_NUM_A(config->numerator); CCM_ANALOG->PLL_AUDIO_DENOM = CCM_ANALOG_PLL_AUDIO_DENOM_B(config->denominator); /* @@ -689,7 +787,7 @@ void CLOCK_InitAudioPll(const clock_audio_pll_config_t *config) CCM_ANALOG->PLL_AUDIO = pllAudio; - while ((CCM_ANALOG->PLL_AUDIO & CCM_ANALOG_PLL_AUDIO_LOCK_MASK) == 0) + while ((CCM_ANALOG->PLL_AUDIO & CCM_ANALOG_PLL_AUDIO_LOCK_MASK) == 0UL) { } @@ -702,7 +800,7 @@ void CLOCK_InitAudioPll(const clock_audio_pll_config_t *config) */ void CLOCK_DeinitAudioPll(void) { - CCM_ANALOG->PLL_AUDIO = CCM_ANALOG_PLL_AUDIO_POWERDOWN_MASK; + CCM_ANALOG->PLL_AUDIO = (uint32_t)CCM_ANALOG_PLL_AUDIO_POWERDOWN_MASK; } /*! @@ -721,7 +819,7 @@ void CLOCK_InitVideoPll(const clock_video_pll_config_t *config) CCM_ANALOG->PLL_VIDEO = (CCM_ANALOG->PLL_VIDEO & (~CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC_MASK)) | CCM_ANALOG_PLL_VIDEO_BYPASS_MASK | CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC(config->src); - CCM_ANALOG->PLL_VIDEO_NUM = CCM_ANALOG_PLL_VIDEO_NUM_A(config->numerator); + CCM_ANALOG->PLL_VIDEO_NUM = CCM_ANALOG_PLL_VIDEO_NUM_A(config->numerator); CCM_ANALOG->PLL_VIDEO_DENOM = CCM_ANALOG_PLL_VIDEO_DENOM_B(config->denominator); /* @@ -775,7 +873,7 @@ void CLOCK_InitVideoPll(const clock_video_pll_config_t *config) CCM_ANALOG->PLL_VIDEO = pllVideo; - while ((CCM_ANALOG->PLL_VIDEO & CCM_ANALOG_PLL_VIDEO_LOCK_MASK) == 0) + while ((CCM_ANALOG->PLL_VIDEO & CCM_ANALOG_PLL_VIDEO_LOCK_MASK) == 0UL) { } @@ -820,7 +918,7 @@ void CLOCK_InitEnetPll(const clock_enet_pll_config_t *config) enet_pll; /* Wait for stable */ - while ((CCM_ANALOG->PLL_ENET & CCM_ANALOG_PLL_ENET_LOCK_MASK) == 0) + while ((CCM_ANALOG->PLL_ENET & CCM_ANALOG_PLL_ENET_LOCK_MASK) == 0UL) { } @@ -883,10 +981,10 @@ uint32_t CLOCK_GetPllFreq(clock_pll_t pll) break; case kCLOCK_PllSys: /* PLL output frequency = Fref * (DIV_SELECT + NUM/DENOM). */ - freqTmp = ((clock_64b_t)freq * ((clock_64b_t)(CCM_ANALOG->PLL_SYS_NUM))) / - ((clock_64b_t)(CCM_ANALOG->PLL_SYS_DENOM)); + freqTmp = ((clock_64b_t)freq * ((clock_64b_t)(CCM_ANALOG->PLL_SYS_NUM))); + freqTmp /= ((clock_64b_t)(CCM_ANALOG->PLL_SYS_DENOM)); - if (CCM_ANALOG->PLL_SYS & CCM_ANALOG_PLL_SYS_DIV_SELECT_MASK) + if ((CCM_ANALOG->PLL_SYS & CCM_ANALOG_PLL_SYS_DIV_SELECT_MASK) != 0U) { freq *= 22U; } @@ -899,7 +997,7 @@ uint32_t CLOCK_GetPllFreq(clock_pll_t pll) break; case kCLOCK_PllUsb1: - freq = (freq * ((CCM_ANALOG->PLL_USB1 & CCM_ANALOG_PLL_USB1_DIV_SELECT_MASK) ? 22U : 20U)); + freq = (freq * (((CCM_ANALOG->PLL_USB1 & CCM_ANALOG_PLL_USB1_DIV_SELECT_MASK) != 0UL) ? 22U : 20U)); break; case kCLOCK_PllAudio: @@ -907,8 +1005,8 @@ uint32_t CLOCK_GetPllFreq(clock_pll_t pll) divSelect = (CCM_ANALOG->PLL_AUDIO & CCM_ANALOG_PLL_AUDIO_DIV_SELECT_MASK) >> CCM_ANALOG_PLL_AUDIO_DIV_SELECT_SHIFT; - freqTmp = ((clock_64b_t)freq * ((clock_64b_t)(CCM_ANALOG->PLL_AUDIO_NUM))) / - ((clock_64b_t)(CCM_ANALOG->PLL_AUDIO_DENOM)); + freqTmp = ((clock_64b_t)freq * ((clock_64b_t)(CCM_ANALOG->PLL_AUDIO_NUM))); + freqTmp /= ((clock_64b_t)(CCM_ANALOG->PLL_AUDIO_DENOM)); freq = freq * divSelect + (uint32_t)freqTmp; @@ -938,7 +1036,12 @@ uint32_t CLOCK_GetPllFreq(clock_pll_t pll) freq = freq >> 1U; break; + case CCM_ANALOG_PLL_AUDIO_POST_DIV_SELECT(2U): + freq = freq >> 0U; + break; + default: + assert(false); break; } @@ -952,7 +1055,13 @@ uint32_t CLOCK_GetPllFreq(clock_pll_t pll) freq >>= 1U; break; + case CCM_ANALOG_MISC2_AUDIO_DIV_MSB(0) | CCM_ANALOG_MISC2_AUDIO_DIV_LSB(0): + case CCM_ANALOG_MISC2_AUDIO_DIV_MSB(1) | CCM_ANALOG_MISC2_AUDIO_DIV_LSB(0): + freq >>= 0U; + break; + default: + assert(false); break; } break; @@ -962,9 +1071,8 @@ uint32_t CLOCK_GetPllFreq(clock_pll_t pll) divSelect = (CCM_ANALOG->PLL_VIDEO & CCM_ANALOG_PLL_VIDEO_DIV_SELECT_MASK) >> CCM_ANALOG_PLL_VIDEO_DIV_SELECT_SHIFT; - freqTmp = ((clock_64b_t)freq * ((clock_64b_t)(CCM_ANALOG->PLL_VIDEO_NUM))) / - ((clock_64b_t)(CCM_ANALOG->PLL_VIDEO_DENOM)); - + freqTmp = ((clock_64b_t)freq * ((clock_64b_t)(CCM_ANALOG->PLL_VIDEO_NUM))); + freqTmp /= ((clock_64b_t)(CCM_ANALOG->PLL_VIDEO_DENOM)); freq = freq * divSelect + (uint32_t)freqTmp; /* VIDEO PLL output = PLL output frequency / POSTDIV. */ @@ -993,21 +1101,32 @@ uint32_t CLOCK_GetPllFreq(clock_pll_t pll) freq = freq >> 1U; break; + case CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT(2U): + freq = freq >> 0U; + break; + default: + assert(false); break; } switch (CCM_ANALOG->MISC2 & CCM_ANALOG_MISC2_VIDEO_DIV_MASK) { - case CCM_ANALOG_MISC2_VIDEO_DIV(3): + case CCM_ANALOG_MISC2_VIDEO_DIV(3U): freq >>= 2U; break; - case CCM_ANALOG_MISC2_VIDEO_DIV(1): + case CCM_ANALOG_MISC2_VIDEO_DIV(1U): freq >>= 1U; break; + case CCM_ANALOG_MISC2_VIDEO_DIV(0U): + case CCM_ANALOG_MISC2_VIDEO_DIV(2U): + freq >>= 0U; + break; + default: + assert(false); break; } break; @@ -1023,7 +1142,7 @@ uint32_t CLOCK_GetPllFreq(clock_pll_t pll) break; case kCLOCK_PllUsb2: - freq = (freq * ((CCM_ANALOG->PLL_USB2 & CCM_ANALOG_PLL_USB2_DIV_SELECT_MASK) ? 22U : 20U)); + freq = (freq * (((CCM_ANALOG->PLL_USB2 & CCM_ANALOG_PLL_USB2_DIV_SELECT_MASK) != 0U) ? 22U : 20U)); break; default: freq = 0U; @@ -1049,13 +1168,14 @@ void CLOCK_InitSysPfd(clock_pfd_t pfd, uint8_t pfdFrac) uint32_t pfd528; pfd528 = CCM_ANALOG->PFD_528 & - ~((CCM_ANALOG_PFD_528_PFD0_CLKGATE_MASK | CCM_ANALOG_PFD_528_PFD0_FRAC_MASK) << (8 * pfdIndex)); + ~(((uint32_t)((uint32_t)CCM_ANALOG_PFD_528_PFD0_CLKGATE_MASK | CCM_ANALOG_PFD_528_PFD0_FRAC_MASK) + << (8UL * pfdIndex))); /* Disable the clock output first. */ - CCM_ANALOG->PFD_528 = pfd528 | (CCM_ANALOG_PFD_528_PFD0_CLKGATE_MASK << (8 * pfdIndex)); + CCM_ANALOG->PFD_528 = pfd528 | ((uint32_t)CCM_ANALOG_PFD_528_PFD0_CLKGATE_MASK << (8UL * pfdIndex)); /* Set the new value and enable output. */ - CCM_ANALOG->PFD_528 = pfd528 | (CCM_ANALOG_PFD_528_PFD0_FRAC(pfdFrac) << (8 * pfdIndex)); + CCM_ANALOG->PFD_528 = pfd528 | (CCM_ANALOG_PFD_528_PFD0_FRAC(pfdFrac) << (8UL * pfdIndex)); } /*! @@ -1067,7 +1187,7 @@ void CLOCK_InitSysPfd(clock_pfd_t pfd, uint8_t pfdFrac) */ void CLOCK_DeinitSysPfd(clock_pfd_t pfd) { - CCM_ANALOG->PFD_528 |= CCM_ANALOG_PFD_528_PFD0_CLKGATE_MASK << (8 * pfd); + CCM_ANALOG->PFD_528 |= (uint32_t)CCM_ANALOG_PFD_528_PFD0_CLKGATE_MASK << (8U * (uint8_t)pfd); } /*! @@ -1086,13 +1206,14 @@ void CLOCK_InitUsb1Pfd(clock_pfd_t pfd, uint8_t pfdFrac) uint32_t pfd480; pfd480 = CCM_ANALOG->PFD_480 & - ~((CCM_ANALOG_PFD_480_PFD0_CLKGATE_MASK | CCM_ANALOG_PFD_480_PFD0_FRAC_MASK) << (8 * pfdIndex)); + ~(((uint32_t)((uint32_t)CCM_ANALOG_PFD_480_PFD0_CLKGATE_MASK | CCM_ANALOG_PFD_480_PFD0_FRAC_MASK) + << (8UL * pfdIndex))); /* Disable the clock output first. */ - CCM_ANALOG->PFD_480 = pfd480 | (CCM_ANALOG_PFD_480_PFD0_CLKGATE_MASK << (8 * pfdIndex)); + CCM_ANALOG->PFD_480 = pfd480 | ((uint32_t)CCM_ANALOG_PFD_480_PFD0_CLKGATE_MASK << (8UL * pfdIndex)); /* Set the new value and enable output. */ - CCM_ANALOG->PFD_480 = pfd480 | (CCM_ANALOG_PFD_480_PFD0_FRAC(pfdFrac) << (8 * pfdIndex)); + CCM_ANALOG->PFD_480 = pfd480 | (CCM_ANALOG_PFD_480_PFD0_FRAC(pfdFrac) << (8UL * pfdIndex)); } /*! @@ -1104,7 +1225,7 @@ void CLOCK_InitUsb1Pfd(clock_pfd_t pfd, uint8_t pfdFrac) */ void CLOCK_DeinitUsb1Pfd(clock_pfd_t pfd) { - CCM_ANALOG->PFD_480 |= CCM_ANALOG_PFD_480_PFD0_CLKGATE_MASK << (8 * pfd); + CCM_ANALOG->PFD_480 |= (uint32_t)CCM_ANALOG_PFD_480_PFD0_CLKGATE_MASK << (8UL * (uint8_t)pfd); } /*! @@ -1217,3 +1338,180 @@ void CLOCK_DisableUsbhs1PhyPllClock(void) CCM_ANALOG->PLL_USB2 &= ~CCM_ANALOG_PLL_USB2_EN_USB_CLKS_MASK; USBPHY2->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ } + +/*! + * brief Set the clock source and the divider of the clock output1. + * + * param selection The clock source to be output, please refer to clock_output1_selection_t. + * param divider The divider of the output clock signal, please refer to clock_output_divider_t. + */ +void CLOCK_SetClockOutput1(clock_output1_selection_t selection, clock_output_divider_t divider) +{ + uint32_t tmp32; + + tmp32 = CCM->CCOSR; + if (selection == kCLOCK_DisableClockOutput1) + { + tmp32 &= ~CCM_CCOSR_CLKO1_EN_MASK; + } + else + { + tmp32 |= CCM_CCOSR_CLKO1_EN_MASK; + tmp32 &= ~(CCM_CCOSR_CLKO1_SEL_MASK | CCM_CCOSR_CLKO1_DIV_MASK); + tmp32 |= CCM_CCOSR_CLKO1_SEL(selection) | CCM_CCOSR_CLKO1_DIV(divider); + } + CCM->CCOSR = tmp32; +} + +/*! + * brief Set the clock source and the divider of the clock output2. + * + * param selection The clock source to be output, please refer to clock_output2_selection_t. + * param divider The divider of the output clock signal, please refer to clock_output_divider_t. + */ +void CLOCK_SetClockOutput2(clock_output2_selection_t selection, clock_output_divider_t divider) +{ + uint32_t tmp32; + + tmp32 = CCM->CCOSR; + if (selection == kCLOCK_DisableClockOutput2) + { + tmp32 &= CCM_CCOSR_CLKO2_EN_MASK; + } + else + { + tmp32 |= CCM_CCOSR_CLKO2_EN_MASK; + tmp32 &= ~(CCM_CCOSR_CLKO2_SEL_MASK | CCM_CCOSR_CLKO2_DIV_MASK); + tmp32 |= CCM_CCOSR_CLKO2_SEL(selection) | CCM_CCOSR_CLKO2_DIV(divider); + } + + CCM->CCOSR = tmp32; +} + +/*! + * brief Get the frequency of clock output1 clock signal. + * + * return The frequency of clock output1 clock signal. + */ +uint32_t CLOCK_GetClockOutCLKO1Freq(void) +{ + uint32_t freq = 0U; + uint32_t tmp32; + + tmp32 = CCM->CCOSR; + + if ((tmp32 & CCM_CCOSR_CLKO1_EN_MASK) != 0UL) + { + switch ((tmp32 & CCM_CCOSR_CLKO1_SEL_MASK) >> CCM_CCOSR_CLKO1_SEL_SHIFT) + { + case (uint32_t)kCLOCK_OutputPllUsb1: + freq = CLOCK_GetPllFreq(kCLOCK_PllUsb1) / 2U; + break; + case (uint32_t)kCLOCK_OutputPllSys: + freq = CLOCK_GetPllFreq(kCLOCK_PllSys) / 2U; + break; + case (uint32_t)kCLOCK_OutputPllVideo: + freq = CLOCK_GetPllFreq(kCLOCK_PllVideo) / 2U; + break; + case (uint32_t)kCLOCK_OutputSemcClk: + freq = CLOCK_GetSemcFreq(); + break; + case (uint32_t)kCLOCK_OutputLcdifPixClk: + freq = CLOCK_GetClockRootFreq(kCLOCK_LcdifClkRoot); + break; + case (uint32_t)kCLOCK_OutputAhbClk: + freq = CLOCK_GetAhbFreq(); + break; + case (uint32_t)kCLOCK_OutputIpgClk: + freq = CLOCK_GetIpgFreq(); + break; + case (uint32_t)kCLOCK_OutputPerClk: + freq = CLOCK_GetPerClkFreq(); + break; + case (uint32_t)kCLOCK_OutputCkilSyncClk: + freq = CLOCK_GetRtcFreq(); + break; + case (uint32_t)kCLOCK_OutputPll4MainClk: + freq = CLOCK_GetPllFreq(kCLOCK_PllAudio); + break; + default: + /* This branch should never be hit. */ + break; + } + + freq /= (((tmp32 & CCM_CCOSR_CLKO1_DIV_MASK) >> CCM_CCOSR_CLKO1_DIV_SHIFT) + 1U); + } + else + { + freq = 0UL; + } + + return freq; +} + +/*! + * brief Get the frequency of clock output2 clock signal. + * + * return The frequency of clock output2 clock signal. + */ +uint32_t CLOCK_GetClockOutClkO2Freq(void) +{ + uint32_t freq = 0U; + uint32_t tmp32; + + tmp32 = CCM->CCOSR; + + if ((tmp32 & CCM_CCOSR_CLKO2_EN_MASK) != 0UL) + { + switch ((tmp32 & CCM_CCOSR_CLKO2_SEL_MASK) >> CCM_CCOSR_CLKO2_SEL_SHIFT) + { + case (uint32_t)kCLOCK_OutputUsdhc1Clk: + freq = CLOCK_GetClockRootFreq(kCLOCK_Usdhc1ClkRoot); + break; + case (uint32_t)kCLOCK_OutputLpi2cClk: + freq = CLOCK_GetClockRootFreq(kCLOCK_Lpi2cClkRoot); + break; + case (uint32_t)kCLOCK_OutputCsiClk: + freq = CLOCK_GetClockRootFreq(kCLOCK_CsiClkRoot); + break; + case (uint32_t)kCLOCK_OutputOscClk: + freq = CLOCK_GetOscFreq(); + break; + case (uint32_t)kCLOCK_OutputUsdhc2Clk: + freq = CLOCK_GetClockRootFreq(kCLOCK_Usdhc2ClkRoot); + break; + case (uint32_t)kCLOCK_OutputSai1Clk: + freq = CLOCK_GetClockRootFreq(kCLOCK_Sai1ClkRoot); + break; + case (uint32_t)kCLOCK_OutputSai2Clk: + freq = CLOCK_GetClockRootFreq(kCLOCK_Sai2ClkRoot); + break; + case (uint32_t)kCLOCK_OutputSai3Clk: + freq = CLOCK_GetClockRootFreq(kCLOCK_Sai3ClkRoot); + break; + case (uint32_t)kCLOCK_OutputCanClk: + freq = CLOCK_GetClockRootFreq(kCLOCK_CanClkRoot); + break; + case (uint32_t)kCLOCK_OutputFlexspiClk: + freq = CLOCK_GetClockRootFreq(kCLOCK_FlexspiClkRoot); + break; + case (uint32_t)kCLOCK_OutputUartClk: + freq = CLOCK_GetClockRootFreq(kCLOCK_UartClkRoot); + break; + case (uint32_t)kCLOCK_OutputSpdif0Clk: + freq = CLOCK_GetClockRootFreq(kCLOCK_SpdifClkRoot); + break; + default: + /* This branch should never be hit. */ + break; + } + + freq /= (((tmp32 & CCM_CCOSR_CLKO2_DIV_MASK) >> CCM_CCOSR_CLKO2_DIV_SHIFT) + 1U); + } + else + { + freq = 0UL; + } + + return freq; +} diff --git a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/common/fsl_common.c b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/common/fsl_common.c index e697d0e51..77c3a9039 100755 --- a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/common/fsl_common.c +++ b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/common/fsl_common.c @@ -135,16 +135,16 @@ void *SDK_Malloc(size_t size, size_t alignbytes) p_align_addr = (void *)SDK_SIZEALIGN((uint32_t)p_addr + sizeof(mem_align_cb_t), alignbytes); - p_cb = (mem_align_cb_t *)((uint32_t)p_align_addr - 4); + p_cb = (mem_align_cb_t *)((uint32_t)p_align_addr - 4U); p_cb->identifier = SDK_MEM_MAGIC_NUMBER; - p_cb->offset = (uint32_t)p_align_addr - (uint32_t)p_addr; + p_cb->offset = (uint32_t)p_align_addr - (uint32_t)p_addr; return (void *)p_align_addr; } void SDK_Free(void *ptr) { - mem_align_cb_t *p_cb = (mem_align_cb_t *)((uint32_t)ptr - 4); + mem_align_cb_t *p_cb = (mem_align_cb_t *)((uint32_t)ptr - 4U); if (p_cb->identifier != SDK_MEM_MAGIC_NUMBER) { diff --git a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/common/fsl_romapi.c b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/common/fsl_romapi.c new file mode 100644 index 000000000..0ed07ce5c --- /dev/null +++ b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/common/fsl_romapi.c @@ -0,0 +1,161 @@ +/* + * Copyright 2017-2020 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ +/** +* @file fsl_romapi.c +* @brief support flexspi norflash function +* @version 2.0 +* @author AIIT XUOS Lab +* @date 2023-04-03 +*/ +#include "fsl_romapi.h" + +/******************************************************************************* + * Definitions + ******************************************************************************/ + +/******************************************************************************* + * Prototypes + ******************************************************************************/ + +/*! + * @brief Interface for the ROM FLEXSPI NOR flash driver. + */ +typedef struct +{ + uint32_t version; + status_t (*init)(uint32_t instance, flexspi_nor_config_t *config); + status_t (*program)(uint32_t instance, flexspi_nor_config_t *config, uint32_t dst_addr, const uint32_t *src); + status_t (*erase_all)(uint32_t instance, flexspi_nor_config_t *config); + status_t (*erase)(uint32_t instance, flexspi_nor_config_t *config, uint32_t start, uint32_t lengthInBytes); + uint32_t reserved1; + void (*clear_cache)(uint32_t instance); + status_t (*xfer)(uint32_t instance, flexspi_xfer_t *xfer); + status_t (*update_lut)(uint32_t instance, uint32_t seqIndex, const uint32_t *lutBase, uint32_t seqNumber); + uint32_t reserved2; +} flexspi_nor_driver_interface_t; + +/*! + * @brief Root of the bootloader api tree. + * + * An instance of this struct resides in read-only memory in the bootloader. It + * provides a user application access to APIs exported by the bootloader. + * + * @note The order of existing fields must not be changed. + */ +typedef struct +{ + void (*runBootloader)(void *arg); /*!< Function to start the bootloader executing */ + const uint32_t version; /*!< Bootloader version number */ + const uint8_t *copyright; /*!< Bootloader Copyright */ + const uint32_t reserved0; + flexspi_nor_driver_interface_t *flexSpiNorDriver; /*!< FLEXSPI NOR flash api */ +} bootloader_api_entry_t; + +/******************************************************************************* + * Variables + ******************************************************************************/ + +#define g_bootloaderTree ((bootloader_api_entry_t *)*(uint32_t *)0x0020001cU) + +#define api_flexspi_nor_erase_sector \ + ((status_t(*)(uint32_t instance, flexspi_nor_config_t * config, uint32_t address))0x002106E7U) +/******************************************************************************* + * Codes + ******************************************************************************/ + +/******************************************************************************* + * ROM FLEXSPI NOR driver + ******************************************************************************/ + +/*! + * @brief Initialize Serial NOR flash via FLEXSPI. + * + * @param instance storge the instance of FLEXSPI. + * @param config A pointer to the storage for the driver runtime state. + */ +status_t ROM_FLEXSPI_NorFlash_Init(uint32_t instance, flexspi_nor_config_t *config) +{ + return g_bootloaderTree->flexSpiNorDriver->init(instance, config); +} + +/*! + * @brief Program data to Serial NOR via FLEXSPI. + * + * @param instance storge the instance of FLEXSPI. + * @param config A pointer to the storage for the driver runtime state. + * @param dstAddr A pointer to the desired flash memory to be programmed. + * @param src A pointer to the source buffer of data that is to be programmed + * into the NOR flash. + */ +status_t ROM_FLEXSPI_NorFlash_ProgramPage(uint32_t instance, + flexspi_nor_config_t *config, + uint32_t dstAddr, + const uint32_t *src) +{ + return g_bootloaderTree->flexSpiNorDriver->program(instance, config, dstAddr, src); +} + +/*! + * @brief Erase Flash Region specified by address and length. + * + * @param instance storge the index of FLEXSPI. + * @param config A pointer to the storage for the driver runtime state. + * @param start The start address of the desired NOR flash memory to be erased. + * @param length The length, given in bytes to be erased. + */ +status_t ROM_FLEXSPI_NorFlash_Erase(uint32_t instance, flexspi_nor_config_t *config, uint32_t start, uint32_t length) +{ + return g_bootloaderTree->flexSpiNorDriver->erase(instance, config, start, length); +} + +#if defined(FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_SECTOR) && FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_SECTOR +/*! + * @brief Erase one sector specified by address. + * + * @param instance storge the index of FLEXSPI. + * @param config A pointer to the storage for the driver runtime state. + * @param start The start address of the desired NOR flash memory to be erased. + */ +status_t ROM_FLEXSPI_NorFlash_EraseSector(uint32_t instance, flexspi_nor_config_t *config, uint32_t start) +{ + return api_flexspi_nor_erase_sector(instance, config, start); +} +#endif /* FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_SECTOR */ + +#if defined(FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_ALL) && FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_ALL +/*! @brief Erase all the Serial NOR flash connected on FLEXSPI. */ +status_t ROM_FLEXSPI_NorFlash_EraseAll(uint32_t instance, flexspi_nor_config_t *config) +{ + return g_bootloaderTree->flexSpiNorDriver->erase_all(instance, config); +} +#endif /* FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_ALL */ + +#if defined(FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_CMD_XFER) && FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_CMD_XFER +/*! @brief FLEXSPI command */ +status_t ROM_FLEXSPI_NorFlash_CommandXfer(uint32_t instance, flexspi_xfer_t *xfer) +{ + return g_bootloaderTree->flexSpiNorDriver->xfer(instance, xfer); +} +#endif /* FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_CMD_XFER */ + +#if defined(FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_UPDATE_LUT) && FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_UPDATE_LUT +/*! @brief Configure FLEXSPI Lookup table. */ +status_t ROM_FLEXSPI_NorFlash_UpdateLut(uint32_t instance, + uint32_t seqIndex, + const uint32_t *lutBase, + uint32_t seqNumber) +{ + return g_bootloaderTree->flexSpiNorDriver->update_lut(instance, seqIndex, lutBase, seqNumber); +} +#endif /* FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_UPDATE_LUT */ + +/*! @brief Software reset for the FLEXSPI logic. */ +void ROM_FLEXSPI_NorFlash_ClearCache(uint32_t instance) +{ + g_bootloaderTree->flexSpiNorDriver->clear_cache(instance); +} + diff --git a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/common/mcuboot.c b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/common/mcuboot.c new file mode 100644 index 000000000..e3890c505 --- /dev/null +++ b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/common/mcuboot.c @@ -0,0 +1,60 @@ +/* + * Copyright 2018-2020 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/** +* @file mucboot.c +* @brief support bootloader function +* @version 2.0 +* @author AIIT XUOS Lab +* @date 2023-04-03 +*/ + +#include +#include +#include "common.h" +#include "mcuboot.h" +#include "flash.h" + +#ifdef TOOL_USING_OTA + +void mcuboot_bord_init(void) +{ + BOARD_ConfigMPU(); + BOARD_InitPins(); + BOARD_BootClockRUN(); + UartConfig(); + SysTick_Config(SystemCoreClock / TICK_PER_SECOND); +} + +void mcuboot_reset(void) +{ + __set_FAULTMASK(1); + NVIC_SystemReset(); +} + +void mcuboot_jump(void) +{ + uint32_t addr = XIUOS_FLAH_ADDRESS; + + SCB->VTOR = addr; + asm volatile("LDR R0, %0" : : "m"(addr)); + asm volatile("LDR R0, [R0]"); + asm volatile("MOV SP, R0"); + + addr += 4; + asm volatile("LDR R0, %0" : : "m"(addr)); + asm volatile("LDR R0, [R0]"); + asm volatile("BX R0"); +} + +extern void ImxrtMsDelay(uint32 ms); + +void mcuboot_delay(uint32_t ms) +{ + ImxrtMsDelay(ms); +} +#endif \ No newline at end of file diff --git a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/common/pin_mux.c b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/common/pin_mux.c index de911ee2c..0aa7d67f6 100755 --- a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/common/pin_mux.c +++ b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/common/pin_mux.c @@ -47,652 +47,6 @@ void BOARD_InitBootPins(void) { BOARD_InitPins(); } -void SDHCPinmuxConfig(void) -{ - IOMUXC_SetPinMux( - IOMUXC_GPIO_B1_14_USDHC1_VSELECT, /* GPIO_B1_14 is configured as USDHC1_VSELECT */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_SD_B0_00_USDHC1_CMD, /* GPIO_SD_B0_00 is configured as USDHC1_CMD */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_SD_B0_01_USDHC1_CLK, /* GPIO_SD_B0_01 is configured as USDHC1_CLK */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_SD_B0_02_USDHC1_DATA0, /* GPIO_SD_B0_02 is configured as USDHC1_DATA0 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_SD_B0_03_USDHC1_DATA1, /* GPIO_SD_B0_03 is configured as USDHC1_DATA1 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_SD_B0_04_USDHC1_DATA2, /* GPIO_SD_B0_04 is configured as USDHC1_DATA2 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_SD_B0_05_USDHC1_DATA3, /* GPIO_SD_B0_05 is configured as USDHC1_DATA3 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_B1_14_USDHC1_VSELECT, /* GPIO_B1_14 PAD functional properties : */ - 0x0170A1u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/4 - Speed Field: medium(100MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Pull - Pull Up / Down Config. Field: 47K Ohm Pull Up - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_SD_B0_00_USDHC1_CMD, /* GPIO_SD_B0_00 PAD functional properties : */ - 0x017089u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0(150 Ohm @ 3.3V, 260 Ohm@1.8V) - Speed Field: medium(100MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Pull - Pull Up / Down Config. Field: 47K Ohm Pull Up - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_SD_B0_01_USDHC1_CLK, /* GPIO_SD_B0_01 PAD functional properties : */ - 0x014089u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0(150 Ohm @ 3.3V, 260 Ohm@1.8V) - Speed Field: medium(100MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Disabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 47K Ohm Pull Up - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_SD_B0_02_USDHC1_DATA0, /* GPIO_SD_B0_02 PAD functional properties : */ - 0x017089u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0(150 Ohm @ 3.3V, 260 Ohm@1.8V) - Speed Field: medium(100MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Pull - Pull Up / Down Config. Field: 47K Ohm Pull Up - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_SD_B0_03_USDHC1_DATA1, /* GPIO_SD_B0_03 PAD functional properties : */ - 0x017089u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0(150 Ohm @ 3.3V, 260 Ohm@1.8V) - Speed Field: medium(100MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Pull - Pull Up / Down Config. Field: 47K Ohm Pull Up - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_SD_B0_04_USDHC1_DATA2, /* GPIO_SD_B0_04 PAD functional properties : */ - 0x017089u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0(150 Ohm @ 3.3V, 260 Ohm@1.8V) - Speed Field: medium(100MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Pull - Pull Up / Down Config. Field: 47K Ohm Pull Up - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_SD_B0_05_USDHC1_DATA3, /* GPIO_SD_B0_05 PAD functional properties : */ - 0x017089u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0(150 Ohm @ 3.3V, 260 Ohm@1.8V) - Speed Field: medium(100MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Pull - Pull Up / Down Config. Field: 47K Ohm Pull Up - Hyst. Enable Field: Hysteresis Enabled */ -} - -void SemcPinmuxConfig(void) -{ - - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_00_SEMC_DATA00, /* GPIO_EMC_00 is configured as SEMC_DATA00 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_01_SEMC_DATA01, /* GPIO_EMC_01 is configured as SEMC_DATA01 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_02_SEMC_DATA02, /* GPIO_EMC_02 is configured as SEMC_DATA02 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_03_SEMC_DATA03, /* GPIO_EMC_03 is configured as SEMC_DATA03 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_04_SEMC_DATA04, /* GPIO_EMC_04 is configured as SEMC_DATA04 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_05_SEMC_DATA05, /* GPIO_EMC_05 is configured as SEMC_DATA05 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_06_SEMC_DATA06, /* GPIO_EMC_06 is configured as SEMC_DATA06 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_07_SEMC_DATA07, /* GPIO_EMC_07 is configured as SEMC_DATA07 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_08_SEMC_DM00, /* GPIO_EMC_08 is configured as SEMC_DM00 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_09_SEMC_ADDR00, /* GPIO_EMC_09 is configured as SEMC_ADDR00 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_10_SEMC_ADDR01, /* GPIO_EMC_10 is configured as SEMC_ADDR01 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_11_SEMC_ADDR02, /* GPIO_EMC_11 is configured as SEMC_ADDR02 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_12_SEMC_ADDR03, /* GPIO_EMC_12 is configured as SEMC_ADDR03 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_13_SEMC_ADDR04, /* GPIO_EMC_13 is configured as SEMC_ADDR04 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_14_SEMC_ADDR05, /* GPIO_EMC_14 is configured as SEMC_ADDR05 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_15_SEMC_ADDR06, /* GPIO_EMC_15 is configured as SEMC_ADDR06 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_16_SEMC_ADDR07, /* GPIO_EMC_16 is configured as SEMC_ADDR07 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_17_SEMC_ADDR08, /* GPIO_EMC_17 is configured as SEMC_ADDR08 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_18_SEMC_ADDR09, /* GPIO_EMC_18 is configured as SEMC_ADDR09 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_19_SEMC_ADDR11, /* GPIO_EMC_19 is configured as SEMC_ADDR11 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_20_SEMC_ADDR12, /* GPIO_EMC_20 is configured as SEMC_ADDR12 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_21_SEMC_BA0, /* GPIO_EMC_21 is configured as SEMC_BA0 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_22_SEMC_BA1, /* GPIO_EMC_22 is configured as SEMC_BA1 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_23_SEMC_ADDR10, /* GPIO_EMC_23 is configured as SEMC_ADDR10 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_24_SEMC_CAS, /* GPIO_EMC_24 is configured as SEMC_CAS */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_25_SEMC_RAS, /* GPIO_EMC_25 is configured as SEMC_RAS */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_26_SEMC_CLK, /* GPIO_EMC_26 is configured as SEMC_CLK */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_27_SEMC_CKE, /* GPIO_EMC_27 is configured as SEMC_CKE */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_28_SEMC_WE, /* GPIO_EMC_28 is configured as SEMC_WE */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_29_SEMC_CS0, /* GPIO_EMC_29 is configured as SEMC_CS0 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_30_SEMC_DATA08, /* GPIO_EMC_30 is configured as SEMC_DATA08 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_31_SEMC_DATA09, /* GPIO_EMC_31 is configured as SEMC_DATA09 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_32_SEMC_DATA10, /* GPIO_EMC_32 is configured as SEMC_DATA10 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_33_SEMC_DATA11, /* GPIO_EMC_33 is configured as SEMC_DATA11 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_34_SEMC_DATA12, /* GPIO_EMC_34 is configured as SEMC_DATA12 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_35_SEMC_DATA13, /* GPIO_EMC_35 is configured as SEMC_DATA13 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_36_SEMC_DATA14, /* GPIO_EMC_36 is configured as SEMC_DATA14 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_37_SEMC_DATA15, /* GPIO_EMC_37 is configured as SEMC_DATA15 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_38_SEMC_DM01, /* GPIO_EMC_38 is configured as SEMC_DM01 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_39_SEMC_DQS, /* GPIO_EMC_39 is configured as SEMC_DQS */ - 1U); /* Software Input On Field: Force input path of pad GPIO_EMC_39 */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_40_SEMC_RDY, /* GPIO_EMC_40 is configured as SEMC_RDY */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_41_SEMC_CSX00, /* GPIO_EMC_41 is configured as SEMC_CSX00 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_00_SEMC_DATA00, /* GPIO_EMC_00 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_01_SEMC_DATA01, /* GPIO_EMC_01 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_02_SEMC_DATA02, /* GPIO_EMC_02 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_03_SEMC_DATA03, /* GPIO_EMC_03 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_04_SEMC_DATA04, /* GPIO_EMC_04 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_05_SEMC_DATA05, /* GPIO_EMC_05 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_06_SEMC_DATA06, /* GPIO_EMC_06 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_07_SEMC_DATA07, /* GPIO_EMC_07 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_08_SEMC_DM00, /* GPIO_EMC_08 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_09_SEMC_ADDR00, /* GPIO_EMC_09 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_10_SEMC_ADDR01, /* GPIO_EMC_10 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_11_SEMC_ADDR02, /* GPIO_EMC_11 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_12_SEMC_ADDR03, /* GPIO_EMC_12 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_13_SEMC_ADDR04, /* GPIO_EMC_13 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_14_SEMC_ADDR05, /* GPIO_EMC_14 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_15_SEMC_ADDR06, /* GPIO_EMC_15 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_16_SEMC_ADDR07, /* GPIO_EMC_16 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_17_SEMC_ADDR08, /* GPIO_EMC_17 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_18_SEMC_ADDR09, /* GPIO_EMC_18 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_19_SEMC_ADDR11, /* GPIO_EMC_19 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_20_SEMC_ADDR12, /* GPIO_EMC_20 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_21_SEMC_BA0, /* GPIO_EMC_21 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_22_SEMC_BA1, /* GPIO_EMC_22 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_23_SEMC_ADDR10, /* GPIO_EMC_23 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_24_SEMC_CAS, /* GPIO_EMC_24 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_25_SEMC_RAS, /* GPIO_EMC_25 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_26_SEMC_CLK, /* GPIO_EMC_26 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_27_SEMC_CKE, /* GPIO_EMC_27 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_28_SEMC_WE, /* GPIO_EMC_28 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_29_SEMC_CS0, /* GPIO_EMC_29 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_30_SEMC_DATA08, /* GPIO_EMC_30 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_31_SEMC_DATA09, /* GPIO_EMC_31 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_32_SEMC_DATA10, /* GPIO_EMC_32 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_33_SEMC_DATA11, /* GPIO_EMC_33 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_34_SEMC_DATA12, /* GPIO_EMC_34 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_35_SEMC_DATA13, /* GPIO_EMC_35 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_36_SEMC_DATA14, /* GPIO_EMC_36 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_37_SEMC_DATA15, /* GPIO_EMC_37 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_38_SEMC_DM01, /* GPIO_EMC_38 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_39_SEMC_DQS, /* GPIO_EMC_39 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_40_SEMC_RDY, /* GPIO_EMC_40 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_41_SEMC_CSX00, /* GPIO_EMC_41 PAD functional properties : */ - 0x0110F9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/7 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Enabled */ -} /* * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* BOARD_InitPins: @@ -702,313 +56,51 @@ BOARD_InitPins: pull_keeper_select: Keeper, pull_keeper_enable: Enable, open_drain: Disable, speed: MHZ_100, drive_strength: R0_6, slew_rate: Slow} - {pin_num: K14, peripheral: LPUART1, signal: TX, pin_signal: GPIO_AD_B0_12, software_input_on: Disable, hysteresis_enable: Disable, pull_up_down_config: Pull_Down_100K_Ohm, pull_keeper_select: Keeper, pull_keeper_enable: Enable, open_drain: Disable, speed: MHZ_100, drive_strength: R0_6, slew_rate: Slow} - - {pin_num: A7, peripheral: ENET, signal: enet_mdc, pin_signal: GPIO_EMC_40, software_input_on: Disable, hysteresis_enable: Disable, pull_up_down_config: Pull_Up_100K_Ohm, - pull_keeper_select: Pull, pull_keeper_enable: Enable, open_drain: Disable, speed: MHZ_200, drive_strength: R0_5, slew_rate: Fast} - - {pin_num: C7, peripheral: ENET, signal: enet_mdio, pin_signal: GPIO_EMC_41, software_input_on: Disable, hysteresis_enable: Disable, pull_up_down_config: Pull_Up_100K_Ohm, - pull_keeper_select: Pull, pull_keeper_enable: Enable, open_drain: Enable, speed: MHZ_50, drive_strength: R0_5, slew_rate: Fast} - - {pin_num: B13, peripheral: ENET, signal: enet_ref_clk, pin_signal: GPIO_B1_10, software_input_on: Enable, hysteresis_enable: Disable, pull_up_down_config: Pull_Down_100K_Ohm, - pull_keeper_select: Keeper, pull_keeper_enable: Disable, open_drain: Disable, speed: MHZ_50, drive_strength: R0_6, slew_rate: Fast} - - {pin_num: E12, peripheral: ENET, signal: 'enet_rx_data, 0', pin_signal: GPIO_B1_04, software_input_on: Disable, hysteresis_enable: Disable, pull_up_down_config: Pull_Up_100K_Ohm, - pull_keeper_select: Pull, pull_keeper_enable: Enable, open_drain: Disable, speed: MHZ_200, drive_strength: R0_5, slew_rate: Fast} - - {pin_num: D12, peripheral: ENET, signal: 'enet_rx_data, 1', pin_signal: GPIO_B1_05, software_input_on: Disable, hysteresis_enable: Disable, pull_up_down_config: Pull_Up_100K_Ohm, - pull_keeper_select: Pull, pull_keeper_enable: Enable, open_drain: Disable, speed: MHZ_200, drive_strength: R0_5, slew_rate: Fast} - - {pin_num: C12, peripheral: ENET, signal: enet_rx_en, pin_signal: GPIO_B1_06, software_input_on: Disable, hysteresis_enable: Disable, pull_up_down_config: Pull_Up_100K_Ohm, - pull_keeper_select: Pull, pull_keeper_enable: Enable, open_drain: Disable, speed: MHZ_200, drive_strength: R0_5, slew_rate: Fast} - - {pin_num: C13, peripheral: ENET, signal: enet_rx_er, pin_signal: GPIO_B1_11, software_input_on: Disable, hysteresis_enable: Disable, pull_up_down_config: Pull_Up_100K_Ohm, - pull_keeper_select: Pull, pull_keeper_enable: Enable, open_drain: Disable, speed: MHZ_200, drive_strength: R0_5, slew_rate: Fast} - - {pin_num: B12, peripheral: ENET, signal: 'enet_tx_data, 0', pin_signal: GPIO_B1_07, software_input_on: Disable, hysteresis_enable: Disable, pull_up_down_config: Pull_Up_100K_Ohm, - pull_keeper_select: Pull, pull_keeper_enable: Enable, open_drain: Disable, speed: MHZ_200, drive_strength: R0_5, slew_rate: Fast} - - {pin_num: A12, peripheral: ENET, signal: 'enet_tx_data, 1', pin_signal: GPIO_B1_08, software_input_on: Disable, hysteresis_enable: Disable, pull_up_down_config: Pull_Up_100K_Ohm, - pull_keeper_select: Pull, pull_keeper_enable: Enable, open_drain: Disable, speed: MHZ_200, drive_strength: R0_5, slew_rate: Fast} - - {pin_num: A13, peripheral: ENET, signal: enet_tx_en, pin_signal: GPIO_B1_09, software_input_on: Disable, hysteresis_enable: Disable, pull_up_down_config: Pull_Up_100K_Ohm, - pull_keeper_select: Pull, pull_keeper_enable: Enable, open_drain: Disable, speed: MHZ_200, drive_strength: R0_5, slew_rate: Fast} - - {pin_num: F14, peripheral: GPIO1, signal: 'gpio_io, 09', pin_signal: GPIO_AD_B0_09, software_input_on: Disable, hysteresis_enable: Disable, pull_up_down_config: Pull_Up_100K_Ohm, - pull_keeper_select: Pull, pull_keeper_enable: Enable, open_drain: Disable, speed: MHZ_100, drive_strength: R0_5, slew_rate: Fast} - - {pin_num: G13, peripheral: GPIO1, signal: 'gpio_io, 10', pin_signal: GPIO_AD_B0_10, software_input_on: Disable, hysteresis_enable: Disable, pull_up_down_config: Pull_Up_100K_Ohm, - pull_keeper_select: Pull, pull_keeper_enable: Enable, open_drain: Disable, speed: MHZ_100, drive_strength: R0_5, slew_rate: Fast} - - {pin_num: J3, peripheral: USDHC1, signal: usdhc_clk, pin_signal: GPIO_SD_B0_01, software_input_on: Disable, hysteresis_enable: Enable, pull_up_down_config: Pull_Up_47K_Ohm, - pull_keeper_select: Keeper, pull_keeper_enable: Disable, open_drain: Disable, speed: MHZ_100, drive_strength: R0, slew_rate: Fast} - - {pin_num: J4, peripheral: USDHC1, signal: usdhc_cmd, pin_signal: GPIO_SD_B0_00, software_input_on: Disable, hysteresis_enable: Enable, pull_up_down_config: Pull_Up_47K_Ohm, - pull_keeper_select: Pull, pull_keeper_enable: Enable, open_drain: Disable, speed: MHZ_100, drive_strength: R0, slew_rate: Fast} - - {pin_num: J1, peripheral: USDHC1, signal: 'usdhc_data, 0', pin_signal: GPIO_SD_B0_02, software_input_on: Disable, hysteresis_enable: Enable, pull_up_down_config: Pull_Up_47K_Ohm, - pull_keeper_select: Pull, pull_keeper_enable: Enable, open_drain: Disable, speed: MHZ_100, drive_strength: R0, slew_rate: Fast} - - {pin_num: K1, peripheral: USDHC1, signal: 'usdhc_data, 1', pin_signal: GPIO_SD_B0_03, software_input_on: Disable, hysteresis_enable: Enable, pull_up_down_config: Pull_Up_47K_Ohm, - pull_keeper_select: Pull, pull_keeper_enable: Enable, open_drain: Disable, speed: MHZ_100, drive_strength: R0, slew_rate: Fast} - - {pin_num: H2, peripheral: USDHC1, signal: 'usdhc_data, 2', pin_signal: GPIO_SD_B0_04, software_input_on: Disable, hysteresis_enable: Enable, pull_up_down_config: Pull_Up_47K_Ohm, - pull_keeper_select: Pull, pull_keeper_enable: Enable, open_drain: Disable, speed: MHZ_100, drive_strength: R0, slew_rate: Fast} - - {pin_num: J2, peripheral: USDHC1, signal: 'usdhc_data, 3', pin_signal: GPIO_SD_B0_05, software_input_on: Disable, hysteresis_enable: Enable, pull_up_down_config: Pull_Up_47K_Ohm, - pull_keeper_select: Pull, pull_keeper_enable: Enable, open_drain: Disable, speed: MHZ_100, drive_strength: R0, slew_rate: Fast} - - {pin_num: C14, peripheral: USDHC1, signal: usdhc_vselect, pin_signal: GPIO_B1_14, software_input_on: Disable, hysteresis_enable: Enable, pull_up_down_config: Pull_Up_47K_Ohm, - pull_keeper_select: Pull, pull_keeper_enable: Enable, open_drain: Disable, speed: MHZ_100, drive_strength: R0_4, slew_rate: Fast} + - {pin_num: F14, peripheral: GPIO1, signal: 'gpio_io, 09', pin_signal: GPIO_AD_B0_09, software_input_on: Disable, hysteresis_enable: Disable, pull_up_down_config: Pull_Down_100K_Ohm, + pull_keeper_select: Keeper, pull_keeper_enable: Enable, open_drain: Disable, speed: MHZ_100, drive_strength: R0_6, slew_rate: Slow} * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** */ -void Lcd_InitPins(void) -{ - IOMUXC_SetPinMux( - IOMUXC_GPIO_B0_00_LCD_CLK, /* GPIO_B0_00 is configured as LCD_CLK */ + +/* FUNCTION ************************************************************************************************************ + * + * Function Name : BOARD_InitPins + * Description : Configures pin routing and optionally pin electrical features. + * + * END ****************************************************************************************************************/ +void BOARD_InitPins(void) { + CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03u */ + + IOMUXC_SetPinMux( + IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, /* GPIO_AD_B0_09 is configured as GPIO1_IO09 */ 0U); /* Software Input On Field: Input Path is determined by functionality */ IOMUXC_SetPinMux( - IOMUXC_GPIO_B0_01_LCD_ENABLE, /* GPIO_B0_01 is configured as LCD_ENABLE */ + IOMUXC_GPIO_AD_B0_12_LPUART1_TX, /* GPIO_AD_B0_12 is configured as LPUART1_TX */ 0U); /* Software Input On Field: Input Path is determined by functionality */ IOMUXC_SetPinMux( - IOMUXC_GPIO_B0_02_LCD_HSYNC, /* GPIO_B0_02 is configured as LCD_HSYNC */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_B0_03_LCD_VSYNC, /* GPIO_B0_03 is configured as LCD_VSYNC */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_B0_04_LCD_DATA00, /* GPIO_B0_04 is configured as LCD_DATA00 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_B0_05_LCD_DATA01, /* GPIO_B0_05 is configured as LCD_DATA01 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_B0_06_LCD_DATA02, /* GPIO_B0_06 is configured as LCD_DATA02 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_B0_07_LCD_DATA03, /* GPIO_B0_07 is configured as LCD_DATA03 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_B0_08_LCD_DATA04, /* GPIO_B0_08 is configured as LCD_DATA04 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_B0_09_LCD_DATA05, /* GPIO_B0_09 is configured as LCD_DATA05 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_B0_10_LCD_DATA06, /* GPIO_B0_10 is configured as LCD_DATA06 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_B0_11_LCD_DATA07, /* GPIO_B0_11 is configured as LCD_DATA07 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_B0_12_LCD_DATA08, /* GPIO_B0_12 is configured as LCD_DATA08 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_B0_13_LCD_DATA09, /* GPIO_B0_13 is configured as LCD_DATA09 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_B0_14_LCD_DATA10, /* GPIO_B0_14 is configured as LCD_DATA10 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_B0_15_LCD_DATA11, /* GPIO_B0_15 is configured as LCD_DATA11 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_B1_00_LCD_DATA12, /* GPIO_B1_00 is configured as LCD_DATA12 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_B1_01_LCD_DATA13, /* GPIO_B1_01 is configured as LCD_DATA13 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_B1_02_LCD_DATA14, /* GPIO_B1_02 is configured as LCD_DATA14 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_B1_03_LCD_DATA15, /* GPIO_B1_03 is configured as LCD_DATA15 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_B1_15_GPIO2_IO31, /* GPIO_B1_15 is configured as GPIO2_IO31 */ + IOMUXC_GPIO_AD_B0_13_LPUART1_RX, /* GPIO_AD_B0_13 is configured as LPUART1_RX */ 0U); /* Software Input On Field: Input Path is determined by functionality */ IOMUXC_SetPinConfig( - IOMUXC_GPIO_B0_00_LCD_CLK, /* GPIO_B0_00 PAD functional properties : */ - 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate + IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, /* GPIO_AD_B0_09 PAD functional properties : */ + 0x10B0u); /* Slew Rate Field: Slow Slew Rate Drive Strength Field: R0/6 Speed Field: medium(100MHz) Open Drain Enable Field: Open Drain Disabled Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Pull - Pull Up / Down Config. Field: 100K Ohm Pull Up - Hyst. Enable Field: Hysteresis Enabled */ + Pull / Keep Select Field: Keeper + Pull Up / Down Config. Field: 100K Ohm Pull Down + Hyst. Enable Field: Hysteresis Disabled */ IOMUXC_SetPinConfig( - IOMUXC_GPIO_B0_01_LCD_ENABLE, /* GPIO_B0_01 PAD functional properties : */ - 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate + IOMUXC_GPIO_AD_B0_12_LPUART1_TX, /* GPIO_AD_B0_12 PAD functional properties : */ + 0x10B0u); /* Slew Rate Field: Slow Slew Rate Drive Strength Field: R0/6 Speed Field: medium(100MHz) Open Drain Enable Field: Open Drain Disabled Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Pull - Pull Up / Down Config. Field: 100K Ohm Pull Up - Hyst. Enable Field: Hysteresis Enabled */ + Pull / Keep Select Field: Keeper + Pull Up / Down Config. Field: 100K Ohm Pull Down + Hyst. Enable Field: Hysteresis Disabled */ IOMUXC_SetPinConfig( - IOMUXC_GPIO_B0_02_LCD_HSYNC, /* GPIO_B0_02 PAD functional properties : */ - 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate - Drive Strength Field: R0/6 - Speed Field: medium(100MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Pull - Pull Up / Down Config. Field: 100K Ohm Pull Up - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_B0_03_LCD_VSYNC, /* GPIO_B0_03 PAD functional properties : */ - 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate - Drive Strength Field: R0/6 - Speed Field: medium(100MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Pull - Pull Up / Down Config. Field: 100K Ohm Pull Up - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_B0_04_LCD_DATA00, /* GPIO_B0_04 PAD functional properties : */ - 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate - Drive Strength Field: R0/6 - Speed Field: medium(100MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Pull - Pull Up / Down Config. Field: 100K Ohm Pull Up - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_B0_05_LCD_DATA01, /* GPIO_B0_05 PAD functional properties : */ - 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate - Drive Strength Field: R0/6 - Speed Field: medium(100MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Pull - Pull Up / Down Config. Field: 100K Ohm Pull Up - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_B0_06_LCD_DATA02, /* GPIO_B0_06 PAD functional properties : */ - 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate - Drive Strength Field: R0/6 - Speed Field: medium(100MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Pull - Pull Up / Down Config. Field: 100K Ohm Pull Up - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_B0_07_LCD_DATA03, /* GPIO_B0_07 PAD functional properties : */ - 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate - Drive Strength Field: R0/6 - Speed Field: medium(100MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Pull - Pull Up / Down Config. Field: 100K Ohm Pull Up - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_B0_08_LCD_DATA04, /* GPIO_B0_08 PAD functional properties : */ - 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate - Drive Strength Field: R0/6 - Speed Field: medium(100MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Pull - Pull Up / Down Config. Field: 100K Ohm Pull Up - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_B0_09_LCD_DATA05, /* GPIO_B0_09 PAD functional properties : */ - 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate - Drive Strength Field: R0/6 - Speed Field: medium(100MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Pull - Pull Up / Down Config. Field: 100K Ohm Pull Up - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_B0_10_LCD_DATA06, /* GPIO_B0_10 PAD functional properties : */ - 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate - Drive Strength Field: R0/6 - Speed Field: medium(100MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Pull - Pull Up / Down Config. Field: 100K Ohm Pull Up - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_B0_11_LCD_DATA07, /* GPIO_B0_11 PAD functional properties : */ - 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate - Drive Strength Field: R0/6 - Speed Field: medium(100MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Pull - Pull Up / Down Config. Field: 100K Ohm Pull Up - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_B0_12_LCD_DATA08, /* GPIO_B0_12 PAD functional properties : */ - 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate - Drive Strength Field: R0/6 - Speed Field: medium(100MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Pull - Pull Up / Down Config. Field: 100K Ohm Pull Up - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_B0_13_LCD_DATA09, /* GPIO_B0_13 PAD functional properties : */ - 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate - Drive Strength Field: R0/6 - Speed Field: medium(100MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Pull - Pull Up / Down Config. Field: 100K Ohm Pull Up - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_B0_14_LCD_DATA10, /* GPIO_B0_14 PAD functional properties : */ - 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate - Drive Strength Field: R0/6 - Speed Field: medium(100MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Pull - Pull Up / Down Config. Field: 100K Ohm Pull Up - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_B0_15_LCD_DATA11, /* GPIO_B0_15 PAD functional properties : */ - 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate - Drive Strength Field: R0/6 - Speed Field: medium(100MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Pull - Pull Up / Down Config. Field: 100K Ohm Pull Up - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_B1_00_LCD_DATA12, /* GPIO_B1_00 PAD functional properties : */ - 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate - Drive Strength Field: R0/6 - Speed Field: medium(100MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Pull - Pull Up / Down Config. Field: 100K Ohm Pull Up - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_B1_01_LCD_DATA13, /* GPIO_B1_01 PAD functional properties : */ - 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate - Drive Strength Field: R0/6 - Speed Field: medium(100MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Pull - Pull Up / Down Config. Field: 100K Ohm Pull Up - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_B1_02_LCD_DATA14, /* GPIO_B1_02 PAD functional properties : */ - 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate - Drive Strength Field: R0/6 - Speed Field: medium(100MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Pull - Pull Up / Down Config. Field: 100K Ohm Pull Up - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_B1_03_LCD_DATA15, /* GPIO_B1_03 PAD functional properties : */ - 0x01B0B0u); /* Slew Rate Field: Slow Slew Rate - Drive Strength Field: R0/6 - Speed Field: medium(100MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Pull - Pull Up / Down Config. Field: 100K Ohm Pull Up - Hyst. Enable Field: Hysteresis Enabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_B1_15_GPIO2_IO31, /* GPIO_B1_15 PAD functional properties : */ + IOMUXC_GPIO_AD_B0_13_LPUART1_RX, /* GPIO_AD_B0_13 PAD functional properties : */ 0x10B0u); /* Slew Rate Field: Slow Slew Rate Drive Strength Field: R0/6 Speed Field: medium(100MHz) @@ -1019,326 +111,6 @@ void Lcd_InitPins(void) Hyst. Enable Field: Hysteresis Disabled */ } -void BOARD_InitI2C1Pins(void) { - CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03u */ - - IOMUXC_SetPinMux( - IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL, /* GPIO_AD_B1_00 is configured as LPI2C1_SCL */ - 1U); /* Software Input On Field: Force input path of pad GPIO_AD_B1_00 */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA, /* GPIO_AD_B1_01 is configured as LPI2C1_SDA */ - 1U); /* Software Input On Field: Force input path of pad GPIO_AD_B1_01 */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL, /* GPIO_AD_B1_00 PAD functional properties : */ - 0xD8B0u); /* Slew Rate Field: Slow Slew Rate - Drive Strength Field: R0/6 - Speed Field: medium(100MHz) - Open Drain Enable Field: Open Drain Enabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 22K Ohm Pull Up - Hyst. Enable Field: Hysteresis Disabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA, /* GPIO_AD_B1_01 PAD functional properties : */ - 0xD8B0u); /* Slew Rate Field: Slow Slew Rate - Drive Strength Field: R0/6 - Speed Field: medium(100MHz) - Open Drain Enable Field: Open Drain Enabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 22K Ohm Pull Up - Hyst. Enable Field: Hysteresis Disabled */ -} - -void BOARD_InitUartPins(void) -{ -#ifdef BSP_USING_LPUART1 - IOMUXC_SetPinMux( - IOMUXC_GPIO_AD_B0_12_LPUART1_TX, /* GPIO_AD_B0_12 is configured as LPUART1_TX */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_AD_B0_13_LPUART1_RX, /* GPIO_AD_B0_13 is configured as LPUART1_RX */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_AD_B0_12_LPUART1_TX, /* GPIO_AD_B0_12 PAD functional properties : */ - 0x10B0u); /* Slew Rate Field: Slow Slew Rate - Drive Strength Field: R0/6 - Speed Field: medium(100MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Disabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_AD_B0_13_LPUART1_RX, /* GPIO_AD_B0_13 PAD functional properties : */ - 0x10B0u); /* Slew Rate Field: Slow Slew Rate - Drive Strength Field: R0/6 - Speed Field: medium(100MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Disabled */ -#endif -#ifdef BSP_USING_LPUART2 - IOMUXC_SetPinMux( - IOMUXC_GPIO_AD_B1_02_LPUART2_TX, - 0U); - IOMUXC_SetPinMux( - IOMUXC_GPIO_AD_B1_03_LPUART2_RX, - 0U); - IOMUXC_SetPinConfig( - IOMUXC_GPIO_AD_B1_02_LPUART2_TX, - 0x10B0u); - IOMUXC_SetPinConfig( - IOMUXC_GPIO_AD_B1_03_LPUART2_RX, - 0x10B0u); -#endif - -#ifdef BSP_USING_LPUART3 - IOMUXC_SetPinMux( - IOMUXC_GPIO_AD_B1_06_LPUART3_TX, - 0U); - IOMUXC_SetPinMux( - IOMUXC_GPIO_AD_B1_07_LPUART3_RX, - 0U); - IOMUXC_SetPinConfig( - IOMUXC_GPIO_AD_B1_06_LPUART3_TX, - 0x10B0u); - IOMUXC_SetPinConfig( - IOMUXC_GPIO_AD_B1_07_LPUART3_RX, - 0x10B0u); -#endif - - -#ifdef BSP_USING_LPUART4 - IOMUXC_SetPinMux( - IOMUXC_GPIO_SD_B1_00_LPUART4_TX, - 0U); - IOMUXC_SetPinMux( - IOMUXC_GPIO_SD_B1_01_LPUART4_RX, - 0U); - IOMUXC_SetPinConfig( - IOMUXC_GPIO_SD_B1_00_LPUART4_TX, - 0x10B0u); - IOMUXC_SetPinConfig( - IOMUXC_GPIO_SD_B1_01_LPUART4_RX, - 0x10B0u); -#endif - -#ifdef BSP_USING_LPUART8 - IOMUXC_SetPinMux( - IOMUXC_GPIO_AD_B1_10_LPUART8_TX, - 0U); - IOMUXC_SetPinMux( - IOMUXC_GPIO_AD_B1_11_LPUART8_RX, - 0U); - IOMUXC_SetPinConfig( - IOMUXC_GPIO_AD_B1_10_LPUART8_TX, - 0x10B0u); - IOMUXC_SetPinConfig( - IOMUXC_GPIO_AD_B1_11_LPUART8_RX, - 0x10B0u); -#endif -} - -/* FUNCTION ************************************************************************************************************ - * - * Function Name : BOARD_InitPins - * Description : Configures pin routing and optionally pin electrical features. - * - * END ****************************************************************************************************************/ -void BOARD_InitPins(void) -{ - CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03u */ - /* Software Input On Field: Input Path is determined by functionality */ - SemcPinmuxConfig(); - -#ifdef BSP_USING_LPUART - BOARD_InitUartPins(); -#endif - -#ifdef BSP_USING_LCD - Lcd_InitPins(); -#endif - -#ifdef BSP_USING_I2C - BOARD_InitI2C1Pins(); -#endif - - IOMUXC_SetPinMux( - IOMUXC_GPIO_AD_B0_03_GPIO1_IO03, /* GPIO_AD_B0_09 is configured as GPIO1_IO09 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_AD_B0_10_GPIO1_IO10, /* GPIO_AD_B0_10 is configured as GPIO1_IO10 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - - IOMUXC_SetPinMux( - IOMUXC_GPIO_AD_B0_12_LPUART1_TX, /* GPIO_AD_B0_12 is configured as LPUART1_TX */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_AD_B0_13_LPUART1_RX, /* GPIO_AD_B0_13 is configured as LPUART1_RX */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - -#ifdef BSP_USING_SDIO - SDHCPinmuxConfig(); -#endif - - IOMUXC_SetPinMux( - IOMUXC_GPIO_B1_04_ENET_RX_DATA00, /* GPIO_B1_04 is configured as ENET_RX_DATA00 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_B1_05_ENET_RX_DATA01, /* GPIO_B1_05 is configured as ENET_RX_DATA01 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_B1_06_ENET_RX_EN, /* GPIO_B1_06 is configured as ENET_RX_EN */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_B1_07_ENET_TX_DATA00, /* GPIO_B1_07 is configured as ENET_TX_DATA00 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_B1_08_ENET_TX_DATA01, /* GPIO_B1_08 is configured as ENET_TX_DATA01 */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_B1_09_ENET_TX_EN, /* GPIO_B1_09 is configured as ENET_TX_EN */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_B1_10_ENET_REF_CLK, /* GPIO_B1_10 is configured as ENET_REF_CLK */ - 1U); /* Software Input On Field: Force input path of pad GPIO_B1_10 */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_B1_11_ENET_RX_ER, /* GPIO_B1_11 is configured as ENET_RX_ER */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_40_ENET_MDC, /* GPIO_EMC_40 is configured as ENET_MDC */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - IOMUXC_SetPinMux( - IOMUXC_GPIO_EMC_41_ENET_MDIO, /* GPIO_EMC_41 is configured as ENET_MDIO */ - 0U); /* Software Input On Field: Input Path is determined by functionality */ - - IOMUXC_SetPinConfig( - IOMUXC_GPIO_AD_B0_03_GPIO1_IO03, /* GPIO_AD_B0_09 PAD functional properties : */ - 0xB0A9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/5 - Speed Field: medium(100MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Pull - Pull Up / Down Config. Field: 100K Ohm Pull Up - Hyst. Enable Field: Hysteresis Disabled */ - - IOMUXC_SetPinConfig( - IOMUXC_GPIO_AD_B0_10_GPIO1_IO10, /* GPIO_AD_B0_10 PAD functional properties : */ - 0xB0A9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/5 - Speed Field: medium(100MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Pull - Pull Up / Down Config. Field: 100K Ohm Pull Up - Hyst. Enable Field: Hysteresis Disabled */ - - IOMUXC_SetPinConfig( - IOMUXC_GPIO_B1_04_ENET_RX_DATA00, /* GPIO_B1_04 PAD functional properties : */ - 0xB0E9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/5 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Pull - Pull Up / Down Config. Field: 100K Ohm Pull Up - Hyst. Enable Field: Hysteresis Disabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_B1_05_ENET_RX_DATA01, /* GPIO_B1_05 PAD functional properties : */ - 0xB0E9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/5 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Pull - Pull Up / Down Config. Field: 100K Ohm Pull Up - Hyst. Enable Field: Hysteresis Disabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_B1_06_ENET_RX_EN, /* GPIO_B1_06 PAD functional properties : */ - 0xB0E9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/5 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Pull - Pull Up / Down Config. Field: 100K Ohm Pull Up - Hyst. Enable Field: Hysteresis Disabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_B1_07_ENET_TX_DATA00, /* GPIO_B1_07 PAD functional properties : */ - 0xB0E9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/5 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Pull - Pull Up / Down Config. Field: 100K Ohm Pull Up - Hyst. Enable Field: Hysteresis Disabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_B1_08_ENET_TX_DATA01, /* GPIO_B1_08 PAD functional properties : */ - 0xB0E9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/5 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Pull - Pull Up / Down Config. Field: 100K Ohm Pull Up - Hyst. Enable Field: Hysteresis Disabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_B1_09_ENET_TX_EN, /* GPIO_B1_09 PAD functional properties : */ - 0xB0E9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/5 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Pull - Pull Up / Down Config. Field: 100K Ohm Pull Up - Hyst. Enable Field: Hysteresis Disabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_B1_10_ENET_REF_CLK, /* GPIO_B1_10 PAD functional properties : */ - 0x31u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/6 - Speed Field: low(50MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Disabled - Pull / Keep Select Field: Keeper - Pull Up / Down Config. Field: 100K Ohm Pull Down - Hyst. Enable Field: Hysteresis Disabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_B1_11_ENET_RX_ER, /* GPIO_B1_11 PAD functional properties : */ - 0xB0E9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/5 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Pull - Pull Up / Down Config. Field: 100K Ohm Pull Up - Hyst. Enable Field: Hysteresis Disabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_40_ENET_MDC, /* GPIO_EMC_40 PAD functional properties : */ - 0xB0E9u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/5 - Speed Field: max(200MHz) - Open Drain Enable Field: Open Drain Disabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Pull - Pull Up / Down Config. Field: 100K Ohm Pull Up - Hyst. Enable Field: Hysteresis Disabled */ - IOMUXC_SetPinConfig( - IOMUXC_GPIO_EMC_41_ENET_MDIO, /* GPIO_EMC_41 PAD functional properties : */ - 0xB829u); /* Slew Rate Field: Fast Slew Rate - Drive Strength Field: R0/5 - Speed Field: low(50MHz) - Open Drain Enable Field: Open Drain Enabled - Pull / Keep Enable Field: Pull/Keeper Enabled - Pull / Keep Select Field: Pull - Pull Up / Down Config. Field: 100K Ohm Pull Up - Hyst. Enable Field: Hysteresis Disabled */ -} - /*********************************************************************************************************************** * EOF **********************************************************************************************************************/ diff --git a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/common/ymodem.c b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/common/ymodem.c new file mode 100644 index 000000000..661f6e81c --- /dev/null +++ b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/common/ymodem.c @@ -0,0 +1,399 @@ +/* +* Copyright (c) 2020 AIIT XUOS Lab +* XiUOS is licensed under Mulan PSL v2. +* You can use this software according to the terms and conditions of the Mulan PSL v2. +* You may obtain a copy of Mulan PSL v2 at: +* http://license.coscl.org.cn/MulanPSL2 +* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, +* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, +* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. +* See the Mulan PSL v2 for more details. +*/ + +/** +* @file: ymodem.c +* @brief: file ymodem.c +* @version: 1.0 +* @author: AIIT XUOS Lab +* @date: 2023/3/24 +*/ +#include +#include "ymodem.h" +#include "string.h" +#include "flash.h" + +uint8_t tab_1024[1024] ={0}; +uint8_t FileName[FILE_NAME_LENGTH]; + + +/******************************************************************************* +* 函 数 名: Receive_Byte +* 功能描述: 从发送方接收字节 +* 形 参: c:用于存储接收到的字符 + timeout:超时时间 +* 返 回 值: 0:收到数据,-1:超时未接收到 +*******************************************************************************/ +static int32_t Receive_Byte(uint8_t *c, uint32_t timeout) +{ + while(timeout-- > 0) + { + if(SerialKeyPressed(c) == 1) + { + return 0; + } + } + return -1; +} + + +/******************************************************************************* +* 函 数 名: Send_Byte +* 功能描述: 发送一个字节的数据 +* 形 参: c:要发送的数据 +* 返 回 值: 0 +*******************************************************************************/ +static uint32_t Send_Byte(uint8_t c) +{ + SerialPutChar(c); + return 0; +} + + +/******************************************************************************* +* 函 数 名: UpdateCRC16 +* 功能描述: 更新输入数据的CRC16校验 +* 形 参: crcIn:输入的16位crc数据 + byte:输入的8位数据 +* 返 回 值: 更新后的crc数据 +*******************************************************************************/ +uint16_t UpdateCRC16(uint16_t crcIn, uint8_t byte) +{ + uint32_t crc = crcIn; + uint32_t in = byte|0x100; + + do + { + crc <<= 1; + in <<= 1; + + if(in&0x100) + { + ++crc; + } + + if(crc&0x10000) + { + crc ^= 0x1021; + } + } while(!(in&0x10000)); + + return (crc&0xffffu); +} + + +/******************************************************************************* +* 函 数 名: Cal_CRC16 +* 功能描述: 计算CRC16,用于YModem的数据包 +* 形 参: data:数据buffer + size:数据长度 +* 返 回 值: 生成的crc数据 +*******************************************************************************/ +uint16_t Cal_CRC16(const uint8_t* data, uint32_t size) +{ + uint32_t crc = 0; + const uint8_t* dataEnd = data+size; + + while(data APP_FLASH_SIZE) + { + /* End session */ + Send_Byte(CA); + Send_Byte(CA); + return -1; + } + /* erase user application area */ + + NOR_FLASH_Erase(addr,size); + Send_Byte(ACK); + Send_Byte(CRC16); + } + /* Filename packet is empty, end session */ + else + { + Send_Byte(ACK); + file_done = 1; + session_done = 1; + break; + } + } + /* Data packet */ + else + { + memcpy(buf_ptr, packet_data + PACKET_HEADER, packet_length); + + /* Write received data in Flash */ +#ifndef USE_HIGHT_SPEED_TRANS + if(NOR_FLASH_Write(&flashdestination, buf, (uint16_t)packet_length) == 0) +#else + if(NOR_FLASH_Write(&flashdestination, buf, (uint16_t)packet_length, 0) == 0) +#endif + { + Send_Byte(ACK); + } + else /* An error occurred while writing to Flash memory */ + { + /* End session */ + Send_Byte(CA); + Send_Byte(CA); + return -2; + } + } + packets_received ++; + session_begin = 1; + } + } + break; + case 1: + Send_Byte(CA); + Send_Byte(CA); + return -3; + default: + if(session_begin > 0) + { + errors ++; + } + if(errors > MAX_ERRORS) + { + Send_Byte(CA); + Send_Byte(CA); + return 0; + } + Send_Byte(CRC16); + break; + } + if(file_done != 0) + { + break; + } + } + if(session_done != 0) + { + break; + } + } +#ifdef USE_HIGHT_SPEED_TRANS + NOR_FLASH_Write(&flashdestination, buf, (uint16_t) packet_length,1); +#endif + return (int32_t)size; +} + + +/******************************************************************************* +* 函 数 名: SerialDownload +* 功能描述: 通过串口下载文件 +* 形 参: addr:存储文件的flash起始地址 +* 返 回 值: 文件的大小 +*******************************************************************************/ +int32_t SerialDownload(const uint32_t addr) +{ + uint8_t Number[10] = {0}; + int32_t Size = 0; + + Serial_PutString("Waiting for the file to be sent ... (press 'a' to abort)\n\r"); + Size = Ymodem_Receive(&tab_1024[0], addr); + if(Size > 0) + { + Serial_PutString("\n\n\r Programming Completed Successfully!\n\r--------------------------------\r\n Name: "); + Serial_PutString(FileName); + Int2Str(Number, Size); + Serial_PutString("\n\r Size: "); + Serial_PutString(Number); + Serial_PutString(" Bytes\r\n"); + Serial_PutString("-------------------\n"); + } + else if(Size == -1) + { + Serial_PutString("\n\n\rThe image size is higher than the allowed space memory!\n\r"); + } + else if(Size == -2) + { + Serial_PutString("\n\n\rVerification failed!\n\r"); + } + else if(Size == -3) + { + Serial_PutString("\r\n\nAborted by user.\n\r"); + } + else + { + Serial_PutString("\n\rFailed to receive the file!\n\r"); + } + + return Size; +} diff --git a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/MIMXRT1052.h b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/MIMXRT1052.h index 552c36a16..a6607cd7e 100755 --- a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/MIMXRT1052.h +++ b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/MIMXRT1052.h @@ -58,7 +58,7 @@ * compatible) */ #define MCU_MEM_MAP_VERSION 0x0100U /** Memory map minor version */ -#define MCU_MEM_MAP_VERSION_MINOR 0x0002U +#define MCU_MEM_MAP_VERSION_MINOR 0x0003U /* ---------------------------------------------------------------------------- @@ -9543,73 +9543,96 @@ typedef struct { /** DCP - Register Layout Typedef */ typedef struct { __IO uint32_t CTRL; /**< DCP control register 0, offset: 0x0 */ - uint8_t RESERVED_0[12]; + __IO uint32_t CTRL_SET; /**< DCP control register 0, offset: 0x4 */ + __IO uint32_t CTRL_CLR; /**< DCP control register 0, offset: 0x8 */ + __IO uint32_t CTRL_TOG; /**< DCP control register 0, offset: 0xC */ __IO uint32_t STAT; /**< DCP status register, offset: 0x10 */ - uint8_t RESERVED_1[12]; + __IO uint32_t STAT_SET; /**< DCP status register, offset: 0x14 */ + __IO uint32_t STAT_CLR; /**< DCP status register, offset: 0x18 */ + __IO uint32_t STAT_TOG; /**< DCP status register, offset: 0x1C */ __IO uint32_t CHANNELCTRL; /**< DCP channel control register, offset: 0x20 */ - uint8_t RESERVED_2[12]; + __IO uint32_t CHANNELCTRL_SET; /**< DCP channel control register, offset: 0x24 */ + __IO uint32_t CHANNELCTRL_CLR; /**< DCP channel control register, offset: 0x28 */ + __IO uint32_t CHANNELCTRL_TOG; /**< DCP channel control register, offset: 0x2C */ __IO uint32_t CAPABILITY0; /**< DCP capability 0 register, offset: 0x30 */ - uint8_t RESERVED_3[12]; + uint8_t RESERVED_0[12]; __I uint32_t CAPABILITY1; /**< DCP capability 1 register, offset: 0x40 */ - uint8_t RESERVED_4[12]; + uint8_t RESERVED_1[12]; __IO uint32_t CONTEXT; /**< DCP context buffer pointer, offset: 0x50 */ - uint8_t RESERVED_5[12]; + uint8_t RESERVED_2[12]; __IO uint32_t KEY; /**< DCP key index, offset: 0x60 */ - uint8_t RESERVED_6[12]; + uint8_t RESERVED_3[12]; __IO uint32_t KEYDATA; /**< DCP key data, offset: 0x70 */ - uint8_t RESERVED_7[12]; + uint8_t RESERVED_4[12]; __I uint32_t PACKET0; /**< DCP work packet 0 status register, offset: 0x80 */ - uint8_t RESERVED_8[12]; + uint8_t RESERVED_5[12]; __I uint32_t PACKET1; /**< DCP work packet 1 status register, offset: 0x90 */ - uint8_t RESERVED_9[12]; + uint8_t RESERVED_6[12]; __I uint32_t PACKET2; /**< DCP work packet 2 status register, offset: 0xA0 */ - uint8_t RESERVED_10[12]; + uint8_t RESERVED_7[12]; __I uint32_t PACKET3; /**< DCP work packet 3 status register, offset: 0xB0 */ - uint8_t RESERVED_11[12]; + uint8_t RESERVED_8[12]; __I uint32_t PACKET4; /**< DCP work packet 4 status register, offset: 0xC0 */ - uint8_t RESERVED_12[12]; + uint8_t RESERVED_9[12]; __I uint32_t PACKET5; /**< DCP work packet 5 status register, offset: 0xD0 */ - uint8_t RESERVED_13[12]; + uint8_t RESERVED_10[12]; __I uint32_t PACKET6; /**< DCP work packet 6 status register, offset: 0xE0 */ - uint8_t RESERVED_14[28]; + uint8_t RESERVED_11[28]; __IO uint32_t CH0CMDPTR; /**< DCP channel 0 command pointer address register, offset: 0x100 */ - uint8_t RESERVED_15[12]; + uint8_t RESERVED_12[12]; __IO uint32_t CH0SEMA; /**< DCP channel 0 semaphore register, offset: 0x110 */ - uint8_t RESERVED_16[12]; + uint8_t RESERVED_13[12]; __IO uint32_t CH0STAT; /**< DCP channel 0 status register, offset: 0x120 */ - uint8_t RESERVED_17[12]; + __IO uint32_t CH0STAT_SET; /**< DCP channel 0 status register, offset: 0x124 */ + __IO uint32_t CH0STAT_CLR; /**< DCP channel 0 status register, offset: 0x128 */ + __IO uint32_t CH0STAT_TOG; /**< DCP channel 0 status register, offset: 0x12C */ __IO uint32_t CH0OPTS; /**< DCP channel 0 options register, offset: 0x130 */ - uint8_t RESERVED_18[12]; + __IO uint32_t CH0OPTS_SET; /**< DCP channel 0 options register, offset: 0x134 */ + __IO uint32_t CH0OPTS_CLR; /**< DCP channel 0 options register, offset: 0x138 */ + __IO uint32_t CH0OPTS_TOG; /**< DCP channel 0 options register, offset: 0x13C */ __IO uint32_t CH1CMDPTR; /**< DCP channel 1 command pointer address register, offset: 0x140 */ - uint8_t RESERVED_19[12]; + uint8_t RESERVED_14[12]; __IO uint32_t CH1SEMA; /**< DCP channel 1 semaphore register, offset: 0x150 */ - uint8_t RESERVED_20[12]; + uint8_t RESERVED_15[12]; __IO uint32_t CH1STAT; /**< DCP channel 1 status register, offset: 0x160 */ - uint8_t RESERVED_21[12]; + __IO uint32_t CH1STAT_SET; /**< DCP channel 1 status register, offset: 0x164 */ + __IO uint32_t CH1STAT_CLR; /**< DCP channel 1 status register, offset: 0x168 */ + __IO uint32_t CH1STAT_TOG; /**< DCP channel 1 status register, offset: 0x16C */ __IO uint32_t CH1OPTS; /**< DCP channel 1 options register, offset: 0x170 */ - uint8_t RESERVED_22[12]; + __IO uint32_t CH1OPTS_SET; /**< DCP channel 1 options register, offset: 0x174 */ + __IO uint32_t CH1OPTS_CLR; /**< DCP channel 1 options register, offset: 0x178 */ + __IO uint32_t CH1OPTS_TOG; /**< DCP channel 1 options register, offset: 0x17C */ __IO uint32_t CH2CMDPTR; /**< DCP channel 2 command pointer address register, offset: 0x180 */ - uint8_t RESERVED_23[12]; + uint8_t RESERVED_16[12]; __IO uint32_t CH2SEMA; /**< DCP channel 2 semaphore register, offset: 0x190 */ - uint8_t RESERVED_24[12]; + uint8_t RESERVED_17[12]; __IO uint32_t CH2STAT; /**< DCP channel 2 status register, offset: 0x1A0 */ - uint8_t RESERVED_25[12]; + __IO uint32_t CH2STAT_SET; /**< DCP channel 2 status register, offset: 0x1A4 */ + __IO uint32_t CH2STAT_CLR; /**< DCP channel 2 status register, offset: 0x1A8 */ + __IO uint32_t CH2STAT_TOG; /**< DCP channel 2 status register, offset: 0x1AC */ __IO uint32_t CH2OPTS; /**< DCP channel 2 options register, offset: 0x1B0 */ - uint8_t RESERVED_26[12]; + __IO uint32_t CH2OPTS_SET; /**< DCP channel 2 options register, offset: 0x1B4 */ + __IO uint32_t CH2OPTS_CLR; /**< DCP channel 2 options register, offset: 0x1B8 */ + __IO uint32_t CH2OPTS_TOG; /**< DCP channel 2 options register, offset: 0x1BC */ __IO uint32_t CH3CMDPTR; /**< DCP channel 3 command pointer address register, offset: 0x1C0 */ - uint8_t RESERVED_27[12]; + uint8_t RESERVED_18[12]; __IO uint32_t CH3SEMA; /**< DCP channel 3 semaphore register, offset: 0x1D0 */ - uint8_t RESERVED_28[12]; + uint8_t RESERVED_19[12]; __IO uint32_t CH3STAT; /**< DCP channel 3 status register, offset: 0x1E0 */ - uint8_t RESERVED_29[12]; + __IO uint32_t CH3STAT_SET; /**< DCP channel 3 status register, offset: 0x1E4 */ + __IO uint32_t CH3STAT_CLR; /**< DCP channel 3 status register, offset: 0x1E8 */ + __IO uint32_t CH3STAT_TOG; /**< DCP channel 3 status register, offset: 0x1EC */ __IO uint32_t CH3OPTS; /**< DCP channel 3 options register, offset: 0x1F0 */ - uint8_t RESERVED_30[524]; + __IO uint32_t CH3OPTS_SET; /**< DCP channel 3 options register, offset: 0x1F4 */ + __IO uint32_t CH3OPTS_CLR; /**< DCP channel 3 options register, offset: 0x1F8 */ + __IO uint32_t CH3OPTS_TOG; /**< DCP channel 3 options register, offset: 0x1FC */ + uint8_t RESERVED_20[512]; __IO uint32_t DBGSELECT; /**< DCP debug select register, offset: 0x400 */ - uint8_t RESERVED_31[12]; + uint8_t RESERVED_21[12]; __I uint32_t DBGDATA; /**< DCP debug data register, offset: 0x410 */ - uint8_t RESERVED_32[12]; + uint8_t RESERVED_22[12]; __IO uint32_t PAGETABLE; /**< DCP page table register, offset: 0x420 */ - uint8_t RESERVED_33[12]; + uint8_t RESERVED_23[12]; __I uint32_t VERSION; /**< DCP version register, offset: 0x430 */ } DCP_Type; @@ -9667,6 +9690,141 @@ typedef struct { #define DCP_CTRL_SFTRST(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_SFTRST_SHIFT)) & DCP_CTRL_SFTRST_MASK) /*! @} */ +/*! @name CTRL_SET - DCP control register 0 */ +/*! @{ */ +#define DCP_CTRL_SET_CHANNEL_INTERRUPT_ENABLE_MASK (0xFFU) +#define DCP_CTRL_SET_CHANNEL_INTERRUPT_ENABLE_SHIFT (0U) +/*! CHANNEL_INTERRUPT_ENABLE + * 0b00000001..CH0 + * 0b00000010..CH1 + * 0b00000100..CH2 + * 0b00001000..CH3 + */ +#define DCP_CTRL_SET_CHANNEL_INTERRUPT_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_SET_CHANNEL_INTERRUPT_ENABLE_SHIFT)) & DCP_CTRL_SET_CHANNEL_INTERRUPT_ENABLE_MASK) +#define DCP_CTRL_SET_RSVD_CSC_INTERRUPT_ENABLE_MASK (0x100U) +#define DCP_CTRL_SET_RSVD_CSC_INTERRUPT_ENABLE_SHIFT (8U) +#define DCP_CTRL_SET_RSVD_CSC_INTERRUPT_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_SET_RSVD_CSC_INTERRUPT_ENABLE_SHIFT)) & DCP_CTRL_SET_RSVD_CSC_INTERRUPT_ENABLE_MASK) +#define DCP_CTRL_SET_ENABLE_CONTEXT_SWITCHING_MASK (0x200000U) +#define DCP_CTRL_SET_ENABLE_CONTEXT_SWITCHING_SHIFT (21U) +#define DCP_CTRL_SET_ENABLE_CONTEXT_SWITCHING(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_SET_ENABLE_CONTEXT_SWITCHING_SHIFT)) & DCP_CTRL_SET_ENABLE_CONTEXT_SWITCHING_MASK) +#define DCP_CTRL_SET_ENABLE_CONTEXT_CACHING_MASK (0x400000U) +#define DCP_CTRL_SET_ENABLE_CONTEXT_CACHING_SHIFT (22U) +#define DCP_CTRL_SET_ENABLE_CONTEXT_CACHING(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_SET_ENABLE_CONTEXT_CACHING_SHIFT)) & DCP_CTRL_SET_ENABLE_CONTEXT_CACHING_MASK) +#define DCP_CTRL_SET_GATHER_RESIDUAL_WRITES_MASK (0x800000U) +#define DCP_CTRL_SET_GATHER_RESIDUAL_WRITES_SHIFT (23U) +#define DCP_CTRL_SET_GATHER_RESIDUAL_WRITES(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_SET_GATHER_RESIDUAL_WRITES_SHIFT)) & DCP_CTRL_SET_GATHER_RESIDUAL_WRITES_MASK) +#define DCP_CTRL_SET_PRESENT_SHA_MASK (0x10000000U) +#define DCP_CTRL_SET_PRESENT_SHA_SHIFT (28U) +/*! PRESENT_SHA + * 0b1..Present + * 0b0..Absent + */ +#define DCP_CTRL_SET_PRESENT_SHA(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_SET_PRESENT_SHA_SHIFT)) & DCP_CTRL_SET_PRESENT_SHA_MASK) +#define DCP_CTRL_SET_PRESENT_CRYPTO_MASK (0x20000000U) +#define DCP_CTRL_SET_PRESENT_CRYPTO_SHIFT (29U) +/*! PRESENT_CRYPTO + * 0b1..Present + * 0b0..Absent + */ +#define DCP_CTRL_SET_PRESENT_CRYPTO(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_SET_PRESENT_CRYPTO_SHIFT)) & DCP_CTRL_SET_PRESENT_CRYPTO_MASK) +#define DCP_CTRL_SET_CLKGATE_MASK (0x40000000U) +#define DCP_CTRL_SET_CLKGATE_SHIFT (30U) +#define DCP_CTRL_SET_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_SET_CLKGATE_SHIFT)) & DCP_CTRL_SET_CLKGATE_MASK) +#define DCP_CTRL_SET_SFTRST_MASK (0x80000000U) +#define DCP_CTRL_SET_SFTRST_SHIFT (31U) +#define DCP_CTRL_SET_SFTRST(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_SET_SFTRST_SHIFT)) & DCP_CTRL_SET_SFTRST_MASK) +/*! @} */ + +/*! @name CTRL_CLR - DCP control register 0 */ +/*! @{ */ +#define DCP_CTRL_CLR_CHANNEL_INTERRUPT_ENABLE_MASK (0xFFU) +#define DCP_CTRL_CLR_CHANNEL_INTERRUPT_ENABLE_SHIFT (0U) +/*! CHANNEL_INTERRUPT_ENABLE + * 0b00000001..CH0 + * 0b00000010..CH1 + * 0b00000100..CH2 + * 0b00001000..CH3 + */ +#define DCP_CTRL_CLR_CHANNEL_INTERRUPT_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CLR_CHANNEL_INTERRUPT_ENABLE_SHIFT)) & DCP_CTRL_CLR_CHANNEL_INTERRUPT_ENABLE_MASK) +#define DCP_CTRL_CLR_RSVD_CSC_INTERRUPT_ENABLE_MASK (0x100U) +#define DCP_CTRL_CLR_RSVD_CSC_INTERRUPT_ENABLE_SHIFT (8U) +#define DCP_CTRL_CLR_RSVD_CSC_INTERRUPT_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CLR_RSVD_CSC_INTERRUPT_ENABLE_SHIFT)) & DCP_CTRL_CLR_RSVD_CSC_INTERRUPT_ENABLE_MASK) +#define DCP_CTRL_CLR_ENABLE_CONTEXT_SWITCHING_MASK (0x200000U) +#define DCP_CTRL_CLR_ENABLE_CONTEXT_SWITCHING_SHIFT (21U) +#define DCP_CTRL_CLR_ENABLE_CONTEXT_SWITCHING(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CLR_ENABLE_CONTEXT_SWITCHING_SHIFT)) & DCP_CTRL_CLR_ENABLE_CONTEXT_SWITCHING_MASK) +#define DCP_CTRL_CLR_ENABLE_CONTEXT_CACHING_MASK (0x400000U) +#define DCP_CTRL_CLR_ENABLE_CONTEXT_CACHING_SHIFT (22U) +#define DCP_CTRL_CLR_ENABLE_CONTEXT_CACHING(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CLR_ENABLE_CONTEXT_CACHING_SHIFT)) & DCP_CTRL_CLR_ENABLE_CONTEXT_CACHING_MASK) +#define DCP_CTRL_CLR_GATHER_RESIDUAL_WRITES_MASK (0x800000U) +#define DCP_CTRL_CLR_GATHER_RESIDUAL_WRITES_SHIFT (23U) +#define DCP_CTRL_CLR_GATHER_RESIDUAL_WRITES(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CLR_GATHER_RESIDUAL_WRITES_SHIFT)) & DCP_CTRL_CLR_GATHER_RESIDUAL_WRITES_MASK) +#define DCP_CTRL_CLR_PRESENT_SHA_MASK (0x10000000U) +#define DCP_CTRL_CLR_PRESENT_SHA_SHIFT (28U) +/*! PRESENT_SHA + * 0b1..Present + * 0b0..Absent + */ +#define DCP_CTRL_CLR_PRESENT_SHA(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CLR_PRESENT_SHA_SHIFT)) & DCP_CTRL_CLR_PRESENT_SHA_MASK) +#define DCP_CTRL_CLR_PRESENT_CRYPTO_MASK (0x20000000U) +#define DCP_CTRL_CLR_PRESENT_CRYPTO_SHIFT (29U) +/*! PRESENT_CRYPTO + * 0b1..Present + * 0b0..Absent + */ +#define DCP_CTRL_CLR_PRESENT_CRYPTO(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CLR_PRESENT_CRYPTO_SHIFT)) & DCP_CTRL_CLR_PRESENT_CRYPTO_MASK) +#define DCP_CTRL_CLR_CLKGATE_MASK (0x40000000U) +#define DCP_CTRL_CLR_CLKGATE_SHIFT (30U) +#define DCP_CTRL_CLR_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CLR_CLKGATE_SHIFT)) & DCP_CTRL_CLR_CLKGATE_MASK) +#define DCP_CTRL_CLR_SFTRST_MASK (0x80000000U) +#define DCP_CTRL_CLR_SFTRST_SHIFT (31U) +#define DCP_CTRL_CLR_SFTRST(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_CLR_SFTRST_SHIFT)) & DCP_CTRL_CLR_SFTRST_MASK) +/*! @} */ + +/*! @name CTRL_TOG - DCP control register 0 */ +/*! @{ */ +#define DCP_CTRL_TOG_CHANNEL_INTERRUPT_ENABLE_MASK (0xFFU) +#define DCP_CTRL_TOG_CHANNEL_INTERRUPT_ENABLE_SHIFT (0U) +/*! CHANNEL_INTERRUPT_ENABLE + * 0b00000001..CH0 + * 0b00000010..CH1 + * 0b00000100..CH2 + * 0b00001000..CH3 + */ +#define DCP_CTRL_TOG_CHANNEL_INTERRUPT_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_TOG_CHANNEL_INTERRUPT_ENABLE_SHIFT)) & DCP_CTRL_TOG_CHANNEL_INTERRUPT_ENABLE_MASK) +#define DCP_CTRL_TOG_RSVD_CSC_INTERRUPT_ENABLE_MASK (0x100U) +#define DCP_CTRL_TOG_RSVD_CSC_INTERRUPT_ENABLE_SHIFT (8U) +#define DCP_CTRL_TOG_RSVD_CSC_INTERRUPT_ENABLE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_TOG_RSVD_CSC_INTERRUPT_ENABLE_SHIFT)) & DCP_CTRL_TOG_RSVD_CSC_INTERRUPT_ENABLE_MASK) +#define DCP_CTRL_TOG_ENABLE_CONTEXT_SWITCHING_MASK (0x200000U) +#define DCP_CTRL_TOG_ENABLE_CONTEXT_SWITCHING_SHIFT (21U) +#define DCP_CTRL_TOG_ENABLE_CONTEXT_SWITCHING(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_TOG_ENABLE_CONTEXT_SWITCHING_SHIFT)) & DCP_CTRL_TOG_ENABLE_CONTEXT_SWITCHING_MASK) +#define DCP_CTRL_TOG_ENABLE_CONTEXT_CACHING_MASK (0x400000U) +#define DCP_CTRL_TOG_ENABLE_CONTEXT_CACHING_SHIFT (22U) +#define DCP_CTRL_TOG_ENABLE_CONTEXT_CACHING(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_TOG_ENABLE_CONTEXT_CACHING_SHIFT)) & DCP_CTRL_TOG_ENABLE_CONTEXT_CACHING_MASK) +#define DCP_CTRL_TOG_GATHER_RESIDUAL_WRITES_MASK (0x800000U) +#define DCP_CTRL_TOG_GATHER_RESIDUAL_WRITES_SHIFT (23U) +#define DCP_CTRL_TOG_GATHER_RESIDUAL_WRITES(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_TOG_GATHER_RESIDUAL_WRITES_SHIFT)) & DCP_CTRL_TOG_GATHER_RESIDUAL_WRITES_MASK) +#define DCP_CTRL_TOG_PRESENT_SHA_MASK (0x10000000U) +#define DCP_CTRL_TOG_PRESENT_SHA_SHIFT (28U) +/*! PRESENT_SHA + * 0b1..Present + * 0b0..Absent + */ +#define DCP_CTRL_TOG_PRESENT_SHA(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_TOG_PRESENT_SHA_SHIFT)) & DCP_CTRL_TOG_PRESENT_SHA_MASK) +#define DCP_CTRL_TOG_PRESENT_CRYPTO_MASK (0x20000000U) +#define DCP_CTRL_TOG_PRESENT_CRYPTO_SHIFT (29U) +/*! PRESENT_CRYPTO + * 0b1..Present + * 0b0..Absent + */ +#define DCP_CTRL_TOG_PRESENT_CRYPTO(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_TOG_PRESENT_CRYPTO_SHIFT)) & DCP_CTRL_TOG_PRESENT_CRYPTO_MASK) +#define DCP_CTRL_TOG_CLKGATE_MASK (0x40000000U) +#define DCP_CTRL_TOG_CLKGATE_SHIFT (30U) +#define DCP_CTRL_TOG_CLKGATE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_TOG_CLKGATE_SHIFT)) & DCP_CTRL_TOG_CLKGATE_MASK) +#define DCP_CTRL_TOG_SFTRST_MASK (0x80000000U) +#define DCP_CTRL_TOG_SFTRST_SHIFT (31U) +#define DCP_CTRL_TOG_SFTRST(x) (((uint32_t)(((uint32_t)(x)) << DCP_CTRL_TOG_SFTRST_SHIFT)) & DCP_CTRL_TOG_SFTRST_MASK) +/*! @} */ + /*! @name STAT - DCP status register */ /*! @{ */ #define DCP_STAT_IRQ_MASK (0xFU) @@ -9699,6 +9857,102 @@ typedef struct { #define DCP_STAT_OTP_KEY_READY(x) (((uint32_t)(((uint32_t)(x)) << DCP_STAT_OTP_KEY_READY_SHIFT)) & DCP_STAT_OTP_KEY_READY_MASK) /*! @} */ +/*! @name STAT_SET - DCP status register */ +/*! @{ */ +#define DCP_STAT_SET_IRQ_MASK (0xFU) +#define DCP_STAT_SET_IRQ_SHIFT (0U) +#define DCP_STAT_SET_IRQ(x) (((uint32_t)(((uint32_t)(x)) << DCP_STAT_SET_IRQ_SHIFT)) & DCP_STAT_SET_IRQ_MASK) +#define DCP_STAT_SET_RSVD_IRQ_MASK (0x100U) +#define DCP_STAT_SET_RSVD_IRQ_SHIFT (8U) +#define DCP_STAT_SET_RSVD_IRQ(x) (((uint32_t)(((uint32_t)(x)) << DCP_STAT_SET_RSVD_IRQ_SHIFT)) & DCP_STAT_SET_RSVD_IRQ_MASK) +#define DCP_STAT_SET_READY_CHANNELS_MASK (0xFF0000U) +#define DCP_STAT_SET_READY_CHANNELS_SHIFT (16U) +/*! READY_CHANNELS + * 0b00000001..CH0 + * 0b00000010..CH1 + * 0b00000100..CH2 + * 0b00001000..CH3 + */ +#define DCP_STAT_SET_READY_CHANNELS(x) (((uint32_t)(((uint32_t)(x)) << DCP_STAT_SET_READY_CHANNELS_SHIFT)) & DCP_STAT_SET_READY_CHANNELS_MASK) +#define DCP_STAT_SET_CUR_CHANNEL_MASK (0xF000000U) +#define DCP_STAT_SET_CUR_CHANNEL_SHIFT (24U) +/*! CUR_CHANNEL + * 0b0000..None + * 0b0001..CH0 + * 0b0010..CH1 + * 0b0011..CH2 + * 0b0100..CH3 + */ +#define DCP_STAT_SET_CUR_CHANNEL(x) (((uint32_t)(((uint32_t)(x)) << DCP_STAT_SET_CUR_CHANNEL_SHIFT)) & DCP_STAT_SET_CUR_CHANNEL_MASK) +#define DCP_STAT_SET_OTP_KEY_READY_MASK (0x10000000U) +#define DCP_STAT_SET_OTP_KEY_READY_SHIFT (28U) +#define DCP_STAT_SET_OTP_KEY_READY(x) (((uint32_t)(((uint32_t)(x)) << DCP_STAT_SET_OTP_KEY_READY_SHIFT)) & DCP_STAT_SET_OTP_KEY_READY_MASK) +/*! @} */ + +/*! @name STAT_CLR - DCP status register */ +/*! @{ */ +#define DCP_STAT_CLR_IRQ_MASK (0xFU) +#define DCP_STAT_CLR_IRQ_SHIFT (0U) +#define DCP_STAT_CLR_IRQ(x) (((uint32_t)(((uint32_t)(x)) << DCP_STAT_CLR_IRQ_SHIFT)) & DCP_STAT_CLR_IRQ_MASK) +#define DCP_STAT_CLR_RSVD_IRQ_MASK (0x100U) +#define DCP_STAT_CLR_RSVD_IRQ_SHIFT (8U) +#define DCP_STAT_CLR_RSVD_IRQ(x) (((uint32_t)(((uint32_t)(x)) << DCP_STAT_CLR_RSVD_IRQ_SHIFT)) & DCP_STAT_CLR_RSVD_IRQ_MASK) +#define DCP_STAT_CLR_READY_CHANNELS_MASK (0xFF0000U) +#define DCP_STAT_CLR_READY_CHANNELS_SHIFT (16U) +/*! READY_CHANNELS + * 0b00000001..CH0 + * 0b00000010..CH1 + * 0b00000100..CH2 + * 0b00001000..CH3 + */ +#define DCP_STAT_CLR_READY_CHANNELS(x) (((uint32_t)(((uint32_t)(x)) << DCP_STAT_CLR_READY_CHANNELS_SHIFT)) & DCP_STAT_CLR_READY_CHANNELS_MASK) +#define DCP_STAT_CLR_CUR_CHANNEL_MASK (0xF000000U) +#define DCP_STAT_CLR_CUR_CHANNEL_SHIFT (24U) +/*! CUR_CHANNEL + * 0b0000..None + * 0b0001..CH0 + * 0b0010..CH1 + * 0b0011..CH2 + * 0b0100..CH3 + */ +#define DCP_STAT_CLR_CUR_CHANNEL(x) (((uint32_t)(((uint32_t)(x)) << DCP_STAT_CLR_CUR_CHANNEL_SHIFT)) & DCP_STAT_CLR_CUR_CHANNEL_MASK) +#define DCP_STAT_CLR_OTP_KEY_READY_MASK (0x10000000U) +#define DCP_STAT_CLR_OTP_KEY_READY_SHIFT (28U) +#define DCP_STAT_CLR_OTP_KEY_READY(x) (((uint32_t)(((uint32_t)(x)) << DCP_STAT_CLR_OTP_KEY_READY_SHIFT)) & DCP_STAT_CLR_OTP_KEY_READY_MASK) +/*! @} */ + +/*! @name STAT_TOG - DCP status register */ +/*! @{ */ +#define DCP_STAT_TOG_IRQ_MASK (0xFU) +#define DCP_STAT_TOG_IRQ_SHIFT (0U) +#define DCP_STAT_TOG_IRQ(x) (((uint32_t)(((uint32_t)(x)) << DCP_STAT_TOG_IRQ_SHIFT)) & DCP_STAT_TOG_IRQ_MASK) +#define DCP_STAT_TOG_RSVD_IRQ_MASK (0x100U) +#define DCP_STAT_TOG_RSVD_IRQ_SHIFT (8U) +#define DCP_STAT_TOG_RSVD_IRQ(x) (((uint32_t)(((uint32_t)(x)) << DCP_STAT_TOG_RSVD_IRQ_SHIFT)) & DCP_STAT_TOG_RSVD_IRQ_MASK) +#define DCP_STAT_TOG_READY_CHANNELS_MASK (0xFF0000U) +#define DCP_STAT_TOG_READY_CHANNELS_SHIFT (16U) +/*! READY_CHANNELS + * 0b00000001..CH0 + * 0b00000010..CH1 + * 0b00000100..CH2 + * 0b00001000..CH3 + */ +#define DCP_STAT_TOG_READY_CHANNELS(x) (((uint32_t)(((uint32_t)(x)) << DCP_STAT_TOG_READY_CHANNELS_SHIFT)) & DCP_STAT_TOG_READY_CHANNELS_MASK) +#define DCP_STAT_TOG_CUR_CHANNEL_MASK (0xF000000U) +#define DCP_STAT_TOG_CUR_CHANNEL_SHIFT (24U) +/*! CUR_CHANNEL + * 0b0000..None + * 0b0001..CH0 + * 0b0010..CH1 + * 0b0011..CH2 + * 0b0100..CH3 + */ +#define DCP_STAT_TOG_CUR_CHANNEL(x) (((uint32_t)(((uint32_t)(x)) << DCP_STAT_TOG_CUR_CHANNEL_SHIFT)) & DCP_STAT_TOG_CUR_CHANNEL_MASK) +#define DCP_STAT_TOG_OTP_KEY_READY_MASK (0x10000000U) +#define DCP_STAT_TOG_OTP_KEY_READY_SHIFT (28U) +#define DCP_STAT_TOG_OTP_KEY_READY(x) (((uint32_t)(((uint32_t)(x)) << DCP_STAT_TOG_OTP_KEY_READY_SHIFT)) & DCP_STAT_TOG_OTP_KEY_READY_MASK) +/*! @} */ + /*! @name CHANNELCTRL - DCP channel control register */ /*! @{ */ #define DCP_CHANNELCTRL_ENABLE_CHANNEL_MASK (0xFFU) @@ -9727,6 +9981,90 @@ typedef struct { #define DCP_CHANNELCTRL_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_RSVD_SHIFT)) & DCP_CHANNELCTRL_RSVD_MASK) /*! @} */ +/*! @name CHANNELCTRL_SET - DCP channel control register */ +/*! @{ */ +#define DCP_CHANNELCTRL_SET_ENABLE_CHANNEL_MASK (0xFFU) +#define DCP_CHANNELCTRL_SET_ENABLE_CHANNEL_SHIFT (0U) +/*! ENABLE_CHANNEL + * 0b00000001..CH0 + * 0b00000010..CH1 + * 0b00000100..CH2 + * 0b00001000..CH3 + */ +#define DCP_CHANNELCTRL_SET_ENABLE_CHANNEL(x) (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_SET_ENABLE_CHANNEL_SHIFT)) & DCP_CHANNELCTRL_SET_ENABLE_CHANNEL_MASK) +#define DCP_CHANNELCTRL_SET_HIGH_PRIORITY_CHANNEL_MASK (0xFF00U) +#define DCP_CHANNELCTRL_SET_HIGH_PRIORITY_CHANNEL_SHIFT (8U) +/*! HIGH_PRIORITY_CHANNEL + * 0b00000001..CH0 + * 0b00000010..CH1 + * 0b00000100..CH2 + * 0b00001000..CH3 + */ +#define DCP_CHANNELCTRL_SET_HIGH_PRIORITY_CHANNEL(x) (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_SET_HIGH_PRIORITY_CHANNEL_SHIFT)) & DCP_CHANNELCTRL_SET_HIGH_PRIORITY_CHANNEL_MASK) +#define DCP_CHANNELCTRL_SET_CH0_IRQ_MERGED_MASK (0x10000U) +#define DCP_CHANNELCTRL_SET_CH0_IRQ_MERGED_SHIFT (16U) +#define DCP_CHANNELCTRL_SET_CH0_IRQ_MERGED(x) (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_SET_CH0_IRQ_MERGED_SHIFT)) & DCP_CHANNELCTRL_SET_CH0_IRQ_MERGED_MASK) +#define DCP_CHANNELCTRL_SET_RSVD_MASK (0xFFFE0000U) +#define DCP_CHANNELCTRL_SET_RSVD_SHIFT (17U) +#define DCP_CHANNELCTRL_SET_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_SET_RSVD_SHIFT)) & DCP_CHANNELCTRL_SET_RSVD_MASK) +/*! @} */ + +/*! @name CHANNELCTRL_CLR - DCP channel control register */ +/*! @{ */ +#define DCP_CHANNELCTRL_CLR_ENABLE_CHANNEL_MASK (0xFFU) +#define DCP_CHANNELCTRL_CLR_ENABLE_CHANNEL_SHIFT (0U) +/*! ENABLE_CHANNEL + * 0b00000001..CH0 + * 0b00000010..CH1 + * 0b00000100..CH2 + * 0b00001000..CH3 + */ +#define DCP_CHANNELCTRL_CLR_ENABLE_CHANNEL(x) (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_CLR_ENABLE_CHANNEL_SHIFT)) & DCP_CHANNELCTRL_CLR_ENABLE_CHANNEL_MASK) +#define DCP_CHANNELCTRL_CLR_HIGH_PRIORITY_CHANNEL_MASK (0xFF00U) +#define DCP_CHANNELCTRL_CLR_HIGH_PRIORITY_CHANNEL_SHIFT (8U) +/*! HIGH_PRIORITY_CHANNEL + * 0b00000001..CH0 + * 0b00000010..CH1 + * 0b00000100..CH2 + * 0b00001000..CH3 + */ +#define DCP_CHANNELCTRL_CLR_HIGH_PRIORITY_CHANNEL(x) (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_CLR_HIGH_PRIORITY_CHANNEL_SHIFT)) & DCP_CHANNELCTRL_CLR_HIGH_PRIORITY_CHANNEL_MASK) +#define DCP_CHANNELCTRL_CLR_CH0_IRQ_MERGED_MASK (0x10000U) +#define DCP_CHANNELCTRL_CLR_CH0_IRQ_MERGED_SHIFT (16U) +#define DCP_CHANNELCTRL_CLR_CH0_IRQ_MERGED(x) (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_CLR_CH0_IRQ_MERGED_SHIFT)) & DCP_CHANNELCTRL_CLR_CH0_IRQ_MERGED_MASK) +#define DCP_CHANNELCTRL_CLR_RSVD_MASK (0xFFFE0000U) +#define DCP_CHANNELCTRL_CLR_RSVD_SHIFT (17U) +#define DCP_CHANNELCTRL_CLR_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_CLR_RSVD_SHIFT)) & DCP_CHANNELCTRL_CLR_RSVD_MASK) +/*! @} */ + +/*! @name CHANNELCTRL_TOG - DCP channel control register */ +/*! @{ */ +#define DCP_CHANNELCTRL_TOG_ENABLE_CHANNEL_MASK (0xFFU) +#define DCP_CHANNELCTRL_TOG_ENABLE_CHANNEL_SHIFT (0U) +/*! ENABLE_CHANNEL + * 0b00000001..CH0 + * 0b00000010..CH1 + * 0b00000100..CH2 + * 0b00001000..CH3 + */ +#define DCP_CHANNELCTRL_TOG_ENABLE_CHANNEL(x) (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_TOG_ENABLE_CHANNEL_SHIFT)) & DCP_CHANNELCTRL_TOG_ENABLE_CHANNEL_MASK) +#define DCP_CHANNELCTRL_TOG_HIGH_PRIORITY_CHANNEL_MASK (0xFF00U) +#define DCP_CHANNELCTRL_TOG_HIGH_PRIORITY_CHANNEL_SHIFT (8U) +/*! HIGH_PRIORITY_CHANNEL + * 0b00000001..CH0 + * 0b00000010..CH1 + * 0b00000100..CH2 + * 0b00001000..CH3 + */ +#define DCP_CHANNELCTRL_TOG_HIGH_PRIORITY_CHANNEL(x) (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_TOG_HIGH_PRIORITY_CHANNEL_SHIFT)) & DCP_CHANNELCTRL_TOG_HIGH_PRIORITY_CHANNEL_MASK) +#define DCP_CHANNELCTRL_TOG_CH0_IRQ_MERGED_MASK (0x10000U) +#define DCP_CHANNELCTRL_TOG_CH0_IRQ_MERGED_SHIFT (16U) +#define DCP_CHANNELCTRL_TOG_CH0_IRQ_MERGED(x) (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_TOG_CH0_IRQ_MERGED_SHIFT)) & DCP_CHANNELCTRL_TOG_CH0_IRQ_MERGED_MASK) +#define DCP_CHANNELCTRL_TOG_RSVD_MASK (0xFFFE0000U) +#define DCP_CHANNELCTRL_TOG_RSVD_SHIFT (17U) +#define DCP_CHANNELCTRL_TOG_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CHANNELCTRL_TOG_RSVD_SHIFT)) & DCP_CHANNELCTRL_TOG_RSVD_MASK) +/*! @} */ + /*! @name CAPABILITY0 - DCP capability 0 register */ /*! @{ */ #define DCP_CAPABILITY0_NUM_KEYS_MASK (0xFFU) @@ -10016,6 +10354,120 @@ typedef struct { #define DCP_CH0STAT_TAG(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_TAG_SHIFT)) & DCP_CH0STAT_TAG_MASK) /*! @} */ +/*! @name CH0STAT_SET - DCP channel 0 status register */ +/*! @{ */ +#define DCP_CH0STAT_SET_RSVD_COMPLETE_MASK (0x1U) +#define DCP_CH0STAT_SET_RSVD_COMPLETE_SHIFT (0U) +#define DCP_CH0STAT_SET_RSVD_COMPLETE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_SET_RSVD_COMPLETE_SHIFT)) & DCP_CH0STAT_SET_RSVD_COMPLETE_MASK) +#define DCP_CH0STAT_SET_HASH_MISMATCH_MASK (0x2U) +#define DCP_CH0STAT_SET_HASH_MISMATCH_SHIFT (1U) +#define DCP_CH0STAT_SET_HASH_MISMATCH(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_SET_HASH_MISMATCH_SHIFT)) & DCP_CH0STAT_SET_HASH_MISMATCH_MASK) +#define DCP_CH0STAT_SET_ERROR_SETUP_MASK (0x4U) +#define DCP_CH0STAT_SET_ERROR_SETUP_SHIFT (2U) +#define DCP_CH0STAT_SET_ERROR_SETUP(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_SET_ERROR_SETUP_SHIFT)) & DCP_CH0STAT_SET_ERROR_SETUP_MASK) +#define DCP_CH0STAT_SET_ERROR_PACKET_MASK (0x8U) +#define DCP_CH0STAT_SET_ERROR_PACKET_SHIFT (3U) +#define DCP_CH0STAT_SET_ERROR_PACKET(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_SET_ERROR_PACKET_SHIFT)) & DCP_CH0STAT_SET_ERROR_PACKET_MASK) +#define DCP_CH0STAT_SET_ERROR_SRC_MASK (0x10U) +#define DCP_CH0STAT_SET_ERROR_SRC_SHIFT (4U) +#define DCP_CH0STAT_SET_ERROR_SRC(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_SET_ERROR_SRC_SHIFT)) & DCP_CH0STAT_SET_ERROR_SRC_MASK) +#define DCP_CH0STAT_SET_ERROR_DST_MASK (0x20U) +#define DCP_CH0STAT_SET_ERROR_DST_SHIFT (5U) +#define DCP_CH0STAT_SET_ERROR_DST(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_SET_ERROR_DST_SHIFT)) & DCP_CH0STAT_SET_ERROR_DST_MASK) +#define DCP_CH0STAT_SET_ERROR_PAGEFAULT_MASK (0x40U) +#define DCP_CH0STAT_SET_ERROR_PAGEFAULT_SHIFT (6U) +#define DCP_CH0STAT_SET_ERROR_PAGEFAULT(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_SET_ERROR_PAGEFAULT_SHIFT)) & DCP_CH0STAT_SET_ERROR_PAGEFAULT_MASK) +#define DCP_CH0STAT_SET_ERROR_CODE_MASK (0xFF0000U) +#define DCP_CH0STAT_SET_ERROR_CODE_SHIFT (16U) +/*! ERROR_CODE + * 0b00000001..Error signalled because the next pointer is 0x00000000 + * 0b00000010..Error signalled because the semaphore is non-zero and neither chain bit is set + * 0b00000011..Error signalled because an error is reported reading/writing the context buffer + * 0b00000100..Error signalled because an error is reported reading/writing the payload + * 0b00000101..Error signalled because the control packet specifies an invalid mode select (for instance, blit + hash) + */ +#define DCP_CH0STAT_SET_ERROR_CODE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_SET_ERROR_CODE_SHIFT)) & DCP_CH0STAT_SET_ERROR_CODE_MASK) +#define DCP_CH0STAT_SET_TAG_MASK (0xFF000000U) +#define DCP_CH0STAT_SET_TAG_SHIFT (24U) +#define DCP_CH0STAT_SET_TAG(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_SET_TAG_SHIFT)) & DCP_CH0STAT_SET_TAG_MASK) +/*! @} */ + +/*! @name CH0STAT_CLR - DCP channel 0 status register */ +/*! @{ */ +#define DCP_CH0STAT_CLR_RSVD_COMPLETE_MASK (0x1U) +#define DCP_CH0STAT_CLR_RSVD_COMPLETE_SHIFT (0U) +#define DCP_CH0STAT_CLR_RSVD_COMPLETE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_CLR_RSVD_COMPLETE_SHIFT)) & DCP_CH0STAT_CLR_RSVD_COMPLETE_MASK) +#define DCP_CH0STAT_CLR_HASH_MISMATCH_MASK (0x2U) +#define DCP_CH0STAT_CLR_HASH_MISMATCH_SHIFT (1U) +#define DCP_CH0STAT_CLR_HASH_MISMATCH(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_CLR_HASH_MISMATCH_SHIFT)) & DCP_CH0STAT_CLR_HASH_MISMATCH_MASK) +#define DCP_CH0STAT_CLR_ERROR_SETUP_MASK (0x4U) +#define DCP_CH0STAT_CLR_ERROR_SETUP_SHIFT (2U) +#define DCP_CH0STAT_CLR_ERROR_SETUP(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_CLR_ERROR_SETUP_SHIFT)) & DCP_CH0STAT_CLR_ERROR_SETUP_MASK) +#define DCP_CH0STAT_CLR_ERROR_PACKET_MASK (0x8U) +#define DCP_CH0STAT_CLR_ERROR_PACKET_SHIFT (3U) +#define DCP_CH0STAT_CLR_ERROR_PACKET(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_CLR_ERROR_PACKET_SHIFT)) & DCP_CH0STAT_CLR_ERROR_PACKET_MASK) +#define DCP_CH0STAT_CLR_ERROR_SRC_MASK (0x10U) +#define DCP_CH0STAT_CLR_ERROR_SRC_SHIFT (4U) +#define DCP_CH0STAT_CLR_ERROR_SRC(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_CLR_ERROR_SRC_SHIFT)) & DCP_CH0STAT_CLR_ERROR_SRC_MASK) +#define DCP_CH0STAT_CLR_ERROR_DST_MASK (0x20U) +#define DCP_CH0STAT_CLR_ERROR_DST_SHIFT (5U) +#define DCP_CH0STAT_CLR_ERROR_DST(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_CLR_ERROR_DST_SHIFT)) & DCP_CH0STAT_CLR_ERROR_DST_MASK) +#define DCP_CH0STAT_CLR_ERROR_PAGEFAULT_MASK (0x40U) +#define DCP_CH0STAT_CLR_ERROR_PAGEFAULT_SHIFT (6U) +#define DCP_CH0STAT_CLR_ERROR_PAGEFAULT(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_CLR_ERROR_PAGEFAULT_SHIFT)) & DCP_CH0STAT_CLR_ERROR_PAGEFAULT_MASK) +#define DCP_CH0STAT_CLR_ERROR_CODE_MASK (0xFF0000U) +#define DCP_CH0STAT_CLR_ERROR_CODE_SHIFT (16U) +/*! ERROR_CODE + * 0b00000001..Error signalled because the next pointer is 0x00000000 + * 0b00000010..Error signalled because the semaphore is non-zero and neither chain bit is set + * 0b00000011..Error signalled because an error is reported reading/writing the context buffer + * 0b00000100..Error signalled because an error is reported reading/writing the payload + * 0b00000101..Error signalled because the control packet specifies an invalid mode select (for instance, blit + hash) + */ +#define DCP_CH0STAT_CLR_ERROR_CODE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_CLR_ERROR_CODE_SHIFT)) & DCP_CH0STAT_CLR_ERROR_CODE_MASK) +#define DCP_CH0STAT_CLR_TAG_MASK (0xFF000000U) +#define DCP_CH0STAT_CLR_TAG_SHIFT (24U) +#define DCP_CH0STAT_CLR_TAG(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_CLR_TAG_SHIFT)) & DCP_CH0STAT_CLR_TAG_MASK) +/*! @} */ + +/*! @name CH0STAT_TOG - DCP channel 0 status register */ +/*! @{ */ +#define DCP_CH0STAT_TOG_RSVD_COMPLETE_MASK (0x1U) +#define DCP_CH0STAT_TOG_RSVD_COMPLETE_SHIFT (0U) +#define DCP_CH0STAT_TOG_RSVD_COMPLETE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_TOG_RSVD_COMPLETE_SHIFT)) & DCP_CH0STAT_TOG_RSVD_COMPLETE_MASK) +#define DCP_CH0STAT_TOG_HASH_MISMATCH_MASK (0x2U) +#define DCP_CH0STAT_TOG_HASH_MISMATCH_SHIFT (1U) +#define DCP_CH0STAT_TOG_HASH_MISMATCH(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_TOG_HASH_MISMATCH_SHIFT)) & DCP_CH0STAT_TOG_HASH_MISMATCH_MASK) +#define DCP_CH0STAT_TOG_ERROR_SETUP_MASK (0x4U) +#define DCP_CH0STAT_TOG_ERROR_SETUP_SHIFT (2U) +#define DCP_CH0STAT_TOG_ERROR_SETUP(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_TOG_ERROR_SETUP_SHIFT)) & DCP_CH0STAT_TOG_ERROR_SETUP_MASK) +#define DCP_CH0STAT_TOG_ERROR_PACKET_MASK (0x8U) +#define DCP_CH0STAT_TOG_ERROR_PACKET_SHIFT (3U) +#define DCP_CH0STAT_TOG_ERROR_PACKET(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_TOG_ERROR_PACKET_SHIFT)) & DCP_CH0STAT_TOG_ERROR_PACKET_MASK) +#define DCP_CH0STAT_TOG_ERROR_SRC_MASK (0x10U) +#define DCP_CH0STAT_TOG_ERROR_SRC_SHIFT (4U) +#define DCP_CH0STAT_TOG_ERROR_SRC(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_TOG_ERROR_SRC_SHIFT)) & DCP_CH0STAT_TOG_ERROR_SRC_MASK) +#define DCP_CH0STAT_TOG_ERROR_DST_MASK (0x20U) +#define DCP_CH0STAT_TOG_ERROR_DST_SHIFT (5U) +#define DCP_CH0STAT_TOG_ERROR_DST(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_TOG_ERROR_DST_SHIFT)) & DCP_CH0STAT_TOG_ERROR_DST_MASK) +#define DCP_CH0STAT_TOG_ERROR_PAGEFAULT_MASK (0x40U) +#define DCP_CH0STAT_TOG_ERROR_PAGEFAULT_SHIFT (6U) +#define DCP_CH0STAT_TOG_ERROR_PAGEFAULT(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_TOG_ERROR_PAGEFAULT_SHIFT)) & DCP_CH0STAT_TOG_ERROR_PAGEFAULT_MASK) +#define DCP_CH0STAT_TOG_ERROR_CODE_MASK (0xFF0000U) +#define DCP_CH0STAT_TOG_ERROR_CODE_SHIFT (16U) +/*! ERROR_CODE + * 0b00000001..Error signalled because the next pointer is 0x00000000 + * 0b00000010..Error signalled because the semaphore is non-zero and neither chain bit is set + * 0b00000011..Error signalled because an error is reported reading/writing the context buffer + * 0b00000100..Error signalled because an error is reported reading/writing the payload + * 0b00000101..Error signalled because the control packet specifies an invalid mode select (for instance, blit + hash) + */ +#define DCP_CH0STAT_TOG_ERROR_CODE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_TOG_ERROR_CODE_SHIFT)) & DCP_CH0STAT_TOG_ERROR_CODE_MASK) +#define DCP_CH0STAT_TOG_TAG_MASK (0xFF000000U) +#define DCP_CH0STAT_TOG_TAG_SHIFT (24U) +#define DCP_CH0STAT_TOG_TAG(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0STAT_TOG_TAG_SHIFT)) & DCP_CH0STAT_TOG_TAG_MASK) +/*! @} */ + /*! @name CH0OPTS - DCP channel 0 options register */ /*! @{ */ #define DCP_CH0OPTS_RECOVERY_TIMER_MASK (0xFFFFU) @@ -10026,6 +10478,36 @@ typedef struct { #define DCP_CH0OPTS_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0OPTS_RSVD_SHIFT)) & DCP_CH0OPTS_RSVD_MASK) /*! @} */ +/*! @name CH0OPTS_SET - DCP channel 0 options register */ +/*! @{ */ +#define DCP_CH0OPTS_SET_RECOVERY_TIMER_MASK (0xFFFFU) +#define DCP_CH0OPTS_SET_RECOVERY_TIMER_SHIFT (0U) +#define DCP_CH0OPTS_SET_RECOVERY_TIMER(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0OPTS_SET_RECOVERY_TIMER_SHIFT)) & DCP_CH0OPTS_SET_RECOVERY_TIMER_MASK) +#define DCP_CH0OPTS_SET_RSVD_MASK (0xFFFF0000U) +#define DCP_CH0OPTS_SET_RSVD_SHIFT (16U) +#define DCP_CH0OPTS_SET_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0OPTS_SET_RSVD_SHIFT)) & DCP_CH0OPTS_SET_RSVD_MASK) +/*! @} */ + +/*! @name CH0OPTS_CLR - DCP channel 0 options register */ +/*! @{ */ +#define DCP_CH0OPTS_CLR_RECOVERY_TIMER_MASK (0xFFFFU) +#define DCP_CH0OPTS_CLR_RECOVERY_TIMER_SHIFT (0U) +#define DCP_CH0OPTS_CLR_RECOVERY_TIMER(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0OPTS_CLR_RECOVERY_TIMER_SHIFT)) & DCP_CH0OPTS_CLR_RECOVERY_TIMER_MASK) +#define DCP_CH0OPTS_CLR_RSVD_MASK (0xFFFF0000U) +#define DCP_CH0OPTS_CLR_RSVD_SHIFT (16U) +#define DCP_CH0OPTS_CLR_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0OPTS_CLR_RSVD_SHIFT)) & DCP_CH0OPTS_CLR_RSVD_MASK) +/*! @} */ + +/*! @name CH0OPTS_TOG - DCP channel 0 options register */ +/*! @{ */ +#define DCP_CH0OPTS_TOG_RECOVERY_TIMER_MASK (0xFFFFU) +#define DCP_CH0OPTS_TOG_RECOVERY_TIMER_SHIFT (0U) +#define DCP_CH0OPTS_TOG_RECOVERY_TIMER(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0OPTS_TOG_RECOVERY_TIMER_SHIFT)) & DCP_CH0OPTS_TOG_RECOVERY_TIMER_MASK) +#define DCP_CH0OPTS_TOG_RSVD_MASK (0xFFFF0000U) +#define DCP_CH0OPTS_TOG_RSVD_SHIFT (16U) +#define DCP_CH0OPTS_TOG_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH0OPTS_TOG_RSVD_SHIFT)) & DCP_CH0OPTS_TOG_RSVD_MASK) +/*! @} */ + /*! @name CH1CMDPTR - DCP channel 1 command pointer address register */ /*! @{ */ #define DCP_CH1CMDPTR_ADDR_MASK (0xFFFFFFFFU) @@ -10081,6 +10563,120 @@ typedef struct { #define DCP_CH1STAT_TAG(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_TAG_SHIFT)) & DCP_CH1STAT_TAG_MASK) /*! @} */ +/*! @name CH1STAT_SET - DCP channel 1 status register */ +/*! @{ */ +#define DCP_CH1STAT_SET_RSVD_COMPLETE_MASK (0x1U) +#define DCP_CH1STAT_SET_RSVD_COMPLETE_SHIFT (0U) +#define DCP_CH1STAT_SET_RSVD_COMPLETE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_SET_RSVD_COMPLETE_SHIFT)) & DCP_CH1STAT_SET_RSVD_COMPLETE_MASK) +#define DCP_CH1STAT_SET_HASH_MISMATCH_MASK (0x2U) +#define DCP_CH1STAT_SET_HASH_MISMATCH_SHIFT (1U) +#define DCP_CH1STAT_SET_HASH_MISMATCH(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_SET_HASH_MISMATCH_SHIFT)) & DCP_CH1STAT_SET_HASH_MISMATCH_MASK) +#define DCP_CH1STAT_SET_ERROR_SETUP_MASK (0x4U) +#define DCP_CH1STAT_SET_ERROR_SETUP_SHIFT (2U) +#define DCP_CH1STAT_SET_ERROR_SETUP(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_SET_ERROR_SETUP_SHIFT)) & DCP_CH1STAT_SET_ERROR_SETUP_MASK) +#define DCP_CH1STAT_SET_ERROR_PACKET_MASK (0x8U) +#define DCP_CH1STAT_SET_ERROR_PACKET_SHIFT (3U) +#define DCP_CH1STAT_SET_ERROR_PACKET(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_SET_ERROR_PACKET_SHIFT)) & DCP_CH1STAT_SET_ERROR_PACKET_MASK) +#define DCP_CH1STAT_SET_ERROR_SRC_MASK (0x10U) +#define DCP_CH1STAT_SET_ERROR_SRC_SHIFT (4U) +#define DCP_CH1STAT_SET_ERROR_SRC(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_SET_ERROR_SRC_SHIFT)) & DCP_CH1STAT_SET_ERROR_SRC_MASK) +#define DCP_CH1STAT_SET_ERROR_DST_MASK (0x20U) +#define DCP_CH1STAT_SET_ERROR_DST_SHIFT (5U) +#define DCP_CH1STAT_SET_ERROR_DST(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_SET_ERROR_DST_SHIFT)) & DCP_CH1STAT_SET_ERROR_DST_MASK) +#define DCP_CH1STAT_SET_ERROR_PAGEFAULT_MASK (0x40U) +#define DCP_CH1STAT_SET_ERROR_PAGEFAULT_SHIFT (6U) +#define DCP_CH1STAT_SET_ERROR_PAGEFAULT(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_SET_ERROR_PAGEFAULT_SHIFT)) & DCP_CH1STAT_SET_ERROR_PAGEFAULT_MASK) +#define DCP_CH1STAT_SET_ERROR_CODE_MASK (0xFF0000U) +#define DCP_CH1STAT_SET_ERROR_CODE_SHIFT (16U) +/*! ERROR_CODE + * 0b00000001..Error is signalled because the next pointer is 0x00000000. + * 0b00000010..Error is signalled because the semaphore is of a non-zero value and neither of the chain bits is set. + * 0b00000011..Error is signalled because an error was reported when reading/writing the context buffer. + * 0b00000100..Error is signalled because an error was reported when reading/writing the payload. + * 0b00000101..Error is signalled because the control packet specifies an invalid mode select (for example, blit + hash). + */ +#define DCP_CH1STAT_SET_ERROR_CODE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_SET_ERROR_CODE_SHIFT)) & DCP_CH1STAT_SET_ERROR_CODE_MASK) +#define DCP_CH1STAT_SET_TAG_MASK (0xFF000000U) +#define DCP_CH1STAT_SET_TAG_SHIFT (24U) +#define DCP_CH1STAT_SET_TAG(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_SET_TAG_SHIFT)) & DCP_CH1STAT_SET_TAG_MASK) +/*! @} */ + +/*! @name CH1STAT_CLR - DCP channel 1 status register */ +/*! @{ */ +#define DCP_CH1STAT_CLR_RSVD_COMPLETE_MASK (0x1U) +#define DCP_CH1STAT_CLR_RSVD_COMPLETE_SHIFT (0U) +#define DCP_CH1STAT_CLR_RSVD_COMPLETE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_CLR_RSVD_COMPLETE_SHIFT)) & DCP_CH1STAT_CLR_RSVD_COMPLETE_MASK) +#define DCP_CH1STAT_CLR_HASH_MISMATCH_MASK (0x2U) +#define DCP_CH1STAT_CLR_HASH_MISMATCH_SHIFT (1U) +#define DCP_CH1STAT_CLR_HASH_MISMATCH(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_CLR_HASH_MISMATCH_SHIFT)) & DCP_CH1STAT_CLR_HASH_MISMATCH_MASK) +#define DCP_CH1STAT_CLR_ERROR_SETUP_MASK (0x4U) +#define DCP_CH1STAT_CLR_ERROR_SETUP_SHIFT (2U) +#define DCP_CH1STAT_CLR_ERROR_SETUP(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_CLR_ERROR_SETUP_SHIFT)) & DCP_CH1STAT_CLR_ERROR_SETUP_MASK) +#define DCP_CH1STAT_CLR_ERROR_PACKET_MASK (0x8U) +#define DCP_CH1STAT_CLR_ERROR_PACKET_SHIFT (3U) +#define DCP_CH1STAT_CLR_ERROR_PACKET(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_CLR_ERROR_PACKET_SHIFT)) & DCP_CH1STAT_CLR_ERROR_PACKET_MASK) +#define DCP_CH1STAT_CLR_ERROR_SRC_MASK (0x10U) +#define DCP_CH1STAT_CLR_ERROR_SRC_SHIFT (4U) +#define DCP_CH1STAT_CLR_ERROR_SRC(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_CLR_ERROR_SRC_SHIFT)) & DCP_CH1STAT_CLR_ERROR_SRC_MASK) +#define DCP_CH1STAT_CLR_ERROR_DST_MASK (0x20U) +#define DCP_CH1STAT_CLR_ERROR_DST_SHIFT (5U) +#define DCP_CH1STAT_CLR_ERROR_DST(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_CLR_ERROR_DST_SHIFT)) & DCP_CH1STAT_CLR_ERROR_DST_MASK) +#define DCP_CH1STAT_CLR_ERROR_PAGEFAULT_MASK (0x40U) +#define DCP_CH1STAT_CLR_ERROR_PAGEFAULT_SHIFT (6U) +#define DCP_CH1STAT_CLR_ERROR_PAGEFAULT(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_CLR_ERROR_PAGEFAULT_SHIFT)) & DCP_CH1STAT_CLR_ERROR_PAGEFAULT_MASK) +#define DCP_CH1STAT_CLR_ERROR_CODE_MASK (0xFF0000U) +#define DCP_CH1STAT_CLR_ERROR_CODE_SHIFT (16U) +/*! ERROR_CODE + * 0b00000001..Error is signalled because the next pointer is 0x00000000. + * 0b00000010..Error is signalled because the semaphore is of a non-zero value and neither of the chain bits is set. + * 0b00000011..Error is signalled because an error was reported when reading/writing the context buffer. + * 0b00000100..Error is signalled because an error was reported when reading/writing the payload. + * 0b00000101..Error is signalled because the control packet specifies an invalid mode select (for example, blit + hash). + */ +#define DCP_CH1STAT_CLR_ERROR_CODE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_CLR_ERROR_CODE_SHIFT)) & DCP_CH1STAT_CLR_ERROR_CODE_MASK) +#define DCP_CH1STAT_CLR_TAG_MASK (0xFF000000U) +#define DCP_CH1STAT_CLR_TAG_SHIFT (24U) +#define DCP_CH1STAT_CLR_TAG(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_CLR_TAG_SHIFT)) & DCP_CH1STAT_CLR_TAG_MASK) +/*! @} */ + +/*! @name CH1STAT_TOG - DCP channel 1 status register */ +/*! @{ */ +#define DCP_CH1STAT_TOG_RSVD_COMPLETE_MASK (0x1U) +#define DCP_CH1STAT_TOG_RSVD_COMPLETE_SHIFT (0U) +#define DCP_CH1STAT_TOG_RSVD_COMPLETE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_TOG_RSVD_COMPLETE_SHIFT)) & DCP_CH1STAT_TOG_RSVD_COMPLETE_MASK) +#define DCP_CH1STAT_TOG_HASH_MISMATCH_MASK (0x2U) +#define DCP_CH1STAT_TOG_HASH_MISMATCH_SHIFT (1U) +#define DCP_CH1STAT_TOG_HASH_MISMATCH(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_TOG_HASH_MISMATCH_SHIFT)) & DCP_CH1STAT_TOG_HASH_MISMATCH_MASK) +#define DCP_CH1STAT_TOG_ERROR_SETUP_MASK (0x4U) +#define DCP_CH1STAT_TOG_ERROR_SETUP_SHIFT (2U) +#define DCP_CH1STAT_TOG_ERROR_SETUP(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_TOG_ERROR_SETUP_SHIFT)) & DCP_CH1STAT_TOG_ERROR_SETUP_MASK) +#define DCP_CH1STAT_TOG_ERROR_PACKET_MASK (0x8U) +#define DCP_CH1STAT_TOG_ERROR_PACKET_SHIFT (3U) +#define DCP_CH1STAT_TOG_ERROR_PACKET(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_TOG_ERROR_PACKET_SHIFT)) & DCP_CH1STAT_TOG_ERROR_PACKET_MASK) +#define DCP_CH1STAT_TOG_ERROR_SRC_MASK (0x10U) +#define DCP_CH1STAT_TOG_ERROR_SRC_SHIFT (4U) +#define DCP_CH1STAT_TOG_ERROR_SRC(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_TOG_ERROR_SRC_SHIFT)) & DCP_CH1STAT_TOG_ERROR_SRC_MASK) +#define DCP_CH1STAT_TOG_ERROR_DST_MASK (0x20U) +#define DCP_CH1STAT_TOG_ERROR_DST_SHIFT (5U) +#define DCP_CH1STAT_TOG_ERROR_DST(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_TOG_ERROR_DST_SHIFT)) & DCP_CH1STAT_TOG_ERROR_DST_MASK) +#define DCP_CH1STAT_TOG_ERROR_PAGEFAULT_MASK (0x40U) +#define DCP_CH1STAT_TOG_ERROR_PAGEFAULT_SHIFT (6U) +#define DCP_CH1STAT_TOG_ERROR_PAGEFAULT(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_TOG_ERROR_PAGEFAULT_SHIFT)) & DCP_CH1STAT_TOG_ERROR_PAGEFAULT_MASK) +#define DCP_CH1STAT_TOG_ERROR_CODE_MASK (0xFF0000U) +#define DCP_CH1STAT_TOG_ERROR_CODE_SHIFT (16U) +/*! ERROR_CODE + * 0b00000001..Error is signalled because the next pointer is 0x00000000. + * 0b00000010..Error is signalled because the semaphore is of a non-zero value and neither of the chain bits is set. + * 0b00000011..Error is signalled because an error was reported when reading/writing the context buffer. + * 0b00000100..Error is signalled because an error was reported when reading/writing the payload. + * 0b00000101..Error is signalled because the control packet specifies an invalid mode select (for example, blit + hash). + */ +#define DCP_CH1STAT_TOG_ERROR_CODE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_TOG_ERROR_CODE_SHIFT)) & DCP_CH1STAT_TOG_ERROR_CODE_MASK) +#define DCP_CH1STAT_TOG_TAG_MASK (0xFF000000U) +#define DCP_CH1STAT_TOG_TAG_SHIFT (24U) +#define DCP_CH1STAT_TOG_TAG(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1STAT_TOG_TAG_SHIFT)) & DCP_CH1STAT_TOG_TAG_MASK) +/*! @} */ + /*! @name CH1OPTS - DCP channel 1 options register */ /*! @{ */ #define DCP_CH1OPTS_RECOVERY_TIMER_MASK (0xFFFFU) @@ -10091,6 +10687,36 @@ typedef struct { #define DCP_CH1OPTS_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1OPTS_RSVD_SHIFT)) & DCP_CH1OPTS_RSVD_MASK) /*! @} */ +/*! @name CH1OPTS_SET - DCP channel 1 options register */ +/*! @{ */ +#define DCP_CH1OPTS_SET_RECOVERY_TIMER_MASK (0xFFFFU) +#define DCP_CH1OPTS_SET_RECOVERY_TIMER_SHIFT (0U) +#define DCP_CH1OPTS_SET_RECOVERY_TIMER(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1OPTS_SET_RECOVERY_TIMER_SHIFT)) & DCP_CH1OPTS_SET_RECOVERY_TIMER_MASK) +#define DCP_CH1OPTS_SET_RSVD_MASK (0xFFFF0000U) +#define DCP_CH1OPTS_SET_RSVD_SHIFT (16U) +#define DCP_CH1OPTS_SET_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1OPTS_SET_RSVD_SHIFT)) & DCP_CH1OPTS_SET_RSVD_MASK) +/*! @} */ + +/*! @name CH1OPTS_CLR - DCP channel 1 options register */ +/*! @{ */ +#define DCP_CH1OPTS_CLR_RECOVERY_TIMER_MASK (0xFFFFU) +#define DCP_CH1OPTS_CLR_RECOVERY_TIMER_SHIFT (0U) +#define DCP_CH1OPTS_CLR_RECOVERY_TIMER(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1OPTS_CLR_RECOVERY_TIMER_SHIFT)) & DCP_CH1OPTS_CLR_RECOVERY_TIMER_MASK) +#define DCP_CH1OPTS_CLR_RSVD_MASK (0xFFFF0000U) +#define DCP_CH1OPTS_CLR_RSVD_SHIFT (16U) +#define DCP_CH1OPTS_CLR_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1OPTS_CLR_RSVD_SHIFT)) & DCP_CH1OPTS_CLR_RSVD_MASK) +/*! @} */ + +/*! @name CH1OPTS_TOG - DCP channel 1 options register */ +/*! @{ */ +#define DCP_CH1OPTS_TOG_RECOVERY_TIMER_MASK (0xFFFFU) +#define DCP_CH1OPTS_TOG_RECOVERY_TIMER_SHIFT (0U) +#define DCP_CH1OPTS_TOG_RECOVERY_TIMER(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1OPTS_TOG_RECOVERY_TIMER_SHIFT)) & DCP_CH1OPTS_TOG_RECOVERY_TIMER_MASK) +#define DCP_CH1OPTS_TOG_RSVD_MASK (0xFFFF0000U) +#define DCP_CH1OPTS_TOG_RSVD_SHIFT (16U) +#define DCP_CH1OPTS_TOG_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH1OPTS_TOG_RSVD_SHIFT)) & DCP_CH1OPTS_TOG_RSVD_MASK) +/*! @} */ + /*! @name CH2CMDPTR - DCP channel 2 command pointer address register */ /*! @{ */ #define DCP_CH2CMDPTR_ADDR_MASK (0xFFFFFFFFU) @@ -10146,6 +10772,120 @@ typedef struct { #define DCP_CH2STAT_TAG(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_TAG_SHIFT)) & DCP_CH2STAT_TAG_MASK) /*! @} */ +/*! @name CH2STAT_SET - DCP channel 2 status register */ +/*! @{ */ +#define DCP_CH2STAT_SET_RSVD_COMPLETE_MASK (0x1U) +#define DCP_CH2STAT_SET_RSVD_COMPLETE_SHIFT (0U) +#define DCP_CH2STAT_SET_RSVD_COMPLETE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_SET_RSVD_COMPLETE_SHIFT)) & DCP_CH2STAT_SET_RSVD_COMPLETE_MASK) +#define DCP_CH2STAT_SET_HASH_MISMATCH_MASK (0x2U) +#define DCP_CH2STAT_SET_HASH_MISMATCH_SHIFT (1U) +#define DCP_CH2STAT_SET_HASH_MISMATCH(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_SET_HASH_MISMATCH_SHIFT)) & DCP_CH2STAT_SET_HASH_MISMATCH_MASK) +#define DCP_CH2STAT_SET_ERROR_SETUP_MASK (0x4U) +#define DCP_CH2STAT_SET_ERROR_SETUP_SHIFT (2U) +#define DCP_CH2STAT_SET_ERROR_SETUP(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_SET_ERROR_SETUP_SHIFT)) & DCP_CH2STAT_SET_ERROR_SETUP_MASK) +#define DCP_CH2STAT_SET_ERROR_PACKET_MASK (0x8U) +#define DCP_CH2STAT_SET_ERROR_PACKET_SHIFT (3U) +#define DCP_CH2STAT_SET_ERROR_PACKET(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_SET_ERROR_PACKET_SHIFT)) & DCP_CH2STAT_SET_ERROR_PACKET_MASK) +#define DCP_CH2STAT_SET_ERROR_SRC_MASK (0x10U) +#define DCP_CH2STAT_SET_ERROR_SRC_SHIFT (4U) +#define DCP_CH2STAT_SET_ERROR_SRC(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_SET_ERROR_SRC_SHIFT)) & DCP_CH2STAT_SET_ERROR_SRC_MASK) +#define DCP_CH2STAT_SET_ERROR_DST_MASK (0x20U) +#define DCP_CH2STAT_SET_ERROR_DST_SHIFT (5U) +#define DCP_CH2STAT_SET_ERROR_DST(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_SET_ERROR_DST_SHIFT)) & DCP_CH2STAT_SET_ERROR_DST_MASK) +#define DCP_CH2STAT_SET_ERROR_PAGEFAULT_MASK (0x40U) +#define DCP_CH2STAT_SET_ERROR_PAGEFAULT_SHIFT (6U) +#define DCP_CH2STAT_SET_ERROR_PAGEFAULT(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_SET_ERROR_PAGEFAULT_SHIFT)) & DCP_CH2STAT_SET_ERROR_PAGEFAULT_MASK) +#define DCP_CH2STAT_SET_ERROR_CODE_MASK (0xFF0000U) +#define DCP_CH2STAT_SET_ERROR_CODE_SHIFT (16U) +/*! ERROR_CODE + * 0b00000001..Error is signalled because the next pointer is 0x00000000. + * 0b00000010..Error is signalled because the semaphore is of a non-zero value and neither of the chain bits is set. + * 0b00000011..Error is signalled because an error was reported while reading/writing the context buffer. + * 0b00000100..Error is signalled because an error was reported while reading/writing the payload. + * 0b00000101..Error is signalled because the control packet specifies an invalid mode select (for instance, blit + hash). + */ +#define DCP_CH2STAT_SET_ERROR_CODE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_SET_ERROR_CODE_SHIFT)) & DCP_CH2STAT_SET_ERROR_CODE_MASK) +#define DCP_CH2STAT_SET_TAG_MASK (0xFF000000U) +#define DCP_CH2STAT_SET_TAG_SHIFT (24U) +#define DCP_CH2STAT_SET_TAG(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_SET_TAG_SHIFT)) & DCP_CH2STAT_SET_TAG_MASK) +/*! @} */ + +/*! @name CH2STAT_CLR - DCP channel 2 status register */ +/*! @{ */ +#define DCP_CH2STAT_CLR_RSVD_COMPLETE_MASK (0x1U) +#define DCP_CH2STAT_CLR_RSVD_COMPLETE_SHIFT (0U) +#define DCP_CH2STAT_CLR_RSVD_COMPLETE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_CLR_RSVD_COMPLETE_SHIFT)) & DCP_CH2STAT_CLR_RSVD_COMPLETE_MASK) +#define DCP_CH2STAT_CLR_HASH_MISMATCH_MASK (0x2U) +#define DCP_CH2STAT_CLR_HASH_MISMATCH_SHIFT (1U) +#define DCP_CH2STAT_CLR_HASH_MISMATCH(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_CLR_HASH_MISMATCH_SHIFT)) & DCP_CH2STAT_CLR_HASH_MISMATCH_MASK) +#define DCP_CH2STAT_CLR_ERROR_SETUP_MASK (0x4U) +#define DCP_CH2STAT_CLR_ERROR_SETUP_SHIFT (2U) +#define DCP_CH2STAT_CLR_ERROR_SETUP(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_CLR_ERROR_SETUP_SHIFT)) & DCP_CH2STAT_CLR_ERROR_SETUP_MASK) +#define DCP_CH2STAT_CLR_ERROR_PACKET_MASK (0x8U) +#define DCP_CH2STAT_CLR_ERROR_PACKET_SHIFT (3U) +#define DCP_CH2STAT_CLR_ERROR_PACKET(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_CLR_ERROR_PACKET_SHIFT)) & DCP_CH2STAT_CLR_ERROR_PACKET_MASK) +#define DCP_CH2STAT_CLR_ERROR_SRC_MASK (0x10U) +#define DCP_CH2STAT_CLR_ERROR_SRC_SHIFT (4U) +#define DCP_CH2STAT_CLR_ERROR_SRC(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_CLR_ERROR_SRC_SHIFT)) & DCP_CH2STAT_CLR_ERROR_SRC_MASK) +#define DCP_CH2STAT_CLR_ERROR_DST_MASK (0x20U) +#define DCP_CH2STAT_CLR_ERROR_DST_SHIFT (5U) +#define DCP_CH2STAT_CLR_ERROR_DST(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_CLR_ERROR_DST_SHIFT)) & DCP_CH2STAT_CLR_ERROR_DST_MASK) +#define DCP_CH2STAT_CLR_ERROR_PAGEFAULT_MASK (0x40U) +#define DCP_CH2STAT_CLR_ERROR_PAGEFAULT_SHIFT (6U) +#define DCP_CH2STAT_CLR_ERROR_PAGEFAULT(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_CLR_ERROR_PAGEFAULT_SHIFT)) & DCP_CH2STAT_CLR_ERROR_PAGEFAULT_MASK) +#define DCP_CH2STAT_CLR_ERROR_CODE_MASK (0xFF0000U) +#define DCP_CH2STAT_CLR_ERROR_CODE_SHIFT (16U) +/*! ERROR_CODE + * 0b00000001..Error is signalled because the next pointer is 0x00000000. + * 0b00000010..Error is signalled because the semaphore is of a non-zero value and neither of the chain bits is set. + * 0b00000011..Error is signalled because an error was reported while reading/writing the context buffer. + * 0b00000100..Error is signalled because an error was reported while reading/writing the payload. + * 0b00000101..Error is signalled because the control packet specifies an invalid mode select (for instance, blit + hash). + */ +#define DCP_CH2STAT_CLR_ERROR_CODE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_CLR_ERROR_CODE_SHIFT)) & DCP_CH2STAT_CLR_ERROR_CODE_MASK) +#define DCP_CH2STAT_CLR_TAG_MASK (0xFF000000U) +#define DCP_CH2STAT_CLR_TAG_SHIFT (24U) +#define DCP_CH2STAT_CLR_TAG(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_CLR_TAG_SHIFT)) & DCP_CH2STAT_CLR_TAG_MASK) +/*! @} */ + +/*! @name CH2STAT_TOG - DCP channel 2 status register */ +/*! @{ */ +#define DCP_CH2STAT_TOG_RSVD_COMPLETE_MASK (0x1U) +#define DCP_CH2STAT_TOG_RSVD_COMPLETE_SHIFT (0U) +#define DCP_CH2STAT_TOG_RSVD_COMPLETE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_TOG_RSVD_COMPLETE_SHIFT)) & DCP_CH2STAT_TOG_RSVD_COMPLETE_MASK) +#define DCP_CH2STAT_TOG_HASH_MISMATCH_MASK (0x2U) +#define DCP_CH2STAT_TOG_HASH_MISMATCH_SHIFT (1U) +#define DCP_CH2STAT_TOG_HASH_MISMATCH(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_TOG_HASH_MISMATCH_SHIFT)) & DCP_CH2STAT_TOG_HASH_MISMATCH_MASK) +#define DCP_CH2STAT_TOG_ERROR_SETUP_MASK (0x4U) +#define DCP_CH2STAT_TOG_ERROR_SETUP_SHIFT (2U) +#define DCP_CH2STAT_TOG_ERROR_SETUP(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_TOG_ERROR_SETUP_SHIFT)) & DCP_CH2STAT_TOG_ERROR_SETUP_MASK) +#define DCP_CH2STAT_TOG_ERROR_PACKET_MASK (0x8U) +#define DCP_CH2STAT_TOG_ERROR_PACKET_SHIFT (3U) +#define DCP_CH2STAT_TOG_ERROR_PACKET(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_TOG_ERROR_PACKET_SHIFT)) & DCP_CH2STAT_TOG_ERROR_PACKET_MASK) +#define DCP_CH2STAT_TOG_ERROR_SRC_MASK (0x10U) +#define DCP_CH2STAT_TOG_ERROR_SRC_SHIFT (4U) +#define DCP_CH2STAT_TOG_ERROR_SRC(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_TOG_ERROR_SRC_SHIFT)) & DCP_CH2STAT_TOG_ERROR_SRC_MASK) +#define DCP_CH2STAT_TOG_ERROR_DST_MASK (0x20U) +#define DCP_CH2STAT_TOG_ERROR_DST_SHIFT (5U) +#define DCP_CH2STAT_TOG_ERROR_DST(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_TOG_ERROR_DST_SHIFT)) & DCP_CH2STAT_TOG_ERROR_DST_MASK) +#define DCP_CH2STAT_TOG_ERROR_PAGEFAULT_MASK (0x40U) +#define DCP_CH2STAT_TOG_ERROR_PAGEFAULT_SHIFT (6U) +#define DCP_CH2STAT_TOG_ERROR_PAGEFAULT(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_TOG_ERROR_PAGEFAULT_SHIFT)) & DCP_CH2STAT_TOG_ERROR_PAGEFAULT_MASK) +#define DCP_CH2STAT_TOG_ERROR_CODE_MASK (0xFF0000U) +#define DCP_CH2STAT_TOG_ERROR_CODE_SHIFT (16U) +/*! ERROR_CODE + * 0b00000001..Error is signalled because the next pointer is 0x00000000. + * 0b00000010..Error is signalled because the semaphore is of a non-zero value and neither of the chain bits is set. + * 0b00000011..Error is signalled because an error was reported while reading/writing the context buffer. + * 0b00000100..Error is signalled because an error was reported while reading/writing the payload. + * 0b00000101..Error is signalled because the control packet specifies an invalid mode select (for instance, blit + hash). + */ +#define DCP_CH2STAT_TOG_ERROR_CODE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_TOG_ERROR_CODE_SHIFT)) & DCP_CH2STAT_TOG_ERROR_CODE_MASK) +#define DCP_CH2STAT_TOG_TAG_MASK (0xFF000000U) +#define DCP_CH2STAT_TOG_TAG_SHIFT (24U) +#define DCP_CH2STAT_TOG_TAG(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2STAT_TOG_TAG_SHIFT)) & DCP_CH2STAT_TOG_TAG_MASK) +/*! @} */ + /*! @name CH2OPTS - DCP channel 2 options register */ /*! @{ */ #define DCP_CH2OPTS_RECOVERY_TIMER_MASK (0xFFFFU) @@ -10156,6 +10896,36 @@ typedef struct { #define DCP_CH2OPTS_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2OPTS_RSVD_SHIFT)) & DCP_CH2OPTS_RSVD_MASK) /*! @} */ +/*! @name CH2OPTS_SET - DCP channel 2 options register */ +/*! @{ */ +#define DCP_CH2OPTS_SET_RECOVERY_TIMER_MASK (0xFFFFU) +#define DCP_CH2OPTS_SET_RECOVERY_TIMER_SHIFT (0U) +#define DCP_CH2OPTS_SET_RECOVERY_TIMER(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2OPTS_SET_RECOVERY_TIMER_SHIFT)) & DCP_CH2OPTS_SET_RECOVERY_TIMER_MASK) +#define DCP_CH2OPTS_SET_RSVD_MASK (0xFFFF0000U) +#define DCP_CH2OPTS_SET_RSVD_SHIFT (16U) +#define DCP_CH2OPTS_SET_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2OPTS_SET_RSVD_SHIFT)) & DCP_CH2OPTS_SET_RSVD_MASK) +/*! @} */ + +/*! @name CH2OPTS_CLR - DCP channel 2 options register */ +/*! @{ */ +#define DCP_CH2OPTS_CLR_RECOVERY_TIMER_MASK (0xFFFFU) +#define DCP_CH2OPTS_CLR_RECOVERY_TIMER_SHIFT (0U) +#define DCP_CH2OPTS_CLR_RECOVERY_TIMER(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2OPTS_CLR_RECOVERY_TIMER_SHIFT)) & DCP_CH2OPTS_CLR_RECOVERY_TIMER_MASK) +#define DCP_CH2OPTS_CLR_RSVD_MASK (0xFFFF0000U) +#define DCP_CH2OPTS_CLR_RSVD_SHIFT (16U) +#define DCP_CH2OPTS_CLR_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2OPTS_CLR_RSVD_SHIFT)) & DCP_CH2OPTS_CLR_RSVD_MASK) +/*! @} */ + +/*! @name CH2OPTS_TOG - DCP channel 2 options register */ +/*! @{ */ +#define DCP_CH2OPTS_TOG_RECOVERY_TIMER_MASK (0xFFFFU) +#define DCP_CH2OPTS_TOG_RECOVERY_TIMER_SHIFT (0U) +#define DCP_CH2OPTS_TOG_RECOVERY_TIMER(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2OPTS_TOG_RECOVERY_TIMER_SHIFT)) & DCP_CH2OPTS_TOG_RECOVERY_TIMER_MASK) +#define DCP_CH2OPTS_TOG_RSVD_MASK (0xFFFF0000U) +#define DCP_CH2OPTS_TOG_RSVD_SHIFT (16U) +#define DCP_CH2OPTS_TOG_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH2OPTS_TOG_RSVD_SHIFT)) & DCP_CH2OPTS_TOG_RSVD_MASK) +/*! @} */ + /*! @name CH3CMDPTR - DCP channel 3 command pointer address register */ /*! @{ */ #define DCP_CH3CMDPTR_ADDR_MASK (0xFFFFFFFFU) @@ -10211,6 +10981,120 @@ typedef struct { #define DCP_CH3STAT_TAG(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_TAG_SHIFT)) & DCP_CH3STAT_TAG_MASK) /*! @} */ +/*! @name CH3STAT_SET - DCP channel 3 status register */ +/*! @{ */ +#define DCP_CH3STAT_SET_RSVD_COMPLETE_MASK (0x1U) +#define DCP_CH3STAT_SET_RSVD_COMPLETE_SHIFT (0U) +#define DCP_CH3STAT_SET_RSVD_COMPLETE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_SET_RSVD_COMPLETE_SHIFT)) & DCP_CH3STAT_SET_RSVD_COMPLETE_MASK) +#define DCP_CH3STAT_SET_HASH_MISMATCH_MASK (0x2U) +#define DCP_CH3STAT_SET_HASH_MISMATCH_SHIFT (1U) +#define DCP_CH3STAT_SET_HASH_MISMATCH(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_SET_HASH_MISMATCH_SHIFT)) & DCP_CH3STAT_SET_HASH_MISMATCH_MASK) +#define DCP_CH3STAT_SET_ERROR_SETUP_MASK (0x4U) +#define DCP_CH3STAT_SET_ERROR_SETUP_SHIFT (2U) +#define DCP_CH3STAT_SET_ERROR_SETUP(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_SET_ERROR_SETUP_SHIFT)) & DCP_CH3STAT_SET_ERROR_SETUP_MASK) +#define DCP_CH3STAT_SET_ERROR_PACKET_MASK (0x8U) +#define DCP_CH3STAT_SET_ERROR_PACKET_SHIFT (3U) +#define DCP_CH3STAT_SET_ERROR_PACKET(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_SET_ERROR_PACKET_SHIFT)) & DCP_CH3STAT_SET_ERROR_PACKET_MASK) +#define DCP_CH3STAT_SET_ERROR_SRC_MASK (0x10U) +#define DCP_CH3STAT_SET_ERROR_SRC_SHIFT (4U) +#define DCP_CH3STAT_SET_ERROR_SRC(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_SET_ERROR_SRC_SHIFT)) & DCP_CH3STAT_SET_ERROR_SRC_MASK) +#define DCP_CH3STAT_SET_ERROR_DST_MASK (0x20U) +#define DCP_CH3STAT_SET_ERROR_DST_SHIFT (5U) +#define DCP_CH3STAT_SET_ERROR_DST(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_SET_ERROR_DST_SHIFT)) & DCP_CH3STAT_SET_ERROR_DST_MASK) +#define DCP_CH3STAT_SET_ERROR_PAGEFAULT_MASK (0x40U) +#define DCP_CH3STAT_SET_ERROR_PAGEFAULT_SHIFT (6U) +#define DCP_CH3STAT_SET_ERROR_PAGEFAULT(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_SET_ERROR_PAGEFAULT_SHIFT)) & DCP_CH3STAT_SET_ERROR_PAGEFAULT_MASK) +#define DCP_CH3STAT_SET_ERROR_CODE_MASK (0xFF0000U) +#define DCP_CH3STAT_SET_ERROR_CODE_SHIFT (16U) +/*! ERROR_CODE + * 0b00000001..Error is signalled because the next pointer is 0x00000000. + * 0b00000010..Error is signalled because the semaphore is of a non-zero value and neither of the chain bits is set. + * 0b00000011..Error is signalled because an error was reported while reading/writing the context buffer. + * 0b00000100..Error is signalled because an error was reported while reading/writing the payload. + * 0b00000101..Error is signalled because the control packet specifies an invalid mode select (for example, blit + hash). + */ +#define DCP_CH3STAT_SET_ERROR_CODE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_SET_ERROR_CODE_SHIFT)) & DCP_CH3STAT_SET_ERROR_CODE_MASK) +#define DCP_CH3STAT_SET_TAG_MASK (0xFF000000U) +#define DCP_CH3STAT_SET_TAG_SHIFT (24U) +#define DCP_CH3STAT_SET_TAG(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_SET_TAG_SHIFT)) & DCP_CH3STAT_SET_TAG_MASK) +/*! @} */ + +/*! @name CH3STAT_CLR - DCP channel 3 status register */ +/*! @{ */ +#define DCP_CH3STAT_CLR_RSVD_COMPLETE_MASK (0x1U) +#define DCP_CH3STAT_CLR_RSVD_COMPLETE_SHIFT (0U) +#define DCP_CH3STAT_CLR_RSVD_COMPLETE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_CLR_RSVD_COMPLETE_SHIFT)) & DCP_CH3STAT_CLR_RSVD_COMPLETE_MASK) +#define DCP_CH3STAT_CLR_HASH_MISMATCH_MASK (0x2U) +#define DCP_CH3STAT_CLR_HASH_MISMATCH_SHIFT (1U) +#define DCP_CH3STAT_CLR_HASH_MISMATCH(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_CLR_HASH_MISMATCH_SHIFT)) & DCP_CH3STAT_CLR_HASH_MISMATCH_MASK) +#define DCP_CH3STAT_CLR_ERROR_SETUP_MASK (0x4U) +#define DCP_CH3STAT_CLR_ERROR_SETUP_SHIFT (2U) +#define DCP_CH3STAT_CLR_ERROR_SETUP(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_CLR_ERROR_SETUP_SHIFT)) & DCP_CH3STAT_CLR_ERROR_SETUP_MASK) +#define DCP_CH3STAT_CLR_ERROR_PACKET_MASK (0x8U) +#define DCP_CH3STAT_CLR_ERROR_PACKET_SHIFT (3U) +#define DCP_CH3STAT_CLR_ERROR_PACKET(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_CLR_ERROR_PACKET_SHIFT)) & DCP_CH3STAT_CLR_ERROR_PACKET_MASK) +#define DCP_CH3STAT_CLR_ERROR_SRC_MASK (0x10U) +#define DCP_CH3STAT_CLR_ERROR_SRC_SHIFT (4U) +#define DCP_CH3STAT_CLR_ERROR_SRC(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_CLR_ERROR_SRC_SHIFT)) & DCP_CH3STAT_CLR_ERROR_SRC_MASK) +#define DCP_CH3STAT_CLR_ERROR_DST_MASK (0x20U) +#define DCP_CH3STAT_CLR_ERROR_DST_SHIFT (5U) +#define DCP_CH3STAT_CLR_ERROR_DST(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_CLR_ERROR_DST_SHIFT)) & DCP_CH3STAT_CLR_ERROR_DST_MASK) +#define DCP_CH3STAT_CLR_ERROR_PAGEFAULT_MASK (0x40U) +#define DCP_CH3STAT_CLR_ERROR_PAGEFAULT_SHIFT (6U) +#define DCP_CH3STAT_CLR_ERROR_PAGEFAULT(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_CLR_ERROR_PAGEFAULT_SHIFT)) & DCP_CH3STAT_CLR_ERROR_PAGEFAULT_MASK) +#define DCP_CH3STAT_CLR_ERROR_CODE_MASK (0xFF0000U) +#define DCP_CH3STAT_CLR_ERROR_CODE_SHIFT (16U) +/*! ERROR_CODE + * 0b00000001..Error is signalled because the next pointer is 0x00000000. + * 0b00000010..Error is signalled because the semaphore is of a non-zero value and neither of the chain bits is set. + * 0b00000011..Error is signalled because an error was reported while reading/writing the context buffer. + * 0b00000100..Error is signalled because an error was reported while reading/writing the payload. + * 0b00000101..Error is signalled because the control packet specifies an invalid mode select (for example, blit + hash). + */ +#define DCP_CH3STAT_CLR_ERROR_CODE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_CLR_ERROR_CODE_SHIFT)) & DCP_CH3STAT_CLR_ERROR_CODE_MASK) +#define DCP_CH3STAT_CLR_TAG_MASK (0xFF000000U) +#define DCP_CH3STAT_CLR_TAG_SHIFT (24U) +#define DCP_CH3STAT_CLR_TAG(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_CLR_TAG_SHIFT)) & DCP_CH3STAT_CLR_TAG_MASK) +/*! @} */ + +/*! @name CH3STAT_TOG - DCP channel 3 status register */ +/*! @{ */ +#define DCP_CH3STAT_TOG_RSVD_COMPLETE_MASK (0x1U) +#define DCP_CH3STAT_TOG_RSVD_COMPLETE_SHIFT (0U) +#define DCP_CH3STAT_TOG_RSVD_COMPLETE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_TOG_RSVD_COMPLETE_SHIFT)) & DCP_CH3STAT_TOG_RSVD_COMPLETE_MASK) +#define DCP_CH3STAT_TOG_HASH_MISMATCH_MASK (0x2U) +#define DCP_CH3STAT_TOG_HASH_MISMATCH_SHIFT (1U) +#define DCP_CH3STAT_TOG_HASH_MISMATCH(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_TOG_HASH_MISMATCH_SHIFT)) & DCP_CH3STAT_TOG_HASH_MISMATCH_MASK) +#define DCP_CH3STAT_TOG_ERROR_SETUP_MASK (0x4U) +#define DCP_CH3STAT_TOG_ERROR_SETUP_SHIFT (2U) +#define DCP_CH3STAT_TOG_ERROR_SETUP(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_TOG_ERROR_SETUP_SHIFT)) & DCP_CH3STAT_TOG_ERROR_SETUP_MASK) +#define DCP_CH3STAT_TOG_ERROR_PACKET_MASK (0x8U) +#define DCP_CH3STAT_TOG_ERROR_PACKET_SHIFT (3U) +#define DCP_CH3STAT_TOG_ERROR_PACKET(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_TOG_ERROR_PACKET_SHIFT)) & DCP_CH3STAT_TOG_ERROR_PACKET_MASK) +#define DCP_CH3STAT_TOG_ERROR_SRC_MASK (0x10U) +#define DCP_CH3STAT_TOG_ERROR_SRC_SHIFT (4U) +#define DCP_CH3STAT_TOG_ERROR_SRC(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_TOG_ERROR_SRC_SHIFT)) & DCP_CH3STAT_TOG_ERROR_SRC_MASK) +#define DCP_CH3STAT_TOG_ERROR_DST_MASK (0x20U) +#define DCP_CH3STAT_TOG_ERROR_DST_SHIFT (5U) +#define DCP_CH3STAT_TOG_ERROR_DST(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_TOG_ERROR_DST_SHIFT)) & DCP_CH3STAT_TOG_ERROR_DST_MASK) +#define DCP_CH3STAT_TOG_ERROR_PAGEFAULT_MASK (0x40U) +#define DCP_CH3STAT_TOG_ERROR_PAGEFAULT_SHIFT (6U) +#define DCP_CH3STAT_TOG_ERROR_PAGEFAULT(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_TOG_ERROR_PAGEFAULT_SHIFT)) & DCP_CH3STAT_TOG_ERROR_PAGEFAULT_MASK) +#define DCP_CH3STAT_TOG_ERROR_CODE_MASK (0xFF0000U) +#define DCP_CH3STAT_TOG_ERROR_CODE_SHIFT (16U) +/*! ERROR_CODE + * 0b00000001..Error is signalled because the next pointer is 0x00000000. + * 0b00000010..Error is signalled because the semaphore is of a non-zero value and neither of the chain bits is set. + * 0b00000011..Error is signalled because an error was reported while reading/writing the context buffer. + * 0b00000100..Error is signalled because an error was reported while reading/writing the payload. + * 0b00000101..Error is signalled because the control packet specifies an invalid mode select (for example, blit + hash). + */ +#define DCP_CH3STAT_TOG_ERROR_CODE(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_TOG_ERROR_CODE_SHIFT)) & DCP_CH3STAT_TOG_ERROR_CODE_MASK) +#define DCP_CH3STAT_TOG_TAG_MASK (0xFF000000U) +#define DCP_CH3STAT_TOG_TAG_SHIFT (24U) +#define DCP_CH3STAT_TOG_TAG(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3STAT_TOG_TAG_SHIFT)) & DCP_CH3STAT_TOG_TAG_MASK) +/*! @} */ + /*! @name CH3OPTS - DCP channel 3 options register */ /*! @{ */ #define DCP_CH3OPTS_RECOVERY_TIMER_MASK (0xFFFFU) @@ -10221,6 +11105,36 @@ typedef struct { #define DCP_CH3OPTS_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3OPTS_RSVD_SHIFT)) & DCP_CH3OPTS_RSVD_MASK) /*! @} */ +/*! @name CH3OPTS_SET - DCP channel 3 options register */ +/*! @{ */ +#define DCP_CH3OPTS_SET_RECOVERY_TIMER_MASK (0xFFFFU) +#define DCP_CH3OPTS_SET_RECOVERY_TIMER_SHIFT (0U) +#define DCP_CH3OPTS_SET_RECOVERY_TIMER(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3OPTS_SET_RECOVERY_TIMER_SHIFT)) & DCP_CH3OPTS_SET_RECOVERY_TIMER_MASK) +#define DCP_CH3OPTS_SET_RSVD_MASK (0xFFFF0000U) +#define DCP_CH3OPTS_SET_RSVD_SHIFT (16U) +#define DCP_CH3OPTS_SET_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3OPTS_SET_RSVD_SHIFT)) & DCP_CH3OPTS_SET_RSVD_MASK) +/*! @} */ + +/*! @name CH3OPTS_CLR - DCP channel 3 options register */ +/*! @{ */ +#define DCP_CH3OPTS_CLR_RECOVERY_TIMER_MASK (0xFFFFU) +#define DCP_CH3OPTS_CLR_RECOVERY_TIMER_SHIFT (0U) +#define DCP_CH3OPTS_CLR_RECOVERY_TIMER(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3OPTS_CLR_RECOVERY_TIMER_SHIFT)) & DCP_CH3OPTS_CLR_RECOVERY_TIMER_MASK) +#define DCP_CH3OPTS_CLR_RSVD_MASK (0xFFFF0000U) +#define DCP_CH3OPTS_CLR_RSVD_SHIFT (16U) +#define DCP_CH3OPTS_CLR_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3OPTS_CLR_RSVD_SHIFT)) & DCP_CH3OPTS_CLR_RSVD_MASK) +/*! @} */ + +/*! @name CH3OPTS_TOG - DCP channel 3 options register */ +/*! @{ */ +#define DCP_CH3OPTS_TOG_RECOVERY_TIMER_MASK (0xFFFFU) +#define DCP_CH3OPTS_TOG_RECOVERY_TIMER_SHIFT (0U) +#define DCP_CH3OPTS_TOG_RECOVERY_TIMER(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3OPTS_TOG_RECOVERY_TIMER_SHIFT)) & DCP_CH3OPTS_TOG_RECOVERY_TIMER_MASK) +#define DCP_CH3OPTS_TOG_RSVD_MASK (0xFFFF0000U) +#define DCP_CH3OPTS_TOG_RSVD_SHIFT (16U) +#define DCP_CH3OPTS_TOG_RSVD(x) (((uint32_t)(((uint32_t)(x)) << DCP_CH3OPTS_TOG_RSVD_SHIFT)) & DCP_CH3OPTS_TOG_RSVD_MASK) +/*! @} */ + /*! @name DBGSELECT - DCP debug select register */ /*! @{ */ #define DCP_DBGSELECT_INDEX_MASK (0xFFU) diff --git a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/MIMXRT1052_features.h b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/MIMXRT1052_features.h index f78522df6..8d785dd81 100755 --- a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/MIMXRT1052_features.h +++ b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/MIMXRT1052_features.h @@ -223,6 +223,12 @@ #define FSL_FEATURE_EDMA_HAS_ERROR_IRQ (1) /* @brief Number of DMA channels with asynchronous request capability (register EARS). (Valid only for eDMA modules.) */ #define FSL_FEATURE_EDMA_ASYNCHRO_REQUEST_CHANNEL_COUNT (32) +/* @brief Channel IRQ entry shared offset. */ +#define FSL_FEATURE_EDMA_MODULE_CHANNEL_IRQ_ENTRY_SHARED_OFFSET (16) +/* @brief If 8 bytes transfer supported. */ +#define FSL_FEATURE_EDMA_SUPPORT_8_BYTES_TRANSFER (1) +/* @brief If 16 bytes transfer supported. */ +#define FSL_FEATURE_EDMA_SUPPORT_16_BYTES_TRANSFER (0) /* DMAMUX module features */ @@ -279,6 +285,8 @@ #define FSL_FEATURE_FLEXIO_VERID_RESET_VALUE (0x1010001) /* @brief Reset value of the FLEXIO_PARAM register */ #define FSL_FEATURE_FLEXIO_PARAM_RESET_VALUE (0x2200404) +/* @brief Flexio DMA request base channel */ +#define FSL_FEATURE_FLEXIO_DMA_REQUEST_BASE_CHANNEL (0) /* FLEXRAM module features */ @@ -489,7 +497,10 @@ /* @brief Receive/transmit FIFO size in item count (register bit fields TCSR[FRDE], TCSR[FRIE], TCSR[FRF], TCR1[TFW], RCSR[FRDE], RCSR[FRIE], RCSR[FRF], RCR1[RFW], registers TFRn, RFRn). */ #define FSL_FEATURE_SAI_FIFO_COUNT (32) /* @brief Receive/transmit channel number (register bit fields TCR3[TCE], RCR3[RCE], registers TDRn and RDRn). */ -#define FSL_FEATURE_SAI_CHANNEL_COUNT (4) +#define FSL_FEATURE_SAI_CHANNEL_COUNTn(x) \ + (((x) == SAI1) ? (4) : \ + (((x) == SAI2) ? (1) : \ + (((x) == SAI3) ? (1) : (-1)))) /* @brief Maximum words per frame (register bit fields TCR3[WDFL], TCR4[FRSZ], TMR[TWM], RCR3[WDFL], RCR4[FRSZ], RMR[RWM]). */ #define FSL_FEATURE_SAI_MAX_WORDS_PER_FRAME (32) /* @brief Has support of combining multiple data channel FIFOs into single channel FIFO (register bit fields TCR3[CFR], TCR4[FCOMB], TFR0[WCP], TFR1[WCP], RCR3[CFR], RCR4[FCOMB], RFR0[RCP], RFR1[RCP]). */ @@ -514,6 +525,10 @@ #define FSL_FEATURE_SAI_HAS_MDR (0) /* @brief Has support the BCLK bypass mode when BCLK = MCLK. */ #define FSL_FEATURE_SAI_HAS_BCLK_BYPASS (0) +/* @brief Has DIV bit fields of MCR register (register bit fields MCR[DIV]. */ +#define FSL_FEATURE_SAI_HAS_MCR_MCLK_POST_DIV (0) +/* @brief Support Channel Mode (register bit fields TCR4[CHMOD]). */ +#define FSL_FEATURE_SAI_HAS_CHANNEL_MODE (1) /* SEMC module features */ @@ -623,5 +638,7 @@ /* @brief DMA_CH_MUX_REQ_95. */ #define FSL_FEATURE_XBARA_OUTPUT_DMA_CH_MUX_REQ_95 (1) +#define FSL_FEATURE_XBARA_INTERRUPT_COUNT (4) + #endif /* _MIMXRT1052_FEATURES_H_ */ diff --git a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/common.h b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/common.h new file mode 100644 index 000000000..af4e476a0 --- /dev/null +++ b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/common.h @@ -0,0 +1,48 @@ +/* +* Copyright (c) 2020 AIIT XUOS Lab +* XiUOS is licensed under Mulan PSL v2. +* You can use this software according to the terms and conditions of the Mulan PSL v2. +* You may obtain a copy of Mulan PSL v2 at: +* http://license.coscl.org.cn/MulanPSL2 +* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, +* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, +* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. +* See the Mulan PSL v2 for more details. +*/ + +/** +* @file: common.h +* @brief: file common.h +* @version: 1.0 +* @author: AIIT XUOS Lab +* @date: 2023/3/24 +*/ + +#ifndef _COMMON_H +#define _COMMON_H + +#include "fsl_common.h" +#include "fsl_lpuart.h" + +#define CMD_STRING_SIZE 128 +#define IS_AF(c) ((c >= 'A') && (c <= 'F')) +#define IS_af(c) ((c >= 'a') && (c <= 'f')) +#define IS_09(c) ((c >= '0') && (c <= '9')) +#define ISVALIDHEX(c) IS_AF(c) || IS_af(c) || IS_09(c) +#define ISVALIDDEC(c) IS_09(c) +#define CONVERTDEC(c) (c - '0') + +#define CONVERTHEX_alpha(c) (IS_AF(c) ? (c - 'A'+10) : (c - 'a'+10)) +#define CONVERTHEX(c) (IS_09(c) ? (c - '0') : CONVERTHEX_alpha(c)) + +void UartConfig(void); +void Int2Str(uint8_t* str,int32_t intnum); +uint32_t Str2Int(uint8_t *inputstr,int32_t *intnum); +uint32_t GetIntegerInput(int32_t * num); +uint32_t SerialKeyPressed(uint8_t *key); +uint8_t GetKey(void); +void SerialPutChar(uint8_t c); +void Serial_PutString(uint8_t *s); +void GetInputString(uint8_t * buffP); + +#endif diff --git a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/flash.h b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/flash.h new file mode 100644 index 000000000..fd59738cb --- /dev/null +++ b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/flash.h @@ -0,0 +1,84 @@ +/* + * Copyright 2018-2020 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/** +* @file flash.h +* @brief support flexspi norflash function +* @version 2.0 +* @author AIIT XUOS Lab +* @date 2023-04-03 +*/ + +#ifndef __FLASH_H__ +#define __FLASH_H__ + +#include +#include +#include "fsl_romapi.h" + +#define USE_HIGHT_SPEED_TRANS 1 +#define SECTOR_SIZE 0x1000 +#define FLASH_PAGE_SIZE 256 + +#define FLEXSPI_WAIT_TIMEOUT_NS (500000000UL) //FlexSPI timeout value, 500ms +#define FLEXSPI_FREQ_1GHz (1000000000UL) +#define FREQ_1MHz (1000000UL) +#define FLEXSPI_DLLCR_DEFAULT (0x100UL) + +enum +{ + kFlexSpiDelayCellUnit_Min = 75, // 75ps + kFlexSpiDelayCellUnit_Max = 225, // 225ps +}; + +typedef enum +{ + kFlexSpiClock_CoreClock, //ARM Core Clock + kFlexSpiClock_AhbClock, //AHB clock + kFlexSpiClock_SerialRootClock, //Serial Root Clock + kFlexSpiClock_IpgClock, //IPG clock +} flexspi_clock_type_t; + +typedef struct LookUpTable +{ + uint32_t Read_Seq[4]; + uint32_t ReadStatus_Seq[8]; + uint32_t WriteEnable_Seq[8]; + uint32_t EraseSector_Seq[16]; + uint32_t PageProgram_Seq[8]; + uint32_t ChipErase_Seq[8]; + uint32_t ReadSfdp_Seq[4]; + uint32_t Restore_NoCmd_Seq[4]; + uint32_t Exit_NoCmd_Seq[4]; +}lookuptable_t; + + +uint32_t FLASH_GetSectorSize(void); +uint32_t FLASH_GetProgramCmd(void); +void FLASH_Init(void); +void FLASH_DeInit(void); +uint8_t FLASH_EraseSector(uint32_t addr); +uint8_t FLASH_WritePage(uint32_t addr, const uint32_t *buf, uint32_t len); +status_t FLASH_Read(uint32_t addr, uint32_t *buf, uint32_t len); +status_t flash_erase(uint32_t start_addr, uint32_t byte_cnt); +status_t flash_write(uint32_t start_addr, uint8_t *buf, uint32_t byte_cnt); +status_t flash_read(uint32_t addr, uint8_t *buf, uint32_t len); +status_t flash_copy(uint32_t srcAddr,uint32_t dstAddr, uint32_t imageSize); + +status_t NOR_FLASH_Erase(uint32_t app_base_addr,uint32_t imageSize); +void NorFlash_Write_PageProgram(uint8_t* pBuffer,uint32_t WriteAddr,uint16_t NumByteToWrite); +void NorFlash_Write_NoCheck(uint8_t* pBuffer,uint32_t WriteAddr,uint16_t NumByteToWrite); +void NorFlash_Write(uint8_t* pBuffer,uint32_t WriteAddr,uint16_t NumByteToWrite); + +#ifndef USE_HIGHT_SPEED_TRANS +uint32_t NOR_FLASH_Write(uint32_t* FlashAddress, uint8_t* Data ,uint16_t DataLength); +#else +uint32_t NOR_FLASH_Write(uint32_t* FlashAddress, uint8_t* Data ,uint16_t DataLength,uint8_t doneFlag); +#endif + +#endif + diff --git a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/fsl_clock.h b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/fsl_clock.h index 3dfefede9..33962234d 100755 --- a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/fsl_clock.h +++ b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/fsl_clock.h @@ -1,5 +1,5 @@ /* - * Copyright 2017 - 2019 NXP + * Copyright 2017 - 2020, NXP * All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause @@ -47,8 +47,8 @@ /*! @name Driver version */ /*@{*/ -/*! @brief CLOCK driver version 2.2.0. */ -#define FSL_CLOCK_DRIVER_VERSION (MAKE_VERSION(2, 2, 0)) +/*! @brief CLOCK driver version 2.4.0. */ +#define FSL_CLOCK_DRIVER_VERSION (MAKE_VERSION(2, 4, 0)) /* Definition for delay API in clock driver, users can redefine it to the real application. */ #ifndef SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY @@ -56,8 +56,8 @@ #endif /* analog pll definition */ -#define CCM_ANALOG_PLL_BYPASS_SHIFT (16U) -#define CCM_ANALOG_PLL_BYPASS_CLK_SRC_MASK (0xC000U) +#define CCM_ANALOG_PLL_BYPASS_SHIFT (16U) +#define CCM_ANALOG_PLL_BYPASS_CLK_SRC_MASK (0xC000U) #define CCM_ANALOG_PLL_BYPASS_CLK_SRC_SHIFT (14U) /*@}*/ @@ -65,48 +65,56 @@ /*! * @brief CCM registers offset. */ -#define CCSR_OFFSET 0x0C -#define CBCDR_OFFSET 0x14 -#define CBCMR_OFFSET 0x18 +#define CCSR_OFFSET 0x0C +#define CBCDR_OFFSET 0x14 +#define CBCMR_OFFSET 0x18 #define CSCMR1_OFFSET 0x1C #define CSCMR2_OFFSET 0x20 #define CSCDR1_OFFSET 0x24 -#define CDCDR_OFFSET 0x30 +#define CDCDR_OFFSET 0x30 #define CSCDR2_OFFSET 0x38 #define CSCDR3_OFFSET 0x3C -#define CACRR_OFFSET 0x10 +#define CACRR_OFFSET 0x10 #define CS1CDR_OFFSET 0x28 #define CS2CDR_OFFSET 0x2C /*! * @brief CCM Analog registers offset. */ -#define PLL_ARM_OFFSET 0x00 -#define PLL_SYS_OFFSET 0x30 -#define PLL_USB1_OFFSET 0x10 +#define PLL_ARM_OFFSET 0x00 +#define PLL_SYS_OFFSET 0x30 +#define PLL_USB1_OFFSET 0x10 #define PLL_AUDIO_OFFSET 0x70 #define PLL_VIDEO_OFFSET 0xA0 -#define PLL_ENET_OFFSET 0xE0 -#define PLL_USB2_OFFSET 0x20 +#define PLL_ENET_OFFSET 0xE0 +#define PLL_USB2_OFFSET 0x20 #define CCM_TUPLE(reg, shift, mask, busyShift) \ - (int)((reg & 0xFFU) | ((shift) << 8U) | ((((mask) >> (shift)) & 0x1FFFU) << 13U) | ((busyShift) << 26U)) -#define CCM_TUPLE_REG(base, tuple) (*((volatile uint32_t *)(((uint32_t)(base)) + ((tuple)&0xFFU)))) -#define CCM_TUPLE_SHIFT(tuple) (((tuple) >> 8U) & 0x1FU) -#define CCM_TUPLE_MASK(tuple) ((uint32_t)((((tuple) >> 13U) & 0x1FFFU) << ((((tuple) >> 8U) & 0x1FU)))) -#define CCM_TUPLE_BUSY_SHIFT(tuple) (((tuple) >> 26U) & 0x3FU) + (int)(((reg)&0xFFU) | ((shift) << 8U) | ((((mask) >> (shift)) & 0x1FFFU) << 13U) | ((busyShift) << 26U)) +#define CCM_TUPLE_REG(base, tuple) (*((volatile uint32_t *)(((uint32_t)(base)) + ((uint32_t)(tuple)&0xFFU)))) +#define CCM_TUPLE_SHIFT(tuple) ((((uint32_t)tuple) >> 8U) & 0x1FU) +#define CCM_TUPLE_MASK(tuple) \ + ((uint32_t)((((uint32_t)(tuple) >> 13U) & 0x1FFFU) << (((((uint32_t)tuple) >> 8U) & 0x1FU)))) +#define CCM_TUPLE_BUSY_SHIFT(tuple) ((((uint32_t)tuple) >> 26U) & 0x3FU) #define CCM_NO_BUSY_WAIT (0x20U) /*! * @brief CCM ANALOG tuple macros to map corresponding registers and bit fields. */ -#define CCM_ANALOG_TUPLE(reg, shift) (((reg & 0xFFFU) << 16U) | (shift)) +#define CCM_ANALOG_TUPLE(reg, shift) ((((reg)&0xFFFU) << 16U) | (shift)) #define CCM_ANALOG_TUPLE_SHIFT(tuple) (((uint32_t)tuple) & 0x1FU) #define CCM_ANALOG_TUPLE_REG_OFF(base, tuple, off) \ - (*((volatile uint32_t *)((uint32_t)base + (((uint32_t)tuple >> 16U) & 0xFFFU) + off))) + (*((volatile uint32_t *)((uint32_t)(base) + (((uint32_t)(tuple) >> 16U) & 0xFFFU) + (off)))) #define CCM_ANALOG_TUPLE_REG(base, tuple) CCM_ANALOG_TUPLE_REG_OFF(base, tuple, 0U) +/* Definition for ERRATA 50235 check */ +#if (defined(FSL_FEATURE_CCM_HAS_ERRATA_50235) && FSL_FEATURE_CCM_HAS_ERRATA_50235) +#define CAN_CLOCK_CHECK_NO_AFFECTS \ + ((CCM_CSCMR2_CAN_CLK_SEL(2U) != (CCM->CSCMR2 & CCM_CSCMR2_CAN_CLK_SEL_MASK)) || \ + (CCM_CCGR5_CG12(0) != (CCM->CCGR5 & CCM_CCGR5_CG12_MASK))) +#endif /* FSL_FEATURE_CCM_HAS_ERRATA_50235 */ + /*! * @brief clock1PN frequency. */ @@ -118,8 +126,8 @@ * function CLOCK_SetXtalFreq to set the value in to clock driver. For example, * if XTAL is 24MHz, * @code - * CLOCK_InitExternalClk(false); // Setup the 24M OSC/SYSOSC - * CLOCK_SetXtalFreq(240000000); // Set the XTAL value to clock driver. + * CLOCK_InitExternalClk(false); + * CLOCK_SetXtalFreq(240000000); * @endcode */ extern volatile uint32_t g_xtalFreq; @@ -132,7 +140,7 @@ extern volatile uint32_t g_xtalFreq; extern volatile uint32_t g_rtcXtalFreq; /* For compatible with other platforms */ -#define CLOCK_SetXtal0Freq CLOCK_SetXtalFreq +#define CLOCK_SetXtal0Freq CLOCK_SetXtalFreq #define CLOCK_SetXtal32Freq CLOCK_SetRtcXtalFreq /*! @brief Clock ip name array for ADC. */ @@ -400,6 +408,65 @@ extern volatile uint32_t g_rtcXtalFreq; kCLOCK_IpInvalid, kCLOCK_IpInvalid, kCLOCK_Xbar2, kCLOCK_Xbar3 \ } +#define CLOCK_SOURCE_NONE (0xFFU) + +#define CLOCK_ROOT_SOUCE \ + { \ + {kCLOCK_SysPllPfd2Clk, kCLOCK_SysPllPfd0Clk, kCLOCK_NoneName, \ + kCLOCK_NoneName, kCLOCK_NoneName, kCLOCK_NoneName}, /* USDHC1 Clock Root. */ \ + {kCLOCK_SysPllPfd2Clk, kCLOCK_SysPllPfd0Clk, kCLOCK_NoneName, \ + kCLOCK_NoneName, kCLOCK_NoneName, kCLOCK_NoneName}, /* USDHC2 Clock Root. */ \ + {kCLOCK_SemcClk, kCLOCK_Usb1SwClk, kCLOCK_SysPllPfd2Clk, \ + kCLOCK_Usb1PllPfd0Clk, kCLOCK_NoneName, kCLOCK_NoneName}, /* FLEXSPI Clock Root. */ \ + {kCLOCK_OscClk, kCLOCK_SysPllPfd2Clk, kCLOCK_Usb1Sw120MClk, \ + kCLOCK_Usb1PllPfd1Clk, kCLOCK_NoneName, kCLOCK_NoneName}, /* CSI Clock Root. */ \ + {kCLOCK_Usb1PllPfd1Clk, kCLOCK_Usb1PllPfd0Clk, kCLOCK_SysPllClk, \ + kCLOCK_SysPllPfd2Clk, kCLOCK_NoneName, kCLOCK_NoneName}, /* LPSPI Clock Root. */ \ + {kCLOCK_SysPllClk, kCLOCK_SysPllPfd2Clk, kCLOCK_SysPllPfd0Clk, \ + kCLOCK_SysPllPfd1Clk, kCLOCK_NoneName, kCLOCK_NoneName}, /* TRACE Clock Root */ \ + {kCLOCK_Usb1PllPfd2Clk, kCLOCK_VideoPllClk, kCLOCK_AudioPllClk, \ + kCLOCK_NoneName, kCLOCK_NoneName, kCLOCK_NoneName}, /* SAI1 Clock Root */ \ + {kCLOCK_Usb1PllPfd2Clk, kCLOCK_VideoPllClk, kCLOCK_AudioPllClk, \ + kCLOCK_NoneName, kCLOCK_NoneName, kCLOCK_NoneName}, /* SAI2 Clock Root */ \ + {kCLOCK_Usb1PllPfd2Clk, kCLOCK_VideoPllClk, kCLOCK_AudioPllClk, \ + kCLOCK_NoneName, kCLOCK_NoneName, kCLOCK_NoneName}, /* SAI3 Clock Root */ \ + {kCLOCK_Usb1Sw60MClk, kCLOCK_OscClk, kCLOCK_NoneName, \ + kCLOCK_NoneName, kCLOCK_NoneName, kCLOCK_NoneName}, /* LPI2C Clock Root */ \ + {kCLOCK_Usb1Sw60MClk, kCLOCK_OscClk, kCLOCK_Usb1Sw80MClk, \ + kCLOCK_NoneName, kCLOCK_NoneName, kCLOCK_NoneName}, /* CAN Clock Root. */ \ + {kCLOCK_Usb1Sw80MClk, kCLOCK_OscClk, kCLOCK_NoneName, \ + kCLOCK_NoneName, kCLOCK_NoneName, kCLOCK_NoneName}, /* UART Clock Root */ \ + {kCLOCK_SysPllClk, kCLOCK_Usb1PllPfd3Clk, kCLOCK_VideoPllClk, \ + kCLOCK_SysPllPfd0Clk, kCLOCK_SysPllPfd1Clk, kCLOCK_Usb1PllPfd1Clk}, /* LCDIF Clock Root */ \ + {kCLOCK_AudioPllClk, kCLOCK_Usb1PllPfd2Clk, kCLOCK_VideoPllClk, \ + kCLOCK_Usb1SwClk, kCLOCK_NoneName, kCLOCK_NoneName}, /* SPDIF0 Clock Root */ \ + {kCLOCK_AudioPllClk, kCLOCK_Usb1PllPfd2Clk, kCLOCK_VideoPllClk, \ + kCLOCK_Usb1SwClk, kCLOCK_NoneName, kCLOCK_NoneName}, /* FLEXIO1 Clock Root */ \ + {kCLOCK_AudioPllClk, kCLOCK_Usb1PllPfd2Clk, kCLOCK_VideoPllClk, \ + kCLOCK_Usb1PllClk, kCLOCK_NoneName, kCLOCK_NoneName}, /* FLEXIO2 Clock ROOT */ \ + } + +#define CLOCK_ROOT_MUX_TUPLE \ + { \ + kCLOCK_Usdhc1Mux, kCLOCK_Usdhc2Mux, kCLOCK_FlexspiMux, kCLOCK_CsiMux, kCLOCK_LpspiMux, kCLOCK_TraceMux, \ + kCLOCK_Sai1Mux, kCLOCK_Sai2Mux, kCLOCK_Sai3Mux, kCLOCK_Lpi2cMux, kCLOCK_CanMux, kCLOCK_UartMux, \ + kCLOCK_LcdifPreMux, kCLOCK_SpdifMux, kCLOCK_Flexio1Mux, kCLOCK_Flexio2Mux, \ + } + +#define CLOCK_ROOT_NONE_PRE_DIV 0UL + +#define CLOCK_ROOT_DIV_TUPLE \ + { \ + {kCLOCK_NonePreDiv, kCLOCK_Usdhc1Div}, {kCLOCK_NonePreDiv, kCLOCK_Usdhc2Div}, \ + {kCLOCK_NonePreDiv, kCLOCK_FlexspiDiv}, {kCLOCK_NonePreDiv, kCLOCK_CsiDiv}, \ + {kCLOCK_NonePreDiv, kCLOCK_LpspiDiv}, {kCLOCK_NonePreDiv, kCLOCK_TraceDiv}, \ + {kCLOCK_Sai1PreDiv, kCLOCK_Sai1Div}, {kCLOCK_Sai2PreDiv, kCLOCK_Sai2Div}, \ + {kCLOCK_Sai3PreDiv, kCLOCK_Sai3Div}, {kCLOCK_NonePreDiv, kCLOCK_Lpi2cDiv}, \ + {kCLOCK_NonePreDiv, kCLOCK_CanDiv}, {kCLOCK_NonePreDiv, kCLOCK_UartDiv}, \ + {kCLOCK_LcdifPreDiv, kCLOCK_LcdifDiv}, {kCLOCK_Spdif0PreDiv, kCLOCK_Spdif0Div}, \ + {kCLOCK_Flexio1PreDiv, kCLOCK_Flexio1Div}, {kCLOCK_Flexio2PreDiv, kCLOCK_Flexio2Div}, \ + } + /*! @brief Clock name used to get clock frequency. */ typedef enum _clock_name { @@ -414,11 +481,15 @@ typedef enum _clock_name kCLOCK_ArmPllClk = 0x7U, /*!< ARMPLLCLK. */ - kCLOCK_Usb1PllClk = 0x8U, /*!< USB1PLLCLK. */ - kCLOCK_Usb1PllPfd0Clk = 0x9U, /*!< USB1PLLPDF0CLK. */ - kCLOCK_Usb1PllPfd1Clk = 0xAU, /*!< USB1PLLPFD1CLK. */ - kCLOCK_Usb1PllPfd2Clk = 0xBU, /*!< USB1PLLPFD2CLK. */ - kCLOCK_Usb1PllPfd3Clk = 0xCU, /*!< USB1PLLPFD3CLK. */ + kCLOCK_Usb1PllClk = 0x8U, /*!< USB1PLLCLK. */ + kCLOCK_Usb1PllPfd0Clk = 0x9U, /*!< USB1PLLPDF0CLK. */ + kCLOCK_Usb1PllPfd1Clk = 0xAU, /*!< USB1PLLPFD1CLK. */ + kCLOCK_Usb1PllPfd2Clk = 0xBU, /*!< USB1PLLPFD2CLK. */ + kCLOCK_Usb1PllPfd3Clk = 0xCU, /*!< USB1PLLPFD3CLK. */ + kCLOCK_Usb1SwClk = 0x17U, /*!< USB1PLLSWCLK */ + kCLOCK_Usb1Sw120MClk = 0x18U, /*!< USB1PLLSw120MCLK */ + kCLOCK_Usb1Sw60MClk = 0x19U, /*!< USB1PLLSw60MCLK */ + kCLOCK_Usb1Sw80MClk = 0x1AU, /*!< USB1PLLSw80MCLK */ kCLOCK_Usb2PllClk = 0xDU, /*!< USB2PLLCLK. */ @@ -431,11 +502,12 @@ typedef enum _clock_name kCLOCK_EnetPll0Clk = 0x13U, /*!< Enet PLLCLK ref_enetpll0. */ kCLOCK_EnetPll1Clk = 0x14U, /*!< Enet PLLCLK ref_enetpll1. */ - kCLOCK_AudioPllClk = 0x15U, /*!< Audio PLLCLK. */ - kCLOCK_VideoPllClk = 0x16U, /*!< Video PLLCLK. */ + kCLOCK_AudioPllClk = 0x15U, /*!< Audio PLLCLK. */ + kCLOCK_VideoPllClk = 0x16U, /*!< Video PLLCLK. */ + kCLOCK_NoneName = CLOCK_SOURCE_NONE, /*!< None Clock Name. */ } clock_name_t; -#define kCLOCK_CoreSysClk kCLOCK_CpuClk /*!< For compatible with other platforms without CCM. */ +#define kCLOCK_CoreSysClk kCLOCK_CpuClk /*!< For compatible with other platforms without CCM. */ #define CLOCK_GetCoreSysClkFreq CLOCK_GetCpuClkFreq /*!< For compatible with other platforms without CCM. */ /*! @@ -835,6 +907,8 @@ typedef enum _clock_div kCLOCK_CsiDiv = CCM_TUPLE( CSCDR3_OFFSET, CCM_CSCDR3_CSI_PODF_SHIFT, CCM_CSCDR3_CSI_PODF_MASK, CCM_NO_BUSY_WAIT), /*!< csi div name */ + + kCLOCK_NonePreDiv = CLOCK_ROOT_NONE_PRE_DIV, /*!< None Pre div. */ } clock_div_t; /*! @brief USB clock source definition. */ @@ -952,6 +1026,83 @@ typedef enum _clock_pfd kCLOCK_Pfd3 = 3U, /*!< PLL PFD3 */ } clock_pfd_t; +/*! + * @brief The enumerater of clock output1's clock source, such as USB1 PLL, SYS PLL and so on. + */ +typedef enum _clock_output1_selection +{ + kCLOCK_OutputPllUsb1 = 0U, /*!< Selects USB1 PLL clock(Divided by 2) output. */ + kCLOCK_OutputPllSys = 1U, /*!< Selects SYS PLL clock(Divided by 2) output. */ + kCLOCK_OutputPllVideo = 3U, /*!< Selects Video PLL clock(Divided by 2) output. */ + kCLOCK_OutputSemcClk = 5U, /*!< Selects semc clock root output. */ + kCLOCK_OutputLcdifPixClk = 0xAU, /*!< Selects Lcdif pix clock root output. */ + kCLOCK_OutputAhbClk = 0xBU, /*!< Selects AHB clock root output. */ + kCLOCK_OutputIpgClk = 0xCU, /*!< Selects IPG clock root output. */ + kCLOCK_OutputPerClk = 0xDU, /*!< Selects PERCLK clock root output. */ + kCLOCK_OutputCkilSyncClk = 0xEU, /*!< Selects Ckil clock root output. */ + kCLOCK_OutputPll4MainClk = 0xFU, /*!< Selects PLL4 main clock output. */ + kCLOCK_DisableClockOutput1 = 0x10U, /*!< Disables CLKO1. */ +} clock_output1_selection_t; + +/*! + * @brief The enumerater of clock output2's clock source, such as USDHC1 clock root, LPI2C clock root and so on. + * + */ +typedef enum _clock_output2_selection +{ + kCLOCK_OutputUsdhc1Clk = 3U, /*!< Selects USDHC1 clock root output. */ + kCLOCK_OutputLpi2cClk = 6U, /*!< Selects LPI2C clock root output. */ + kCLOCK_OutputCsiClk = 0xBU, /*!< Selects CSI clock root output. */ + kCLOCK_OutputOscClk = 0xEU, /*!< Selects OSC output. */ + kCLOCK_OutputUsdhc2Clk = 0x11U, /*!< Selects USDHC2 clock root output. */ + kCLOCK_OutputSai1Clk = 0x12U, /*!< Selects SAI1 clock root output. */ + kCLOCK_OutputSai2Clk = 0x13U, /*!< Selects SAI2 clock root output. */ + kCLOCK_OutputSai3Clk = 0x14U, /*!< Selects SAI3 clock root output. */ + kCLOCK_OutputCanClk = 0x17U, /*!< Selects CAN clock root output. */ + kCLOCK_OutputFlexspiClk = 0x1BU, /*!< Selects FLEXSPI clock root output. */ + kCLOCK_OutputUartClk = 0x1CU, /*!< Selects UART clock root output. */ + kCLOCK_OutputSpdif0Clk = 0x1DU, /*!< Selects SPDIF0 clock root output. */ + kCLOCK_DisableClockOutput2 = 0x1FU, /*!< Disables CLKO2. */ +} clock_output2_selection_t; + +/*! + * @brief The enumerator of clock output's divider. + */ +typedef enum _clock_output_divider +{ + kCLOCK_DivideBy1 = 0U, /*!< Output clock divided by 1. */ + kCLOCK_DivideBy2, /*!< Output clock divided by 2. */ + kCLOCK_DivideBy3, /*!< Output clock divided by 3. */ + kCLOCK_DivideBy4, /*!< Output clock divided by 4. */ + kCLOCK_DivideBy5, /*!< Output clock divided by 5. */ + kCLOCK_DivideBy6, /*!< Output clock divided by 6. */ + kCLOCK_DivideBy7, /*!< Output clock divided by 7. */ + kCLOCK_DivideBy8, /*!< Output clock divided by 8. */ +} clock_output_divider_t; + +/*! + * @brief The enumerator of clock root. + */ +typedef enum _clock_root +{ + kCLOCK_Usdhc1ClkRoot = 0U, /*!< USDHC1 clock root. */ + kCLOCK_Usdhc2ClkRoot, /*!< USDHC2 clock root. */ + kCLOCK_FlexspiClkRoot, /*!< FLEXSPI clock root. */ + kCLOCK_CsiClkRoot, /*!< CSI clock root. */ + kCLOCK_LpspiClkRoot, /*!< LPSPI clock root. */ + kCLOCK_TraceClkRoot, /*!< Trace clock root. */ + kCLOCK_Sai1ClkRoot, /*!< SAI1 clock root. */ + kCLOCK_Sai2ClkRoot, /*!< SAI2 clock root. */ + kCLOCK_Sai3ClkRoot, /*!< SAI3 clock root. */ + kCLOCK_Lpi2cClkRoot, /*!< LPI2C clock root. */ + kCLOCK_CanClkRoot, /*!< CAN clock root. */ + kCLOCK_UartClkRoot, /*!< UART clock root. */ + kCLOCK_LcdifClkRoot, /*!< LCD clock root. */ + kCLOCK_SpdifClkRoot, /*!< SPDIF clock root. */ + kCLOCK_Flexio1ClkRoot, /*!< FLEXIO1 clock root. */ + kCLOCK_Flexio2ClkRoot, /*!< FLEXIO2 clock root. */ +} clock_root_t; + /******************************************************************************* * API ******************************************************************************/ @@ -970,7 +1121,7 @@ static inline void CLOCK_SetMux(clock_mux_t mux, uint32_t value) { uint32_t busyShift; - busyShift = CCM_TUPLE_BUSY_SHIFT(mux); + busyShift = (uint32_t)CCM_TUPLE_BUSY_SHIFT(mux); CCM_TUPLE_REG(CCM, mux) = (CCM_TUPLE_REG(CCM, mux) & (~CCM_TUPLE_MASK(mux))) | (((uint32_t)((value) << CCM_TUPLE_SHIFT(mux))) & CCM_TUPLE_MASK(mux)); @@ -980,7 +1131,7 @@ static inline void CLOCK_SetMux(clock_mux_t mux, uint32_t value) if (CCM_NO_BUSY_WAIT != busyShift) { /* Wait until CCM internal handshake finish. */ - while (CCM->CDHIPR & (1U << busyShift)) + while ((CCM->CDHIPR & ((1UL << busyShift))) != 0UL) { } } @@ -994,7 +1145,7 @@ static inline void CLOCK_SetMux(clock_mux_t mux, uint32_t value) */ static inline uint32_t CLOCK_GetMux(clock_mux_t mux) { - return (CCM_TUPLE_REG(CCM, mux) & CCM_TUPLE_MASK(mux)) >> CCM_TUPLE_SHIFT(mux); + return (((uint32_t)(CCM_TUPLE_REG(CCM, mux) & CCM_TUPLE_MASK(mux))) >> CCM_TUPLE_SHIFT(mux)); } /*! @@ -1017,7 +1168,7 @@ static inline void CLOCK_SetDiv(clock_div_t divider, uint32_t value) if (CCM_NO_BUSY_WAIT != busyShift) { /* Wait until CCM internal handshake finish. */ - while (CCM->CDHIPR & (1U << busyShift)) + while ((CCM->CDHIPR & ((uint32_t)(1UL << busyShift))) != 0UL) { } } @@ -1030,7 +1181,7 @@ static inline void CLOCK_SetDiv(clock_div_t divider, uint32_t value) */ static inline uint32_t CLOCK_GetDiv(clock_div_t divider) { - return ((CCM_TUPLE_REG(CCM, divider) & CCM_TUPLE_MASK(divider)) >> CCM_TUPLE_SHIFT(divider)); + return ((uint32_t)(CCM_TUPLE_REG(CCM, divider) & CCM_TUPLE_MASK(divider)) >> CCM_TUPLE_SHIFT(divider)); } /*! @@ -1045,10 +1196,10 @@ static inline void CLOCK_ControlGate(clock_ip_name_t name, clock_gate_value_t va uint32_t shift = ((uint32_t)name) & 0x1FU; volatile uint32_t *reg; - assert(index <= 6); + assert(index <= 6UL); - reg = ((volatile uint32_t *)&CCM->CCGR0) + index; - *reg = ((*reg) & ~(3U << shift)) | (((uint32_t)value) << shift); + reg = (volatile uint32_t *)(&(((volatile uint32_t *)&CCM->CCGR0)[index])); + *reg = ((*reg) & ~((uint32_t)(3UL << shift))) | (((uint32_t)value) << shift); } /*! @@ -1087,13 +1238,11 @@ static inline void CLOCK_SetMode(clock_mode_t mode) * This function will return the external XTAL OSC frequency if it is selected as the source of OSC, * otherwise internal 24MHz RC OSC frequency will be returned. * - * @param osc OSC type to get frequency. - * * @return Clock frequency; If the clock is invalid, returns 0. */ static inline uint32_t CLOCK_GetOscFreq(void) { - return (XTALOSC24M->LOWPWR_CTRL & XTALOSC24M_LOWPWR_CTRL_OSC_SEL_MASK) ? 24000000UL : g_xtalFreq; + return ((XTALOSC24M->LOWPWR_CTRL & XTALOSC24M_LOWPWR_CTRL_OSC_SEL_MASK) != 0UL) ? 24000000UL : g_xtalFreq; } /*! @@ -1130,7 +1279,7 @@ uint32_t CLOCK_GetPerClkFreq(void); * This function checks the current clock configurations and then calculates * the clock frequency for a specific clock name defined in clock_name_t. * - * @param clockName Clock names defined in clock_name_t + * @param name Clock names defined in clock_name_t * @return Clock frequency value in hertz */ uint32_t CLOCK_GetFreq(clock_name_t name); @@ -1145,6 +1294,14 @@ static inline uint32_t CLOCK_GetCpuClkFreq(void) return CLOCK_GetFreq(kCLOCK_CpuClk); } +/*! + * @brief Gets the frequency of selected clock root. + * + * @param clockRoot The clock root used to get the frequency, please refer to @ref clock_root_t. + * @return The frequency of selected clock root. + */ +uint32_t CLOCK_GetClockRootFreq(clock_root_t clockRoot); + /*! * @name OSC operations * @{ @@ -1157,7 +1314,7 @@ static inline uint32_t CLOCK_GetCpuClkFreq(void) * 1. Use external crystal oscillator. * 2. Bypass the external crystal oscillator, using input source clock directly. * - * After this function, please call @ref CLOCK_SetXtal0Freq to inform clock driver + * After this function, please call CLOCK_SetXtal0Freq to inform clock driver * the external clock frequency. * * @param bypassXtalOsc Pass in true to bypass the external crystal oscillator. @@ -1171,7 +1328,7 @@ void CLOCK_InitExternalClk(bool bypassXtalOsc); * * This function disables the external 24MHz clock. * - * After this function, please call @ref CLOCK_SetXtal0Freq to set external clock + * After this function, please call CLOCK_SetXtal0Freq to set external clock * frequency to 0. */ void CLOCK_DeinitExternalClk(void); @@ -1229,7 +1386,7 @@ void CLOCK_DeinitRcOsc24M(void); /*! @brief Enable USB HS clock. * * This function only enables the access to USB HS prepheral, upper layer - * should first call the @ref CLOCK_EnableUsbhs0PhyPllClock to enable the PHY + * should first call the CLOCK_EnableUsbhs0PhyPllClock to enable the PHY * clock to use USB HS. * * @param src USB HS does not care about the clock source, here must be @ref kCLOCK_UsbSrcUnused. @@ -1242,7 +1399,7 @@ bool CLOCK_EnableUsbhs0Clock(clock_usb_src_t src, uint32_t freq); /*! @brief Enable USB HS clock. * * This function only enables the access to USB HS prepheral, upper layer - * should first call the @ref CLOCK_EnableUsbhs0PhyPllClock to enable the PHY + * should first call the CLOCK_EnableUsbhs0PhyPllClock to enable the PHY * clock to use USB HS. * * @param src USB HS does not care about the clock source, here must be @ref kCLOCK_UsbSrcUnused. @@ -1252,12 +1409,6 @@ bool CLOCK_EnableUsbhs0Clock(clock_usb_src_t src, uint32_t freq); */ bool CLOCK_EnableUsbhs1Clock(clock_usb_src_t src, uint32_t freq); -/*! @brief Disable USB HS PHY PLL clock. - * - * This function disables USB HS PHY PLL clock. - */ -void CLOCK_DisableUsbhs1PhyPllClock(void); - /* @} */ /*! @@ -1277,11 +1428,11 @@ static inline void CLOCK_SetPllBypass(CCM_ANALOG_Type *base, clock_pll_t pll, bo { if (bypass) { - CCM_ANALOG_TUPLE_REG_OFF(base, pll, 4U) = 1U << CCM_ANALOG_PLL_BYPASS_SHIFT; + CCM_ANALOG_TUPLE_REG_OFF(base, pll, 4U) = 1UL << CCM_ANALOG_PLL_BYPASS_SHIFT; } else { - CCM_ANALOG_TUPLE_REG_OFF(base, pll, 8U) = 1U << CCM_ANALOG_PLL_BYPASS_SHIFT; + CCM_ANALOG_TUPLE_REG_OFF(base, pll, 8U) = 1UL << CCM_ANALOG_PLL_BYPASS_SHIFT; } } @@ -1296,7 +1447,7 @@ static inline void CLOCK_SetPllBypass(CCM_ANALOG_Type *base, clock_pll_t pll, bo */ static inline bool CLOCK_IsPllBypassed(CCM_ANALOG_Type *base, clock_pll_t pll) { - return (bool)(CCM_ANALOG_TUPLE_REG(base, pll) & (1U << CCM_ANALOG_PLL_BYPASS_SHIFT)); + return (bool)(CCM_ANALOG_TUPLE_REG(base, pll) & (1UL << CCM_ANALOG_PLL_BYPASS_SHIFT)); } /*! @@ -1310,7 +1461,7 @@ static inline bool CLOCK_IsPllBypassed(CCM_ANALOG_Type *base, clock_pll_t pll) */ static inline bool CLOCK_IsPllEnabled(CCM_ANALOG_Type *base, clock_pll_t pll) { - return (bool)(CCM_ANALOG_TUPLE_REG(base, pll) & (1U << CCM_ANALOG_TUPLE_SHIFT(pll))); + return ((CCM_ANALOG_TUPLE_REG(base, pll) & (1UL << CCM_ANALOG_TUPLE_SHIFT(pll))) != 0U); } /*! @@ -1337,7 +1488,7 @@ static inline void CLOCK_SetPllBypassRefClkSrc(CCM_ANALOG_Type *base, clock_pll_ static inline uint32_t CLOCK_GetPllBypassRefClk(CCM_ANALOG_Type *base, clock_pll_t pll) { return (((CCM_ANALOG_TUPLE_REG(base, pll) & CCM_ANALOG_PLL_BYPASS_CLK_SRC_MASK) >> - CCM_ANALOG_PLL_BYPASS_CLK_SRC_SHIFT) == kCLOCK_PllClkSrc24M) ? + CCM_ANALOG_PLL_BYPASS_CLK_SRC_SHIFT) == (uint32_t)kCLOCK_PllClkSrc24M) ? CLOCK_GetOscFreq() : CLKPN_FREQ; } @@ -1547,18 +1698,45 @@ bool CLOCK_EnableUsbhs1PhyPllClock(clock_usb_phy_src_t src, uint32_t freq); */ void CLOCK_DisableUsbhs1PhyPllClock(void); -/*! - * @brief Use DWT to delay at least for some time. - * Please note that, this API will calculate the microsecond period with the maximum - * supported CPU frequency, so this API will only delay for at least the given microseconds, if precise - * delay count was needed, please implement a new timer count to achieve this function. - * - * @param delay_us Delay time in unit of microsecond. - */ -void SDK_DelayAtLeastUs(uint32_t delay_us); - /* @} */ +/*! + * @name Clock Output Inferfaces + * @{ + */ + +/*! + * @brief Set the clock source and the divider of the clock output1. + * + * @param selection The clock source to be output, please refer to @ref clock_output1_selection_t. + * @param divider The divider of the output clock signal, please refer to @ref clock_output_divider_t. + */ +void CLOCK_SetClockOutput1(clock_output1_selection_t selection, clock_output_divider_t divider); + +/*! + * @brief Set the clock source and the divider of the clock output2. + * + * @param selection The clock source to be output, please refer to @ref clock_output2_selection_t. + * @param divider The divider of the output clock signal, please refer to @ref clock_output_divider_t. + */ +void CLOCK_SetClockOutput2(clock_output2_selection_t selection, clock_output_divider_t divider); + +/*! + * @brief Get the frequency of clock output1 clock signal. + * + * @return The frequency of clock output1 clock signal. + */ +uint32_t CLOCK_GetClockOutCLKO1Freq(void); + +/*! + * @brief Get the frequency of clock output2 clock signal. + * + * @return The frequency of clock output2 clock signal. + */ +uint32_t CLOCK_GetClockOutClkO2Freq(void); + +/*! @} */ + #if defined(__cplusplus) } #endif /* __cplusplus */ diff --git a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/fsl_common.h b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/fsl_common.h index 6d07932ef..43ebe30d2 100755 --- a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/fsl_common.h +++ b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/fsl_common.h @@ -47,7 +47,7 @@ /*! @name Driver version */ /*@{*/ /*! @brief common driver version 2.0.1. */ -#define FSL_COMMON_DRIVER_VERSION (MAKE_VERSION(2, 0, 1)) +#define FSL_COMMON_DRIVER_VERSION (MAKE_VERSION(2, 1, 0)) /*@}*/ /* Debug console type definition. */ @@ -131,6 +131,7 @@ enum _status_groups kStatusGroup_LPC_MINISPI = 76, /*!< Group number for LPC_MINISPI status codes. */ kStatusGroup_HASHCRYPT = 77, /*!< Group number for Hashcrypt status codes */ kStatusGroup_LPC_SPI_SSP = 78, /*!< Group number for LPC_SPI_SSP status codes. */ + kStatusGroup_I3C = 79, /*!< Group number for I3C status codes */ kStatusGroup_LPC_I2C_1 = 97, /*!< Group number for LPC_I2C_1 status codes. */ kStatusGroup_NOTIFIER = 98, /*!< Group number for NOTIFIER status codes. */ kStatusGroup_DebugConsole = 99, /*!< Group number for debug console status codes. */ @@ -157,6 +158,9 @@ enum _status_groups kStatusGroup_OSA = 143, /*!< Group number for OSA status codes. */ kStatusGroup_COMMON_TASK = 144, /*!< Group number for Common task status codes. */ kStatusGroup_MSG = 145, /*!< Group number for messaging status codes. */ + kStatusGroup_SDK_OCOTP = 146, /*!< Group number for OCOTP status codes. */ + kStatusGroup_SDK_FLEXSPINOR = 147, /*!< Group number for FLEXSPINOR status codes.*/ + kStatusGroup_CODEC = 148, /*!< Group number for codec status codes. */ }; /*! @brief Generic status return codes. */ @@ -174,20 +178,6 @@ enum _generic_status /*! @brief Type used for all status and error return values. */ typedef int32_t status_t; -/* - * The fsl_clock.h is included here because it needs MAKE_VERSION/MAKE_STATUS/status_t - * defined in previous of this file. - */ -#include "fsl_clock.h" - -/* - * Chip level peripheral reset API, for MCUs that implement peripheral reset control external to a peripheral - */ -#if ((defined(FSL_FEATURE_SOC_SYSCON_COUNT) && (FSL_FEATURE_SOC_SYSCON_COUNT > 0)) || \ - (defined(FSL_FEATURE_SOC_ASYNC_SYSCON_COUNT) && (FSL_FEATURE_SOC_ASYNC_SYSCON_COUNT > 0))) -#include "fsl_reset.h" -#endif - /* * Macro guard for whether to use default weak IRQ implementation in drivers */ @@ -198,11 +188,11 @@ typedef int32_t status_t; /*! @name Min/max macros */ /* @{ */ #if !defined(MIN) -#define MIN(a, b) ((a) < (b) ? (a) : (b)) +#define MIN(a, b) (((a) < (b)) ? (a) : (b)) #endif #if !defined(MAX) -#define MAX(a, b) ((a) > (b) ? (a) : (b)) +#define MAX(a, b) (((a) > (b)) ? (a) : (b)) #endif /* @} */ @@ -394,6 +384,21 @@ _Pragma("diag_suppress=Pm120") #error Toolchain not supported. #endif /* defined(__ICCARM__) */ /* @} */ + +/* + * The fsl_clock.h is included here because it needs MAKE_VERSION/MAKE_STATUS/status_t + * defined in previous of this file. + */ +#include "fsl_clock.h" + +/* + * Chip level peripheral reset API, for MCUs that implement peripheral reset control external to a peripheral + */ +#if ((defined(FSL_FEATURE_SOC_SYSCON_COUNT) && (FSL_FEATURE_SOC_SYSCON_COUNT > 0)) || \ + (defined(FSL_FEATURE_SOC_ASYNC_SYSCON_COUNT) && (FSL_FEATURE_SOC_ASYNC_SYSCON_COUNT > 0))) +#include "fsl_reset.h" +#endif + /******************************************************************************* * API ******************************************************************************/ @@ -489,6 +494,9 @@ _Pragma("diag_suppress=Pm120") */ static inline uint32_t DisableGlobalIRQ(void) { +#if defined (__XCC__) + return 0; +#else #if defined(CPSR_I_Msk) uint32_t cpsr = __get_CPSR() & CPSR_I_Msk; @@ -501,6 +509,7 @@ _Pragma("diag_suppress=Pm120") __disable_irq(); return regPrimask; +#endif #endif } @@ -516,10 +525,13 @@ _Pragma("diag_suppress=Pm120") */ static inline void EnableGlobalIRQ(uint32_t primask) { +#if defined (__XCC__) +#else #if defined(CPSR_I_Msk) __set_CPSR((__get_CPSR() & ~CPSR_I_Msk) | primask); #else __set_PRIMASK(primask); +#endif #endif } diff --git a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/fsl_gpio.h b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/fsl_gpio.h index 94cff8273..366e0779a 100755 --- a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/fsl_gpio.h +++ b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/fsl_gpio.h @@ -30,8 +30,8 @@ /*! @name Driver version */ /*@{*/ -/*! @brief GPIO driver version 2.0.1. */ -#define FSL_GPIO_DRIVER_VERSION (MAKE_VERSION(2, 0, 1)) +/*! @brief GPIO driver version 2.0.2. */ +#define FSL_GPIO_DRIVER_VERSION (MAKE_VERSION(2, 0, 2)) /*@}*/ /*! @brief GPIO direction definition. */ diff --git a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/fsl_lpuart.h b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/fsl_lpuart.h index acc471346..f73e14919 100755 --- a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/fsl_lpuart.h +++ b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/fsl_lpuart.h @@ -30,8 +30,8 @@ /*! @name Driver version */ /*@{*/ -/*! @brief LPUART driver version 2.2.6. */ -#define FSL_LPUART_DRIVER_VERSION (MAKE_VERSION(2, 2, 6)) +/*! @brief LPUART driver version 2.2.7. */ +#define FSL_LPUART_DRIVER_VERSION (MAKE_VERSION(2, 2, 7)) /*@}*/ /*! @brief Error codes for the LPUART driver. */ @@ -166,9 +166,8 @@ enum _lpuart_flags (LPUART_STAT_FE_MASK), /*!< Frame error flag, sets if logic 0 was detected where stop bit expected */ kLPUART_ParityErrorFlag = (LPUART_STAT_PF_MASK), /*!< If parity enabled, sets upon parity error detection */ #if defined(FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT) && FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT - kLPUART_LinBreakFlag = - (int)(LPUART_STAT_LBKDIF_MASK), /*!< LIN break detect interrupt flag, sets when LIN break char - detected and LIN circuit enabled */ + kLPUART_LinBreakFlag = (int)(LPUART_STAT_LBKDIF_MASK), /*!< LIN break detect interrupt flag, sets when LIN break + char detected and LIN circuit enabled */ #endif kLPUART_RxActiveEdgeFlag = (LPUART_STAT_RXEDGIF_MASK), /*!< Receive pin active edge interrupt flag, sets when active edge detected */ @@ -624,7 +623,7 @@ static inline uint8_t LPUART_ReadByte(LPUART_Type *base) return base->DATA; } #else - return base->DATA; + return (uint8_t)(base->DATA); #endif } diff --git a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/fsl_romapi.h b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/fsl_romapi.h new file mode 100644 index 000000000..d906d8ce6 --- /dev/null +++ b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/fsl_romapi.h @@ -0,0 +1,570 @@ +/* + * Copyright 2017-2020 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/** +* @file fsl_romapi.h +* @brief support flexspi norflash function +* @version 2.0 +* @author AIIT XUOS Lab +* @date 2023-04-03 +*/ + +#ifndef _FSL_ROMAPI_H_ +#define _FSL_ROMAPI_H_ + +#include "fsl_common.h" + +/*! + * @addtogroup romapi + * @{ + */ + +/*! @brief ROMAPI version 1.1.1. */ +#define FSL_ROM_ROMAPI_VERSION (MAKE_VERSION(1U, 1U, 1U)) +/*! @brief ROM FLEXSPI NOR driver version 1.4.0. */ +#define FSL_ROM_FLEXSPINOR_DRIVER_VERSION (MAKE_VERSION(1U, 4U, 0U)) + +/*! + * @name Common ROMAPI fearures info defines + * @{ + */ +/* @brief ROM has FLEXSPI NOR API. */ +#define FSL_ROM_HAS_FLEXSPINOR_API (1) +/* @brief ROM has run bootloader API. */ +#define FSL_ROM_HAS_RUNBOOTLOADER_API (0) +/* @brief ROM has FLEXSPI NOR get config API. */ +#define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_GET_CONFIG (0) +/* @brief ROM has flash init API. */ +#define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_FLASH_INIT (1) +/* @brief ROM has erase API. */ +#define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE (1) +/* @brief ROM has erase sector API. */ +#define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_SECTOR (1) +/* @brief ROM has erase block API. */ +#define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_BLOCK (0) +/* @brief ROM has erase all API. */ +#define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_ALL (1) +/* @brief ROM has page program API. */ +#define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_PAGE_PROGRAM (1) +/* @brief ROM has update lut API. */ +#define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_UPDATE_LUT (1) +/* @brief ROM has FLEXSPI command API. */ +#define FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_CMD_XFER (1) + +/*@}*/ + +#define kROM_StatusGroup_FLEXSPI 60U /*!< ROM FLEXSPI status group number.*/ +#define kROM_StatusGroup_FLEXSPINOR 200U /*!< ROM FLEXSPI NOR status group number.*/ + +#define FSL_ROM_FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) \ + (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | \ + FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1)) + +/*! @brief Generate bit mask */ +#define FSL_ROM_FLEXSPI_BITMASK(bit_offset) (1U << (bit_offset)) + +/*! @brief FLEXSPI memory config block related defintions */ +#define FLEXSPI_CFG_BLK_TAG (0x42464346UL) /*!< ascii "FCFB" Big Endian */ +#define FLEXSPI_CFG_BLK_VERSION (0x56010400UL) /*!< V1.4.0 */ + +#define CMD_SDR 0x01U +#define CMD_DDR 0x21U +#define RADDR_SDR 0x02U +#define RADDR_DDR 0x22U +#define CADDR_SDR 0x03U +#define CADDR_DDR 0x23U +#define MODE1_SDR 0x04U +#define MODE1_DDR 0x24U +#define MODE2_SDR 0x05U +#define MODE2_DDR 0x25U +#define MODE4_SDR 0x06U +#define MODE4_DDR 0x26U +#define MODE8_SDR 0x07U +#define MODE8_DDR 0x27U +#define WRITE_SDR 0x08U +#define WRITE_DDR 0x28U +#define READ_SDR 0x09U +#define READ_DDR 0x29U +#define LEARN_SDR 0x0AU +#define LEARN_DDR 0x2AU +#define DATSZ_SDR 0x0BU +#define DATSZ_DDR 0x2BU +#define DUMMY_SDR 0x0CU +#define DUMMY_DDR 0x2CU +#define DUMMY_RWDS_SDR 0x0DU +#define DUMMY_RWDS_DDR 0x2DU +#define JMP_ON_CS 0x1FU +#define STOP 0U + +#define FLEXSPI_1PAD 0U +#define FLEXSPI_2PAD 1U +#define FLEXSPI_4PAD 2U +#define FLEXSPI_8PAD 3U + +/* Lookup table related defintions */ +#define NOR_CMD_INDEX_READ 0U +#define NOR_CMD_INDEX_READSTATUS 1U +#define NOR_CMD_INDEX_WRITEENABLE 2U +#define NOR_CMD_INDEX_ERASESECTOR 3U +#define NOR_CMD_INDEX_PAGEPROGRAM 4U +#define NOR_CMD_INDEX_CHIPERASE 5U +#define NOR_CMD_INDEX_DUMMY 6U +#define NOR_CMD_INDEX_ERASEBLOCK 7U + +/*! + * NOR LUT sequence index used for default LUT assignment + * NOTE: + * The will take effect if the lut sequences are not customized. + */ +#define NOR_CMD_LUT_SEQ_IDX_READ 0U /*!< READ LUT sequence id in lookupTable stored in config block */ +#define NOR_CMD_LUT_SEQ_IDX_READSTATUS 1U /*!< Read Status LUT sequence id in lookupTable stored in config block */ +#define NOR_CMD_LUT_SEQ_IDX_READSTATUS_XPI \ + 2U /*!< Read status DPI/QPI/OPI sequence id in lookupTable stored in config block */ +#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE 3U /*!< Write Enable sequence id in lookupTable stored in config block */ +#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE_XPI \ + 4U /*!< Write Enable DPI/QPI/OPI sequence id in lookupTable stored in config block */ +#define NOR_CMD_LUT_SEQ_IDX_ERASESECTOR 5U /*!< Erase Sector sequence id in lookupTable stored in config block */ +#define NOR_CMD_LUT_SEQ_IDX_ERASEBLOCK 8U /*!< Erase Block sequence id in lookupTable stored in config block */ +#define NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM 9U /*!< Program sequence id in lookupTable stored in config block */ +#define NOR_CMD_LUT_SEQ_IDX_CHIPERASE 11U /*!< Chip Erase sequence in lookupTable id stored in config block */ +#define NOR_CMD_LUT_SEQ_IDX_READ_SFDP 13U /*!< Read SFDP sequence in lookupTable id stored in config block */ +#define NOR_CMD_LUT_SEQ_IDX_RESTORE_NOCMD \ + 14U /*!< Restore 0-4-4/0-8-8 mode sequence id in lookupTable stored in config block */ +#define NOR_CMD_LUT_SEQ_IDX_EXIT_NOCMD \ + 15U /*!< Exit 0-4-4/0-8-8 mode sequence id in lookupTable stored in config blobk */ + +/*! + * @name Support for init FLEXSPI NOR configuration + * @{ + */ +/*! @brief Flash Pad Definitions */ +enum +{ + kSerialFlash_1Pad = 1U, + kSerialFlash_2Pads = 2U, + kSerialFlash_4Pads = 4U, + kSerialFlash_8Pads = 8U, +}; + +/*! @brief FLEXSPI clock configuration type */ +enum +{ + kFLEXSPIClk_SDR, /*!< Clock configure for SDR mode */ + kFLEXSPIClk_DDR, /*!< Clock configurat for DDR mode */ +}; + +/*! @brief FLEXSPI Read Sample Clock Source definition */ +enum _flexspi_read_sample_clk +{ + kFLEXSPIReadSampleClk_LoopbackInternally = 0U, + kFLEXSPIReadSampleClk_LoopbackFromDqsPad = 1U, + kFLEXSPIReadSampleClk_LoopbackFromSckPad = 2U, + kFLEXSPIReadSampleClk_ExternalInputFromDqsPad = 3U, +}; + +/*! @brief Flash Type Definition */ +enum +{ + kFLEXSPIDeviceType_SerialNOR = 1U, /*!< Flash device is Serial NOR */ +}; + +/*! @brief Flash Configuration Command Type */ +enum +{ + kDeviceConfigCmdType_Generic, /*!< Generic command, for example: configure dummy cycles, drive strength, etc */ + kDeviceConfigCmdType_QuadEnable, /*!< Quad Enable command */ + kDeviceConfigCmdType_Spi2Xpi, /*!< Switch from SPI to DPI/QPI/OPI mode */ + kDeviceConfigCmdType_Xpi2Spi, /*!< Switch from DPI/QPI/OPI to SPI mode */ + kDeviceConfigCmdType_Spi2NoCmd, /*!< Switch to 0-4-4/0-8-8 mode */ + kDeviceConfigCmdType_Reset, /*!< Reset device command */ +}; + +/*! @brief Defintions for FLEXSPI Serial Clock Frequency */ +enum _flexspi_serial_clk_freq +{ + kFLEXSPISerialClk_NoChange = 0U, + kFLEXSPISerialClk_30MHz = 1U, + kFLEXSPISerialClk_50MHz = 2U, + kFLEXSPISerialClk_60MHz = 3U, + kFLEXSPISerialClk_75MHz = 4U, + kFLEXSPISerialClk_80MHz = 5U, + kFLEXSPISerialClk_100MHz = 6U, + kFLEXSPISerialClk_133MHz = 7U, + kFLEXSPISerialClk_166MHz = 8U, + kFLEXSPISerialClk_200MHz = 9U, +}; + +/*! @brief Misc feature bit definitions */ +enum +{ + kFLEXSPIMiscOffset_DiffClkEnable = 0U, /*!< Bit for Differential clock enable */ + kFLEXSPIMiscOffset_Ck2Enable = 1U, /*!< Bit for CK2 enable */ + kFLEXSPIMiscOffset_ParallelEnable = 2U, /*!< Bit for Parallel mode enable */ + kFLEXSPIMiscOffset_WordAddressableEnable = 3U, /*!< Bit for Word Addressable enable */ + kFLEXSPIMiscOffset_SafeConfigFreqEnable = 4U, /*!< Bit for Safe Configuration Frequency enable */ + kFLEXSPIMiscOffset_PadSettingOverrideEnable = 5U, /*!< Bit for Pad setting override enable */ + kFLEXSPIMiscOffset_DdrModeEnable = 6U, /*!< Bit for DDR clock confiuration indication. */ + kFLEXSPIMiscOffset_UseValidTimeForAllFreq = 7U, /*!< Bit for DLLCR settings under all modes */ +}; + +enum +{ + kSerialNorType_StandardSPI, /*!< Device that support Standard SPI and Extended SPI mode */ + kSerialNorType_HyperBus, /*!< Device that supports HyperBus only */ + kSerialNorType_XPI, /*!< Device that works under DPI, QPI or OPI mode */ + kSerialNorType_NoCmd, /*!< Device that works under No command mode (XIP mode/Performance Enhance + mode/continous read mode) */ +}; + +/*@}*/ + +/*! + * @name FLEXSPI NOR Configuration + * @{ + */ + +/*! @brief FLEXSPI LUT Sequence structure */ +typedef struct _flexspi_lut_seq +{ + uint8_t seqNum; /*!< Sequence Number, valid number: 1-16 */ + uint8_t seqId; /*!< Sequence Index, valid number: 0-15 */ + uint16_t reserved; +} flexspi_lut_seq_t; + +typedef struct +{ + uint8_t time_100ps; /*!< Data valid time, in terms of 100ps */ + uint8_t delay_cells; /*!< Data valid time, in terms of delay cells */ +} flexspi_dll_time_t; + +/*! @brief FLEXSPI Memory Configuration Block */ +typedef struct _flexspi_mem_config +{ + uint32_t tag; /*!< [0x000-0x003] Tag, fixed value 0x42464346UL */ + uint32_t version; /*!< [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor, [7:0] - bugfix */ + uint32_t reserved0; /*!< [0x008-0x00b] Reserved for future use */ + uint8_t readSampleClkSrc; /*!< [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3 */ + uint8_t csHoldTime; /*!< [0x00d-0x00d] Data hold time, default value: 3 */ + uint8_t csSetupTime; /*!< [0x00e-0x00e] Date setup time, default value: 3 */ + uint8_t columnAddressWidth; /*!< [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed to 3, For + Serial NAND, need to refer to datasheet */ + uint8_t deviceModeCfgEnable; /*!< [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 - Disable */ + uint8_t deviceModeType; /*!< [0x011-0x011] Specify the configuration command type:Quad Enable, DPI/QPI/OPI switch, + Generic configuration, etc. */ + uint16_t waitTimeCfgCommands; /*!< [0x012-0x013] Wait time for all configuration commands, unit: 100us, Used for + DPI/QPI/OPI switch or reset command */ + flexspi_lut_seq_t deviceModeSeq; /*!< [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id, [15:8] - LUt + sequence number, [31:16] Reserved */ + uint32_t deviceModeArg; /*!< [0x018-0x01b] Argument/Parameter for device configuration */ + uint8_t configCmdEnable; /*!< [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable */ + uint8_t configModeType[3]; /*!< [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe */ + flexspi_lut_seq_t + configCmdSeqs[3]; /*!< [0x020-0x02b] Sequence info for Device Configuration command, similar as deviceModeSeq */ + uint32_t reserved1; /*!< [0x02c-0x02f] Reserved for future use */ + uint32_t configCmdArgs[3]; /*!< [0x030-0x03b] Arguments/Parameters for device Configuration commands */ + uint32_t reserved2; /*!< [0x03c-0x03f] Reserved for future use */ + uint32_t controllerMiscOption; /*!< [0x040-0x043] Controller Misc Options, see Misc feature bit definitions for more + details */ + uint8_t deviceType; /*!< [0x044-0x044] Device Type: See Flash Type Definition for more details */ + uint8_t sflashPadType; /*!< [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8 - Octal */ + uint8_t serialClkFreq; /*!< [0x046-0x046] Serial Flash Frequencey, device specific definitions, See System Boot + Chapter for more details */ + uint8_t + lutCustomSeqEnable; /*!< [0x047-0x047] LUT customization Enable, it is required if the program/erase cannot + be done using 1 LUT sequence, currently, only applicable to HyperFLASH */ + uint32_t reserved3[2]; /*!< [0x048-0x04f] Reserved for future use */ + uint32_t sflashA1Size; /*!< [0x050-0x053] Size of Flash connected to A1 */ + uint32_t sflashA2Size; /*!< [0x054-0x057] Size of Flash connected to A2 */ + uint32_t sflashB1Size; /*!< [0x058-0x05b] Size of Flash connected to B1 */ + uint32_t sflashB2Size; /*!< [0x05c-0x05f] Size of Flash connected to B2 */ + uint32_t csPadSettingOverride; /*!< [0x060-0x063] CS pad setting override value */ + uint32_t sclkPadSettingOverride; /*!< [0x064-0x067] SCK pad setting override value */ + uint32_t dataPadSettingOverride; /*!< [0x068-0x06b] data pad setting override value */ + uint32_t dqsPadSettingOverride; /*!< [0x06c-0x06f] DQS pad setting override value */ + uint32_t timeoutInMs; /*!< [0x070-0x073] Timeout threshold for read status command */ + uint32_t commandInterval; /*!< [0x074-0x077] CS deselect interval between two commands */ + flexspi_dll_time_t dataValidTime[2]; /*!< [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B */ + uint16_t busyOffset; /*!< [0x07c-0x07d] Busy offset, valid value: 0-31 */ + uint16_t busyBitPolarity; /*!< [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device is busy, 1 - + busy flag is 0 when flash device is busy */ + uint32_t lookupTable[64]; /*!< [0x080-0x17f] Lookup table holds Flash command sequences */ + flexspi_lut_seq_t lutCustomSeq[12]; /*!< [0x180-0x1af] Customizable LUT Sequences */ + uint32_t reserved4[4]; /*!< [0x1b0-0x1bf] Reserved for future use */ +} flexspi_mem_config_t; + +/*! @brief Serial NOR configuration block */ +typedef struct _flexspi_nor_config +{ + flexspi_mem_config_t memConfig; /*!< Common memory configuration info via FLEXSPI */ + uint32_t pageSize; /*!< Page size of Serial NOR */ + uint32_t sectorSize; /*!< Sector size of Serial NOR */ + uint8_t ipcmdSerialClkFreq; /*!< Clock frequency for IP command */ + uint8_t isUniformBlockSize; /*!< Sector/Block size is the same */ + uint8_t isDataOrderSwapped; /*!< Data order (D0, D1, D2, D3) is swapped (D1,D0, D3, D2) */ + uint8_t reserved0[1]; /*!< Reserved for future use */ + uint8_t serialNorType; /*!< Serial NOR Flash type: 0/1/2/3 */ + uint8_t needExitNoCmdMode; /*!< Need to exit NoCmd mode before other IP command */ + uint8_t halfClkForNonReadCmd; /*!< Half the Serial Clock for non-read command: true/false */ + uint8_t needRestoreNoCmdMode; /*!< Need to Restore NoCmd mode after IP commmand execution */ + uint32_t blockSize; /*!< Block size */ + uint32_t reserve2[11]; /*!< Reserved for future use */ +} flexspi_nor_config_t; + +/*@}*/ + +/*! @brief Manufacturer ID */ +enum +{ + kSerialFlash_ISSI_ManufacturerID = 0x9DU, /*!< Manufacturer ID of the ISSI serial flash */ + kSerialFlash_Adesto_ManufacturerID = 0x1F, /*!< Manufacturer ID of the Adesto Technologies serial flash*/ + kSerialFlash_Winbond_ManufacturerID = 0xEFU, /*!< Manufacturer ID of the Winbond serial flash */ + kSerialFlash_Cypress_ManufacturerID = 0x01U, /*!< Manufacturer ID for Cypress */ +}; + +/*! @brief ROM FLEXSPI NOR flash status */ +enum _flexspi_nor_status +{ + kStatus_ROM_FLEXSPI_SequenceExecutionTimeout = + MAKE_STATUS(kROM_StatusGroup_FLEXSPI, 0), /*!< Status for Sequence Execution timeout */ + kStatus_ROM_FLEXSPI_InvalidSequence = MAKE_STATUS(kROM_StatusGroup_FLEXSPI, 1), /*!< Status for Invalid Sequence */ + kStatus_ROM_FLEXSPI_DeviceTimeout = MAKE_STATUS(kROM_StatusGroup_FLEXSPI, 2), /*!< Status for Device timeout */ + kStatus_FLEXSPINOR_DTRRead_DummyProbeFailed = + MAKE_STATUS(kROM_StatusGroup_FLEXSPINOR, 10), /*!< Status for DDR Read dummy probe failure */ + kStatus_ROM_FLEXSPINOR_SFDP_NotFound = + MAKE_STATUS(kROM_StatusGroup_FLEXSPINOR, 7), /*!< Status for SFDP read failure */ + kStatus_ROM_FLEXSPINOR_Flash_NotFound = + MAKE_STATUS(kROM_StatusGroup_FLEXSPINOR, 9), /*!< Status for Flash detection failure */ +}; + +typedef enum _flexspi_operation +{ + kFLEXSPIOperation_Command, /*!< FLEXSPI operation: Only command, both TX and RX buffer are ignored. */ + kFLEXSPIOperation_Config, /*!< FLEXSPI operation: Configure device mode, the TX FIFO size is fixed in LUT. */ + kFLEXSPIOperation_Write, /*!< FLEXSPI operation: Write, only TX buffer is effective */ + kFLEXSPIOperation_Read, /*!< FLEXSPI operation: Read, only Rx Buffer is effective. */ + kFLEXSPIOperation_End = kFLEXSPIOperation_Read, +} flexspi_operation_t; + +/*! @brief FLEXSPI Transfer Context */ +typedef struct _flexspi_xfer +{ + flexspi_operation_t operation; /*!< FLEXSPI operation */ + uint32_t baseAddress; /*!< FLEXSPI operation base address */ + uint32_t seqId; /*!< Sequence Id */ + uint32_t seqNum; /*!< Sequence Number */ + bool isParallelModeEnable; /*!< Is a parallel transfer */ + uint32_t *txBuffer; /*!< Tx buffer */ + uint32_t txSize; /*!< Tx size in bytes */ + uint32_t *rxBuffer; /*!< Rx buffer */ + uint32_t rxSize; /*!< Rx size in bytes */ +} flexspi_xfer_t; + +#ifdef __cplusplus +extern "C" { +#endif + + +/*! + * @name Initialization + * @{ + */ + +/*! + * @brief Initialize Serial NOR flash via FLEXSPI + * + * This function checks and initializes the FLEXSPI module for the other FLEXSPI APIs. + * + * @param instance storge the instance of FLEXSPI. + * @param config A pointer to the storage for the driver runtime state. + * + * @retval kStatus_Success Api was executed succesfuly. + * @retval kStatus_InvalidArgument A invalid argument is provided. + * @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided. + * @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout. + * @retval kStatus_ROM_FLEXSPI_DeviceTimeout the device timeout + */ +status_t ROM_FLEXSPI_NorFlash_Init(uint32_t instance, flexspi_nor_config_t *config); + +/*@}*/ + +/*! + * @name Programming + * @{ + */ +/*! + * @brief Program data to Serial NOR flash via FLEXSPI. + * + * This function programs the NOR flash memory with the dest address for a given + * flash area as determined by the dst address and the length. + * + * @param instance storge the instance of FLEXSPI. + * @param config A pointer to the storage for the driver runtime state. + * @param dstAddr A pointer to the desired flash memory to be programmed. + * NOTE: + * It is recommended that use page aligned access; + * If the dstAddr is not aligned to page,the driver automatically + * aligns address down with the page address. + * @param src A pointer to the source buffer of data that is to be programmed + * into the NOR flash. + * + * @retval kStatus_Success Api was executed succesfuly. + * @retval kStatus_InvalidArgument A invalid argument is provided. + * @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided. + * @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout. + * @retval kStatus_ROM_FLEXSPI_DeviceTimeout the device timeout + */ +status_t ROM_FLEXSPI_NorFlash_ProgramPage(uint32_t instance, + flexspi_nor_config_t *config, + uint32_t dstAddr, + const uint32_t *src); + +/*@}*/ + +/*! + * @name Erasing + * @{ + */ +#if defined(FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_SECTOR) && FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_SECTOR +/*! + * @brief Erase one sector specified by address + * + * This function erases one of NOR flash sectors based on the desired address. + * + * @param instance storge the index of FLEXSPI. + * @param config A pointer to the storage for the driver runtime state. + * @param address The start address of the desired NOR flash memory to be erased. + * NOTE: + * It is recommended that use sector-aligned access nor device; + * If dstAddr is not aligned with the sector,The driver automatically + * aligns address down with the sector address. + * + * @retval kStatus_Success Api was executed succesfuly. + * @retval kStatus_InvalidArgument A invalid argument is provided. + * @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided. + * @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout. + * @retval kStatus_ROM_FLEXSPI_DeviceTimeout the device timeout + */ +status_t ROM_FLEXSPI_NorFlash_EraseSector(uint32_t instance, flexspi_nor_config_t *config, uint32_t address); +#endif /* FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_SECTOR */ + +#if defined(FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_ALL) && FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_ALL +/*! + * @brief Erase all the Serial NOR flash connected on FLEXSPI. + * + * @param instance storge the instance of FLEXSPI. + * @param config A pointer to the storage for the driver runtime state. + * + * @retval kStatus_Success Api was executed succesfuly. + * @retval kStatus_InvalidArgument A invalid argument is provided. + * @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided. + * @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout. + * @retval kStatus_ROM_FLEXSPI_DeviceTimeout the device timeout + */ +status_t ROM_FLEXSPI_NorFlash_EraseAll(uint32_t instance, flexspi_nor_config_t *config); +#endif /* FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_ALL */ + +/*! + * @brief Erase Flash Region specified by address and length + * + * This function erases the appropriate number of flash sectors based on the + * desired start address and length. + * + * @param instance storge the index of FLEXSPI. + * @param config A pointer to the storage for the driver runtime state. + * @param start The start address of the desired NOR flash memory to be erased. + * NOTE: + * It is recommended that use sector-aligned access NOR flash; + * If dstAddr is not aligned with the sector,the driver automatically + * aligns address down with the sector address. + * @param length The length, given in bytes to be erased. + * NOTE: + * It is recommended that use sector-aligned access NOR flash; + * If length is not aligned with the sector,the driver automatically + * aligns up with the sector. + * @retval kStatus_Success Api was executed succesfuly. + * @retval kStatus_InvalidArgument A invalid argument is provided. + * @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided. + * @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout. + * @retval kStatus_ROM_FLEXSPI_DeviceTimeout the device timeout + */ +status_t ROM_FLEXSPI_NorFlash_Erase(uint32_t instance, flexspi_nor_config_t *config, uint32_t start, uint32_t length); + +/*@}*/ + +/*! + * @name Command + * @{ + */ + +#if defined(FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_CMD_XFER) && FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_CMD_XFER +/*! + * @brief FLEXSPI command + * + * This function is used to perform the command write sequence to the NOR flash. + * + * @param instance storge the index of FLEXSPI. + * @param xfer A pointer to the storage FLEXSPI Transfer Context. + * + * @retval kStatus_Success Api was executed succesfuly. + * @retval kStatus_InvalidArgument A invalid argument is provided. + * @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided. + * @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout. + */ +status_t ROM_FLEXSPI_NorFlash_CommandXfer(uint32_t instance, flexspi_xfer_t *xfer); +#endif /* FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_CMD_XFER */ +/*@}*/ + +/*! + * @name UpdateLut + * @{ + */ +#if defined(FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_UPDATE_LUT) && FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_UPDATE_LUT +/*! + * @brief Configure FLEXSPI Lookup table + * + * @param instance storge the index of FLEXSPI. + * @param seqIndex storge the sequence Id. + * @param lutBase A pointer to the look-up-table for command sequences. + * @param seqNumber storge sequence number. + * + * @retval kStatus_Success Api was executed succesfuly. + * @retval kStatus_InvalidArgument A invalid argument is provided. + * @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided. + * @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout. + */ +status_t ROM_FLEXSPI_NorFlash_UpdateLut(uint32_t instance, + uint32_t seqIndex, + const uint32_t *lutBase, + uint32_t seqNumber); +#endif /* FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_UPDATE_LUT */ + +/*@}*/ + +/*! + * @name ClearCache + * @{ + */ + +/*! + * @brief Software reset for the FLEXSPI logic. + * + * This function sets the software reset flags for both AHB and buffer domain and + * resets both AHB buffer and also IP FIFOs. + * + * @param instance storge the index of FLEXSPI. + */ +void ROM_FLEXSPI_NorFlash_ClearCache(uint32_t instance); + +/*@}*/ + +#ifdef __cplusplus +} +#endif + +/*! @}*/ + +#endif /* _FSL_ROMAPI_H_ */ diff --git a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/mcuboot.h b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/mcuboot.h new file mode 100644 index 000000000..f63aa1a8b --- /dev/null +++ b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/mcuboot.h @@ -0,0 +1,33 @@ +/* + * Copyright 2018-2020 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/** +* @file mcuboot.h +* @brief support bootloader function +* @version 2.0 +* @author AIIT XUOS Lab +* @date 2023-04-03 +*/ + +#ifndef __MCUBOOT_H__ +#define __MCUBOOT_H__ + +#include "fsl_common.h" +#include "board.h" +#include "pin_mux.h" +#include "fsl_iomuxc.h" +#include "fsl_gpio.h" +#include "fsl_lpuart.h" +#include "common.h" + +void mcuboot_bord_init(void); +void mcuboot_reset(void); +void mcuboot_jump(void); +void mcuboot_delay(uint32_t ms); + +#endif + diff --git a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/ymodem.h b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/ymodem.h new file mode 100644 index 000000000..3ff7a28e4 --- /dev/null +++ b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/third_party_driver/include/ymodem.h @@ -0,0 +1,57 @@ +/* +* Copyright (c) 2020 AIIT XUOS Lab +* XiUOS is licensed under Mulan PSL v2. +* You can use this software according to the terms and conditions of the Mulan PSL v2. +* You may obtain a copy of Mulan PSL v2 at: +* http://license.coscl.org.cn/MulanPSL2 +* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, +* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, +* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. +* See the Mulan PSL v2 for more details. +*/ + +/** +* @file: ymodem.h +* @brief: file ymodem.h +* @version: 1.0 +* @author: AIIT XUOS Lab +* @date: 2023/3/24 +*/ + + +#ifndef _YMODEM_H_ +#define _YMODEM_H_ + +#include +#include "common.h" + +#define PACKET_SEQNO_INDEX (1) +#define PACKET_SEQNO_COMP_INDEX (2) + +#define PACKET_HEADER (3) +#define PACKET_TRAILER (2) +#define PACKET_OVERHEAD (PACKET_HEADER + PACKET_TRAILER) +#define PACKET_SIZE (128) +#define PACKET_1K_SIZE (1024) + +#define FILE_NAME_LENGTH (256) +#define FILE_SIZE_LENGTH (16) + +#define SOH (0x01) /* start of 128-byte data packet */ +#define STX (0x02) /* start of 1024-byte data packet */ +#define EOT (0x04) /* end of transmission */ +#define ACK (0x06) /* acknowledge */ +#define NAK (0x15) /* negative acknowledge */ +#define CA (0x18) /* two of these in succession aborts transfer */ +#define CRC16 (0x43) /* 'C' == 0x43, request 16-bit CRC */ + +#define ABORT1 (0x41) /* 'A' == 0x41, abort by user */ +#define ABORT2 (0x61) /* 'a' == 0x61, abort by user */ + +#define NAK_TIMEOUT (0x100000) +#define MAX_ERRORS (5) + +int32_t SerialDownload(const uint32_t addr); +int32_t Ymodem_Receive(uint8_t *buf, const uint32_t addr); + +#endif diff --git a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/xip/fsl_flexspi_nor_boot.c b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/xip/fsl_flexspi_nor_boot.c index 503d56845..caac1f272 100644 --- a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/xip/fsl_flexspi_nor_boot.c +++ b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/xip/fsl_flexspi_nor_boot.c @@ -73,1077 +73,282 @@ const BOOT_DATA_T boot_data = { #pragma location=".boot_hdr.dcd_data" #endif -const uint8_t dcd_sdram[1072] = { - /*0000*/ 0xD2, - 0x04, - 0x30, +const uint8_t dcd_sdram[] = { + /* HEADER */ + /* Tag */ + 0xD2, + /* Image Length */ + 0x04, 0x30, + /* Version */ 0x41, - 0xCC, - 0x03, - 0xAC, - 0x04, - 0x40, - 0x0F, - 0xC0, - 0x68, - 0xFF, - 0xFF, - 0xFF, - 0xFF, - /*0010*/ 0x40, - 0x0F, - 0xC0, - 0x6C, - 0xFF, - 0xFF, - 0xFF, - 0xFF, - 0x40, - 0x0F, - 0xC0, - 0x70, - 0xFF, - 0xFF, - 0xFF, - 0xFF, - /*0020*/ 0x40, - 0x0F, - 0xC0, - 0x74, - 0xFF, - 0xFF, - 0xFF, - 0xFF, - 0x40, - 0x0F, - 0xC0, - 0x78, - 0xFF, - 0xFF, - 0xFF, - 0xFF, - /*0030*/ 0x40, - 0x0F, - 0xC0, - 0x7C, - 0xFF, - 0xFF, - 0xFF, - 0xFF, - 0x40, - 0x0F, - 0xC0, - 0x80, - 0xFF, - 0xFF, - 0xFF, - 0xFF, - /*0040*/ 0x40, - 0x0D, - 0x80, - 0x30, - 0x00, - 0x00, - 0x20, - 0x01, - 0x40, - 0x0D, - 0x81, - 0x00, - 0x00, - 0x1D, - 0x00, - 0x00, - /*0050*/ 0x40, - 0x0F, - 0xC0, - 0x14, - 0x00, - 0x01, - 0x0D, - 0x40, - 0x40, - 0x1F, - 0x80, - 0x14, - 0x00, - 0x00, - 0x00, - 0x00, - /*0060*/ 0x40, - 0x1F, - 0x80, - 0x18, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0x1C, - 0x00, - 0x00, - 0x00, - 0x00, - /*0070*/ 0x40, - 0x1F, - 0x80, - 0x20, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0x24, - 0x00, - 0x00, - 0x00, - 0x00, - /*0080*/ 0x40, - 0x1F, - 0x80, - 0x28, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0x2C, - 0x00, - 0x00, - 0x00, - 0x00, - /*0090*/ 0x40, - 0x1F, - 0x80, - 0x30, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0x34, - 0x00, - 0x00, - 0x00, - 0x00, - /*00a0*/ 0x40, - 0x1F, - 0x80, - 0x38, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0x3C, - 0x00, - 0x00, - 0x00, - 0x00, - /*00b0*/ 0x40, - 0x1F, - 0x80, - 0x40, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0x44, - 0x00, - 0x00, - 0x00, - 0x00, - /*00c0*/ 0x40, - 0x1F, - 0x80, - 0x48, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0x4C, - 0x00, - 0x00, - 0x00, - 0x00, - /*00d0*/ 0x40, - 0x1F, - 0x80, - 0x50, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0x54, - 0x00, - 0x00, - 0x00, - 0x00, - /*00e0*/ 0x40, - 0x1F, - 0x80, - 0x58, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0x5C, - 0x00, - 0x00, - 0x00, - 0x00, - /*00f0*/ 0x40, - 0x1F, - 0x80, - 0x60, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0x64, - 0x00, - 0x00, - 0x00, - 0x00, - /*0100*/ 0x40, - 0x1F, - 0x80, - 0x68, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0x6C, - 0x00, - 0x00, - 0x00, - 0x00, - /*0110*/ 0x40, - 0x1F, - 0x80, - 0x70, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0x74, - 0x00, - 0x00, - 0x00, - 0x00, - /*0120*/ 0x40, - 0x1F, - 0x80, - 0x78, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0x7C, - 0x00, - 0x00, - 0x00, - 0x00, - /*0130*/ 0x40, - 0x1F, - 0x80, - 0x80, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0x84, - 0x00, - 0x00, - 0x00, - 0x00, - /*0140*/ 0x40, - 0x1F, - 0x80, - 0x88, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0x8C, - 0x00, - 0x00, - 0x00, - 0x00, - /*0150*/ 0x40, - 0x1F, - 0x80, - 0x90, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0x94, - 0x00, - 0x00, - 0x00, - 0x00, - /*0160*/ 0x40, - 0x1F, - 0x80, - 0x98, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0x9C, - 0x00, - 0x00, - 0x00, - 0x00, - /*0170*/ 0x40, - 0x1F, - 0x80, - 0xA0, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0xA4, - 0x00, - 0x00, - 0x00, - 0x00, - /*0180*/ 0x40, - 0x1F, - 0x80, - 0xA8, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x80, - 0xAC, - 0x00, - 0x00, - 0x00, - 0x00, - /*0190*/ 0x40, - 0x1F, - 0x80, - 0xB0, - 0x00, - 0x00, - 0x00, - 0x10, - 0x40, - 0x1F, - 0x80, - 0xB4, - 0x00, - 0x00, - 0x00, - 0x00, - /*01a0*/ 0x40, - 0x1F, - 0x80, - 0xB8, - 0x00, - 0x00, - 0x00, - 0x00, - 0x40, - 0x1F, - 0x82, - 0x04, - 0x00, - 0x01, - 0x10, - 0xF9, - /*01b0*/ 0x40, - 0x1F, - 0x82, - 0x08, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x0C, - 0x00, - 0x01, - 0x10, - 0xF9, - /*01c0*/ 0x40, - 0x1F, - 0x82, - 0x10, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x14, - 0x00, - 0x01, - 0x10, - 0xF9, - /*01d0*/ 0x40, - 0x1F, - 0x82, - 0x18, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x1C, - 0x00, - 0x01, - 0x10, - 0xF9, - /*01e0*/ 0x40, - 0x1F, - 0x82, - 0x20, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x24, - 0x00, - 0x01, - 0x10, - 0xF9, - /*01f0*/ 0x40, - 0x1F, - 0x82, - 0x28, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x2C, - 0x00, - 0x01, - 0x10, - 0xF9, - /*0200*/ 0x40, - 0x1F, - 0x82, - 0x30, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x34, - 0x00, - 0x01, - 0x10, - 0xF9, - /*0210*/ 0x40, - 0x1F, - 0x82, - 0x38, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x3C, - 0x00, - 0x01, - 0x10, - 0xF9, - /*0220*/ 0x40, - 0x1F, - 0x82, - 0x40, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x44, - 0x00, - 0x01, - 0x10, - 0xF9, - /*0230*/ 0x40, - 0x1F, - 0x82, - 0x48, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x4C, - 0x00, - 0x01, - 0x10, - 0xF9, - /*0240*/ 0x40, - 0x1F, - 0x82, - 0x50, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x54, - 0x00, - 0x01, - 0x10, - 0xF9, - /*0250*/ 0x40, - 0x1F, - 0x82, - 0x58, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x5C, - 0x00, - 0x01, - 0x10, - 0xF9, - /*0260*/ 0x40, - 0x1F, - 0x82, - 0x60, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x64, - 0x00, - 0x01, - 0x10, - 0xF9, - /*0270*/ 0x40, - 0x1F, - 0x82, - 0x68, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x6C, - 0x00, - 0x01, - 0x10, - 0xF9, - /*0280*/ 0x40, - 0x1F, - 0x82, - 0x70, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x74, - 0x00, - 0x01, - 0x10, - 0xF9, - /*0290*/ 0x40, - 0x1F, - 0x82, - 0x78, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x7C, - 0x00, - 0x01, - 0x10, - 0xF9, - /*02a0*/ 0x40, - 0x1F, - 0x82, - 0x80, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x84, - 0x00, - 0x01, - 0x10, - 0xF9, - /*02b0*/ 0x40, - 0x1F, - 0x82, - 0x88, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x8C, - 0x00, - 0x01, - 0x10, - 0xF9, - /*02c0*/ 0x40, - 0x1F, - 0x82, - 0x90, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x94, - 0x00, - 0x01, - 0x10, - 0xF9, - /*02d0*/ 0x40, - 0x1F, - 0x82, - 0x98, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0x9C, - 0x00, - 0x01, - 0x10, - 0xF9, - /*02e0*/ 0x40, - 0x1F, - 0x82, - 0xA0, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x1F, - 0x82, - 0xA4, - 0x00, - 0x01, - 0x10, - 0xF9, - /*02f0*/ 0x40, - 0x1F, - 0x82, - 0xA8, - 0x00, - 0x01, - 0x10, - 0xF9, - 0x40, - 0x2F, - 0x00, - 0x00, - 0x10, - 0x00, - 0x00, - 0x04, - /*0300*/ 0x40, - 0x2F, - 0x00, - 0x08, - 0x00, - 0x03, - 0x05, - 0x24, - 0x40, - 0x2F, - 0x00, - 0x0C, - 0x06, - 0x03, - 0x05, - 0x24, - /*0310*/ 0x40, - 0x2F, - 0x00, - 0x10, - 0x80, - 0x00, - 0x00, - 0x1B, - 0x40, - 0x2F, - 0x00, - 0x14, - 0x82, - 0x00, - 0x00, - 0x1B, - /*0320*/ 0x40, - 0x2F, - 0x00, - 0x18, - 0x84, - 0x00, - 0x00, - 0x1B, - 0x40, - 0x2F, - 0x00, - 0x1C, - 0x86, - 0x00, - 0x00, - 0x1B, - /*0330*/ 0x40, - 0x2F, - 0x00, - 0x20, - 0x90, - 0x00, - 0x00, - 0x21, - 0x40, - 0x2F, - 0x00, - 0x24, - 0xA0, - 0x00, - 0x00, - 0x19, - /*0340*/ 0x40, - 0x2F, - 0x00, - 0x28, - 0xA8, - 0x00, - 0x00, - 0x17, - 0x40, - 0x2F, - 0x00, - 0x2C, - 0xA9, - 0x00, - 0x00, - 0x1B, - /*0350*/ 0x40, - 0x2F, - 0x00, - 0x30, - 0x00, - 0x00, - 0x00, - 0x21, - 0x40, - 0x2F, - 0x00, - 0x04, - 0x00, - 0x00, - 0x79, - 0xA8, - /*0360*/ 0x40, - 0x2F, - 0x00, - 0x40, - 0x00, - 0x00, - 0x0F, - 0x31, - 0x40, - 0x2F, - 0x00, - 0x44, - 0x00, - 0x65, - 0x29, - 0x22, - /*0370*/ 0x40, - 0x2F, - 0x00, - 0x48, - 0x00, - 0x01, - 0x09, - 0x20, - 0x40, - 0x2F, - 0x00, - 0x4C, - 0x50, - 0x21, - 0x0A, - 0x08, - /*0380*/ 0x40, - 0x2F, - 0x00, - 0x80, - 0x00, - 0x00, - 0x00, - 0x21, - 0x40, - 0x2F, - 0x00, - 0x84, - 0x00, - 0x88, - 0x88, - 0x88, - /*0390*/ 0x40, - 0x2F, - 0x00, - 0x94, - 0x00, - 0x00, - 0x00, - 0x02, - 0x40, - 0x2F, - 0x00, - 0x98, - 0x00, - 0x00, - 0x00, - 0x00, - /*03a0*/ 0x40, - 0x2F, - 0x00, - 0x90, - 0x80, - 0x00, - 0x00, - 0x00, - 0x40, - 0x2F, - 0x00, - 0x9C, - 0xA5, - 0x5A, - 0x00, - 0x0F, - /*03b0*/ 0xCF, - 0x00, - 0x0C, - 0x1C, - 0x40, - 0x2F, - 0x00, - 0x3C, - 0x00, - 0x00, - 0x00, - 0x01, - 0xCC, - 0x00, - 0x14, - 0x04, - /*03c0*/ 0x40, - 0x2F, - 0x00, - 0x90, - 0x80, - 0x00, - 0x00, - 0x00, - 0x40, - 0x2F, - 0x00, - 0x9C, - 0xA5, - 0x5A, - 0x00, - 0x0C, - /*03d0*/ 0xCF, - 0x00, - 0x0C, - 0x1C, - 0x40, - 0x2F, - 0x00, - 0x3C, - 0x00, - 0x00, - 0x00, - 0x01, - 0xCC, - 0x00, - 0x14, - 0x04, - /*03e0*/ 0x40, - 0x2F, - 0x00, - 0x90, - 0x80, - 0x00, - 0x00, - 0x00, - 0x40, - 0x2F, - 0x00, - 0x9C, - 0xA5, - 0x5A, - 0x00, - 0x0C, - /*03f0*/ 0xCF, - 0x00, - 0x0C, - 0x1C, - 0x40, - 0x2F, - 0x00, - 0x3C, - 0x00, - 0x00, - 0x00, - 0x01, - 0xCC, - 0x00, - 0x1C, - 0x04, - /*0400*/ 0x40, - 0x2F, - 0x00, - 0xA0, - 0x00, - 0x00, - 0x00, - 0x33, - 0x40, - 0x2F, - 0x00, - 0x90, - 0x80, - 0x00, - 0x00, - 0x00, - /*0410*/ 0x40, - 0x2F, - 0x00, - 0x9C, - 0xA5, - 0x5A, - 0x00, - 0x0A, - 0xCF, - 0x00, - 0x0C, - 0x1C, - 0x40, - 0x2F, - 0x00, - 0x3C, - /*0420*/ 0x00, - 0x00, - 0x00, - 0x01, - 0xCC, - 0x00, - 0x0C, - 0x04, - 0x40, - 0x2F, - 0x00, - 0x4C, - 0x50, - 0x07, - 0x0A, - 0x09, + + /* COMMANDS */ + + /* group: 'Imported Commands' */ + /* #1.1-117, command header bytes for merged 'Write - value' command */ + 0xCC, 0x03, 0xAC, 0x04, + /* #1.1, command: write_value, address: CCM_CCGR0, value: 0xFFFFFFFF, size: 4 */ + 0x40, 0x0F, 0xC0, 0x68, 0xFF, 0xFF, 0xFF, 0xFF, + /* #1.2, command: write_value, address: CCM_CCGR1, value: 0xFFFFFFFF, size: 4 */ + 0x40, 0x0F, 0xC0, 0x6C, 0xFF, 0xFF, 0xFF, 0xFF, + /* #1.3, command: write_value, address: CCM_CCGR2, value: 0xFFFFFFFF, size: 4 */ + 0x40, 0x0F, 0xC0, 0x70, 0xFF, 0xFF, 0xFF, 0xFF, + /* #1.4, command: write_value, address: CCM_CCGR3, value: 0xFFFFFFFF, size: 4 */ + 0x40, 0x0F, 0xC0, 0x74, 0xFF, 0xFF, 0xFF, 0xFF, + /* #1.5, command: write_value, address: CCM_CCGR4, value: 0xFFFFFFFF, size: 4 */ + 0x40, 0x0F, 0xC0, 0x78, 0xFF, 0xFF, 0xFF, 0xFF, + /* #1.6, command: write_value, address: CCM_CCGR5, value: 0xFFFFFFFF, size: 4 */ + 0x40, 0x0F, 0xC0, 0x7C, 0xFF, 0xFF, 0xFF, 0xFF, + /* #1.7, command: write_value, address: CCM_CCGR6, value: 0xFFFFFFFF, size: 4 */ + 0x40, 0x0F, 0xC0, 0x80, 0xFF, 0xFF, 0xFF, 0xFF, + /* #1.8, command: write_value, address: CCM_ANALOG_PLL_SYS, value: 0x2001, size: 4 */ + 0x40, 0x0D, 0x80, 0x30, 0x00, 0x00, 0x20, 0x01, + /* #1.9, command: write_value, address: CCM_ANALOG_PFD_528, value: 0x1D0000, size: 4 */ + 0x40, 0x0D, 0x81, 0x00, 0x00, 0x1D, 0x00, 0x00, + /* #1.10, command: write_value, address: CCM_CBCDR, value: 0x10D40, size: 4 */ + 0x40, 0x0F, 0xC0, 0x14, 0x00, 0x01, 0x0D, 0x40, + /* #1.11, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_00, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x14, 0x00, 0x00, 0x00, 0x00, + /* #1.12, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_01, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x18, 0x00, 0x00, 0x00, 0x00, + /* #1.13, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_02, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x1C, 0x00, 0x00, 0x00, 0x00, + /* #1.14, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_03, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x20, 0x00, 0x00, 0x00, 0x00, + /* #1.15, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_04, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x24, 0x00, 0x00, 0x00, 0x00, + /* #1.16, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_05, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x28, 0x00, 0x00, 0x00, 0x00, + /* #1.17, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_06, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x2C, 0x00, 0x00, 0x00, 0x00, + /* #1.18, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_07, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x30, 0x00, 0x00, 0x00, 0x00, + /* #1.19, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_08, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x34, 0x00, 0x00, 0x00, 0x00, + /* #1.20, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_09, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x38, 0x00, 0x00, 0x00, 0x00, + /* #1.21, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_10, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x3C, 0x00, 0x00, 0x00, 0x00, + /* #1.22, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_11, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x40, 0x00, 0x00, 0x00, 0x00, + /* #1.23, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_12, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x44, 0x00, 0x00, 0x00, 0x00, + /* #1.24, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_13, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x48, 0x00, 0x00, 0x00, 0x00, + /* #1.25, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_14, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x4C, 0x00, 0x00, 0x00, 0x00, + /* #1.26, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_15, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x50, 0x00, 0x00, 0x00, 0x00, + /* #1.27, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_16, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x54, 0x00, 0x00, 0x00, 0x00, + /* #1.28, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_17, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x58, 0x00, 0x00, 0x00, 0x00, + /* #1.29, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_18, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x5C, 0x00, 0x00, 0x00, 0x00, + /* #1.30, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_19, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x60, 0x00, 0x00, 0x00, 0x00, + /* #1.31, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_20, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x64, 0x00, 0x00, 0x00, 0x00, + /* #1.32, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_21, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x68, 0x00, 0x00, 0x00, 0x00, + /* #1.33, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_22, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x6C, 0x00, 0x00, 0x00, 0x00, + /* #1.34, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_23, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x70, 0x00, 0x00, 0x00, 0x00, + /* #1.35, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_24, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x74, 0x00, 0x00, 0x00, 0x00, + /* #1.36, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_25, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x78, 0x00, 0x00, 0x00, 0x00, + /* #1.37, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_26, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x7C, 0x00, 0x00, 0x00, 0x00, + /* #1.38, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_27, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, + /* #1.39, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_28, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x84, 0x00, 0x00, 0x00, 0x00, + /* #1.40, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_29, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x88, 0x00, 0x00, 0x00, 0x00, + /* #1.41, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_30, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x8C, 0x00, 0x00, 0x00, 0x00, + /* #1.42, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_31, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x90, 0x00, 0x00, 0x00, 0x00, + /* #1.43, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_32, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x94, 0x00, 0x00, 0x00, 0x00, + /* #1.44, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_33, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x98, 0x00, 0x00, 0x00, 0x00, + /* #1.45, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_34, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0x9C, 0x00, 0x00, 0x00, 0x00, + /* #1.46, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_35, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0xA0, 0x00, 0x00, 0x00, 0x00, + /* #1.47, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_36, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0xA4, 0x00, 0x00, 0x00, 0x00, + /* #1.48, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_37, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0xA8, 0x00, 0x00, 0x00, 0x00, + /* #1.49, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_38, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0xAC, 0x00, 0x00, 0x00, 0x00, + /* #1.50, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_39, value: 0x10, size: 4 */ + 0x40, 0x1F, 0x80, 0xB0, 0x00, 0x00, 0x00, 0x10, + /* #1.51, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_40, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0xB4, 0x00, 0x00, 0x00, 0x00, + /* #1.52, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_41, value: 0x00, size: 4 */ + 0x40, 0x1F, 0x80, 0xB8, 0x00, 0x00, 0x00, 0x00, + /* #1.53, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_00, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x04, 0x00, 0x01, 0x10, 0xF9, + /* #1.54, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_01, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x08, 0x00, 0x01, 0x10, 0xF9, + /* #1.55, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_02, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x0C, 0x00, 0x01, 0x10, 0xF9, + /* #1.56, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_03, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x10, 0x00, 0x01, 0x10, 0xF9, + /* #1.57, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_04, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x14, 0x00, 0x01, 0x10, 0xF9, + /* #1.58, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_05, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x18, 0x00, 0x01, 0x10, 0xF9, + /* #1.59, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_06, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x1C, 0x00, 0x01, 0x10, 0xF9, + /* #1.60, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_07, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x20, 0x00, 0x01, 0x10, 0xF9, + /* #1.61, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_08, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x24, 0x00, 0x01, 0x10, 0xF9, + /* #1.62, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_09, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x28, 0x00, 0x01, 0x10, 0xF9, + /* #1.63, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_10, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x2C, 0x00, 0x01, 0x10, 0xF9, + /* #1.64, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_11, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x30, 0x00, 0x01, 0x10, 0xF9, + /* #1.65, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_12, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x34, 0x00, 0x01, 0x10, 0xF9, + /* #1.66, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_13, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x38, 0x00, 0x01, 0x10, 0xF9, + /* #1.67, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_14, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x3C, 0x00, 0x01, 0x10, 0xF9, + /* #1.68, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_15, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x40, 0x00, 0x01, 0x10, 0xF9, + /* #1.69, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_16, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x44, 0x00, 0x01, 0x10, 0xF9, + /* #1.70, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_17, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x48, 0x00, 0x01, 0x10, 0xF9, + /* #1.71, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_18, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x4C, 0x00, 0x01, 0x10, 0xF9, + /* #1.72, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_19, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x50, 0x00, 0x01, 0x10, 0xF9, + /* #1.73, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_20, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x54, 0x00, 0x01, 0x10, 0xF9, + /* #1.74, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_21, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x58, 0x00, 0x01, 0x10, 0xF9, + /* #1.75, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_22, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x5C, 0x00, 0x01, 0x10, 0xF9, + /* #1.76, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_23, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x60, 0x00, 0x01, 0x10, 0xF9, + /* #1.77, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_24, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x64, 0x00, 0x01, 0x10, 0xF9, + /* #1.78, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_25, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x68, 0x00, 0x01, 0x10, 0xF9, + /* #1.79, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_26, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x6C, 0x00, 0x01, 0x10, 0xF9, + /* #1.80, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_27, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x70, 0x00, 0x01, 0x10, 0xF9, + /* #1.81, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_28, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x74, 0x00, 0x01, 0x10, 0xF9, + /* #1.82, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_29, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x78, 0x00, 0x01, 0x10, 0xF9, + /* #1.83, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_30, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x7C, 0x00, 0x01, 0x10, 0xF9, + /* #1.84, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_31, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x80, 0x00, 0x01, 0x10, 0xF9, + /* #1.85, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_32, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x84, 0x00, 0x01, 0x10, 0xF9, + /* #1.86, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_33, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x88, 0x00, 0x01, 0x10, 0xF9, + /* #1.87, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_34, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x8C, 0x00, 0x01, 0x10, 0xF9, + /* #1.88, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_35, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x90, 0x00, 0x01, 0x10, 0xF9, + /* #1.89, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_36, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x94, 0x00, 0x01, 0x10, 0xF9, + /* #1.90, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_37, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x98, 0x00, 0x01, 0x10, 0xF9, + /* #1.91, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_38, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0x9C, 0x00, 0x01, 0x10, 0xF9, + /* #1.92, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_39, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0xA0, 0x00, 0x01, 0x10, 0xF9, + /* #1.93, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_40, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0xA4, 0x00, 0x01, 0x10, 0xF9, + /* #1.94, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_41, value: 0x110F9, size: 4 */ + 0x40, 0x1F, 0x82, 0xA8, 0x00, 0x01, 0x10, 0xF9, + /* #1.95, command: write_value, address: SEMC_MCR, value: 0x10000004, size: 4 */ + 0x40, 0x2F, 0x00, 0x00, 0x10, 0x00, 0x00, 0x04, + /* #1.96, command: write_value, address: SEMC_BMCR0, value: 0x30524, size: 4 */ + 0x40, 0x2F, 0x00, 0x08, 0x00, 0x03, 0x05, 0x24, + /* #1.97, command: write_value, address: SEMC_BMCR1, value: 0x6030524, size: 4 */ + 0x40, 0x2F, 0x00, 0x0C, 0x06, 0x03, 0x05, 0x24, + /* #1.98, command: write_value, address: SEMC_BR0, value: 0x8000001B, size: 4 */ + 0x40, 0x2F, 0x00, 0x10, 0x80, 0x00, 0x00, 0x1B, + /* #1.99, command: write_value, address: SEMC_BR1, value: 0x8200001B, size: 4 */ + 0x40, 0x2F, 0x00, 0x14, 0x82, 0x00, 0x00, 0x1B, + /* #1.100, command: write_value, address: SEMC_BR2, value: 0x8400001B, size: 4 */ + 0x40, 0x2F, 0x00, 0x18, 0x84, 0x00, 0x00, 0x1B, + /* #1.101, command: write_value, address: SEMC_BR3, value: 0x8600001B, size: 4 */ + 0x40, 0x2F, 0x00, 0x1C, 0x86, 0x00, 0x00, 0x1B, + /* #1.102, command: write_value, address: SEMC_BR4, value: 0x90000021, size: 4 */ + 0x40, 0x2F, 0x00, 0x20, 0x90, 0x00, 0x00, 0x21, + /* #1.103, command: write_value, address: SEMC_BR5, value: 0xA0000019, size: 4 */ + 0x40, 0x2F, 0x00, 0x24, 0xA0, 0x00, 0x00, 0x19, + /* #1.104, command: write_value, address: SEMC_BR6, value: 0xA8000017, size: 4 */ + 0x40, 0x2F, 0x00, 0x28, 0xA8, 0x00, 0x00, 0x17, + /* #1.105, command: write_value, address: SEMC_BR7, value: 0xA900001B, size: 4 */ + 0x40, 0x2F, 0x00, 0x2C, 0xA9, 0x00, 0x00, 0x1B, + /* #1.106, command: write_value, address: SEMC_BR8, value: 0x21, size: 4 */ + 0x40, 0x2F, 0x00, 0x30, 0x00, 0x00, 0x00, 0x21, + /* #1.107, command: write_value, address: SEMC_IOCR, value: 0x79A8, size: 4 */ + 0x40, 0x2F, 0x00, 0x04, 0x00, 0x00, 0x79, 0xA8, + /* #1.108, command: write_value, address: SEMC_SDRAMCR0, value: 0xF31, size: 4 */ + 0x40, 0x2F, 0x00, 0x40, 0x00, 0x00, 0x0F, 0x31, + /* #1.109, command: write_value, address: SEMC_SDRAMCR1, value: 0x652922, size: 4 */ + 0x40, 0x2F, 0x00, 0x44, 0x00, 0x65, 0x29, 0x22, + /* #1.110, command: write_value, address: SEMC_SDRAMCR2, value: 0x10920, size: 4 */ + 0x40, 0x2F, 0x00, 0x48, 0x00, 0x01, 0x09, 0x20, + /* #1.111, command: write_value, address: SEMC_SDRAMCR3, value: 0x50210A08, size: 4 */ + 0x40, 0x2F, 0x00, 0x4C, 0x50, 0x21, 0x0A, 0x08, + /* #1.112, command: write_value, address: SEMC_DBICR0, value: 0x21, size: 4 */ + 0x40, 0x2F, 0x00, 0x80, 0x00, 0x00, 0x00, 0x21, + /* #1.113, command: write_value, address: SEMC_DBICR1, value: 0x888888, size: 4 */ + 0x40, 0x2F, 0x00, 0x84, 0x00, 0x88, 0x88, 0x88, + /* #1.114, command: write_value, address: SEMC_IPCR1, value: 0x02, size: 4 */ + 0x40, 0x2F, 0x00, 0x94, 0x00, 0x00, 0x00, 0x02, + /* #1.115, command: write_value, address: SEMC_IPCR2, value: 0x00, size: 4 */ + 0x40, 0x2F, 0x00, 0x98, 0x00, 0x00, 0x00, 0x00, + /* #1.116, command: write_value, address: SEMC_IPCR0, value: 0x80000000, size: 4 */ + 0x40, 0x2F, 0x00, 0x90, 0x80, 0x00, 0x00, 0x00, + /* #1.117, command: write_value, address: SEMC_IPCMD, value: 0xA55A000F, size: 4 */ + 0x40, 0x2F, 0x00, 0x9C, 0xA5, 0x5A, 0x00, 0x0F, + /* #2, command: check_any_bit_set, address: SEMC_INTR, value: 0x01, size: 4 */ + 0xCF, 0x00, 0x0C, 0x1C, 0x40, 0x2F, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, + /* #3.1-2, command header bytes for merged 'Write - value' command */ + 0xCC, 0x00, 0x14, 0x04, + /* #3.1, command: write_value, address: SEMC_IPCR0, value: 0x80000000, size: 4 */ + 0x40, 0x2F, 0x00, 0x90, 0x80, 0x00, 0x00, 0x00, + /* #3.2, command: write_value, address: SEMC_IPCMD, value: 0xA55A000C, size: 4 */ + 0x40, 0x2F, 0x00, 0x9C, 0xA5, 0x5A, 0x00, 0x0C, + /* #4, command: check_any_bit_set, address: SEMC_INTR, value: 0x01, size: 4 */ + 0xCF, 0x00, 0x0C, 0x1C, 0x40, 0x2F, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, + /* #5.1-2, command header bytes for merged 'Write - value' command */ + 0xCC, 0x00, 0x14, 0x04, + /* #5.1, command: write_value, address: SEMC_IPCR0, value: 0x80000000, size: 4 */ + 0x40, 0x2F, 0x00, 0x90, 0x80, 0x00, 0x00, 0x00, + /* #5.2, command: write_value, address: SEMC_IPCMD, value: 0xA55A000C, size: 4 */ + 0x40, 0x2F, 0x00, 0x9C, 0xA5, 0x5A, 0x00, 0x0C, + /* #6, command: check_any_bit_set, address: SEMC_INTR, value: 0x01, size: 4 */ + 0xCF, 0x00, 0x0C, 0x1C, 0x40, 0x2F, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, + /* #7.1-3, command header bytes for merged 'Write - value' command */ + 0xCC, 0x00, 0x1C, 0x04, + /* #7.1, command: write_value, address: SEMC_IPTXDAT, value: 0x33, size: 4 */ + 0x40, 0x2F, 0x00, 0xA0, 0x00, 0x00, 0x00, 0x33, + /* #7.2, command: write_value, address: SEMC_IPCR0, value: 0x80000000, size: 4 */ + 0x40, 0x2F, 0x00, 0x90, 0x80, 0x00, 0x00, 0x00, + /* #7.3, command: write_value, address: SEMC_IPCMD, value: 0xA55A000A, size: 4 */ + 0x40, 0x2F, 0x00, 0x9C, 0xA5, 0x5A, 0x00, 0x0A, + /* #8, command: check_any_bit_set, address: SEMC_INTR, value: 0x01, size: 4 */ + 0xCF, 0x00, 0x0C, 0x1C, 0x40, 0x2F, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, + /* #9, command: write_value, address: SEMC_SDRAMCR3, value: 0x50210A09, size: 4 */ + 0xCC, 0x00, 0x0C, 0x04, 0x40, 0x2F, 0x00, 0x4C, 0x50, 0x21, 0x0A, 0x09 }; diff --git a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/xip/fsl_flexspi_nor_flash.c b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/xip/fsl_flexspi_nor_flash.c index c5cc52dbc..a69ad5ede 100644 --- a/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/xip/fsl_flexspi_nor_flash.c +++ b/Ubiquitous/XiZi_IIoT/board/xidatong-arm32/xip/fsl_flexspi_nor_flash.c @@ -46,43 +46,64 @@ #pragma location=".boot_hdr.conf" #endif -const flexspi_nor_config_t Qspiflash_config = +#if defined(HYPERFLASH_BOOT) +const flexspi_nor_config_t hyperflash_config = { .memConfig = { .tag = FLEXSPI_CFG_BLK_TAG, .version = FLEXSPI_CFG_BLK_VERSION, - .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackInternally, + .readSampleClkSrc = kFlexSPIReadSampleClk_ExternalInputFromDqsPad, .csHoldTime = 3u, .csSetupTime = 3u, - .deviceModeCfgEnable = true, - .deviceModeType = 1,//Quad Enable command - .deviceModeSeq.seqNum = 1, - .deviceModeSeq.seqId = 4, - .deviceModeArg = 0x000200,//Set QE - .deviceType = kFlexSpiDeviceType_SerialNOR, - .sflashPadType = kSerialFlash_4Pads, - .serialClkFreq = kFlexSpiSerialClk_60MHz,//80MHz for Winbond, 100MHz for GD, 133MHz for ISSI - .sflashA1Size = 16u * 1024u * 1024u,//4MBytes + .columnAddressWidth = 3u, + + .controllerMiscOption = (1u << kFlexSpiMiscOffset_DdrModeEnable) | + (1u << kFlexSpiMiscOffset_WordAddressableEnable) | + (1u << kFlexSpiMiscOffset_SafeConfigFreqEnable) | + (1u << kFlexSpiMiscOffset_DiffClkEnable), + .sflashPadType = kSerialFlash_8Pads, + .serialClkFreq = kFlexSpiSerialClk_133MHz, + .sflashA1Size = 64u * 1024u * 1024u, .dataValidTime = {16u, 16u}, .lookupTable = - { -// //Fast Read Sequence -// [0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x0B, RADDR_SDR, FLEXSPI_1PAD, 0x18), -// [1] = FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_1PAD, 0x08, READ_SDR, FLEXSPI_1PAD, 0x08), -// [2] = FLEXSPI_LUT_SEQ(JMP_ON_CS, 0, 0, 0, 0, 0), - //Quad Input/output read sequence - [0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18), - [1] = FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04), - [2] = FLEXSPI_LUT_SEQ(0, 0, 0, 0, 0, 0), - //Read Status - [1*4] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x04), - //Write Enable - [3*4] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06, STOP, 0, 0), - //Write status - [4*4] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x01, WRITE_SDR, FLEXSPI_1PAD, 0x2), - }, + { + + FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0xA0, RADDR_DDR, FLEXSPI_8PAD, 0x18), + FLEXSPI_LUT_SEQ(CADDR_DDR, FLEXSPI_8PAD, 0x10, DUMMY_DDR, FLEXSPI_8PAD, 0x06), + FLEXSPI_LUT_SEQ(READ_DDR, FLEXSPI_8PAD, 0x04, STOP, FLEXSPI_1PAD, 0x0), + }, }, - .pageSize = 256u, - .sectorSize = 4u * 1024u, + .pageSize = 512u, + .sectorSize = 256u * 1024u, + .blockSize = 256u * 1024u, + .isUniformBlockSize = true, }; + +#else +const flexspi_nor_config_t Qspiflash_config = +{ + .memConfig = + { + .tag = FLEXSPI_CFG_BLK_TAG, + .version = FLEXSPI_CFG_BLK_VERSION, + .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad, + .csHoldTime = 3u, + .csSetupTime = 3u, + .sflashPadType = kSerialFlash_4Pads, + .serialClkFreq = kFlexSpiSerialClk_100MHz, + .sflashA1Size = 8u * 1024u * 1024u, + .lookupTable = + { + // Read LUTs + FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18), + FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04), + }, + }, + .pageSize = 256u, + .sectorSize = 4u * 1024u, + .blockSize = 64u * 1024u, + .isUniformBlockSize = false, +}; + +#endif diff --git a/Ubiquitous/XiZi_IIoT/board/xidatong-riscv64/third_party_driver/touch/connect_touch.c b/Ubiquitous/XiZi_IIoT/board/xidatong-riscv64/third_party_driver/touch/connect_touch.c index 50000748b..091e9e341 100644 --- a/Ubiquitous/XiZi_IIoT/board/xidatong-riscv64/third_party_driver/touch/connect_touch.c +++ b/Ubiquitous/XiZi_IIoT/board/xidatong-riscv64/third_party_driver/touch/connect_touch.c @@ -205,7 +205,7 @@ static int32_t GtpGetInfo(void) // not used in polling mode static void GT9xx_PEN_IRQHandler(void* arg) { - KPrintf("int hdr working.\n"); + //KPrintf("int hdr working.\n"); if (!SemReleaseFlag) { KSemaphoreAbandon(touch_sem); diff --git a/Ubiquitous/XiZi_IIoT/kernel/include/user_api.h b/Ubiquitous/XiZi_IIoT/kernel/include/user_api.h index b804f06ac..29410198f 100644 --- a/Ubiquitous/XiZi_IIoT/kernel/include/user_api.h +++ b/Ubiquitous/XiZi_IIoT/kernel/include/user_api.h @@ -126,6 +126,14 @@ x_err_t UserMsgQueueRecv(int32_t mq, void *buffer, size_t size,int32_t wait_tim x_err_t UserMsgQueueReinit(int32_t mq); #endif +#ifdef KERNEL_SOFTTIMER +int32_t UserTimerCreate(const char *name, void (*timeout)(void *parameter), void *parameter, uint32_t time, uint8_t trigger_mode); +x_err_t UserTimerDelete(int32_t timer_id); +x_err_t UserTimerStartRun(int32_t timer_id); +x_err_t UserTimerQuitRun(int32_t timer_id); +x_err_t UserTimerModify(int32_t timer_id, uint32_t ticks); +#endif + int open(const char *path, int flags, ...); int read(int fd, void *buf, size_t len); int write(int fd, const void *buf, size_t len); @@ -239,6 +247,14 @@ uint8_t UserGetTaskPriority(int32_t id); #define UserMsgQueueReinit KMsgQueueReinit #endif +#ifdef KERNEL_SOFTTIMER +int32_t UserTimerCreate(const char *name, void (*timeout)(void *parameter), void *parameter, uint32_t time, uint8_t trigger_mode); +x_err_t UserTimerDelete(int32_t timer_id); +x_err_t UserTimerStartRun(int32_t timer_id); +x_err_t UserTimerQuitRun(int32_t timer_id); +x_err_t UserTimerModify(int32_t timer_id, uint32_t ticks); +#endif + #define UserPrintf KPrintf diff --git a/Ubiquitous/XiZi_IIoT/kernel/include/xs_service.h b/Ubiquitous/XiZi_IIoT/kernel/include/xs_service.h index d213f9f9f..493fb28f7 100644 --- a/Ubiquitous/XiZi_IIoT/kernel/include/xs_service.h +++ b/Ubiquitous/XiZi_IIoT/kernel/include/xs_service.h @@ -74,6 +74,12 @@ enum KernelServiceEnum KS_USER_MSGQUEUE_RECV, KS_USER_MSGQUEUE_REINIT, + KS_USER_TIMER_CREATE, + KS_USER_TIMER_DELETE, + KS_USER_TIMER_STARTRUN, + KS_USER_TIMER_QUITRUN, + KS_USER_TIMER_MODIFY, + KS_USER_OPEN, KS_USER_READ, KS_USER_WRITE, diff --git a/Ubiquitous/XiZi_IIoT/kernel/kernel_service/xs_service.c b/Ubiquitous/XiZi_IIoT/kernel/kernel_service/xs_service.c index d24a1ee34..d857f2cd5 100644 --- a/Ubiquitous/XiZi_IIoT/kernel/kernel_service/xs_service.c +++ b/Ubiquitous/XiZi_IIoT/kernel/kernel_service/xs_service.c @@ -27,6 +27,7 @@ #include #include #include +#include #ifdef FS_VFS #include @@ -401,6 +402,53 @@ uintptr_t KsMsgQueueReinit(uint32_t knum,uintptr_t *param, uint8_t num ) return (uintptr_t)ret; } #endif + +#ifdef KERNEL_SOFTTIMER +static int32 timer_sem; +static void KsTimerCallback(void *parameter) +{ + KSemaphoreAbandon(timer_sem); +} + +uintptr_t KsTimerCreate(uint32_t knum, uintptr_t *param, uint8_t num) +{ + int32 ret; + + timer_sem = *((int *)param[2]); + + ret = KCreateTimer((const char *)(param[0]), KsTimerCallback, (void *)(param[2]), (x_ticks_t)(param[3]), (uint8)(param[4])); + return (uintptr_t)ret; +} + +uintptr_t KsTimerDelete(uint32_t knum, uintptr_t *param, uint8_t num) +{ + x_err_t ret; + ret = KDeleteTimer((int32)(param[0])); + return (uintptr_t)ret; +} + +uintptr_t KsTimerStartRun(uint32_t knum, uintptr_t *param, uint8_t num) +{ + x_err_t ret; + ret = KTimerStartRun((int32)(param[0])); + return (uintptr_t)ret; +} + +uintptr_t KsTimerQuitRun(uint32_t knum, uintptr_t *param, uint8_t num) +{ + x_err_t ret; + ret = KTimerQuitRun((int32)(param[0])); + return (uintptr_t)ret; +} + +uintptr_t KsTimerModify(uint32_t knum, uintptr_t *param, uint8_t num) +{ + x_err_t ret; + ret = KTimerModify((int32)(param[0]), (x_ticks_t)(param[1])); + return (uintptr_t)ret; +} +#endif + /* fs posix*/ #ifdef FS_VFS @@ -566,87 +614,95 @@ uintptr_t KsStatfs(uint32_t knum,uintptr_t *param, uint8_t num ) struct KernelService g_service_table[256] __attribute__ ((section (".g_service_table"))) = { - [KS_USER_PRINT_INFO] = { KsPrintInfo, 1 }, + [KS_USER_PRINT_INFO] = { KsPrintInfo, 1 }, - /*************** Task ************/ - [KS_USER_TASK_CREATE] = { KsTaskCreate, 5 }, - [KS_USER_TASK_STARTUP] = { KsStartupTask, 1 }, - [KS_USER_TASK_DELETE] = { KsTaskDelete, 1 }, - [KS_USER_TASK_SEARCH] = { KsUserTaskSerach, 0 }, - [KS_USER_TASK_EXECEXIT] = { KsTaskQuit, 0 }, - [KS_USER_TASK_CORE_COMBINE] = { KsTaskCoreCombine, 2 }, - [KS_USER_TASK_CORE_UNCOMBINE] = { KsTaskCoreUnCombine, 1 }, - [KS_USER_TASK_DELAY] = { KsMdelayTask, 1 }, - [KS_USER_GET_TASK_NAME] = { KsGetTaskName, 2 }, - [KS_USER_GET_TASK_ID] = { KsGetTaskID, 0 }, - [KS_USER_GET_TASK_STAT] = { KsGetTaskStat, 1 }, - [KS_USER_GET_TASK_COMBINEED_CORE] = { KsGetTaskCombinedCore, 1 }, - [KS_USER_GET_TASK_RUNNING_CORE] = { KsGetTaskRunningCore, 1 }, - [KS_USER_GET_TASK_ERROR_STATUS] = { KsGetTaskErrorstatus, 1 }, - [KS_USER_GET_TASK_PRIORITY] = { KsGetTaskPriority, 1 }, + /*************** Task ************/ + [KS_USER_TASK_CREATE] = { KsTaskCreate, 5 }, + [KS_USER_TASK_STARTUP] = { KsStartupTask, 1 }, + [KS_USER_TASK_DELETE] = { KsTaskDelete, 1 }, + [KS_USER_TASK_SEARCH] = { KsUserTaskSerach, 0 }, + [KS_USER_TASK_EXECEXIT] = { KsTaskQuit, 0 }, + [KS_USER_TASK_CORE_COMBINE] = { KsTaskCoreCombine, 2 }, + [KS_USER_TASK_CORE_UNCOMBINE] = { KsTaskCoreUnCombine, 1 }, + [KS_USER_TASK_DELAY] = { KsMdelayTask, 1 }, + [KS_USER_GET_TASK_NAME] = { KsGetTaskName, 2 }, + [KS_USER_GET_TASK_ID] = { KsGetTaskID, 0 }, + [KS_USER_GET_TASK_STAT] = { KsGetTaskStat, 1 }, + [KS_USER_GET_TASK_COMBINEED_CORE] = { KsGetTaskCombinedCore, 1 }, + [KS_USER_GET_TASK_RUNNING_CORE] = { KsGetTaskRunningCore, 1 }, + [KS_USER_GET_TASK_ERROR_STATUS] = { KsGetTaskErrorstatus, 1 }, + [KS_USER_GET_TASK_PRIORITY] = { KsGetTaskPriority, 1 }, - /*************** Memory ************/ - [KS_USER_MALLOC] = { KsMalloc, 1 }, - [KS_USER_FREE] = { KsFree, 1 }, + /*************** Memory ************/ + [KS_USER_MALLOC] = { KsMalloc, 1 }, + [KS_USER_FREE] = { KsFree, 1 }, #ifdef KERNEL_MUTEX - /*************** Mutex ************/ - [KS_USER_MUTEX_CREATE] = { KsCreateMutex, 0 }, - [KS_USER_MUTEX_DELETE] = { KsDeleteMutex, 1 }, - [KS_USER_MUTEX_OBTAIN] = { KsMutexObtain, 2 }, - [KS_USER_MUTEX_ABANDON] = { KsMutexAbandon, 1 }, + /*************** Mutex ************/ + [KS_USER_MUTEX_CREATE] = { KsCreateMutex, 0 }, + [KS_USER_MUTEX_DELETE] = { KsDeleteMutex, 1 }, + [KS_USER_MUTEX_OBTAIN] = { KsMutexObtain, 2 }, + [KS_USER_MUTEX_ABANDON] = { KsMutexAbandon, 1 }, #endif #ifdef KERNEL_SEMAPHORE - /*************** Semaphore ************/ - [KS_USER_SEMAPHORE_CREATE] = { KsCreateSemaphore, 1 }, - [KS_USER_SEMAPHORE_DELETE] = { KsDeleteSemaphore, 1 }, - [KS_USER_SEMAPHORE_OBTAIN] = { KsSemaphoreObtain, 2 }, - [KS_USER_SEMAPHORE_ABANDON] = { KsSemaphoreAbandon, 1 }, - [KS_USER_SEMAPHORE_SETVALUE] = { KsSemaphoreSetValue, 2 }, + /*************** Semaphore ************/ + [KS_USER_SEMAPHORE_CREATE] = { KsCreateSemaphore, 1 }, + [KS_USER_SEMAPHORE_DELETE] = { KsDeleteSemaphore, 1 }, + [KS_USER_SEMAPHORE_OBTAIN] = { KsSemaphoreObtain, 2 }, + [KS_USER_SEMAPHORE_ABANDON] = { KsSemaphoreAbandon, 1 }, + [KS_USER_SEMAPHORE_SETVALUE] = { KsSemaphoreSetValue, 2 }, #endif - /*************** Event ************/ + /*************** Event ************/ #ifdef KERNEL_EVENT - [KS_USER_EVENT_CREATE] = { KsCreateEvent, 1 }, - [KS_USER_EVENT_DELETE] = { KsDeleteEvent, 1 }, - [KS_USER_EVENT_TRIGGER] = { KsEventTrigger, 2 }, - [KS_USER_EVENT_PROCESS] = { KsEventProcess, 5 }, + [KS_USER_EVENT_CREATE] = { KsCreateEvent, 1 }, + [KS_USER_EVENT_DELETE] = { KsDeleteEvent, 1 }, + [KS_USER_EVENT_TRIGGER] = { KsEventTrigger, 2 }, + [KS_USER_EVENT_PROCESS] = { KsEventProcess, 5 }, #endif #ifdef KERNEL_MESSAGEQUEUE - /*************** Msg queue ************/ - [KS_USER_MSGQUEUE_CREATE] = { KsCreateMsgQueue, 2 }, - [KS_USER_MSGQUEUE_DELETE] = { KsDeleteMsgQueue, 1 }, - [KS_USER_MSGQUEUE_SENDWAIT] = { KsMsgQueueSendwait, 4 }, - [KS_USER_MSGQUEUE_SEND] = { KsMsgQueueSend, 3 }, - [KS_USER_MSGQUEUE_URGENTSEND] = { KsMsgQueueUrgentSend, 3 }, - [KS_USER_MSGQUEUE_RECV] = { KsMsgQueueRecv, 4 }, - [KS_USER_MSGQUEUE_REINIT] = { KsMsgQueueReinit, 1 }, + /*************** Msg queue ************/ + [KS_USER_MSGQUEUE_CREATE] = { KsCreateMsgQueue, 2 }, + [KS_USER_MSGQUEUE_DELETE] = { KsDeleteMsgQueue, 1 }, + [KS_USER_MSGQUEUE_SENDWAIT] = { KsMsgQueueSendwait, 4 }, + [KS_USER_MSGQUEUE_SEND] = { KsMsgQueueSend, 3 }, + [KS_USER_MSGQUEUE_URGENTSEND] = { KsMsgQueueUrgentSend, 3 }, + [KS_USER_MSGQUEUE_RECV] = { KsMsgQueueRecv, 4 }, + [KS_USER_MSGQUEUE_REINIT] = { KsMsgQueueReinit, 1 }, +#endif +#ifdef KERNEL_SOFTTIMER + /*************** Soft Timer ************/ + [KS_USER_TIMER_CREATE] = { KsTimerCreate, 5 }, + [KS_USER_TIMER_DELETE] = { KsTimerDelete, 1 }, + [KS_USER_TIMER_STARTRUN] = { KsTimerStartRun, 1 }, + [KS_USER_TIMER_QUITRUN] = { KsTimerQuitRun, 1 }, + [KS_USER_TIMER_MODIFY] = { KsTimerModify, 2 }, #endif #ifdef FS_VFS - /*************** fs poxix ************/ - [KS_USER_OPEN] = { KsOpen , 3 }, - [KS_USER_READ] = { KsRead , 3 }, - [KS_USER_WRITE] = { KsWrite , 3 }, - [KS_USER_CLOSE] = { KsClose , 1 }, - [KS_USER_IOCTL] = { KsIoctl , 3 }, - [KS_USER_LSEEK] = { KsLseek , 3 }, - [KS_USER_RENAME] = { KsRename , 2 }, - [KS_USER_UNLINK] = { KsUnlink , 1 }, - [KS_USER_STAT] = { KsStat , 2 }, - [KS_USER_FS_STAT] = { KsFstat , 2 }, - [KS_USER_FS_SYNC] = { KsFsync , 1 }, - [KS_USER_FTRUNCATE] = { KsFtruncate , 2 }, - [KS_USER_MKDIR] = { KsMkdir , 2 }, - [KS_USER_OPENDIR] = { KsOpendir , 1 }, - [KS_USER_CLOSEDIR] = { KsClosedir , 1 }, - [KS_USER_READDIR] = { KsReaddir , 1 }, - [KS_USER_RMDIR] = { KsRmdir , 1 }, - [KS_USER_CHDIR] = { KsChdir , 1 }, - [KS_USER_GETCWD] = { KsGetcwd, 2 }, - [KS_USER_TELLDIR] = { KsTelldir, 1 }, - [KS_USER_SEEKDIR] = { KsSeekdir, 2 }, - [KS_USER_REWIND_DIR] = { KsRewinddir, 1 }, - [KS_USER_STAT_FS] = { KsStatfs, 2 }, + /*************** fs poxix ************/ + [KS_USER_OPEN] = { KsOpen , 3 }, + [KS_USER_READ] = { KsRead , 3 }, + [KS_USER_WRITE] = { KsWrite , 3 }, + [KS_USER_CLOSE] = { KsClose , 1 }, + [KS_USER_IOCTL] = { KsIoctl , 3 }, + [KS_USER_LSEEK] = { KsLseek , 3 }, + [KS_USER_RENAME] = { KsRename , 2 }, + [KS_USER_UNLINK] = { KsUnlink , 1 }, + [KS_USER_STAT] = { KsStat , 2 }, + [KS_USER_FS_STAT] = { KsFstat , 2 }, + [KS_USER_FS_SYNC] = { KsFsync , 1 }, + [KS_USER_FTRUNCATE] = { KsFtruncate , 2 }, + [KS_USER_MKDIR] = { KsMkdir , 2 }, + [KS_USER_OPENDIR] = { KsOpendir , 1 }, + [KS_USER_CLOSEDIR] = { KsClosedir , 1 }, + [KS_USER_READDIR] = { KsReaddir , 1 }, + [KS_USER_RMDIR] = { KsRmdir , 1 }, + [KS_USER_CHDIR] = { KsChdir , 1 }, + [KS_USER_GETCWD] = { KsGetcwd, 2 }, + [KS_USER_TELLDIR] = { KsTelldir, 1 }, + [KS_USER_SEEKDIR] = { KsSeekdir, 2 }, + [KS_USER_REWIND_DIR] = { KsRewinddir, 1 }, + [KS_USER_STAT_FS] = { KsStatfs, 2 }, #endif - [KS_USER_END ... 255] = {NONE, 0} + [KS_USER_END ... 255] = {NONE, 0} }; #else @@ -718,6 +774,53 @@ uint8_t UserGetTaskPriority(int32_t id) return (uintptr_t)task->task_dync_sched_member.cur_prio; } +#ifdef KERNEL_SOFTTIMER +static int32 timer_sem; +static void UserTimerCallback(void *parameter) +{ + KSemaphoreAbandon(timer_sem); +} + +int32 UserTimerCreate(const char *name, void (*timeout)(void *parameter), void *parameter, uint32_t time, uint8_t trigger_mode) +{ + int32 ret; + + timer_sem = *((int *)parameter); + + ret = KCreateTimer(name, UserTimerCallback, NONE, time, trigger_mode); + return ret; +} + +x_err_t UserTimerDelete(int32_t timer_id) +{ + x_err_t ret; + ret = KDeleteTimer(timer_id); + return ret; +} + +x_err_t UserTimerStartRun(int32_t timer_id) +{ + x_err_t ret; + ret = KTimerStartRun(timer_id); + return ret; +} + +x_err_t UserTimerQuitRun(int32_t timer_id) +{ + x_err_t ret; + ret = KTimerQuitRun(timer_id); + return ret; +} + +x_err_t UserTimerModify(int32_t timer_id, uint32_t ticks) +{ + x_err_t ret; + + ret = KTimerModify(timer_id, ticks); + return ret; +} +#endif + long occupy_g_service_table __attribute__ ((section (".g_service_table"))) = 0; #endif \ No newline at end of file diff --git a/Ubiquitous/XiZi_IIoT/kernel/thread/event.c b/Ubiquitous/XiZi_IIoT/kernel/thread/event.c index 4217b9676..4546cd644 100644 --- a/Ubiquitous/XiZi_IIoT/kernel/thread/event.c +++ b/Ubiquitous/XiZi_IIoT/kernel/thread/event.c @@ -288,7 +288,7 @@ int32 KEventTrigger(int32 id, uint32 events) * @param events events flag * @param options trigger way * @param msec timeout - * @processed event processed flag + * @param processed event processed flag * * @return EOK on success. */ diff --git a/Ubiquitous/XiZi_IIoT/kernel/thread/softtimer.c b/Ubiquitous/XiZi_IIoT/kernel/thread/softtimer.c index 244c49cf3..f08f3d1cb 100644 --- a/Ubiquitous/XiZi_IIoT/kernel/thread/softtimer.c +++ b/Ubiquitous/XiZi_IIoT/kernel/thread/softtimer.c @@ -147,7 +147,7 @@ static struct TimerDone Done = /** * This function will create a softtimer. * - * @param name the length of the msg queue. + * @param name the name of the timer. * @param timeout the callback of the timer. * @param parameter the parameter of the callback function * @param time the timeout time diff --git a/Ubiquitous/XiZi_IIoT/path_kernel.mk b/Ubiquitous/XiZi_IIoT/path_kernel.mk index 4614df672..6736938db 100755 --- a/Ubiquitous/XiZi_IIoT/path_kernel.mk +++ b/Ubiquitous/XiZi_IIoT/path_kernel.mk @@ -512,11 +512,29 @@ KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/control/plc_protoc KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/control/plc_protocol/s7 # endif - ifeq ($(CONFIG_LIB_USING_CJSON), y) KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/lib/cJSON endif +ifeq ($(CONFIG_LIB_USING_LORAWAN), y) +ifeq ($(CONFIG_LIB_USING_LORA_RADIO), y) +KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/lib/lorawan/lora_radio_driver/lora-radio/common # +KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/lib/lorawan/lora_radio_driver/lora-radio/include # +KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/lib/lorawan/lora_radio_driver/lora-radio/sx126x # +KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/lib/lorawan/lora_radio_driver/lora-radio/sx127x # +KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/lib/lorawan/lora_radio_driver/ports/lora-module/inc # +KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/lib/lorawan/lora_radio_driver/ports/samples/lora-radio-tester # +endif + +ifeq ($(CONFIG_LIB_USING_LORAWAN_ED_STACK), y) +KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/lib/lorawan/lorawan_devicenode/lorawan-ed-stack/Aps/Basic # +KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/lib/lorawan/lorawan_devicenode/lorawan-ed-stack/Common # +KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/lib/lorawan/lorawan_devicenode/lorawan-ed-stack/Mac # +KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/lib/lorawan/lorawan_devicenode/lorawan-ed-stack/Mac/Crypto # +KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/lib/lorawan/lorawan_devicenode/lorawan-ed-stack/Phy/region # +endif +endif + ifeq ($(CONFIG_CRYPTO), y) KERNELPATHS += -I$(KERNEL_ROOT)/framework/security/crypto/include # endif @@ -537,6 +555,11 @@ KERNELPATHS +=-I$(KERNEL_ROOT)/tool/shell/letter-shell \ -I$(KERNEL_ROOT)/tool/shell/letter-shell/file_ext # endif +ifeq ($(CONFIG_TOOL_USING_OTA), y) +KERNELPATHS +=-I$(KERNEL_ROOT)/tool/bootloader/flash \ + -I$(KERNEL_ROOT)/tool/bootloader/ota # +endif + ifeq ($(CONFIG_FS_LWEXT4),y) KERNELPATHS += -I$(KERNEL_ROOT)/fs/lwext4/lwext4_submodule/blockdev/xiuos # KERNELPATHS += -I$(KERNEL_ROOT)/fs/lwext4/lwext4_submodule/include # diff --git a/Ubiquitous/XiZi_IIoT/tool/Kconfig b/Ubiquitous/XiZi_IIoT/tool/Kconfig new file mode 100644 index 000000000..1989064ce --- /dev/null +++ b/Ubiquitous/XiZi_IIoT/tool/Kconfig @@ -0,0 +1,5 @@ +menu "Tool feature" + + source "$KERNEL_DIR/tool/bootloader/Kconfig" + +endmenu diff --git a/Ubiquitous/XiZi_IIoT/tool/Makefile b/Ubiquitous/XiZi_IIoT/tool/Makefile index 998131f71..cd148dd4f 100644 --- a/Ubiquitous/XiZi_IIoT/tool/Makefile +++ b/Ubiquitous/XiZi_IIoT/tool/Makefile @@ -4,4 +4,8 @@ ifeq ($(CONFIG_TOOL_SHELL),y) SRC_DIR += shell endif +ifeq ($(CONFIG_TOOL_USING_OTA),y) + SRC_DIR += bootloader +endif + include $(KERNEL_ROOT)/compiler.mk diff --git a/Ubiquitous/XiZi_IIoT/tool/bootloader/Kconfig b/Ubiquitous/XiZi_IIoT/tool/bootloader/Kconfig new file mode 100644 index 000000000..f5213d718 --- /dev/null +++ b/Ubiquitous/XiZi_IIoT/tool/bootloader/Kconfig @@ -0,0 +1,48 @@ +menu "OTA function" + + menuconfig TOOL_USING_OTA + bool "Enable support OTA function" + default n + + if TOOL_USING_OTA + choice + prompt "Compile bootloader bin or application bin." + default MCUBOOT_BOOTLOADER + + config MCUBOOT_BOOTLOADER + bool "Config as bootloader." + + config MCUBOOT_APPLICATION + bool "Config as application." + endchoice + + + menu "Flash area address and size configuration." + config CHIP_FLAH_BASE + hex "Flash base address of the chip." + default 0x60000000 + + config XIUOS_FLAH_ADDRESS + hex "Flash area address of the XiUOS system." + default 0x60100000 + + config BAKUP_FLAH_ADDRESS + hex "Flash area address of the backup firmware." + default 0x60300000 + + config DOWN_FLAH_ADDRESS + hex "Flash area address of the downloaded firmware." + default 0x60500000 + + config FLAG_FLAH_ADDRESS + hex "Flash area address of the OTA information." + default 0x60700000 + + config APP_FLASH_SIZE + hex "Application package size,the default size is limited to 1M." + default 0x00100000 + endmenu + + endif + +endmenu diff --git a/Ubiquitous/XiZi_IIoT/tool/bootloader/Makefile b/Ubiquitous/XiZi_IIoT/tool/bootloader/Makefile new file mode 100644 index 000000000..3e0f3289d --- /dev/null +++ b/Ubiquitous/XiZi_IIoT/tool/bootloader/Makefile @@ -0,0 +1,4 @@ +SRC_DIR := +SRC_DIR += flash ota + +include $(KERNEL_ROOT)/compiler.mk \ No newline at end of file diff --git a/Ubiquitous/XiZi_IIoT/tool/bootloader/flash/Kconfig b/Ubiquitous/XiZi_IIoT/tool/bootloader/flash/Kconfig new file mode 100644 index 000000000..e69de29bb diff --git a/Ubiquitous/XiZi_IIoT/tool/bootloader/flash/Makefile b/Ubiquitous/XiZi_IIoT/tool/bootloader/flash/Makefile new file mode 100644 index 000000000..123d7c8b0 --- /dev/null +++ b/Ubiquitous/XiZi_IIoT/tool/bootloader/flash/Makefile @@ -0,0 +1,3 @@ +SRC_FILES := flash_ops.c + +include $(KERNEL_ROOT)/compiler.mk \ No newline at end of file diff --git a/Ubiquitous/XiZi_IIoT/tool/bootloader/flash/flash_ops.c b/Ubiquitous/XiZi_IIoT/tool/bootloader/flash/flash_ops.c new file mode 100644 index 000000000..e69de29bb diff --git a/Ubiquitous/XiZi_IIoT/tool/bootloader/flash/flash_ops.h b/Ubiquitous/XiZi_IIoT/tool/bootloader/flash/flash_ops.h new file mode 100644 index 000000000..b0ff530f0 --- /dev/null +++ b/Ubiquitous/XiZi_IIoT/tool/bootloader/flash/flash_ops.h @@ -0,0 +1,47 @@ +/* + * Copyright 2018-2020 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/** +* @file flash_ops.h +* @brief support flash function +* @version 2.0 +* @author AIIT XUOS Lab +* @date 2023-04-03 +*/ +#ifndef __FLASH_OPS_H__ +#define __FLASH_OPS_H__ + + +#include + +typedef struct +{ + /* board init function*/ + void (*board_init)(void); + void (*serial_init)(void); + void (*print_string)(uint8_t *s); + + /* flash Driver operation */ + void (*flash_init)(void); + void (*flash_deinit)(void); + + /* flash operation */ + status_t (*op_flash_erase)(uint32_t start_addr, uint32_t byte_cnt); + status_t (*op_flash_write)(uint32_t start_addr, uint8_t *buf, uint32_t byte_cnt); + status_t (*op_flash_read)(uint32_t addr, uint8_t *buf, uint32_t len); + status_t (*op_flash_copy)(uint32_t srcAddr,uint32_t dstAddr, uint32_t imageSize); + + /* Burn the initialization version */ + int32_t (*download_by_serial)(const uint32_t addr); + + /* system operation */ + void(*op_reset)(void); + void(*op_jump)(void); + void(*op_delay)(uint32_t ms); +}mcuboot_t; + +#endif \ No newline at end of file diff --git a/Ubiquitous/XiZi_IIoT/tool/bootloader/ota/Kconfig b/Ubiquitous/XiZi_IIoT/tool/bootloader/ota/Kconfig new file mode 100644 index 000000000..e69de29bb diff --git a/Ubiquitous/XiZi_IIoT/tool/bootloader/ota/Makefile b/Ubiquitous/XiZi_IIoT/tool/bootloader/ota/Makefile new file mode 100644 index 000000000..47afc2d36 --- /dev/null +++ b/Ubiquitous/XiZi_IIoT/tool/bootloader/ota/Makefile @@ -0,0 +1,3 @@ +SRC_FILES := ota.c + +include $(KERNEL_ROOT)/compiler.mk \ No newline at end of file diff --git a/Ubiquitous/XiZi_IIoT/tool/bootloader/ota/ota.c b/Ubiquitous/XiZi_IIoT/tool/bootloader/ota/ota.c new file mode 100644 index 000000000..4e0416e19 --- /dev/null +++ b/Ubiquitous/XiZi_IIoT/tool/bootloader/ota/ota.c @@ -0,0 +1,441 @@ +/* + * Copyright 2018-2020 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/** +* @file ota.c +* @brief file ota.c +* @version 2.0 +* @author AIIT XUOS Lab +* @date 2023-04-03 +*/ +#include "shell.h" +#include "xsconfig.h" +#include "mcuboot.h" +#include "ymodem.h" +#include "ota.h" + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ +static uint32_t calculate_crc32(uint32_t addr, uint32_t len); +static void UpdateApplication(void); +static void InitialVersion(void); +static void BackupVersion(void); +static void BootLoaderJumpApp(void); +static status_t UpdateOTAFlag(ota_info_t *ptr); + +#ifdef MCUBOOT_APPLICATION +static void app_ota(void); +#endif + + +/**************************************************************************** + * Private Data + ****************************************************************************/ +static const mcuboot_t mcuboot = +{ + mcuboot_bord_init, + UartConfig, + Serial_PutString, + FLASH_Init, + FLASH_DeInit, + flash_erase, + flash_write, + flash_read, + flash_copy, + SerialDownload, + mcuboot_reset, + mcuboot_jump, + mcuboot_delay +}; + +static const uint32_t crc32tab[] = { + 0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, 0x076dc419, 0x706af48f, 0xe963a535, 0x9e6495a3, + 0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988, 0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91, + 0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de, 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7, + 0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, 0x14015c4f, 0x63066cd9, 0xfa0f3d63, 0x8d080df5, + 0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172, 0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b, + 0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940, 0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59, + 0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116, 0x21b4f4b5, 0x56b3c423, 0xcfba9599, 0xb8bda50f, + 0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924, 0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d, + 0x76dc4190, 0x01db7106, 0x98d220bc, 0xefd5102a, 0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433, + 0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818, 0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01, + 0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e, 0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457, + 0x65b0d9c6, 0x12b7e950, 0x8bbeb8ea, 0xfcb9887c, 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65, + 0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2, 0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb, + 0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0, 0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9, + 0x5005713c, 0x270241aa, 0xbe0b1010, 0xc90c2086, 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f, + 0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, 0x59b33d17, 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad, + 0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a, 0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683, + 0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8, 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1, + 0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe, 0xf762575d, 0x806567cb, 0x196c3671, 0x6e6b06e7, + 0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc, 0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5, + 0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252, 0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b, + 0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60, 0xdf60efc3, 0xa867df55, 0x316e8eef, 0x4669be79, + 0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236, 0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f, + 0xc5ba3bbe, 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04, 0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d, + 0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a, 0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713, + 0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38, 0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21, + 0x86d3d2d4, 0xf1d4e242, 0x68ddb3f8, 0x1fda836e, 0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777, + 0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c, 0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45, + 0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2, 0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db, + 0xaed16a4a, 0xd9d65adc, 0x40df0b66, 0x37d83bf0, 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9, + 0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, 0xbad03605, 0xcdd70693, 0x54de5729, 0x23d967bf, + 0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94, 0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d +}; + + +/******************************************************************************* +* 函 数 名: calculate_crc32 +* 功能描述: 计算给定Flash内存地址范围中数据的CRC32校验和 +* 形 参: addr:表示Flash地址的起始位置 + len:表示需要计算CRC32的数据长度 +* 返 回 值: 计算得到的CRC32值 +*******************************************************************************/ +static uint32_t calculate_crc32(uint32_t addr, uint32_t len) +{ + uint32_t crc = 0xFFFFFFFF; + uint8_t byte = 0xFF; + + for(uint32_t i = 0; i < len; i++) + { + byte = *((volatile uint8_t *)(addr + i)); + crc = crc32tab[(crc ^ byte) & 0xff] ^ (crc >> 8); + } + return crc^0xFFFFFFFF; +} + + +/******************************************************************************* +* 函 数 名: UpdateApplication +* 功能描述: 在bootloader里进行调用,根据Flash中Flag分区中的信息决定是否进行版本更新 +* 形 参: 无 +* 返 回 值: 无 +* 注 释: 该函数调用后无论结果如何都将跳转到app分区 +*******************************************************************************/ +static void UpdateApplication(void) +{ + status_t status; + ota_info_t ota_info; // 定义OTA信息结构体 + + // 从Flash中读取OTA信息 + mcuboot.op_flash_read(FLAG_FLAH_ADDRESS, (void*)&ota_info, sizeof(ota_info_t)); + + // 如果OTA升级状态为准备状态,且APP分区与download分区版本不同,才可以进行升级 + if((ota_info.status == OTA_STATUS_READY) && (ota_info.os.crc32 != ota_info.down.crc32)) + { + mcuboot.print_string("\r\n------Start to update the app!------\r\n"); + // 校验downlad分区固件CRC + if(calculate_crc32(DOWN_FLAH_ADDRESS, ota_info.down.size) == ota_info.down.crc32) + { + ota_info.status = OTA_STATUS_UPDATING; + UpdateOTAFlag(&ota_info); + + // 1.如果CRC校验通过,开始升级,逐字节拷贝Flash,先备份当前XiUOS System分区内容 + status = mcuboot.op_flash_copy(XIUOS_FLAH_ADDRESS, BAKUP_FLAH_ADDRESS, ota_info.os.size); + if((status == kStatus_Success) &&(calculate_crc32(BAKUP_FLAH_ADDRESS, ota_info.os.size) == ota_info.os.crc32)) + { + mcuboot.print_string("\r\n------Backup app success!------\r\n"); + ota_info.bak.size = ota_info.os.size; + ota_info.bak.crc32 = ota_info.os.crc32; + ota_info.bak.version = ota_info.os.version; + strncpy(ota_info.bak.description, ota_info.os.description, sizeof(ota_info.os.description)); + UpdateOTAFlag(&ota_info);; + } + else + { + mcuboot.print_string("\r\n------Backup app failed!------\r\n"); + ota_info.status = OTA_STATUS_ERROR; + strncpy(ota_info.error_message, "Backup app failed!",sizeof(ota_info.error_message)); + UpdateOTAFlag(&ota_info);; + goto finish; + } + + // 2.拷贝download分区到XiUOS System分区 + status = mcuboot.op_flash_copy(DOWN_FLAH_ADDRESS, XIUOS_FLAH_ADDRESS, ota_info.down.size); + if((status == kStatus_Success) &&(calculate_crc32(XIUOS_FLAH_ADDRESS, ota_info.down.size) == ota_info.down.crc32)) + { + mcuboot.print_string("\r\n------The download partition is copied successfully!------\r\n"); + + ota_info.os.size = ota_info.down.size; + ota_info.os.crc32 = ota_info.down.crc32; + ota_info.os.version = ota_info.down.version; + strncpy(ota_info.os.description, ota_info.down.description, sizeof(ota_info.down.description)); + ota_info.status == OTA_STATUS_IDLE; // 拷贝download分区到XiUOS System分区成功,将OTA升级状态设置为IDLE + UpdateOTAFlag(&ota_info);; + } + else + { + mcuboot.print_string("\r\n------The download partition copy failed!------\r\n"); + ota_info.status = OTA_STATUS_ERROR; + strncpy(ota_info.error_message, "The download partition copy failed!",sizeof(ota_info.error_message)); + UpdateOTAFlag(&ota_info);; + goto finish; + } + + mcuboot.print_string("\r\n------Update completed!------\r\n"); + goto finish; + } + else + { + // 如果download分区CRC校验失败,升级失败 + mcuboot.print_string("\r\n------Download Firmware CRC check failed!------\r\n"); + ota_info.status = OTA_STATUS_ERROR; + strncpy(ota_info.error_message, "Download Firmware CRC check failed!",sizeof(ota_info.error_message)); + UpdateOTAFlag(&ota_info);; + goto finish; + } + } + else + { + mcuboot.print_string("\r\n------No need to update the app!------\r\n"); + goto finish; + } +finish: + return; +} + + +/******************************************************************************* +* 函 数 名: InitialVersion +* 功能描述: 该函数可以烧写APP分区的初始化版本,初始化版本的版本号为0x1 +* 形 参: 无 +* 返 回 值: 无 +*******************************************************************************/ +static void InitialVersion(void) +{ + int32_t size; + ota_info_t ota_info; + + memset(&ota_info, 0, sizeof(ota_info_t)); + size = mcuboot.download_by_serial(XIUOS_FLAH_ADDRESS); + if(size > 0) + { + ota_info.os.size = size; + ota_info.os.crc32 = calculate_crc32(XIUOS_FLAH_ADDRESS, size); + ota_info.os.version = 0x1; + strncpy(ota_info.os.description, "This is the initial firmware for the device!", sizeof(ota_info.os.description)); + UpdateOTAFlag(&ota_info); + } +} + +/******************************************************************************* +* 函 数 名: BackupVersion +* 功能描述: 版本回退函数,如果升级的APP存在bug导致无法跳转需调用此函数进行版本回退 +* 形 参: 无 +* 返 回 值: 无 +*******************************************************************************/ +static void BackupVersion(void) +{ + status_t status; + ota_info_t ota_info; + mcuboot.op_flash_read(FLAG_FLAH_ADDRESS, (void*)&ota_info, sizeof(ota_info_t)); + + ota_info.status = OTA_STATUS_BACKUP; + UpdateOTAFlag(&ota_info); + status = mcuboot.op_flash_copy(BAKUP_FLAH_ADDRESS, XIUOS_FLAH_ADDRESS, ota_info.bak.size); + if((status == kStatus_Success) &&(calculate_crc32(XIUOS_FLAH_ADDRESS, ota_info.bak.size) == ota_info.bak.crc32)) + { + mcuboot.print_string("\r\n------Backup app version success!------\r\n"); + ota_info.os.size = ota_info.bak.size; + ota_info.os.crc32 = ota_info.bak.crc32; + ota_info.os.version = ota_info.bak.version; + strncpy(ota_info.os.description, ota_info.bak.description, sizeof(ota_info.bak.description)); + UpdateOTAFlag(&ota_info); + } + else + { + mcuboot.print_string("\r\n------Backup app version failed!------\r\n"); + ota_info.status = OTA_STATUS_ERROR; + strncpy(ota_info.error_message, "Backup app version failed!",sizeof(ota_info.error_message)); + UpdateOTAFlag(&ota_info); + } +} + + +/******************************************************************************* +* 函 数 名: BootLoaderJumpApp +* 功能描述: 上次跳转若是失败的,先从BAKUP分区进行恢复,然后再进行跳转 +* 形 参: 无 +* 返 回 值: 无 +*******************************************************************************/ +static void BootLoaderJumpApp(void) +{ + ota_info_t ota_info; + mcuboot.flash_init(); + mcuboot.op_flash_read(FLAG_FLAH_ADDRESS, (void*)&ota_info, sizeof(ota_info_t)); + + if(ota_info.lastjumpflag == JUMP_FAILED_FLAG) + { + mcuboot.print_string("\r\n------Bootloader false, begin backup!------\r\n"); + BackupVersion(); + } + else + { + ota_info.lastjumpflag = JUMP_FAILED_FLAG; + UpdateOTAFlag(&ota_info); + } + mcuboot.flash_deinit(); + mcuboot.op_jump(); +} + + +/******************************************************************************* +* 函 数 名: UpdateOTAFlag +* 功能描述: 更新OTA Flag区域的信息,版本完成下载后在app里进行调用 +* 形 参: ptr:ota_info_t结构体指针,描述OTA升级相关信息 +* 返 回 值: 如果函数执行成功,状态值为 kStatus_Success,否则状态值为其他错误码 +*******************************************************************************/ +static status_t UpdateOTAFlag(ota_info_t *ptr) +{ + status_t status; + + status = mcuboot.op_flash_erase(FLAG_FLAH_ADDRESS,sizeof(ota_info_t)); + if(status != kStatus_Success) + { + return status; + } + status = mcuboot.op_flash_write(FLAG_FLAH_ADDRESS,(void *)ptr,sizeof(ota_info_t)); + + return status; +} + + +/******************************************************************************* +* 函 数 名: app_ota +* 功能描述: 在app中通过命令来进行ota升级,该函数与升级的命令关联 +* 形 参: 无 +* 返 回 值: 无 +*******************************************************************************/ +static void app_ota(void) +{ + int32_t size; + ota_info_t ota_info; + + mcuboot.flash_init(); + mcuboot.serial_init(); + + mcuboot.op_flash_read(FLAG_FLAH_ADDRESS, (void*)&ota_info, sizeof(ota_info_t)); + ota_info.status = OTA_STATUS_DOWNLOADING; + UpdateOTAFlag(&ota_info); + size = mcuboot.download_by_serial(DOWN_FLAH_ADDRESS); + ota_info.status = OTA_STATUS_DOWNLOADED; + UpdateOTAFlag(&ota_info); + if(size > 0) + { + ota_info.down.size = size; + ota_info.down.crc32= calculate_crc32(DOWN_FLAH_ADDRESS, size); + ota_info.down.version = ota_info.os.version + 1; + strncpy(ota_info.down.description, "OTA Test!",sizeof(ota_info.down.description)); + ota_info.status = OTA_STATUS_READY; + strncpy(ota_info.error_message, "No error message!",sizeof(ota_info.error_message)); + UpdateOTAFlag(&ota_info); + } + else + { + ota_info.status = OTA_STATUS_ERROR; + strncpy(ota_info.error_message, "Failed to download firmware to download partition!",sizeof(ota_info.error_message)); + UpdateOTAFlag(&ota_info); + } + mcuboot.flash_deinit(); + mcuboot.op_reset(); +} +SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_FUNC)|SHELL_CMD_PARAM_NUM(0),ota, app_ota, ota function); + + +/******************************************************************************* +* 函 数 名: app_clear_jumpflag +* 功能描述: 跳转app成功后,在app中调用将lastjumpflag重置为0XCDCDCDCD +* 形 参: 无 +* 返 回 值: 无 +*******************************************************************************/ +void app_clear_jumpflag(void) +{ + mcuboot.flash_init(); + //跳转成功设置lastjumpflag为JUMP_SUCCESS_FLAG + ota_info_t ota_info; + mcuboot.op_flash_read(FLAG_FLAH_ADDRESS, (void*)&ota_info, sizeof(ota_info_t)); + ota_info.lastjumpflag = JUMP_SUCCESS_FLAG; + UpdateOTAFlag(&ota_info); + mcuboot.flash_deinit(); +} + + +/******************************************************************************* +* 函 数 名: ota_entry +* 功能描述: bootloader的入口函数 +* 形 参: 无 +* 返 回 值: 无 +*******************************************************************************/ +void ota_entry(void) +{ + uint8_t ch1, ch2; + uint32_t ret; + ota_info_t ota_info; + uint32_t timeout = 1000; + + mcuboot.board_init(); + + mcuboot.print_string("Please press 'space' key into menu in 10s !!!\r\n"); + + while(timeout) + { + ret = (SerialKeyPressed((uint8_t*)&ch1)); + if(ret) break; + timeout--; + mcuboot.op_delay(10); + } + + while(1) + { + + if((ret)&&(ch1 == 0x20)) + { + mcuboot.print_string("\r\nPlease slecet:"); + + mcuboot.print_string("\r\n 1:run app"); + mcuboot.print_string("\r\n 2:update app"); + mcuboot.print_string("\r\n 3:reboot \r\n"); + + + ch2 = GetKey(); + switch(ch2) + { + case 0x31: + BootLoaderJumpApp(); + break; + + case 0x32: + mcuboot.flash_init(); + mcuboot.op_flash_read(FLAG_FLAH_ADDRESS, (void*)&ota_info, sizeof(ota_info_t)); + /* 此时APP分区还没有有效的固件,需要在bootloader下通过iap烧写出厂固件 */ + if((ota_info.os.size > APP_FLASH_SIZE) || (calculate_crc32(XIUOS_FLAH_ADDRESS, ota_info.os.size) != ota_info.os.crc32)) + { + mcuboot.print_string("\r\nNeed to flash initial firmware!\r\n"); + InitialVersion(); + } + else + { + UpdateApplication(); + } + + mcuboot.flash_deinit(); + BootLoaderJumpApp(); + break; + + case 0x33: + mcuboot.op_reset(); + default: + break; + } + } + else + { + BootLoaderJumpApp(); + } + } +} diff --git a/Ubiquitous/XiZi_IIoT/tool/bootloader/ota/ota.h b/Ubiquitous/XiZi_IIoT/tool/bootloader/ota/ota.h new file mode 100644 index 000000000..1eab71bdb --- /dev/null +++ b/Ubiquitous/XiZi_IIoT/tool/bootloader/ota/ota.h @@ -0,0 +1,57 @@ +/* + * Copyright 2018-2020 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/** +* @file ota.h +* @brief file ota.h +* @version 2.0 +* @author AIIT XUOS Lab +* @date 2023-04-03 +*/ +#ifndef __OTA_DEF_H__ +#define __OTA_DEF_H__ + +#include "flash_ops.h" + +#define JUMP_FAILED_FLAG 0XABABABAB +#define JUMP_SUCCESS_FLAG 0XCDCDCDCD + +typedef enum { + OTA_STATUS_IDLE = 0, // 空闲状态,没有进行OTA升级 + OTA_STATUS_READY, // 准备状态,可以进行OTA升级 + OTA_STATUS_DOWNLOADING, // 正在下载固件 + OTA_STATUS_DOWNLOADED, // 固件下载完成 + OTA_STATUS_UPDATING, // 正在进行OTA升级 + OTA_STATUS_BACKUP, // 正在版本回退 + OTA_STATUS_ERROR, // 出现错误,升级失败 +} ota_status_t; + + +/* Flash分区中保存固件的属性描述 */ +typedef struct { + uint32_t size; // 应用程序大小,记录分区固件的大小 + uint32_t crc32; // 应用程序CRC32校验值,记录分区固件的crc32值 + uint32_t version; // 应用程序版本号,记录分区固件的版本号 + uint32_t reserve; // 保留字段 + uint8_t description[128]; // 固件的描述信息,最多128个字符 +} firmware_t; + + +/* OTA升级过程中的信息结构体 */ +typedef struct { + firmware_t os; // XiUOS System分区属性信息 + firmware_t bak; // Bakup分区属性信息 + firmware_t down; // Download分区属性信息 + uint32_t status; // 升级状态,取值来自于ota_status_t类型 + uint32_t lastjumpflag; // bootloaer跳转失败的标志,bootloader里置0xABABABAB,跳转成功后在应用里置0xCDCDCDCD + uint32_t reserve[2]; // 保留字段 + uint8_t error_message[128]; // 错误信息,最多128个字符 +} ota_info_t; + +void app_clear_jumpflag(void); +void ota_entry(void); +#endif