forked from xuos/xiuos
Add the cortex-m0 support for XiUOS & Fix bugs on M3 and serial device from ysm
it is Perfect
This commit is contained in:
xuedongliang
commit
3397a5245b
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@ -5,7 +5,7 @@ MAKEFLAGS += --no-print-directory
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.PHONY:COMPILE_APP COMPILE_KERNEL
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support :=kd233 stm32f407-st-discovery maix-go stm32f407zgt6 aiit-riscv64-board aiit-arm32-board hifive1-rev-B hifive1-emulator k210-emulator cortex-m3-emulator cortex-m4-emulator ok1052-c gapuino stm32f103-nano gd32vf103_rvstar
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support :=kd233 stm32f407-st-discovery maix-go stm32f407zgt6 aiit-riscv64-board aiit-arm32-board hifive1-rev-B hifive1-emulator k210-emulator cortex-m3-emulator cortex-m4-emulator ok1052-c gapuino stm32f103-nano gd32vf103_rvstar cortex-m0-emulator
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SRC_DIR:=
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export BOARD ?=kd233
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@ -1,24 +1,29 @@
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#公共部分
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SRC_DIR := shared
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# The following three platforms support compatiable instructions.
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ifeq ($(CONFIG_BOARD_CORTEX_M3_EVB),y)
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SRC_DIR +=cortex-m3
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SRC_DIR := shared
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SRC_DIR += cortex-m3
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endif
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ifeq ($(CONFIG_BOARD_STM32F103_NANO),y)
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SRC_DIR := shared
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SRC_DIR +=cortex-m3
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endif
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ifeq ($(CONFIG_BOARD_STM32F407_EVB),y)
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SRC_DIR +=cortex-m4
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endif
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ifeq ($(CONFIG_BOARD_CORTEX_M4_EVB),y)
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SRC_DIR +=cortex-m4
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SRC_DIR := shared
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SRC_DIR += cortex-m4
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endif
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ifeq ($(CONFIG_BOARD_CORTEX_M7_EVB),y)
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SRC_DIR +=cortex-m7
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SRC_DIR := shared
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SRC_DIR += cortex-m7
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endif
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# cortex-m0 is ARMv6-m
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ifeq ($(CONFIG_BOARD_CORTEX_M0_EVB),y)
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SRC_DIR += cortex-m0
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endif
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include $(KERNEL_ROOT)/compiler.mk
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@ -0,0 +1,3 @@
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SRC_FILES := boot.c interrupt.c interrupt_vector.S pendsv.S prepare_ahwstack.c arm32_switch.c
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include $(KERNEL_ROOT)/compiler.mk
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@ -0,0 +1,28 @@
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/*
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* Copyright (c) 2020 AIIT XUOS Lab
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* XiUOS is licensed under Mulan PSL v2.
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* You can use this software according to the terms and conditions of the Mulan PSL v2.
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* You may obtain a copy of Mulan PSL v2 at:
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* http://license.coscl.org.cn/MulanPSL2
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* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
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* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
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* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
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* See the Mulan PSL v2 for more details.
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*/
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#ifndef ARCH_INTERRUPT_H__
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#define ARCH_INTERRUPT_H__
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#include <xs_base.h>
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#define ARCH_MAX_IRQ_NUM (48)
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#define ARCH_IRQ_NUM_OFFSET 0
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#define SYSTICK_IRQN 15
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#define UART1_IRQn 18
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int32 ArchEnableHwIrq(uint32 irq_num);
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int32 ArchDisableHwIrq(uint32 irq_num);
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#endif
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@ -0,0 +1,241 @@
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/*
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* Copyright (c) 2020 AIIT XUOS Lab
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* XiUOS is licensed under Mulan PSL v2.
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* You can use this software according to the terms and conditions of the Mulan PSL v2.
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* You may obtain a copy of Mulan PSL v2 at:
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* http://license.coscl.org.cn/MulanPSL2
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* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
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* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
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* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
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* See the Mulan PSL v2 for more details.
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*/
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#include <xs_base.h>
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#include <xs_ktask.h>
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#define SCB_VTOR "0xE000ED08"
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#define NVIC_INT_CTRL "0xE000ED04"
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#define NVIC_SYSPRI2 "0xE000ED20"
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#define NVIC_PENDSV_PRI "0x00FF0000"
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#define NVIC_PENDSVSET "0x10000000"
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/* We replaced instructions that were not supported in thumb mode. */
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void __attribute__((naked)) HwInterruptcontextSwitch(x_ubase from, x_ubase to, struct TaskDescriptor *to_task, void *context)
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{
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asm volatile ("PUSH {R4}");
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asm volatile ("PUSH {R5}");
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asm volatile ("LDR r4, =KtaskSwitchInterruptFlag");
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asm volatile ("LDR r5, [r4]");
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asm volatile ("CMP r5, #1");
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asm volatile ("POP {R5}");
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asm volatile ("POP {R4}");
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asm volatile ("BEQ Arm32SwitchReswitch");
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asm volatile ("PUSH {R4}");
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asm volatile ("PUSH {R5}");
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asm volatile ("LDR r4, =KtaskSwitchInterruptFlag");
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asm volatile ("MOV r5, #1");
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asm volatile ("STR r5, [r4]");
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asm volatile ("LDR r4, =InterruptFromKtask");
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asm volatile ("STR r0, [r4]");
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asm volatile ("POP {R5}");
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asm volatile ("POP {R4}");
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asm volatile ("B Arm32SwitchReswitch");
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}
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void __attribute__((naked)) Arm32SwitchReswitch()
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{
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asm volatile ("PUSH {R4}");
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asm volatile ("LDR r4, =InterruptToKtask");
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asm volatile ("STR r1, [r4]");
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asm volatile ("LDR r4, =InterruptToKtaskDescriptor");
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asm volatile ("STR r2, [r4]");
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asm volatile ("LDR r0, =" NVIC_INT_CTRL);
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asm volatile ("LDR r1, =" NVIC_PENDSVSET);
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asm volatile ("STR r1, [r0]");
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asm volatile ("POP {R4}");
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asm volatile ("BX LR");
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}
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void __attribute__((naked)) SwitchKtaskContext(x_ubase from, x_ubase to, struct TaskDescriptor *to_task)
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{
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asm volatile("B HwInterruptcontextSwitch");
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}
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void SwitchKtaskContextTo(x_ubase to, struct TaskDescriptor *to_task)
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{
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asm volatile ("LDR r2, =InterruptToKtask");
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asm volatile ("STR r0, [r2]");
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asm volatile ("LDR r2, =InterruptToKtaskDescriptor");
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asm volatile ("STR r1, [r2]");
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#if defined (__VFP_FP__) && !defined(__SOFTFP__)
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asm volatile ("MRS r2, CONTROL");
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asm volatile ("BIC r2, #0x04");
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asm volatile ("MSR CONTROL, r2");
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#endif
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asm volatile ("LDR r1, =InterruptFromKtask");
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asm volatile ("MOV r0, #0x0");
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asm volatile ("STR r0, [r1]");
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asm volatile ("LDR r1, =KtaskSwitchInterruptFlag");
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asm volatile ("MOV r0, #1");
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asm volatile ("STR r0, [r1]");
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asm volatile ("LDR r0, =" NVIC_SYSPRI2);
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asm volatile ("LDR r1, =" NVIC_PENDSV_PRI);
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// asm volatile ("LDR.W r2, [r0,#0x00]");
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asm volatile ("LDR r2, [r0,#0x00]");
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asm volatile ("ORR r1,r1,r2");
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asm volatile ("STR r1, [r0]");
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asm volatile ("LDR r0, =" NVIC_INT_CTRL);
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asm volatile ("LDR r1, =" NVIC_PENDSVSET);
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asm volatile ("STR r1, [r0]");
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asm volatile ("LDR r0, =" SCB_VTOR);
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asm volatile ("LDR r0, [r0]");
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asm volatile ("LDR r0, [r0]");
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asm volatile ("NOP");
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asm volatile ("MSR msp, r0");
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asm volatile ("CPSIE F");
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asm volatile ("CPSIE I");
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asm volatile ("BX lr");
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}
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void __attribute__((naked)) HardFaultHandler()
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{
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asm volatile ("MRS r0, msp");
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// asm volatile ("TST lr, #0x04");
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asm volatile ("MOV r1, lr");
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asm volatile ("MOV r2, #0x04");
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asm volatile ("TST r1, r2");
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asm volatile ("BEQ Arm32SwitchGetSpDone");
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asm volatile ("MRS r0, psp");
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asm volatile ("B Arm32SwitchGetSpDone");
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}
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void __attribute__((naked)) Arm32SwitchGetSpDone()
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{
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asm volatile ("MRS r3, primask");
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// asm volatile ("STMFD r0!, {r3 - r11}");
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asm volatile ("SUB r0, r0, #0x24");
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asm volatile ("STMIA r0!, {r3 - r7}");
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asm volatile ("MOV r3, r8");
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asm volatile ("MOV r4, r9");
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asm volatile ("MOV r5, r10");
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asm volatile ("MOV r6, r11");
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asm volatile ("STMIA r0!, {r3 - r6}");
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asm volatile ("SUB r0, r0, #0x24");
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// asm volatile ("STMFD r0!, {lr}");
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asm volatile ("SUB r0, r0, #0x4");
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asm volatile ("MOV r0, lr");
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#if defined (__VFP_FP__) && !defined(__SOFTFP__)
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asm volatile ("MOV r4, #0x00");
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// asm volatile ("TST lr, #0x10");
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asm volatile ("MOV r1, lr");
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asm volatile ("MOV r2, #0x10");
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asm volatile ("TST r1, r2");
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asm volatile ("MOVEQ r4, #0x01");
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asm volatile ("STMFD r0!, {r4}");
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#endif
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// asm volatile ("TST lr, #0x04");
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asm volatile ("MOV r1, lr");
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asm volatile ("MOV r2, #0x04");
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asm volatile ("TST r1, r2");
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asm volatile ("BEQ Arm32SwitchUpdateMsp");
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asm volatile ("MSR psp, r0");
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asm volatile ("B Arm32SwitchUpdateDone");
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asm volatile ("B Arm32SwitchUpdateMsp");
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}
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void __attribute__((naked)) Arm32SwitchUpdateMsp()
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{
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asm volatile ("MSR msp, r0");
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asm volatile ("B Arm32SwitchUpdateDone");
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}
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void __attribute__((naked)) Arm32SwitchUpdateDone()
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{
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asm volatile ("PUSH {LR}");
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asm volatile ("BL HwHardFaultException");
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// asm volatile ("POP {LR}");
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asm volatile ("POP {R1}");
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asm volatile ("MOV lr, r1");
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// asm volatile ("ORR lr, lr, #0x04");
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asm volatile ("MOV r1, lr");
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asm volatile ("MOV r2, #0x04");
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asm volatile ("ORR r1, r2");
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asm volatile ("MOV lr, r1");
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asm volatile ("BX lr");
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}
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void __attribute__((naked)) MemFaultHandler()
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{
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asm volatile ("MRS r0, msp");
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// asm volatile ("TST lr, #0x04");
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asm volatile ("MOV r1, lr");
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asm volatile ("MOV r2, #0x04");
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asm volatile ("TST r1, r2");
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asm volatile ("BEQ Arm32Switch1");
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asm volatile ("MRS r0, psp");
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asm volatile ("B Arm32Switch1");
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}
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void __attribute__((naked)) Arm32Switch1()
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{
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asm volatile ("MRS r3, primask");
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// asm volatile ("STMFD r0!, {r3 - r11}");
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asm volatile ("SUB r0, r0, #0x24");
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asm volatile ("STMIA r0!, {r3 - r7}");
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asm volatile ("MOV r3, r8");
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asm volatile ("MOV r4, r9");
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asm volatile ("MOV r5, r10");
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asm volatile ("MOV r6, r11");
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asm volatile ("STMIA r0!, {r3 - r6}");
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asm volatile ("SUB r0, r0, #0x24");
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#if defined (__VFP_FP__) && !defined(__SOFTFP__)
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asm volatile ("MOV r4, #0x00");
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// asm volatile ("TST lr, #0x10");
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asm volatile ("MOV r1, lr");
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asm volatile ("MOV r2, #0x10");
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asm volatile ("TST r1, r2");
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asm volatile ("MOV lr, r1");
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asm volatile ("MOVEQ r4, #0x01");
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asm volatile ("STMFD r0!, {r4}");
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#endif
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// asm volatile ("STMFD r0!, {lr}");
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asm volatile ("SUB r0, r0, #0x4");
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asm volatile ("MOV r0, lr");
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asm volatile ("PUSH {LR}");
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asm volatile ("BL MemFaultHandle");
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// asm volatile ("POP {LR}");
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asm volatile ("POP {R5}");
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asm volatile ("MOV lr, r5");
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// asm volatile ("ORR lr, lr, #0x04");
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asm volatile ("MOV r5, lr");
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asm volatile ("MOV r6, #0x04");
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asm volatile ("ORR r5, r6");
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asm volatile ("MOV lr, r5");
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asm volatile ("BX lr");
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}
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|
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@ -0,0 +1,75 @@
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//*****************************************************************************
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||||
//
|
||||
// startup_gcc.c - Startup code for use with GNU tools.
|
||||
//
|
||||
// Copyright (c) 2013 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 10636 of the Stellaris Firmware Development Package.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
/**
|
||||
* @file boot.c
|
||||
* @brief derived from Stellaris Firmware Development Package
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2021-05-13
|
||||
*/
|
||||
|
||||
/*************************************************
|
||||
File name: boot.c
|
||||
Description: Reset and init function
|
||||
Others:
|
||||
History:
|
||||
1. Date: 2021-05-13
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. take startup_gcc.c from revision 10636 of the Stellaris Firmware Development Package for XiUOS
|
||||
*************************************************/
|
||||
|
||||
extern unsigned _sdata[], _edata[],
|
||||
_sbss[], _ebss[], _etext[], _sidata[];
|
||||
|
||||
extern int entry(void);
|
||||
|
||||
void
|
||||
Reset_Handler(void)
|
||||
{
|
||||
unsigned *p, *q;
|
||||
|
||||
p = _sdata; q = _sidata;
|
||||
while (p < _edata) *p++ = *q++;
|
||||
p = _sbss;
|
||||
while (p < _ebss) *p++ = 0;
|
||||
|
||||
entry();
|
||||
}
|
||||
|
|
@ -0,0 +1,83 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file interrupt.c
|
||||
* @brief support arm cortex-m4 interrupt function
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2021-04-29
|
||||
*/
|
||||
|
||||
#include <xs_base.h>
|
||||
#include <xs_isr.h>
|
||||
|
||||
|
||||
x_base __attribute__((naked)) DisableLocalInterrupt()
|
||||
{
|
||||
asm volatile ("MRS r0, PRIMASK");
|
||||
asm volatile ("CPSID I");
|
||||
asm volatile ("BX LR ");
|
||||
}
|
||||
|
||||
void __attribute__((naked)) EnableLocalInterrupt(x_base level)
|
||||
{
|
||||
asm volatile ("MSR PRIMASK, r0");
|
||||
asm volatile ("BX LR");
|
||||
}
|
||||
|
||||
int32 ArchEnableHwIrq(uint32 irq_num)
|
||||
{
|
||||
return EOK;
|
||||
}
|
||||
|
||||
int32 ArchDisableHwIrq(uint32 irq_num)
|
||||
{
|
||||
return EOK;
|
||||
}
|
||||
|
||||
extern void KTaskOsAssignAfterIrq(void *context);
|
||||
|
||||
void IsrEntry()
|
||||
{
|
||||
uint32 ipsr;
|
||||
|
||||
__asm__ volatile("MRS %0, IPSR" : "=r"(ipsr));
|
||||
|
||||
isrManager.done->incCounter();
|
||||
isrManager.done->handleIrq(ipsr);
|
||||
KTaskOsAssignAfterIrq(NONE);
|
||||
isrManager.done->decCounter();
|
||||
}
|
||||
|
||||
void UsageFault_Handler(int irqn, void *arg)
|
||||
{
|
||||
/* Go to infinite loop when Usage Fault exception occurs */
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
void BusFault_Handler(int irqn, void *arg)
|
||||
{
|
||||
/* Go to infinite loop when Bus Fault exception occurs */
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
void NMI_Handler(int irqn, void *arg)
|
||||
{
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,122 @@
|
|||
//*****************************************************************************
|
||||
//
|
||||
// startup_gcc.c - Startup code for use with GNU tools.
|
||||
//
|
||||
// Copyright (c) 2013 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 10636 of the Stellaris Firmware Development Package.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
/**
|
||||
* @file interrupt_vector.S
|
||||
* @brief derived from Stellaris Firmware Development Package
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2021-05-13
|
||||
*/
|
||||
|
||||
/*************************************************
|
||||
File name: interrupt_vector.S
|
||||
Description: vector table for a Cortex M3
|
||||
Others:
|
||||
History:
|
||||
1. Date: 2021-05-13
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. take startup_gcc.c from revision 10636 of the Stellaris Firmware Development Package for XiUOS
|
||||
*************************************************/
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The vector table. Note that the proper constructs must be placed on this to
|
||||
// ensure that it ends up at physical address 0x0000.0000.
|
||||
//
|
||||
//*****************************************************************************
|
||||
.globl InterruptVectors
|
||||
|
||||
/******************************************************************************
|
||||
*******************************************************************************/
|
||||
.section .isr_vector,"a",%progbits
|
||||
.type InterruptVectors, %object
|
||||
.size InterruptVectors, .-InterruptVectors
|
||||
|
||||
InterruptVectors:
|
||||
.word _sp
|
||||
.word Reset_Handler
|
||||
.word NMI_Handler // NMI_Handler
|
||||
.word HardFaultHandler
|
||||
.word MemFaultHandler // MemManage_Handler
|
||||
.word BusFault_Handler // BusFault_Handler
|
||||
.word UsageFault_Handler // UsageFault_Handler
|
||||
.word IsrEntry
|
||||
.word IsrEntry
|
||||
.word IsrEntry
|
||||
.word IsrEntry
|
||||
.word IsrEntry // SVC_Handler
|
||||
.word IsrEntry // DebugMon_Handler
|
||||
.word IsrEntry
|
||||
.word PendSV_Handler // PendSV_Handler
|
||||
.word IsrEntry // systick
|
||||
|
||||
.word IsrEntry
|
||||
.word IsrEntry
|
||||
.word IsrEntry // UART
|
||||
.word IsrEntry
|
||||
.word IsrEntry
|
||||
.word IsrEntry
|
||||
.word IsrEntry
|
||||
.word IsrEntry
|
||||
.word IsrEntry
|
||||
.word IsrEntry
|
||||
.word IsrEntry
|
||||
.word IsrEntry
|
||||
.word IsrEntry
|
||||
.word IsrEntry
|
||||
.word IsrEntry
|
||||
.word IsrEntry
|
||||
.word IsrEntry
|
||||
.word IsrEntry
|
||||
.word IsrEntry
|
||||
.word IsrEntry
|
||||
.word IsrEntry
|
||||
.word IsrEntry
|
||||
.word IsrEntry
|
||||
.word IsrEntry
|
||||
.word IsrEntry
|
||||
.word IsrEntry
|
||||
.word IsrEntry
|
||||
.word IsrEntry
|
||||
.word IsrEntry
|
||||
.word IsrEntry
|
||||
.word IsrEntry
|
||||
|
|
@ -0,0 +1,159 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2009-10-11 Bernard first version
|
||||
* 2012-01-01 aozima support context switch load/store FPU register.
|
||||
* 2013-06-18 aozima add restore MSP feature.
|
||||
* 2013-06-23 aozima support lazy stack optimized.
|
||||
* 2018-07-24 aozima enhancement hard fault exception handler.
|
||||
*/
|
||||
|
||||
/*************************************************
|
||||
File name: pendsv.S
|
||||
Description: PendSV interrupt handler
|
||||
Others: take RT-Thread v4.0.2/libcpu/arm/cortex-m4/context_gcc.S for references
|
||||
https://github.com/RT-Thread/rt-thread/tree/v4.0.2
|
||||
History:
|
||||
1. Date: 2021-04-25
|
||||
Author: AIIT XUOS Lab
|
||||
*************************************************/
|
||||
|
||||
#include <xsconfig.h>
|
||||
|
||||
.cpu cortex-m0
|
||||
.syntax unified
|
||||
.thumb
|
||||
.text
|
||||
|
||||
.equ SCB_VTOR, 0xE000ED08
|
||||
.equ NVIC_INT_CTRL, 0xE000ED04
|
||||
.equ NVIC_SYSPRI2, 0xE000ED20
|
||||
.equ NVIC_PENDSV_PRI, 0x00FF0000
|
||||
.equ NVIC_PENDSVSET, 0x10000000
|
||||
|
||||
.globl PendSV_Handler
|
||||
.type PendSV_Handler, %function
|
||||
PendSV_Handler:
|
||||
MRS r3, PRIMASK
|
||||
CPSID I
|
||||
|
||||
LDR r0, =KtaskSwitchInterruptFlag
|
||||
LDR r1, [r0]
|
||||
/*CBZ r1, switch_to_task*/
|
||||
CMP r1, #0
|
||||
BEQ pendsv_exit
|
||||
|
||||
MOVS r1, #0x00
|
||||
STR r1, [r0]
|
||||
|
||||
LDR r0, =InterruptFromKtask
|
||||
LDR r1, [r0]
|
||||
/*CBZ r1, switch_to_task*/
|
||||
CMP r1, #0
|
||||
BEQ switch_to_task
|
||||
|
||||
MRS r1, psp
|
||||
|
||||
/*STMFD r1!, {r3 - r11}*/
|
||||
SUBS r1, #0x24
|
||||
STMIA r1!, {r3 - r7}
|
||||
MOV r3, r8
|
||||
MOV r4, r9
|
||||
MOV r5, r10
|
||||
MOV r6, r11
|
||||
STMIA r1!, {r3 - r6}
|
||||
SUBS r1, #0x24
|
||||
|
||||
#if defined (__VFP_FP__) && !defined(__SOFTFP__)
|
||||
MOV r4, #0x00
|
||||
|
||||
TST lr, #0x10
|
||||
MOVEQ r4, #0x01
|
||||
|
||||
/*STMFD r1!, {r4}*/
|
||||
SUBS r1, #0x4
|
||||
STMIA r1!, {r4}
|
||||
SUBS r1, #0x4
|
||||
#endif
|
||||
|
||||
LDR r0, [r0]
|
||||
STR r1, [r0]
|
||||
|
||||
switch_to_task:
|
||||
|
||||
PUSH {lr}
|
||||
BL UpdateRunningTask
|
||||
POP {r0}
|
||||
MOV lr, r0
|
||||
|
||||
#ifdef TASK_ISOLATION
|
||||
PUSH {lr}
|
||||
BL GetTaskPrivilege
|
||||
/*POP {lr}*/
|
||||
POP {r0}
|
||||
MOV lr, r0
|
||||
#endif
|
||||
|
||||
LDR r1, =InterruptToKtask
|
||||
LDR r1, [r1]
|
||||
LDR r1, [r1]
|
||||
|
||||
#if defined (__VFP_FP__) && !defined(__SOFTFP__)
|
||||
LDMFD r1!, {r2}
|
||||
#endif
|
||||
|
||||
/*LDMFD r1!, {r3 - r11}*/
|
||||
ADDS r1, #0x14
|
||||
LDMFD r1!, {r3 - r6}
|
||||
MOV r8, r3
|
||||
MOV r9, r4
|
||||
MOV r10, r5
|
||||
MOV r11, r6
|
||||
SUBS r1, #0x24
|
||||
LDMFD r1!, {r3 - r7}
|
||||
ADDS r1, #0x10
|
||||
|
||||
MSR psp, r1
|
||||
#if defined (__VFP_FP__) && !defined(__SOFTFP__)
|
||||
/*ORR lr, lr, #0x10*/
|
||||
MOV r2, lr
|
||||
MOVS r3, #0x10
|
||||
ORRS r2, r3
|
||||
MOV lr, r2
|
||||
|
||||
CMP r2, #0
|
||||
BICNE lr, lr, #0x10
|
||||
#endif
|
||||
MRS r2, control
|
||||
#ifdef TASK_ISOLATION
|
||||
CMP r0, #1
|
||||
BEQ unprivilege
|
||||
|
||||
privilege:
|
||||
BIC r2, r2, #0x01
|
||||
B exit
|
||||
unprivilege:
|
||||
/*ORR r2, r2, #0x01*/
|
||||
MOVS r1, #0x01
|
||||
ORRS r2, r1
|
||||
#else
|
||||
/*BIC r2, r2, #0x01*/
|
||||
MOVS r0, #0x01
|
||||
BICS r2, r0
|
||||
#endif
|
||||
exit:
|
||||
MSR control, r2
|
||||
|
||||
pendsv_exit:
|
||||
/*ORR lr, lr, #0x04*/
|
||||
MOV r0, lr
|
||||
MOVS r1, #0x04
|
||||
ORRS r0, r1
|
||||
MOV lr, r0
|
||||
|
||||
MSR PRIMASK, r3
|
||||
BX lr
|
||||
|
|
@ -0,0 +1,411 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
#include <xs_base.h>
|
||||
#include <xs_ktask.h>
|
||||
#include <xs_assign.h>
|
||||
#include "svc_handle.h"
|
||||
#include <board.h>
|
||||
#include <shell.h>
|
||||
|
||||
#if (defined ( __GNUC__ ) && defined ( __VFP_FP__ ) && !defined(__SOFTFP__))
|
||||
#define USE_FPU 1
|
||||
#else
|
||||
#define USE_FPU 0
|
||||
#endif
|
||||
|
||||
uint32 InterruptFromKtask;
|
||||
uint32 InterruptToKtask;
|
||||
uint32 KtaskSwitchInterruptFlag;
|
||||
uint32 InterruptToKtaskDescriptor;
|
||||
#define RunningKTask Assign.os_running_task
|
||||
|
||||
static x_err_t (*ExceptionHook)(void *context) = NONE;
|
||||
|
||||
struct ExceptionStackRegister
|
||||
{
|
||||
uint32 r0;
|
||||
uint32 r1;
|
||||
uint32 r2;
|
||||
uint32 r3;
|
||||
uint32 r12;
|
||||
uint32 lr;
|
||||
uint32 pc;
|
||||
uint32 psr;
|
||||
};
|
||||
|
||||
struct StackRegisterContent
|
||||
{
|
||||
#if defined ( __VFP_FP__ ) && !defined(__SOFTFP__)
|
||||
uint32 flag;
|
||||
#endif
|
||||
uint32 primask;
|
||||
uint32 r4;
|
||||
uint32 r5;
|
||||
uint32 r6;
|
||||
uint32 r7;
|
||||
uint32 r8;
|
||||
uint32 r9;
|
||||
uint32 r10;
|
||||
uint32 r11;
|
||||
// uint32 exc_ret;
|
||||
|
||||
struct ExceptionStackRegister ExErrorStackContex;
|
||||
};
|
||||
|
||||
struct ExceptionStackFrameFpu
|
||||
{
|
||||
uint32 r0;
|
||||
uint32 r1;
|
||||
uint32 r2;
|
||||
uint32 r3;
|
||||
uint32 r12;
|
||||
uint32 lr;
|
||||
uint32 pc;
|
||||
uint32 psr;
|
||||
|
||||
#if USE_FPU
|
||||
uint32 S0;
|
||||
uint32 S1;
|
||||
uint32 S2;
|
||||
uint32 S3;
|
||||
uint32 S4;
|
||||
uint32 S5;
|
||||
uint32 S6;
|
||||
uint32 S7;
|
||||
uint32 S8;
|
||||
uint32 S9;
|
||||
uint32 S10;
|
||||
uint32 S11;
|
||||
uint32 S12;
|
||||
uint32 S13;
|
||||
uint32 S14;
|
||||
uint32 S15;
|
||||
uint32 FPSCR;
|
||||
uint32 NO_NAME;
|
||||
#endif
|
||||
};
|
||||
|
||||
struct StackFrameFpu
|
||||
{
|
||||
uint32 flag;
|
||||
|
||||
uint32 r4;
|
||||
uint32 r5;
|
||||
uint32 r6;
|
||||
uint32 r7;
|
||||
uint32 r8;
|
||||
uint32 r9;
|
||||
uint32 r10;
|
||||
uint32 r11;
|
||||
|
||||
#if USE_FPU
|
||||
uint32 s16;
|
||||
uint32 s17;
|
||||
uint32 s18;
|
||||
uint32 s19;
|
||||
uint32 s20;
|
||||
uint32 s21;
|
||||
uint32 s22;
|
||||
uint32 s23;
|
||||
uint32 s24;
|
||||
uint32 s25;
|
||||
uint32 s26;
|
||||
uint32 s27;
|
||||
uint32 s28;
|
||||
uint32 s29;
|
||||
uint32 s30;
|
||||
uint32 s31;
|
||||
#endif
|
||||
|
||||
struct ExceptionStackFrameFpu ExErrorStackContex;
|
||||
};
|
||||
|
||||
uint8 KTaskStackSetup(struct TaskDescriptor *task)
|
||||
{
|
||||
struct StackRegisterContent* StackContex;
|
||||
int i = 0;
|
||||
|
||||
task->stack_point = (uint8 *)ALIGN_MEN_DOWN((x_ubase)(task->task_base_info.stack_start + task->task_base_info.stack_depth), 8);
|
||||
task->stack_point -= sizeof(struct StackRegisterContent);
|
||||
|
||||
StackContex = (struct StackRegisterContent*)task->stack_point;
|
||||
|
||||
for (i = 0; i < sizeof(struct StackRegisterContent) / sizeof(uint32); i++)
|
||||
((uint32 *)StackContex)[i] = 0xfadeface;
|
||||
|
||||
StackContex->ExErrorStackContex.r0 = (unsigned long)task->task_base_info.func_param;
|
||||
|
||||
StackContex->ExErrorStackContex.pc = (unsigned long)task->task_base_info.func_entry ;
|
||||
StackContex->ExErrorStackContex.psr = 0x01000000L;
|
||||
StackContex->primask = 0x00000000L;
|
||||
#ifdef SEPARATE_COMPILE
|
||||
if(task->task_dync_sched_member.isolation_flag == 1 ) {
|
||||
StackContex->ExErrorStackContex.lr = (unsigned long)USERSPACE->us_taskquit;
|
||||
} else {
|
||||
StackContex->ExErrorStackContex.lr = (unsigned long)KTaskQuit;
|
||||
}
|
||||
#else
|
||||
StackContex->ExErrorStackContex.lr = (unsigned long)KTaskQuit;
|
||||
#endif
|
||||
|
||||
#if USE_FPU
|
||||
StackContex->flag = 0;
|
||||
#endif
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
|
||||
void HwExceptionInstall(x_err_t (*exception_handle)(void *context))
|
||||
{
|
||||
ExceptionHook = exception_handle;
|
||||
}
|
||||
|
||||
#define SCB_CFSR (*(volatile const unsigned *)0xE000ED28)
|
||||
#define SCB_HFSR (*(volatile const unsigned *)0xE000ED2C)
|
||||
#define SCB_MMAR (*(volatile const unsigned *)0xE000ED34)
|
||||
#define SCB_BFAR (*(volatile const unsigned *)0xE000ED38)
|
||||
#define SCB_AIRCR (*(volatile unsigned long *)0xE000ED0C)
|
||||
#define SCB_RESET_VALUE 0x05FA0004
|
||||
|
||||
#define SCB_CFSR_MFSR (*(volatile const unsigned char*)0xE000ED28)
|
||||
#define SCB_CFSR_BFSR (*(volatile const unsigned char*)0xE000ED29)
|
||||
#define SCB_CFSR_UFSR (*(volatile const unsigned short*)0xE000ED2A)
|
||||
|
||||
#ifdef TOOL_SHELL
|
||||
static void UsageFaultTrack(void)
|
||||
{
|
||||
KPrintf("usage fault:\n");
|
||||
KPrintf("SCB_CFSR_UFSR:0x%02X ", SCB_CFSR_UFSR);
|
||||
|
||||
if(SCB_CFSR_UFSR & (1<<0))
|
||||
KPrintf("UNDEFINSTR ");
|
||||
|
||||
if(SCB_CFSR_UFSR & (1<<1))
|
||||
KPrintf("INVSTATE ");
|
||||
|
||||
if(SCB_CFSR_UFSR & (1<<2))
|
||||
KPrintf("INVPC ");
|
||||
|
||||
if(SCB_CFSR_UFSR & (1<<3))
|
||||
KPrintf("NOCP ");
|
||||
|
||||
if(SCB_CFSR_UFSR & (1<<8))
|
||||
KPrintf("UNALIGNED ");
|
||||
|
||||
if(SCB_CFSR_UFSR & (1<<9))
|
||||
KPrintf("DIVBYZERO ");
|
||||
|
||||
KPrintf("\n");
|
||||
}
|
||||
|
||||
static void BusFaultTrack(void)
|
||||
{
|
||||
KPrintf("bus fault:\n");
|
||||
KPrintf("SCB_CFSR_BFSR:0x%02X ", SCB_CFSR_BFSR);
|
||||
|
||||
if(SCB_CFSR_BFSR & (1<<0))
|
||||
KPrintf("IBUSERR ");
|
||||
|
||||
if(SCB_CFSR_BFSR & (1<<1))
|
||||
KPrintf("PRECISERR ");
|
||||
|
||||
if(SCB_CFSR_BFSR & (1<<2))
|
||||
KPrintf("IMPRECISERR ");
|
||||
|
||||
if(SCB_CFSR_BFSR & (1<<3))
|
||||
KPrintf("UNSTKERR ");
|
||||
|
||||
if(SCB_CFSR_BFSR & (1<<4))
|
||||
KPrintf("STKERR ");
|
||||
|
||||
if(SCB_CFSR_BFSR & (1<<7))
|
||||
KPrintf("SCB->BFAR:%08X\n", SCB_BFAR);
|
||||
else
|
||||
KPrintf("\n");
|
||||
}
|
||||
|
||||
static void MemManageFaultTrack(void)
|
||||
{
|
||||
KPrintf("mem manage fault:\n");
|
||||
KPrintf("SCB_CFSR_MFSR:0x%02X ", SCB_CFSR_MFSR);
|
||||
|
||||
if(SCB_CFSR_MFSR & (1<<0))
|
||||
KPrintf("IACCVIOL ");
|
||||
if(SCB_CFSR_MFSR & (1<<1))
|
||||
KPrintf("DACCVIOL ");
|
||||
|
||||
if(SCB_CFSR_MFSR & (1<<3))
|
||||
KPrintf("MUNSTKERR ");
|
||||
|
||||
if(SCB_CFSR_MFSR & (1<<4))
|
||||
KPrintf("MSTKERR ");
|
||||
|
||||
if(SCB_CFSR_MFSR & (1<<7))
|
||||
KPrintf("SCB->MMAR:%08X\n", SCB_MMAR);
|
||||
else
|
||||
KPrintf("\n");
|
||||
}
|
||||
|
||||
static void HardFaultTrack(void)
|
||||
{
|
||||
if(SCB_HFSR & (1UL<<1))
|
||||
KPrintf("failed vector fetch\n");
|
||||
|
||||
if(SCB_HFSR & (1UL<<30)) {
|
||||
if(SCB_CFSR_BFSR)
|
||||
BusFaultTrack();
|
||||
|
||||
if(SCB_CFSR_MFSR)
|
||||
MemManageFaultTrack();
|
||||
|
||||
if(SCB_CFSR_UFSR)
|
||||
UsageFaultTrack();
|
||||
}
|
||||
|
||||
if(SCB_HFSR & (1UL<<31))
|
||||
KPrintf("debug event\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
struct ExceptionInfo
|
||||
{
|
||||
uint32 ExcReturn;
|
||||
struct StackRegisterContent stackframe;
|
||||
};
|
||||
|
||||
void HwHardFaultException(struct ExceptionInfo *ExceptionInfo)
|
||||
{
|
||||
extern long ShowTask(void);
|
||||
struct ExErrorStackContex* ExceptionStack = (struct ExErrorStackContex*)&ExceptionInfo->stackframe.ExErrorStackContex;
|
||||
struct StackRegisterContent* context = (struct StackRegisterContent*)&ExceptionInfo->stackframe;
|
||||
|
||||
if (ExceptionHook != NONE) {
|
||||
x_err_t result = ExceptionHook(ExceptionStack);
|
||||
if (result == EOK) return;
|
||||
}
|
||||
|
||||
KPrintf("psr: 0x%08x\n", context->ExErrorStackContex.psr);
|
||||
KPrintf("r00: 0x%08x\n", context->ExErrorStackContex.r0);
|
||||
KPrintf("r01: 0x%08x\n", context->ExErrorStackContex.r1);
|
||||
KPrintf("r02: 0x%08x\n", context->ExErrorStackContex.r2);
|
||||
KPrintf("r03: 0x%08x\n", context->ExErrorStackContex.r3);
|
||||
KPrintf("r04: 0x%08x\n", context->r4);
|
||||
KPrintf("r05: 0x%08x\n", context->r5);
|
||||
KPrintf("r06: 0x%08x\n", context->r6);
|
||||
KPrintf("r07: 0x%08x\n", context->r7);
|
||||
KPrintf("r08: 0x%08x\n", context->r8);
|
||||
KPrintf("r09: 0x%08x\n", context->r9);
|
||||
KPrintf("r10: 0x%08x\n", context->r10);
|
||||
KPrintf("r11: 0x%08x\n", context->r11);
|
||||
//KPrintf("exc_ret: 0x%08x\n", context->exc_ret);
|
||||
KPrintf("r12: 0x%08x\n", context->ExErrorStackContex.r12);
|
||||
KPrintf(" lr: 0x%08x\n", context->ExErrorStackContex.lr);
|
||||
KPrintf(" pc: 0x%08x\n", context->ExErrorStackContex.pc);
|
||||
|
||||
if (ExceptionInfo->ExcReturn & (1 << 2)) {
|
||||
KPrintf("hard fault on task: %s\r\n\r\n", GetKTaskDescriptor()->task_base_info.name);
|
||||
#ifdef TOOL_SHELL
|
||||
ShowTask();
|
||||
#endif
|
||||
} else {
|
||||
KPrintf("hard fault on handler\r\n\r\n");
|
||||
}
|
||||
|
||||
if ( (ExceptionInfo->ExcReturn & 0x10) == 0)
|
||||
KPrintf("FPU active!\r\n");
|
||||
|
||||
#ifdef TOOL_SHELL
|
||||
HardFaultTrack();
|
||||
#endif
|
||||
|
||||
while (1);
|
||||
}
|
||||
|
||||
void UpdateRunningTask(void)
|
||||
{
|
||||
RunningKTask = (struct TaskDescriptor *)InterruptToKtaskDescriptor;
|
||||
}
|
||||
|
||||
|
||||
void MemFaultExceptionPrint(struct ExceptionInfo *ExceptionInfo)
|
||||
{
|
||||
extern long ShowTask(void);
|
||||
struct ExErrorStackContex* ExceptionStack = (struct ExErrorStackContex*)&ExceptionInfo->stackframe.ExErrorStackContex;
|
||||
struct StackRegisterContent* context = (struct StackRegisterContent*)&ExceptionInfo->stackframe;
|
||||
|
||||
if (ExceptionHook != NONE) {
|
||||
x_err_t result = ExceptionHook(ExceptionStack);
|
||||
if (result == EOK) return;
|
||||
}
|
||||
|
||||
KPrintf("psr: 0x%08x\n", context->ExErrorStackContex.psr);
|
||||
KPrintf("r00: 0x%08x\n", context->ExErrorStackContex.r0);
|
||||
KPrintf("r01: 0x%08x\n", context->ExErrorStackContex.r1);
|
||||
KPrintf("r02: 0x%08x\n", context->ExErrorStackContex.r2);
|
||||
KPrintf("r03: 0x%08x\n", context->ExErrorStackContex.r3);
|
||||
KPrintf("r04: 0x%08x\n", context->r4);
|
||||
KPrintf("r05: 0x%08x\n", context->r5);
|
||||
KPrintf("r06: 0x%08x\n", context->r6);
|
||||
KPrintf("r07: 0x%08x\n", context->r7);
|
||||
KPrintf("r08: 0x%08x\n", context->r8);
|
||||
KPrintf("r09: 0x%08x\n", context->r9);
|
||||
KPrintf("r10: 0x%08x\n", context->r10);
|
||||
KPrintf("r11: 0x%08x\n", context->r11);
|
||||
KPrintf("exc_ret: 0x%08x\n", ExceptionInfo->ExcReturn);
|
||||
KPrintf("r12: 0x%08x\n", context->ExErrorStackContex.r12);
|
||||
KPrintf(" lr: 0x%08x\n", context->ExErrorStackContex.lr);
|
||||
KPrintf(" pc: 0x%08x\n", context->ExErrorStackContex.pc);
|
||||
|
||||
if (ExceptionInfo->ExcReturn & (1 << 2)) {
|
||||
KPrintf("hard fault on task: %s\r\n\r\n", GetKTaskDescriptor()->task_base_info.name);
|
||||
#ifdef TOOL_SHELL
|
||||
ShowTask();
|
||||
#endif
|
||||
} else {
|
||||
KPrintf("hard fault on handler\r\n\r\n");
|
||||
}
|
||||
|
||||
if ((ExceptionInfo->ExcReturn & 0x10) == 0)
|
||||
KPrintf("FPU active!\r\n");
|
||||
|
||||
|
||||
#ifdef TOOL_SHELL
|
||||
HardFaultTrack();
|
||||
#endif
|
||||
|
||||
while (1);
|
||||
}
|
||||
|
||||
void MemFaultHandle(uintptr_t *sp)
|
||||
{
|
||||
#ifdef TASK_ISOLATION
|
||||
struct TaskDescriptor *task;
|
||||
task = GetKTaskDescriptor();
|
||||
if( task->task_dync_sched_member.isolation_flag == 1){
|
||||
KPrintf("\nSegmentation fault, task: %s\n", task->task_base_info.name);
|
||||
KTaskQuit();
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
MemFaultExceptionPrint((struct ExceptionInfo *)sp);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
__attribute__((weak)) void HwCpuReset(void)
|
||||
{
|
||||
SCB_AIRCR = SCB_RESET_VALUE;
|
||||
}
|
||||
SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_FUNC)|SHELL_CMD_PARAM_NUM(0), Reboot, HwCpuReset, reset machine );
|
||||
|
|
@ -0,0 +1,58 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
#ifndef __INC_SVC_HANDLE_H__
|
||||
#define __INC_SVC_HANDLE_H__
|
||||
|
||||
#if defined ( __VFP_FP__ ) && !defined(__SOFTFP__)
|
||||
#define INT_FPU_REGS (1)
|
||||
#else
|
||||
#define INT_FPU_REGS (0)
|
||||
#endif
|
||||
|
||||
#define HW_INT_REGS (8)
|
||||
#define SW_INT_REGS (9 + INT_FPU_REGS)
|
||||
|
||||
#define REG_INT_R0 (SW_INT_REGS + 0) /* R0 */
|
||||
#define REG_INT_R1 (SW_INT_REGS + 1) /* R1 */
|
||||
#define REG_INT_R2 (SW_INT_REGS + 2) /* R2 */
|
||||
#define REG_INT_R3 (SW_INT_REGS + 3) /* R3 */
|
||||
#define REG_INT_R12 (SW_INT_REGS + 4) /* R12 */
|
||||
#define REG_INT_R14 (SW_INT_REGS + 5) /* R14 = LR */
|
||||
#define REG_INT_PC (SW_INT_REGS + 6) /* R15 = PC */
|
||||
#define REG_INT_XPSR (SW_INT_REGS + 7) /* xPSR */
|
||||
|
||||
#if defined ( __VFP_FP__ ) && !defined(__SOFTFP__)
|
||||
#define REG_INT_FPU_FLAG (0) /* fpu flag */
|
||||
#define REG_INT_PRIMASK (1) /* PRIMASK */
|
||||
#define REG_INT_R4 (2) /* R4 */
|
||||
#define REG_INT_R5 (3) /* R5 */
|
||||
#define REG_INT_R6 (4) /* R6 */
|
||||
#define REG_INT_R7 (5) /* R7 */
|
||||
#define REG_INT_R8 (6) /* R8 */
|
||||
#define REG_INT_R9 (7) /* R9 */
|
||||
#define REG_INT_R10 (8) /* R10 */
|
||||
#define REG_INT_R11 (9) /* R11 */
|
||||
#else
|
||||
#define REG_INT_PRIMASK (0) /* PRIMASK */
|
||||
#define REG_INT_R4 (1) /* R4 */
|
||||
#define REG_INT_R5 (2) /* R5 */
|
||||
#define REG_INT_R6 (3) /* R6 */
|
||||
#define REG_INT_R7 (4) /* R7 */
|
||||
#define REG_INT_R8 (5) /* R8 */
|
||||
#define REG_INT_R9 (6) /* R9 */
|
||||
#define REG_INT_R10 (7) /* R10 */
|
||||
#define REG_INT_R11 (8) /* R11 */
|
||||
#endif
|
||||
|
||||
|
||||
#endif
|
||||
|
|
@ -21,19 +21,37 @@
|
|||
|
||||
void __attribute__((naked)) HwInterruptcontextSwitch(x_ubase from, x_ubase to, struct TaskDescriptor *to_task, void *context)
|
||||
{
|
||||
asm volatile ("PUSH {R4}");
|
||||
asm volatile ("PUSH {R5}");
|
||||
|
||||
asm volatile ("LDR r4, =KtaskSwitchInterruptFlag");
|
||||
asm volatile ("LDR r5, [r4]");
|
||||
asm volatile ("CMP r5, #1");
|
||||
|
||||
asm volatile ("POP {R5}");
|
||||
asm volatile ("POP {R4}");
|
||||
|
||||
asm volatile ("BEQ Arm32SwitchReswitch");
|
||||
|
||||
asm volatile ("PUSH {R4}");
|
||||
asm volatile ("PUSH {R5}");
|
||||
asm volatile ("LDR r4, =KtaskSwitchInterruptFlag");
|
||||
|
||||
asm volatile ("MOV r5, #1");
|
||||
asm volatile ("STR r5, [r4]");
|
||||
asm volatile ("LDR r4, =InterruptFromKtask");
|
||||
asm volatile ("STR r0, [r4]");
|
||||
|
||||
asm volatile ("POP {R5}");
|
||||
asm volatile ("POP {R4}");
|
||||
|
||||
asm volatile ("B Arm32SwitchReswitch");
|
||||
}
|
||||
|
||||
void __attribute__((naked)) Arm32SwitchReswitch()
|
||||
{
|
||||
asm volatile ("PUSH {R4}");
|
||||
|
||||
asm volatile ("LDR r4, =InterruptToKtask");
|
||||
asm volatile ("STR r1, [r4]");
|
||||
asm volatile ("LDR r4, =InterruptToKtaskDescriptor");
|
||||
|
|
@ -41,6 +59,9 @@ void __attribute__((naked)) Arm32SwitchReswitch()
|
|||
asm volatile ("LDR r0, =" NVIC_INT_CTRL);
|
||||
asm volatile ("LDR r1, =" NVIC_PENDSVSET);
|
||||
asm volatile ("STR r1, [r0]");
|
||||
|
||||
asm volatile ("POP {R4}");
|
||||
|
||||
asm volatile ("BX LR");
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,248 @@
|
|||
#
|
||||
# Automatically generated file; DO NOT EDIT.
|
||||
# XiUOS Project Configuration
|
||||
#
|
||||
CONFIG_BOARD_CORTEX_M3_EVB=y
|
||||
CONFIG_KERNEL_CONSOLE_DEVICE_NAME="uart0"
|
||||
#CONFIG_LED0=24
|
||||
#CONFIG_LED1=25
|
||||
CONFIG_ARCH_RISCV=y
|
||||
CONFIG_ARCH_RISCV32=y
|
||||
CONFIG_ARCH_CPU_32BIT=y
|
||||
|
||||
#
|
||||
# cortex-m3-emulator feature
|
||||
#
|
||||
# CONFIG_BSP_USING_AUDIO is not set
|
||||
# CONFIG_BSP_USING_CAMERA is not set
|
||||
# CONFIG_BSP_USING_SDIO is not set
|
||||
# CONFIG_BSP_USING_DMA is not set
|
||||
CONFIG_BSP_USING_GPIO=y
|
||||
# CONFIG_BSP_USING_I2C is not set
|
||||
# CONFIG_BSP_USING_I2S is not set
|
||||
# CONFIG_BSP_USING_LCD is not set
|
||||
# CONFIG_BSP_USING_RTC is not set
|
||||
# CONFIG_BSP_USING_SECURITY is not set
|
||||
# CONFIG_BSP_USING_SPI is not set
|
||||
CONFIG_BSP_USING_UART=y
|
||||
# CONFIG_BSP_USING_UART_HS is not set
|
||||
# CONFIG_BSP_USING_VIDEO is not set
|
||||
# CONFIG_BSP_USING_WDT is not set
|
||||
|
||||
#
|
||||
# General Purpose UARTs
|
||||
#
|
||||
|
||||
CONFIG___STACKSIZE__=4096
|
||||
|
||||
#
|
||||
# Hardware feature
|
||||
#
|
||||
CONFIG_RESOURCES_SERIAL=y
|
||||
# CONFIG_SERIAL_USING_DMA=y
|
||||
CONFIG_SERIAL_RB_BUFSZ=64
|
||||
CONFIG_FS_VFS=n
|
||||
# CONFIG_RESOURCES_HWTIMER is not set
|
||||
# CONFIG_RESOURCES_I2C is not set
|
||||
# CONFIG_RESOURCES_LCD is not set
|
||||
# CONFIG_RESOURCES_SDIO is not set
|
||||
# CONFIG_RESOURCES_TOUCH is not set
|
||||
# CONFIG_RESOURCES_PIN=y
|
||||
# CONFIG_RESOURCES_RTC is not set
|
||||
# CONFIG_RESOURCES_SPI is not set
|
||||
#CONFIG_RESOURCES_SPI_SD is not set
|
||||
#CONFIG_RESOURCES_SPI_SFUD is not set
|
||||
# SFUD_USING_SFDP is not set
|
||||
# SFUD_USING_FLASH_INFO_TABLE is not set
|
||||
# SFUD_DEBUG_LOG is not set
|
||||
# CONFIG_RESOURCES_WDT is not set
|
||||
# CONFIG_RESOURCES_USB is not set
|
||||
# CONFIG_RESOURCES_USB_HOST is not set
|
||||
# CONFIG_UDISK_MOUNTPOINT is not set
|
||||
# CONFIG_USBH_MSTORAGE is not set
|
||||
# CONFIG_RESOURCES_USB_DEVICE is not set
|
||||
# CONFIG_USBD_THREAD_STACK_SZ is not set
|
||||
|
||||
#
|
||||
# Kernel feature
|
||||
#
|
||||
|
||||
#
|
||||
# Kernel Device Object
|
||||
#
|
||||
CONFIG_KERNEL_DEVICE=y
|
||||
CONFIG_KERNEL_CONSOLE=y
|
||||
CONFIG_KERNEL_CONSOLEBUF_SIZE=128
|
||||
|
||||
#
|
||||
# Task feature
|
||||
#
|
||||
CONFIG_SCHED_POLICY_RR_REMAINSLICE=y
|
||||
# CONFIG_SCHED_POLICY_RR is not set
|
||||
# CONFIG_SCHED_POLICY_FIFO is not set
|
||||
|
||||
#
|
||||
# Memory Management
|
||||
#
|
||||
# CONFIG_KERNEL_MEMBLOCK is not set
|
||||
CONFIG_MEM_ALIGN_SIZE=4
|
||||
CONFIG_MM_PAGE_SIZE=1024
|
||||
|
||||
#
|
||||
# Using small memory allocator
|
||||
#
|
||||
CONFIG_KERNEL_SMALL_MEM_ALLOC=y
|
||||
CONFIG_SMALL_NUMBER_32B=32
|
||||
CONFIG_SMALL_NUMBER_64B=16
|
||||
|
||||
#
|
||||
# Inter-Task communication
|
||||
#
|
||||
# CONFIG_KERNEL_SEMAPHORE=y
|
||||
# CONFIG_KERNEL_MUTEX=y
|
||||
CONFIG_KERNEL_EVENT=n
|
||||
CONFIG_KERNEL_MESSAGEQUEUE=n
|
||||
CONFIG_KTASK_PRIORITY_8=y
|
||||
CONFIG_KTASK_PRIORITY_MAX=8
|
||||
CONFIG_TICK_PER_SECOND=100
|
||||
# CONFIG_KERNEL_STACK_OVERFLOW_CHECK=y
|
||||
CONFIG_KERNEL_BANNER=y
|
||||
# CONFIG_KERNEL_HOOK is not set
|
||||
# CONFIG_KERNEL_SOFTTIMER=y
|
||||
# CONFIG_KERNEL_IDLE_HOOK=y
|
||||
# CONFIG_IDEL_HOOK_LIST_SIZE=4
|
||||
CONFIG_IDLE_KTASK_STACKSIZE=512
|
||||
CONFIG_ZOMBIE_KTASK_STACKSIZE=512
|
||||
# CONFIG_KERNEL_TASK_ISOLATION is not set
|
||||
|
||||
#
|
||||
# Memory Management
|
||||
#
|
||||
# CONFIG_KERNEL_MEMBLOCK is not set
|
||||
|
||||
#
|
||||
# Command shell
|
||||
#
|
||||
CONFIG_TOOL_SHELL=y
|
||||
CONFIG_SHELL_TASK_PRIORITY=4
|
||||
CONFIG_SHELL_TASK_STACK_SIZE=2048
|
||||
|
||||
#
|
||||
# User Control
|
||||
#
|
||||
CONFIG_SHELL_DEFAULT_USER="letter"
|
||||
CONFIG_SHELL_DEFAULT_USER_PASSWORD=""
|
||||
CONFIG_SHELL_LOCK_TIMEOUT=10000
|
||||
CONFIG_SHELL_ENTER_CR_AND_LF=y
|
||||
# CONFIG_SHELL_ENTER_CRLF is not set
|
||||
CONFIG_SHELL_ENTER_CR=y
|
||||
CONFIG_SHELL_ENTER_LF=y
|
||||
CONFIG_SHELL_MAX_NUMBER=5
|
||||
CONFIG_SHELL_PARAMETER_MAX_NUMBER=8
|
||||
CONFIG_SHELL_HISTORY_MAX_NUMBER=5
|
||||
CONFIG_SHELL_PRINT_BUFFER=128
|
||||
CONFIG_SHELL_USING_CMD_EXPORT=y
|
||||
# CONFIG_SHELL_HELP_LIST_USER is not set
|
||||
CONFIG_SHELL_HELP_SHOW_PERMISSION=y
|
||||
# CONFIG_SHELL_HELP_LIST_VAR is not set
|
||||
# CONFIG_SHELL_HELP_LIST_KEY is not set
|
||||
#CONFIG_KERNEL_QUEUEMANAGE=y
|
||||
# CONFIG_KERNEL_WORKQUEUE is not set
|
||||
CONFIG_WORKQUEUE_KTASK_STACKSIZE=256
|
||||
CONFIG_WORKQUEUE_KTASK_PRIORITY=2
|
||||
CONFIG_QUEUE_MAX=2
|
||||
CONFIG_KERNEL_WAITQUEUE=y
|
||||
CONFIG_KERNEL_DATAQUEUE=y
|
||||
# CONFIG_KERNEL_CIRCULAR_AREA is not set
|
||||
# CONFIG_KERNEL_AVL_TREE is not set
|
||||
CONFIG_NAME_MAX=32
|
||||
CONFIG_ALIGN_SIZE=8
|
||||
CONFIG_KERNEL_COMPONENTS_INIT=n
|
||||
CONFIG_KERNEL_USER_MAIN=y
|
||||
CONFIG_MAIN_KTASK_STACK_SIZE=2048
|
||||
CONFIG_ENV_INIT_KTASK_STACK_SIZE=2048
|
||||
CONFIG_MAIN_KTASK_PRIORITY=3
|
||||
# CONFIG_USER_TEST is not set
|
||||
# CONFIG_TOOL_TEST_SEM is not set
|
||||
# CONFIG_TOOL_TEST_MUTEX is not set
|
||||
# CONFIG_TOOL_TEST_EVENT is not set
|
||||
# CONFIG_TOOL_TEST_MSG is not set
|
||||
# CONFIG_TOOL_TEST_AVLTREE is not set
|
||||
# CONFIG_TEST_CRICULAR_AREA is not set
|
||||
# CONFIG_TOOL_TEST_MEM is not set
|
||||
# CONFIG_TOOL_TEST_TIMER is not set
|
||||
# CONFIG_TOOL_TEST_IWG is not set
|
||||
# CONFIG_TOOL_TEST_REALTIME is not set
|
||||
# CONFIG_TOOL_TEST_DBG is not set
|
||||
# CONFIG_TOOL_TEST_SCHED is not set
|
||||
# CONFIG_KERNEL_DEBUG is not set
|
||||
#CONFIG_DEBUG_INIT_CONFIG=y
|
||||
#CONFIG_DBG_INIT=1
|
||||
#CONFIG_ARCH_SMP=y
|
||||
#CONFIG_CPUS_NR=2
|
||||
|
||||
#
|
||||
# hash table config
|
||||
#
|
||||
CONFIG_ID_HTABLE_SIZE=4
|
||||
CONFIG_ID_NUM_MAX=16
|
||||
|
||||
#
|
||||
# File system
|
||||
#
|
||||
CONFIG_FS_DFS=n
|
||||
#CONFIG_DFS_USING_WORKDIR=y
|
||||
#CONFIG_FS_DFS_DEVFS=y
|
||||
|
||||
#
|
||||
# Fat filesystem
|
||||
#
|
||||
|
||||
#
|
||||
# IOT-Device File system
|
||||
#
|
||||
|
||||
#
|
||||
# Lwext4 filesystem
|
||||
#
|
||||
|
||||
#
|
||||
# APP Framework
|
||||
#
|
||||
|
||||
#
|
||||
# Perception
|
||||
#
|
||||
# CONFIG_PERCEPTION_SENSORDEVICE is not set
|
||||
|
||||
#
|
||||
# connection
|
||||
#
|
||||
# CONFIG_CONNECTION_AT is not set
|
||||
# CONFIG_CONNECTION_MQTT is not set
|
||||
|
||||
#
|
||||
# medium communication
|
||||
#
|
||||
|
||||
|
||||
#
|
||||
# Intelligence
|
||||
#
|
||||
|
||||
#
|
||||
# Control
|
||||
#
|
||||
|
||||
#
|
||||
# Lib
|
||||
#
|
||||
CONFIG_LIB=y
|
||||
CONFIG_LIB_POSIX=y
|
||||
CONFIG_LIB_NEWLIB=y
|
||||
|
||||
# CONFIG_LITTLEVGL2RTT_USING_DEMO=y
|
||||
|
||||
#
|
||||
# Security
|
||||
#
|
||||
|
|
@ -0,0 +1,56 @@
|
|||
mainmenu "XiUOS Project Configuration"
|
||||
|
||||
config BSP_DIR
|
||||
string
|
||||
option env="BSP_ROOT"
|
||||
default "."
|
||||
|
||||
config KERNEL_DIR
|
||||
string
|
||||
option env="KERNEL_ROOT"
|
||||
default "../.."
|
||||
|
||||
config BOARD_CORTEX_M0_EVB
|
||||
bool
|
||||
select ARCH_ARM
|
||||
default y
|
||||
|
||||
config KERNEL_CONSOLE_DEVICE_NAME
|
||||
string
|
||||
default "uart0"
|
||||
|
||||
|
||||
source "$KERNEL_DIR/arch/Kconfig"
|
||||
|
||||
menu "cortex-m0 emulator feature"
|
||||
source "$BSP_DIR/third_party_driver/Kconfig"
|
||||
|
||||
menu "config default board resources"
|
||||
menu "config board app name"
|
||||
config BOARD_APP_NAME
|
||||
string "config board app name"
|
||||
default "/XiUOS_cortex-m0-emulator_app.bin"
|
||||
endmenu
|
||||
|
||||
menu "config board service table"
|
||||
config SERVICE_TABLE_ADDRESS
|
||||
hex "board service table address"
|
||||
default 0x2007F0000
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
config __STACKSIZE__
|
||||
int "stack size for interrupt"
|
||||
default 4096
|
||||
|
||||
endmenu
|
||||
|
||||
|
||||
menu "Hardware feature"
|
||||
source "$KERNEL_DIR/resources/Kconfig"
|
||||
endmenu
|
||||
|
||||
source "$KERNEL_DIR/Kconfig"
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,5 @@
|
|||
SRC_DIR := third_party_driver
|
||||
|
||||
SRC_FILES := board.c connect_uart.c
|
||||
|
||||
include $(KERNEL_ROOT)/compiler.mk
|
||||
|
|
@ -0,0 +1,187 @@
|
|||
# 从零开始构建矽璓工业物联操作系统：使用ARM架构的cortex-m0 emulator
|
||||
|
||||
# cortex-m0 emulator
|
||||
|
||||
[XiUOS](http://xuos.io/) (X Industrial Ubiquitous Operating System) 矽璓XiUOS是一款面向智慧车间的工业物联网操作系统，主要由一个极简的微型实时操作系统内核和其上的工业物联框架构成，通过高效管理工业物联网设备、支撑工业物联应用，在生产车间内实现智能化的“感知环境、联网传输、知悉识别、控制调整”，促进以工业设备和工业控制系统为核心的人、机、物深度互联，帮助提升生产线的数字化和智能化水平。
|
||||
|
||||
## 1. 简介
|
||||
|
||||
QEMU 是一个通用的开源模拟器和虚拟化工具。目前QEMU已经可以较完整的支持ARM cortex-m0架构。XiUOS同样支持运行在QEMU上
|
||||
|
||||
| 硬件 | 描述 |
|
||||
| -- | -- |
|
||||
|芯片型号| microbit nRF51 |
|
||||
|架构| cortex-m0 |
|
||||
|主频| 50MHz |
|
||||
|片内SRAM| 64KB |
|
||||
| 外设支持 | UART |
|
||||
|
||||
XiUOS板级当前支持使用UART。
|
||||
|
||||
## 2. 开发环境搭建
|
||||
|
||||
### 推荐使用：
|
||||
|
||||
**操作系统：** ubuntu18.04 [https://ubuntu.com/download/desktop](https://ubuntu.com/download/desktop)
|
||||
|
||||
更新`ubuntu 18.04`源的方法:（根据自身情况而定，可以不更改）
|
||||
|
||||
第一步:打开sources.list文件
|
||||
|
||||
```c
|
||||
sudo vim /etc/apt/sources.list
|
||||
```
|
||||
|
||||
第二步:将以下内容复制到sources.list文件
|
||||
|
||||
```c
|
||||
deb http://mirrors.aliyun.com/ubuntu/ bionic main restricted universe multiverse
|
||||
deb http://mirrors.aliyun.com/ubuntu/ bionic-security main restricted universe multiverse
|
||||
deb http://mirrors.aliyun.com/ubuntu/ bionic-updates main restricted universe multiverse
|
||||
deb http://mirrors.aliyun.com/ubuntu/ bionic-proposed main restricted universe multiverse
|
||||
deb http://mirrors.aliyun.com/ubuntu/ bionic-backports main restricted universe multiverse
|
||||
deb-src http://mirrors.aliyun.com/ubuntu/ bionic main restricted universe multiverse
|
||||
deb-src http://mirrors.aliyun.com/ubuntu/ bionic-security main restricted universe multiverse
|
||||
deb-src http://mirrors.aliyun.com/ubuntu/ bionic-updates main restricted universe multiverse
|
||||
deb-src http://mirrors.aliyun.com/ubuntu/ bionic-proposed main restricted universe multiverse
|
||||
deb-src http://mirrors.aliyun.com/ubuntu/ bionic-backports main restricted universe multiverse
|
||||
```
|
||||
|
||||
第三步:更新源和系统软件
|
||||
|
||||
```c
|
||||
sudo apt-get update
|
||||
sudo apt-get upgrade
|
||||
```
|
||||
|
||||
**开发工具推荐使用 VSCode ，VScode下载地址为：** VSCode [https://code.visualstudio.com/](https://code.visualstudio.com/)，推荐下载地址为 [http://vscode.cdn.azure.cn/stable/3c4e3df9e89829dce27b7b5c24508306b151f30d/code_1.55.2-1618307277_amd64.deb](http://vscode.cdn.azure.cn/stable/3c4e3df9e89829dce27b7b5c24508306b151f30d/code_1.55.2-1618307277_amd64.deb)
|
||||
|
||||
### 依赖包安装：
|
||||
|
||||
```
|
||||
$ sudo apt install build-essential pkg-config git
|
||||
$ sudo apt install gcc make libncurses5-dev openssl libssl-dev bison flex libelf-dev autoconf libtool gperf libc6-dev
|
||||
```
|
||||
|
||||
**XiUOS操作系统源码下载：** XiUOS [https://forgeplus.trustie.net/projects/xuos/xiuos](https://forgeplus.trustie.net/projects/xuos/xiuos)
|
||||
|
||||
新建一个空文件夹并进入文件夹中，并下载源码，具体命令如下：
|
||||
|
||||
```c
|
||||
mkdir test && cd test
|
||||
git clone https://git.trustie.net/xuos/xiuos.git
|
||||
```
|
||||
|
||||
打开源码文件包可以看到以下目录：
|
||||
| 名称 | 说明 |
|
||||
| -- | -- |
|
||||
| application | 应用代码 |
|
||||
| board | 板级支持包 |
|
||||
| framework | 应用框架 |
|
||||
| fs | 文件系统 |
|
||||
| kernel | 内核源码 |
|
||||
| resources | 驱动文件 |
|
||||
| tool | 系统工具 |
|
||||
|
||||
使用VScode打开代码，具体操作步骤为：在源码文件夹下打开系统终端，输入`code .`即可打开VScode开发环境，如下图所示：
|
||||
|
||||
<div align= "center">
|
||||
<img src = img/vscode.jpg width =1000>
|
||||
</div>
|
||||
|
||||
### 裁减配置工具的下载
|
||||
|
||||
裁减配置工具：
|
||||
|
||||
**工具地址：** kconfig-frontends [https://forgeplus.trustie.net/projects/xuos/kconfig-frontends](https://forgeplus.trustie.net/projects/xuos/kconfig-frontends)，下载与安装的具体命令如下：
|
||||
|
||||
```c
|
||||
mkdir kfrontends && cd kfrontends
|
||||
git clone https://git.trustie.net/xuos/kconfig-frontends.git
|
||||
```
|
||||
|
||||
下载源码后按以下步骤执行软件安装：
|
||||
|
||||
```c
|
||||
cd kconfig-frontends
|
||||
./xs_build.sh
|
||||
```
|
||||
|
||||
### 编译工具链：
|
||||
|
||||
ARM： arm-none-eabi(`gcc version 6.3.1`)，默认安装到Ubuntu的/usr/bin/arm-none-eabi-，使用如下命令行下载和安装。
|
||||
|
||||
```shell
|
||||
$ sudo apt install gcc-arm-none-eabi
|
||||
```
|
||||
|
||||
## 编译说明
|
||||
|
||||
### 编辑环境：`Ubuntu18.04`
|
||||
|
||||
### 编译工具链：`arm-none-eabi-gcc`
|
||||
使用`VScode`打开工程的方法有多种，本文介绍一种快捷键，在项目目录下将`code .`输入linux系统命令终端即可打开目标项目
|
||||
|
||||
|
||||
编译步骤：
|
||||
|
||||
1.在VScode命令终端中执行以下命令，生成配置文件
|
||||
|
||||
```c
|
||||
make BOARD=cortex-m0-emulator menuconfig
|
||||
```
|
||||
|
||||
2.在menuconfig界面配置需要关闭和开启的功能，按回车键进入下级菜单，按Y键选中需要开启的功能，按N键选中需要关闭的功能，配置结束后保存并退出（本例旨在演示简单的输出例程，所以没有需要配置的选项，双击快捷键ESC退出配置）
|
||||
|
||||
|
||||
|
||||
退出时选择`yes`保存上面所配置的内容，如下图所示：
|
||||
|
||||
|
||||
|
||||
3.继续执行以下命令，进行编译
|
||||
|
||||
```
|
||||
make BOARD=cortex-m0-emulator
|
||||
```
|
||||
|
||||
4.如果编译正确无误，会产生XiUOS_cortex-m0-emulator.elf、XiUOS_cortex-m0-emulator.bin文件。
|
||||
|
||||
## 3. 运行
|
||||
|
||||
### 3.1 安装QEMU
|
||||
|
||||
```
|
||||
sudo apt install qemu-system-arm
|
||||
```
|
||||
|
||||
### 3.2 运行结果
|
||||
|
||||
通过以下命令启动QEMU并加载XiUOS ELF文件
|
||||
|
||||
```
|
||||
qemu-system-arm -machine microbit -nographic -kernel build/XiUOS_cortex-m0-emulator.elf
|
||||
```
|
||||
|
||||
QEMU运行起来后将会在终端上看到信息打印输出
|
||||
|
||||
|
||||
|
||||
### 3.3 调试
|
||||
|
||||
通过QEMU可以方便的对XiUOS进行调试，首先安装gdb调试工具
|
||||
```
|
||||
sudo apt install gdb-multiarch
|
||||
```
|
||||
|
||||
并通过以下命令启动QEMU
|
||||
|
||||
```
|
||||
qemu-system-arm -machine microbit -nographic -kernel build/XiUOS_cortex-m0-emulator.elf -s -S
|
||||
```
|
||||
|
||||
然后要重新开启另一个linux系统终端一个终端，执行命令
|
||||
|
||||
```
|
||||
gdb-multiarch build/XiUOS_cortex-m0-emulator.elf -ex "target remote localhost:1234"
|
||||
```
|
||||
|
|
@ -0,0 +1,39 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file board.c
|
||||
* @brief support cortex-m3-emulator init configure and start-up
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2021-05-13
|
||||
*/
|
||||
|
||||
|
||||
#include <board.h>
|
||||
#include <xiuos.h>
|
||||
#include <device.h>
|
||||
#include <arch_interrupt.h>
|
||||
|
||||
void SysTick_Handler(int irqn, void *arg)
|
||||
{
|
||||
TickAndTaskTimesliceUpdate();
|
||||
}
|
||||
DECLARE_HW_IRQ(SYSTICK_IRQN, SysTick_Handler, NONE);
|
||||
|
||||
void InitBoardHardware()
|
||||
{
|
||||
extern int InitHwUart(void);
|
||||
InitHwUart();
|
||||
InstallConsole(SERIAL_BUS_NAME_1, SERIAL_DRV_NAME_1, SERIAL_DEVICE_NAME_1);
|
||||
InitBoardMemory((void*)LM3S_SRAM_START, (void*)LM3S_SRAM_END);
|
||||
}
|
||||
|
|
@ -0,0 +1,38 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file board.h
|
||||
* @brief define cortex-m3-emulator init configure and start-up function
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2021-05-13
|
||||
*/
|
||||
|
||||
#ifndef __BOARD_H__
|
||||
#define __BOARD_H__
|
||||
|
||||
|
||||
extern void *__bss_end;
|
||||
extern void *_heap_end;
|
||||
#define MEM_OFFSET 0x20001000
|
||||
#define LM3S_SRAM_START ( ( ((unsigned long)(&__bss_end)) > MEM_OFFSET)? (unsigned long)(&__bss_end):(MEM_OFFSET) )
|
||||
#define LM3S_SRAM_END ( &_heap_end )
|
||||
|
||||
#define BSP_USING_UART1
|
||||
#define SERIAL_BUS_NAME_1 "uart0"
|
||||
#define SERIAL_DRV_NAME_1 "uart0_drv"
|
||||
#define SERIAL_DEVICE_NAME_1 "uart0_dev0"
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,14 @@
|
|||
export CROSS_COMPILE ?=/usr/bin/arm-none-eabi-
|
||||
|
||||
export CFLAGS := -mcpu=cortex-m0 -mthumb -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -fgnu89-inline -Wa,-mimplicit-it=thumb
|
||||
export AFLAGS := -c -mcpu=cortex-m0 -mthumb -ffunction-sections -fdata-sections -x assembler-with-cpp -Wa,-mimplicit-it=thumb -gdwarf-2
|
||||
export LFLAGS := -mcpu=cortex-m0 -mthumb -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_cortex-m0-emulator.map,-cref,-u,Reset_Handler -T $(BSP_ROOT)/link.lds
|
||||
export CXXFLAGS := -mcpu=cortex-m0 -mthumb -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g
|
||||
|
||||
export APPLFLAGS := -mcpu=cortex-m0 -mthumb -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_app.map,-cref,-u, -T $(BSP_ROOT)/link_userspace.lds
|
||||
|
||||
|
||||
export DEFINES := -DHAVE_CCONFIG_H -g
|
||||
|
||||
export ARCH = arm
|
||||
export MCU = cortex-m0
|
||||
|
|
@ -0,0 +1,331 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file connect_uart.c
|
||||
* @brief support cortex_m3_emulator board uart function and register to bus framework
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2021-05-10
|
||||
*/
|
||||
|
||||
#include <board.h>
|
||||
#include <xiuos.h>
|
||||
#include <device.h>
|
||||
#include <inc/hw_types.h>
|
||||
#include <driverlib/uart.h>
|
||||
#include <driverlib/gpio.h>
|
||||
#include <inc/hw_memmap.h>
|
||||
|
||||
#define NO_IMPL() KPrintf("%s is not implemented!\n", __func__)
|
||||
|
||||
#ifdef BSP_USING_UART1
|
||||
static struct SerialBus serial_bus_1;
|
||||
static struct SerialDriver serial_driver_1;
|
||||
static struct SerialHardwareDevice serial_device_1;
|
||||
#endif
|
||||
#ifdef BSP_USING_UART2
|
||||
static struct SerialBus serial_bus_2;
|
||||
static struct SerialDriver serial_driver_2;
|
||||
static struct SerialHardwareDevice serial_device_2;
|
||||
#endif
|
||||
|
||||
static void SerialCfgParamCheck(struct SerialCfgParam *serial_cfg_default, struct SerialCfgParam *serial_cfg_new)
|
||||
{
|
||||
struct SerialDataCfg *data_cfg_default = &serial_cfg_default->data_cfg;
|
||||
struct SerialDataCfg *data_cfg_new = &serial_cfg_new->data_cfg;
|
||||
|
||||
if ((data_cfg_default->serial_baud_rate != data_cfg_new->serial_baud_rate) && (data_cfg_new->serial_baud_rate)) {
|
||||
data_cfg_default->serial_baud_rate = data_cfg_new->serial_baud_rate;
|
||||
}
|
||||
|
||||
if ((data_cfg_default->serial_bit_order != data_cfg_new->serial_bit_order) && (data_cfg_new->serial_bit_order)) {
|
||||
data_cfg_default->serial_bit_order = data_cfg_new->serial_bit_order;
|
||||
}
|
||||
|
||||
if ((data_cfg_default->serial_buffer_size != data_cfg_new->serial_buffer_size) && (data_cfg_new->serial_buffer_size)) {
|
||||
data_cfg_default->serial_buffer_size = data_cfg_new->serial_buffer_size;
|
||||
}
|
||||
|
||||
if ((data_cfg_default->serial_data_bits != data_cfg_new->serial_data_bits) && (data_cfg_new->serial_data_bits)) {
|
||||
data_cfg_default->serial_data_bits = data_cfg_new->serial_data_bits;
|
||||
}
|
||||
|
||||
if ((data_cfg_default->serial_invert_mode != data_cfg_new->serial_invert_mode) && (data_cfg_new->serial_invert_mode)) {
|
||||
data_cfg_default->serial_invert_mode = data_cfg_new->serial_invert_mode;
|
||||
}
|
||||
|
||||
if ((data_cfg_default->serial_parity_mode != data_cfg_new->serial_parity_mode) && (data_cfg_new->serial_parity_mode)) {
|
||||
data_cfg_default->serial_parity_mode = data_cfg_new->serial_parity_mode;
|
||||
}
|
||||
|
||||
if ((data_cfg_default->serial_stop_bits != data_cfg_new->serial_stop_bits) && (data_cfg_new->serial_stop_bits)) {
|
||||
data_cfg_default->serial_stop_bits = data_cfg_new->serial_stop_bits;
|
||||
}
|
||||
}
|
||||
|
||||
static void UartHandler(struct SerialBus *serial_bus, struct SerialDriver *serial_drv)
|
||||
{
|
||||
struct SerialHardwareDevice *serial_dev = (struct SerialHardwareDevice *)serial_bus->bus.owner_haldev;
|
||||
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_drv->private_data;
|
||||
|
||||
uint32 status;
|
||||
|
||||
status = UARTIntStatus(serial_cfg->hw_cfg.serial_register_base, RET_TRUE);
|
||||
|
||||
/* clear interrupt status */
|
||||
UARTIntClear(serial_cfg->hw_cfg.serial_register_base, status);
|
||||
|
||||
while (UARTCharsAvail(serial_cfg->hw_cfg.serial_register_base)) {
|
||||
SerialSetIsr(serial_dev, SERIAL_EVENT_RX_IND);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
#ifdef BSP_USING_UART1
|
||||
void UartIsr1(int vector, void *param)
|
||||
{
|
||||
/* get serial bus 1 */
|
||||
UartHandler(&serial_bus_1, &serial_driver_1);
|
||||
}
|
||||
DECLARE_HW_IRQ(UART1_IRQn, UartIsr1, NONE);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_UART2
|
||||
void UartIsr2(int irqno)
|
||||
{
|
||||
/* get serial bus 2 */
|
||||
UartHandler(&serial_bus_2, &serial_driver_2);
|
||||
}
|
||||
#endif
|
||||
|
||||
static uint32 SerialInit(struct SerialDriver *serial_drv, struct BusConfigureInfo *configure_info)
|
||||
{
|
||||
NULL_PARAM_CHECK(serial_drv);
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
static uint32 SerialConfigure(struct SerialDriver *serial_drv, int serial_operation_cmd)
|
||||
{
|
||||
NO_IMPL();
|
||||
return 0;
|
||||
}
|
||||
|
||||
static uint32 SerialDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
|
||||
{
|
||||
NULL_PARAM_CHECK(drv);
|
||||
NULL_PARAM_CHECK(configure_info);
|
||||
|
||||
x_err_t ret = EOK;
|
||||
int serial_operation_cmd;
|
||||
struct SerialDriver *serial_drv = (struct SerialDriver *)drv;
|
||||
|
||||
switch (configure_info->configure_cmd)
|
||||
{
|
||||
case OPE_INT:
|
||||
ret = SerialInit(serial_drv, configure_info);
|
||||
break;
|
||||
case OPE_CFG:
|
||||
serial_operation_cmd = *(int *)configure_info->private_data;
|
||||
ret = SerialConfigure(serial_drv, serial_operation_cmd);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int SerialPutChar(struct SerialHardwareDevice *serial_dev, char c)
|
||||
{
|
||||
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_dev->private_data;
|
||||
while (UARTCharPutNonBlocking(serial_cfg->hw_cfg.serial_register_base, c) == RET_FALSE);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int SerialGetChar(struct SerialHardwareDevice *serial_dev)
|
||||
{
|
||||
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_dev->private_data;
|
||||
long val = UARTCharGetNonBlocking(serial_cfg->hw_cfg.serial_register_base);
|
||||
if (val > 0)
|
||||
return (int)val;
|
||||
else
|
||||
return -1;
|
||||
}
|
||||
|
||||
static const struct SerialDataCfg data_cfg_init =
|
||||
{
|
||||
.serial_baud_rate = BAUD_RATE_115200,
|
||||
.serial_data_bits = DATA_BITS_8,
|
||||
.serial_stop_bits = STOP_BITS_1,
|
||||
.serial_parity_mode = PARITY_NONE,
|
||||
.serial_bit_order = BIT_ORDER_LSB,
|
||||
.serial_invert_mode = NRZ_NORMAL,
|
||||
.serial_buffer_size = SERIAL_RB_BUFSZ,
|
||||
};
|
||||
|
||||
/*manage the serial device operations*/
|
||||
static const struct SerialDrvDone drv_done =
|
||||
{
|
||||
.init = SerialInit,
|
||||
.configure = SerialConfigure,
|
||||
};
|
||||
|
||||
/*manage the serial device hal operations*/
|
||||
static struct SerialHwDevDone hwdev_done =
|
||||
{
|
||||
.put_char = SerialPutChar,
|
||||
.get_char = SerialGetChar,
|
||||
};
|
||||
|
||||
static int BoardSerialBusInit(struct SerialBus *serial_bus, struct SerialDriver *serial_driver, const char *bus_name, const char *drv_name)
|
||||
{
|
||||
|
||||
x_err_t ret = EOK;
|
||||
|
||||
/*Init the serial bus */
|
||||
|
||||
ret = SerialBusInit(serial_bus, bus_name);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUart SerialBusInit error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
/*Init the serial driver*/
|
||||
ret = SerialDriverInit(serial_driver, drv_name);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUart SerialDriverInit error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
/*Attach the serial driver to the serial bus*/
|
||||
ret = SerialDriverAttachToBus(drv_name, bus_name);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUart SerialDriverAttachToBus error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*Attach the serial device to the serial bus*/
|
||||
static int BoardSerialDevBend(struct SerialHardwareDevice *serial_device, void *serial_param, const char *bus_name, const char *dev_name)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
|
||||
ret = SerialDeviceRegister(serial_device, serial_param, dev_name);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUart SerialDeviceInit device %s error %d\n", dev_name, ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = SerialDeviceAttachToBus(dev_name, bus_name);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUart SerialDeviceAttachToBus device %s error %d\n", dev_name, ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
int InitHwUart(void)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
|
||||
UARTlInitialize();
|
||||
#ifdef BSP_USING_UART1
|
||||
memset(&serial_bus_1, 0, sizeof(struct SerialBus));
|
||||
memset(&serial_driver_1, 0, sizeof(struct SerialDriver));
|
||||
memset(&serial_device_1, 0, sizeof(struct SerialHardwareDevice));
|
||||
|
||||
static struct SerialCfgParam serial_cfg_1;
|
||||
memset(&serial_cfg_1, 0, sizeof(struct SerialCfgParam));
|
||||
|
||||
static struct SerialDevParam serial_dev_param_1;
|
||||
memset(&serial_dev_param_1, 0, sizeof(struct SerialDevParam));
|
||||
|
||||
serial_driver_1.drv_done = &drv_done;
|
||||
serial_driver_1.configure = &SerialDrvConfigure;
|
||||
serial_device_1.hwdev_done = &hwdev_done;
|
||||
|
||||
serial_cfg_1.data_cfg = data_cfg_init;
|
||||
|
||||
serial_cfg_1.hw_cfg.serial_register_base = UART0_BASE;
|
||||
serial_driver_1.private_data = (void *)&serial_cfg_1;
|
||||
|
||||
serial_dev_param_1.serial_work_mode = SIGN_OPER_INT_RX;
|
||||
serial_device_1.haldev.private_data = (void *)&serial_dev_param_1;
|
||||
|
||||
/* enable UART0 clock */
|
||||
// SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
|
||||
// SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
|
||||
|
||||
/* set UART0 pinmux */
|
||||
// GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
|
||||
|
||||
/* Configure the UART for 115,200, 8-N-1 operation. */
|
||||
// UARTConfigSetExpClk(UART0_BASE, SysCtlClockGet(), serial_cfg_1.data_cfg.serial_baud_rate,
|
||||
// (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
|
||||
// UART_CONFIG_PAR_NONE));
|
||||
|
||||
ret = BoardSerialBusInit(&serial_bus_1, &serial_driver_1, SERIAL_BUS_NAME_1, SERIAL_DRV_NAME_1);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUart uarths error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = BoardSerialDevBend(&serial_device_1, (void *)&serial_cfg_1, SERIAL_BUS_NAME_1, SERIAL_DEVICE_NAME_1);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUart uarths error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_UART2
|
||||
memset(&serial_bus_2, 0, sizeof(struct SerialBus));
|
||||
memset(&serial_driver_2, 0, sizeof(struct SerialDriver));
|
||||
memset(&serial_device_2, 0, sizeof(struct SerialHardwareDevice));
|
||||
|
||||
static struct SerialCfgParam serial_cfg_2;
|
||||
memset(&serial_cfg_2, 0, sizeof(struct SerialCfgParam));
|
||||
|
||||
static struct SerialDevParam serial_dev_param_2;
|
||||
memset(&serial_dev_param_2, 0, sizeof(struct SerialDevParam));
|
||||
|
||||
serial_driver_2.drv_done = &drv_done;
|
||||
serial_driver_2.configure = &SerialDrvConfigure;
|
||||
serial_device_2.hwdev_done = &hwdev_done;
|
||||
|
||||
serial_cfg_2.data_cfg = data_cfg_init;
|
||||
|
||||
serial_cfg_2.hw_cfg.serial_register_base = UART1_BASE;
|
||||
serial_driver_2.private_data = (void *)&serial_cfg_2;
|
||||
|
||||
serial_dev_param_2.serial_work_mode = SIGN_OPER_INT_RX | SIGN_OPER_POLL_RX;
|
||||
serial_device_2.haldev.private_data = (void *)&serial_dev_param_2;
|
||||
|
||||
ret = BoardSerialBusInit(&serial_bus_2, &serial_driver_2, SERIAL_BUS_NAME_2, SERIAL_DRV_NAME_2);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUart uarths error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = BoardSerialDevBend(&serial_device_2, (void *)&serial_cfg_2, SERIAL_BUS_NAME_2, SERIAL_DEVICE_NAME_2);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUart uarths error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
#endif
|
||||
return ret;
|
||||
}
|
||||
|
|
@ -0,0 +1,72 @@
|
|||
|
||||
MEMORY {
|
||||
flash (rx) : ORIGIN = 0x00000000, LENGTH = 0x40000
|
||||
sram (rwx) : ORIGIN = 0x20000000, LENGTH = 0x4000
|
||||
}
|
||||
|
||||
OUTPUT_FORMAT ("elf32-littlearm")
|
||||
__SYSTEM_STACKSIZE__ = 0x400;
|
||||
|
||||
ENTRY(Reset_Handler)
|
||||
SECTIONS {
|
||||
.text : {
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.isr_vector))
|
||||
. = ALIGN(4);
|
||||
*(.text*)
|
||||
*(.rodata*)
|
||||
|
||||
_shell_command_start = .;
|
||||
KEEP (*(shellCommand))
|
||||
_shell_command_end = .;
|
||||
. = ALIGN(4);
|
||||
|
||||
__isrtbl_idx_start = .;
|
||||
KEEP(*(.isrtbl.idx))
|
||||
__isrtbl_start = .;
|
||||
KEEP(*(.isrtbl))
|
||||
__isrtbl_end = .;
|
||||
. = ALIGN(4);
|
||||
|
||||
PROVIDE(g_service_table_start = ABSOLUTE(.));
|
||||
KEEP(*(.g_service_table))
|
||||
PROVIDE(g_service_table_end = ABSOLUTE(.));
|
||||
|
||||
PROVIDE(_etext = ABSOLUTE(.));
|
||||
_etext = .;
|
||||
} > flash = 0
|
||||
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
_sidata = .;
|
||||
} > flash
|
||||
__exidx_end = .;
|
||||
|
||||
.data : AT (_sidata) {
|
||||
. = ALIGN(4);
|
||||
_sdata = .;
|
||||
*(.data*)
|
||||
. = ALIGN(4);
|
||||
_edata = .;
|
||||
} > sram
|
||||
|
||||
.bss : {
|
||||
. = ALIGN(4);
|
||||
_sbss = .;
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
_ebss = .;
|
||||
} > sram
|
||||
__bss_end = .;
|
||||
__end = .;
|
||||
|
||||
.stack ORIGIN(sram) + LENGTH(sram) - __SYSTEM_STACKSIZE__ :
|
||||
{
|
||||
PROVIDE( _heap_end = . );
|
||||
. = __SYSTEM_STACKSIZE__;
|
||||
PROVIDE( _sp = . );
|
||||
} >sram
|
||||
}
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
SRC_DIR := driverlib
|
||||
|
||||
include $(KERNEL_ROOT)/compiler.mk
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
SRC_FILES := uart.c
|
||||
# SRC_FILES := uart.c
|
||||
include $(KERNEL_ROOT)/compiler.mk
|
||||
|
|
@ -0,0 +1,13 @@
|
|||
#pragma once
|
||||
/* GPIO */
|
||||
#define GPIO_DIRSET ADDR(0x50000518)
|
||||
#define GPIO_DIRCLR ADDR(0x5000051c)
|
||||
#define GPIO_PINCNF ARRAY(0x50000700)
|
||||
|
||||
#define GPIO_PINCNF_PULL_Pos 2
|
||||
#define GPIO_PINCNF_PULL_Wid 2
|
||||
#define GPIO_Pullup 0x3
|
||||
|
||||
#define GPIO_PINCNF_DRIVE_Pos 8
|
||||
#define GPIO_PINCNF_DRIVE_Wid 3
|
||||
#define GPIO_S0D1 0x6 // Open drain
|
||||
|
|
@ -0,0 +1,23 @@
|
|||
#define BIT(i) (1 << (i))
|
||||
|
||||
#define SET_BIT(reg, n) reg |= BIT(n)
|
||||
#define CLR_BIT(reg, n) reg &= ~BIT(n)
|
||||
|
||||
#define SET_FIELD(reg, field, val) \
|
||||
reg = (reg & ~MASK(field)) | FIELD(field, val)
|
||||
|
||||
#define GET_FIELD(reg, field) \
|
||||
((reg >> field##_Pos) & MASK0(field))
|
||||
|
||||
#define FIELD(field, val) \
|
||||
(((val) & MASK0(field)) << field##_Pos)
|
||||
|
||||
#define MASK(field) (MASK0(field) << field##_Pos)
|
||||
|
||||
#define MASK0(field) (~((-2) << (field##_Wid-1)))
|
||||
|
||||
#define SET_BYTE(reg, n, v) \
|
||||
reg = (reg & ~(0xff << 8*n)) | ((v & 0xff) << 8*n)
|
||||
|
||||
#define ADDR(x) (* (unsigned volatile *) (x))
|
||||
#define ARRAY(x) ((unsigned volatile *) (x))
|
||||
|
|
@ -0,0 +1,156 @@
|
|||
//*****************************************************************************
|
||||
//
|
||||
// uart.c - Driver for the UART.
|
||||
//
|
||||
// Copyright (c) 2005-2013 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 10636 of the Stellaris Peripheral Driver Library.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
//! \addtogroup uart_api
|
||||
//! @{
|
||||
//
|
||||
//*****************************************************************************
|
||||
#include <stdarg.h>
|
||||
|
||||
#include "inc/hw_types.h"
|
||||
#include "inc/hw_nvic.h"
|
||||
#include "driverlib/uart.h"
|
||||
#include "driverlib/gpio.h"
|
||||
#include "driverlib/opt.h"
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// This is a mapping between interrupt number (for the peripheral interrupts
|
||||
// only) and the register that contains the interrupt enable for that
|
||||
// interrupt.
|
||||
//
|
||||
//*****************************************************************************
|
||||
static const unsigned long g_pulEnRegs[] =
|
||||
{
|
||||
NVIC_EN0, NVIC_EN1, NVIC_EN2, NVIC_EN3, NVIC_EN4
|
||||
};
|
||||
|
||||
void UARTlInitialize(void) {
|
||||
GPIO_DIRSET = BIT(USB_TX);
|
||||
GPIO_DIRCLR = BIT(USB_RX);
|
||||
SET_FIELD(GPIO_PINCNF[USB_TX], GPIO_PINCNF_PULL, GPIO_Pullup);
|
||||
SET_FIELD(GPIO_PINCNF[USB_RX], GPIO_PINCNF_PULL, GPIO_Pullup);
|
||||
|
||||
UART_BAUDRATE = UART_BAUD_9600; // 9600 baud
|
||||
UART_CONFIG = 0; // format 8N1
|
||||
UART_PSELTXD = USB_TX; // choose pins
|
||||
UART_PSELRXD = USB_RX;
|
||||
/* Configure the uart device interrupt */
|
||||
UART_ENABLE = UART_Enabled;
|
||||
UART_INTENSET = (1 << 17) | (1<<2);
|
||||
UART_STARTTX = 1;
|
||||
UART_STARTRX = 1;
|
||||
UART_RXDRDY = 0;
|
||||
UART_TXDRDY = 1;
|
||||
/* Enable the uart interrupt in NVIC */
|
||||
HWREG(g_pulEnRegs[(18 - 16) / 32]) = 1 << ((18 - 16) & 31);
|
||||
}
|
||||
|
||||
void UARTConfigSetExpClk(unsigned long ulBase, unsigned long ulUARTClk,
|
||||
unsigned long ulBaud, unsigned long ulConfig)
|
||||
{
|
||||
NO_IMPL();
|
||||
}
|
||||
|
||||
tBoolean UARTCharsAvail(unsigned long ulBase)
|
||||
{
|
||||
return UART_RXDRDY;
|
||||
}
|
||||
|
||||
long UARTCharGetNonBlocking(unsigned long ulBase)
|
||||
{
|
||||
char ch;
|
||||
|
||||
if (UART_RXDRDY) {
|
||||
UART_RXDRDY = 0;
|
||||
ch = UART_RXD;
|
||||
return ch;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
long UARTCharGet(unsigned long ulBase)
|
||||
{
|
||||
char ch;
|
||||
|
||||
while (!UART_RXDRDY);
|
||||
UART_RXDRDY = 0;
|
||||
ch = UART_RXD;
|
||||
return ch;
|
||||
}
|
||||
|
||||
tBoolean UARTCharPutNonBlocking(unsigned long ulBase, unsigned char ucData)
|
||||
{
|
||||
if (UART_TXDRDY) {
|
||||
UART_TXDRDY = 0;
|
||||
UART_TXD = ucData;
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
}
|
||||
|
||||
void UARTCharPut(unsigned long ulBase, unsigned char ucData)
|
||||
{
|
||||
while (!UART_TXDRDY);
|
||||
UART_TXDRDY = 0;
|
||||
UART_TXD = ucData;
|
||||
}
|
||||
|
||||
void UARTIntEnable(unsigned long ulBase, unsigned long ulIntFlags)
|
||||
{
|
||||
NO_IMPL();
|
||||
}
|
||||
|
||||
void UARTIntDisable(unsigned long ulBase, unsigned long ulIntFlags)
|
||||
{
|
||||
NO_IMPL();
|
||||
}
|
||||
|
||||
unsigned long UARTIntStatus(unsigned long ulBase, tBoolean bMasked)
|
||||
{
|
||||
return UART_INTENCLR;
|
||||
}
|
||||
|
||||
void UARTIntClear(unsigned long ulBase, unsigned long ulIntFlags)
|
||||
{
|
||||
UART_INTENCLR = ulIntFlags;
|
||||
UART_INTENSET = ulIntFlags;
|
||||
}
|
||||
|
|
@ -0,0 +1,70 @@
|
|||
#ifndef __UART_H__
|
||||
#define __UART_H__
|
||||
|
||||
#include <xs_base.h>
|
||||
|
||||
#define NO_IMPL() KPrintf("%s is not implemented!\n", __func__)
|
||||
|
||||
/* Device pins */
|
||||
#define USB_TX 24
|
||||
#define USB_RX 25
|
||||
|
||||
/* UART */
|
||||
#define UART_STARTRX ADDR(0x40002000)
|
||||
#define UART_STARTTX ADDR(0x40002008)
|
||||
#define UART_RXDRDY ADDR(0x40002108)
|
||||
#define UART_TXDRDY ADDR(0x4000211c)
|
||||
#define UART_ENABLE ADDR(0x40002500)
|
||||
#define UART_PSELTXD ADDR(0x4000250c)
|
||||
#define UART_PSELRXD ADDR(0x40002514)
|
||||
#define UART_RXD ADDR(0x40002518)
|
||||
#define UART_TXD ADDR(0x4000251c)
|
||||
#define UART_BAUDRATE ADDR(0x40002524)
|
||||
#define UART_CONFIG ADDR(0x4000256c)
|
||||
#define UART_INTEN ADDR(0x40002300)
|
||||
#define UART_INTENSET ADDR(0x40002304)
|
||||
#define UART_INTENCLR ADDR(0x40002308)
|
||||
|
||||
#define UART_Enabled 0x4
|
||||
#define UART_INT_TXDRDY 7
|
||||
#define UART_INT_RXDRDY 2
|
||||
|
||||
#define UART_BAUD_9600 0x00275000
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
extern void UARTlInitialize(void);
|
||||
extern void UARTConfigSetExpClk(unsigned long ulBase, unsigned long ulUARTClk,
|
||||
unsigned long ulBaud, unsigned long ulConfig);
|
||||
extern tBoolean UARTCharsAvail(unsigned long ulBase);
|
||||
extern long UARTCharGetNonBlocking(unsigned long ulBase);
|
||||
long UARTCharGet(unsigned long ulBase);
|
||||
extern tBoolean UARTCharPutNonBlocking(unsigned long ulBase,
|
||||
unsigned char ucData);
|
||||
extern void UARTCharPut(unsigned long ulBase, unsigned char ucData);
|
||||
extern void UARTIntEnable(unsigned long ulBase, unsigned long ulIntFlags);
|
||||
extern void UARTIntDisable(unsigned long ulBase, unsigned long ulIntFlags);
|
||||
extern unsigned long UARTIntStatus(unsigned long ulBase, tBoolean bMasked);
|
||||
extern void UARTIntClear(unsigned long ulBase, unsigned long ulIntFlags);
|
||||
|
||||
#ifndef DEPRECATED
|
||||
|
||||
#define UARTCharNonBlockingGet(a) \
|
||||
UARTCharGetNonBlocking(a)
|
||||
#define UARTCharNonBlockingPut(a, b) \
|
||||
UARTCharPutNonBlocking(a, b)
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Mark the end of the C bindings section for C++ compilers.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __UART_H__
|
||||
|
|
@ -0,0 +1,44 @@
|
|||
//*****************************************************************************
|
||||
//
|
||||
// hw_memmap.h - Macros defining the memory map of Stellaris.
|
||||
//
|
||||
// Copyright (c) 2005-2013 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 10636 of the Stellaris Firmware Development Package.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __HW_MEMMAP_H__
|
||||
#define __HW_MEMMAP_H__
|
||||
|
||||
#define UART0_BASE 0x40002000 // UART0
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,212 @@
|
|||
//*****************************************************************************
|
||||
//
|
||||
// hw_types.h - Common types and macros.
|
||||
//
|
||||
// Copyright (c) 2005-2013 Texas Instruments Incorporated. All rights reserved.
|
||||
// Software License Agreement
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without
|
||||
// modification, are permitted provided that the following conditions
|
||||
// are met:
|
||||
//
|
||||
// Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
//
|
||||
// Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in the
|
||||
// documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
//
|
||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||
// its contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//
|
||||
// This is part of revision 10636 of the Stellaris Firmware Development Package.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifndef __HW_TYPES_H__
|
||||
#define __HW_TYPES_H__
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Define a boolean type, and values for true and false.
|
||||
//
|
||||
//*****************************************************************************
|
||||
typedef unsigned char tBoolean;
|
||||
|
||||
#ifndef true
|
||||
#define true 1
|
||||
#endif
|
||||
|
||||
#ifndef false
|
||||
#define false 0
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Macros for hardware access, both direct and via the bit-band region.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#define HWREG(x) \
|
||||
(*((volatile unsigned long *)(x)))
|
||||
#define HWREGH(x) \
|
||||
(*((volatile unsigned short *)(x)))
|
||||
#define HWREGB(x) \
|
||||
(*((volatile unsigned char *)(x)))
|
||||
#define HWREGBITW(x, b) \
|
||||
HWREG(((unsigned long)(x) & 0xF0000000) | 0x02000000 | \
|
||||
(((unsigned long)(x) & 0x000FFFFF) << 5) | ((b) << 2))
|
||||
#define HWREGBITH(x, b) \
|
||||
HWREGH(((unsigned long)(x) & 0xF0000000) | 0x02000000 | \
|
||||
(((unsigned long)(x) & 0x000FFFFF) << 5) | ((b) << 2))
|
||||
#define HWREGBITB(x, b) \
|
||||
HWREGB(((unsigned long)(x) & 0xF0000000) | 0x02000000 | \
|
||||
(((unsigned long)(x) & 0x000FFFFF) << 5) | ((b) << 2))
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Helper Macros for determining silicon revisions, etc.
|
||||
//
|
||||
// These macros will be used by Driverlib at "run-time" to create necessary
|
||||
// conditional code blocks that will allow a single version of the Driverlib
|
||||
// "binary" code to support multiple(all) Stellaris silicon revisions.
|
||||
//
|
||||
// It is expected that these macros will be used inside of a standard 'C'
|
||||
// conditional block of code, e.g.
|
||||
//
|
||||
// if(CLASS_IS_SANDSTORM)
|
||||
// {
|
||||
// do some Sandstorm-class specific code here.
|
||||
// }
|
||||
//
|
||||
// By default, these macros will be defined as run-time checks of the
|
||||
// appropriate register(s) to allow creation of run-time conditional code
|
||||
// blocks for a common DriverLib across the entire Stellaris family.
|
||||
//
|
||||
// However, if code-space optimization is required, these macros can be "hard-
|
||||
// coded" for a specific version of Stellaris silicon. Many compilers will
|
||||
// then detect the "hard-coded" conditionals, and appropriately optimize the
|
||||
// code blocks, eliminating any "unreachable" code. This would result in
|
||||
// a smaller Driverlib, thus producing a smaller final application size, but
|
||||
// at the cost of limiting the Driverlib binary to a specific Stellaris
|
||||
// silicon revision.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifndef CLASS_IS_SANDSTORM
|
||||
#define CLASS_IS_SANDSTORM \
|
||||
(((HWREG(SYSCTL_DID0) & SYSCTL_DID0_VER_M) == SYSCTL_DID0_VER_0) || \
|
||||
((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_VER_M | SYSCTL_DID0_CLASS_M)) == \
|
||||
(SYSCTL_DID0_VER_1 | SYSCTL_DID0_CLASS_SANDSTORM)))
|
||||
#endif
|
||||
|
||||
#ifndef CLASS_IS_FURY
|
||||
#define CLASS_IS_FURY \
|
||||
((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_VER_M | SYSCTL_DID0_CLASS_M)) == \
|
||||
(SYSCTL_DID0_VER_1 | SYSCTL_DID0_CLASS_FURY))
|
||||
#endif
|
||||
|
||||
#ifndef CLASS_IS_DUSTDEVIL
|
||||
#define CLASS_IS_DUSTDEVIL \
|
||||
((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_VER_M | SYSCTL_DID0_CLASS_M)) == \
|
||||
(SYSCTL_DID0_VER_1 | SYSCTL_DID0_CLASS_DUSTDEVIL))
|
||||
#endif
|
||||
|
||||
#ifndef CLASS_IS_TEMPEST
|
||||
#define CLASS_IS_TEMPEST \
|
||||
((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_VER_M | SYSCTL_DID0_CLASS_M)) == \
|
||||
(SYSCTL_DID0_VER_1 | SYSCTL_DID0_CLASS_TEMPEST))
|
||||
#endif
|
||||
|
||||
#ifndef CLASS_IS_FIRESTORM
|
||||
#define CLASS_IS_FIRESTORM \
|
||||
((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_VER_M | SYSCTL_DID0_CLASS_M)) == \
|
||||
(SYSCTL_DID0_VER_1 | SYSCTL_DID0_CLASS_FIRESTORM))
|
||||
#endif
|
||||
|
||||
#ifndef REVISION_IS_A0
|
||||
#define REVISION_IS_A0 \
|
||||
((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \
|
||||
(SYSCTL_DID0_MAJ_REVA | SYSCTL_DID0_MIN_0))
|
||||
#endif
|
||||
|
||||
#ifndef REVISION_IS_A1
|
||||
#define REVISION_IS_A1 \
|
||||
((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \
|
||||
(SYSCTL_DID0_MAJ_REVA | SYSCTL_DID0_MIN_0))
|
||||
#endif
|
||||
|
||||
#ifndef REVISION_IS_A2
|
||||
#define REVISION_IS_A2 \
|
||||
((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \
|
||||
(SYSCTL_DID0_MAJ_REVA | SYSCTL_DID0_MIN_2))
|
||||
#endif
|
||||
|
||||
#ifndef REVISION_IS_B0
|
||||
#define REVISION_IS_B0 \
|
||||
((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \
|
||||
(SYSCTL_DID0_MAJ_REVB | SYSCTL_DID0_MIN_0))
|
||||
#endif
|
||||
|
||||
#ifndef REVISION_IS_B1
|
||||
#define REVISION_IS_B1 \
|
||||
((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \
|
||||
(SYSCTL_DID0_MAJ_REVB | SYSCTL_DID0_MIN_1))
|
||||
#endif
|
||||
|
||||
#ifndef REVISION_IS_C0
|
||||
#define REVISION_IS_C0 \
|
||||
((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \
|
||||
(SYSCTL_DID0_MAJ_REVC | SYSCTL_DID0_MIN_0))
|
||||
#endif
|
||||
|
||||
#ifndef REVISION_IS_C1
|
||||
#define REVISION_IS_C1 \
|
||||
((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \
|
||||
(SYSCTL_DID0_MAJ_REVC | SYSCTL_DID0_MIN_1))
|
||||
#endif
|
||||
|
||||
#ifndef REVISION_IS_C2
|
||||
#define REVISION_IS_C2 \
|
||||
((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \
|
||||
(SYSCTL_DID0_MAJ_REVC | SYSCTL_DID0_MIN_2))
|
||||
#endif
|
||||
|
||||
#ifndef REVISION_IS_C3
|
||||
#define REVISION_IS_C3 \
|
||||
((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \
|
||||
(SYSCTL_DID0_MAJ_REVC | SYSCTL_DID0_MIN_3))
|
||||
#endif
|
||||
|
||||
#ifndef REVISION_IS_C5
|
||||
#define REVISION_IS_C5 \
|
||||
((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \
|
||||
(SYSCTL_DID0_MAJ_REVC | SYSCTL_DID0_MIN_5))
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Deprecated silicon class and revision detection macros.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#ifndef DEPRECATED
|
||||
#define DEVICE_IS_SANDSTORM CLASS_IS_SANDSTORM
|
||||
#define DEVICE_IS_FURY CLASS_IS_FURY
|
||||
#define DEVICE_IS_REVA2 REVISION_IS_A2
|
||||
#define DEVICE_IS_REVC1 REVISION_IS_C1
|
||||
#define DEVICE_IS_REVC2 REVISION_IS_C2
|
||||
#endif
|
||||
|
||||
#endif // __HW_TYPES_H__
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
SRC_DIR := Libraries
|
||||
|
||||
include $(KERNEL_ROOT)/compiler.mk
|
||||
|
|
@ -135,6 +135,17 @@ KERNELPATHS :=-I$(BSP_ROOT) \
|
|||
-I$(KERNEL_ROOT)/include #
|
||||
endif
|
||||
|
||||
ifeq ($(BSP_ROOT),$(KERNEL_ROOT)/board/cortex-m0-emulator)
|
||||
KERNELPATHS :=-I$(BSP_ROOT) \
|
||||
-I$(KERNEL_ROOT)/arch/arm/cortex-m0 \
|
||||
-I$(BSP_ROOT)/third_party_driver \
|
||||
-I$(BSP_ROOT)/third_party_driver/Libraries/driverlib \
|
||||
-I$(BSP_ROOT)/third_party_driver/Libraries/ \
|
||||
-I$(BSP_ROOT)/third_party_driver/Libraries/inc \
|
||||
-I$(KERNEL_ROOT)/include \
|
||||
-I$(BSP_ROOT)/include #
|
||||
endif
|
||||
|
||||
ifeq ($(BSP_ROOT),$(KERNEL_ROOT)/board/cortex-m3-emulator)
|
||||
KERNELPATHS :=-I$(BSP_ROOT) \
|
||||
-I$(KERNEL_ROOT)/arch/arm/cortex-m3 \
|
||||
|
|
|
|||
|
|
@ -73,6 +73,7 @@ extern "C" {
|
|||
|
||||
#define SERIAL_DMA_RX 0x01
|
||||
#define SERIAL_DMA_TX 0x02
|
||||
#define KEY_LENGTH 8
|
||||
|
||||
struct SerialTx
|
||||
{
|
||||
|
|
|
|||
|
|
@ -122,30 +122,41 @@ static inline int SerialDevIntRead(struct SerialHardwareDevice *serial_dev, stru
|
|||
NULL_PARAM_CHECK(serial_dev);
|
||||
NULL_PARAM_CHECK(read_param);
|
||||
|
||||
int char_num = 0;
|
||||
struct SerialHwDevDone *hwdev_done = serial_dev->hwdev_done;
|
||||
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_dev->private_data;
|
||||
uint8 *read_data = (uint8 *)read_param->buffer;
|
||||
x_size_t read_length = read_param->size;
|
||||
|
||||
int start_pointer, end_pointer;
|
||||
int i;
|
||||
|
||||
while (read_length)
|
||||
{
|
||||
uint8 get_char;
|
||||
x_base lock;
|
||||
|
||||
start_pointer = serial_dev->serial_fifo.serial_rx->serial_recv_num;
|
||||
end_pointer = serial_dev->serial_fifo.serial_rx->serial_send_num;
|
||||
lock = CriticalAreaLock();
|
||||
|
||||
if (serial_dev->serial_fifo.serial_rx->serial_recv_num == serial_dev->serial_fifo.serial_rx->serial_send_num) {
|
||||
if (start_pointer == end_pointer) {
|
||||
if (RET_FALSE == serial_dev->serial_fifo.serial_rx->serial_rx_full) {
|
||||
CriticalAreaUnLock(lock);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
get_char = serial_dev->serial_fifo.serial_rx->serial_rx_buffer[serial_dev->serial_fifo.serial_rx->serial_recv_num];
|
||||
serial_dev->serial_fifo.serial_rx->serial_recv_num += 1;
|
||||
if (serial_dev->serial_fifo.serial_rx->serial_recv_num >= serial_cfg->data_cfg.serial_buffer_size) {
|
||||
serial_dev->serial_fifo.serial_rx->serial_recv_num = 0;
|
||||
|
||||
/* Read all the chars from the serial_rx_buffer */
|
||||
while (start_pointer != end_pointer)
|
||||
{
|
||||
read_data[char_num] = serial_dev->serial_fifo.serial_rx->serial_rx_buffer[start_pointer];
|
||||
start_pointer += 1;
|
||||
if (start_pointer >= serial_cfg->data_cfg.serial_buffer_size) {
|
||||
start_pointer = 0;
|
||||
}
|
||||
char_num = char_num + 1;
|
||||
}
|
||||
read_data[char_num]='\0';
|
||||
|
||||
if (RET_TRUE == serial_dev->serial_fifo.serial_rx->serial_rx_full) {
|
||||
serial_dev->serial_fifo.serial_rx->serial_rx_full = RET_FALSE;
|
||||
|
|
@ -153,10 +164,9 @@ static inline int SerialDevIntRead(struct SerialHardwareDevice *serial_dev, stru
|
|||
|
||||
CriticalAreaUnLock(lock);
|
||||
|
||||
*read_data = get_char;
|
||||
read_data++;
|
||||
read_length--;
|
||||
read_param->read_length++;
|
||||
read_param->read_length += char_num;
|
||||
serial_dev->serial_fifo.serial_rx->serial_recv_num = start_pointer;
|
||||
}
|
||||
|
||||
return EOK;
|
||||
|
|
|
|||
|
|
@ -9,7 +9,6 @@
|
|||
*/
|
||||
/*change log:
|
||||
Change Chinese comment to English comment
|
||||
|
||||
*/
|
||||
|
||||
#include "shell.h"
|
||||
|
|
@ -18,15 +17,12 @@
|
|||
#include "stdarg.h"
|
||||
#include "shell_ext.h"
|
||||
#include <xiuos.h>
|
||||
|
||||
#ifdef FS_VFS
|
||||
#include "iot-vfs.h"
|
||||
#endif
|
||||
|
||||
#ifndef CommandDescSize
|
||||
#define CommandDescSize 36
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief default user
|
||||
*/
|
||||
|
|
@ -48,7 +44,6 @@ const ShellCommand shellUserDefault SECTION("shellCommand") =
|
|||
extern const unsigned long _shell_command_end;
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
* @brief shell Constant text index
|
||||
*/
|
||||
|
|
@ -186,7 +181,6 @@ void shellInit(Shell *shell, char *buffer, unsigned short size)
|
|||
#error not supported compiler, please use command table mode
|
||||
#endif
|
||||
|
||||
|
||||
shellAdd(shell);
|
||||
|
||||
shellSetUser(shell, shellSeekCommand(shell,
|
||||
|
|
@ -298,7 +292,6 @@ static unsigned short shellWriteCommandDesc(Shell *shell, const char *string)
|
|||
#ifdef FS_VFS
|
||||
extern char working_dir[];
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Shell write new command line
|
||||
*
|
||||
|
|
@ -1515,7 +1508,6 @@ SHELL_EXPORT_KEY(SHELL_CMD_PERMISSION(0)|SHELL_CMD_ENABLE_UNCHECKED,
|
|||
0x0D0A0000, shellEnter, enter);
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
* @brief shell help
|
||||
*
|
||||
|
|
@ -1569,7 +1561,6 @@ void shellHandler(Shell *shell, char data)
|
|||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Calculate the offset of the current byte in the key value according to the recorded key value */
|
||||
char keyByteOffset = 24;
|
||||
int keyFilter = 0x00000000;
|
||||
|
|
@ -1645,14 +1636,21 @@ void shellTask(void *param)
|
|||
{
|
||||
// KPrintf("this is in 1733");
|
||||
Shell *shell = (Shell *)param;
|
||||
char data;
|
||||
|
||||
/* One input key from the the keyboard/uart may consist of mutliple characters (e.g., arrow keys). */
|
||||
char data[KEY_LENGTH];
|
||||
int i;
|
||||
int data_len;
|
||||
|
||||
while(RET_TRUE)
|
||||
{
|
||||
if (shell->read && shell->read(&data) == 0)
|
||||
{
|
||||
if (shell->read && shell->read(data) == 0) {
|
||||
// KPrintf("in 1741 the char is: '%c' and ascii code is %d.\n\n",data,data);
|
||||
// KPrintf("the buffer is:'%s'\n\n",shell->parser.);
|
||||
shellHandler(shell, data);
|
||||
data_len = strlen(data);
|
||||
for (i = 0; i < data_len; i++) {
|
||||
shellHandler(shell, data[i]);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -1676,7 +1674,6 @@ users, shellUsers, list all user);
|
|||
#endif
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Output variable list (shell call)
|
||||
*/
|
||||
|
|
@ -1694,7 +1691,6 @@ SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_FUNC)|SHELL_CMD_DISABLE_RE
|
|||
vars, shellVars, list all var);
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
* @brief Output key list (shell call)
|
||||
*/
|
||||
|
|
@ -1711,7 +1707,6 @@ SHELL_EXPORT_CMD(
|
|||
SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_FUNC)|SHELL_CMD_DISABLE_RETURN,
|
||||
keys, shellKeys, list all key);
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Clear the console (shell call)
|
||||
*/
|
||||
|
|
@ -1725,5 +1720,4 @@ void shellClear(void)
|
|||
}
|
||||
SHELL_EXPORT_CMD(
|
||||
SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_FUNC)|SHELL_CMD_DISABLE_RETURN,
|
||||
clear, shellClear, clear console);
|
||||
|
||||
clear, shellClear, clear console);
|
||||
|
|
@ -256,6 +256,7 @@ typedef struct
|
|||
|
||||
#define shellSetPath(_shell, _path) (_shell)->info.path = _path
|
||||
#define shellGetPath(_shell) ((_shell)->info.path)
|
||||
#define KEY_LENGTH 8
|
||||
|
||||
void shellInit(Shell *shell, char *buffer, unsigned short size);
|
||||
unsigned short shellWriteString(Shell *shell, const char *string);
|
||||
|
|
|
|||
Loading…
Reference in New Issue