This commit is contained in:
wgzAIIT 2022-05-12 13:55:53 +08:00
commit 302bf4e1cc
3 changed files with 247 additions and 106 deletions

View File

@ -6,80 +6,80 @@
if ARCH_BOARD_XIDATONG if ARCH_BOARD_XIDATONG
choice choice
prompt "Boot Flash" prompt "Boot Flash"
default XIDATONG_QSPI_FLASH default XIDATONG_QSPI_FLASH
config XIDATONG_HYPER_FLASH config XIDATONG_HYPER_FLASH
bool "HYPER Flash" bool "HYPER Flash"
config XIDATONG_QSPI_FLASH config XIDATONG_QSPI_FLASH
bool "QSPI Flash" bool "QSPI Flash"
endchoice # Boot Flash endchoice # Boot Flash
config XIDATONG_SDRAM config XIDATONG_SDRAM
bool "Enable SDRAM" bool "Enable SDRAM"
default y default y
select IMXRT_SEMC_INIT_DONE select IMXRT_SEMC_INIT_DONE
---help--- ---help---
Activate DCD configuration of SDRAM Activate DCD configuration of SDRAM
config XIDATONG_SDIO_AUTOMOUNT config XIDATONG_SDIO_AUTOMOUNT
bool "SD card automounter" bool "SD card automounter"
default n default n
depends on FS_AUTOMOUNTER && IMXRT_USDHC depends on FS_AUTOMOUNTER && IMXRT_USDHC
if XIDATONG_SDIO_AUTOMOUNT if XIDATONG_SDIO_AUTOMOUNT
config XIDATONG_SDIO_AUTOMOUNT_FSTYPE config XIDATONG_SDIO_AUTOMOUNT_FSTYPE
string "SD card file system type" string "SD card file system type"
default "vfat" default "vfat"
config XIDATONG_SDIO_AUTOMOUNT_BLKDEV config XIDATONG_SDIO_AUTOMOUNT_BLKDEV
string "SD card block device" string "SD card block device"
default "/dev/mmcsd0" default "/dev/mmcsd0"
config XIDATONG_SDIO_AUTOMOUNT_MOUNTPOINT config XIDATONG_SDIO_AUTOMOUNT_MOUNTPOINT
string "SD card mount point" string "SD card mount point"
default "/mnt/sdcard" default "/mnt/sdcard"
config XIDATONG_SDIO_AUTOMOUNT_DDELAY config XIDATONG_SDIO_AUTOMOUNT_DDELAY
int "SD card debounce delay (milliseconds)" int "SD card debounce delay (milliseconds)"
default 1000 default 1000
config XIDATONG_SDIO_AUTOMOUNT_UDELAY config XIDATONG_SDIO_AUTOMOUNT_UDELAY
int "SD card unmount retry delay (milliseconds)" int "SD card unmount retry delay (milliseconds)"
default 2000 default 2000
endif # XIDATONG_SDIO_AUTOMOUNT endif # XIDATONG_SDIO_AUTOMOUNT
config XIDATONG_USB_AUTOMOUNT config XIDATONG_USB_AUTOMOUNT
bool "USB Mass Storage automounter" bool "USB Mass Storage automounter"
default n default n
depends on USBHOST_MSC && USBHOST_MSC_NOTIFIER depends on USBHOST_MSC && USBHOST_MSC_NOTIFIER
if XIDATONG_USB_AUTOMOUNT if XIDATONG_USB_AUTOMOUNT
config XIDATONG_USB_AUTOMOUNT_FSTYPE config XIDATONG_USB_AUTOMOUNT_FSTYPE
string "USB file system type" string "USB file system type"
default "vfat" default "vfat"
config XIDATONG_USB_AUTOMOUNT_BLKDEV config XIDATONG_USB_AUTOMOUNT_BLKDEV
string "USB block device prefix" string "USB block device prefix"
default "/dev/sd" default "/dev/sd"
config XIDATONG_USB_AUTOMOUNT_MOUNTPOINT config XIDATONG_USB_AUTOMOUNT_MOUNTPOINT
string "USB mount point prefix" string "USB mount point prefix"
default "/mnt/usb" default "/mnt/usb"
config XIDATONG_USB_AUTOMOUNT_NUM_BLKDEV config XIDATONG_USB_AUTOMOUNT_NUM_BLKDEV
int "Number of block devices to monitor." int "Number of block devices to monitor."
range 1 26 range 1 26
default 4 default 4
config XIDATONG_USB_AUTOMOUNT_UDELAY config XIDATONG_USB_AUTOMOUNT_UDELAY
int "USB unmount retry delay (milliseconds)" int "USB unmount retry delay (milliseconds)"
default 2000 default 2000
endif # XIDATONG_USB_AUTOMOUNT endif # XIDATONG_USB_AUTOMOUNT
@ -89,36 +89,116 @@ menuconfig BSP_USING_CH438
if BSP_USING_CH438 if BSP_USING_CH438
config CH438_EXTUART0 config CH438_EXTUART0
bool "using ch438 port 0" bool "Using Ch438 Port 0"
default n default n
menu "Ch438 Port 0 Configuration"
depends on CH438_EXTUART0
config CH438_EXTUART0_BAUD
int "Ch438 Port 0 Baud Rate."
default 115200
---help---
The configured BAUD of the CH438 EXTUART0.
endmenu
config CH438_EXTUART1 config CH438_EXTUART1
bool "using ch438 port 1" bool "Using Ch438 Port 1"
default n default n
menu "Ch438 Port 1 Configuration"
depends on CH438_EXTUART1
config CH438_EXTUART1_BAUD
int "Ch438 Port 1 Baud Rate."
default 115200
---help---
The configured BAUD of the CH438 EXTUART1.
endmenu
config CH438_EXTUART2 config CH438_EXTUART2
bool "using ch438 port 2" bool "Using Ch438 Port 2"
default n default n
menu "Ch438 Port 2 Configuration"
depends on CH438_EXTUART2
config CH438_EXTUART2_BAUD
int "Ch438 Port 2 Baud Rate."
default 115200
---help---
The configured BAUD of the CH438 EXTUART2.
endmenu
config CH438_EXTUART3 config CH438_EXTUART3
bool "using ch438 port 3" bool "Using Ch438 Port 3"
default n default n
menu "Ch438 Port 3 Configuration"
depends on CH438_EXTUART3
config CH438_EXTUART3_BAUD
int "Ch438 Port 3 Baud Rate."
default 115200
---help---
The configured BAUD of the CH438 EXTUART3.
endmenu
config CH438_EXTUART4 config CH438_EXTUART4
bool "using ch438 port 4" bool "Using Ch438 Port 4"
default n default n
menu "Ch438 Port 4 Configuration"
depends on CH438_EXTUART4
config CH438_EXTUART4_BAUD
int "Ch438 Port 4 Baud Rate."
default 115200
---help---
The configured BAUD of the CH438 EXTUART4.
endmenu
config CH438_EXTUART5 config CH438_EXTUART5
bool "using ch438 port 5" bool "Using Ch438 Port 5"
default n default n
menu "Ch438 Port 5 Configuration"
depends on CH438_EXTUART5
config CH438_EXTUART5_BAUD
int "Ch438 Port 5 Baud Rate."
default 115200
---help---
The configured BAUD of the CH438 EXTUART5.
endmenu
config CH438_EXTUART6 config CH438_EXTUART6
bool "using ch438 port 6" bool "Using Ch438 Port 6"
default n default n
menu "Ch438 Port 6 Configuration"
depends on CH438_EXTUART6
config CH438_EXTUART6_BAUD
int "Ch438 Port 6 Baud Rate."
default 115200
---help---
The configured BAUD of the CH438 EXTUART6.
endmenu
config CH438_EXTUART7 config CH438_EXTUART7
bool "using ch438 port 7" bool "Using Ch438 Port 7"
default n default n
menu "Ch438 Port 7 Configuration"
depends on CH438_EXTUART7
config CH438_EXTUART7_BAUD
int "Ch438 Port 7 Baud Rate."
default 115200
---help---
The configured BAUD of the CH438 EXTUART7.
endmenu
endif # BSP_USING_CH438 endif # BSP_USING_CH438

View File

@ -36,9 +36,8 @@ void CH438Demo(void)
char buffer[256]; char buffer[256];
int readlen; int readlen;
// while(1)
// {
fd = open("/dev/extuart_dev3", O_RDWR); fd = open("/dev/extuart_dev3", O_RDWR);
ioctl(fd, OPE_INT, (unsigned long)9600);
m0fd = open("/dev/gpout0", O_RDWR); m0fd = open("/dev/gpout0", O_RDWR);
m1fd = open("/dev/gpout1", O_RDWR); m1fd = open("/dev/gpout1", O_RDWR);
ioctl(m0fd, GPIOC_WRITE, (unsigned long)1); ioctl(m0fd, GPIOC_WRITE, (unsigned long)1);
@ -82,6 +81,5 @@ void CH438Demo(void)
} }
close(fd); close(fd);
// }
} }

View File

@ -53,8 +53,8 @@ static int ch438_register(FAR const char *devpath, uint8_t ext_uart_no);
****************************************************************************/ ****************************************************************************/
struct ch438_dev_s struct ch438_dev_s
{ {
sem_t devsem; /* ch438 port devsem */ sem_t devsem; /* ch438 port devsem */
uint8_t port; /* ch438 port number*/ uint8_t port; /* ch438 port number*/
}; };
/**************************************************************************** /****************************************************************************
@ -64,27 +64,56 @@ struct ch438_dev_s
/*mutex of corresponding port*/ /*mutex of corresponding port*/
static pthread_mutex_t mutex[CH438PORTNUM] = static pthread_mutex_t mutex[CH438PORTNUM] =
{ {
PTHREAD_MUTEX_INITIALIZER, PTHREAD_MUTEX_INITIALIZER,
PTHREAD_MUTEX_INITIALIZER, PTHREAD_MUTEX_INITIALIZER,
PTHREAD_MUTEX_INITIALIZER, PTHREAD_MUTEX_INITIALIZER,
PTHREAD_MUTEX_INITIALIZER, PTHREAD_MUTEX_INITIALIZER,
PTHREAD_MUTEX_INITIALIZER, PTHREAD_MUTEX_INITIALIZER,
PTHREAD_MUTEX_INITIALIZER, PTHREAD_MUTEX_INITIALIZER,
PTHREAD_MUTEX_INITIALIZER, PTHREAD_MUTEX_INITIALIZER,
PTHREAD_MUTEX_INITIALIZER PTHREAD_MUTEX_INITIALIZER
}; };
/* Condition variable of corresponding port */ /* Condition variable of corresponding port */
static pthread_cond_t cond[CH438PORTNUM] = static pthread_cond_t cond[CH438PORTNUM] =
{ {
PTHREAD_COND_INITIALIZER, PTHREAD_COND_INITIALIZER,
PTHREAD_COND_INITIALIZER, PTHREAD_COND_INITIALIZER,
PTHREAD_COND_INITIALIZER, PTHREAD_COND_INITIALIZER,
PTHREAD_COND_INITIALIZER, PTHREAD_COND_INITIALIZER,
PTHREAD_COND_INITIALIZER, PTHREAD_COND_INITIALIZER,
PTHREAD_COND_INITIALIZER, PTHREAD_COND_INITIALIZER,
PTHREAD_COND_INITIALIZER, PTHREAD_COND_INITIALIZER,
PTHREAD_COND_INITIALIZER PTHREAD_COND_INITIALIZER
};
/* This array shows whether the current serial port is selected */
static bool const g_uart_selected[CH438PORTNUM] =
{
#ifdef CONFIG_CH438_EXTUART0
[0] = true,
#endif
#ifdef CONFIG_CH438_EXTUART1
[1] = true,
#endif
#ifdef CONFIG_CH438_EXTUART2
[2] = true,
#endif
#ifdef CONFIG_CH438_EXTUART3
[3] = true,
#endif
#ifdef CONFIG_CH438_EXTUART4
[4] = true,
#endif
#ifdef CONFIG_CH438_EXTUART5
[5] = true,
#endif
#ifdef CONFIG_CH438_EXTUART6
[6] = true,
#endif
#ifdef CONFIG_CH438_EXTUART7
[7] = true,
#endif
}; };
/* ch438 Callback work queue structure */ /* ch438 Callback work queue structure */
@ -108,13 +137,13 @@ static volatile bool g_ch438open[CH438PORTNUM] = {false,false,false,false,false,
/* Ch438 POSIX interface */ /* Ch438 POSIX interface */
static const struct file_operations g_ch438fops = static const struct file_operations g_ch438fops =
{ {
ch438_open, ch438_open,
ch438_close, ch438_close,
ch438_read, ch438_read,
ch438_write, ch438_write,
NULL, NULL,
ch438_ioctl, ch438_ioctl,
NULL NULL
}; };
/**************************************************************************** /****************************************************************************
@ -135,7 +164,7 @@ static FAR void getInterruptStatus(FAR void *arg)
{ {
for(i = 0; i < CH438PORTNUM; i++) for(i = 0; i < CH438PORTNUM; i++)
{ {
if(gInterruptStatus & Interruptnum[i]) if(g_uart_selected[i] && (gInterruptStatus & Interruptnum[i]))
{ {
pthread_mutex_lock(&mutex[i]); pthread_mutex_lock(&mutex[i]);
done[i] = true; done[i] = true;
@ -183,7 +212,7 @@ static void CH438SetInput(void)
imxrt_config_gpio(CH438_D4_PIN_INPUT); imxrt_config_gpio(CH438_D4_PIN_INPUT);
imxrt_config_gpio(CH438_D5_PIN_INPUT); imxrt_config_gpio(CH438_D5_PIN_INPUT);
imxrt_config_gpio(CH438_D6_PIN_INPUT); imxrt_config_gpio(CH438_D6_PIN_INPUT);
imxrt_config_gpio(CH438_D7_PIN_INPUT); imxrt_config_gpio(CH438_D7_PIN_INPUT);
} }
/**************************************************************************** /****************************************************************************
@ -214,13 +243,13 @@ static uint8_t ReadCH438Data(uint8_t addr)
up_udelay(1); up_udelay(1);
imxrt_gpio_write(CH438_ALE_PIN, false); imxrt_gpio_write(CH438_ALE_PIN, false);
up_udelay(1); up_udelay(1);
CH438SetInput(); CH438SetInput();
up_udelay(1); up_udelay(1);
imxrt_gpio_write(CH438_NRD_PIN, false); imxrt_gpio_write(CH438_NRD_PIN, false);
up_udelay(1); up_udelay(1);
if (imxrt_gpio_read(CH438_D7_PIN_INPUT)) dat |= 0x80; if (imxrt_gpio_read(CH438_D7_PIN_INPUT)) dat |= 0x80;
@ -232,8 +261,8 @@ static uint8_t ReadCH438Data(uint8_t addr)
if (imxrt_gpio_read(CH438_D1_PIN_INPUT)) dat |= 0x02; if (imxrt_gpio_read(CH438_D1_PIN_INPUT)) dat |= 0x02;
if (imxrt_gpio_read(CH438_D0_PIN_INPUT)) dat |= 0x01; if (imxrt_gpio_read(CH438_D0_PIN_INPUT)) dat |= 0x01;
imxrt_gpio_write(CH438_NRD_PIN, true); imxrt_gpio_write(CH438_NRD_PIN, true);
imxrt_gpio_write(CH438_ALE_PIN, true); imxrt_gpio_write(CH438_ALE_PIN, true);
up_udelay(1); up_udelay(1);
return dat; return dat;
@ -263,12 +292,12 @@ static void WriteCH438Data(uint8_t addr, uint8_t dat)
if(addr &0x04) imxrt_gpio_write(CH438_D2_PIN_OUT, true); else imxrt_gpio_write(CH438_D2_PIN_OUT, false); if(addr &0x04) imxrt_gpio_write(CH438_D2_PIN_OUT, true); else imxrt_gpio_write(CH438_D2_PIN_OUT, false);
if(addr &0x02) imxrt_gpio_write(CH438_D1_PIN_OUT, true); else imxrt_gpio_write(CH438_D1_PIN_OUT, false); if(addr &0x02) imxrt_gpio_write(CH438_D1_PIN_OUT, true); else imxrt_gpio_write(CH438_D1_PIN_OUT, false);
if(addr &0x01) imxrt_gpio_write(CH438_D0_PIN_OUT, true); else imxrt_gpio_write(CH438_D0_PIN_OUT, false); if(addr &0x01) imxrt_gpio_write(CH438_D0_PIN_OUT, true); else imxrt_gpio_write(CH438_D0_PIN_OUT, false);
up_udelay(1); up_udelay(1);
imxrt_gpio_write(CH438_ALE_PIN, false); imxrt_gpio_write(CH438_ALE_PIN, false);
up_udelay(1); up_udelay(1);
if(dat &0x80) imxrt_gpio_write(CH438_D7_PIN_OUT, true); else imxrt_gpio_write(CH438_D7_PIN_OUT, false); if(dat &0x80) imxrt_gpio_write(CH438_D7_PIN_OUT, true); else imxrt_gpio_write(CH438_D7_PIN_OUT, false);
if(dat &0x40) imxrt_gpio_write(CH438_D6_PIN_OUT, true); else imxrt_gpio_write(CH438_D6_PIN_OUT, false); if(dat &0x40) imxrt_gpio_write(CH438_D6_PIN_OUT, true); else imxrt_gpio_write(CH438_D6_PIN_OUT, false);
if(dat &0x20) imxrt_gpio_write(CH438_D5_PIN_OUT, true); else imxrt_gpio_write(CH438_D5_PIN_OUT, false); if(dat &0x20) imxrt_gpio_write(CH438_D5_PIN_OUT, true); else imxrt_gpio_write(CH438_D5_PIN_OUT, false);
@ -394,7 +423,7 @@ static void ImxrtCH438Init(void)
imxrt_gpio_write(CH438_NWR_PIN,true); imxrt_gpio_write(CH438_NWR_PIN,true);
imxrt_gpio_write(CH438_NRD_PIN,true); imxrt_gpio_write(CH438_NRD_PIN,true);
imxrt_gpio_write(CH438_ALE_PIN,true); imxrt_gpio_write(CH438_ALE_PIN,true);
} }
/**************************************************************************** /****************************************************************************
* Name: CH438PortInit * Name: CH438PortInit
@ -413,18 +442,18 @@ static void CH438PortInit(uint8_t ext_uart_no, uint32_t baud_rate)
uint8_t REG_IER_ADDR; uint8_t REG_IER_ADDR;
uint8_t REG_MCR_ADDR; uint8_t REG_MCR_ADDR;
uint8_t REG_FCR_ADDR; uint8_t REG_FCR_ADDR;
REG_LCR_ADDR = offsetadd[ext_uart_no] | REG_LCR0_ADDR; REG_LCR_ADDR = offsetadd[ext_uart_no] | REG_LCR0_ADDR;
REG_DLL_ADDR = offsetadd[ext_uart_no] | REG_DLL0_ADDR; REG_DLL_ADDR = offsetadd[ext_uart_no] | REG_DLL0_ADDR;
REG_DLM_ADDR = offsetadd[ext_uart_no] | REG_DLM0_ADDR; REG_DLM_ADDR = offsetadd[ext_uart_no] | REG_DLM0_ADDR;
REG_IER_ADDR = offsetadd[ext_uart_no] | REG_IER0_ADDR; REG_IER_ADDR = offsetadd[ext_uart_no] | REG_IER0_ADDR;
REG_MCR_ADDR = offsetadd[ext_uart_no] | REG_MCR0_ADDR; REG_MCR_ADDR = offsetadd[ext_uart_no] | REG_MCR0_ADDR;
REG_FCR_ADDR = offsetadd[ext_uart_no] | REG_FCR0_ADDR; REG_FCR_ADDR = offsetadd[ext_uart_no] | REG_FCR0_ADDR;
/* reset the uart */ /* reset the uart */
WriteCH438Data(REG_IER_ADDR, BIT_IER_RESET); WriteCH438Data(REG_IER_ADDR, BIT_IER_RESET);
up_mdelay(50); up_mdelay(50);
dlab = ReadCH438Data(REG_IER_ADDR); dlab = ReadCH438Data(REG_IER_ADDR);
dlab &= 0xDF; dlab &= 0xDF;
WriteCH438Data(REG_IER_ADDR, dlab); WriteCH438Data(REG_IER_ADDR, dlab);
@ -455,7 +484,7 @@ static void CH438PortInit(uint8_t ext_uart_no, uint32_t baud_rate)
WriteCH438Data(REG_MCR_ADDR, BIT_MCR_OUT2); WriteCH438Data(REG_MCR_ADDR, BIT_MCR_OUT2);
/* release the data in FIFO */ /* release the data in FIFO */
WriteCH438Data(REG_FCR_ADDR, ReadCH438Data(REG_FCR_ADDR)| BIT_FCR_TFIFORST); WriteCH438Data(REG_FCR_ADDR, ReadCH438Data(REG_FCR_ADDR)| BIT_FCR_TFIFORST);
} }
/**************************************************************************** /****************************************************************************
@ -483,8 +512,8 @@ static int ImxrtCh438WriteData(uint8_t ext_uart_no, char *write_buffer, size_t s
{ {
Ch438UartSend(ext_uart_no, write_buffer + i * 256, 256); Ch438UartSend(ext_uart_no, write_buffer + i * 256, 256);
} }
} }
else else
{ {
write_index = 0; write_index = 0;
while(write_len_continue > 256) while(write_len_continue > 256)
@ -496,7 +525,7 @@ static int ImxrtCh438WriteData(uint8_t ext_uart_no, char *write_buffer, size_t s
Ch438UartSend(ext_uart_no, write_buffer + write_index * 256, write_len_continue); Ch438UartSend(ext_uart_no, write_buffer + write_index * 256, write_len_continue);
} }
} }
else else
{ {
Ch438UartSend(ext_uart_no, write_buffer, write_len); Ch438UartSend(ext_uart_no, write_buffer, write_len);
} }
@ -530,7 +559,7 @@ static size_t ImxrtCh438ReadData(uint8_t ext_uart_no, size_t size)
/* Read the interrupt status of the serial port */ /* Read the interrupt status of the serial port */
InterruptStatus = ReadCH438Data(REG_IIR_ADDR) & 0x0f; InterruptStatus = ReadCH438Data(REG_IIR_ADDR) & 0x0f;
ch438info("InterruptStatus is %d\n", InterruptStatus); ch438info("InterruptStatus is %d\n", InterruptStatus);
switch(InterruptStatus) switch(InterruptStatus)
{ {
case INT_NOINT: /* no interrupt */ case INT_NOINT: /* no interrupt */
@ -572,6 +601,11 @@ static void Ch438InitDefault(void)
/* Initialize the mutex */ /* Initialize the mutex */
for(i = 0; i < CH438PORTNUM; i++) for(i = 0; i < CH438PORTNUM; i++)
{ {
if(!g_uart_selected[i])
{
continue;
}
ret = pthread_mutex_init(&mutex[i], NULL); ret = pthread_mutex_init(&mutex[i], NULL);
if(ret != 0) if(ret != 0)
{ {
@ -582,22 +616,51 @@ static void Ch438InitDefault(void)
/* Initialize the condition variable */ /* Initialize the condition variable */
for(i = 0; i < CH438PORTNUM; i++) for(i = 0; i < CH438PORTNUM; i++)
{ {
if(!g_uart_selected[i])
{
continue;
}
ret = pthread_cond_init(&cond[i], NULL); ret = pthread_cond_init(&cond[i], NULL);
if(ret != 0) if(ret != 0)
{ {
ch438err("pthread_cond_init failed, status=%d\n", ret); ch438err("pthread_cond_init failed, status=%d\n", ret);
} }
} }
ImxrtCH438Init(); ImxrtCH438Init();
CH438PortInit(0,115200);
CH438PortInit(1,115200); #ifdef CONFIG_CH438_EXTUART0
CH438PortInit(2,9600); CH438PortInit(0, CONFIG_CH438_EXTUART0_BAUD);
CH438PortInit(3,9600); #endif
CH438PortInit(4,115200);
CH438PortInit(5,115200); #ifdef CONFIG_CH438_EXTUART1
CH438PortInit(6,115200); CH438PortInit(1, CONFIG_CH438_EXTUART1_BAUD);
CH438PortInit(7,115200); #endif
#ifdef CONFIG_CH438_EXTUART2
CH438PortInit(2, CONFIG_CH438_EXTUART2_BAUD);
#endif
#ifdef CONFIG_CH438_EXTUART3
CH438PortInit(3, CONFIG_CH438_EXTUART3_BAUD);
#endif
#ifdef CONFIG_CH438_EXTUART4
CH438PortInit(4, CONFIG_CH438_EXTUART4_BAUD);
#endif
#ifdef CONFIG_CH438_EXTUART5
CH438PortInit(5, CONFIG_CH438_EXTUART5_BAUD);
#endif
#ifdef CONFIG_CH438_EXTUART6
CH438PortInit(6, CONFIG_CH438_EXTUART6_BAUD);
#endif
#ifdef CONFIG_CH438_EXTUART7
CH438PortInit(7, CONFIG_CH438_EXTUART7_BAUD);
#endif
up_mdelay(10); up_mdelay(10);