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optimize ch438 function on aiit-riscv64-board and xidatong-riscv64

This commit is contained in:
Liu_Weichao 2022-09-05 18:03:09 +08:00
parent e4f2c3e5aa
commit 1fd4e3981d
7 changed files with 256 additions and 882 deletions
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2
APP_Framework/Framework/connection/lora/e220/e220.c
View File

@ -624,9 +624,9 @@ static void LoraOpen(void)
E220Open(adapter);
}
#ifdef ADD_RTTHREAD_FETURES
MSH_CMD_EXPORT(LoraOpen,Lora open test sample);
#ifdef ADD_RTTHREAD_FETURES
static void LoraRead(void *parameter)
{
int RevLen;

53
Ubiquitous/XiZi/board/aiit-riscv64-board/third_party_driver/ch438/Kconfig
View File

@ -39,58 +39,5 @@ if BSP_USING_CH438
config CH438_DEVICE_NAME_7
string
default "extuart_dev7"
config BSP_CH438_ALE_PIN
int "ALE pin number for ch438"
default 23
config BSP_CH438_NWR_PIN
int "NWR pin number for ch438"
default 24
config BSP_CH438_NRD_PIN
int "NRD pin number for ch438"
default 25
config BSP_CH438_D0_PIN
int "D0 pin number for ch438"
default 27
config BSP_CH438_D1_PIN
int "D1 pin number for ch438"
default 28
config BSP_CH438_D2_PIN
int "D2 pin number for ch438"
default 29
config BSP_CH438_D3_PIN
int "D3 pin number for ch438"
default 30
config BSP_CH438_D4_PIN
int "D4 pin number for ch438"
default 31
config BSP_CH438_D5_PIN
int "D5 pin number for ch438"
default 32
config BSP_CH438_D6_PIN
int "D6 pin number for ch438"
default 33
config BSP_CH438_D7_PIN
int "D7 pin number for ch438"
default 34
config BSP_CH438_INT_PIN
int "INT pin number for ch438"
default 35
config BSP_485_dir
int "485 direction pin number for ch438"
default 18
endif

880
Ubiquitous/XiZi/board/aiit-riscv64-board/third_party_driver/ch438/connect_ch438.c
View File

File diff suppressed because it is too large Load Diff

15
Ubiquitous/XiZi/board/aiit-riscv64-board/third_party_driver/gpio/drv_io_config.c
View File

@ -89,6 +89,21 @@ static struct io_config
IOCONFIG(15, FUNC_GPIO3),
IOCONFIG(17, FUNC_GPIO4),
#ifdef BSP_USING_CH438
IOCONFIG(BSP_CH438_ALE_PIN, HS_GPIO(FPIOA_CH438_ALE)),
IOCONFIG(BSP_CH438_NWR_PIN, HS_GPIO(FPIOA_CH438_NWR)),
IOCONFIG(BSP_CH438_NRD_PIN, HS_GPIO(FPIOA_CH438_NRD)),
IOCONFIG(BSP_CH438_INT_PIN, HS_GPIO(FPIOA_CH438_INT)),
IOCONFIG(BSP_CH438_D0_PIN, HS_GPIO(FPIOA_CH438_D0)),
IOCONFIG(BSP_CH438_D1_PIN, HS_GPIO(FPIOA_CH438_D1)),
IOCONFIG(BSP_CH438_D2_PIN, HS_GPIO(FPIOA_CH438_D2)),
IOCONFIG(BSP_CH438_D3_PIN, HS_GPIO(FPIOA_CH438_D3)),
IOCONFIG(BSP_CH438_D4_PIN, HS_GPIO(FPIOA_CH438_D4)),
IOCONFIG(BSP_CH438_D5_PIN, HS_GPIO(FPIOA_CH438_D5)),
IOCONFIG(BSP_CH438_D6_PIN, HS_GPIO(FPIOA_CH438_D6)),
IOCONFIG(BSP_CH438_D7_PIN, HS_GPIO(FPIOA_CH438_D7))
#endif
};
static int PrintIoConfig()

2
Ubiquitous/XiZi/board/aiit-riscv64-board/third_party_driver/include/connect_ch438.h
View File

@ -253,6 +253,8 @@
#define Fpclk 1843200 /* Define the internal clock frequency */
#define CH438_RECV_TIMEOUT 1000000 * 1000
void Set485Input(uint8 ch_no);
void Set485Output(uint8 ch_no);

28
Ubiquitous/XiZi/board/aiit-riscv64-board/third_party_driver/include/drv_io_config.h
View File

@ -50,6 +50,34 @@ enum HS_GPIO_CONFIG
GPIO_ALLOC_START /* index of gpio driver start */
};
#ifdef BSP_USING_CH438
#define FPIOA_CH438_ALE 12
#define FPIOA_CH438_NWR 13
#define FPIOA_CH438_NRD 14
#define FPIOA_CH438_D0 15
#define FPIOA_CH438_D1 16
#define FPIOA_CH438_D2 17
#define FPIOA_CH438_D3 18
#define FPIOA_CH438_D4 19
#define FPIOA_CH438_D5 20
#define FPIOA_CH438_D6 21
#define FPIOA_CH438_D7 22
#define FPIOA_CH438_INT 23
#define BSP_CH438_ALE_PIN 24
#define BSP_CH438_NWR_PIN 25
#define BSP_CH438_NRD_PIN 26
#define BSP_CH438_D0_PIN 27
#define BSP_CH438_D1_PIN 28
#define BSP_CH438_D2_PIN 29
#define BSP_CH438_D3_PIN 30
#define BSP_CH438_D4_PIN 31
#define BSP_CH438_D5_PIN 32
#define BSP_CH438_D6_PIN 33
#define BSP_CH438_D7_PIN 34
#define BSP_CH438_INT_PIN 35
#endif
extern int IoConfigInit(void);
#endif

158
Ubiquitous/XiZi/board/xidatong-riscv64/third_party_driver/ch438/connect_ch438.c
View File

@ -23,8 +23,8 @@
#include <gpiohs.h>
#include <sleep.h>
static uint8 offset_addr[] = {0x00,0x10,0x20,0x30,0x08,0x18,0x28,0x38}; /* Offset address of serial port number */
static uint8 interrupt_num[8] = {0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80};
static uint8 offset_addr[] = {0x00, 0x10, 0x20, 0x30, 0x08, 0x18, 0x28, 0x38}; /* Offset address of serial port number */
static uint8 interrupt_num[] = {0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80};
static void CH438SetOutput(void)
{
@ -50,7 +50,7 @@ static void CH438SetInput(void)
gpiohs_set_drive_mode(FPIOA_CH438_D7, GPIO_DM_INPUT_PULL_UP);
}
uint8 ReadCH438Data( uint8 addr )
uint8 ReadCH438Data(uint8 addr)
{
uint8 dat = 0;
@ -110,28 +110,28 @@ static void WriteCH438Data(uint8 addr, uint8 dat)
CH438SetOutput();
usleep(1);
if(addr &0x80) gpiohs_set_pin(FPIOA_CH438_D7, GPIO_PV_HIGH); else gpiohs_set_pin(FPIOA_CH438_D7, GPIO_PV_LOW);
if(addr &0x40) gpiohs_set_pin(FPIOA_CH438_D6, GPIO_PV_HIGH); else gpiohs_set_pin(FPIOA_CH438_D6, GPIO_PV_LOW);
if(addr &0x20) gpiohs_set_pin(FPIOA_CH438_D5, GPIO_PV_HIGH); else gpiohs_set_pin(FPIOA_CH438_D5, GPIO_PV_LOW);
if(addr &0x10) gpiohs_set_pin(FPIOA_CH438_D4, GPIO_PV_HIGH); else gpiohs_set_pin(FPIOA_CH438_D4, GPIO_PV_LOW);
if(addr &0x08) gpiohs_set_pin(FPIOA_CH438_D3, GPIO_PV_HIGH); else gpiohs_set_pin(FPIOA_CH438_D3, GPIO_PV_LOW);
if(addr &0x04) gpiohs_set_pin(FPIOA_CH438_D2, GPIO_PV_HIGH); else gpiohs_set_pin(FPIOA_CH438_D2, GPIO_PV_LOW);
if(addr &0x02) gpiohs_set_pin(FPIOA_CH438_D1, GPIO_PV_HIGH); else gpiohs_set_pin(FPIOA_CH438_D1, GPIO_PV_LOW);
if(addr &0x01) gpiohs_set_pin(FPIOA_CH438_D0, GPIO_PV_HIGH); else gpiohs_set_pin(FPIOA_CH438_D0, GPIO_PV_LOW);
if(addr & 0x80) gpiohs_set_pin(FPIOA_CH438_D7, GPIO_PV_HIGH); else gpiohs_set_pin(FPIOA_CH438_D7, GPIO_PV_LOW);
if(addr & 0x40) gpiohs_set_pin(FPIOA_CH438_D6, GPIO_PV_HIGH); else gpiohs_set_pin(FPIOA_CH438_D6, GPIO_PV_LOW);
if(addr & 0x20) gpiohs_set_pin(FPIOA_CH438_D5, GPIO_PV_HIGH); else gpiohs_set_pin(FPIOA_CH438_D5, GPIO_PV_LOW);
if(addr & 0x10) gpiohs_set_pin(FPIOA_CH438_D4, GPIO_PV_HIGH); else gpiohs_set_pin(FPIOA_CH438_D4, GPIO_PV_LOW);
if(addr & 0x08) gpiohs_set_pin(FPIOA_CH438_D3, GPIO_PV_HIGH); else gpiohs_set_pin(FPIOA_CH438_D3, GPIO_PV_LOW);
if(addr & 0x04) gpiohs_set_pin(FPIOA_CH438_D2, GPIO_PV_HIGH); else gpiohs_set_pin(FPIOA_CH438_D2, GPIO_PV_LOW);
if(addr & 0x02) gpiohs_set_pin(FPIOA_CH438_D1, GPIO_PV_HIGH); else gpiohs_set_pin(FPIOA_CH438_D1, GPIO_PV_LOW);
if(addr & 0x01) gpiohs_set_pin(FPIOA_CH438_D0, GPIO_PV_HIGH); else gpiohs_set_pin(FPIOA_CH438_D0, GPIO_PV_LOW);
usleep(1);
gpiohs_set_pin(FPIOA_CH438_ALE, GPIO_PV_LOW);
usleep(1);
if(dat &0x80) gpiohs_set_pin(FPIOA_CH438_D7, GPIO_PV_HIGH); else gpiohs_set_pin(FPIOA_CH438_D7, GPIO_PV_LOW);
if(dat &0x40) gpiohs_set_pin(FPIOA_CH438_D6, GPIO_PV_HIGH); else gpiohs_set_pin(FPIOA_CH438_D6, GPIO_PV_LOW);
if(dat &0x20) gpiohs_set_pin(FPIOA_CH438_D5, GPIO_PV_HIGH); else gpiohs_set_pin(FPIOA_CH438_D5, GPIO_PV_LOW);
if(dat &0x10) gpiohs_set_pin(FPIOA_CH438_D4, GPIO_PV_HIGH); else gpiohs_set_pin(FPIOA_CH438_D4, GPIO_PV_LOW);
if(dat &0x08) gpiohs_set_pin(FPIOA_CH438_D3, GPIO_PV_HIGH); else gpiohs_set_pin(FPIOA_CH438_D3, GPIO_PV_LOW);
if(dat &0x04) gpiohs_set_pin(FPIOA_CH438_D2, GPIO_PV_HIGH); else gpiohs_set_pin(FPIOA_CH438_D2, GPIO_PV_LOW);
if(dat &0x02) gpiohs_set_pin(FPIOA_CH438_D1, GPIO_PV_HIGH); else gpiohs_set_pin(FPIOA_CH438_D1, GPIO_PV_LOW);
if(dat &0x01) gpiohs_set_pin(FPIOA_CH438_D0, GPIO_PV_HIGH); else gpiohs_set_pin(FPIOA_CH438_D0, GPIO_PV_LOW);
if(dat & 0x80) gpiohs_set_pin(FPIOA_CH438_D7, GPIO_PV_HIGH); else gpiohs_set_pin(FPIOA_CH438_D7, GPIO_PV_LOW);
if(dat & 0x40) gpiohs_set_pin(FPIOA_CH438_D6, GPIO_PV_HIGH); else gpiohs_set_pin(FPIOA_CH438_D6, GPIO_PV_LOW);
if(dat & 0x20) gpiohs_set_pin(FPIOA_CH438_D5, GPIO_PV_HIGH); else gpiohs_set_pin(FPIOA_CH438_D5, GPIO_PV_LOW);
if(dat & 0x10) gpiohs_set_pin(FPIOA_CH438_D4, GPIO_PV_HIGH); else gpiohs_set_pin(FPIOA_CH438_D4, GPIO_PV_LOW);
if(dat & 0x08) gpiohs_set_pin(FPIOA_CH438_D3, GPIO_PV_HIGH); else gpiohs_set_pin(FPIOA_CH438_D3, GPIO_PV_LOW);
if(dat & 0x04) gpiohs_set_pin(FPIOA_CH438_D2, GPIO_PV_HIGH); else gpiohs_set_pin(FPIOA_CH438_D2, GPIO_PV_LOW);
if(dat & 0x02) gpiohs_set_pin(FPIOA_CH438_D1, GPIO_PV_HIGH); else gpiohs_set_pin(FPIOA_CH438_D1, GPIO_PV_LOW);
if(dat & 0x01) gpiohs_set_pin(FPIOA_CH438_D0, GPIO_PV_HIGH); else gpiohs_set_pin(FPIOA_CH438_D0, GPIO_PV_LOW);
usleep(1);
@ -149,14 +149,14 @@ static void WriteCH438Data(uint8 addr, uint8 dat)
return;
}
static void WriteCH438Block( uint8 mAddr, uint8 mLen, uint8 *mBuf )
static void WriteCH438Block(uint8 mAddr, uint8 mLen, uint8 *mBuf)
{
while (mLen--) {
WriteCH438Data(mAddr, *mBuf++);
}
}
void CH438UartSend( uint8 ext_uart_no,uint8 *Data, uint8 Num )
void CH438UartSend(uint8 ext_uart_no, uint8 *Data, uint8 Num)
{
uint8 REG_LSR_ADDR,REG_THR_ADDR;
@ -177,7 +177,7 @@ void CH438UartSend( uint8 ext_uart_no,uint8 *Data, uint8 Num )
}
}
uint8 CH438UartRecv(uint8 ext_uart_no, uint8 *buf, x_size_t size )
uint8 CH438UartRecv(uint8 ext_uart_no, uint8 *buf, x_size_t size)
{
x_size_t rcv_num = 0;
uint8 dat = 0;
@ -211,19 +211,19 @@ uint8 CH438UartRecv(uint8 ext_uart_no, uint8 *buf, x_size_t size )
return rcv_num;
}
void CH438PortInit( uint8 ext_uart_no, uint32 BaudRate )
void CH438PortInit(uint8 ext_uart_no, uint32 BaudRate)
{
uint32 div;
uint8 DLL,DLM,dlab;
uint8 REG_LCR_ADDR;
uint8 REG_DLL_ADDR;
uint8 REG_DLM_ADDR;
uint8 REG_IER_ADDR;
uint8 REG_MCR_ADDR;
uint8 REG_FCR_ADDR;
uint8 REG_RBR_ADDR;
uint8 REG_THR_ADDR;
uint8 REG_IIR_ADDR;
uint32 div;
uint8 DLL,DLM,dlab;
uint8 REG_LCR_ADDR;
uint8 REG_DLL_ADDR;
uint8 REG_DLM_ADDR;
uint8 REG_IER_ADDR;
uint8 REG_MCR_ADDR;
uint8 REG_FCR_ADDR;
uint8 REG_RBR_ADDR;
uint8 REG_THR_ADDR;
uint8 REG_IIR_ADDR;
REG_LCR_ADDR = offset_addr[ext_uart_no] | REG_LCR0_ADDR;
REG_DLL_ADDR = offset_addr[ext_uart_no] | REG_DLL0_ADDR;
@ -262,7 +262,7 @@ void CH438PortInit( uint8 ext_uart_no, uint32 BaudRate )
WriteCH438Data(REG_FCR_ADDR, ReadCH438Data(REG_FCR_ADDR) | BIT_FCR_TFIFORST);
}
void CH438PortInitParityCheck(uint8 ext_uart_no,uint32 BaudRate)
void CH438PortInitParityCheck(uint8 ext_uart_no, uint32 BaudRate)
{
uint32 div;
uint8 DLL,DLM,dlab;
@ -516,22 +516,22 @@ static uint32 Ch438ReadData(void *dev, struct BusBlockReadParam *read_param)
do {
rcv_cnt++;
gInterruptStatus = ReadCH438Data(REG_SSR_ADDR);
if(!gInterruptStatus) {
dat = ReadCH438Data(REG_LCR0_ADDR);
dat = ReadCH438Data(REG_IER0_ADDR);
dat = ReadCH438Data(REG_MCR0_ADDR);
dat = ReadCH438Data(REG_LSR0_ADDR);
dat = ReadCH438Data(REG_MSR0_ADDR);
dat = ReadCH438Data(REG_RBR0_ADDR);
dat = ReadCH438Data(REG_THR0_ADDR);
dat = ReadCH438Data(REG_IIR0_ADDR);
dat = dat;
} else {
KPrintf("gInterruptStatus 0x%x dev_param %p ext_uart_no %d interrupt_num 0x%x cnt %d\n",
gInterruptStatus, dev_param, dev_param->ext_uart_no, interrupt_num[dev_param->ext_uart_no], rcv_cnt);
if ( gInterruptStatus & interrupt_num[dev_param->ext_uart_no]) { /* Detect which serial port is interrupted */
if (rcv_cnt > CH438_RECV_TIMEOUT) {
break;
}
dat = ReadCH438Data(REG_IER0_ADDR);
dat = ReadCH438Data(REG_IIR0_ADDR);
dat = ReadCH438Data(REG_LCR0_ADDR);
dat = ReadCH438Data(REG_MCR0_ADDR);
dat = ReadCH438Data(REG_LSR0_ADDR);
dat = ReadCH438Data(REG_MSR0_ADDR);
dat = ReadCH438Data(REG_FCR0_ADDR);
gInterruptStatus = ReadCH438Data(REG_SSR_ADDR);
if (gInterruptStatus) {
if (gInterruptStatus & interrupt_num[dev_param->ext_uart_no]) { /* Detect which serial port is interrupted */
REG_LCR_ADDR = offset_addr[dev_param->ext_uart_no] | REG_LCR0_ADDR;
REG_DLL_ADDR = offset_addr[dev_param->ext_uart_no] | REG_DLL0_ADDR;
REG_DLM_ADDR = offset_addr[dev_param->ext_uart_no] | REG_DLM0_ADDR;
@ -557,10 +557,6 @@ static uint32 Ch438ReadData(void *dev, struct BusBlockReadParam *read_param)
case INT_RCV_SUCCESS: /* Interrupts are available to receive data */
rcv_num = CH438UartRecv(dev_param->ext_uart_no, (uint8 *)read_param->buffer, read_param->size);
read_param->read_length = rcv_num;
KPrintf("recv data length %d\n", rcv_num);
for (int i = 0; i < rcv_num; i ++) {
KPrintf("idx %d data 0x%x\n", i, ((uint8 *)read_param->buffer)[i]);
}
break;
case INT_RCV_LINES: /* Receiving line status interrupted */
ReadCH438Data(REG_LSR_ADDR);
@ -573,7 +569,7 @@ static uint32 Ch438ReadData(void *dev, struct BusBlockReadParam *read_param)
}
}
}
} while ((0 == (gInterruptStatus & interrupt_num[dev_param->ext_uart_no])) || (rcv_cnt < CH438_RECV_TIMEOUT));
} while (0 == (gInterruptStatus & interrupt_num[dev_param->ext_uart_no]));
return rcv_num;
}
@ -653,7 +649,7 @@ int HwCh438Init(void)
static struct SerialHardwareDevice serial_dev_0;
static struct SerialDevParam dev_param_0;
dev_param_0.ext_uart_no = 0;
serial_dev_0.haldev.private_data = (void *)&dev_param_0;
serial_dev_0.private_data = (void *)&dev_param_0;
ret = Ch438DevRegister(&serial_dev_0, CH438_DEVICE_NAME_0);
if (ret != EOK) {
KPrintf("HwCh438Init Ch438DevRegister error %d\n", ret);
@ -663,7 +659,7 @@ int HwCh438Init(void)
static struct SerialHardwareDevice serial_dev_1;
static struct SerialDevParam dev_param_1;
dev_param_1.ext_uart_no = 1;
serial_dev_1.haldev.private_data = (void *)&dev_param_1;
serial_dev_1.private_data = (void *)&dev_param_1;
ret = Ch438DevRegister(&serial_dev_1, CH438_DEVICE_NAME_1);
if (ret != EOK) {
KPrintf("HwCh438Init Ch438DevRegister error %d\n", ret);
@ -673,7 +669,7 @@ int HwCh438Init(void)
static struct SerialHardwareDevice serial_dev_2;
static struct SerialDevParam dev_param_2;
dev_param_2.ext_uart_no = 2;
serial_dev_2.haldev.private_data = (void *)&dev_param_2;
serial_dev_2.private_data = (void *)&dev_param_2;
ret = Ch438DevRegister(&serial_dev_2, CH438_DEVICE_NAME_2);
if (ret != EOK) {
KPrintf("HwCh438Init Ch438DevRegister error %d\n", ret);
@ -683,7 +679,7 @@ int HwCh438Init(void)
static struct SerialHardwareDevice serial_dev_3;
static struct SerialDevParam dev_param_3;
dev_param_3.ext_uart_no = 3;
serial_dev_3.haldev.private_data = (void *)&dev_param_3;
serial_dev_3.private_data = (void *)&dev_param_3;
ret = Ch438DevRegister(&serial_dev_3, CH438_DEVICE_NAME_3);
if (ret != EOK) {
KPrintf("HwCh438Init Ch438DevRegister error %d\n", ret);
@ -693,7 +689,7 @@ int HwCh438Init(void)
static struct SerialHardwareDevice serial_dev_4;
static struct SerialDevParam dev_param_4;
dev_param_4.ext_uart_no = 4;
serial_dev_4.haldev.private_data = (void *)&dev_param_4;
serial_dev_4.private_data = (void *)&dev_param_4;
ret = Ch438DevRegister(&serial_dev_4, CH438_DEVICE_NAME_4);
if (ret != EOK) {
KPrintf("HwCh438Init Ch438DevRegister error %d\n", ret);
@ -703,7 +699,7 @@ int HwCh438Init(void)
static struct SerialHardwareDevice serial_dev_5;
static struct SerialDevParam dev_param_5;
dev_param_5.ext_uart_no = 5;
serial_dev_5.haldev.private_data = (void *)&dev_param_5;
serial_dev_5.private_data = (void *)&dev_param_5;
ret = Ch438DevRegister(&serial_dev_5, CH438_DEVICE_NAME_5);
if (ret != EOK) {
KPrintf("HwCh438Init Ch438DevRegister error %d\n", ret);
@ -734,43 +730,3 @@ int HwCh438Init(void)
return ret;
}
void CH438RegTest()//for test
{
uint8 rcv_num = 0;
uint8 buffer[32];
memset(buffer, 0, 32);
KPrintf("IER: %x\r\n",ReadCH438Data(REG_IER0_ADDR));//?IER
KPrintf("IIR: %x\r\n",ReadCH438Data(REG_IIR0_ADDR));//?IIR
KPrintf("LCR: %x\r\n",ReadCH438Data(REG_LCR0_ADDR));//?LCR
KPrintf("MCR: %x\r\n",ReadCH438Data(REG_MCR0_ADDR));//?MCR
KPrintf("LSR: %x\r\n",ReadCH438Data(REG_LSR0_ADDR));//?LSR
KPrintf("MSR: %x\r\n",ReadCH438Data(REG_MSR0_ADDR));//?MSR
KPrintf("FCR: %x\r\n",ReadCH438Data(REG_FCR0_ADDR));//?FCR
KPrintf("SSR: %x\r\n",ReadCH438Data(REG_SSR_ADDR ));//?SSR
uint8 REG_IIR_ADDR = offset_addr[6] | REG_IIR0_ADDR;
uint8 InterruptStatus = ReadCH438Data(REG_IIR_ADDR) & 0x0f;
switch( InterruptStatus )
{
case INT_NOINT:
break;
case INT_THR_EMPTY:
break;
case INT_RCV_OVERTIME: /* Receiving timeout interruption, triggered when no further data is available four data times after receiving a frame*/
case INT_RCV_SUCCESS: /* Interrupts are available to receive data */
rcv_num = CH438UartRecv(6, buffer, 7);
KPrintf("recv data length %d\n", rcv_num);
for (int i = 0; i < rcv_num; i ++) {
KPrintf("idx %d data 0x%x\n", i, buffer[i]);
}
break;
default:
break;
}
}
SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN),
CH438RegTest, CH438RegTest, CH438RegTest );