forked from xuos/xiuos
xuedongliang
commit
1f5d4ac765
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@ -7,12 +7,12 @@
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[submodule "Ubiquitous/RT-Thread_Fusion_XiUOS/aiit_board/aiit-riscv64-board/kendryte-sdk/kendryte-sdk-source"]
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path = Ubiquitous/RT-Thread_Fusion_XiUOS/aiit_board/aiit-riscv64-board/kendryte-sdk/kendryte-sdk-source
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url = https://code.gitlink.org.cn/chunyexixiaoyu/kendryte-sdk-source.git
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[submodule "Ubiquitous/Nuttx_Fusion_XiUOS/apps"]
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path = Ubiquitous/Nuttx_Fusion_XiUOS/apps
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url = https://code.gitlink.org.cn/wgzAIIT/incubator-nuttx-apps.git
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[submodule "Ubiquitous/Nuttx_Fusion_XiUOS/nuttx"]
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path = Ubiquitous/Nuttx_Fusion_XiUOS/nuttx
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url = https://code.gitlink.org.cn/wgzAIIT/incubator-nuttx.git
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[submodule "Ubiquitous/XiZi/fs/lwext4/lwext4_submodule"]
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path = Ubiquitous/XiZi/fs/lwext4/lwext4_submodule
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url = https://gitlink.org.cn/xuos/lwext4_filesystem_support_XiUOS.git
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[submodule "Ubiquitous/Nuttx_Fusion_XiUOS/nuttx"]
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path = Ubiquitous/Nuttx_Fusion_XiUOS/nuttx
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url = https://code.gitlink.org.cn/wgzAIIT/incubator-nuttx.git
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[submodule "Ubiquitous/Nuttx_Fusion_XiUOS/apps"]
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path = Ubiquitous/Nuttx_Fusion_XiUOS/apps
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url = https://code.gitlink.org.cn/wgzAIIT/incubator-nuttx-apps.git
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@ -89,7 +89,7 @@ int Adapter4GTest(void)
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struct Adapter* adapter = AdapterDeviceFindByName(ADAPTER_4G_NAME);
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#ifdef ADAPTER_EC200T
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//Using Hang Xiao server to test 4G Socket connection
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/* Using Public TCP server to test 4G Socket connection */
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uint8 server_addr[64] = "120.76.100.197";
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uint8 server_port[64] = "10002";
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@ -0,0 +1,7 @@
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############################################################################
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# APP_Framework/Framework/connection/bluetooth/Make.defs
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############################################################################
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ifneq ($(CONFIG_CONNECTION_ADAPTER_BLUETOOTH),)
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CONFIGURED_APPS += $(APPDIR)/../../../APP_Framework/Framework/connection/bluetooth
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endif
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include $(wildcard $(APPDIR)/../../../APP_Framework/Framework/connection/bluetooth/*/Make.defs)
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@ -1,7 +1,17 @@
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SRC_FILES := adapter_bluetooth.c
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include $(KERNEL_ROOT)/.config
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ifeq ($(CONFIG_ADD_NUTTX_FETURES),y)
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include $(APPDIR)/Make.defs
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CSRCS += adapter_bluetooth.c
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include $(APPDIR)/Application.mk
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ifeq ($(CONFIG_ADAPTER_HC08),y)
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SRC_DIR += hc08
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endif
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include $(KERNEL_ROOT)/compiler.mk
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ifeq ($(CONFIG_ADD_XIZI_FETURES),y)
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SRC_FILES := adapter_bluetooth.c
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ifeq ($(CONFIG_ADAPTER_HC08),y)
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SRC_DIR += hc08
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endif
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include $(KERNEL_ROOT)/compiler.mk
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endif
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@ -33,6 +33,25 @@ endif
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if ADD_NUTTX_FETURES
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config ADAPTER_HC08_WORK_ROLE
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string "HC08 work role M(MASTER) or S(SLAVER)"
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default "M"
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config ADAPTER_HC08_DRIVER_EXTUART
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bool "Using extra uart to support bluetooth"
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default y
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config ADAPTER_HC08_DRIVER
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string "HC08 device uart driver path"
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default "/dev/ttyS2"
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depends on !ADAPTER_HC08_DRIVER_EXTUART
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if ADAPTER_HC08_DRIVER_EXTUART
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config ADAPTER_HC08_DRIVER
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string "HC08 device extra uart driver path"
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default "/dev/extuart_dev2"
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endif
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endif
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if ADD_RTTHREAD_FETURES
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@ -0,0 +1,6 @@
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############################################################################
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# APP_Framework/Framework/connection/bluetooth/hc08/Make.defs
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############################################################################
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ifneq ($(CONFIG_ADAPTER_HC08),)
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CONFIGURED_APPS += $(APPDIR)/../../../APP_Framework/Framework/connection/bluetooth/hc08
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endif
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@ -1,3 +1,13 @@
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SRC_FILES := hc08.c
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include $(KERNEL_ROOT)/.config
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ifeq ($(CONFIG_ADD_NUTTX_FETURES),y)
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include $(APPDIR)/Make.defs
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CSRCS += hc08.c
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include $(APPDIR)/Application.mk
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include $(KERNEL_ROOT)/compiler.mk
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endif
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ifeq ($(CONFIG_ADD_XIZI_FETURES),y)
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SRC_FILES := hc08.c
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include $(KERNEL_ROOT)/compiler.mk
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endif
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@ -232,6 +232,41 @@ static int Hc08Close(struct Adapter *adapter)
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return 0;
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}
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#ifdef ADD_NUTTX_FETURES
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static int Hc08Ioctl(struct Adapter *adapter, int cmd, void *args)
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{
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if (OPE_INT != cmd) {
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printf("Hc08Ioctl only support OPE_INT, do not support %d\n", cmd);
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return -1;
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}
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uint32_t baud_rate = *((uint32_t *)args);
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PrivIoctl(adapter->fd, OPE_INT, baud_rate);
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//Step1 : detect hc08 serial function
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if (Hc08AtConfigure(adapter->agent, HC08_AT_CMD_DETECT, NULL, NULL) < 0) {
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return -1;
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}
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//Step2 : set hc08 device serial baud, hc08_set_baud send "AT+BAUD=%s"
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if (Hc08AtConfigure(adapter->agent, HC08_AT_CMD_SET_BAUDRATE, args, NULL) < 0) {
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return -1;
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}
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PrivTaskDelay(200);
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//Step3 : show hc08 device info, hc08_get send "AT+RX" response device info
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char device_info[HC08_RESP_DEFAULT_SIZE * 2] = {0};
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if (Hc08AtConfigure(adapter->agent, HC08_AT_CMD_GET_DEVICE_INFO, NULL, device_info) < 0) {
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return -1;
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}
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ADAPTER_DEBUG("Hc08 ioctl done\n");
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return 0;
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}
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#else
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static int Hc08Ioctl(struct Adapter *adapter, int cmd, void *args)
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{
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if (OPE_INT != cmd) {
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@ -283,6 +318,7 @@ static int Hc08Ioctl(struct Adapter *adapter, int cmd, void *args)
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return 0;
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}
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#endif
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static int Hc08SetAddr(struct Adapter *adapter, const char *ip, const char *gateway, const char *netmask)
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{
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@ -1,7 +1,7 @@
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############################################################################
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# APP_Framework/Framework/connection/lora/Make.defs
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############################################################################
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ifneq ($(CONFIG_ADAPTER_SX1278),)
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ifneq ($(CONFIG_CONNECTION_ADAPTER_LORA),)
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CONFIGURED_APPS += $(APPDIR)/../../../APP_Framework/Framework/connection/lora
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endif
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include $(wildcard $(APPDIR)/../../../APP_Framework/Framework/connection/lora/*/Make.defs)
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@ -50,6 +50,8 @@ extern AdapterProductInfoType E220Attach(struct Adapter *adapter);
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#define ADAPTER_LORA_RECEIVE_ERROR_CNT 1
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#define DEFAULT_SEM_TIMEOUT 10
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//need to change status if the lora client wants to quit the net when timeout or a certain event
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//eg.can also use sem to trigger quit function
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static int g_adapter_lora_quit_flag = 0;
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@ -453,7 +455,10 @@ static int LoraClientDataAnalyze(struct Adapter *adapter, void *send_buf, int le
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int ret = 0;
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uint8_t client_id = adapter->net_role_id;
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ret = PrivSemaphoreObtainWait(&adapter->sem, NULL);
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struct timespec abstime;
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abstime.tv_sec = DEFAULT_SEM_TIMEOUT;
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ret = PrivSemaphoreObtainWait(&adapter->sem, &abstime);
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if (0 == ret) {
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//only handle this client_id information from gateway
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if ((client_recv_data_format[client_id - 1].client_id == adapter->net_role_id) &&
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@ -681,6 +686,8 @@ static void *LoraReceiveTask(void *parameter)
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void LoraGatewayProcess(struct Adapter *lora_adapter, struct LoraGatewayParam *gateway)
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{
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int i, ret = 0;
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struct timespec abstime;
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abstime.tv_sec = DEFAULT_SEM_TIMEOUT;
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#ifdef GATEWAY_CMD_MODE
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for (i = 0; i < gateway->client_num; i ++) {
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@ -692,7 +699,7 @@ void LoraGatewayProcess(struct Adapter *lora_adapter, struct LoraGatewayParam *g
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continue;
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}
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ret = PrivSemaphoreObtainWait(&gateway_recv_data_sem, NULL);
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ret = PrivSemaphoreObtainWait(&gateway_recv_data_sem, &abstime);
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if (0 == ret) {
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printf("LoraGatewayProcess receive client %d data done\n", gateway->client_id[i]);
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}
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@ -37,6 +37,30 @@ endif
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if ADD_NUTTX_FETURES
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config ADAPTER_E220_M0_PATH
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string "E220 M0 pin device"
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default "/dev/gpout0"
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config ADAPTER_E220_M1_PATH
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string "E220 M1 pin device"
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default "/dev/gpout1"
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config ADAPTER_E220_DRIVER_EXTUART
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bool "Using extra uart to support lora"
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default y
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config ADAPTER_E220_DRIVER
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string "E220 device uart driver path"
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default "/dev/ttyS3"
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depends on !ADAPTER_E220_DRIVER_EXTUART
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if ADAPTER_E220_DRIVER_EXTUART
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config ADAPTER_E220_DRIVER
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string "E220 device extra uart driver path"
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default "/dev/extuart_dev3"
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endif
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endif
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if ADD_RTTHREAD_FETURES
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@ -0,0 +1,6 @@
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############################################################################
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# APP_Framework/Framework/connection/lora/e220/Make.defs
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############################################################################
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ifneq ($(CONFIG_ADAPTER_E220),)
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CONFIGURED_APPS += $(APPDIR)/../../../APP_Framework/Framework/connection/lora/e220
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endif
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@ -1,3 +1,13 @@
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SRC_FILES := e220.c
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include $(KERNEL_ROOT)/.config
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ifeq ($(CONFIG_ADD_NUTTX_FETURES),y)
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include $(APPDIR)/Make.defs
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CSRCS += e220.c
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include $(APPDIR)/Application.mk
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include $(KERNEL_ROOT)/compiler.mk
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endif
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ifeq ($(CONFIG_ADD_XIZI_FETURES),y)
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SRC_FILES := e220.c
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include $(KERNEL_ROOT)/compiler.mk
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endif
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@ -21,7 +21,7 @@
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#include <adapter.h>
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#define E220_GATEWAY_ADDRESS 0xFFFF
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#define E220_CHANNEL 0x04
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#define E220_CHANNEL 0x05
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#ifdef AS_LORA_GATEWAY_ROLE
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#define E220_ADDRESS E220_GATEWAY_ADDRESS
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@ -46,6 +46,60 @@ enum E220LoraMode
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* @param mode Lora working mode
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* @return NULL
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*/
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#ifdef ADD_NUTTX_FETURES
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static void E220LoraModeConfig(enum E220LoraMode mode)
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{
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int m0_fd, m1_fd;
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//delay 1s , wait AUX ready
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PrivTaskDelay(1000);
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m0_fd = PrivOpen(ADAPTER_E220_M0_PATH, O_RDWR);
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if (m0_fd < 0) {
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printf("open %s error\n", ADAPTER_E220_M0_PATH);
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return;
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}
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m1_fd = PrivOpen(ADAPTER_E220_M1_PATH, O_RDWR);
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if (m1_fd < 0) {
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printf("open %s error\n", ADAPTER_E220_M1_PATH);
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return;
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}
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//Both M0 and M1 GPIO are outputs mode, set M0 and M1 high or low
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switch (mode)
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{
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case DATA_TRANSFER_MODE:
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PrivIoctl(m1_fd, GPIOC_WRITE, (unsigned long)GPIO_LOW);
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PrivIoctl(m0_fd, GPIOC_WRITE, (unsigned long)GPIO_LOW);
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break;
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case WOR_SEND_MODE:
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PrivIoctl(m1_fd, GPIOC_WRITE, (unsigned long)GPIO_LOW);
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PrivIoctl(m0_fd, GPIOC_WRITE, (unsigned long)GPIO_HIGH);
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break;
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case WOR_RECEIVE_MODE:
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PrivIoctl(m1_fd, GPIOC_WRITE, (unsigned long)GPIO_HIGH);
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PrivIoctl(m0_fd, GPIOC_WRITE,(unsigned long)GPIO_LOW);
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break;
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case CONFIGURE_MODE_MODE:
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PrivIoctl(m1_fd, GPIOC_WRITE, (unsigned long)GPIO_HIGH);
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PrivIoctl(m0_fd, GPIOC_WRITE, (unsigned long)GPIO_HIGH);
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break;
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default:
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break;
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}
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PrivClose(m0_fd);
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PrivClose(m1_fd);
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//delay 20ms , wait mode switch done
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PrivTaskDelay(20);
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}
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#else
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static void E220LoraModeConfig(enum E220LoraMode mode)
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{
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//delay 1s , wait AUX ready
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@ -126,6 +180,7 @@ static void E220LoraModeConfig(enum E220LoraMode mode)
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//delay 20ms , wait mode switch done
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PrivTaskDelay(20);
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}
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#endif
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/**
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* @description: Switch baud rate to register bit
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@ -263,6 +318,25 @@ static int E220GetRegisterParam(uint8 *buf)
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* @param adapter - Lora device pointer
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* @return success: 0, failure: -1
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*/
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#ifdef ADD_NUTTX_FETURES
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static int E220Open(struct Adapter *adapter)
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{
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/*step1: open e220 uart port*/
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adapter->fd = PrivOpen(ADAPTER_E220_DRIVER, O_RDWR);
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if (adapter->fd < 0) {
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printf("E220Open get uart %s fd error\n", ADAPTER_E220_DRIVER);
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return -1;
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}
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PrivIoctl(adapter->fd, OPE_INT, (unsigned long)BAUD_RATE_9600);
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E220SetRegisterParam(adapter, E220_ADDRESS, E220_CHANNEL, E220_UART_BAUD_RATE);
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PrivIoctl(adapter->fd, OPE_INT, (unsigned long)E220_UART_BAUD_RATE);
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ADAPTER_DEBUG("E220Open done\n");
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return 0;
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}
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#else
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static int E220Open(struct Adapter *adapter)
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{
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/*step1: open e220 uart port*/
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@ -316,6 +390,7 @@ static int E220Open(struct Adapter *adapter)
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return 0;
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}
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#endif
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/**
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* @description: Close E220 uart function
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||||
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|
@ -520,6 +595,7 @@ static void LoraRead(void *parameter)
|
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}
|
||||
}
|
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|
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#ifdef ADD_XIZI_FETURES
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||||
static void LoraTest(void)
|
||||
{
|
||||
int ret;
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||||
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@ -554,3 +630,40 @@ static void LoraSend(int argc, char *argv[])
|
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}
|
||||
SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN),
|
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LoraSend, LoraSend, lora send message);
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#endif
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||||
|
||||
#ifdef ADD_NUTTX_FETURES
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||||
void E220LoraReceive(void)
|
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{
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||||
int ret;
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pthread_t thread;
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||||
pthread_attr_t attr = PTHREAD_ATTR_INITIALIZER;
|
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attr.priority = 80;
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||||
attr.stacksize = 2048;
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|
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LoraOpen();
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||||
|
||||
ret = PrivTaskCreate(&thread, &attr, (void*)LoraRead, NULL);
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if (ret < 0) {
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||||
printf("task lora read create failed, status=%d\n", ret);
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return;
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||||
}
|
||||
}
|
||||
void E220LoraSend(int argc, char *argv[])
|
||||
{
|
||||
struct Adapter *adapter = AdapterDeviceFindByName(ADAPTER_LORA_NAME);
|
||||
if (NULL == adapter) {
|
||||
printf("LoraRead find lora adapter error\n");
|
||||
return;
|
||||
}
|
||||
|
||||
if (argc == 2) {
|
||||
char Msg[256] = {0};
|
||||
strncpy(Msg, argv[1], 256);
|
||||
|
||||
E220Open(adapter);
|
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E220Send(adapter, Msg, strlen(Msg));
|
||||
E220Close(adapter);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -0,0 +1,7 @@
|
|||
############################################################################
|
||||
# APP_Framework/Framework/connection/zigbee/Make.defs
|
||||
############################################################################
|
||||
ifneq ($(CONFIG_CONNECTION_ADAPTER_WIFI),)
|
||||
CONFIGURED_APPS += $(APPDIR)/../../../APP_Framework/Framework/connection/wifi
|
||||
endif
|
||||
include $(wildcard $(APPDIR)/../../../APP_Framework/Framework/connection/wifi/*/Make.defs)
|
||||
|
|
@ -1,3 +1,12 @@
|
|||
include $(KERNEL_ROOT)/.config
|
||||
ifeq ($(CONFIG_ADD_NUTTX_FETURES),y)
|
||||
include $(APPDIR)/Make.defs
|
||||
CSRCS += adapter_wifi.c
|
||||
include $(APPDIR)/Application.mk
|
||||
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_ADD_XIZI_FETURES),y)
|
||||
SRC_FILES := adapter_wifi.c
|
||||
|
||||
ifeq ($(CONFIG_ADAPTER_HFA21_WIFI),y)
|
||||
|
|
@ -9,3 +18,4 @@ ifeq ($(CONFIG_ADAPTER_ESP07S_WIFI),y)
|
|||
endif
|
||||
|
||||
include $(KERNEL_ROOT)/compiler.mk
|
||||
endif
|
||||
|
|
|
|||
|
|
@ -100,6 +100,7 @@ int AdapterWifiInit(void)
|
|||
}
|
||||
|
||||
/******************wifi TEST*********************/
|
||||
#ifdef ADD_XIZI_FETURES
|
||||
int AdapterWifiTest(void)
|
||||
{
|
||||
char cmd[64];
|
||||
|
|
@ -107,7 +108,6 @@ int AdapterWifiTest(void)
|
|||
|
||||
struct Adapter* adapter = AdapterDeviceFindByName(ADAPTER_WIFI_NAME);
|
||||
|
||||
|
||||
#ifdef ADAPTER_HFA21_DRIVER_EXT_PORT
|
||||
static BusType ch438_pin;
|
||||
ch438_pin = PinBusInitGet();
|
||||
|
|
@ -155,7 +155,6 @@ int AdapterWifiTest(void)
|
|||
PrivClose(pin_fd);
|
||||
#endif
|
||||
|
||||
|
||||
AdapterDeviceOpen(adapter);
|
||||
// AdapterDeviceControl(adapter, OPE_INT, &baud_rate);
|
||||
|
||||
|
|
@ -182,8 +181,8 @@ int AdapterWifiTest(void)
|
|||
AdapterDeviceRecv(adapter, wifi_recv_msg, 128);
|
||||
PrivTaskDelay(1000);
|
||||
}
|
||||
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef ADD_RTTHREAD_FETURES
|
||||
MSH_CMD_EXPORT(AdapterWifiTest,a wifi adpter sample);
|
||||
|
|
@ -195,8 +194,7 @@ SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_FUNC)|SHE
|
|||
int wifiopen(void)
|
||||
{
|
||||
struct Adapter* adapter = AdapterDeviceFindByName(ADAPTER_WIFI_NAME);
|
||||
|
||||
AdapterDeviceOpen(adapter);
|
||||
return AdapterDeviceOpen(adapter);
|
||||
}
|
||||
#ifdef ADD_XIZI_FETURES
|
||||
SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_FUNC)|SHELL_CMD_PARAM_NUM(0)|SHELL_CMD_DISABLE_RETURN, wifiopen, wifiopen, open adapter wifi );
|
||||
|
|
@ -204,8 +202,7 @@ SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_FUNC)|SHE
|
|||
int wificlose(void)
|
||||
{
|
||||
struct Adapter* adapter = AdapterDeviceFindByName(ADAPTER_WIFI_NAME);
|
||||
|
||||
AdapterDeviceClose(adapter);
|
||||
return AdapterDeviceClose(adapter);
|
||||
}
|
||||
#ifdef ADD_XIZI_FETURES
|
||||
SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_FUNC)|SHELL_CMD_PARAM_NUM(0)|SHELL_CMD_DISABLE_RETURN, wificlose, wificlose, close adapter wifi );
|
||||
|
|
@ -215,12 +212,12 @@ int wifisetup(int argc, char *argv[])
|
|||
struct Adapter* adapter = AdapterDeviceFindByName(ADAPTER_WIFI_NAME);
|
||||
struct WifiParam param;
|
||||
memset(¶m,0,sizeof(struct WifiParam));
|
||||
strncpy(param.wifi_ssid, argv[1], strlen(argv[1]));
|
||||
strncpy(param.wifi_pwd, argv[2], strlen(argv[2]));
|
||||
strncpy((char *)param.wifi_ssid, argv[1], strlen(argv[1]));
|
||||
strncpy((char *)param.wifi_pwd, argv[2], strlen(argv[2]));
|
||||
|
||||
adapter->adapter_param = ¶m;
|
||||
|
||||
AdapterDeviceSetUp(adapter);
|
||||
return AdapterDeviceSetUp(adapter);
|
||||
}
|
||||
#ifdef ADD_XIZI_FETURES
|
||||
SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN)|SHELL_CMD_PARAM_NUM(3)|SHELL_CMD_DISABLE_RETURN, wifisetup, wifisetup, setup adapter wifi );
|
||||
|
|
@ -234,7 +231,7 @@ int wifiaddrset(int argc, char *argv[])
|
|||
|
||||
AdapterDeviceSetAddr(adapter, ip, gateway, netmask);
|
||||
AdapterDevicePing(adapter, "36.152.44.95");///< ping www.baidu.com
|
||||
AdapterDeviceNetstat(adapter);
|
||||
return AdapterDeviceNetstat(adapter);
|
||||
}
|
||||
#ifdef ADD_XIZI_FETURES
|
||||
SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN)|SHELL_CMD_PARAM_NUM(4)|SHELL_CMD_DISABLE_RETURN, wifiaddrset, wifiaddrset, addrset adapter wifi);
|
||||
|
|
@ -243,7 +240,7 @@ int wifiping(int argc, char *argv[])
|
|||
{
|
||||
struct Adapter* adapter = AdapterDeviceFindByName(ADAPTER_WIFI_NAME);
|
||||
printf("ping %s\n",argv[1]);
|
||||
AdapterDevicePing(adapter, argv[1]);
|
||||
return AdapterDevicePing(adapter, argv[1]);
|
||||
}
|
||||
#ifdef ADD_XIZI_FETURES
|
||||
SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN)|SHELL_CMD_PARAM_NUM(3), wifiping, wifiping, wifiping adapter );
|
||||
|
|
@ -264,7 +261,7 @@ int wificonnect(int argc, char *argv[])
|
|||
adapter->socket.protocal = SOCKET_PROTOCOL_UDP;
|
||||
}
|
||||
|
||||
AdapterDeviceConnect(adapter, net_role, ip, port, ip_type);
|
||||
return AdapterDeviceConnect(adapter, net_role, ip, port, ip_type);
|
||||
}
|
||||
#ifdef ADD_XIZI_FETURES
|
||||
SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN)|SHELL_CMD_PARAM_NUM(4)|SHELL_CMD_DISABLE_RETURN, wificonnect, wificonnect, wificonnect adapter);
|
||||
|
|
@ -279,6 +276,7 @@ int wifisend(int argc, char *argv[])
|
|||
AdapterDeviceSend(adapter, wifi_msg, len);
|
||||
PrivTaskDelay(1000);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
#ifdef ADD_XIZI_FETURES
|
||||
SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN)|SHELL_CMD_PARAM_NUM(3)|SHELL_CMD_DISABLE_RETURN, wifisend, wifisend, wifisend adapter wifi information);
|
||||
|
|
@ -297,3 +295,117 @@ int wifirecv(int argc, char *argv[])
|
|||
#ifdef ADD_XIZI_FETURES
|
||||
SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN)|SHELL_CMD_PARAM_NUM(3)|SHELL_CMD_DISABLE_RETURN, wifirecv, wifirecv, wifirecv adapter wifi information);
|
||||
#endif
|
||||
|
||||
#ifdef ADD_NUTTX_FETURES
|
||||
|
||||
enum
|
||||
{
|
||||
APT_WIFI_PARAM_IP,
|
||||
APT_WIFI_PARAM_PORT,
|
||||
APT_WIFI_PARAM_SSID,
|
||||
APT_WIFI_PARAM_PWD,
|
||||
APT_WIFI_PARAM_GW,
|
||||
APT_WIFI_PARAM_SERVER,
|
||||
APT_WIFI_PARAM_MASK,
|
||||
APT_WIFI_PARAM_PING,
|
||||
APT_WIFI_PARAM_NUM
|
||||
};
|
||||
|
||||
#define APT_WIFI_PARAM_LEN 20
|
||||
|
||||
char wifi_param[APT_WIFI_PARAM_NUM][APT_WIFI_PARAM_LEN] = {0};
|
||||
|
||||
#define CHECK_RET(__func) \
|
||||
ret = __func; \
|
||||
if(ret != 0){ \
|
||||
printf("%s %d failed\n", __func__, __LINE__); \
|
||||
AdapterDeviceClose(adapter); \
|
||||
return ret; \
|
||||
};
|
||||
|
||||
void AdapterWifiGetParam(int argc, char *argv[])
|
||||
{
|
||||
int i, j;
|
||||
char *param_str[] = {"ip", "port", "ssid", "pwd", "gw", "server", "mask", "ping"};
|
||||
char *default_str[] =
|
||||
{"192.168.137.34", "12345", "test", "tttttttt", "192.168.137.71", "192.168.137.1", "255.255.255.0", "220.181.38.251"};
|
||||
|
||||
for(i = 0; i < APT_WIFI_PARAM_NUM; i ++)
|
||||
{
|
||||
memset(wifi_param[i], 0, APT_WIFI_PARAM_LEN);
|
||||
strcpy(wifi_param[i], default_str[i]);
|
||||
}
|
||||
|
||||
for(i = 0; i < argc; i ++)
|
||||
{
|
||||
for(j = 0; j < APT_WIFI_PARAM_NUM; j ++)
|
||||
{
|
||||
if(strncmp(argv[i], param_str[j], strlen(param_str[j])) == 0)
|
||||
{
|
||||
printf("wifi %d: %s\n", j, argv[i] + strlen(param_str[j]) + 1);
|
||||
strcpy(wifi_param[j], argv[i] + strlen(param_str[j]) + 1);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
printf("--- wifi parameter ---\n");
|
||||
for(i = 0; i < APT_WIFI_PARAM_NUM; i ++)
|
||||
{
|
||||
printf("%7.7s = %s\n", param_str[i], wifi_param[i]);
|
||||
}
|
||||
printf("----------------------\n");
|
||||
}
|
||||
|
||||
|
||||
int AdapterWifiTest(int argc, char *argv[])
|
||||
{
|
||||
int i, ret;
|
||||
|
||||
struct Adapter* adapter = AdapterDeviceFindByName(ADAPTER_WIFI_NAME);
|
||||
AdapterWifiGetParam(argc, argv);
|
||||
|
||||
enum NetRoleType net_role = CLIENT;
|
||||
enum IpType ip_type = IPV4;
|
||||
struct WifiParam param;
|
||||
memset(¶m, 0, sizeof(struct WifiParam));
|
||||
strncpy((char *)param.wifi_ssid, wifi_param[APT_WIFI_PARAM_SSID], strlen(wifi_param[APT_WIFI_PARAM_SSID]));
|
||||
strncpy((char *)param.wifi_pwd, wifi_param[APT_WIFI_PARAM_PWD], strlen(wifi_param[APT_WIFI_PARAM_PWD]));
|
||||
|
||||
adapter->adapter_param = ¶m;
|
||||
|
||||
CHECK_RET(AdapterDeviceOpen(adapter));
|
||||
CHECK_RET(AdapterDeviceSetUp(adapter));
|
||||
|
||||
CHECK_RET(AdapterDeviceSetAddr(adapter, wifi_param[APT_WIFI_PARAM_IP], wifi_param[APT_WIFI_PARAM_GW],
|
||||
wifi_param[APT_WIFI_PARAM_MASK]));
|
||||
|
||||
CHECK_RET(AdapterDeviceNetstat(adapter));
|
||||
|
||||
adapter->socket.protocal = SOCKET_PROTOCOL_TCP;
|
||||
CHECK_RET(AdapterDeviceConnect(adapter, net_role, wifi_param[APT_WIFI_PARAM_SERVER],
|
||||
wifi_param[APT_WIFI_PARAM_PORT], ip_type));
|
||||
|
||||
const char *wifi_msg = "Wifi Test";
|
||||
for(i = 0; i < 10; i++)
|
||||
{
|
||||
AdapterDeviceSend(adapter, wifi_msg, strlen(wifi_msg));
|
||||
PrivTaskDelay(4000);
|
||||
}
|
||||
|
||||
char wifi_recv_msg[128];
|
||||
for(i = 0; i < 10; i ++)
|
||||
{
|
||||
AdapterDeviceRecv(adapter, wifi_recv_msg, 128);
|
||||
PrivTaskDelay(1000);
|
||||
}
|
||||
|
||||
// printf("ping %s\n", wifi_param[APT_WIFI_PARAM_PING]);
|
||||
//
|
||||
// CHECK_RET(AdapterDevicePing(adapter, wifi_param[APT_WIFI_PARAM_PING]));
|
||||
// AdapterDeviceDisconnect(adapter, NULL);
|
||||
ret = AdapterDeviceClose(adapter);
|
||||
return ret;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -8,6 +8,27 @@ if ADD_XIZI_FETURES
|
|||
bool "Using extra uart to support wifi"
|
||||
default n
|
||||
|
||||
config ADAPTER_ESP07S_DRIVER
|
||||
string "ESP07S device uart driver path"
|
||||
default "/dev/ttyS2"
|
||||
depends on !ADAPTER_ESP07S_DRIVER_EXTUART
|
||||
|
||||
if ADAPTER_ESP07S_DRIVER_EXTUART
|
||||
config ADAPTER_ESP07S_DRIVER
|
||||
string "ESP07S device extra uart driver path"
|
||||
default "/dev/extuart_dev6"
|
||||
|
||||
config ADAPTER_ESP07S_DRIVER_EXT_PORT
|
||||
int "if ESP07S device using extuart, choose port"
|
||||
default "6"
|
||||
endif
|
||||
endif
|
||||
|
||||
if ADD_NUTTX_FETURES
|
||||
config ADAPTER_ESP07S_DRIVER_EXTUART
|
||||
bool "Using extra uart to support wifi"
|
||||
default n
|
||||
|
||||
config ADAPTER_ESP07S_DRIVER
|
||||
string "ESP07S device uart driver path"
|
||||
default "/dev/uart2_dev2"
|
||||
|
|
@ -24,10 +45,6 @@ if ADD_XIZI_FETURES
|
|||
endif
|
||||
endif
|
||||
|
||||
if ADD_NUTTX_FETURES
|
||||
|
||||
endif
|
||||
|
||||
if ADD_RTTHREAD_FETURES
|
||||
|
||||
endif
|
||||
|
|
|
|||
|
|
@ -0,0 +1,6 @@
|
|||
############################################################################
|
||||
# APP_Framework/Framework/connection/zigbee/e18/Make.defs
|
||||
############################################################################
|
||||
ifneq ($(CONFIG_ADAPTER_ESP07S_WIFI),)
|
||||
CONFIGURED_APPS += $(APPDIR)/../../../APP_Framework/Framework/connection/wifi/esp07s_wifi
|
||||
endif
|
||||
|
|
@ -1,3 +1,13 @@
|
|||
include $(KERNEL_ROOT)/.config
|
||||
ifeq ($(CONFIG_ADD_NUTTX_FETURES),y)
|
||||
include $(APPDIR)/Make.defs
|
||||
CSRCS += esp07s_wifi.c
|
||||
include $(APPDIR)/Application.mk
|
||||
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_ADD_XIZI_FETURES),y)
|
||||
SRC_FILES := esp07s_wifi.c
|
||||
|
||||
include $(KERNEL_ROOT)/compiler.mk
|
||||
endif
|
||||
|
|
|
|||
|
|
@ -25,6 +25,11 @@
|
|||
|
||||
#define LEN_PARA_BUF 128
|
||||
|
||||
#ifdef ADD_NUTTX_FETURES
|
||||
#define EOK 0
|
||||
#define x_err_t int
|
||||
#endif
|
||||
|
||||
static int Esp07sWifiSetDown(struct Adapter *adapter_at);
|
||||
|
||||
/**
|
||||
|
|
|
|||
|
|
@ -22,8 +22,8 @@ if ADD_XIZI_FETURES
|
|||
int "E18 MODE pin number"
|
||||
default "61"
|
||||
|
||||
config ADAPTER_BC28_PIN_DRIVER
|
||||
string "BC28 device pin driver path"
|
||||
config ADAPTER_E18_PIN_DRIVER
|
||||
string "E18 device pin driver path"
|
||||
default "/dev/pin_dev"
|
||||
|
||||
config ADAPTER_E18_DRIVER_EXTUART
|
||||
|
|
@ -47,11 +47,31 @@ if ADD_XIZI_FETURES
|
|||
endif
|
||||
|
||||
if ADD_NUTTX_FETURES
|
||||
config ADAPTER_E18_MODEPIN
|
||||
int "E18 MODE pin number"
|
||||
default "61"
|
||||
|
||||
config ADAPTER_E18_PIN_DRIVER
|
||||
string "E18 device pin driver path"
|
||||
default "/dev/pin_dev"
|
||||
|
||||
config ADAPTER_E18_DRIVER
|
||||
string "E18 device uart driver path"
|
||||
default "/dev/ttyS1"
|
||||
depends on !ADAPTER_E18_DRIVER_EXTUART
|
||||
---help---
|
||||
If USART1 is selected, then fill in /dev/ttyS1 here.
|
||||
|
||||
if ADAPTER_E18_DRIVER_EXTUART
|
||||
config ADAPTER_E18_DRIVER
|
||||
string "E18 device extra uart driver path"
|
||||
default "/dev/extuart_dev1"
|
||||
|
||||
config ADAPTER_E18_DRIVER_EXT_PORT
|
||||
int "if E18 device using extuart, choose port"
|
||||
default "1"
|
||||
endif
|
||||
|
||||
endif
|
||||
|
||||
if ADD_RTTHREAD_FETURES
|
||||
|
|
|
|||
|
|
@ -45,7 +45,7 @@ static int E18HardwareModeGet()
|
|||
int ret = 0;
|
||||
int pin_fd;
|
||||
|
||||
pin_fd = PrivOpen(ADAPTER_BC28_PIN_DRIVER, O_RDWR);
|
||||
pin_fd = PrivOpen(ADAPTER_E18_PIN_DRIVER, O_RDWR);
|
||||
|
||||
struct PinStat pin_stat;
|
||||
pin_stat.pin = ADAPTER_E18_MODEPIN;
|
||||
|
|
@ -175,7 +175,7 @@ static int E18NetworkModeConfig(struct Adapter *adapter)
|
|||
}
|
||||
|
||||
out:
|
||||
if(E18_AS_HEX_MODE == mode){
|
||||
if(E18_AS_AT_MODE == mode){
|
||||
AtCmdConfigAndCheck(adapter->agent, cmd_exit, "+OK");
|
||||
}
|
||||
|
||||
|
|
@ -204,6 +204,8 @@ static int E18NetRoleConfig(struct Adapter *adapter)
|
|||
}
|
||||
}
|
||||
|
||||
//wait 2second
|
||||
PrivTaskDelay(2000);
|
||||
|
||||
switch (adapter->net_role)
|
||||
{
|
||||
|
|
@ -240,7 +242,7 @@ static int E18NetRoleConfig(struct Adapter *adapter)
|
|||
}
|
||||
|
||||
out:
|
||||
if(E18_AS_HEX_MODE == mode) {
|
||||
if(E18_AS_AT_MODE == mode) {
|
||||
AtCmdConfigAndCheck(adapter->agent, cmd_exit, "+OK");
|
||||
}
|
||||
|
||||
|
|
@ -382,7 +384,7 @@ static int E18Join(struct Adapter *adapter, unsigned char *priv_net_group)
|
|||
|
||||
// }
|
||||
if(!ret){
|
||||
if(E18_AS_HEX_MODE == mode) {
|
||||
if(E18_AS_AT_MODE == mode) {
|
||||
ret = AtCmdConfigAndCheck(adapter->agent, cmd_exit, "+OK");
|
||||
if(ret < 0) {
|
||||
printf("%s %d cmd[%s] config failed!\n",__func__,__LINE__,cmd_exit);
|
||||
|
|
|
|||
|
|
@ -55,17 +55,19 @@ int PrivSemaphoreDelete(sem_t *sem)
|
|||
|
||||
int PrivSemaphoreObtainWait(sem_t *sem, const struct timespec *abstime)
|
||||
{
|
||||
/* if the timeout is not set, it will be blocked all the time. */
|
||||
if(!abstime)
|
||||
{
|
||||
return sem_wait(sem);
|
||||
}
|
||||
|
||||
/* if the timeout time is set, it will be executed downward after the timeout, and will not be blocked. */
|
||||
struct timespec timeout;
|
||||
clock_gettime(CLOCK_REALTIME, &timeout);
|
||||
timeout.tv_sec += abstime->tv_sec;
|
||||
return sem_timedwait(sem, &timeout);
|
||||
}
|
||||
|
||||
int PrivSemaphoreObtainWaitForever(sem_t *sem)
|
||||
{
|
||||
return sem_wait(sem);
|
||||
}
|
||||
|
||||
int PrivSemaphoreObtainNoWait(sem_t *sem)
|
||||
{
|
||||
return sem_trywait(sem);
|
||||
|
|
@ -133,40 +135,9 @@ int PrivWrite(int fd, const void *buf, size_t len)
|
|||
return write(fd, buf, len);
|
||||
}
|
||||
|
||||
static int PrivSerialIoctl(int fd, int cmd, void *args)
|
||||
int PrivIoctl(int fd, int cmd, unsigned long args)
|
||||
{
|
||||
struct SerialDataCfg *serial_cfg = (struct SerialDataCfg *)args;
|
||||
return ioctl(fd, cmd, serial_cfg);
|
||||
}
|
||||
|
||||
static int PrivPinIoctl(int fd, int cmd, void *args)
|
||||
{
|
||||
struct PinParam *pin_cfg = (struct PinParam *)args;
|
||||
|
||||
return ioctl(fd, cmd, pin_cfg);
|
||||
}
|
||||
|
||||
int PrivIoctl(int fd, int cmd, void *args)
|
||||
{
|
||||
int ret = 0;
|
||||
struct PrivIoctlCfg *ioctl_cfg = (struct PrivIoctlCfg *)args;
|
||||
|
||||
switch (ioctl_cfg->ioctl_driver_type)
|
||||
{
|
||||
case SERIAL_TYPE:
|
||||
ret = PrivSerialIoctl(fd, cmd, ioctl_cfg->args);
|
||||
break;
|
||||
case PIN_TYPE:
|
||||
ret = PrivPinIoctl(fd, cmd, ioctl_cfg->args);
|
||||
break;
|
||||
case I2C_TYPE:
|
||||
ret = ioctl(fd, cmd, ioctl_cfg->args);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
return ioctl(fd, cmd, args);
|
||||
}
|
||||
|
||||
/********************memory api************/
|
||||
|
|
|
|||
|
|
@ -28,6 +28,8 @@
|
|||
#include <stddef.h>
|
||||
#include <stdint.h>
|
||||
#include <nuttx/wireless/lpwan/sx127x.h>
|
||||
#include <nuttx/ioexpander/gpio.h>
|
||||
#include <termios.h>
|
||||
|
||||
typedef uint8_t uint8;
|
||||
typedef uint16_t uint16;
|
||||
|
|
@ -48,6 +50,7 @@ extern "C" {
|
|||
|
||||
#define NAME_NUM_MAX 32
|
||||
|
||||
|
||||
/*********************GPIO define*********************/
|
||||
#define GPIO_LOW 0x00
|
||||
#define GPIO_HIGH 0x01
|
||||
|
|
@ -172,15 +175,11 @@ int PrivMutexDelete(pthread_mutex_t *p_mutex);
|
|||
int PrivMutexObtain(pthread_mutex_t *p_mutex);
|
||||
int PrivMutexAbandon(pthread_mutex_t *p_mutex);
|
||||
|
||||
|
||||
|
||||
|
||||
/*********************semaphore**********************/
|
||||
|
||||
int PrivSemaphoreCreate(sem_t *sem, int pshared, unsigned int value);
|
||||
int PrivSemaphoreDelete(sem_t *sem);
|
||||
int PrivSemaphoreObtainWait(sem_t *sem, const struct timespec *abstime);
|
||||
int PrivSemaphoreObtainWaitForever(sem_t *sem);
|
||||
int PrivSemaphoreObtainNoWait(sem_t *sem);
|
||||
int PrivSemaphoreAbandon(sem_t *sem);
|
||||
int32_t PrivSemaphoreSetValue(int32_t sem, uint16_t val);
|
||||
|
|
@ -201,7 +200,7 @@ int PrivOpen(const char *path, int flags);
|
|||
int PrivRead(int fd, void *buf, size_t len);
|
||||
int PrivWrite(int fd, const void *buf, size_t len);
|
||||
int PrivClose(int fd);
|
||||
int PrivIoctl(int fd, int cmd, void *args);
|
||||
int PrivIoctl(int fd, int cmd, unsigned long args);
|
||||
|
||||
/*********************memory***********************/
|
||||
|
||||
|
|
|
|||
|
|
@ -83,5 +83,123 @@ config XIDATONG_USB_AUTOMOUNT_UDELAY
|
|||
|
||||
endif # XIDATONG_USB_AUTOMOUNT
|
||||
|
||||
menuconfig BSP_USING_CH438
|
||||
bool "Using CH438 device"
|
||||
default n
|
||||
|
||||
endif
|
||||
if BSP_USING_CH438
|
||||
config CH438_EXTUART0
|
||||
bool "Using Ch438 Port 0"
|
||||
default n
|
||||
|
||||
menu "Ch438 Port 0 Configuration"
|
||||
depends on CH438_EXTUART0
|
||||
|
||||
config CH438_EXTUART0_BAUD
|
||||
int "Ch438 Port 0 Baud Rate."
|
||||
default 115200
|
||||
---help---
|
||||
The configured BAUD of the CH438 EXTUART0.
|
||||
endmenu
|
||||
|
||||
config CH438_EXTUART1
|
||||
bool "Using Ch438 Port 1"
|
||||
default n
|
||||
|
||||
menu "Ch438 Port 1 Configuration"
|
||||
depends on CH438_EXTUART1
|
||||
|
||||
config CH438_EXTUART1_BAUD
|
||||
int "Ch438 Port 1 Baud Rate."
|
||||
default 115200
|
||||
---help---
|
||||
The configured BAUD of the CH438 EXTUART1.
|
||||
endmenu
|
||||
|
||||
config CH438_EXTUART2
|
||||
bool "Using Ch438 Port 2"
|
||||
default n
|
||||
|
||||
menu "Ch438 Port 2 Configuration"
|
||||
depends on CH438_EXTUART2
|
||||
|
||||
config CH438_EXTUART2_BAUD
|
||||
int "Ch438 Port 2 Baud Rate."
|
||||
default 115200
|
||||
---help---
|
||||
The configured BAUD of the CH438 EXTUART2.
|
||||
endmenu
|
||||
|
||||
config CH438_EXTUART3
|
||||
bool "Using Ch438 Port 3"
|
||||
default n
|
||||
|
||||
menu "Ch438 Port 3 Configuration"
|
||||
depends on CH438_EXTUART3
|
||||
|
||||
config CH438_EXTUART3_BAUD
|
||||
int "Ch438 Port 3 Baud Rate."
|
||||
default 115200
|
||||
---help---
|
||||
The configured BAUD of the CH438 EXTUART3.
|
||||
endmenu
|
||||
|
||||
config CH438_EXTUART4
|
||||
bool "Using Ch438 Port 4"
|
||||
default n
|
||||
|
||||
menu "Ch438 Port 4 Configuration"
|
||||
depends on CH438_EXTUART4
|
||||
|
||||
config CH438_EXTUART4_BAUD
|
||||
int "Ch438 Port 4 Baud Rate."
|
||||
default 115200
|
||||
---help---
|
||||
The configured BAUD of the CH438 EXTUART4.
|
||||
endmenu
|
||||
|
||||
config CH438_EXTUART5
|
||||
bool "Using Ch438 Port 5"
|
||||
default n
|
||||
|
||||
menu "Ch438 Port 5 Configuration"
|
||||
depends on CH438_EXTUART5
|
||||
|
||||
config CH438_EXTUART5_BAUD
|
||||
int "Ch438 Port 5 Baud Rate."
|
||||
default 115200
|
||||
---help---
|
||||
The configured BAUD of the CH438 EXTUART5.
|
||||
endmenu
|
||||
|
||||
config CH438_EXTUART6
|
||||
bool "Using Ch438 Port 6"
|
||||
default n
|
||||
|
||||
menu "Ch438 Port 6 Configuration"
|
||||
depends on CH438_EXTUART6
|
||||
|
||||
config CH438_EXTUART6_BAUD
|
||||
int "Ch438 Port 6 Baud Rate."
|
||||
default 115200
|
||||
---help---
|
||||
The configured BAUD of the CH438 EXTUART6.
|
||||
endmenu
|
||||
|
||||
config CH438_EXTUART7
|
||||
bool "Using Ch438 Port 7"
|
||||
default n
|
||||
|
||||
menu "Ch438 Port 7 Configuration"
|
||||
depends on CH438_EXTUART7
|
||||
|
||||
config CH438_EXTUART7_BAUD
|
||||
int "Ch438 Port 7 Baud Rate."
|
||||
default 115200
|
||||
---help---
|
||||
The configured BAUD of the CH438 EXTUART7.
|
||||
endmenu
|
||||
|
||||
endif # BSP_USING_CH438
|
||||
|
||||
endif # ARCH_BOARD_XIDATONG
|
||||
|
|
|
|||
|
|
@ -22,7 +22,8 @@ CONFIG_BOARD_LOOPSPERMSEC=104926
|
|||
CONFIG_BUILTIN=y
|
||||
CONFIG_CLOCK_MONOTONIC=y
|
||||
CONFIG_EXAMPLES_HELLO=y
|
||||
CONFIG_FS_PROCFS=y
|
||||
CONFIG_IMXRT_GPIO_IRQ=y
|
||||
CONFIG_IMXRT_GPIO3_0_15_IRQ=y
|
||||
CONFIG_IDLETHREAD_STACKSIZE=2048
|
||||
CONFIG_IMXRT_LPUART1=y
|
||||
CONFIG_INTELHEX_BINARY=y
|
||||
|
|
@ -63,4 +64,5 @@ CONFIG_READLINE_TABCOMPLETION=y
|
|||
CONFIG_FS_ROMFS=y
|
||||
CONFIG_NSH_ROMFSETC=y
|
||||
CONFIG_NSH_ARCHROMFS=y
|
||||
CONFIG_BOARDCTL_RESET=y
|
||||
CONFIG_USER_ENTRYPOINT="nsh_main"
|
||||
|
|
|
|||
|
|
@ -0,0 +1,65 @@
|
|||
#
|
||||
# This file is autogenerated: PLEASE DO NOT EDIT IT.
|
||||
#
|
||||
# You can use "make menuconfig" to make any modifications to the installed .config file.
|
||||
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
|
||||
# modifications.
|
||||
#
|
||||
CONFIG_ADD_NUTTX_FETURES=y
|
||||
CONFIG_ARCH="arm"
|
||||
CONFIG_ARCH_BOARD="xidatong"
|
||||
CONFIG_ARCH_BOARD_XIDATONG=y
|
||||
CONFIG_ARCH_CHIP="imxrt"
|
||||
CONFIG_ARCH_CHIP_IMXRT=y
|
||||
CONFIG_ARCH_CHIP_MIMXRT1052CVL5B=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=10240
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
CONFIG_ARMV7M_DCACHE=y
|
||||
CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
|
||||
CONFIG_ARMV7M_ICACHE=y
|
||||
CONFIG_ARMV7M_USEBASEPRI=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=104926
|
||||
CONFIG_BUILTIN=y
|
||||
CONFIG_CLOCK_MONOTONIC=y
|
||||
CONFIG_EXAMPLES_HELLO=y
|
||||
CONFIG_IMXRT_GPIO_IRQ=y
|
||||
CONFIG_IMXRT_GPIO3_0_15_IRQ=y
|
||||
CONFIG_IDLETHREAD_STACKSIZE=2048
|
||||
CONFIG_IMXRT_LPUART1=y
|
||||
CONFIG_INTELHEX_BINARY=y
|
||||
CONFIG_LPUART1_SERIAL_CONSOLE=y
|
||||
CONFIG_NSH_ARCHINIT=y
|
||||
CONFIG_NSH_BUILTIN_APPS=y
|
||||
CONFIG_NSH_DISABLE_IFUPDOWN=y
|
||||
CONFIG_NSH_FILEIOSIZE=512
|
||||
CONFIG_NSH_LINELEN=64
|
||||
CONFIG_NSH_READLINE=y
|
||||
CONFIG_RAM_SIZE=524288
|
||||
CONFIG_RAM_START=0x20200000
|
||||
CONFIG_RAW_BINARY=y
|
||||
CONFIG_SCHED_HPWORK=y
|
||||
CONFIG_SCHED_WAITPID=y
|
||||
CONFIG_START_DAY=14
|
||||
CONFIG_START_MONTH=3
|
||||
CONFIG_SYSTEM_NSH=y
|
||||
CONFIG_DEV_GPIO=y
|
||||
CONFIG_READLINE_CMD_HISTORY=y
|
||||
CONFIG_READLINE_CMD_HISTORY_LEN=100
|
||||
CONFIG_READLINE_CMD_HISTORY_LINELEN=120
|
||||
CONFIG_READLINE_TABCOMPLETION=y
|
||||
CONFIG_FS_ROMFS=y
|
||||
CONFIG_NSH_ROMFSETC=y
|
||||
CONFIG_NSH_ARCHROMFS=y
|
||||
CONFIG_BOARDCTL_RESET=y
|
||||
CONFIG_BSP_USING_CH438=y
|
||||
CONFIG_CH438_EXTUART2=y
|
||||
CONFIG_CH438_EXTUART2_BAUD=9600
|
||||
CONFIG_SUPPORT_CONNECTION_FRAMEWORK=y
|
||||
CONFIG_CONNECTION_FRAMEWORK_DEBUG=y
|
||||
CONFIG_CONNECTION_ADAPTER_BLUETOOTH=y
|
||||
CONFIG_ADAPTER_HC08=y
|
||||
CONFIG_ADAPTER_BLUETOOTH_HC08="hc08"
|
||||
CONFIG_ADAPTER_HC08_WORK_ROLE="M"
|
||||
CONFIG_ADAPTER_HC08_DRIVER_EXTUART=y
|
||||
CONFIG_ADAPTER_HC08_DRIVER="/dev/extuart_dev2"
|
||||
CONFIG_USER_ENTRYPOINT="nsh_main"
|
||||
|
|
@ -23,7 +23,8 @@ CONFIG_ARMV7M_USEBASEPRI=y
|
|||
CONFIG_ARM_MPU=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=104926
|
||||
CONFIG_BUILD_PROTECTED=y
|
||||
CONFIG_FS_PROCFS=y
|
||||
CONFIG_IMXRT_GPIO_IRQ=y
|
||||
CONFIG_IMXRT_GPIO3_0_15_IRQ=y
|
||||
CONFIG_IDLETHREAD_STACKSIZE=2048
|
||||
CONFIG_IMXRT_LPUART1=y
|
||||
CONFIG_INTELHEX_BINARY=y
|
||||
|
|
@ -52,4 +53,5 @@ CONFIG_READLINE_TABCOMPLETION=y
|
|||
CONFIG_FS_ROMFS=y
|
||||
CONFIG_NSH_ROMFSETC=y
|
||||
CONFIG_NSH_ARCHROMFS=y
|
||||
CONFIG_BOARDCTL_RESET=y
|
||||
CONFIG_USER_ENTRYPOINT="nsh_main"
|
||||
|
|
|
|||
|
|
@ -0,0 +1,109 @@
|
|||
#
|
||||
# This file is autogenerated: PLEASE DO NOT EDIT IT.
|
||||
#
|
||||
# You can use "make menuconfig" to make any modifications to the installed .config file.
|
||||
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
|
||||
# modifications.
|
||||
#
|
||||
CONFIG_ADD_NUTTX_FETURES=y
|
||||
CONFIG_ARCH="arm"
|
||||
CONFIG_ARCH_BOARD="xidatong"
|
||||
CONFIG_ARCH_BOARD_XIDATONG=y
|
||||
CONFIG_ARCH_CHIP="imxrt"
|
||||
CONFIG_ARCH_CHIP_IMXRT=y
|
||||
CONFIG_ARCH_CHIP_MIMXRT1052CVL5B=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=10240
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
CONFIG_ARMV7M_DCACHE=y
|
||||
CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
|
||||
CONFIG_ARMV7M_ICACHE=y
|
||||
CONFIG_ARMV7M_USEBASEPRI=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=104926
|
||||
CONFIG_BUILTIN=y
|
||||
CONFIG_CLOCK_MONOTONIC=y
|
||||
CONFIG_EXAMPLES_HELLO=y
|
||||
CONFIG_IMXRT_GPIO_IRQ=y
|
||||
CONFIG_IDLETHREAD_STACKSIZE=2048
|
||||
CONFIG_IMXRT_LPUART1=y
|
||||
CONFIG_INTELHEX_BINARY=y
|
||||
CONFIG_LPUART1_SERIAL_CONSOLE=y
|
||||
CONFIG_NSH_ARCHINIT=y
|
||||
CONFIG_NSH_BUILTIN_APPS=y
|
||||
CONFIG_NSH_DISABLE_IFUPDOWN=y
|
||||
CONFIG_NSH_FILEIOSIZE=512
|
||||
CONFIG_NSH_LINELEN=64
|
||||
CONFIG_NSH_READLINE=y
|
||||
CONFIG_RAM_SIZE=524288
|
||||
CONFIG_RAM_START=0x20200000
|
||||
CONFIG_RAW_BINARY=y
|
||||
CONFIG_SCHED_HPWORK=y
|
||||
CONFIG_SCHED_WAITPID=y
|
||||
CONFIG_START_DAY=14
|
||||
CONFIG_START_MONTH=3
|
||||
CONFIG_SYSTEM_NSH=y
|
||||
CONFIG_DEV_GPIO=y
|
||||
CONFIG_READLINE_CMD_HISTORY=y
|
||||
CONFIG_READLINE_CMD_HISTORY_LEN=100
|
||||
CONFIG_READLINE_CMD_HISTORY_LINELEN=120
|
||||
CONFIG_READLINE_TABCOMPLETION=y
|
||||
|
||||
CONFIG_USER_ENTRYPOINT="nsh_main"
|
||||
|
||||
CONFIG_IMXRT_LPI2C=y
|
||||
CONFIG_IMXRT_LCD=y
|
||||
CONFIG_IMXRT_LPI2C1=y
|
||||
CONFIG_LPI2C1_BUSYIDLE=0
|
||||
CONFIG_LPI2C1_FILTSCL=0
|
||||
CONFIG_LPI2C1_FILTSDA=0
|
||||
CONFIG_IMXRT_GPIO2_16_31_IRQ=y
|
||||
|
||||
CONFIG_IMXRT_LPI2C_DYNTIMEO=y
|
||||
CONFIG_IMXRT_LPI2C_DYNTIMEO_USECPERBYTE=500
|
||||
CONFIG_IMXRT_LPI2C_DYNTIMEO_STARTSTOP=1000
|
||||
CONFIG_IMXRT_LPI2C_TIMEOSEC=0
|
||||
CONFIG_IMXRT_LCD_VIDEO_PLL_FREQ=92000000
|
||||
CONFIG_IMXRT_LCD_VRAMBASE=0x80000000
|
||||
CONFIG_IMXRT_LCD_REFRESH_FREQ=60
|
||||
CONFIG_IMXRT_LCD_BACKLIGHT=y
|
||||
CONFIG_IMXRT_LCD_INPUT_BPP16=y
|
||||
CONFIG_IMXRT_LCD_OUTPUT_16=y
|
||||
CONFIG_IMXRT_LCD_BACKCOLOR=0x0
|
||||
CONFIG_IMXRT_LCD_HWIDTH=480
|
||||
CONFIG_IMXRT_LCD_HPULSE=41
|
||||
CONFIG_IMXRT_LCD_HFRONTPORCH=4
|
||||
CONFIG_IMXRT_LCD_HBACKPORCH=8
|
||||
CONFIG_IMXRT_LCD_VHEIGHT=272
|
||||
CONFIG_IMXRT_LCD_VPULSE=10
|
||||
CONFIG_IMXRT_LCD_VFRONTPORCH=4
|
||||
CONFIG_IMXRT_LCD_VBACKPORCH=2
|
||||
CONFIG_IMXRT_DATAEN_ACTIVE_HIGH=y
|
||||
CONFIG_IMXRT_DATA_RISING_EDGE=y
|
||||
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_DRIVER=y
|
||||
CONFIG_ARCH_HAVE_SPI_CS_CONTROL=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_EXCHANGE=y
|
||||
|
||||
CONFIG_FB_MODULEINFO=y
|
||||
CONFIG_DRIVERS_VIDEO=y
|
||||
CONFIG_VIDEO_FB=y
|
||||
CONFIG_INPUT=y
|
||||
CONFIG_INPUT_TOUCHSCREEN=y
|
||||
CONFIG_INPUT_GT9XX=y
|
||||
|
||||
CONFIG_FS_PROCFS=y
|
||||
CONFIG_FS_PROCFS_MAX_TASKS=128
|
||||
CONFIG_FS_PROCFS_EXCLUDE_ENVIRON=y
|
||||
|
||||
CONFIG_EXAMPLES_FB=y
|
||||
CONFIG_EXAMPLES_FB_DEFAULTFB="/dev/fb0"
|
||||
CONFIG_EXAMPLES_FB_PROGNAME="fb"
|
||||
CONFIG_EXAMPLES_FB_PRIORITY=100
|
||||
CONFIG_EXAMPLES_FB_STACKSIZE=2048
|
||||
|
||||
CONFIG_EXAMPLES_TOUCHSCREEN=y
|
||||
CONFIG_EXAMPLES_TOUCHSCREEN_MINOR=0
|
||||
CONFIG_EXAMPLES_TOUCHSCREEN_DEVPATH="/dev/input0"
|
||||
CONFIG_EXAMPLES_TOUCHSCREEN_NSAMPLES=0
|
||||
|
||||
|
|
@ -19,7 +19,8 @@ CONFIG_BOARD_LOOPSPERMSEC=20000
|
|||
CONFIG_BUILTIN=y
|
||||
CONFIG_CLOCK_MONOTONIC=y
|
||||
CONFIG_C99_BOOL8=y
|
||||
CONFIG_FS_PROCFS=y
|
||||
CONFIG_IMXRT_GPIO_IRQ=y
|
||||
CONFIG_IMXRT_GPIO3_0_15_IRQ=y
|
||||
CONFIG_HAVE_CXX=y
|
||||
CONFIG_IDLETHREAD_STACKSIZE=2048
|
||||
CONFIG_IMXRT_LPUART1=y
|
||||
|
|
@ -51,4 +52,5 @@ CONFIG_READLINE_TABCOMPLETION=y
|
|||
CONFIG_FS_ROMFS=y
|
||||
CONFIG_NSH_ROMFSETC=y
|
||||
CONFIG_NSH_ARCHROMFS=y
|
||||
CONFIG_BOARDCTL_RESET=y
|
||||
CONFIG_USER_ENTRYPOINT="nsh_main"
|
||||
|
|
|
|||
|
|
@ -0,0 +1,65 @@
|
|||
#
|
||||
# This file is autogenerated: PLEASE DO NOT EDIT IT.
|
||||
#
|
||||
# You can use "make menuconfig" to make any modifications to the installed .config file.
|
||||
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
|
||||
# modifications.
|
||||
#
|
||||
CONFIG_ADD_NUTTX_FETURES=y
|
||||
CONFIG_ARCH="arm"
|
||||
CONFIG_ARCH_BOARD="xidatong"
|
||||
CONFIG_ARCH_BOARD_XIDATONG=y
|
||||
CONFIG_ARCH_CHIP="imxrt"
|
||||
CONFIG_ARCH_CHIP_IMXRT=y
|
||||
CONFIG_ARCH_CHIP_MIMXRT1052CVL5B=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=10240
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
CONFIG_ARMV7M_DCACHE=y
|
||||
CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
|
||||
CONFIG_ARMV7M_ICACHE=y
|
||||
CONFIG_ARMV7M_USEBASEPRI=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=104926
|
||||
CONFIG_BUILTIN=y
|
||||
CONFIG_CLOCK_MONOTONIC=y
|
||||
CONFIG_EXAMPLES_HELLO=y
|
||||
CONFIG_IMXRT_GPIO_IRQ=y
|
||||
CONFIG_IMXRT_GPIO3_0_15_IRQ=y
|
||||
CONFIG_IDLETHREAD_STACKSIZE=2048
|
||||
CONFIG_IMXRT_LPUART1=y
|
||||
CONFIG_INTELHEX_BINARY=y
|
||||
CONFIG_LPUART1_SERIAL_CONSOLE=y
|
||||
CONFIG_NSH_ARCHINIT=y
|
||||
CONFIG_NSH_BUILTIN_APPS=y
|
||||
CONFIG_NSH_DISABLE_IFUPDOWN=y
|
||||
CONFIG_NSH_FILEIOSIZE=512
|
||||
CONFIG_NSH_LINELEN=64
|
||||
CONFIG_NSH_READLINE=y
|
||||
CONFIG_RAM_SIZE=524288
|
||||
CONFIG_RAM_START=0x20200000
|
||||
CONFIG_RAW_BINARY=y
|
||||
CONFIG_SCHED_HPWORK=y
|
||||
CONFIG_SCHED_WAITPID=y
|
||||
CONFIG_START_DAY=14
|
||||
CONFIG_START_MONTH=3
|
||||
CONFIG_SYSTEM_NSH=y
|
||||
CONFIG_DEV_GPIO=y
|
||||
CONFIG_READLINE_CMD_HISTORY=y
|
||||
CONFIG_READLINE_CMD_HISTORY_LEN=100
|
||||
CONFIG_READLINE_CMD_HISTORY_LINELEN=120
|
||||
CONFIG_READLINE_TABCOMPLETION=y
|
||||
CONFIG_FS_ROMFS=y
|
||||
CONFIG_NSH_ROMFSETC=y
|
||||
CONFIG_NSH_ARCHROMFS=y
|
||||
CONFIG_BOARDCTL_RESET=y
|
||||
CONFIG_BSP_USING_CH438=y
|
||||
CONFIG_CH438_EXTUART3=y
|
||||
CONFIG_SUPPORT_CONNECTION_FRAMEWORK=y
|
||||
CONFIG_CONNECTION_FRAMEWORK_DEBUG=y
|
||||
CONFIG_CONNECTION_ADAPTER_LORA=y
|
||||
CONFIG_ADAPTER_E220=y
|
||||
CONFIG_ADAPTER_LORA_E220="e220"
|
||||
CONFIG_ADAPTER_E220_DRIVER_EXTUART=y
|
||||
CONFIG_ADAPTER_E220_DRIVER="/dev/extuart_dev3"
|
||||
CONFIG_ADAPTER_E220_M0_PATH="/dev/gpout0"
|
||||
CONFIG_ADAPTER_E220_M1_PATH="/dev/gpout1"
|
||||
CONFIG_USER_ENTRYPOINT="nsh_main"
|
||||
|
|
@ -24,7 +24,8 @@ CONFIG_BUILTIN=y
|
|||
CONFIG_CLOCK_MONOTONIC=y
|
||||
CONFIG_ETH0_PHY_LAN8720=y
|
||||
CONFIG_IMXRT_ENET_PHYINIT=y
|
||||
CONFIG_FS_PROCFS=y
|
||||
CONFIG_IMXRT_GPIO_IRQ=y
|
||||
CONFIG_IMXRT_GPIO3_0_15_IRQ=y
|
||||
CONFIG_IDLETHREAD_STACKSIZE=2048
|
||||
CONFIG_IMXRT_ENET=y
|
||||
CONFIG_IMXRT_LPUART1=y
|
||||
|
|
@ -74,4 +75,5 @@ CONFIG_READLINE_TABCOMPLETION=y
|
|||
CONFIG_FS_ROMFS=y
|
||||
CONFIG_NSH_ROMFSETC=y
|
||||
CONFIG_NSH_ARCHROMFS=y
|
||||
CONFIG_BOARDCTL_RESET=y
|
||||
CONFIG_USER_ENTRYPOINT="nsh_main"
|
||||
|
|
|
|||
|
|
@ -22,7 +22,8 @@ CONFIG_BOARD_LOOPSPERMSEC=104926
|
|||
CONFIG_BUILTIN=y
|
||||
CONFIG_CLOCK_MONOTONIC=y
|
||||
CONFIG_EXAMPLES_HELLO=y
|
||||
CONFIG_FS_PROCFS=y
|
||||
CONFIG_IMXRT_GPIO_IRQ=y
|
||||
CONFIG_IMXRT_GPIO3_0_15_IRQ=y
|
||||
CONFIG_IDLETHREAD_STACKSIZE=2048
|
||||
CONFIG_IMXRT_LPUART1=y
|
||||
CONFIG_INTELHEX_BINARY=y
|
||||
|
|
@ -49,4 +50,5 @@ CONFIG_READLINE_TABCOMPLETION=y
|
|||
CONFIG_FS_ROMFS=y
|
||||
CONFIG_NSH_ROMFSETC=y
|
||||
CONFIG_NSH_ARCHROMFS=y
|
||||
CONFIG_BOARDCTL_RESET=y
|
||||
CONFIG_USER_ENTRYPOINT="nsh_main"
|
||||
|
|
|
|||
|
|
@ -24,11 +24,11 @@ CONFIG_FAT_LCNAMES=y
|
|||
CONFIG_CLOCK_MONOTONIC=y
|
||||
CONFIG_FAT_LFN=y
|
||||
CONFIG_FS_FAT=y
|
||||
CONFIG_FS_PROCFS=y
|
||||
CONFIG_IDLETHREAD_STACKSIZE=2048
|
||||
CONFIG_EXAMPLES_HELLO=y
|
||||
CONFIG_IMXRT_GPIO2_16_31_IRQ=y
|
||||
CONFIG_IMXRT_GPIO_IRQ=y
|
||||
CONFIG_IMXRT_GPIO2_16_31_IRQ=y
|
||||
CONFIG_IMXRT_GPIO3_0_15_IRQ=y
|
||||
CONFIG_DEV_GPIO=y
|
||||
CONFIG_IMXRT_LPUART1=y
|
||||
CONFIG_IMXRT_USDHC1=y
|
||||
|
|
@ -45,7 +45,7 @@ CONFIG_NSH_ARCHINIT=y
|
|||
CONFIG_NSH_BUILTIN_APPS=y
|
||||
CONFIG_NSH_CMDOPT_DD_STATS=y
|
||||
CONFIG_NSH_DISABLE_IFUPDOWN=y
|
||||
CONFIG_NSH_FILEIOSIZE=512
|
||||
CONFIG_NSH_FILEIOSIZE=32768
|
||||
CONFIG_NSH_LINELEN=64
|
||||
CONFIG_NSH_READLINE=y
|
||||
CONFIG_RAM_SIZE=524288
|
||||
|
|
@ -63,12 +63,11 @@ CONFIG_START_MONTH=3
|
|||
CONFIG_SYSTEM_CLE_CMD_HISTORY=y
|
||||
CONFIG_SYSTEM_COLOR_CLE=y
|
||||
CONFIG_FS_AUTOMOUNTER=y
|
||||
CONFIG_XIDATONG_SDIO_AUTOMOUNT=y
|
||||
CONFIG_SYSTEM_NSH=y
|
||||
CONFIG_READLINE_CMD_HISTORY=y
|
||||
CONFIG_READLINE_CMD_HISTORY_LEN=100
|
||||
CONFIG_READLINE_CMD_HISTORY_LINELEN=120
|
||||
CONFIG_READLINE_TABCOMPLETION=y
|
||||
CONFIG_FS_ROMFS=y
|
||||
CONFIG_NSH_ROMFSETC=y
|
||||
CONFIG_NSH_ARCHROMFS=y
|
||||
CONFIG_BOARDCTL_RESET=y
|
||||
CONFIG_USER_ENTRYPOINT="nsh_main"
|
||||
|
|
|
|||
|
|
@ -24,9 +24,10 @@ CONFIG_FAT_LCNAMES=y
|
|||
CONFIG_CLOCK_MONOTONIC=y
|
||||
CONFIG_FAT_LFN=y
|
||||
CONFIG_FS_FAT=y
|
||||
CONFIG_FS_PROCFS=y
|
||||
CONFIG_IDLETHREAD_STACKSIZE=2048
|
||||
CONFIG_EXAMPLES_HELLO=y
|
||||
CONFIG_IMXRT_GPIO_IRQ=y
|
||||
CONFIG_IMXRT_GPIO3_0_15_IRQ=y
|
||||
CONFIG_IMXRT_LPUART1=y
|
||||
CONFIG_INTELHEX_BINARY=y
|
||||
CONFIG_IOB_NBUFFERS=24
|
||||
|
|
@ -38,7 +39,7 @@ CONFIG_NSH_ARCHINIT=y
|
|||
CONFIG_NSH_BUILTIN_APPS=y
|
||||
CONFIG_NSH_CMDOPT_DD_STATS=y
|
||||
CONFIG_NSH_DISABLE_IFUPDOWN=y
|
||||
CONFIG_NSH_FILEIOSIZE=512
|
||||
CONFIG_NSH_FILEIOSIZE=32768
|
||||
CONFIG_NSH_LINELEN=64
|
||||
CONFIG_NSH_READLINE=y
|
||||
CONFIG_RAM_SIZE=524288
|
||||
|
|
@ -61,12 +62,11 @@ CONFIG_USBDEV=y
|
|||
CONFIG_USBHOST=y
|
||||
CONFIG_USBHOST_MSC=y
|
||||
CONFIG_USBHOST_MSC_NOTIFIER=y
|
||||
CONFIG_XIDATONG_USB_AUTOMOUNT=y
|
||||
CONFIG_DEV_GPIO=y
|
||||
CONFIG_READLINE_CMD_HISTORY=y
|
||||
CONFIG_READLINE_CMD_HISTORY_LEN=100
|
||||
CONFIG_READLINE_CMD_HISTORY_LINELEN=120
|
||||
CONFIG_READLINE_TABCOMPLETION=y
|
||||
CONFIG_FS_ROMFS=y
|
||||
CONFIG_NSH_ROMFSETC=y
|
||||
CONFIG_NSH_ARCHROMFS=y
|
||||
CONFIG_BOARDCTL_RESET=y
|
||||
CONFIG_USER_ENTRYPOINT="nsh_main"
|
||||
|
|
|
|||
|
|
@ -0,0 +1,61 @@
|
|||
#
|
||||
# This file is autogenerated: PLEASE DO NOT EDIT IT.
|
||||
#
|
||||
# You can use "make menuconfig" to make any modifications to the installed .config file.
|
||||
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
|
||||
# modifications.
|
||||
#
|
||||
CONFIG_ADD_NUTTX_FETURES=y
|
||||
CONFIG_ARCH="arm"
|
||||
CONFIG_ARCH_BOARD="xidatong"
|
||||
CONFIG_ARCH_BOARD_XIDATONG=y
|
||||
CONFIG_ARCH_CHIP="imxrt"
|
||||
CONFIG_ARCH_CHIP_IMXRT=y
|
||||
CONFIG_ARCH_CHIP_MIMXRT1052CVL5B=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=10240
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
CONFIG_ARMV7M_DCACHE=y
|
||||
CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
|
||||
CONFIG_ARMV7M_ICACHE=y
|
||||
CONFIG_ARMV7M_USEBASEPRI=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=104926
|
||||
CONFIG_BUILTIN=y
|
||||
CONFIG_CLOCK_MONOTONIC=y
|
||||
CONFIG_EXAMPLES_HELLO=y
|
||||
CONFIG_IMXRT_GPIO_IRQ=y
|
||||
CONFIG_IMXRT_GPIO3_0_15_IRQ=y
|
||||
CONFIG_IDLETHREAD_STACKSIZE=2048
|
||||
CONFIG_IMXRT_LPUART1=y
|
||||
CONFIG_IMXRT_LPUART2=y
|
||||
CONFIG_INTELHEX_BINARY=y
|
||||
CONFIG_LPUART1_SERIAL_CONSOLE=y
|
||||
CONFIG_LPUART2_SERIALDRIVER=y
|
||||
CONFIG_NSH_ARCHINIT=y
|
||||
CONFIG_NSH_BUILTIN_APPS=y
|
||||
CONFIG_NSH_DISABLE_IFUPDOWN=y
|
||||
CONFIG_NSH_FILEIOSIZE=512
|
||||
CONFIG_NSH_LINELEN=64
|
||||
CONFIG_NSH_READLINE=y
|
||||
CONFIG_RAM_SIZE=524288
|
||||
CONFIG_RAM_START=0x20200000
|
||||
CONFIG_RAW_BINARY=y
|
||||
CONFIG_SCHED_HPWORK=y
|
||||
CONFIG_SCHED_WAITPID=y
|
||||
CONFIG_START_DAY=14
|
||||
CONFIG_START_MONTH=3
|
||||
CONFIG_SYSTEM_NSH=y
|
||||
CONFIG_DEV_GPIO=y
|
||||
CONFIG_READLINE_CMD_HISTORY=y
|
||||
CONFIG_READLINE_CMD_HISTORY_LEN=100
|
||||
CONFIG_READLINE_CMD_HISTORY_LINELEN=120
|
||||
CONFIG_READLINE_TABCOMPLETION=y
|
||||
CONFIG_FS_ROMFS=y
|
||||
CONFIG_NSH_ROMFSETC=y
|
||||
CONFIG_NSH_ARCHROMFS=y
|
||||
CONFIG_BOARDCTL_RESET=y
|
||||
CONFIG_CONNECTION_FRAMEWORK_DEBUG=y
|
||||
CONFIG_CONNECTION_ADAPTER_WIFI=y
|
||||
CONFIG_ADAPTER_ESP07S_WIFI=y
|
||||
CONFIG_ADAPTER_WIFI_ESP07S="esp07s_wifi"
|
||||
CONFIG_ADAPTER_ESP07S_DRIVER="/dev/ttyS2"
|
||||
CONFIG_USER_ENTRYPOINT="nsh_main"
|
||||
|
|
@ -0,0 +1,64 @@
|
|||
#
|
||||
# This file is autogenerated: PLEASE DO NOT EDIT IT.
|
||||
#
|
||||
# You can use "make menuconfig" to make any modifications to the installed .config file.
|
||||
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
|
||||
# modifications.
|
||||
#
|
||||
CONFIG_ADD_NUTTX_FETURES=y
|
||||
CONFIG_ARCH="arm"
|
||||
CONFIG_ARCH_BOARD="xidatong"
|
||||
CONFIG_ARCH_BOARD_XIDATONG=y
|
||||
CONFIG_ARCH_CHIP="imxrt"
|
||||
CONFIG_ARCH_CHIP_IMXRT=y
|
||||
CONFIG_ARCH_CHIP_MIMXRT1052CVL5B=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=10240
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
CONFIG_ARMV7M_DCACHE=y
|
||||
CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
|
||||
CONFIG_ARMV7M_ICACHE=y
|
||||
CONFIG_ARMV7M_USEBASEPRI=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=104926
|
||||
CONFIG_BUILTIN=y
|
||||
CONFIG_CLOCK_MONOTONIC=y
|
||||
CONFIG_EXAMPLES_HELLO=y
|
||||
CONFIG_IMXRT_GPIO_IRQ=y
|
||||
CONFIG_IMXRT_GPIO3_0_15_IRQ=y
|
||||
CONFIG_IDLETHREAD_STACKSIZE=2048
|
||||
CONFIG_IMXRT_LPUART1=y
|
||||
CONFIG_INTELHEX_BINARY=y
|
||||
CONFIG_LPUART1_SERIAL_CONSOLE=y
|
||||
CONFIG_NSH_ARCHINIT=y
|
||||
CONFIG_NSH_BUILTIN_APPS=y
|
||||
CONFIG_NSH_DISABLE_IFUPDOWN=y
|
||||
CONFIG_NSH_FILEIOSIZE=512
|
||||
CONFIG_NSH_LINELEN=64
|
||||
CONFIG_NSH_READLINE=y
|
||||
CONFIG_RAM_SIZE=524288
|
||||
CONFIG_RAM_START=0x20200000
|
||||
CONFIG_RAW_BINARY=y
|
||||
CONFIG_SCHED_HPWORK=y
|
||||
CONFIG_SCHED_WAITPID=y
|
||||
CONFIG_START_DAY=14
|
||||
CONFIG_START_MONTH=3
|
||||
CONFIG_SYSTEM_NSH=y
|
||||
CONFIG_DEV_GPIO=y
|
||||
CONFIG_READLINE_CMD_HISTORY=y
|
||||
CONFIG_READLINE_CMD_HISTORY_LEN=100
|
||||
CONFIG_READLINE_CMD_HISTORY_LINELEN=120
|
||||
CONFIG_READLINE_TABCOMPLETION=y
|
||||
CONFIG_FS_ROMFS=y
|
||||
CONFIG_NSH_ROMFSETC=y
|
||||
CONFIG_NSH_ARCHROMFS=y
|
||||
CONFIG_BOARDCTL_RESET=y
|
||||
CONFIG_BSP_USING_CH438=y
|
||||
CONFIG_CH438_EXTUART1=y
|
||||
CONFIG_SUPPORT_CONNECTION_FRAMEWORK=y
|
||||
CONFIG_CONNECTION_FRAMEWORK_DEBUG=y
|
||||
CONFIG_SUPPORT_CONNECTION_FRAMEWORK=y
|
||||
CONFIG_CONNECTION_ADAPTER_ZIGBEE=y
|
||||
CONFIG_ADAPTER_E18=y
|
||||
CONFIG_ADAPTER_ZIGBEE_E18="e18"
|
||||
CONFIG_AS_END_DEVICE_ROLE=y
|
||||
CONFIG_ADAPTER_E18_DRIVER="/dev/extuart_dev1"
|
||||
CONFIG_USER_ENTRYPOINT="nsh_main"
|
||||
|
|
@ -32,6 +32,10 @@ else ifeq ($(CONFIG_BOARD_LATE_INITIALIZE),y)
|
|||
CSRCS += imxrt_bringup.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_BOARDCTL_RESET),y)
|
||||
CSRCS += imxrt_reset.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_ARCH_LEDS),y)
|
||||
CSRCS += imxrt_autoleds.c
|
||||
else
|
||||
|
|
@ -78,4 +82,12 @@ ifeq ($(CONFIG_XIDATONG_SDIO_AUTOMOUNT),y)
|
|||
CSRCS += imxrt_mmcsd_automount.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_INPUT_GT9XX),y)
|
||||
CSRCS += imxrt_gt9xx.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_BSP_USING_CH438),y)
|
||||
CSRCS += imxrt_ch438.c ch438_demo.c
|
||||
endif
|
||||
|
||||
include $(TOPDIR)/boards/Board.mk
|
||||
|
|
|
|||
|
|
@ -0,0 +1,85 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file ch438_demo.c
|
||||
* @brief imxrt board sd card automount
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2022.04.26
|
||||
*/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
#include "imxrt_ch438.h"
|
||||
#include <sys/ioctl.h>
|
||||
#include <nuttx/ioexpander/gpio.h>
|
||||
|
||||
void CH438Demo(void)
|
||||
{
|
||||
int fd,m0fd,m1fd;
|
||||
int i;
|
||||
char sendbuffer1[4] = {0xC0,0x04,0x01,0x09};
|
||||
char sendbuffer2[6] = {0xC0,0x00,0x03,0x12,0x34,0x61};
|
||||
char sendbuffer3[3] = {0xC1,0x04,0x01};
|
||||
char sendbuffer4[3] = {0xC1,0x00,0x03};
|
||||
char buffer[256];
|
||||
int readlen;
|
||||
|
||||
fd = open("/dev/extuart_dev3", O_RDWR);
|
||||
ioctl(fd, OPE_INT, (unsigned long)9600);
|
||||
m0fd = open("/dev/gpout0", O_RDWR);
|
||||
m1fd = open("/dev/gpout1", O_RDWR);
|
||||
ioctl(m0fd, GPIOC_WRITE, (unsigned long)1);
|
||||
ioctl(m1fd, GPIOC_WRITE, (unsigned long)1);
|
||||
sleep(1);
|
||||
|
||||
write(fd, sendbuffer1,4);
|
||||
sleep(1);
|
||||
readlen = read(fd, buffer, 256);
|
||||
printf("readlen1 = %d\n", readlen);
|
||||
for(i = 0;i< readlen; ++i)
|
||||
{
|
||||
printf("0x%x\n", buffer[i]);
|
||||
}
|
||||
|
||||
write(fd, sendbuffer2,6);
|
||||
sleep(1);
|
||||
readlen = read(fd, buffer, 256);
|
||||
printf("readlen1 = %d\n", readlen);
|
||||
for(i = 0;i< readlen; ++i)
|
||||
{
|
||||
printf("0x%x\n", buffer[i]);
|
||||
}
|
||||
|
||||
write(fd, sendbuffer3,3);
|
||||
sleep(1);
|
||||
readlen = read(fd, buffer, 256);
|
||||
printf("readlen1 = %d\n", readlen);
|
||||
for(i = 0;i< readlen; ++i)
|
||||
{
|
||||
printf("0x%x\n", buffer[i]);
|
||||
}
|
||||
|
||||
write(fd, sendbuffer4,3);
|
||||
sleep(1);
|
||||
readlen = read(fd, buffer, 256);
|
||||
printf("readlen1 = %d\n", readlen);
|
||||
for(i = 0;i< readlen; ++i)
|
||||
{
|
||||
printf("0x%x\n", buffer[i]);
|
||||
}
|
||||
|
||||
close(fd);
|
||||
|
||||
}
|
||||
|
|
@ -47,6 +47,14 @@
|
|||
# include <nuttx/usb/usbmonitor.h>
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BSP_USING_CH438
|
||||
# include "imxrt_ch438.h"
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_INPUT_GT9XX
|
||||
#include "imxrt_gt9xx.h"
|
||||
#endif
|
||||
|
||||
#include "xidatong.h"
|
||||
|
||||
#include <arch/board/board.h> /* Must always be included last */
|
||||
|
|
@ -148,7 +156,6 @@ int imxrt_bringup(void)
|
|||
if (ret != OK)
|
||||
{
|
||||
syslog(LOG_ERR, "ERROR: Failed to start USB host services: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
@ -167,7 +174,6 @@ int imxrt_bringup(void)
|
|||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR, "Failed to initialize GPIO Driver: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
@ -181,6 +187,23 @@ int imxrt_bringup(void)
|
|||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BSP_USING_CH438
|
||||
board_ch438_initialize();
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_INPUT_GT9XX
|
||||
/* Initialize the GT9XX touchscreen driver */
|
||||
|
||||
ret = imxrt_gt9xx_register();
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR, "ERROR: imxrt_ft5x06_register() failed: %d\n", ret);
|
||||
}
|
||||
|
||||
syslog(LOG_NOTICE, "Start initialize %d ok ...\n", ret);
|
||||
|
||||
#endif
|
||||
|
||||
UNUSED(ret);
|
||||
return OK;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -0,0 +1,891 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file imxrt_ch438.c
|
||||
* @brief imxrt board sd card automount
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2022.04.26
|
||||
*/
|
||||
|
||||
#include "imxrt_ch438.h"
|
||||
|
||||
#define CH438PORTNUM 8
|
||||
#define CH438_BUFFSIZE 256
|
||||
#define CH438_INCREMENT MSEC2TICK(33)
|
||||
|
||||
/****************************************************************************
|
||||
* Private Function Prototypes
|
||||
****************************************************************************/
|
||||
static FAR void getInterruptStatus(FAR void *arg);
|
||||
static void CH438SetOutput(void);
|
||||
static void CH438SetInput(void);
|
||||
static uint8_t ReadCH438Data(uint8_t addr);
|
||||
static void WriteCH438Data(uint8_t addr, const uint8_t dat);
|
||||
static void WriteCH438Block(uint8_t mAddr, uint8_t mLen, const uint8_t *mBuf);
|
||||
static void Ch438UartSend(uint8_t ext_uart_no, const uint8_t *Data, uint16_t Num);
|
||||
uint8_t CH438UARTRcv(uint8_t ext_uart_no, uint8_t *buf, size_t size);
|
||||
static void ImxrtCH438Init(void);
|
||||
static void CH438PortInit(uint8_t ext_uart_no, uint32_t baud_rate);
|
||||
static int ImxrtCh438WriteData(uint8_t ext_uart_no, const uint8_t *write_buffer, size_t size);
|
||||
static size_t ImxrtCh438ReadData(uint8_t ext_uart_no, size_t size);
|
||||
static void Ch438InitDefault(void);
|
||||
|
||||
static int ch438_open(FAR struct file *filep);
|
||||
static int ch438_close(FAR struct file *filep);
|
||||
static ssize_t ch438_read(FAR struct file *filep, FAR char *buffer, size_t buflen);
|
||||
static ssize_t ch438_write(FAR struct file *filep, FAR const char *buffer, size_t buflen);
|
||||
static int ch438_ioctl(FAR struct file *filep, int cmd, unsigned long arg);
|
||||
static int ch438_register(FAR const char *devpath, uint8_t ext_uart_no);
|
||||
|
||||
/****************************************************************************
|
||||
* Private type
|
||||
****************************************************************************/
|
||||
struct ch438_dev_s
|
||||
{
|
||||
sem_t devsem; /* ch438 port devsem */
|
||||
uint8_t port; /* ch438 port number*/
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
****************************************************************************/
|
||||
|
||||
/*mutex of corresponding port*/
|
||||
static pthread_mutex_t mutex[CH438PORTNUM] =
|
||||
{
|
||||
PTHREAD_MUTEX_INITIALIZER,
|
||||
PTHREAD_MUTEX_INITIALIZER,
|
||||
PTHREAD_MUTEX_INITIALIZER,
|
||||
PTHREAD_MUTEX_INITIALIZER,
|
||||
PTHREAD_MUTEX_INITIALIZER,
|
||||
PTHREAD_MUTEX_INITIALIZER,
|
||||
PTHREAD_MUTEX_INITIALIZER,
|
||||
PTHREAD_MUTEX_INITIALIZER
|
||||
};
|
||||
|
||||
/* Condition variable of corresponding port */
|
||||
static pthread_cond_t cond[CH438PORTNUM] =
|
||||
{
|
||||
PTHREAD_COND_INITIALIZER,
|
||||
PTHREAD_COND_INITIALIZER,
|
||||
PTHREAD_COND_INITIALIZER,
|
||||
PTHREAD_COND_INITIALIZER,
|
||||
PTHREAD_COND_INITIALIZER,
|
||||
PTHREAD_COND_INITIALIZER,
|
||||
PTHREAD_COND_INITIALIZER,
|
||||
PTHREAD_COND_INITIALIZER
|
||||
};
|
||||
|
||||
/* This array shows whether the current serial port is selected */
|
||||
static bool const g_uart_selected[CH438PORTNUM] =
|
||||
{
|
||||
#ifdef CONFIG_CH438_EXTUART0
|
||||
[0] = true,
|
||||
#endif
|
||||
#ifdef CONFIG_CH438_EXTUART1
|
||||
[1] = true,
|
||||
#endif
|
||||
#ifdef CONFIG_CH438_EXTUART2
|
||||
[2] = true,
|
||||
#endif
|
||||
#ifdef CONFIG_CH438_EXTUART3
|
||||
[3] = true,
|
||||
#endif
|
||||
#ifdef CONFIG_CH438_EXTUART4
|
||||
[4] = true,
|
||||
#endif
|
||||
#ifdef CONFIG_CH438_EXTUART5
|
||||
[5] = true,
|
||||
#endif
|
||||
#ifdef CONFIG_CH438_EXTUART6
|
||||
[6] = true,
|
||||
#endif
|
||||
#ifdef CONFIG_CH438_EXTUART7
|
||||
[7] = true,
|
||||
#endif
|
||||
};
|
||||
|
||||
/* ch438 Callback work queue structure */
|
||||
static struct work_s g_ch438irqwork;
|
||||
|
||||
/* there is data available on the corresponding port */
|
||||
static volatile bool done[CH438PORTNUM] = {false,false,false,false,false,false,false,false};
|
||||
|
||||
/* Eight port data buffer */
|
||||
static uint8_t buff[CH438PORTNUM][CH438_BUFFSIZE];
|
||||
|
||||
/* the value of interrupt number of SSR register */
|
||||
static uint8_t Interruptnum[CH438PORTNUM] = {0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,};
|
||||
|
||||
/* Offset address of serial port number */
|
||||
static uint8_t offsetadd[CH438PORTNUM] = {0x00,0x10,0x20,0x30,0x08,0x18,0x28,0x38,};
|
||||
|
||||
/* port open status global variable */
|
||||
static volatile bool g_ch438open[CH438PORTNUM] = {false,false,false,false,false,false,false,false};
|
||||
|
||||
/* Ch438 POSIX interface */
|
||||
static const struct file_operations g_ch438fops =
|
||||
{
|
||||
ch438_open,
|
||||
ch438_close,
|
||||
ch438_read,
|
||||
ch438_write,
|
||||
NULL,
|
||||
ch438_ioctl,
|
||||
NULL
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
* Name: getInterruptStatus
|
||||
*
|
||||
* Description:
|
||||
* thread task getInterruptStatus
|
||||
*
|
||||
****************************************************************************/
|
||||
static FAR void getInterruptStatus(FAR void *arg)
|
||||
{
|
||||
uint8_t i;
|
||||
uint8_t gInterruptStatus; /* Interrupt register status */
|
||||
|
||||
gInterruptStatus = ReadCH438Data(REG_SSR_ADDR);
|
||||
|
||||
if(gInterruptStatus)
|
||||
{
|
||||
for(i = 0; i < CH438PORTNUM; i++)
|
||||
{
|
||||
if(g_uart_selected[i] && (gInterruptStatus & Interruptnum[i]))
|
||||
{
|
||||
pthread_mutex_lock(&mutex[i]);
|
||||
done[i] = true;
|
||||
pthread_cond_signal(&cond[i]);
|
||||
pthread_mutex_unlock(&mutex[i]);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
work_queue(HPWORK, &g_ch438irqwork, getInterruptStatus, NULL, CH438_INCREMENT);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: CH438SetOutput
|
||||
*
|
||||
* Description:
|
||||
* Configure pin mode to output
|
||||
*
|
||||
****************************************************************************/
|
||||
static void CH438SetOutput(void)
|
||||
{
|
||||
imxrt_config_gpio(CH438_D0_PIN_OUT);
|
||||
imxrt_config_gpio(CH438_D1_PIN_OUT);
|
||||
imxrt_config_gpio(CH438_D2_PIN_OUT);
|
||||
imxrt_config_gpio(CH438_D3_PIN_OUT);
|
||||
imxrt_config_gpio(CH438_D4_PIN_OUT);
|
||||
imxrt_config_gpio(CH438_D5_PIN_OUT);
|
||||
imxrt_config_gpio(CH438_D6_PIN_OUT);
|
||||
imxrt_config_gpio(CH438_D7_PIN_OUT);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: CH438SetInput
|
||||
*
|
||||
* Description:
|
||||
* Configure pin mode to input
|
||||
*
|
||||
****************************************************************************/
|
||||
static void CH438SetInput(void)
|
||||
{
|
||||
imxrt_config_gpio(CH438_D0_PIN_INPUT);
|
||||
imxrt_config_gpio(CH438_D1_PIN_INPUT);
|
||||
imxrt_config_gpio(CH438_D2_PIN_INPUT);
|
||||
imxrt_config_gpio(CH438_D3_PIN_INPUT);
|
||||
imxrt_config_gpio(CH438_D4_PIN_INPUT);
|
||||
imxrt_config_gpio(CH438_D5_PIN_INPUT);
|
||||
imxrt_config_gpio(CH438_D6_PIN_INPUT);
|
||||
imxrt_config_gpio(CH438_D7_PIN_INPUT);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: ReadCH438Data
|
||||
*
|
||||
* Description:
|
||||
* Read data from ch438 address
|
||||
*
|
||||
****************************************************************************/
|
||||
static uint8_t ReadCH438Data(uint8_t addr)
|
||||
{
|
||||
uint8_t dat = 0;
|
||||
imxrt_gpio_write(CH438_NWR_PIN, true);
|
||||
imxrt_gpio_write(CH438_NRD_PIN, true);
|
||||
imxrt_gpio_write(CH438_ALE_PIN, true);
|
||||
|
||||
CH438SetOutput();
|
||||
up_udelay(1);
|
||||
|
||||
if(addr &0x80) imxrt_gpio_write(CH438_D7_PIN_OUT, true); else imxrt_gpio_write(CH438_D7_PIN_OUT, false);
|
||||
if(addr &0x40) imxrt_gpio_write(CH438_D6_PIN_OUT, true); else imxrt_gpio_write(CH438_D6_PIN_OUT, false);
|
||||
if(addr &0x20) imxrt_gpio_write(CH438_D5_PIN_OUT, true); else imxrt_gpio_write(CH438_D5_PIN_OUT, false);
|
||||
if(addr &0x10) imxrt_gpio_write(CH438_D4_PIN_OUT, true); else imxrt_gpio_write(CH438_D4_PIN_OUT, false);
|
||||
if(addr &0x08) imxrt_gpio_write(CH438_D3_PIN_OUT, true); else imxrt_gpio_write(CH438_D3_PIN_OUT, false);
|
||||
if(addr &0x04) imxrt_gpio_write(CH438_D2_PIN_OUT, true); else imxrt_gpio_write(CH438_D2_PIN_OUT, false);
|
||||
if(addr &0x02) imxrt_gpio_write(CH438_D1_PIN_OUT, true); else imxrt_gpio_write(CH438_D1_PIN_OUT, false);
|
||||
if(addr &0x01) imxrt_gpio_write(CH438_D0_PIN_OUT, true); else imxrt_gpio_write(CH438_D0_PIN_OUT, false);
|
||||
|
||||
up_udelay(1);
|
||||
|
||||
imxrt_gpio_write(CH438_ALE_PIN, false);
|
||||
up_udelay(1);
|
||||
|
||||
CH438SetInput();
|
||||
up_udelay(1);
|
||||
|
||||
imxrt_gpio_write(CH438_NRD_PIN, false);
|
||||
up_udelay(1);
|
||||
|
||||
if (imxrt_gpio_read(CH438_D7_PIN_INPUT)) dat |= 0x80;
|
||||
if (imxrt_gpio_read(CH438_D6_PIN_INPUT)) dat |= 0x40;
|
||||
if (imxrt_gpio_read(CH438_D5_PIN_INPUT)) dat |= 0x20;
|
||||
if (imxrt_gpio_read(CH438_D4_PIN_INPUT)) dat |= 0x10;
|
||||
if (imxrt_gpio_read(CH438_D3_PIN_INPUT)) dat |= 0x08;
|
||||
if (imxrt_gpio_read(CH438_D2_PIN_INPUT)) dat |= 0x04;
|
||||
if (imxrt_gpio_read(CH438_D1_PIN_INPUT)) dat |= 0x02;
|
||||
if (imxrt_gpio_read(CH438_D0_PIN_INPUT)) dat |= 0x01;
|
||||
|
||||
imxrt_gpio_write(CH438_NRD_PIN, true);
|
||||
imxrt_gpio_write(CH438_ALE_PIN, true);
|
||||
up_udelay(1);
|
||||
|
||||
return dat;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: WriteCH438Data
|
||||
*
|
||||
* Description:
|
||||
* write data to ch438 address
|
||||
*
|
||||
****************************************************************************/
|
||||
static void WriteCH438Data(uint8_t addr, const uint8_t dat)
|
||||
{
|
||||
imxrt_gpio_write(CH438_ALE_PIN, true);
|
||||
imxrt_gpio_write(CH438_NRD_PIN, true);
|
||||
imxrt_gpio_write(CH438_NWR_PIN, true);
|
||||
|
||||
CH438SetOutput();
|
||||
up_udelay(1);
|
||||
|
||||
if(addr &0x80) imxrt_gpio_write(CH438_D7_PIN_OUT, true); else imxrt_gpio_write(CH438_D7_PIN_OUT, false);
|
||||
if(addr &0x40) imxrt_gpio_write(CH438_D6_PIN_OUT, true); else imxrt_gpio_write(CH438_D6_PIN_OUT, false);
|
||||
if(addr &0x20) imxrt_gpio_write(CH438_D5_PIN_OUT, true); else imxrt_gpio_write(CH438_D5_PIN_OUT, false);
|
||||
if(addr &0x10) imxrt_gpio_write(CH438_D4_PIN_OUT, true); else imxrt_gpio_write(CH438_D4_PIN_OUT, false);
|
||||
if(addr &0x08) imxrt_gpio_write(CH438_D3_PIN_OUT, true); else imxrt_gpio_write(CH438_D3_PIN_OUT, false);
|
||||
if(addr &0x04) imxrt_gpio_write(CH438_D2_PIN_OUT, true); else imxrt_gpio_write(CH438_D2_PIN_OUT, false);
|
||||
if(addr &0x02) imxrt_gpio_write(CH438_D1_PIN_OUT, true); else imxrt_gpio_write(CH438_D1_PIN_OUT, false);
|
||||
if(addr &0x01) imxrt_gpio_write(CH438_D0_PIN_OUT, true); else imxrt_gpio_write(CH438_D0_PIN_OUT, false);
|
||||
|
||||
up_udelay(1);
|
||||
|
||||
imxrt_gpio_write(CH438_ALE_PIN, false);
|
||||
up_udelay(1);
|
||||
|
||||
if(dat &0x80) imxrt_gpio_write(CH438_D7_PIN_OUT, true); else imxrt_gpio_write(CH438_D7_PIN_OUT, false);
|
||||
if(dat &0x40) imxrt_gpio_write(CH438_D6_PIN_OUT, true); else imxrt_gpio_write(CH438_D6_PIN_OUT, false);
|
||||
if(dat &0x20) imxrt_gpio_write(CH438_D5_PIN_OUT, true); else imxrt_gpio_write(CH438_D5_PIN_OUT, false);
|
||||
if(dat &0x10) imxrt_gpio_write(CH438_D4_PIN_OUT, true); else imxrt_gpio_write(CH438_D4_PIN_OUT, false);
|
||||
if(dat &0x08) imxrt_gpio_write(CH438_D3_PIN_OUT, true); else imxrt_gpio_write(CH438_D3_PIN_OUT, false);
|
||||
if(dat &0x04) imxrt_gpio_write(CH438_D2_PIN_OUT, true); else imxrt_gpio_write(CH438_D2_PIN_OUT, false);
|
||||
if(dat &0x02) imxrt_gpio_write(CH438_D1_PIN_OUT, true); else imxrt_gpio_write(CH438_D1_PIN_OUT, false);
|
||||
if(dat &0x01) imxrt_gpio_write(CH438_D0_PIN_OUT, true); else imxrt_gpio_write(CH438_D0_PIN_OUT, false);
|
||||
|
||||
up_udelay(1);
|
||||
|
||||
imxrt_gpio_write(CH438_NWR_PIN, false);
|
||||
up_udelay(1);
|
||||
|
||||
imxrt_gpio_write(CH438_NWR_PIN, true);
|
||||
imxrt_gpio_write(CH438_ALE_PIN, true);
|
||||
up_udelay(1);
|
||||
|
||||
CH438SetInput();
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: WriteCH438Block
|
||||
*
|
||||
* Description:
|
||||
* Write data block from ch438 address
|
||||
*
|
||||
****************************************************************************/
|
||||
static void WriteCH438Block(uint8_t mAddr, uint8_t mLen, const uint8_t *mBuf)
|
||||
{
|
||||
while(mLen--)
|
||||
WriteCH438Data(mAddr, *mBuf++);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: CH438UARTSend
|
||||
*
|
||||
* Description:
|
||||
* Enable FIFO mode, which is used for ch438 serial port to send multi byte data,
|
||||
* with a maximum of 128 bytes of data sent at a time
|
||||
*
|
||||
****************************************************************************/
|
||||
static void Ch438UartSend(uint8_t ext_uart_no, const uint8_t *Data, uint16_t Num)
|
||||
{
|
||||
uint8_t REG_LSR_ADDR,REG_THR_ADDR;
|
||||
REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR;
|
||||
REG_THR_ADDR = offsetadd[ext_uart_no] | REG_THR0_ADDR;
|
||||
|
||||
while(1)
|
||||
{
|
||||
while((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_TEMT) == 0); /* wait for sending data done, THR and TSR is NULL */
|
||||
if(Num <= 128)
|
||||
{
|
||||
WriteCH438Block(REG_THR_ADDR, Num, Data);
|
||||
break;
|
||||
}
|
||||
else
|
||||
{
|
||||
WriteCH438Block(REG_THR_ADDR, 128, Data);
|
||||
Num -= 128;
|
||||
Data += 128;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: CH438UARTRcv
|
||||
*
|
||||
* Description:
|
||||
* Disable FIFO mode for ch438 serial port to receive multi byte data
|
||||
*
|
||||
****************************************************************************/
|
||||
uint8_t CH438UARTRcv(uint8_t ext_uart_no, uint8_t *buf, size_t size)
|
||||
{
|
||||
uint8_t rcv_num = 0;
|
||||
uint8_t dat = 0;
|
||||
uint8_t REG_LSR_ADDR,REG_RBR_ADDR;
|
||||
uint8_t *read_buffer;
|
||||
size_t buffer_index = 0;
|
||||
|
||||
read_buffer = buf;
|
||||
|
||||
REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR;
|
||||
REG_RBR_ADDR = offsetadd[ext_uart_no] | REG_RBR0_ADDR;
|
||||
|
||||
/* Wait for the data to be ready */
|
||||
while ((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_DATARDY) == 0);
|
||||
|
||||
while (((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_DATARDY) == 0x01) && (size != 0))
|
||||
{
|
||||
dat = ReadCH438Data(REG_RBR_ADDR);
|
||||
*read_buffer = dat;
|
||||
read_buffer++;
|
||||
buffer_index++;
|
||||
if (255 == buffer_index) {
|
||||
buffer_index = 0;
|
||||
read_buffer = buf;
|
||||
}
|
||||
|
||||
++rcv_num;
|
||||
--size;
|
||||
}
|
||||
|
||||
return rcv_num;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: ImxrtCH438Init
|
||||
*
|
||||
* Description:
|
||||
* ch438 initialization
|
||||
*
|
||||
****************************************************************************/
|
||||
static void ImxrtCH438Init(void)
|
||||
{
|
||||
CH438SetOutput();
|
||||
imxrt_config_gpio(CH438_NWR_PIN);
|
||||
imxrt_config_gpio(CH438_NRD_PIN);
|
||||
imxrt_config_gpio(CH438_ALE_PIN);
|
||||
|
||||
imxrt_gpio_write(CH438_NWR_PIN,true);
|
||||
imxrt_gpio_write(CH438_NRD_PIN,true);
|
||||
imxrt_gpio_write(CH438_ALE_PIN,true);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: CH438PortInit
|
||||
*
|
||||
* Description:
|
||||
* ch438 port initialization
|
||||
*
|
||||
****************************************************************************/
|
||||
static void CH438PortInit(uint8_t ext_uart_no, uint32_t baud_rate)
|
||||
{
|
||||
uint32_t div;
|
||||
uint8_t DLL,DLM,dlab;
|
||||
uint8_t REG_LCR_ADDR;
|
||||
uint8_t REG_DLL_ADDR;
|
||||
uint8_t REG_DLM_ADDR;
|
||||
uint8_t REG_IER_ADDR;
|
||||
uint8_t REG_MCR_ADDR;
|
||||
uint8_t REG_FCR_ADDR;
|
||||
|
||||
REG_LCR_ADDR = offsetadd[ext_uart_no] | REG_LCR0_ADDR;
|
||||
REG_DLL_ADDR = offsetadd[ext_uart_no] | REG_DLL0_ADDR;
|
||||
REG_DLM_ADDR = offsetadd[ext_uart_no] | REG_DLM0_ADDR;
|
||||
REG_IER_ADDR = offsetadd[ext_uart_no] | REG_IER0_ADDR;
|
||||
REG_MCR_ADDR = offsetadd[ext_uart_no] | REG_MCR0_ADDR;
|
||||
REG_FCR_ADDR = offsetadd[ext_uart_no] | REG_FCR0_ADDR;
|
||||
|
||||
/* reset the uart */
|
||||
WriteCH438Data(REG_IER_ADDR, BIT_IER_RESET);
|
||||
up_mdelay(50);
|
||||
|
||||
dlab = ReadCH438Data(REG_IER_ADDR);
|
||||
dlab &= 0xDF;
|
||||
WriteCH438Data(REG_IER_ADDR, dlab);
|
||||
|
||||
/* set LCR register DLAB bit 1 */
|
||||
dlab = ReadCH438Data(REG_LCR_ADDR);
|
||||
dlab |= 0x80;
|
||||
WriteCH438Data(REG_LCR_ADDR, dlab);
|
||||
|
||||
div = (Fpclk >> 4) / baud_rate;
|
||||
DLM = div >> 8;
|
||||
DLL = div & 0xff;
|
||||
|
||||
/* set bps */
|
||||
WriteCH438Data(REG_DLL_ADDR, DLL);
|
||||
WriteCH438Data(REG_DLM_ADDR, DLM);
|
||||
|
||||
/* set FIFO mode, 112 bytes */
|
||||
WriteCH438Data(REG_FCR_ADDR, BIT_FCR_RECVTG1 | BIT_FCR_RECVTG0 | BIT_FCR_FIFOEN);
|
||||
|
||||
/* 8 bit word size, 1 bit stop bit, no crc */
|
||||
WriteCH438Data(REG_LCR_ADDR, BIT_LCR_WORDSZ1 | BIT_LCR_WORDSZ0);
|
||||
|
||||
/* enable interrupt */
|
||||
WriteCH438Data(REG_IER_ADDR, BIT_IER_IERECV);
|
||||
|
||||
/* allow interrupt output, DTR and RTS is 1 */
|
||||
WriteCH438Data(REG_MCR_ADDR, BIT_MCR_OUT2);
|
||||
|
||||
/* release the data in FIFO */
|
||||
WriteCH438Data(REG_FCR_ADDR, ReadCH438Data(REG_FCR_ADDR)| BIT_FCR_TFIFORST);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: ImxrtCh438ReadData
|
||||
*
|
||||
* Description:
|
||||
* Read data from ch438 port
|
||||
*
|
||||
****************************************************************************/
|
||||
static int ImxrtCh438WriteData(uint8_t ext_uart_no, const uint8_t *write_buffer, size_t size)
|
||||
{
|
||||
int write_len, write_len_continue;
|
||||
int i, write_index;
|
||||
DEBUGASSERT(write_buffer != NULL);
|
||||
|
||||
write_len = size;
|
||||
write_len_continue = size;
|
||||
|
||||
if(write_len > 256)
|
||||
{
|
||||
if(0 == write_len % 256)
|
||||
{
|
||||
write_index = write_len / 256;
|
||||
for(i = 0; i < write_index; i ++)
|
||||
{
|
||||
Ch438UartSend(ext_uart_no, write_buffer + i * 256, 256);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
write_index = 0;
|
||||
while(write_len_continue > 256)
|
||||
{
|
||||
Ch438UartSend(ext_uart_no, write_buffer + write_index * 256, 256);
|
||||
write_index++;
|
||||
write_len_continue = write_len - write_index * 256;
|
||||
}
|
||||
Ch438UartSend(ext_uart_no, write_buffer + write_index * 256, write_len_continue);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
Ch438UartSend(ext_uart_no, write_buffer, write_len);
|
||||
}
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: ImxrtCh438ReadData
|
||||
*
|
||||
* Description:
|
||||
* Read data from ch438 port
|
||||
*
|
||||
****************************************************************************/
|
||||
static size_t ImxrtCh438ReadData(uint8_t ext_uart_no, size_t size)
|
||||
{
|
||||
size_t RevLen = 0;
|
||||
uint8_t InterruptStatus;
|
||||
uint8_t REG_IIR_ADDR;
|
||||
uint8_t REG_LSR_ADDR;
|
||||
uint8_t REG_MSR_ADDR;
|
||||
|
||||
pthread_mutex_lock(&mutex[ext_uart_no]);
|
||||
while(done[ext_uart_no] == false)
|
||||
pthread_cond_wait(&cond[ext_uart_no], &mutex[ext_uart_no]);
|
||||
if(done[ext_uart_no] == true)
|
||||
{
|
||||
REG_IIR_ADDR = offsetadd[ext_uart_no] | REG_IIR0_ADDR;
|
||||
REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR;
|
||||
REG_MSR_ADDR = offsetadd[ext_uart_no] | REG_MSR0_ADDR;
|
||||
/* Read the interrupt status of the serial port */
|
||||
InterruptStatus = ReadCH438Data(REG_IIR_ADDR) & 0x0f;
|
||||
ch438info("InterruptStatus is %d\n", InterruptStatus);
|
||||
|
||||
switch(InterruptStatus)
|
||||
{
|
||||
case INT_NOINT: /* no interrupt */
|
||||
break;
|
||||
case INT_THR_EMPTY: /* the transmit hold register is not interrupted */
|
||||
break;
|
||||
case INT_RCV_OVERTIME: /* receive data timeout interrupt */
|
||||
case INT_RCV_SUCCESS: /* receive data available interrupt */
|
||||
RevLen = CH438UARTRcv(ext_uart_no, buff[ext_uart_no], size);
|
||||
break;
|
||||
case INT_RCV_LINES: /* receive line status interrupt */
|
||||
ReadCH438Data(REG_LSR_ADDR);
|
||||
break;
|
||||
case INT_MODEM_CHANGE: /* modem input change interrupt */
|
||||
ReadCH438Data(REG_MSR_ADDR);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
done[ext_uart_no] = false;
|
||||
}
|
||||
pthread_mutex_unlock(&mutex[ext_uart_no]);
|
||||
|
||||
return RevLen;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: Ch438InitDefault
|
||||
*
|
||||
* Description:
|
||||
* Ch438 default initialization function
|
||||
*
|
||||
****************************************************************************/
|
||||
static void Ch438InitDefault(void)
|
||||
{
|
||||
int ret = 0;
|
||||
int i;
|
||||
|
||||
/* Initialize the mutex */
|
||||
for(i = 0; i < CH438PORTNUM; i++)
|
||||
{
|
||||
if(!g_uart_selected[i])
|
||||
{
|
||||
continue;
|
||||
}
|
||||
|
||||
ret = pthread_mutex_init(&mutex[i], NULL);
|
||||
if(ret != 0)
|
||||
{
|
||||
ch438err("pthread_mutex_init failed, status=%d\n", ret);
|
||||
}
|
||||
}
|
||||
|
||||
/* Initialize the condition variable */
|
||||
for(i = 0; i < CH438PORTNUM; i++)
|
||||
{
|
||||
if(!g_uart_selected[i])
|
||||
{
|
||||
continue;
|
||||
}
|
||||
|
||||
ret = pthread_cond_init(&cond[i], NULL);
|
||||
if(ret != 0)
|
||||
{
|
||||
ch438err("pthread_cond_init failed, status=%d\n", ret);
|
||||
}
|
||||
}
|
||||
|
||||
ImxrtCH438Init();
|
||||
|
||||
/* If a port is checked, the port will be initialized. Otherwise, the interrupt of the port will be disabled. */
|
||||
|
||||
#ifdef CONFIG_CH438_EXTUART0
|
||||
CH438PortInit(0, CONFIG_CH438_EXTUART0_BAUD);
|
||||
#else
|
||||
WriteCH438Data(REG_IER0_ADDR, 0x00);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CH438_EXTUART1
|
||||
CH438PortInit(1, CONFIG_CH438_EXTUART1_BAUD);
|
||||
#else
|
||||
WriteCH438Data(REG_IER1_ADDR, 0x00);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CH438_EXTUART2
|
||||
CH438PortInit(2, CONFIG_CH438_EXTUART2_BAUD);
|
||||
#else
|
||||
WriteCH438Data(REG_IER2_ADDR, 0x00);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CH438_EXTUART3
|
||||
CH438PortInit(3, CONFIG_CH438_EXTUART3_BAUD);
|
||||
#else
|
||||
WriteCH438Data(REG_IER3_ADDR, 0x00);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CH438_EXTUART4
|
||||
CH438PortInit(4, CONFIG_CH438_EXTUART4_BAUD);
|
||||
#else
|
||||
WriteCH438Data(REG_IER4_ADDR, 0x00);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CH438_EXTUART5
|
||||
CH438PortInit(5, CONFIG_CH438_EXTUART5_BAUD);
|
||||
#else
|
||||
WriteCH438Data(REG_IER5_ADDR, 0x00);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CH438_EXTUART6
|
||||
CH438PortInit(6, CONFIG_CH438_EXTUART6_BAUD);
|
||||
#else
|
||||
WriteCH438Data(REG_IER6_ADDR, 0x00);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CH438_EXTUART7
|
||||
CH438PortInit(7, CONFIG_CH438_EXTUART7_BAUD);
|
||||
#else
|
||||
WriteCH438Data(REG_IER7_ADDR, 0x00);
|
||||
#endif
|
||||
|
||||
up_mdelay(10);
|
||||
|
||||
work_queue(HPWORK, &g_ch438irqwork, getInterruptStatus, NULL, CH438_INCREMENT);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: ch438_open
|
||||
****************************************************************************/
|
||||
static int ch438_open(FAR struct file *filep)
|
||||
{
|
||||
FAR struct inode *inode = filep->f_inode;
|
||||
FAR struct ch438_dev_s *priv = inode->i_private;
|
||||
uint8_t port = priv->port;
|
||||
int ret = OK;
|
||||
|
||||
DEBUGASSERT(port >= 0 && port < CH438PORTNUM);
|
||||
|
||||
ret = nxsem_wait_uninterruptible(&priv->devsem);
|
||||
if (ret < 0)
|
||||
{
|
||||
return ret;
|
||||
}
|
||||
|
||||
if(g_ch438open[port])
|
||||
{
|
||||
ch438err("ERROR: ch438 port %d is opened!\n",port);
|
||||
return -EBUSY;
|
||||
}
|
||||
g_ch438open[port] = true;
|
||||
|
||||
nxsem_post(&priv->devsem);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: ch438_close
|
||||
****************************************************************************/
|
||||
static int ch438_close(FAR struct file *filep)
|
||||
{
|
||||
FAR struct inode *inode = filep->f_inode;
|
||||
FAR struct ch438_dev_s *priv = inode->i_private;
|
||||
uint8_t port = priv->port;
|
||||
int ret = OK;
|
||||
|
||||
DEBUGASSERT(port >= 0 && port < CH438PORTNUM);
|
||||
|
||||
ret = nxsem_wait_uninterruptible(&priv->devsem);
|
||||
if (ret < 0)
|
||||
{
|
||||
return ret;
|
||||
}
|
||||
|
||||
if(!g_ch438open[port])
|
||||
{
|
||||
ch438err("ERROR: ch438 port %d is closed!\n",port);
|
||||
return -EBUSY;
|
||||
}
|
||||
g_ch438open[port] = false;
|
||||
|
||||
nxsem_post(&priv->devsem);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: ch438_read
|
||||
****************************************************************************/
|
||||
static ssize_t ch438_read(FAR struct file *filep, FAR char *buffer, size_t buflen)
|
||||
{
|
||||
size_t length = 0;
|
||||
FAR struct inode *inode = filep->f_inode;
|
||||
FAR struct ch438_dev_s *priv = inode->i_private;
|
||||
uint8_t port = priv->port;
|
||||
|
||||
DEBUGASSERT(port >= 0 && port < CH438PORTNUM);
|
||||
|
||||
length = ImxrtCh438ReadData(port, buflen);
|
||||
memcpy(buffer, buff[port], length);
|
||||
|
||||
if(length > buflen)
|
||||
{
|
||||
length = buflen;
|
||||
}
|
||||
|
||||
return length;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: ch438_write
|
||||
****************************************************************************/
|
||||
static ssize_t ch438_write(FAR struct file *filep, FAR const char *buffer, size_t buflen)
|
||||
{
|
||||
FAR struct inode *inode = filep->f_inode;
|
||||
FAR struct ch438_dev_s *priv = inode->i_private;
|
||||
uint8_t port = priv->port;
|
||||
|
||||
DEBUGASSERT(port >= 0 && port < CH438PORTNUM);
|
||||
|
||||
ImxrtCh438WriteData(port, (const uint8_t *)buffer, buflen);
|
||||
|
||||
return buflen;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: ch438_ioctl
|
||||
****************************************************************************/
|
||||
static int ch438_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
|
||||
{
|
||||
FAR struct inode *inode = filep->f_inode;
|
||||
FAR struct ch438_dev_s *priv = inode->i_private;
|
||||
uint8_t port = priv->port;
|
||||
int ret = OK;
|
||||
|
||||
DEBUGASSERT(port >= 0 && port < CH438PORTNUM);
|
||||
|
||||
switch(cmd)
|
||||
{
|
||||
case OPE_INT:
|
||||
case OPE_CFG:
|
||||
CH438PortInit(port, (uint32_t)arg);
|
||||
break;
|
||||
|
||||
default:
|
||||
ch438info("Unrecognized cmd: %d\n", cmd);
|
||||
ret = -ENOTTY;
|
||||
break;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
/****************************************************************************
|
||||
* Name: ch438_register
|
||||
*
|
||||
* Description:
|
||||
* Register /dev/ext_uartN
|
||||
*
|
||||
****************************************************************************/
|
||||
static int ch438_register(FAR const char *devpath, uint8_t port)
|
||||
{
|
||||
FAR struct ch438_dev_s *priv;
|
||||
int ret = 0;
|
||||
|
||||
/* port number check */
|
||||
DEBUGASSERT(port >= 0 && port < CH438PORTNUM);
|
||||
|
||||
priv = (FAR struct ch438_dev_s *)kmm_malloc(sizeof(struct ch438_dev_s));
|
||||
if(priv == NULL)
|
||||
{
|
||||
ch438err("ERROR: Failed to allocate instance\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
priv->port = port;
|
||||
nxsem_init(&priv->devsem, 0, 1);
|
||||
|
||||
/* Register the character driver */
|
||||
ret = register_driver(devpath, &g_ch438fops, 0666, priv);
|
||||
if(ret < 0)
|
||||
{
|
||||
kmm_free(priv);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: board_ch438_initialize
|
||||
*
|
||||
* Description:
|
||||
* ch438 initialize
|
||||
*
|
||||
****************************************************************************/
|
||||
void board_ch438_initialize(void)
|
||||
{
|
||||
Ch438InitDefault();
|
||||
|
||||
#ifdef CONFIG_CH438_EXTUART0
|
||||
ch438_register("/dev/extuart_dev0", 0);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CH438_EXTUART1
|
||||
ch438_register("/dev/extuart_dev1", 1);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CH438_EXTUART2
|
||||
ch438_register("/dev/extuart_dev2", 2);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CH438_EXTUART3
|
||||
ch438_register("/dev/extuart_dev3", 3);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CH438_EXTUART4
|
||||
ch438_register("/dev/extuart_dev4", 4);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CH438_EXTUART5
|
||||
ch438_register("/dev/extuart_dev5", 5);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CH438_EXTUART6
|
||||
ch438_register("/dev/extuart_dev6", 6);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CH438_EXTUART7
|
||||
ch438_register("/dev/extuart_dev7", 7);
|
||||
#endif
|
||||
}
|
||||
|
|
@ -0,0 +1,369 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file imxrt_ch438.h
|
||||
* @brief imxrt board sd card automount
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2022.04.26
|
||||
*/
|
||||
|
||||
#ifndef __BOARDS_ARM_IMXRT_XIDATONG_SRC_IMXRT_CH438_H
|
||||
#define __BOARDS_ARM_IMXRT_XIDATONG_SRC_IMXRT_CH438_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
#include <nuttx/config.h>
|
||||
#include <nuttx/kmalloc.h>
|
||||
#include <nuttx/arch.h>
|
||||
#include <nuttx/irq.h>
|
||||
#include <nuttx/pthread.h>
|
||||
#include <nuttx/semaphore.h>
|
||||
#include <nuttx/wqueue.h>
|
||||
#include <nuttx/wdog.h>
|
||||
#include <nuttx/clock.h>
|
||||
#include <nuttx/time.h>
|
||||
#include <nuttx/fs/fs.h>
|
||||
#include <nuttx/fs/ioctl.h>
|
||||
#include <nuttx/arch.h>
|
||||
|
||||
#include <sys/types.h>
|
||||
#include <sys/stat.h>
|
||||
#include <sys/ioctl.h>
|
||||
#include <errno.h>
|
||||
#include <stddef.h>
|
||||
#include <stdint.h>
|
||||
#include <stdio.h>
|
||||
#include <sched.h>
|
||||
#include <debug.h>
|
||||
#include <assert.h>
|
||||
#include <unistd.h>
|
||||
#include <stdbool.h>
|
||||
#include <string.h>
|
||||
#include <stdlib.h>
|
||||
#include <fcntl.h>
|
||||
|
||||
#include <arch/board/board.h>
|
||||
#include "arm_arch.h"
|
||||
|
||||
#include "imxrt_config.h"
|
||||
#include "imxrt_irq.h"
|
||||
#include "imxrt_gpio.h"
|
||||
#include "xidatong.h"
|
||||
|
||||
/******************************************************************************************/
|
||||
|
||||
/* chip definition */
|
||||
/* CH438serial port0 register address */
|
||||
|
||||
#define REG_RBR0_ADDR 0x00 /* serial port0receive buffer register address */
|
||||
#define REG_THR0_ADDR 0x00 /* serial port0send hold register address */
|
||||
#define REG_IER0_ADDR 0x01 /* serial port0interrupt enable register address */
|
||||
#define REG_IIR0_ADDR 0x02 /* serial port0interrupt identifies register address */
|
||||
#define REG_FCR0_ADDR 0x02 /* serial port0FIFO controls register address */
|
||||
#define REG_LCR0_ADDR 0x03 /* serial port0circuit control register address */
|
||||
#define REG_MCR0_ADDR 0x04 /* serial port0MODEM controls register address */
|
||||
#define REG_LSR0_ADDR 0x05 /* serial port0line status register address */
|
||||
#define REG_MSR0_ADDR 0x06 /* serial port0address of MODEM status register */
|
||||
#define REG_SCR0_ADDR 0x07 /* serial port0the user can define the register address */
|
||||
#define REG_DLL0_ADDR 0x00 /* Baud rate divisor latch low 8-bit byte address */
|
||||
#define REG_DLM0_ADDR 0x01 /* Baud rate divisor latch high 8-bit byte address */
|
||||
|
||||
|
||||
/* CH438serial port1 register address */
|
||||
|
||||
#define REG_RBR1_ADDR 0x10 /* serial port1receive buffer register address */
|
||||
#define REG_THR1_ADDR 0x10 /* serial port1send hold register address */
|
||||
#define REG_IER1_ADDR 0x11 /* serial port1interrupt enable register address */
|
||||
#define REG_IIR1_ADDR 0x12 /* serial port1interrupt identifies register address */
|
||||
#define REG_FCR1_ADDR 0x12 /* serial port1FIFO controls register address */
|
||||
#define REG_LCR1_ADDR 0x13 /* serial port1circuit control register address */
|
||||
#define REG_MCR1_ADDR 0x14 /* serial port1MODEM controls register address */
|
||||
#define REG_LSR1_ADDR 0x15 /* serial port1line status register address */
|
||||
#define REG_MSR1_ADDR 0x16 /* serial port1address of MODEM status register */
|
||||
#define REG_SCR1_ADDR 0x17 /* serial port1the user can define the register address */
|
||||
#define REG_DLL1_ADDR 0x10 /* Baud rate divisor latch low 8-bit byte address */
|
||||
#define REG_DLM1_ADDR 0x11 /* Baud rate divisor latch high 8-bit byte address */
|
||||
|
||||
|
||||
/* CH438serial port2 register address */
|
||||
|
||||
#define REG_RBR2_ADDR 0x20 /* serial port2receive buffer register address */
|
||||
#define REG_THR2_ADDR 0x20 /* serial port2send hold register address */
|
||||
#define REG_IER2_ADDR 0x21 /* serial port2interrupt enable register address */
|
||||
#define REG_IIR2_ADDR 0x22 /* serial port2interrupt identifies register address */
|
||||
#define REG_FCR2_ADDR 0x22 /* serial port2FIFO controls register address */
|
||||
#define REG_LCR2_ADDR 0x23 /* serial port2circuit control register address */
|
||||
#define REG_MCR2_ADDR 0x24 /* serial port2MODEM controls register address */
|
||||
#define REG_LSR2_ADDR 0x25 /* serial port2line status register address */
|
||||
#define REG_MSR2_ADDR 0x26 /* serial port2address of MODEM status register */
|
||||
#define REG_SCR2_ADDR 0x27 /* serial port2the user can define the register address */
|
||||
#define REG_DLL2_ADDR 0x20 /* Baud rate divisor latch low 8-bit byte address */
|
||||
#define REG_DLM2_ADDR 0x21 /* Baud rate divisor latch high 8-bit byte address */
|
||||
|
||||
|
||||
/* CH438serial port3 register address */
|
||||
|
||||
#define REG_RBR3_ADDR 0x30 /* serial port3receive buffer register address */
|
||||
#define REG_THR3_ADDR 0x30 /* serial port3send hold register address */
|
||||
#define REG_IER3_ADDR 0x31 /* serial port3interrupt enable register address */
|
||||
#define REG_IIR3_ADDR 0x32 /* serial port3interrupt identifies register address */
|
||||
#define REG_FCR3_ADDR 0x32 /* serial port3FIFO controls register address */
|
||||
#define REG_LCR3_ADDR 0x33 /* serial port3circuit control register address */
|
||||
#define REG_MCR3_ADDR 0x34 /* serial port3MODEM controls register address */
|
||||
#define REG_LSR3_ADDR 0x35 /* serial port3line status register address */
|
||||
#define REG_MSR3_ADDR 0x36 /* serial port3address of MODEM status register */
|
||||
#define REG_SCR3_ADDR 0x37 /* serial port3the user can define the register address */
|
||||
#define REG_DLL3_ADDR 0x30 /* Baud rate divisor latch low 8-bit byte address */
|
||||
#define REG_DLM3_ADDR 0x31 /* Baud rate divisor latch high 8-bit byte address */
|
||||
|
||||
|
||||
/* CH438serial port4 register address */
|
||||
|
||||
#define REG_RBR4_ADDR 0x08 /* serial port4receive buffer register address */
|
||||
#define REG_THR4_ADDR 0x08 /* serial port4send hold register address */
|
||||
#define REG_IER4_ADDR 0x09 /* serial port4interrupt enable register address */
|
||||
#define REG_IIR4_ADDR 0x0A /* serial port4interrupt identifies register address */
|
||||
#define REG_FCR4_ADDR 0x0A /* serial port4FIFO controls register address */
|
||||
#define REG_LCR4_ADDR 0x0B /* serial port4circuit control register address */
|
||||
#define REG_MCR4_ADDR 0x0C /* serial port4MODEM controls register address */
|
||||
#define REG_LSR4_ADDR 0x0D /* serial port4line status register address */
|
||||
#define REG_MSR4_ADDR 0x0E /* serial port4address of MODEM status register */
|
||||
#define REG_SCR4_ADDR 0x0F /* serial port4the user can define the register address */
|
||||
#define REG_DLL4_ADDR 0x08 /* Baud rate divisor latch low 8-bit byte address */
|
||||
#define REG_DLM4_ADDR 0x09 /* Baud rate divisor latch high 8-bit byte address */
|
||||
|
||||
|
||||
/* CH438serial port5 register address */
|
||||
|
||||
#define REG_RBR5_ADDR 0x18 /* serial port5receive buffer register address */
|
||||
#define REG_THR5_ADDR 0x18 /* serial port5send hold register address */
|
||||
#define REG_IER5_ADDR 0x19 /* serial port5interrupt enable register address */
|
||||
#define REG_IIR5_ADDR 0x1A /* serial port5interrupt identifies register address */
|
||||
#define REG_FCR5_ADDR 0x1A /* serial port5FIFO controls register address */
|
||||
#define REG_LCR5_ADDR 0x1B /* serial port5circuit control register address */
|
||||
#define REG_MCR5_ADDR 0x1C /* serial port5MODEM controls register address */
|
||||
#define REG_LSR5_ADDR 0x1D /* serial port5line status register address */
|
||||
#define REG_MSR5_ADDR 0x1E /* serial port5address of MODEM status register */
|
||||
#define REG_SCR5_ADDR 0x1F /* serial port5the user can define the register address */
|
||||
#define REG_DLL5_ADDR 0x18 /* Baud rate divisor latch low 8-bit byte address */
|
||||
#define REG_DLM5_ADDR 0x19 /* Baud rate divisor latch high 8-bit byte address */
|
||||
|
||||
|
||||
/* CH438serial port6 register address */
|
||||
|
||||
#define REG_RBR6_ADDR 0x28 /* serial port6receive buffer register address */
|
||||
#define REG_THR6_ADDR 0x28 /* serial port6send hold register address */
|
||||
#define REG_IER6_ADDR 0x29 /* serial port6interrupt enable register address */
|
||||
#define REG_IIR6_ADDR 0x2A /* serial port6interrupt identifies register address */
|
||||
#define REG_FCR6_ADDR 0x2A /* serial port6FIFO controls register address */
|
||||
#define REG_LCR6_ADDR 0x2B /* serial port6circuit control register address */
|
||||
#define REG_MCR6_ADDR 0x2C /* serial port6MODEM controls register address */
|
||||
#define REG_LSR6_ADDR 0x2D /* serial port6line status register address */
|
||||
#define REG_MSR6_ADDR 0x2E /* serial port6address of MODEM status register */
|
||||
#define REG_SCR6_ADDR 0x2F /* serial port6the user can define the register address */
|
||||
#define REG_DLL6_ADDR 0x28 /* Baud rate divisor latch low 8-bit byte address */
|
||||
#define REG_DLM6_ADDR 0x29 /* Baud rate divisor latch high 8-bit byte address */
|
||||
|
||||
|
||||
/* CH438serial port7 register address */
|
||||
|
||||
#define REG_RBR7_ADDR 0x38 /* serial port7receive buffer register address */
|
||||
#define REG_THR7_ADDR 0x38 /* serial port7send hold register address */
|
||||
#define REG_IER7_ADDR 0x39 /* serial port7interrupt enable register address */
|
||||
#define REG_IIR7_ADDR 0x3A /* serial port7interrupt identifies register address */
|
||||
#define REG_FCR7_ADDR 0x3A /* serial port7FIFO controls register address */
|
||||
#define REG_LCR7_ADDR 0x3B /* serial port7circuit control register address */
|
||||
#define REG_MCR7_ADDR 0x3C /* serial port7MODEM controls register address */
|
||||
#define REG_LSR7_ADDR 0x3D /* serial port7line status register address */
|
||||
#define REG_MSR7_ADDR 0x3E /* serial port7address of MODEM status register */
|
||||
#define REG_SCR7_ADDR 0x3F /* serial port7the user can define the register address */
|
||||
#define REG_DLL7_ADDR 0x38 /* Baud rate divisor latch low 8-bit byte address */
|
||||
#define REG_DLM7_ADDR 0x39 /* Baud rate divisor latch high 8-bit byte address */
|
||||
|
||||
|
||||
#define REG_SSR_ADDR 0x4F /* pecial status register address */
|
||||
|
||||
|
||||
/* IER register bit */
|
||||
|
||||
#define BIT_IER_RESET 0x80 /* The bit is 1 soft reset serial port */
|
||||
#define BIT_IER_LOWPOWER 0x40 /* The bit is 1 close serial port internal reference clock */
|
||||
#define BIT_IER_SLP 0x20 /* serial port0 is SLP, 1 close clock vibrator */
|
||||
#define BIT_IER1_CK2X 0x20 /* serial port1 is CK2X, 1 force the external clock signal after 2 times as internal */
|
||||
#define BIT_IER_IEMODEM 0x08 /* The bit is 1 allows MODEM input status to interrupt */
|
||||
#define BIT_IER_IELINES 0x04 /* The bit is 1 allow receiving line status to be interrupted */
|
||||
#define BIT_IER_IETHRE 0x02 /* The bit is 1 allows the send hold register to break in mid-air */
|
||||
#define BIT_IER_IERECV 0x01 /* The bit is 1 allows receiving data interrupts */
|
||||
|
||||
/* IIR register bit */
|
||||
|
||||
#define BIT_IIR_FIFOENS1 0x80
|
||||
#define BIT_IIR_FIFOENS0 0x40 /* The two is 1 said use FIFO */
|
||||
|
||||
/* Interrupt type: 0001 has no interrupt, 0110 receiving line status is interrupted, 0100 receiving data can be interrupted,
|
||||
1100 received data timeout interrupt, 0010THR register air interrupt, 0000MODEM input change interrupt */
|
||||
#define BIT_IIR_IID3 0x08
|
||||
#define BIT_IIR_IID2 0x04
|
||||
#define BIT_IIR_IID1 0x02
|
||||
#define BIT_IIR_NOINT 0x01
|
||||
|
||||
/* FCR register bit */
|
||||
|
||||
/* Trigger point: 00 corresponds to 1 byte, 01 corresponds to 16 bytes, 10 corresponds to 64 bytes, 11 corresponds to 112 bytes */
|
||||
#define BIT_FCR_RECVTG1 0x80 /* Set the trigger point for FIFO interruption and automatic hardware flow control */
|
||||
#define BIT_FCR_RECVTG0 0x40 /* Set the trigger point for FIFO interruption and automatic hardware flow control */
|
||||
|
||||
#define BIT_FCR_TFIFORST 0x04 /* The bit is 1 empty the data sent in FIFO */
|
||||
#define BIT_FCR_RFIFORST 0x02 /* The bit is 1 empty the data sent in FIFO */
|
||||
#define BIT_FCR_FIFOEN 0x01 /* The bit is 1 use FIFO, 0 disable FIFO */
|
||||
|
||||
/* LCR register bit */
|
||||
|
||||
#define BIT_LCR_DLAB 0x80 /* To access DLL, DLM, 0 to access RBR/THR/IER */
|
||||
#define BIT_LCR_BREAKEN 0x40 /* 1 forces a BREAK line interval*/
|
||||
|
||||
/* Set the check format: when PAREN is 1, 00 odd check, 01 even check, 10 MARK (set 1), 11 blank (SPACE, clear 0) */
|
||||
#define BIT_LCR_PARMODE1 0x20 /* Sets the parity bit format */
|
||||
#define BIT_LCR_PARMODE0 0x10 /* Sets the parity bit format */
|
||||
|
||||
#define BIT_LCR_PAREN 0x08 /* A value of 1 allows you to generate and receive parity bits when sending */
|
||||
#define BIT_LCR_STOPBIT 0x04 /* If is 1, then two stop bits, is 0, a stop bit */
|
||||
|
||||
/* Set word length: 00 for 5 data bits, 01 for 6 data bits, 10 for 7 data bits and 11 for 8 data bits */
|
||||
#define BIT_LCR_WORDSZ1 0x02 /* Set the word length length */
|
||||
#define BIT_LCR_WORDSZ0 0x01
|
||||
|
||||
/* MCR register bit */
|
||||
|
||||
#define BIT_MCR_AFE 0x20 /* For 1 allows automatic flow control of CTS and RTS hardware */
|
||||
#define BIT_MCR_LOOP 0x10 /* Is the test mode of 1 enabling internal loop */
|
||||
#define BIT_MCR_OUT2 0x08 /* 1 Allows an interrupt request for the serial port output */
|
||||
#define BIT_MCR_OUT1 0x04 /* The MODEM control bit defined for the user */
|
||||
#define BIT_MCR_RTS 0x02 /* The bit is 1 RTS pin output effective */
|
||||
#define BIT_MCR_DTR 0x01 /* The bit is 1 DTR pin output effective */
|
||||
|
||||
/* LSR register bit */
|
||||
|
||||
#define BIT_LSR_RFIFOERR 0x80 /* 1 said There is at least one error in receiving FIFO */
|
||||
#define BIT_LSR_TEMT 0x40 /* 1 said THR and TSR are empty */
|
||||
#define BIT_LSR_THRE 0x20 /* 1 said THR is empty*/
|
||||
#define BIT_LSR_BREAKINT 0x10 /* The bit is 1 said the BREAK line interval was detected*/
|
||||
#define BIT_LSR_FRAMEERR 0x08 /* The bit is 1 said error reading data frame */
|
||||
#define BIT_LSR_PARERR 0x04 /* The bit is 1 said parity error */
|
||||
#define BIT_LSR_OVERR 0x02 /* 1 said receive FIFO buffer overflow */
|
||||
#define BIT_LSR_DATARDY 0x01 /* The bit is 1 said receive data received in FIFO */
|
||||
|
||||
/* MSR register bit */
|
||||
|
||||
#define BIT_MSR_DCD 0x80 /* The bit is 1 said DCD pin effective */
|
||||
#define BIT_MSR_RI 0x40 /* The bit is 1 said RI pin effective */
|
||||
#define BIT_MSR_DSR 0x20 /* The bit is 1 said DSR pin effective */
|
||||
#define BIT_MSR_CTS 0x10 /* The bit is 1 said CTS pin effective */
|
||||
#define BIT_MSR_DDCD 0x08 /* The bit is 1 said DCD pin The input state has changed */
|
||||
#define BIT_MSR_TERI 0x04 /* The bit is 1 said RI pin The input state has changed */
|
||||
#define BIT_MSR_DDSR 0x02 /* The bit is 1 said DSR pin The input state has changed */
|
||||
#define BIT_MSR_DCTS 0x01 /* The bit is 1 said CTS pin The input state has changed */
|
||||
|
||||
/* Interrupt status code */
|
||||
|
||||
#define INT_NOINT 0x01 /* There is no interruption */
|
||||
#define INT_THR_EMPTY 0x02 /* THR empty interruption */
|
||||
#define INT_RCV_OVERTIME 0x0C /* Receive timeout interrupt */
|
||||
#define INT_RCV_SUCCESS 0x04 /* Interrupts are available to receive data */
|
||||
#define INT_RCV_LINES 0x06 /* Receiving line status interrupted */
|
||||
#define INT_MODEM_CHANGE 0x00 /* MODEM input changes interrupt */
|
||||
|
||||
#define CH438_IIR_FIFOS_ENABLED 0xC0 /* use FIFO */
|
||||
|
||||
|
||||
#define Fpclk 1843200 /* Define the internal clock frequency*/
|
||||
|
||||
|
||||
// #define IOMUX_CH438OUT_DEFAULT
|
||||
#define CH438_D0_PIN_OUT (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \
|
||||
GPIO_PORT1 | GPIO_PIN25)
|
||||
#define CH438_D1_PIN_OUT (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \
|
||||
GPIO_PORT1 | GPIO_PIN24)
|
||||
#define CH438_D2_PIN_OUT (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \
|
||||
GPIO_PORT1 | GPIO_PIN20)
|
||||
#define CH438_D3_PIN_OUT (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \
|
||||
GPIO_PORT1 | GPIO_PIN21)
|
||||
#define CH438_D4_PIN_OUT (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \
|
||||
GPIO_PORT1 | GPIO_PIN31)
|
||||
#define CH438_D5_PIN_OUT (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \
|
||||
GPIO_PORT1 | GPIO_PIN28)
|
||||
#define CH438_D6_PIN_OUT (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \
|
||||
GPIO_PORT1 | GPIO_PIN30)
|
||||
#define CH438_D7_PIN_OUT (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \
|
||||
GPIO_PORT1 | GPIO_PIN29)
|
||||
#define CH438_NWR_PIN (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \
|
||||
GPIO_PORT3 | GPIO_PIN4)
|
||||
#define CH438_NRD_PIN (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \
|
||||
GPIO_PORT3 | GPIO_PIN5)
|
||||
#define CH438_ALE_PIN (GPIO_OUTPUT | IOMUX_GOUT_DEFAULT | \
|
||||
GPIO_PORT3 | GPIO_PIN2)
|
||||
#define CH438_INT_PIN (GPIO_INTERRUPT | GPIO_INT_FALLINGEDGE | IOMUX_SW_DEFAULT | \
|
||||
GPIO_PORT3 | GPIO_PIN3)
|
||||
|
||||
#define CH438_D0_PIN_INPUT (GPIO_INPUT | \
|
||||
GPIO_PORT1 | GPIO_PIN25)
|
||||
#define CH438_D1_PIN_INPUT (GPIO_INPUT | \
|
||||
GPIO_PORT1 | GPIO_PIN24)
|
||||
#define CH438_D2_PIN_INPUT (GPIO_INPUT | \
|
||||
GPIO_PORT1 | GPIO_PIN20)
|
||||
#define CH438_D3_PIN_INPUT (GPIO_INPUT | \
|
||||
GPIO_PORT1 | GPIO_PIN21)
|
||||
#define CH438_D4_PIN_INPUT (GPIO_INPUT | \
|
||||
GPIO_PORT1 | GPIO_PIN31)
|
||||
#define CH438_D5_PIN_INPUT (GPIO_INPUT | \
|
||||
GPIO_PORT1 | GPIO_PIN28)
|
||||
#define CH438_D6_PIN_INPUT (GPIO_INPUT | \
|
||||
GPIO_PORT1 | GPIO_PIN30)
|
||||
#define CH438_D7_PIN_INPUT (GPIO_INPUT | \
|
||||
GPIO_PORT1 | GPIO_PIN29)
|
||||
|
||||
/* ch438 debug */
|
||||
#ifdef CONFIG_DEBUG_CH438_ERROR
|
||||
# define ch438err _err
|
||||
#else
|
||||
# define ch438err _none
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_DEBUG_CH438_WARN
|
||||
# define ch438warn _warn
|
||||
#else
|
||||
# define ch438warn _none
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_DEBUG_CH438_INFO
|
||||
# define ch438info _info
|
||||
#else
|
||||
# define ch438info _none
|
||||
#endif
|
||||
|
||||
|
||||
/* ioctl cmd */
|
||||
#define OPE_INT 0x0000
|
||||
#define OPE_CFG 0x0001
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
#ifdef CONFIG_BSP_USING_CH438
|
||||
void board_ch438_initialize(void);
|
||||
#endif
|
||||
|
||||
#endif /* __BOARDS_ARM_IMXRT_XIDATONG_SRC_IMXRT_CH438_H */
|
||||
|
||||
|
|
@ -0,0 +1,328 @@
|
|||
/****************************************************************************
|
||||
* boards/arm/imxrt/xidatong/src/imxrt_gt9xx.c
|
||||
*
|
||||
* Copyright 2019 ElFaro LAB S.L. All rights reserved.
|
||||
* Author: Fabio Balzano <fabio@elfarolab.com>
|
||||
*
|
||||
* Based on boards/arm/lpc54xx/lpcxpresso-lpc54628/src/lpc54_ft5x06.c
|
||||
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/**
|
||||
* @file imxrt_gt9xx.c
|
||||
* @brief gt9xx touch driver refer to imxrt_ft5x06.c
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2022.5.31
|
||||
*/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <syslog.h>
|
||||
#include <assert.h>
|
||||
#include <errno.h>
|
||||
|
||||
#include <nuttx/arch.h>
|
||||
#include <nuttx/i2c/i2c_master.h>
|
||||
#include <nuttx/input/gt9xx.h>
|
||||
|
||||
#include "imxrt_config.h"
|
||||
#include "imxrt_gpio.h"
|
||||
#include "imxrt_lpi2c.h"
|
||||
|
||||
#include "arch/chip/irq.h"
|
||||
#include "imxrt_iomuxc.h"
|
||||
|
||||
#define gt_print printf
|
||||
|
||||
#define GT9XX_I2C_ADDRESS 0x5D
|
||||
|
||||
#define GPIO_GT9XX_INTR IMXRT_IRQ_GPIO2_30
|
||||
|
||||
#define IOMUX_GT9XX_RST (IOMUX_PULL_NONE | IOMUX_CMOS_OUTPUT | \
|
||||
IOMUX_DRIVE_40OHM | IOMUX_SPEED_MEDIUM | \
|
||||
IOMUX_SLEW_SLOW)
|
||||
|
||||
#define GPIO_GT9XX_CTRSTN (GPIO_OUTPUT | GPIO_OUTPUT_ZERO | \
|
||||
GPIO_PORT2 | GPIO_PIN30 | IOMUX_GT9XX_RST)
|
||||
|
||||
#define GPIO_GT9XX_CTINTN (GPIO_INTERRUPT | GPIO_INT_RISINGEDGE | \
|
||||
IOMUX_SW_DEFAULT | GPIO_PORT2 | GPIO_PIN30 )
|
||||
|
||||
#ifdef CONFIG_INPUT_GT9XX
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
#define GT9XX_FREQUENCY 400000
|
||||
|
||||
/****************************************************************************
|
||||
* Private Function Ptototypes
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef CONFIG_GT9XX_POLLMODE
|
||||
static int imxrt_gt9xx_attach(FAR const struct gt9xx_config_s *config,
|
||||
xcpt_t isr, FAR void *arg);
|
||||
static void imxrt_gt9xx_enable(FAR const struct gt9xx_config_s *config,
|
||||
bool enable);
|
||||
static void imxrt_gt9xx_clear(FAR const struct gt9xx_config_s *config);
|
||||
#endif
|
||||
|
||||
static void imxrt_gt9xx_wakeup(FAR const struct gt9xx_config_s *config);
|
||||
static void imxrt_gt9xx_nreset(FAR const struct gt9xx_config_s *config,
|
||||
bool state);
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
****************************************************************************/
|
||||
|
||||
static const struct gt9xx_config_s g_gt9xx_config =
|
||||
{
|
||||
.address = GT9XX_I2C_ADDRESS,
|
||||
.frequency = GT9XX_FREQUENCY,
|
||||
#ifndef CONFIG_GT9XX_POLLMODE
|
||||
.attach = imxrt_gt9xx_attach,
|
||||
.enable = imxrt_gt9xx_enable,
|
||||
.clear = imxrt_gt9xx_clear,
|
||||
#endif
|
||||
.wakeup = imxrt_gt9xx_wakeup,
|
||||
.nreset = imxrt_gt9xx_nreset
|
||||
};
|
||||
|
||||
#ifndef CONFIG_GT9XX_POLLMODE
|
||||
static uint8_t g_gt9xx_irq;
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: imxrt_gt9xx_attach
|
||||
*
|
||||
* Description:
|
||||
* Attach an GT9XX interrupt handler to a GPIO interrupt
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef CONFIG_GT9XX_POLLMODE
|
||||
static int imxrt_gt9xx_attach(FAR const struct gt9xx_config_s *config,
|
||||
xcpt_t isr, FAR void *arg)
|
||||
{
|
||||
return irq_attach(g_gt9xx_irq, isr, arg);
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: imxrt_gt9xx_enable
|
||||
*
|
||||
* Description:
|
||||
* Enable or disable a GPIO interrupt
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef CONFIG_GT9XX_POLLMODE
|
||||
static void imxrt_gt9xx_enable(FAR const struct gt9xx_config_s *config,
|
||||
bool enable)
|
||||
{
|
||||
if (enable)
|
||||
{
|
||||
up_enable_irq(g_gt9xx_irq);
|
||||
}
|
||||
else
|
||||
{
|
||||
up_disable_irq(g_gt9xx_irq);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: imxrt_gt9xx_clear
|
||||
*
|
||||
* Description:
|
||||
* Acknowledge/clear any pending GPIO interrupt
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef CONFIG_GT9XX_POLLMODE
|
||||
static void imxrt_gt9xx_clear(FAR const struct gt9xx_config_s *config)
|
||||
{
|
||||
imxrt_gpioirq_disable(g_gt9xx_irq);
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: imxrt_gt9xx_wakeup
|
||||
*
|
||||
* Description:
|
||||
* Issue WAKE interrupt to GT9XX to change the GT9XX from Hibernate to
|
||||
* Active mode.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void imxrt_gt9xx_wakeup(FAR const struct gt9xx_config_s *config)
|
||||
{
|
||||
/* We do not have access to the WAKE pin in the implementation */
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: imxrt_gt9xx_nreset
|
||||
*
|
||||
* Description:
|
||||
* Control the chip reset pin (active low)
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void imxrt_gt9xx_nreset(FAR const struct gt9xx_config_s *config,
|
||||
bool nstate)
|
||||
{
|
||||
imxrt_gpio_write(GPIO_GT9XX_CTRSTN, nstate);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
#define IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_MASK (0x7U)
|
||||
#define IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_SHIFT (0U)
|
||||
|
||||
#define IOMUXC_SW_MUX_CTL_PAD_MUX_MODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_SHIFT)) & IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_MASK)
|
||||
#define IOMUXC_SW_MUX_CTL_PAD_SION_MASK (0x10U)
|
||||
#define IOMUXC_SW_MUX_CTL_PAD_SION_SHIFT (4U)
|
||||
|
||||
#define IOMUXC_SW_MUX_CTL_PAD_SION(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_MUX_CTL_PAD_SION_SHIFT)) & IOMUXC_SW_MUX_CTL_PAD_SION_MASK)
|
||||
|
||||
#define IOMUXC_GPIO_B1_14_GPIO2_IO30 0x401F81B4U, 0x5U, 0, 0, 0x401F83A4U
|
||||
|
||||
static inline void IOMUXC_SetPinMux(uint32_t muxRegister,
|
||||
uint32_t muxMode,
|
||||
uint32_t inputRegister,
|
||||
uint32_t inputDaisy,
|
||||
uint32_t configRegister,
|
||||
uint32_t inputOnfield)
|
||||
{
|
||||
*((volatile uint32_t *)muxRegister) =
|
||||
IOMUXC_SW_MUX_CTL_PAD_MUX_MODE(muxMode) | IOMUXC_SW_MUX_CTL_PAD_SION(inputOnfield);
|
||||
|
||||
if (inputRegister)
|
||||
{
|
||||
*((volatile uint32_t *)inputRegister) = inputDaisy;
|
||||
}
|
||||
}
|
||||
|
||||
static inline void IOMUXC_SetPinConfig(uint32_t muxRegister,
|
||||
uint32_t muxMode,
|
||||
uint32_t inputRegister,
|
||||
uint32_t inputDaisy,
|
||||
uint32_t configRegister,
|
||||
uint32_t configValue)
|
||||
{
|
||||
if (configRegister)
|
||||
{
|
||||
*((volatile uint32_t *)configRegister) = configValue;
|
||||
}
|
||||
}
|
||||
|
||||
void imxrt_config_gt9xx_pins(void)
|
||||
{
|
||||
IOMUXC_SetPinMux(
|
||||
IOMUXC_GPIO_B1_14_GPIO2_IO30, /* WAKEUP is configured as GPIO5_IO00 */
|
||||
0U); /* Software Input On Field: Input Path is determined by functionality */
|
||||
|
||||
IOMUXC_SetPinConfig(
|
||||
IOMUXC_GPIO_B1_14_GPIO2_IO30,
|
||||
0x10B0u);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: imxrt_gt9xx_register
|
||||
*
|
||||
* Description:
|
||||
* Register the GT9XX touch panel driver
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int imxrt_gt9xx_register(void)
|
||||
{
|
||||
FAR struct i2c_master_s *i2c;
|
||||
int ret;
|
||||
|
||||
/* Initialize CTRSTN pin */
|
||||
imxrt_config_gpio(GPIO_GT9XX_CTRSTN);
|
||||
imxrt_gpio_write(GPIO_GT9XX_CTRSTN, false);
|
||||
|
||||
#ifndef CONFIG_GT9XX_POLLMODE
|
||||
int irq;
|
||||
|
||||
/* Initialize GPIO interrupt pin. */
|
||||
imxrt_config_gpio(GPIO_GT9XX_CTINTN);
|
||||
|
||||
irq = GPIO_GT9XX_INTR;
|
||||
DEBUGASSERT(irq > 0 && irq < UINT8_MAX);
|
||||
g_gt9xx_irq = (uint8_t)irq;
|
||||
|
||||
/* Make sure that the interrupt is disabled at the NVIC */
|
||||
imxrt_gpioirq_disable(irq);
|
||||
up_disable_irq(irq);
|
||||
#endif
|
||||
|
||||
/* Take the GT9XX out of reset */
|
||||
|
||||
/* The GT9XX is on LPI2C1. Get the handle and register the GT9XX device */
|
||||
|
||||
i2c = imxrt_i2cbus_initialize(1);
|
||||
if (i2c == NULL)
|
||||
{
|
||||
syslog(LOG_ERR, "ERROR: Failed to get LPI2C1 interface\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
else
|
||||
{
|
||||
ret = gt9xx_register(i2c, &g_gt9xx_config, 0);
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR, "ERROR: Failed to register GT9XX driver: %d\n", ret);
|
||||
imxrt_gpio_write(GPIO_GT9XX_CTRSTN, false);
|
||||
imxrt_i2cbus_uninitialize(i2c);
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_INPUT_GT9XX*/
|
||||
|
|
@ -0,0 +1,27 @@
|
|||
/*
|
||||
* Copyright (c) 2022 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file imxrt_gt9xx.h
|
||||
* @brief API for imxrt gt9xx.
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2022.5.31
|
||||
*/
|
||||
|
||||
#ifndef __IMXRT_GT9XX_H_
|
||||
#define __IMXRT_GT9XX_H_
|
||||
|
||||
int imxrt_gt9xx_register(void);
|
||||
|
||||
#endif /* __IMXRT_GT9XX_H__ */
|
||||
|
||||
|
|
@ -0,0 +1,61 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file imxrt_reset.c
|
||||
* @brief imxrt board sd card automount
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2022.04.29
|
||||
*/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include <nuttx/board.h>
|
||||
#include <nuttx/arch.h>
|
||||
|
||||
#ifdef CONFIG_BOARDCTL_RESET
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: board_reset
|
||||
*
|
||||
* Description:
|
||||
* Reset board. Support for this function is required by board-level
|
||||
* logic if CONFIG_BOARDCTL_RESET is selected.
|
||||
*
|
||||
* Input Parameters:
|
||||
* status - Status information provided with the reset event. This
|
||||
* meaning of this status information is board-specific. If not
|
||||
* used by a board, the value zero may be provided in calls to
|
||||
* board_reset().
|
||||
*
|
||||
* Returned Value:
|
||||
* If this function returns, then it was not possible to power-off the
|
||||
* board due to some constraints. The return value int this case is a
|
||||
* board-specific reason for the failure to shutdown.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int board_reset(int status)
|
||||
{
|
||||
up_systemreset();
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_BOARDCTL_RESET */
|
||||
|
|
@ -587,6 +587,11 @@ config NSH_DISABLE_XD
|
|||
bool "Disable xd"
|
||||
default y if DEFAULT_SMALL
|
||||
default n if !DEFAULT_SMALL
|
||||
|
||||
config NSH_DISABLE_CH438
|
||||
bool "Disable the ch438 demo."
|
||||
default n
|
||||
|
||||
config NSH_DISABLE_HCHO_TB600B_WQ_HCHO1OS
|
||||
bool "Disable the sensor tb600b_wq_hcho1os."
|
||||
default n
|
||||
|
|
@ -659,6 +664,22 @@ config NSH_DISABLE_ADAPTER_4GTEST
|
|||
bool "Disable ec200t Adapter4GTest."
|
||||
default n
|
||||
|
||||
config NSH_DISABLE_E220_LORA_RECEIVE
|
||||
bool "Disable e220 Lora receive."
|
||||
default n
|
||||
|
||||
config NSH_DISABLE_E220_LORA_SEND
|
||||
bool "Disable e220 Lora send."
|
||||
default n
|
||||
|
||||
config NSH_DISABLE_ADAPTER_BLUETOOTH_TEST
|
||||
bool "Disable hc08 AdapterBlueToothTest."
|
||||
default n
|
||||
|
||||
config NSH_DISABLE_ADAPTER_WIFI_TEST
|
||||
bool "Disable esp07s AdapterWIFITest."
|
||||
default n
|
||||
|
||||
config NSH_DISABLE_K210_FFT
|
||||
bool "Disable the K210 fft device."
|
||||
default n
|
||||
|
|
|
|||
|
|
@ -1417,6 +1417,10 @@ int nsh_foreach_var(FAR struct nsh_vtbl_s *vtbl, nsh_foreach_var_t cb,
|
|||
FAR void *arg);
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BSP_USING_CH438) && !defined(CONFIG_NSH_DISABLE_CH438)
|
||||
int cmd_Ch438(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv);
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_APPLICATION_SENSOR_HCHO_TB600B_WQ_HCHO1OS) && !defined(CONFIG_NSH_DISABLE_HCHO_TB600B_WQ_HCHO1OS)
|
||||
int cmd_Hcho1os(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv);
|
||||
#endif
|
||||
|
|
@ -1482,7 +1486,7 @@ int nsh_foreach_var(FAR struct nsh_vtbl_s *vtbl, nsh_foreach_var_t cb,
|
|||
int cmd_recvzigbee(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv);
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ADAPTER_SX1278) && !defined(CONFIG_NSH_DISABLE_ADAPTER_LORATEST)
|
||||
#if (defined(CONFIG_ADAPTER_LORA_SX1278) || defined(CONFIG_ADAPTER_LORA_E220)) && !defined(CONFIG_NSH_DISABLE_ADAPTER_LORATEST)
|
||||
int cmd_AdapterLoraTest(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv);
|
||||
#endif
|
||||
|
||||
|
|
@ -1490,6 +1494,22 @@ int nsh_foreach_var(FAR struct nsh_vtbl_s *vtbl, nsh_foreach_var_t cb,
|
|||
int cmd_Adapter4GTest(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv);
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ADAPTER_LORA_E220) && !defined(CONFIG_NSH_DISABLE_E220_LORA_RECEIVE)
|
||||
int cmd_E220LoraReceive(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv);
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ADAPTER_LORA_E220) && !defined(CONFIG_NSH_DISABLE_E220_LORA_SEND)
|
||||
int cmd_E220LoraSend(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv);
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ADAPTER_BLUETOOTH_HC08) && !defined(CONFIG_NSH_DISABLE_ADAPTER_BLUETOOTH_TEST)
|
||||
int cmd_AdapterBlueToothTest(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv);
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ADAPTER_ESP07S_WIFI) && !defined(CONFIG_NSH_DISABLE_ADAPTER_WIFI_TEST)
|
||||
int cmd_AdapterWifiTest(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv);
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_K210_FFT_TEST) && !defined(CONFIG_NSH_DISABLE_K210_FFT)
|
||||
int cmd_fft(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv);
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -36,7 +36,18 @@
|
|||
#include "nsh.h"
|
||||
#include "nsh_console.h"
|
||||
|
||||
extern int FrameworkInit(void);
|
||||
/****************************************************************************
|
||||
* Name: cmd_Ch438
|
||||
****************************************************************************/
|
||||
#if defined(CONFIG_BSP_USING_CH438) && !defined(CONFIG_NSH_DISABLE_CH438)
|
||||
extern void CH438Demo(void);
|
||||
int cmd_Ch438(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv)
|
||||
{
|
||||
nsh_output(vtbl, "Hello, world!\n");
|
||||
CH438Demo();
|
||||
return OK;
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: cmd_Hcho1os
|
||||
|
|
@ -272,7 +283,18 @@ int cmd_recvzigbee(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv)
|
|||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ADAPTER_SX1278) && !defined(CONFIG_NSH_DISABLE_ADAPTER_LORATEST)
|
||||
#if defined(CONFIG_ADAPTER_ESP07S_WIFI) && !defined(CONFIG_NSH_DISABLE_ADAPTER_WIFI_TEST)
|
||||
extern int AdapterWifiTest(int argc, char *argv[]);
|
||||
int cmd_AdapterWifiTest(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv)
|
||||
{
|
||||
nsh_output(vtbl, "Hello, world!\n");
|
||||
FrameworkInit();
|
||||
AdapterWifiTest(argc, argv);
|
||||
return OK;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if (defined(CONFIG_ADAPTER_LORA_SX1278) || defined(CONFIG_ADAPTER_LORA_E220)) && !defined(CONFIG_NSH_DISABLE_ADAPTER_LORATEST)
|
||||
extern int AdapterLoraTest(void);
|
||||
int cmd_AdapterLoraTest(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv)
|
||||
{
|
||||
|
|
@ -294,6 +316,39 @@ int cmd_Adapter4GTest(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv)
|
|||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ADAPTER_LORA_E220) && !defined(CONFIG_NSH_DISABLE_E220_LORA_RECEIVE)
|
||||
void E220LoraReceive(void);
|
||||
int cmd_E220LoraReceive(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv)
|
||||
{
|
||||
nsh_output(vtbl, "Hello, world!\n");
|
||||
FrameworkInit();
|
||||
E220LoraReceive();
|
||||
return OK;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ADAPTER_LORA_E220) && !defined(CONFIG_NSH_DISABLE_E220_LORA_SEND)
|
||||
extern void E220LoraSend(int argc, char *argv[]);
|
||||
int cmd_E220LoraSend(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv)
|
||||
{
|
||||
nsh_output(vtbl, "Hello, world!\n");
|
||||
FrameworkInit();
|
||||
E220LoraSend(argc,argv);
|
||||
return OK;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ADAPTER_BLUETOOTH_HC08) && !defined(CONFIG_NSH_DISABLE_ADAPTER_BLUETOOTH_TEST)
|
||||
extern int AdapterBlueToothTest(void);
|
||||
int cmd_AdapterBlueToothTest(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv)
|
||||
{
|
||||
nsh_output(vtbl, "Hello, world!\n");
|
||||
FrameworkInit();
|
||||
AdapterBlueToothTest();
|
||||
return OK;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_K210_FFT_TEST) && !defined(CONFIG_NSH_DISABLE_K210_FFT)
|
||||
extern void nuttx_k210_fft_test(void);
|
||||
int cmd_fft(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv)
|
||||
|
|
|
|||
|
|
@ -590,6 +590,10 @@ static const struct cmdmap_s g_cmdmap[] =
|
|||
{ "xd", cmd_xd, 3, 3, "<hex-address> <byte-count>" },
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BSP_USING_CH438) && !defined(CONFIG_NSH_DISABLE_CH438)
|
||||
{ "ch438", cmd_Ch438, 1, 1, "[ch438 demo cmd.]" },
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_APPLICATION_SENSOR_HCHO_TB600B_WQ_HCHO1OS) && !defined(CONFIG_NSH_DISABLE_HCHO_TB600B_WQ_HCHO1OS)
|
||||
{ "hcho1os", cmd_Hcho1os, 1, 1, "[get the concentration of formaldehyde with sensor tb600b_wq_hcho1os.]" },
|
||||
#endif
|
||||
|
|
@ -654,7 +658,7 @@ static const struct cmdmap_s g_cmdmap[] =
|
|||
{ "recvzigbee", cmd_recvzigbee, 1, 1, "[receive message.]" },
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ADAPTER_SX1278) && !defined(CONFIG_NSH_DISABLE_ADAPTER_LORATEST)
|
||||
#if (defined(CONFIG_ADAPTER_LORA_SX1278) || defined(CONFIG_ADAPTER_LORA_E220)) && !defined(CONFIG_NSH_DISABLE_ADAPTER_LORATEST)
|
||||
{ "AdapterLoraTest", cmd_AdapterLoraTest, 1, 1, "[Lora sx128 test.]" },
|
||||
#endif
|
||||
|
||||
|
|
@ -662,6 +666,22 @@ static const struct cmdmap_s g_cmdmap[] =
|
|||
{ "Adapter4GTest", cmd_Adapter4GTest, 1, 1, "[4G ec200t test.]" },
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ADAPTER_LORA_E220) && !defined(CONFIG_NSH_DISABLE_E220_LORA_RECEIVE)
|
||||
{ "E220Receive", cmd_E220LoraReceive, 1, 1, "[e220 lora receive.]" },
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ADAPTER_LORA_E220) && !defined(CONFIG_NSH_DISABLE_E220_LORA_SEND)
|
||||
{ "E220Send", cmd_E220LoraSend, 1, 2, "[e220loraSend <message>]" },
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ADAPTER_BLUETOOTH_HC08) && !defined(CONFIG_NSH_DISABLE_ADAPTER_BLUETOOTH_TEST)
|
||||
{ "AdapterBlueToothTest", cmd_AdapterBlueToothTest, 1, 1, "[BlueTooth hc08 test.]" },
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ADAPTER_ESP07S_WIFI) && !defined(CONFIG_NSH_DISABLE_ADAPTER_WIFI_TEST)
|
||||
{ "wifitest", cmd_AdapterWifiTest, 1, 8, "[WIFI test.]" },
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_K210_FFT_TEST) && !defined(CONFIG_NSH_DISABLE_K210_FFT)
|
||||
{ "fft", cmd_fft, 1, 1, "[K210 fft function.]" },
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -1812,6 +1812,38 @@ config DEBUG_VIDEO_INFO
|
|||
Enable video informational output to SYSLOG.
|
||||
|
||||
endif # DEBUG_VIDEO
|
||||
|
||||
config DEBUG_CH438
|
||||
bool "CH438 Debug Features"
|
||||
default n
|
||||
---help---
|
||||
Enable CH438 debug features.
|
||||
|
||||
if DEBUG_CH438
|
||||
|
||||
config DEBUG_CH438_ERROR
|
||||
bool "CH438 Error Output"
|
||||
default n
|
||||
depends on DEBUG_ERROR
|
||||
---help---
|
||||
Enable CH438 error output to SYSLOG.
|
||||
|
||||
config DEBUG_CH438_WARN
|
||||
bool "CH438 Warnings Output"
|
||||
default n
|
||||
depends on DEBUG_WARN
|
||||
---help---
|
||||
Enable CH438 warning output to SYSLOG.
|
||||
|
||||
config DEBUG_CH438_INFO
|
||||
bool "CH438 Informational Output"
|
||||
default n
|
||||
depends on DEBUG_INFO
|
||||
---help---
|
||||
Enable CH438 informational output to SYSLOG.
|
||||
|
||||
endif # DEBUG_CH438
|
||||
|
||||
endif # DEBUG_FEATURES
|
||||
|
||||
config ARCH_HAVE_STACKCHECK
|
||||
|
|
|
|||
|
|
@ -0,0 +1,570 @@
|
|||
#
|
||||
# For a description of the syntax of this configuration file,
|
||||
# see the file kconfig-language.txt in the NuttX tools repository.
|
||||
#
|
||||
|
||||
menuconfig INPUT
|
||||
bool "Input Device Support"
|
||||
default n
|
||||
---help---
|
||||
This directory holds implementations of input device drivers.
|
||||
This includes such things as touchscreen and keypad drivers.
|
||||
See include/nuttx/input/*.h for registration information.
|
||||
|
||||
if INPUT
|
||||
|
||||
config INPUT_MOUSE
|
||||
bool "Enable mouse support"
|
||||
default n
|
||||
---help---
|
||||
Enable support for mouse devices.
|
||||
|
||||
if INPUT_MOUSE
|
||||
|
||||
config INPUT_MOUSE_WHEEL
|
||||
bool "Enable mouse wheel support"
|
||||
default n
|
||||
---help---
|
||||
Enable support for a 4-button mouse report that includes a while
|
||||
position.
|
||||
|
||||
endif # INPUT_MOUSE
|
||||
|
||||
config INPUT_TOUCHSCREEN
|
||||
bool
|
||||
default n
|
||||
|
||||
config INPUT_MAX11802
|
||||
bool "MAX11802 touchscreen controller"
|
||||
default n
|
||||
select SPI
|
||||
select INPUT_TOUCHSCREEN
|
||||
---help---
|
||||
Enable support for the MAX11802 touchscreen controller
|
||||
|
||||
config INPUT_TSC2007
|
||||
bool "TI TSC2007 touchscreen controller"
|
||||
default n
|
||||
select I2C
|
||||
select INPUT_TOUCHSCREEN
|
||||
---help---
|
||||
Enable support for the TI TSC2007 touchscreen controller
|
||||
|
||||
if INPUT_TSC2007
|
||||
|
||||
config TSC2007_8BIT
|
||||
bool "TSC2007 8-bit Conversions"
|
||||
default n
|
||||
---help---
|
||||
Use faster, but less accurate, 8-bit conversions. Default: 12-bit conversions.
|
||||
|
||||
config TSC2007_MULTIPLE
|
||||
bool "Multiple TSC2007 Devices"
|
||||
default n
|
||||
---help---
|
||||
Can be defined to support multiple TSC2007 devices on board.
|
||||
|
||||
config TSC2007_NPOLLWAITERS
|
||||
int "Number TSC2007 poll waiters"
|
||||
default 4
|
||||
---help---
|
||||
Maximum number of threads that can be waiting on poll()
|
||||
|
||||
endif # INPUT_TSC2007
|
||||
|
||||
config INPUT_FT5X06
|
||||
bool "FocalTech FT5x06 multi-touch, capacitive touch panel controller"
|
||||
default n
|
||||
select I2C
|
||||
select INPUT_TOUCHSCREEN
|
||||
---help---
|
||||
Enable support for the FocalTech FT5x06 multi-touch, capacitive
|
||||
touch panel controller
|
||||
|
||||
config INPUT_GT9XX
|
||||
bool "Goodix GT9XX touch panel controller"
|
||||
default n
|
||||
select I2C
|
||||
select INPUT_TOUCHSCREEN
|
||||
---help---
|
||||
Enable support for the Goodix GT9XX multi-touch, capacitive
|
||||
touch panel controller
|
||||
|
||||
config INPUT_FT5336
|
||||
bool "FocalTech FT5336 multi-touch, capacitive touch panel controller"
|
||||
default n
|
||||
select I2C
|
||||
select INPUT_FT5X06
|
||||
select INPUT_TOUCHSCREEN
|
||||
depends on EXPERIMENTAL
|
||||
---help---
|
||||
Enable support for the FocalTech FT5x06 multi-touch, capacitive
|
||||
touch panel controller
|
||||
|
||||
if INPUT_FT5X06
|
||||
|
||||
config FT5X06_POLLMODE
|
||||
bool "Polled mode"
|
||||
default n
|
||||
---help---
|
||||
Run the FT5x06 in a non-interrupt driven polled mode. Events will
|
||||
not be driven by interrupts but rather based on a timed poll.
|
||||
|
||||
This is a non-optimal design both because (1) it will lead to delays
|
||||
in detecting touch related events and (2) it will consume a
|
||||
significant amount of CPU time to perform the polling.
|
||||
|
||||
config FT5X06_SWAPXY
|
||||
bool "Swap X/Y"
|
||||
default n
|
||||
---help---
|
||||
Reverse the meaning of X and Y to handle different LCD orientations.
|
||||
|
||||
config FT5X06_SINGLEPOINT
|
||||
bool "Single point"
|
||||
default n
|
||||
---help---
|
||||
Do no report multi-touch events
|
||||
|
||||
if FT5X06_SINGLEPOINT
|
||||
|
||||
config FT5X06_THRESHX
|
||||
int "X threshold"
|
||||
default 12
|
||||
---help---
|
||||
New touch positions will only be reported when the X or Y data changes by these
|
||||
thresholds. This trades reduced data rates for some loss in dragging accuracy. For
|
||||
12-bit values the raw ranges are 0-4095. So for example, if your display is
|
||||
320x240, then THRESHX=13 and THRESHY=17 would correspond to one pixel. Default: 12
|
||||
|
||||
config FT5X06_THRESHY
|
||||
int "Y threshold"
|
||||
default 12
|
||||
---help---
|
||||
New touch positions will only be reported when the X or Y data changes by these
|
||||
thresholds. This trades reduced data rates for some loss in dragging accuracy. For
|
||||
12-bit values the raw ranges are 0-4095. So for example, if your display is
|
||||
320x240, then THRESHX=13 and THRESHY=17 would correspond to one pixel. Default: 12
|
||||
|
||||
endif # FT5X06_SINGLEPOINT
|
||||
|
||||
config FT5X06_NPOLLWAITERS
|
||||
int "Number FT5336/FT5x06 poll waiters"
|
||||
default 4
|
||||
---help---
|
||||
Maximum number of threads that can be waiting on poll()
|
||||
|
||||
endif # INPUT_FT5X06
|
||||
|
||||
config INPUT_ADS7843E
|
||||
bool "TI ADS7843/TSC2046 touchscreen controller"
|
||||
default n
|
||||
select SPI
|
||||
select INPUT_TOUCHSCREEN
|
||||
---help---
|
||||
Enable support for the TI/Burr-Brown ADS7842 touchscreen controller. I believe
|
||||
that driver should be compatible with the TI/Burr-Brown TSC2046 and XPT2046
|
||||
touchscreen controllers as well.
|
||||
|
||||
if INPUT_ADS7843E
|
||||
|
||||
config ADS7843E_MULTIPLE
|
||||
bool "Multiple ADS7843E Devices"
|
||||
default n
|
||||
---help---
|
||||
Can be defined to support multiple ADS7843E devices on board.
|
||||
|
||||
config ADS7843E_NPOLLWAITERS
|
||||
int "Number poll waiters"
|
||||
default 4
|
||||
---help---
|
||||
Maximum number of threads that can be waiting on poll()
|
||||
|
||||
config ADS7843E_SPIDEV
|
||||
int "SPI bus number"
|
||||
default 0
|
||||
---help---
|
||||
Selects the SPI bus number identifying that SPI interface that
|
||||
connects the ADS843E to the MCU.
|
||||
|
||||
config ADS7843E_DEVMINOR
|
||||
int "Input device minor number"
|
||||
default 0
|
||||
---help---
|
||||
The ADS7843E device will be registered as /dev/inputN where N is the
|
||||
value provided by this setting.
|
||||
|
||||
config ADS7843E_SPIMODE
|
||||
int "SPI mode"
|
||||
default 0
|
||||
range 0 3
|
||||
---help---
|
||||
Controls the SPI mode. The device should work in mode 0, but
|
||||
sometimes you need to experiment.
|
||||
|
||||
config ADS7843E_FREQUENCY
|
||||
int "SPI frequency"
|
||||
default 100000
|
||||
---help---
|
||||
Define to use a different SPI bus frequency.
|
||||
|
||||
config ADS7843E_SWAPXY
|
||||
bool "Swap X/Y"
|
||||
default n
|
||||
---help---
|
||||
Reverse the meaning of X and Y to handle different LCD orientations.
|
||||
|
||||
config ADS7843E_THRESHX
|
||||
int "X threshold"
|
||||
default 12
|
||||
---help---
|
||||
New touch positions will only be reported when the X or Y data changes by these
|
||||
thresholds. This trades reduced data rates for some loss in dragging accuracy. For
|
||||
12-bit values the raw ranges are 0-4095. So for example, if your display is
|
||||
320x240, then THRESHX=13 and THRESHY=17 would correspond to one pixel. Default: 12
|
||||
|
||||
config ADS7843E_THRESHY
|
||||
int "Y threshold"
|
||||
default 12
|
||||
---help---
|
||||
New touch positions will only be reported when the X or Y data changes by these
|
||||
thresholds. This trades reduced data rates for some loss in dragging accuracy. For
|
||||
12-bit values the raw ranges are 0-4095. So for example, if your display is
|
||||
320x240, then THRESHX=13 and THRESHY=17 would correspond to one pixel. Default: 12
|
||||
|
||||
endif # INPUT_ADS7843E
|
||||
|
||||
config INPUT_MXT
|
||||
bool "Atmel maXTouch Driver"
|
||||
select INPUT_TOUCHSCREEN
|
||||
default n
|
||||
---help---
|
||||
Enables support for the Atmel maXTouch driver
|
||||
|
||||
if INPUT_MXT
|
||||
|
||||
config MXT_THRESHX
|
||||
int "X threshold"
|
||||
default 5
|
||||
---help---
|
||||
New touch positions will only be reported when the X or Y data
|
||||
changes by these thresholds. This trades reduced data rates for some
|
||||
loss in dragging accuracy. For 12-bit values the raw ranges are
|
||||
0-4095. So for example, if your display is 800x480, then THRESHX=5
|
||||
and THRESHY=8 would correspond to a one pixel change. Default: 5
|
||||
|
||||
NOTE: This does nothing to reduce the interrupt rate. It only
|
||||
reduces the rate at which touch events are reports.
|
||||
|
||||
config MXT_THRESHY
|
||||
int "Y threshold"
|
||||
default 8
|
||||
---help---
|
||||
New touch positions will only be reported when the X or Y data
|
||||
changes by these thresholds. This trades reduced data rates for some
|
||||
loss in dragging accuracy. For 12-bit values the raw ranges are
|
||||
0-4095. So for example, if your display is 800x480, then THRESHX=5
|
||||
and THRESHY=8 would correspond to a one pixel change. Default: 8
|
||||
|
||||
NOTE: This does nothing to reduce the interrupt rate. It only
|
||||
reduces the rate at which touch events are reports.
|
||||
|
||||
config MXT_NPOLLWAITERS
|
||||
int "Number poll waiters"
|
||||
default 4
|
||||
---help---
|
||||
Maximum number of threads that can be waiting on poll()
|
||||
|
||||
config MXT_DISABLE_CONFIG_DEBUG_INFO
|
||||
bool "Disable verbose debug output"
|
||||
default y
|
||||
depends on DEBUG_INPUT_INFO
|
||||
---help---
|
||||
The maXTouch tends to generate interrupts at a high rate during the
|
||||
contact. If verbose debug is enabled in this driver, you may not
|
||||
be able to get anything done because of the high debug output rate.
|
||||
|
||||
This setting will allow you to keep verbose touchscreen debug output
|
||||
in other modules, but to specifically suppress the debug out from
|
||||
the MXT driver. Debug (non-verbose) errors will still be generated,
|
||||
but the chit-chat level will be eliminated.
|
||||
|
||||
endif # INPUT_MXT
|
||||
|
||||
config INPUT_STMPE811
|
||||
bool "STMicro STMPE811 Driver"
|
||||
default n
|
||||
select INPUT_TOUCHSCREEN
|
||||
---help---
|
||||
Enables support for the STMPE811 driver
|
||||
|
||||
if INPUT_STMPE811
|
||||
|
||||
choice
|
||||
prompt "STMPE Interface"
|
||||
default STMPE811_I2C
|
||||
|
||||
config STMPE811_SPI
|
||||
bool "SPI Interface"
|
||||
select SPI
|
||||
---help---
|
||||
Enables support for the SPI interface (not currently supported)
|
||||
|
||||
config STMPE811_I2C
|
||||
bool "STMPE811 I2C Interface"
|
||||
select I2C
|
||||
---help---
|
||||
Enables support for the I2C interface
|
||||
|
||||
endchoice
|
||||
|
||||
config STMPE811_ACTIVELOW
|
||||
bool "Active Low Interrupt"
|
||||
default n
|
||||
---help---
|
||||
The STMPE811 interrupt is provided by a discrete input (usually a
|
||||
GPIO interrupt on most MCU architectures). This setting determines
|
||||
whether the interrupt is active high (or rising edge triggered) or
|
||||
active low (or falling edge triggered). Default: Active
|
||||
high/rising edge.
|
||||
|
||||
config STMPE811_EDGE
|
||||
bool "Edge triggered Interrupt"
|
||||
default n
|
||||
---help---
|
||||
The STMPE811 interrupt is provided by a discrete input (usually a
|
||||
GPIO interrupt on most MCU architectures). This setting determines
|
||||
whether the interrupt is edge or level triggered. Default: Level
|
||||
triggered.
|
||||
|
||||
config STMPE811_MULTIPLE
|
||||
bool "Multiple STMPE811 Devices"
|
||||
default n
|
||||
---help---
|
||||
Can be defined to support multiple STMPE811 devices on board.
|
||||
|
||||
config STMPE811_NPOLLWAITERS
|
||||
int "Number poll waiters"
|
||||
default 4
|
||||
---help---
|
||||
Maximum number of threads that can be waiting on poll()
|
||||
|
||||
config STMPE811_TSC_DISABLE
|
||||
bool "Disable STMPE811 Touchscreen Support"
|
||||
default n
|
||||
---help---
|
||||
Disable driver touchscreen functionality.
|
||||
|
||||
config STMPE811_SWAPXY
|
||||
bool "Swap X/Y"
|
||||
default n
|
||||
depends on !STMPE811_TSC_DISABLE
|
||||
---help---
|
||||
Reverse the meaning of X and Y to handle different LCD orientations.
|
||||
|
||||
config STMPE811_THRESHX
|
||||
int "X threshold"
|
||||
default 12
|
||||
depends on !STMPE811_TSC_DISABLE
|
||||
---help---
|
||||
STMPE811 touchscreen data comes in a a very high rate. New touch positions
|
||||
will only be reported when the X or Y data changes by these thresholds.
|
||||
This trades reduced data rates for some loss in dragging accuracy. The
|
||||
STMPE811 is configure for 12-bit values the raw ranges are 0-4095. So
|
||||
for example, if your display is 320x240, then THRESHX=13 and THRESHY=17
|
||||
would correspond to one pixel. Default: 12
|
||||
|
||||
config STMPE811_THRESHY
|
||||
int "Y threshold"
|
||||
default 12
|
||||
depends on !STMPE811_TSC_DISABLE
|
||||
---help---
|
||||
STMPE811 touchscreen data comes in a a very high rate. New touch positions
|
||||
will only be reported when the X or Y data changes by these thresholds.
|
||||
This trades reduced data rates for some loss in dragging accuracy. The
|
||||
STMPE811 is configure for 12-bit values the raw ranges are 0-4095. So
|
||||
for example, if your display is 320x240, then THRESHX=13 and THRESHY=17
|
||||
would correspond to one pixel. Default: 12
|
||||
|
||||
config STMPE811_ADC_DISABLE
|
||||
bool "Disable STMPE811 ADC Support"
|
||||
default y
|
||||
---help---
|
||||
Disable driver ADC functionality.
|
||||
|
||||
config STMPE811_GPIO_DISABLE
|
||||
bool "Disable STMPE811 GPIO Support"
|
||||
default y
|
||||
---help---
|
||||
Disable driver GPIO functionality.
|
||||
|
||||
config STMPE811_GPIOINT_DISABLE
|
||||
bool "Disable STMPE811 GPIO Interrupt Support"
|
||||
default y
|
||||
depends on !STMPE811_GPIO_DISABLE
|
||||
---help---
|
||||
Disable driver GPIO interrupt functionality (ignored if GPIO functionality is
|
||||
disabled).
|
||||
|
||||
config STMPE811_TEMP_DISABLE
|
||||
bool "Disable STMPE811 Temperature Sensor Support"
|
||||
default y
|
||||
---help---
|
||||
Disable driver temperature sensor functionality.
|
||||
|
||||
config STMPE811_REGDEBUG
|
||||
bool "Enable Register-Level STMPE811 Debug"
|
||||
default n
|
||||
depends on DEBUG_FEATURES
|
||||
---help---
|
||||
Enable very low register-level debug output.
|
||||
|
||||
endif # INPUT_STMPE811
|
||||
|
||||
config INPUT_CYPRESS_MBR3108
|
||||
bool "Enable Cypress MBR3108 CapSense driver"
|
||||
default n
|
||||
select INPUT_TOUCHSCREEN
|
||||
---help---
|
||||
Enable support for Cypress MBR3108 CapSense touch button & proximity
|
||||
input sensor.
|
||||
|
||||
if INPUT_CYPRESS_MBR3108
|
||||
|
||||
config INPUT_CYPRESS_MBR3108_DEBUG
|
||||
bool "Enable debug support for Cypress sensor"
|
||||
default n
|
||||
depends on DEBUG_FEATURES
|
||||
---help---
|
||||
Enable debugging traces for MBR3108 driver
|
||||
|
||||
config INPUT_CYPRESS_MBR3108_NPOLLWAITERS
|
||||
int "Number of waiters to poll"
|
||||
default 1
|
||||
---help---
|
||||
Maximum number of threads that can be waiting on poll()
|
||||
|
||||
endif # INPUT_CYPRESS_MBR3108
|
||||
|
||||
config INPUT_BUTTONS
|
||||
bool "Button Inputs"
|
||||
default n
|
||||
---help---
|
||||
Enable standard button upper half driver.
|
||||
|
||||
if INPUT_BUTTONS
|
||||
|
||||
config INPUT_BUTTONS_LOWER
|
||||
bool "Generic Lower Half Button Driver"
|
||||
default n
|
||||
depends on ARCH_BUTTONS && ARCH_IRQBUTTONS
|
||||
---help---
|
||||
If the board supports the standard button interfaces as
|
||||
defined in include/nuttx/board.h header file, then this
|
||||
standard button lower half driver might be usable.
|
||||
|
||||
In order for this generic driver to be usable:
|
||||
|
||||
1. The board implementation must provide the button
|
||||
interfaces as defined in include/nuttx/board.h
|
||||
2. The board implementation must support interrupts for each
|
||||
button.
|
||||
|
||||
If your board does not meet these requirements, then the
|
||||
button_lower.c file can still be copied to your your
|
||||
board src/ directory and modified for your specific board
|
||||
requirements.
|
||||
|
||||
config INPUT_BUTTONS_NPOLLWAITERS
|
||||
int "Max Number of Poll Waiters"
|
||||
default 2
|
||||
|
||||
endif # INPUT_BUTTONS
|
||||
|
||||
config INPUT_DJOYSTICK
|
||||
bool "Discrete Joystick"
|
||||
default n
|
||||
---help---
|
||||
Enable standard discrete joystick upper half driver. A discrete
|
||||
joystick refers to a joystick that could be implemented entirely
|
||||
with GPIO input pins. So up, down, left, and right are all discrete
|
||||
values like buttons (as opposed to integer values like you might
|
||||
obtain from an analog joystick).
|
||||
|
||||
if INPUT_DJOYSTICK
|
||||
|
||||
config INPUT_DJOYSTICK_NPOLLWAITERS
|
||||
int "Max Number of Poll Waiters"
|
||||
default 2
|
||||
|
||||
endif # INPUT_DJOYSTICK
|
||||
|
||||
config INPUT_AJOYSTICK
|
||||
bool "Analog Joystick"
|
||||
default n
|
||||
---help---
|
||||
Enable standard analog joystick upper half driver. An analog
|
||||
joystick refers to a joystick that provides position data as an
|
||||
integer value that might have been obtained through Analog-
|
||||
to-Digital Conversion (ADC). The analog positional data may also
|
||||
be accompanied by discrete button data.
|
||||
|
||||
if INPUT_AJOYSTICK
|
||||
|
||||
config INPUT_AJOYSTICK_NPOLLWAITERS
|
||||
int "Max Number of Poll Waiters"
|
||||
default 2
|
||||
|
||||
endif # INPUT_AJOYSTICK
|
||||
|
||||
config INPUT_NUNCHUCK
|
||||
bool "Nintendo Wii Nunchuck Joystick (White Model)"
|
||||
default n
|
||||
select I2C
|
||||
---help---
|
||||
Enable a Nintendo Wii Nunchuck joystick upper half driver. The
|
||||
nunchuck joystick provides position data as an integer value.The
|
||||
analog positional data may also be accompanied by discrete
|
||||
button data.
|
||||
|
||||
if INPUT_NUNCHUCK
|
||||
|
||||
config NUNCHUCK_NPOLLWAITERS
|
||||
int "Max Number of Poll Waiters"
|
||||
default 2
|
||||
|
||||
endif # INPUT_NUNCHUCK
|
||||
|
||||
config INPUT_SPQ10KBD
|
||||
bool "Solder Party Q10 BlackBerry Keyboard"
|
||||
default n
|
||||
select I2C
|
||||
---help---
|
||||
Enable the Solder Party Q10 BlackBerry Keyboard support. This
|
||||
exposes itself as a standard keyboard at /dev/kbdN.
|
||||
This keyboard exists both as a standalone module and integrated
|
||||
into the Solder Party Keyboard FeatherWing. Information on this
|
||||
can be found at https://www.solder.party/docs/keyboard-pmod/
|
||||
|
||||
if INPUT_SPQ10KBD
|
||||
|
||||
config SPQ10KBD_DJOY
|
||||
bool "Joystick Interface for Buttons"
|
||||
select INPUT_DJOYSTICK
|
||||
default n
|
||||
|
||||
config SPQ10KBD_REGDBG
|
||||
bool "Keyboard Register Debug"
|
||||
default n
|
||||
|
||||
config SPQ10KBD_BUFSIZE
|
||||
int "Keyboard Buffer Size"
|
||||
default 10
|
||||
|
||||
config SPQ10KBD_NPOLLWAITERS
|
||||
int "Max Number of Poll Waiters"
|
||||
default 2
|
||||
|
||||
endif # INPUT_SPQ10KBD
|
||||
|
||||
endif # INPUT
|
||||
|
|
@ -0,0 +1,100 @@
|
|||
############################################################################
|
||||
# drivers/input/Make.defs
|
||||
#
|
||||
# Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
# contributor license agreements. See the NOTICE file distributed with
|
||||
# this work for additional information regarding copyright ownership. The
|
||||
# ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
# "License"); you may not use this file except in compliance with the
|
||||
# License. You may obtain a copy of the License at
|
||||
#
|
||||
# http://www.apache.org/licenses/LICENSE-2.0
|
||||
#
|
||||
# Unless required by applicable law or agreed to in writing, software
|
||||
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
# License for the specific language governing permissions and limitations
|
||||
# under the License.
|
||||
#
|
||||
############################################################################
|
||||
|
||||
# Don't build anything if there is no support for input devices
|
||||
|
||||
ifeq ($(CONFIG_INPUT),y)
|
||||
|
||||
# Include the selected touchscreen drivers
|
||||
|
||||
ifeq ($(CONFIG_INPUT_TSC2007),y)
|
||||
CSRCS += tsc2007.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_INPUT_FT5X06),y)
|
||||
CSRCS += ft5x06.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_INPUT_GT9XX),y)
|
||||
CSRCS += gt9xx.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_INPUT_ADS7843E),y)
|
||||
CSRCS += ads7843e.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_INPUT_MAX11802),y)
|
||||
CSRCS += max11802.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_INPUT_MXT),y)
|
||||
CSRCS += mxt.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_INPUT_STMPE811),y)
|
||||
CSRCS += stmpe811_base.c
|
||||
ifneq ($(CONFIG_INPUT_STMPE811_TSC_DISABLE),y)
|
||||
CSRCS += stmpe811_tsc.c
|
||||
endif
|
||||
ifneq ($(CONFIG_INPUT_STMPE811_GPIO_DISABLE),y)
|
||||
CSRCS += stmpe811_gpio.c
|
||||
endif
|
||||
ifneq ($(CONFIG_INPUT_STMPE811_ADC_DISABLE),y)
|
||||
CSRCS += stmpe811_adc.c
|
||||
endif
|
||||
ifneq ($(CONFIG_INPUT_STMPE811_TEMP_DISABLE),y)
|
||||
CSRCS += stmpe811_temp.c
|
||||
endif
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_INPUT_CYPRESS_MBR3108),y)
|
||||
CSRCS += cypress_mbr3108.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_INPUT_BUTTONS),y)
|
||||
CSRCS += button_upper.c
|
||||
ifeq ($(CONFIG_INPUT_BUTTONS_LOWER),y)
|
||||
CSRCS += button_lower.c
|
||||
endif
|
||||
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_INPUT_DJOYSTICK),y)
|
||||
CSRCS += djoystick.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_INPUT_AJOYSTICK),y)
|
||||
CSRCS += ajoystick.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_INPUT_NUNCHUCK),y)
|
||||
CSRCS += nunchuck.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_INPUT_SPQ10KBD),y)
|
||||
CSRCS += spq10kbd.c
|
||||
endif
|
||||
|
||||
# Include input device driver build support
|
||||
|
||||
DEPPATH += --dep-path input
|
||||
VPATH += :input
|
||||
CFLAGS += ${shell $(INCDIR) "$(CC)" $(TOPDIR)$(DELIM)drivers$(DELIM)input}
|
||||
endif
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,113 @@
|
|||
/*
|
||||
* Copyright (c) 2022 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file gt9xx.h
|
||||
* @brief API for gt9xx.
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2022.5.31
|
||||
*/
|
||||
|
||||
|
||||
#ifndef __GT9XX_H_
|
||||
#define __GT9XX_H_
|
||||
|
||||
#define GT9XX_MAX_TOUCHES (1)
|
||||
#define GT9XX_TOUCH_DATA_LEN (8 * GT9XX_MAX_TOUCHES + 4)
|
||||
|
||||
#define TOUCH_POINT_GET_EVENT(t) ((t).xh >> 6)
|
||||
#define TOUCH_POINT_GET_ID(t) ((t).yh >> 4)
|
||||
#define TOUCH_POINT_GET_X(t) ((((t).xh & 0x0f) << 8) | (t).xl)
|
||||
#define TOUCH_POINT_GET_Y(t) ((((t).yh & 0x0f) << 8) | (t).yl)
|
||||
|
||||
|
||||
#define GT9XX_MAX_HEIGHT 272
|
||||
#define GT9XX_MAX_WIDTH 480
|
||||
#define GT9XX_INT_TRIGGER 0
|
||||
|
||||
#define GT9XX_ADDR_LENGTH 2
|
||||
#define GT9XX_CONFIG_MIN_LENGTH 186
|
||||
#define GT9XX_CONFIG_MAX_LENGTH 240
|
||||
|
||||
#define GT9XX_REG_BAK_REF 0x99D0
|
||||
#define GT9XX_REG_CHIP_TYPE 0x8000
|
||||
#define GT9XX_REG_MAIN_CLK 0x8020
|
||||
#define GT9XX_REG_COMMAND 0x8040
|
||||
#define GT9XX_REG_CONFIG_DATA 0x8047
|
||||
#define GT9XX_REG_CONFIG_CHKSUM 0x80FF
|
||||
#define GT9XX_REG_VERSION 0x8140
|
||||
#define GT9XX_REG_SENSOR_ID 0x814A
|
||||
#define GT9XX_REG_READ_COOR 0x814E
|
||||
|
||||
#define GT9XX_COMMAND_READSTATUS 0
|
||||
#define GT9XX_COMMAND_DIFFERENCE 1
|
||||
#define GT9XX_COMMAND_SOFTRESET 2
|
||||
#define GT9XX_COMMAND_UPDATE 3
|
||||
#define GT9XX_COMMAND_CALCULATE 4
|
||||
#define GT9XX_COMMAND_TURNOFF 5
|
||||
|
||||
enum touch_event_e
|
||||
{
|
||||
GT9XX_DOWN = 0, /* The state changed to touched */
|
||||
GT9XX_UP = 1, /* The state changed to not touched */
|
||||
GT9XX_CONTACT = 2, /* There is a continuous touch being detected */
|
||||
GT9XX_INVALID = 3 /* No touch information available */
|
||||
};
|
||||
|
||||
/* Describes on touchpoint returned by the GT9xx */
|
||||
|
||||
struct gt9xx_touch_point_s
|
||||
{
|
||||
uint8_t xh;
|
||||
uint8_t xl;
|
||||
uint8_t yh;
|
||||
uint8_t yl;
|
||||
uint8_t weight;
|
||||
uint8_t area;
|
||||
};
|
||||
|
||||
/* Describes all touch data returned by the GT9xx */
|
||||
|
||||
struct gt9xx_touch_data_s
|
||||
{
|
||||
uint8_t tdstatus; /* Touch status */
|
||||
struct gt9xx_touch_point_s touch[GT9XX_MAX_TOUCHES];
|
||||
};
|
||||
|
||||
/* Maximum number of threads than can be waiting for POLL events */
|
||||
|
||||
#ifndef CONFIG_GT9XX_NPOLLWAITERS
|
||||
# define CONFIG_GT9XX_NPOLLWAITERS 2
|
||||
#endif
|
||||
|
||||
struct gt9xx_config_s
|
||||
{
|
||||
uint8_t address; /* 7-bit I2C address (only bits 0-6 used) */
|
||||
uint32_t frequency; /* Default I2C frequency */
|
||||
|
||||
#ifndef CONFIG_GT9XX_POLLMODE
|
||||
int (*attach)(FAR const struct gt9xx_config_s *config, xcpt_t isr,
|
||||
FAR void *arg);
|
||||
void (*enable)(FAR const struct gt9xx_config_s *config, bool enable);
|
||||
void (*clear)(FAR const struct gt9xx_config_s *config);
|
||||
#endif
|
||||
void (*wakeup)(FAR const struct gt9xx_config_s *config);
|
||||
void (*nreset)(FAR const struct gt9xx_config_s *config,
|
||||
bool state);
|
||||
};
|
||||
|
||||
int gt9xx_register(FAR struct i2c_master_s *i2c,
|
||||
FAR const struct gt9xx_config_s *config, int minor);
|
||||
|
||||
|
||||
#endif /* __GT9XX_H__ */
|
||||
Loading…
Reference in New Issue