diff --git a/APP_Framework/Applications/framework_init.c b/APP_Framework/Applications/framework_init.c
index 2d08c4b46..9612fd635 100644
--- a/APP_Framework/Applications/framework_init.c
+++ b/APP_Framework/Applications/framework_init.c
@@ -32,6 +32,7 @@ extern int Ps5308Pm1_0Init(void);
 extern int Ps5308Pm2_5Init(void);
 extern int Ps5308Pm10Init(void);
 extern int Zg09Co2Init(void);
+extern int G8sCo2Init(void);
 extern int As830Ch4Init(void);
 extern int Tb600bIaq10IaqInit(void);
 extern int Tb600bTvoc10TvocInit(void);
@@ -106,6 +107,10 @@ static struct InitDesc sensor_desc[] =
 	{ "zg09_co2", Zg09Co2Init },
 #endif
 
+#ifdef SENSOR_G8S
+	{ "g8s_co2", G8sCo2Init },
+#endif
+
 #ifdef SENSOR_QS_FX
 	{ "qs_fx_wind_direction", QsFxWindDirectionInit },
 #endif
diff --git a/APP_Framework/Applications/sensor_app/Makefile b/APP_Framework/Applications/sensor_app/Makefile
index 76fd4e16c..03bc3952a 100644
--- a/APP_Framework/Applications/sensor_app/Makefile
+++ b/APP_Framework/Applications/sensor_app/Makefile
@@ -22,6 +22,11 @@ ifeq ($(CONFIG_ADD_NUTTX_FETURES),y)
     ifeq ($(CONFIG_APPLICATION_SENSOR_CO2_ZG09), y)
         CSRCS += co2_zg09.c
     endif
+    
+    ifeq ($(CONFIG_APPLICATION_SENSOR_CO2_G8S), y)
+        CSRCS += co2_g8s.c
+    endif
+    
 
     ifeq ($(CONFIG_APPLICATION_SENSOR_PM1_0_PS5308), y)
         CSRCS += pm1_0_ps5308.c
diff --git a/APP_Framework/Applications/sensor_app/co2_g8s.c b/APP_Framework/Applications/sensor_app/co2_g8s.c
index 684a63d7a..d19a25ab2 100644
--- a/APP_Framework/Applications/sensor_app/co2_g8s.c
+++ b/APP_Framework/Applications/sensor_app/co2_g8s.c
@@ -17,8 +17,10 @@
  * @author AIIT XUOS Lab
  * @date 2021.12.23
  */
-
-#include <user_api.h>
+//
+#ifdef ADD_XIZI_FETURES
+# include <user_api.h>
+#endif
 #include <sensor.h>
 
 /**
diff --git a/APP_Framework/Framework/connection/lora/e220/Kconfig b/APP_Framework/Framework/connection/lora/e220/Kconfig
index b03aee0cc..322b307c8 100644
--- a/APP_Framework/Framework/connection/lora/e220/Kconfig
+++ b/APP_Framework/Framework/connection/lora/e220/Kconfig
@@ -39,11 +39,11 @@ if ADD_NUTTX_FETURES
 
         config ADAPTER_E220_M0_PATH
                 string "E220 M0 pin device"
-                default "/dev/gpout0"
+                default "/dev/gpio0"
 
         config ADAPTER_E220_M1_PATH
                 string "E220 M1 pin device"
-                default "/dev/gpout1"
+                default "/dev/gpio1"
         
         config ADAPTER_E220_DRIVER_EXTUART
                 bool "Using extra uart to support lora"
diff --git a/APP_Framework/Framework/connection/zigbee/e18/Kconfig b/APP_Framework/Framework/connection/zigbee/e18/Kconfig
index 06bdec8c7..170f39aaa 100644
--- a/APP_Framework/Framework/connection/zigbee/e18/Kconfig
+++ b/APP_Framework/Framework/connection/zigbee/e18/Kconfig
@@ -47,29 +47,25 @@ if ADD_XIZI_FETURES
 endif
 
 if ADD_NUTTX_FETURES
-    config ADAPTER_E18_MODEPIN
-            int "E18 MODE pin number"
-            default "61"
+        config ADAPTER_E18_MODE_PATH
+                string "E18 MODE pin device"
+                default "/dev/gpio2"
 
-    config ADAPTER_E18_PIN_DRIVER
-            string "E18 device pin driver path"
-            default "/dev/pin_dev"
+        config ADAPTER_E18_DRIVER_EXTUART
+                bool "Using extra uart to support zigbee"
+                default y
+                
+        config ADAPTER_E18_DRIVER
+                string "E18 device uart driver path"
+                default "/dev/ttyS1"
+                depends on !ADAPTER_E18_DRIVER_EXTUART
+                ---help---
+                    If USART1 is selected, then fill in /dev/ttyS1 here.
 
-    config ADAPTER_E18_DRIVER
-            string "E18 device uart driver path"
-            default "/dev/ttyS1"
-            depends on !ADAPTER_E18_DRIVER_EXTUART
-           ---help---
-               If USART1 is selected, then fill in /dev/ttyS1 here.
-
-    if ADAPTER_E18_DRIVER_EXTUART
-            config ADAPTER_E18_DRIVER
-                    string "E18 device extra uart driver path"
-                    default "/dev/extuart_dev1"
-
-            config ADAPTER_E18_DRIVER_EXT_PORT
-                    int "if E18 device using extuart, choose port"
-                    default "1"
+        if ADAPTER_E18_DRIVER_EXTUART
+                config ADAPTER_E18_DRIVER
+                string "E18 device extra uart driver path"
+                default "/dev/extuart_dev1"
     endif
 
 endif
diff --git a/APP_Framework/Framework/connection/zigbee/e18/e18.c b/APP_Framework/Framework/connection/zigbee/e18/e18.c
index 6638a988b..c8138d07b 100644
--- a/APP_Framework/Framework/connection/zigbee/e18/e18.c
+++ b/APP_Framework/Framework/connection/zigbee/e18/e18.c
@@ -42,6 +42,9 @@ char *cmd_set_ch = "AT+CH=11";    /*set channel as 11*/
 
 static int E18HardwareModeGet()
 {
+#ifdef ADD_NUTTX_FETURES
+    return E18_AS_HEX_MODE;
+#else
     int ret = 0;
     int pin_fd;
 
@@ -62,7 +65,8 @@ static int E18HardwareModeGet()
     } else {
         printf(" E18 as HEX mode\n");
         return E18_AS_HEX_MODE;
-    } 
+    }
+#endif 
 }
 
 #ifdef ADD_NUTTX_FETURES
@@ -175,9 +179,15 @@ static int E18NetworkModeConfig(struct Adapter *adapter)
     }
 
 out:
-    if(E18_AS_AT_MODE == mode){
+#ifdef ADD_NUTTX_FETURES
+    if(E18_AS_HEX_MODE == mode)
+#else
+    if(E18_AS_AT_MODE == mode)
+#endif
+    {
         AtCmdConfigAndCheck(adapter->agent, cmd_exit, "+OK");
     }
+
     
     return ret;
 }
@@ -242,7 +252,12 @@ static int E18NetRoleConfig(struct Adapter *adapter)
     }
 
 out:
-    if(E18_AS_AT_MODE == mode) {
+#ifdef ADD_NUTTX_FETURES
+    if(E18_AS_HEX_MODE == mode)
+#else
+    if(E18_AS_AT_MODE == mode)
+#endif
+    {
         AtCmdConfigAndCheck(adapter->agent, cmd_exit, "+OK");
     }
 
@@ -384,7 +399,12 @@ static int E18Join(struct Adapter *adapter, unsigned char *priv_net_group)
 
     // }
     if(!ret){
-        if(E18_AS_AT_MODE == mode) {
+#ifdef ADD_NUTTX_FETURES
+        if(E18_AS_HEX_MODE == mode)
+#else
+        if(E18_AS_AT_MODE == mode)
+#endif
+        {
             ret = AtCmdConfigAndCheck(adapter->agent, cmd_exit, "+OK");
             if(ret < 0) {
                 printf("%s %d cmd[%s] config failed!\n",__func__,__LINE__,cmd_exit);
diff --git a/APP_Framework/Framework/sensor/co2/Kconfig b/APP_Framework/Framework/sensor/co2/Kconfig
index e4c4c430f..78a965e8d 100644
--- a/APP_Framework/Framework/sensor/co2/Kconfig
+++ b/APP_Framework/Framework/sensor/co2/Kconfig
@@ -64,6 +64,7 @@ config SENSOR_ZG09
                 endif                
         endif
 
+
 config SENSOR_G8S
         bool "Using g8-s"
         default n
@@ -99,7 +100,11 @@ config SENSOR_G8S
                 endif
 
                 if ADD_NUTTX_FETURES
-
+                       config SENSOR_DEVICE_G8S_DEV
+                               string "CO2 device name"
+                               default "/dev/ttyS3"
+                               ---help---
+                                   If USART1 is selected, then fill in /dev/ttyS1 here.
                 endif
 
                 if ADD_RTTHREAD_FETURES
diff --git a/APP_Framework/Framework/sensor/co2/g8s/Make.defs b/APP_Framework/Framework/sensor/co2/g8s/Make.defs
new file mode 100644
index 000000000..f14b14928
--- /dev/null
+++ b/APP_Framework/Framework/sensor/co2/g8s/Make.defs
@@ -0,0 +1,6 @@
+############################################################################
+# APP_Framework/Framework/sensor/co2/g8s/Make.defs
+############################################################################
+ifneq ($(CONFIG_SENSOR_G8S),)
+CONFIGURED_APPS += $(APPDIR)/../../../APP_Framework/Framework/sensor/co2/g8s
+endif
diff --git a/APP_Framework/Framework/sensor/co2/g8s/Makefile b/APP_Framework/Framework/sensor/co2/g8s/Makefile
index 933351bcd..e4b77f31a 100644
--- a/APP_Framework/Framework/sensor/co2/g8s/Makefile
+++ b/APP_Framework/Framework/sensor/co2/g8s/Makefile
@@ -1,3 +1,13 @@
-SRC_FILES := g8s.c
+include $(KERNEL_ROOT)/.config
+
+ifeq ($(CONFIG_ADD_NUTTX_FETURES),y)
+    include $(APPDIR)/Make.defs
+    CSRCS += g8s.c
+    include $(APPDIR)/Application.mk
+endif
+
+ifeq ($(CONFIG_ADD_XIZI_FETURES),y)
+    SRC_FILES := g8s.c
+    include $(KERNEL_ROOT)/compiler.mk
+endif
 
-include $(KERNEL_ROOT)/compiler.mk
diff --git a/APP_Framework/Framework/sensor/co2/g8s/g8s.c b/APP_Framework/Framework/sensor/co2/g8s/g8s.c
index b46b54971..89c7583bc 100644
--- a/APP_Framework/Framework/sensor/co2/g8s/g8s.c
+++ b/APP_Framework/Framework/sensor/co2/g8s/g8s.c
@@ -37,6 +37,7 @@ static struct SensorProductInfo info =
  * @param sdev - sensor device pointer
  * @return success: 1 , failure: other
  */
+#ifdef ADD_NUTTX_FETURES
 static int SensorDeviceOpen(struct SensorDevice *sdev)
 {
     int result = 0;
@@ -46,7 +47,20 @@ static int SensorDeviceOpen(struct SensorDevice *sdev)
         printf("open %s error\n", SENSOR_DEVICE_G8S_DEV);
         return -1;
     }
-    
+}
+
+#else
+static int SensorDeviceOpen(struct SensorDevice *sdev)
+{
+    int result = 0;
+
+    sdev->fd = PrivOpen(SENSOR_DEVICE_G8S_DEV, O_RDWR);
+    if (sdev->fd < 0) {
+        printf("open %s error\n", SENSOR_DEVICE_G8S_DEV);
+        return -1;
+    }    
+
+
     struct SerialDataCfg cfg;
     cfg.serial_baud_rate    = BAUD_RATE_9600;
     cfg.serial_data_bits    = DATA_BITS_8;
@@ -67,7 +81,7 @@ static int SensorDeviceOpen(struct SensorDevice *sdev)
 
     return result;
 }
-
+#endif
 /**
  * @description: Read sensor device
  * @param sdev - sensor device pointer
@@ -76,10 +90,9 @@ static int SensorDeviceOpen(struct SensorDevice *sdev)
  */
 static int SensorDeviceRead(struct SensorDevice *sdev, size_t len)
 {
-    uint8_t tmp = 0;
 
     PrivWrite(sdev->fd, g8s_read_instruction, sizeof(g8s_read_instruction));
-
+    PrivTaskDelay(500);
     if (PrivRead(sdev->fd, sdev->buffer, len) < 0)
         return -1;
 
@@ -140,16 +153,26 @@ static int32_t QuantityRead(struct SensorQuantity *quant)
                 result_ascii[i] = quant->sdev->buffer[i];
             }
 
-            if (8 == ascii_length) {
-                for (i = 0; i < ascii_length; i ++) {
-                    result_hex[i] = result_ascii[i] - 0x30;
-                    result += result_hex[i] * pow(10, ascii_length - 1 - i);
-                }
-                return result;
-            } else {
+            if (ascii_length == 0){
+
                 printf("This reading is wrong\n");
+
                 result = SENSOR_QUANTITY_VALUE_ERROR;
+
                 return result;
+
+            }else{
+
+                for (i = 0; i < ascii_length; i ++) {
+
+                    result_hex[i] = result_ascii[i] - 0x30;
+
+                    result += result_hex[i] * pow(10, ascii_length - 1 - i);
+
+                }
+
+                return result;                
+
             }
         }
         if (quant->sdev->status == SENSOR_DEVICE_ACTIVE) {
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/README.txt b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/README.txt
index b60ff7750..95e017843 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/README.txt
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/README.txt
@@ -2415,7 +2415,7 @@ Configuration Sub-directories
        usable as of this writing.  The windows native build logic is currently
        separate and must be started by:
 
-        make -f Makefile.win
+        make -f Win.mk
 
       This build:
 
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/adb/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/adb/defconfig
deleted file mode 100644
index 4dee2a8c5..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/adb/defconfig
+++ /dev/null
@@ -1,87 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_ARCH_FPU is not set
-# CONFIG_NSH_ARGCAT is not set
-# CONFIG_NSH_CMDOPT_HEXDUMP is not set
-# CONFIG_NSH_CMDPARMS is not set
-CONFIG_ADD_NUTTX_FETURES=y
-CONFIG_ADBD_FILE_SERVICE=y
-CONFIG_ADBD_SHELL_SERVICE=y
-CONFIG_ADBD_USB_SERVER=y
-CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="aiit-arm32-board"
-CONFIG_ARCH_BOARD_STM32F4_AIIT=y
-CONFIG_ARCH_BUTTONS=y
-CONFIG_ARCH_CHIP="stm32"
-CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F407VG=y
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_BOARDCTL_RESET=y
-CONFIG_BOARDCTL_USBDEVCTRL=y
-CONFIG_BOARD_LOOPSPERMSEC=16717
-CONFIG_BUILTIN=y
-CONFIG_CLOCK_MONOTONIC=y
-CONFIG_DEBUG_FULLOPT=y
-CONFIG_DEBUG_SYMBOLS=y
-CONFIG_DEV_FIFO_SIZE=128
-CONFIG_DEV_PIPE_MAXSIZE=128
-CONFIG_DEV_PIPE_SIZE=128
-CONFIG_DEV_URANDOM=y
-CONFIG_ELF=y
-CONFIG_EXAMPLES_HELLO=m
-CONFIG_FAT_LFN=y
-CONFIG_FS_FAT=y
-CONFIG_FS_FATTIME=y
-CONFIG_FS_PROCFS=y
-CONFIG_HAVE_CXX=y
-CONFIG_HAVE_CXXINITIALIZE=y
-CONFIG_INTELHEX_BINARY=y
-CONFIG_LIBC_ENVPATH=y
-CONFIG_LIBC_EXECFUNCS=y
-CONFIG_LIBUV=y
-CONFIG_LIBUV_PIPE=y
-CONFIG_LIBUV_STREAM=y
-CONFIG_MMCSD=y
-CONFIG_NSH_ARCHINIT=y
-CONFIG_NSH_BUILTIN_APPS=y
-CONFIG_NSH_FILEIOSIZE=512
-CONFIG_NSH_FILE_APPS=y
-CONFIG_NSH_LINELEN=128
-CONFIG_NSH_READLINE=y
-CONFIG_PATH_INITIAL="/mnt/sd0/bin"
-CONFIG_PIPES=y
-CONFIG_PREALLOC_TIMERS=4
-CONFIG_RAM_SIZE=114688
-CONFIG_RAM_START=0x20000000
-CONFIG_RAW_BINARY=y
-CONFIG_SCHED_LPWORK=y
-CONFIG_SCHED_WAITPID=y
-CONFIG_SDCLONE_DISABLE=y
-CONFIG_SENSORS=y
-CONFIG_STACK_COLORATION=y
-CONFIG_START_DAY=17
-CONFIG_START_MONTH=12
-CONFIG_START_YEAR=2020
-CONFIG_STM32_DMA2=y
-CONFIG_STM32_DMACAPABLE=y
-CONFIG_STM32_JTAG_SW_ENABLE=y
-CONFIG_STM32_OTGFS=y
-CONFIG_STM32_PWR=y
-CONFIG_STM32_SPI2=y
-CONFIG_STM32_USART1=y
-CONFIG_SYMTAB_ORDEREDBYNAME=y
-CONFIG_SYSTEM_ADBD=y
-CONFIG_SYSTEM_NSH=y
-CONFIG_SYSTEM_NSH_SYMTAB=y
-CONFIG_SYSTEM_NSH_SYMTAB_ARRAYNAME="g_symtab"
-CONFIG_SYSTEM_NSH_SYMTAB_COUNTNAME="g_nsymbols"
-CONFIG_USART1_SERIAL_CONSOLE=y
-CONFIG_USBADB=y
-CONFIG_USBDEV=y
-CONFIG_USERMAIN_STACKSIZE=3072
-CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/audio/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/audio/defconfig
deleted file mode 100644
index 05b29fe9b..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/audio/defconfig
+++ /dev/null
@@ -1,79 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_ARCH_FPU is not set
-# CONFIG_NSH_ARGCAT is not set
-# CONFIG_NSH_CMDOPT_HEXDUMP is not set
-# CONFIG_NSH_CMDPARMS is not set
-CONFIG_ADD_NUTTX_FETURES=y
-CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="aiit-arm32-board"
-CONFIG_ARCH_BOARD_STM32F4_AIIT=y
-CONFIG_ARCH_BUTTONS=y
-CONFIG_ARCH_CHIP="stm32"
-CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F407VG=y
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_AUDIO=y
-CONFIG_AUDIO_CS43L22=y
-CONFIG_AUDIO_CUSTOM_DEV_PATH=y
-CONFIG_AUDIO_EXCLUDE_TONE=y
-CONFIG_BOARD_LATE_INITIALIZE=y
-CONFIG_BOARD_LOOPSPERMSEC=16717
-CONFIG_BUILTIN=y
-CONFIG_DRIVERS_AUDIO=y
-CONFIG_FAT_LCNAMES=y
-CONFIG_FAT_LFN=y
-CONFIG_FS_FAT=y
-CONFIG_FS_PROCFS=y
-CONFIG_HAVE_CXX=y
-CONFIG_HAVE_CXXINITIALIZE=y
-CONFIG_I2C=y
-CONFIG_I2C_DRIVER=y
-CONFIG_I2C_POLLED=y
-CONFIG_I2C_RESET=y
-CONFIG_INTELHEX_BINARY=y
-CONFIG_MM_REGIONS=2
-CONFIG_NSH_BUILTIN_APPS=y
-CONFIG_NSH_FILEIOSIZE=512
-CONFIG_NSH_LINELEN=64
-CONFIG_NSH_READLINE=y
-CONFIG_NXPLAYER_DEFAULT_MEDIADIR="/mnt/music"
-CONFIG_PREALLOC_TIMERS=4
-CONFIG_RAM_SIZE=114688
-CONFIG_RAM_START=0x20000000
-CONFIG_RAW_BINARY=y
-CONFIG_RR_INTERVAL=200
-CONFIG_SCHED_HPWORK=y
-CONFIG_SCHED_WAITPID=y
-CONFIG_SDCLONE_DISABLE=y
-CONFIG_START_DAY=6
-CONFIG_START_MONTH=12
-CONFIG_START_YEAR=2011
-CONFIG_STM32_DMA1=y
-CONFIG_STM32_DMACAPABLE=y
-CONFIG_STM32_I2C1=y
-CONFIG_STM32_I2S3=y
-CONFIG_STM32_I2S3_TX=y
-CONFIG_STM32_I2S_MCK=y
-CONFIG_STM32_JTAG_SW_ENABLE=y
-CONFIG_STM32_OTGFS=y
-CONFIG_STM32_OTGFS_SOFINTR=y
-CONFIG_STM32_PWR=y
-CONFIG_STM32_SPI1=y
-CONFIG_STM32_SPI3=y
-CONFIG_STM32_SPI_DMA=y
-CONFIG_STM32_USART1=y
-CONFIG_STM32_USBHOST=y
-CONFIG_SYSTEM_NSH=y
-CONFIG_SYSTEM_NXPLAYER=y
-CONFIG_USART1_RXBUFSIZE=128
-CONFIG_USART1_SERIAL_CONSOLE=y
-CONFIG_USART1_TXBUFSIZE=128
-CONFIG_USBHOST_ISOC_DISABLE=y
-CONFIG_USBHOST_MSC=y
-CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/canard/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/canard/defconfig
deleted file mode 100644
index 1d3f01179..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/canard/defconfig
+++ /dev/null
@@ -1,57 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_ARCH_FPU is not set
-# CONFIG_NSH_ARGCAT is not set
-# CONFIG_NSH_CMDOPT_HEXDUMP is not set
-# CONFIG_NSH_CMDPARMS is not set
-CONFIG_ADD_NUTTX_FETURES=y
-CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="aiit-arm32-board"
-CONFIG_ARCH_BOARD_STM32F4_AIIT=y
-CONFIG_ARCH_BUTTONS=y
-CONFIG_ARCH_CHIP="stm32"
-CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F407VG=y
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_BOARD_LOOPSPERMSEC=16717
-CONFIG_BUILTIN=y
-CONFIG_CANUTILS_LIBCANARD=y
-CONFIG_CAN_EXTID=y
-CONFIG_CLOCK_MONOTONIC=y
-CONFIG_EXAMPLES_LIBCANARD=y
-CONFIG_FS_PROCFS=y
-CONFIG_HAVE_CXX=y
-CONFIG_HAVE_CXXINITIALIZE=y
-CONFIG_INTELHEX_BINARY=y
-CONFIG_MM_REGIONS=2
-CONFIG_NSH_BUILTIN_APPS=y
-CONFIG_NSH_FILEIOSIZE=512
-CONFIG_NSH_LINELEN=64
-CONFIG_NSH_READLINE=y
-CONFIG_PREALLOC_TIMERS=4
-CONFIG_RAM_SIZE=114688
-CONFIG_RAM_START=0x20000000
-CONFIG_RAW_BINARY=y
-CONFIG_RR_INTERVAL=200
-CONFIG_SCHED_WAITPID=y
-CONFIG_SDCLONE_DISABLE=y
-CONFIG_START_DAY=6
-CONFIG_START_MONTH=12
-CONFIG_START_YEAR=2011
-CONFIG_STM32_CAN1=y
-CONFIG_STM32_CAN1_BAUD=500000
-CONFIG_STM32_JTAG_SW_ENABLE=y
-CONFIG_STM32_PWR=y
-CONFIG_STM32_SPI1=y
-CONFIG_STM32_USART1=y
-CONFIG_SYSTEM_NSH=y
-CONFIG_SYSTEM_TIME64=y
-CONFIG_USART1_RXBUFSIZE=128
-CONFIG_USART1_SERIAL_CONSOLE=y
-CONFIG_USART1_TXBUFSIZE=128
-CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/cxxtest/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/cxxtest/defconfig
deleted file mode 100644
index 4ec45be69..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/cxxtest/defconfig
+++ /dev/null
@@ -1,45 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_ARCH_FPU is not set
-CONFIG_ADD_NUTTX_FETURES=y
-CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="aiit-arm32-board"
-CONFIG_ARCH_BOARD_STM32F4_AIIT=y
-CONFIG_ARCH_CHIP="stm32"
-CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F407VG=y
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_BOARD_LOOPSPERMSEC=16717
-CONFIG_C99_BOOL8=y
-CONFIG_DISABLE_ENVIRON=y
-CONFIG_DISABLE_MOUNTPOINT=y
-CONFIG_HAVE_CXX=y
-CONFIG_HOST_WINDOWS=y
-CONFIG_INTELHEX_BINARY=y
-CONFIG_LIBM=y
-CONFIG_MM_REGIONS=2
-CONFIG_PREALLOC_TIMERS=4
-CONFIG_RAM_SIZE=114688
-CONFIG_RAM_START=0x20000000
-CONFIG_RAW_BINARY=y
-CONFIG_RR_INTERVAL=200
-CONFIG_SCHED_ONEXIT=y
-CONFIG_SCHED_ONEXIT_MAX=4
-CONFIG_SDCLONE_DISABLE=y
-CONFIG_START_DAY=2
-CONFIG_START_MONTH=11
-CONFIG_START_YEAR=2012
-CONFIG_STM32_JTAG_SW_ENABLE=y
-CONFIG_STM32_USART1=y
-CONFIG_SYMTAB_ORDEREDBYNAME=y
-CONFIG_TESTING_CXXTEST=y
-CONFIG_UCLIBCXX=y
-CONFIG_USART1_RXBUFSIZE=128
-CONFIG_USART1_SERIAL_CONSOLE=y
-CONFIG_USART1_TXBUFSIZE=128
-CONFIG_USER_ENTRYPOINT="cxxtest_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/elf/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/elf/defconfig
deleted file mode 100644
index 2b57bce5a..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/elf/defconfig
+++ /dev/null
@@ -1,48 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_ARCH_FPU is not set
-CONFIG_ADD_NUTTX_FETURES=y
-CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="aiit-arm32-board"
-CONFIG_ARCH_BOARD_STM32F4_AIIT=y
-CONFIG_ARCH_CHIP="stm32"
-CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F407VG=y
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_ARMV7M_USEBASEPRI=y
-CONFIG_BINFMT_CONSTRUCTORS=y
-CONFIG_BOARDCTL=y
-CONFIG_BOARDCTL_ROMDISK=y
-CONFIG_BOARD_LATE_INITIALIZE=y
-CONFIG_BOARD_LOOPSPERMSEC=16717
-CONFIG_CONSOLE_SYSLOG=y
-CONFIG_ELF=y
-CONFIG_ELF_STACKSIZE=4096
-CONFIG_EXAMPLES_ELF=y
-CONFIG_FS_ROMFS=y
-CONFIG_HAVE_CXX=y
-CONFIG_INTELHEX_BINARY=y
-CONFIG_LIBC_ENVPATH=y
-CONFIG_MM_REGIONS=2
-CONFIG_PATH_INITIAL="/mnt/romfs"
-CONFIG_PREALLOC_TIMERS=4
-CONFIG_RAM_SIZE=114688
-CONFIG_RAM_START=0x20000000
-CONFIG_RAW_BINARY=y
-CONFIG_RR_INTERVAL=200
-CONFIG_SCHED_STARTHOOK=y
-CONFIG_SDCLONE_DISABLE=y
-CONFIG_START_DAY=26
-CONFIG_START_MONTH=10
-CONFIG_START_YEAR=2012
-CONFIG_STM32_JTAG_SW_ENABLE=y
-CONFIG_STM32_USART1=y
-CONFIG_SYMTAB_ORDEREDBYNAME=y
-CONFIG_USART1_SERIAL_CONSOLE=y
-CONFIG_USERMAIN_STACKSIZE=4096
-CONFIG_USER_ENTRYPOINT="elf_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/ipv6/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/ipv6/defconfig
deleted file mode 100644
index 76f5c6412..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/ipv6/defconfig
+++ /dev/null
@@ -1,93 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_ARCH_FPU is not set
-# CONFIG_MMCSD_MMCSUPPORT is not set
-# CONFIG_MMCSD_SPI is not set
-# CONFIG_NET_IPv4 is not set
-# CONFIG_NSH_ARGCAT is not set
-# CONFIG_NSH_CMDOPT_HEXDUMP is not set
-# CONFIG_NSH_CMDPARMS is not set
-CONFIG_ADD_NUTTX_FETURES=y
-CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="aiit-arm32-board"
-CONFIG_ARCH_BOARD_STM32F4_AIIT=y
-CONFIG_ARCH_BUTTONS=y
-CONFIG_ARCH_CHIP="stm32"
-CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F407VG=y
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_BOARD_LOOPSPERMSEC=16717
-CONFIG_BUILTIN=y
-CONFIG_ETH0_PHY_LAN8720=y
-CONFIG_FAT_LCNAMES=y
-CONFIG_FAT_LFN=y
-CONFIG_FS_FAT=y
-CONFIG_FS_PROCFS=y
-CONFIG_HAVE_CXX=y
-CONFIG_HAVE_CXXINITIALIZE=y
-CONFIG_HOST_WINDOWS=y
-CONFIG_INTELHEX_BINARY=y
-CONFIG_LIBC_HOSTNAME="STM32F4-Discovery"
-CONFIG_MMCSD=y
-CONFIG_MMCSD_MULTIBLOCK_DISABLE=y
-CONFIG_MMCSD_SDIO=y
-CONFIG_NET=y
-CONFIG_NETINIT_IPv6NETMASK_8=0xff80
-CONFIG_NETINIT_NOMAC=y
-CONFIG_NET_BROADCAST=y
-CONFIG_NET_ICMPv6=y
-CONFIG_NET_ICMPv6_NEIGHBOR=y
-CONFIG_NET_ICMPv6_SOCKET=y
-CONFIG_NET_IPv6=y
-CONFIG_NET_SOCKOPTS=y
-CONFIG_NET_SOLINGER=y
-CONFIG_NET_TCP=y
-CONFIG_NET_TCPBACKLOG=y
-CONFIG_NET_TCP_WRITE_BUFFERS=y
-CONFIG_NET_UDP=y
-CONFIG_NSH_ARCHINIT=y
-CONFIG_NSH_BUILTIN_APPS=y
-CONFIG_NSH_FILEIOSIZE=512
-CONFIG_NSH_LINELEN=64
-CONFIG_NSH_READLINE=y
-CONFIG_PREALLOC_TIMERS=4
-CONFIG_RAM_SIZE=114688
-CONFIG_RAM_START=0x20000000
-CONFIG_RAW_BINARY=y
-CONFIG_RR_INTERVAL=200
-CONFIG_SCHED_HPWORK=y
-CONFIG_SCHED_HPWORKPRIORITY=192
-CONFIG_SCHED_WAITPID=y
-CONFIG_SDCLONE_DISABLE=y
-CONFIG_START_DAY=13
-CONFIG_START_MONTH=9
-CONFIG_START_YEAR=2014
-CONFIG_STM32F4DISBB=y
-CONFIG_STM32_DMA2=y
-CONFIG_STM32_DMACAPABLE=y
-CONFIG_STM32_ETHMAC=y
-CONFIG_STM32_JTAG_SW_ENABLE=y
-CONFIG_STM32_PHYADDR=0
-CONFIG_STM32_PHYSR=31
-CONFIG_STM32_PHYSR_100FD=0x0018
-CONFIG_STM32_PHYSR_100HD=0x0008
-CONFIG_STM32_PHYSR_10FD=0x0014
-CONFIG_STM32_PHYSR_10HD=0x0004
-CONFIG_STM32_PHYSR_ALTCONFIG=y
-CONFIG_STM32_PHYSR_ALTMODE=0x001c
-CONFIG_STM32_PWR=y
-CONFIG_STM32_RMII_EXTCLK=y
-CONFIG_STM32_SDIO=y
-CONFIG_STM32_SPI1=y
-CONFIG_STM32_USART6=y
-CONFIG_SYSTEM_NSH=y
-CONFIG_SYSTEM_PING6=y
-CONFIG_USART6_RXBUFSIZE=64
-CONFIG_USART6_SERIAL_CONSOLE=y
-CONFIG_USART6_TXBUFSIZE=64
-CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/kostest/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/kostest/defconfig
deleted file mode 100644
index 930d57cdf..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/kostest/defconfig
+++ /dev/null
@@ -1,51 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_ARCH_FPU is not set
-CONFIG_ADD_NUTTX_FETURES=y
-CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="aiit-arm32-board"
-CONFIG_ARCH_BOARD_STM32F4_AIIT=y
-CONFIG_ARCH_CHIP="stm32"
-CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F407VG=y
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_ARM_MPU=y
-CONFIG_BOARD_LATE_INITIALIZE=y
-CONFIG_BOARD_LOOPSPERMSEC=16717
-CONFIG_CLOCK_MONOTONIC=y
-CONFIG_BUILD_PROTECTED=y
-CONFIG_CONSOLE_SYSLOG=y
-CONFIG_DISABLE_ENVIRON=y
-CONFIG_DISABLE_MOUNTPOINT=y
-CONFIG_HOST_WINDOWS=y
-CONFIG_INTELHEX_BINARY=y
-CONFIG_MM_REGIONS=2
-CONFIG_NUTTX_USERSPACE=0x08020000
-CONFIG_PASS1_BUILDIR="boards/arm/stm32/aiit-arm32-board/kernel"
-CONFIG_PREALLOC_TIMERS=4
-CONFIG_RAM_SIZE=114688
-CONFIG_RAM_START=0x20000000
-CONFIG_RAW_BINARY=y
-CONFIG_RR_INTERVAL=200
-CONFIG_SCHED_WAITPID=y
-CONFIG_SDCLONE_DISABLE=y
-CONFIG_START_DAY=22
-CONFIG_START_MONTH=3
-CONFIG_START_YEAR=2013
-CONFIG_STM32_JTAG_SW_ENABLE=y
-CONFIG_STM32_SPI2=y
-CONFIG_STM32_USART1=y
-CONFIG_SYMTAB_ORDEREDBYNAME=y
-CONFIG_SYS_RESERVED=9
-CONFIG_TESTING_OSTEST=y
-CONFIG_TESTING_OSTEST_NBARRIER_THREADS=3
-CONFIG_TESTING_OSTEST_STACKSIZE=2048
-CONFIG_USART1_RXBUFSIZE=128
-CONFIG_USART1_SERIAL_CONSOLE=y
-CONFIG_USART1_TXBUFSIZE=128
-CONFIG_USER_ENTRYPOINT="ostest_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/lcd1602/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/lcd1602/defconfig
deleted file mode 100644
index 6263e5e87..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/lcd1602/defconfig
+++ /dev/null
@@ -1,58 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_ARCH_FPU is not set
-# CONFIG_NSH_ARGCAT is not set
-# CONFIG_NSH_CMDOPT_HEXDUMP is not set
-# CONFIG_NSH_CMDPARMS is not set
-CONFIG_ADD_NUTTX_FETURES=y
-CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="aiit-arm32-board"
-CONFIG_ARCH_BOARD_STM32F4_AIIT=y
-CONFIG_ARCH_BUTTONS=y
-CONFIG_ARCH_CHIP="stm32"
-CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F407VG=y
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_BOARD_LATE_INITIALIZE=y
-CONFIG_BOARD_LOOPSPERMSEC=16717
-CONFIG_BUILTIN=y
-CONFIG_EXAMPLES_HELLO=y
-CONFIG_EXAMPLES_SLCD=y
-CONFIG_FS_PROCFS=y
-CONFIG_HAVE_CXX=y
-CONFIG_HAVE_CXXINITIALIZE=y
-CONFIG_I2C=y
-CONFIG_INTELHEX_BINARY=y
-CONFIG_LCD_BACKPACK=y
-CONFIG_LCD_LCD1602=y
-CONFIG_MM_REGIONS=2
-CONFIG_NSH_BUILTIN_APPS=y
-CONFIG_NSH_FILEIOSIZE=512
-CONFIG_NSH_LINELEN=64
-CONFIG_NSH_READLINE=y
-CONFIG_PREALLOC_TIMERS=4
-CONFIG_RAM_SIZE=114688
-CONFIG_RAM_START=0x20000000
-CONFIG_RAW_BINARY=y
-CONFIG_RR_INTERVAL=200
-CONFIG_SCHED_WAITPID=y
-CONFIG_SDCLONE_DISABLE=y
-CONFIG_SLCD=y
-CONFIG_START_DAY=6
-CONFIG_START_MONTH=12
-CONFIG_START_YEAR=2011
-CONFIG_STM32_I2C1=y
-CONFIG_STM32_JTAG_SW_ENABLE=y
-CONFIG_STM32_PWR=y
-CONFIG_STM32_SPI1=y
-CONFIG_STM32_USART1=y
-CONFIG_SYSTEM_NSH=y
-CONFIG_USART1_RXBUFSIZE=128
-CONFIG_USART1_SERIAL_CONSOLE=y
-CONFIG_USART1_TXBUFSIZE=128
-CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/lwl/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/lwl/defconfig
deleted file mode 100644
index d46945f1c..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/lwl/defconfig
+++ /dev/null
@@ -1,50 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_ARCH_FPU is not set
-# CONFIG_NSH_ARGCAT is not set
-# CONFIG_NSH_CMDOPT_HEXDUMP is not set
-# CONFIG_NSH_CMDPARMS is not set
-CONFIG_ADD_NUTTX_FETURES=y
-CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="aiit-arm32-board"
-CONFIG_ARCH_BOARD_STM32F4_AIIT=y
-CONFIG_ARCH_BUTTONS=y
-CONFIG_ARCH_CHIP="stm32"
-CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F407VG=y
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_BOARD_LATE_INITIALIZE=y
-CONFIG_BOARD_LOOPSPERMSEC=16717
-CONFIG_BUILTIN=y
-CONFIG_EXAMPLES_HELLO=y
-CONFIG_FS_PROCFS=y
-CONFIG_HAVE_CXX=y
-CONFIG_HAVE_CXXINITIALIZE=y
-CONFIG_INTELHEX_BINARY=y
-CONFIG_LWL_CONSOLE=y
-CONFIG_MM_REGIONS=2
-CONFIG_NSH_BUILTIN_APPS=y
-CONFIG_NSH_FILEIOSIZE=512
-CONFIG_NSH_LINELEN=64
-CONFIG_NSH_READLINE=y
-CONFIG_PREALLOC_TIMERS=4
-CONFIG_RAM_SIZE=114688
-CONFIG_RAM_START=0x20000000
-CONFIG_RAW_BINARY=y
-CONFIG_RR_INTERVAL=200
-CONFIG_SCHED_WAITPID=y
-CONFIG_SDCLONE_DISABLE=y
-CONFIG_STANDARD_SERIAL=y
-CONFIG_START_DAY=6
-CONFIG_START_MONTH=12
-CONFIG_START_YEAR=2011
-CONFIG_STM32_JTAG_SW_ENABLE=y
-CONFIG_STM32_PWR=y
-CONFIG_STM32_SPI1=y
-CONFIG_SYSTEM_NSH=y
-CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/max31855/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/max31855/defconfig
deleted file mode 100644
index 3006f295e..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/max31855/defconfig
+++ /dev/null
@@ -1,56 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_ARCH_FPU is not set
-# CONFIG_NSH_ARGCAT is not set
-# CONFIG_NSH_CMDOPT_HEXDUMP is not set
-# CONFIG_NSH_CMDPARMS is not set
-CONFIG_ADD_NUTTX_FETURES=y
-CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="aiit-arm32-board"
-CONFIG_ARCH_BOARD_STM32F4_AIIT=y
-CONFIG_ARCH_BUTTONS=y
-CONFIG_ARCH_CHIP="stm32"
-CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F407VG=y
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_BOARD_LATE_INITIALIZE=y
-CONFIG_BOARD_LOOPSPERMSEC=16717
-CONFIG_BUILTIN=y
-CONFIG_EXAMPLES_MAX31855=y
-CONFIG_FS_PROCFS=y
-CONFIG_HAVE_CXX=y
-CONFIG_HAVE_CXXINITIALIZE=y
-CONFIG_HOST_WINDOWS=y
-CONFIG_INTELHEX_BINARY=y
-CONFIG_MM_REGIONS=2
-CONFIG_NSH_BUILTIN_APPS=y
-CONFIG_NSH_FILEIOSIZE=512
-CONFIG_NSH_LINELEN=64
-CONFIG_NSH_READLINE=y
-CONFIG_PREALLOC_TIMERS=4
-CONFIG_RAM_SIZE=114688
-CONFIG_RAM_START=0x20000000
-CONFIG_RAW_BINARY=y
-CONFIG_RR_INTERVAL=200
-CONFIG_SCHED_WAITPID=y
-CONFIG_SDCLONE_DISABLE=y
-CONFIG_SENSORS=y
-CONFIG_SENSORS_MAX31855=y
-CONFIG_START_DAY=6
-CONFIG_START_MONTH=12
-CONFIG_START_YEAR=2011
-CONFIG_STM32_JTAG_SW_ENABLE=y
-CONFIG_STM32_PWR=y
-CONFIG_STM32_SPI1=y
-CONFIG_STM32_SPI2=y
-CONFIG_STM32_USART1=y
-CONFIG_SYSTEM_NSH=y
-CONFIG_USART1_RXBUFSIZE=128
-CONFIG_USART1_SERIAL_CONSOLE=y
-CONFIG_USART1_TXBUFSIZE=128
-CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/max7219/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/max7219/defconfig
deleted file mode 100644
index 9c3eb2971..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/max7219/defconfig
+++ /dev/null
@@ -1,86 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_ARCH_FPU is not set
-# CONFIG_DISABLE_OS_API is not set
-# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
-# CONFIG_NSH_DISABLEBG is not set
-# CONFIG_NSH_DISABLESCRIPT is not set
-# CONFIG_NSH_DISABLE_BASENAME is not set
-# CONFIG_NSH_DISABLE_CMP is not set
-# CONFIG_NSH_DISABLE_DD is not set
-# CONFIG_NSH_DISABLE_DF is not set
-# CONFIG_NSH_DISABLE_DIRNAME is not set
-# CONFIG_NSH_DISABLE_EXEC is not set
-# CONFIG_NSH_DISABLE_EXIT is not set
-# CONFIG_NSH_DISABLE_GET is not set
-# CONFIG_NSH_DISABLE_HEXDUMP is not set
-# CONFIG_NSH_DISABLE_ITEF is not set
-# CONFIG_NSH_DISABLE_LOOPS is not set
-# CONFIG_NSH_DISABLE_LOSETUP is not set
-# CONFIG_NSH_DISABLE_MKRD is not set
-# CONFIG_NSH_DISABLE_PUT is not set
-# CONFIG_NSH_DISABLE_SEMICOLON is not set
-# CONFIG_NSH_DISABLE_TIME is not set
-# CONFIG_NSH_DISABLE_UNAME is not set
-# CONFIG_NSH_DISABLE_WGET is not set
-# CONFIG_NSH_DISABLE_XD is not set
-# CONFIG_NX_DISABLE_1BPP is not set
-# CONFIG_NX_WRITEONLY is not set
-CONFIG_ADD_NUTTX_FETURES=y
-CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="aiit-arm32-board"
-CONFIG_ARCH_BOARD_STM32F4_AIIT=y
-CONFIG_ARCH_CHIP="stm32"
-CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F407VG=y
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_BOARD_LOOPSPERMSEC=16717
-CONFIG_BUILTIN=y
-CONFIG_DEFAULT_SMALL=y
-CONFIG_EXAMPLES_NXHELLO=y
-CONFIG_EXAMPLES_NXHELLO_BPP=1
-CONFIG_EXAMPLES_NXHELLO_LISTENER_STACKSIZE=1536
-CONFIG_EXAMPLES_NXHELLO_STACKSIZE=1536
-CONFIG_FS_PROCFS=y
-CONFIG_LCD=y
-CONFIG_LCD_FRAMEBUFFER=y
-CONFIG_LCD_MAX7219=y
-CONFIG_LCD_NOGETRUN=y
-CONFIG_LIBC_LONG_LONG=y
-CONFIG_MAX7219_NHORIZONTALBLKS=4
-CONFIG_MM_REGIONS=2
-CONFIG_MQ_MAXMSGSIZE=64
-CONFIG_NSH_ARCHINIT=y
-CONFIG_NSH_BUILTIN_APPS=y
-CONFIG_NX=y
-CONFIG_NXFONT_MONO5X8=y
-CONFIG_NXSTART_SERVERSTACK=1536
-CONFIG_NX_BLOCKING=y
-CONFIG_NX_MXCLIENTMSGS=32
-CONFIG_PREALLOC_MQ_MSGS=16
-CONFIG_PREALLOC_TIMERS=4
-CONFIG_RAM_SIZE=114688
-CONFIG_RAM_START=0x20000000
-CONFIG_RAW_BINARY=y
-CONFIG_RR_INTERVAL=200
-CONFIG_SCHED_HPWORK=y
-CONFIG_SCHED_HPWORKPRIORITY=192
-CONFIG_SCHED_WAITPID=y
-CONFIG_SDCLONE_DISABLE=y
-CONFIG_SERIAL_TERMIOS=y
-CONFIG_START_DAY=21
-CONFIG_START_MONTH=4
-CONFIG_STM32_JTAG_SW_ENABLE=y
-CONFIG_STM32_PWR=y
-CONFIG_STM32_SPI1=y
-CONFIG_STM32_USART1=y
-CONFIG_SYSTEM_NSH=y
-CONFIG_USART1_RXBUFSIZE=128
-CONFIG_USART1_SERIAL_CONSOLE=y
-CONFIG_USART1_TXBUFSIZE=128
-CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/mmcsdspi/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/mmcsdspi/defconfig
deleted file mode 100644
index f041ade34..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/mmcsdspi/defconfig
+++ /dev/null
@@ -1,74 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_ARCH_FPU is not set
-# CONFIG_MMCSD_HAVE_CARDDETECT is not set
-# CONFIG_MMCSD_HAVE_WRITEPROTECT is not set
-# CONFIG_NSH_ARGCAT is not set
-# CONFIG_NSH_CMDOPT_HEXDUMP is not set
-# CONFIG_NSH_CMDPARMS is not set
-# CONFIG_SPI_CALLBACK is not set
-# CONFIG_STM32_CCMEXCLUDE is not set
-CONFIG_ADD_NUTTX_FETURES=y
-CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="aiit-arm32-board"
-CONFIG_ARCH_BOARD_STM32F4_AIIT=y
-CONFIG_ARCH_BUTTONS=y
-CONFIG_ARCH_CHIP="stm32"
-CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F407VG=y
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_BOARDCTL_RESET=y
-CONFIG_BOARD_LOOPSPERMSEC=16717
-CONFIG_BUILTIN=y
-CONFIG_CODECS_HASH_MD5=y
-CONFIG_DEBUG_FULLOPT=y
-CONFIG_DEBUG_SYMBOLS=y
-CONFIG_EXAMPLES_HELLO=y
-CONFIG_FAT_LFN=y
-CONFIG_FS_FAT=y
-CONFIG_FS_FATTIME=y
-CONFIG_FS_PROCFS=y
-CONFIG_HAVE_CXX=y
-CONFIG_HAVE_CXXINITIALIZE=y
-CONFIG_HEAP_COLORATION=y
-CONFIG_INTELHEX_BINARY=y
-CONFIG_MMCSD=y
-CONFIG_MM_REGIONS=2
-CONFIG_NETUTILS_CODECS=y
-CONFIG_NSH_ARCHINIT=y
-CONFIG_NSH_BUILTIN_APPS=y
-CONFIG_NSH_FILEIOSIZE=512
-CONFIG_NSH_LINELEN=64
-CONFIG_NSH_READLINE=y
-CONFIG_PREALLOC_TIMERS=4
-CONFIG_RAM_SIZE=114688
-CONFIG_RAM_START=0x20000000
-CONFIG_RAW_BINARY=y
-CONFIG_READLINE_CMD_HISTORY=y
-CONFIG_RR_INTERVAL=200
-CONFIG_SCHED_LPWORK=y
-CONFIG_SCHED_LPWORKPRIORITY=30
-CONFIG_SCHED_WAITPID=y
-CONFIG_SDCLONE_DISABLE=y
-CONFIG_SENDFILE_BUFSIZE=1024
-CONFIG_STACK_COLORATION=y
-CONFIG_START_DAY=17
-CONFIG_START_MONTH=10
-CONFIG_START_YEAR=2019
-CONFIG_STM32_DMA1=y
-CONFIG_STM32_DMA2=y
-CONFIG_STM32_JTAG_SW_ENABLE=y
-CONFIG_STM32_PWR=y
-CONFIG_STM32_SPI2=y
-CONFIG_STM32_USART1=y
-CONFIG_SYSTEM_NSH=y
-CONFIG_TESTING_OSTEST=y
-CONFIG_USART1_RXBUFSIZE=128
-CONFIG_USART1_SERIAL_CONSOLE=y
-CONFIG_USART1_TXBUFSIZE=128
-CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/modbus_slave/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/modbus_slave/defconfig
deleted file mode 100644
index 6c8c77411..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/modbus_slave/defconfig
+++ /dev/null
@@ -1,65 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_ARCH_FPU is not set
-# CONFIG_MB_TCP_ENABLED is not set
-# CONFIG_NSH_ARGCAT is not set
-# CONFIG_NSH_CMDOPT_HEXDUMP is not set
-# CONFIG_NSH_CMDPARMS is not set
-# CONFIG_NSH_DISABLE_MB is not set
-# CONFIG_NSH_DISABLE_MH is not set
-# CONFIG_NSH_DISABLE_MW is not set
-CONFIG_ADD_NUTTX_FETURES=y
-CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="aiit-arm32-board"
-CONFIG_ARCH_BOARD_STM32F4_AIIT=y
-CONFIG_ARCH_BUTTONS=y
-CONFIG_ARCH_CHIP="stm32"
-CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F407VG=y
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_BOARD_LATE_INITIALIZE=y
-CONFIG_BOARD_LOOPSPERMSEC=16717
-CONFIG_BUILTIN=y
-CONFIG_EXAMPLES_HELLO=y
-CONFIG_EXAMPLES_MODBUS=y
-CONFIG_EXAMPLES_MODBUS_PORT=1
-CONFIG_FS_PROCFS=y
-CONFIG_HAVE_CXX=y
-CONFIG_HAVE_CXXINITIALIZE=y
-CONFIG_INTELHEX_BINARY=y
-CONFIG_MM_REGIONS=2
-CONFIG_MODBUS=y
-CONFIG_MODBUS_SLAVE=y
-CONFIG_NSH_BUILTIN_APPS=y
-CONFIG_NSH_FILEIOSIZE=512
-CONFIG_NSH_LINELEN=64
-CONFIG_NSH_READLINE=y
-CONFIG_PREALLOC_TIMERS=4
-CONFIG_RAM_SIZE=114688
-CONFIG_RAM_START=0x20000000
-CONFIG_RAW_BINARY=y
-CONFIG_RR_INTERVAL=200
-CONFIG_SCHED_WAITPID=y
-CONFIG_SDCLONE_DISABLE=y
-CONFIG_SERIAL_TERMIOS=y
-CONFIG_START_DAY=6
-CONFIG_START_MONTH=12
-CONFIG_START_YEAR=2011
-CONFIG_STM32_JTAG_SW_ENABLE=y
-CONFIG_STM32_PWR=y
-CONFIG_STM32_SPI1=y
-CONFIG_STM32_USART1=y
-CONFIG_STM32_USART1=y
-CONFIG_SYSTEM_NSH=y
-CONFIG_USART1_BAUD=38400
-CONFIG_USART1_PARITY=2
-CONFIG_USART1_RS485=y
-CONFIG_USART1_RXBUFSIZE=128
-CONFIG_USART1_SERIAL_CONSOLE=y
-CONFIG_USART1_TXBUFSIZE=128
-CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/module/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/module/defconfig
deleted file mode 100644
index 060ecf497..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/module/defconfig
+++ /dev/null
@@ -1,55 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_ARCH_FPU is not set
-# CONFIG_NSH_ARGCAT is not set
-# CONFIG_NSH_CMDOPT_HEXDUMP is not set
-# CONFIG_NSH_CMDPARMS is not set
-CONFIG_ADD_NUTTX_FETURES=y
-CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="aiit-arm32-board"
-CONFIG_ARCH_BOARD_STM32F4_AIIT=y
-CONFIG_ARCH_BUTTONS=y
-CONFIG_ARCH_CHIP="stm32"
-CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F407VG=y
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_BOARDCTL_ROMDISK=y
-CONFIG_BOARD_LOOPSPERMSEC=16717
-CONFIG_BUILTIN=y
-CONFIG_EXAMPLES_MODULE=y
-CONFIG_FS_PROCFS=y
-CONFIG_FS_ROMFS=y
-CONFIG_HAVE_CXX=y
-CONFIG_HAVE_CXXINITIALIZE=y
-CONFIG_INTELHEX_BINARY=y
-CONFIG_MM_REGIONS=2
-CONFIG_MODULE=y
-CONFIG_NSH_ARCHINIT=y
-CONFIG_NSH_BUILTIN_APPS=y
-CONFIG_NSH_FILEIOSIZE=512
-CONFIG_NSH_LINELEN=64
-CONFIG_NSH_READLINE=y
-CONFIG_PREALLOC_TIMERS=4
-CONFIG_RAM_SIZE=114688
-CONFIG_RAM_START=0x20000000
-CONFIG_RAW_BINARY=y
-CONFIG_RR_INTERVAL=200
-CONFIG_SCHED_WAITPID=y
-CONFIG_SDCLONE_DISABLE=y
-CONFIG_START_DAY=6
-CONFIG_START_MONTH=12
-CONFIG_START_YEAR=2011
-CONFIG_STM32_JTAG_SW_ENABLE=y
-CONFIG_STM32_PWR=y
-CONFIG_STM32_SPI1=y
-CONFIG_STM32_USART1=y
-CONFIG_SYSTEM_NSH=y
-CONFIG_USART1_RXBUFSIZE=128
-CONFIG_USART1_SERIAL_CONSOLE=y
-CONFIG_USART1_TXBUFSIZE=128
-CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/netnsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/netnsh/defconfig
deleted file mode 100644
index 9b61d16bd..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/netnsh/defconfig
+++ /dev/null
@@ -1,98 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_ARCH_FPU is not set
-# CONFIG_MMCSD_MMCSUPPORT is not set
-# CONFIG_MMCSD_SPI is not set
-# CONFIG_NSH_ARGCAT is not set
-# CONFIG_NSH_CMDOPT_HEXDUMP is not set
-# CONFIG_NSH_CMDPARMS is not set
-CONFIG_ADD_NUTTX_FETURES=y
-CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="aiit-arm32-board"
-CONFIG_ARCH_BOARD_STM32F4_AIIT=y
-CONFIG_ARCH_BUTTONS=y
-CONFIG_ARCH_CHIP="stm32"
-CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F407VG=y
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_BOARDCTL_RESET=y
-CONFIG_BOARD_LOOPSPERMSEC=16717
-CONFIG_BUILTIN=y
-CONFIG_ETH0_PHY_LAN8720=y
-CONFIG_FAT_LCNAMES=y
-CONFIG_FAT_LFN=y
-CONFIG_FS_FAT=y
-CONFIG_FS_PROCFS=y
-CONFIG_HAVE_CXX=y
-CONFIG_HAVE_CXXINITIALIZE=y
-CONFIG_HOST_WINDOWS=y
-CONFIG_INTELHEX_BINARY=y
-CONFIG_LIBC_HOSTNAME="STM32F4-Discovery"
-CONFIG_MMCSD=y
-CONFIG_MMCSD_MULTIBLOCK_DISABLE=y
-CONFIG_MMCSD_SDIO=y
-CONFIG_NET=y
-CONFIG_NETDB_DNSCLIENT=y
-CONFIG_NETDB_DNSSERVER_NOADDR=y
-CONFIG_NETDEV_PHY_IOCTL=y
-CONFIG_NETINIT_NOMAC=y
-CONFIG_NETINIT_THREAD=y
-CONFIG_NETUTILS_TELNETD=y
-CONFIG_NETUTILS_TFTPC=y
-CONFIG_NETUTILS_WEBCLIENT=y
-CONFIG_NET_ARP_SEND=y
-CONFIG_NET_BROADCAST=y
-CONFIG_NET_ICMP=y
-CONFIG_NET_ICMP_SOCKET=y
-CONFIG_NET_SOLINGER=y
-CONFIG_NET_TCP=y
-CONFIG_NET_TCPBACKLOG=y
-CONFIG_NET_TCP_WRITE_BUFFERS=y
-CONFIG_NET_UDP=y
-CONFIG_NET_UDP_CHECKSUMS=y
-CONFIG_NSH_ARCHINIT=y
-CONFIG_NSH_BUILTIN_APPS=y
-CONFIG_NSH_FILEIOSIZE=512
-CONFIG_NSH_LINELEN=64
-CONFIG_NSH_READLINE=y
-CONFIG_PREALLOC_TIMERS=4
-CONFIG_RAM_SIZE=114688
-CONFIG_RAM_START=0x20000000
-CONFIG_RAW_BINARY=y
-CONFIG_RR_INTERVAL=200
-CONFIG_SCHED_HPWORK=y
-CONFIG_SCHED_HPWORKPRIORITY=192
-CONFIG_SCHED_WAITPID=y
-CONFIG_SDCLONE_DISABLE=y
-CONFIG_START_DAY=13
-CONFIG_START_MONTH=9
-CONFIG_START_YEAR=2014
-CONFIG_STM32F4DISBB=y
-CONFIG_STM32_DMA2=y
-CONFIG_STM32_DMACAPABLE=y
-CONFIG_STM32_ETHMAC=y
-CONFIG_STM32_JTAG_SW_ENABLE=y
-CONFIG_STM32_PHYADDR=0
-CONFIG_STM32_PHYSR=31
-CONFIG_STM32_PHYSR_100FD=0x0018
-CONFIG_STM32_PHYSR_100HD=0x0008
-CONFIG_STM32_PHYSR_10FD=0x0014
-CONFIG_STM32_PHYSR_10HD=0x0004
-CONFIG_STM32_PHYSR_ALTCONFIG=y
-CONFIG_STM32_PHYSR_ALTMODE=0x001c
-CONFIG_STM32_PWR=y
-CONFIG_STM32_RMII_EXTCLK=y
-CONFIG_STM32_SDIO=y
-CONFIG_STM32_SPI1=y
-CONFIG_STM32_USART6=y
-CONFIG_SYSTEM_NSH=y
-CONFIG_SYSTEM_PING=y
-CONFIG_USART6_RXBUFSIZE=64
-CONFIG_USART6_SERIAL_CONSOLE=y
-CONFIG_USART6_TXBUFSIZE=64
-CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/nsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/nsh/defconfig
index 4fd15e399..697a70852 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/nsh/defconfig
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/nsh/defconfig
@@ -21,7 +21,6 @@ CONFIG_ARCH_STACKDUMP=y
 CONFIG_BOARD_LATE_INITIALIZE=y
 CONFIG_BOARD_LOOPSPERMSEC=16717
 CONFIG_BUILTIN=y
-CONFIG_CLOCK_MONOTONIC=y
 CONFIG_EXAMPLES_HELLO=y
 CONFIG_FS_PROCFS=y
 CONFIG_HAVE_CXX=y
@@ -39,7 +38,6 @@ CONFIG_RAM_START=0x20000000
 CONFIG_RAW_BINARY=y
 CONFIG_RR_INTERVAL=200
 CONFIG_SCHED_WAITPID=y
-CONFIG_SDCLONE_DISABLE=y
 CONFIG_START_DAY=6
 CONFIG_START_MONTH=12
 CONFIG_START_YEAR=2011
@@ -51,4 +49,4 @@ CONFIG_SYSTEM_NSH=y
 CONFIG_USART1_RXBUFSIZE=128
 CONFIG_USART1_SERIAL_CONSOLE=y
 CONFIG_USART1_TXBUFSIZE=128
-CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_INIT_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/nxlines/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/nxlines/defconfig
deleted file mode 100644
index 3d3bda7d8..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/nxlines/defconfig
+++ /dev/null
@@ -1,74 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_ARCH_FPU is not set
-# CONFIG_EXAMPLES_NXLINES_DEFAULT_COLORS is not set
-# CONFIG_NXFONTS_DISABLE_16BPP is not set
-# CONFIG_NXTK_DEFAULT_BORDERCOLORS is not set
-# CONFIG_NX_DISABLE_16BPP is not set
-# CONFIG_NX_PACKEDMSFIRST is not set
-CONFIG_ADD_NUTTX_FETURES=y
-CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="aiit-arm32-board"
-CONFIG_ARCH_BOARD_STM32F4_AIIT=y
-CONFIG_ARCH_BUTTONS=y
-CONFIG_ARCH_CHIP="stm32"
-CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F407VG=y
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_BOARD_LOOPSPERMSEC=16717
-CONFIG_EXAMPLES_NXLINES=y
-CONFIG_EXAMPLES_NXLINES_BGCOLOR=0x0320
-CONFIG_EXAMPLES_NXLINES_BORDERCOLOR=0xffe0
-CONFIG_EXAMPLES_NXLINES_BORDERWIDTH=4
-CONFIG_EXAMPLES_NXLINES_BPP=16
-CONFIG_EXAMPLES_NXLINES_CIRCLECOLOR=0xf7bb
-CONFIG_EXAMPLES_NXLINES_LINECOLOR=0xffe0
-CONFIG_FS_PROCFS=y
-CONFIG_HAVE_CXX=y
-CONFIG_HAVE_CXXINITIALIZE=y
-CONFIG_HOST_WINDOWS=y
-CONFIG_INTELHEX_BINARY=y
-CONFIG_LCD=y
-CONFIG_LCD_MAXCONTRAST=1
-CONFIG_LCD_MAXPOWER=255
-CONFIG_LCD_SSD1289=y
-CONFIG_MM_REGIONS=2
-CONFIG_MQ_MAXMSGSIZE=64
-CONFIG_NSH_FILEIOSIZE=512
-CONFIG_NSH_LIBRARY=y
-CONFIG_NSH_LINELEN=64
-CONFIG_NSH_READLINE=y
-CONFIG_NX=y
-CONFIG_NXFONT_SANS22X29B=y
-CONFIG_NXFONT_SANS23X27=y
-CONFIG_NXTK_BORDERCOLOR1=0x5cb7
-CONFIG_NXTK_BORDERCOLOR2=0x21c9
-CONFIG_NXTK_BORDERCOLOR3=0xffdf
-CONFIG_NX_BLOCKING=y
-CONFIG_NX_KBD=y
-CONFIG_NX_XYINPUT_MOUSE=y
-CONFIG_PREALLOC_TIMERS=4
-CONFIG_RAM_SIZE=114688
-CONFIG_RAM_START=0x20000000
-CONFIG_RAW_BINARY=y
-CONFIG_RR_INTERVAL=200
-CONFIG_SCHED_WAITPID=y
-CONFIG_SDCLONE_DISABLE=y
-CONFIG_START_DAY=6
-CONFIG_START_MONTH=12
-CONFIG_START_YEAR=2011
-CONFIG_STM32_FSMC=y
-CONFIG_STM32_JTAG_SW_ENABLE=y
-CONFIG_STM32_PWR=y
-CONFIG_STM32_SPI1=y
-CONFIG_STM32_USART1=y
-CONFIG_SYMTAB_ORDEREDBYNAME=y
-CONFIG_USART1_RXBUFSIZE=128
-CONFIG_USART1_SERIAL_CONSOLE=y
-CONFIG_USART1_TXBUFSIZE=128
-CONFIG_USER_ENTRYPOINT="nxlines_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/pm/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/pm/defconfig
deleted file mode 100644
index 8583cdca7..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/pm/defconfig
+++ /dev/null
@@ -1,57 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_ARCH_FPU is not set
-# CONFIG_ARCH_LEDS is not set
-CONFIG_ADD_NUTTX_FETURES=y
-CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="aiit-arm32-board"
-CONFIG_ARCH_BOARD_STM32F4_AIIT=y
-CONFIG_ARCH_BUTTONS=y
-CONFIG_ARCH_CHIP="stm32"
-CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F407VG=y
-CONFIG_ARCH_CUSTOM_PMINIT=y
-CONFIG_ARCH_IDLE_CUSTOM=y
-CONFIG_ARCH_IRQBUTTONS=y
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_BOARD_LOOPSPERMSEC=16717
-CONFIG_BUILTIN=y
-CONFIG_FS_PROCFS=y
-CONFIG_HAVE_CXX=y
-CONFIG_HAVE_CXXINITIALIZE=y
-CONFIG_HOST_WINDOWS=y
-CONFIG_INTELHEX_BINARY=y
-CONFIG_MM_REGIONS=2
-CONFIG_NSH_BUILTIN_APPS=y
-CONFIG_NSH_FILEIOSIZE=512
-CONFIG_NSH_LINELEN=64
-CONFIG_NSH_READLINE=y
-CONFIG_PM=y
-CONFIG_PM_BUTTONS=y
-CONFIG_PREALLOC_TIMERS=4
-CONFIG_RAM_SIZE=114688
-CONFIG_RAM_START=0x20000000
-CONFIG_RAW_BINARY=y
-CONFIG_RR_INTERVAL=200
-CONFIG_RTC_ALARM=y
-CONFIG_RTC_DATETIME=y
-CONFIG_SCHED_HPWORK=y
-CONFIG_SCHED_HPWORKPRIORITY=192
-CONFIG_SCHED_HPWORKSTACKSIZE=1024
-CONFIG_SCHED_WAITPID=y
-CONFIG_SDCLONE_DISABLE=y
-CONFIG_STM32_JTAG_SW_ENABLE=y
-CONFIG_STM32_PWR=y
-CONFIG_STM32_RTC=y
-CONFIG_STM32_TIM1=y
-CONFIG_STM32_USART1=y
-CONFIG_SYSTEM_NSH=y
-CONFIG_USART1_RXBUFSIZE=128
-CONFIG_USART1_SERIAL_CONSOLE=y
-CONFIG_USART1_TXBUFSIZE=128
-CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/posix_spawn/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/posix_spawn/defconfig
deleted file mode 100644
index 21b83ee56..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/posix_spawn/defconfig
+++ /dev/null
@@ -1,51 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_ARCH_FPU is not set
-CONFIG_ADD_NUTTX_FETURES=y
-CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="aiit-arm32-board"
-CONFIG_ARCH_BOARD_STM32F4_AIIT=y
-CONFIG_ARCH_CHIP="stm32"
-CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F407VG=y
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_BINFMT_CONSTRUCTORS=y
-CONFIG_BOARDCTL=y
-CONFIG_BOARDCTL_APP_SYMTAB=y
-CONFIG_BOARDCTL_ROMDISK=y
-CONFIG_BOARD_LOOPSPERMSEC=16717
-CONFIG_CONSOLE_SYSLOG=y
-CONFIG_ELF=y
-CONFIG_EXAMPLES_POSIXSPAWN=y
-CONFIG_EXECFUNCS_HAVE_SYMTAB=y
-CONFIG_EXECFUNCS_NSYMBOLS_VAR="g_spawn_nexports"
-CONFIG_EXECFUNCS_SYMTAB_ARRAY="g_spawn_exports"
-CONFIG_FS_ROMFS=y
-CONFIG_HAVE_CXX=y
-CONFIG_INTELHEX_BINARY=y
-CONFIG_LIBC_ENVPATH=y
-CONFIG_LIBC_EXECFUNCS=y
-CONFIG_MM_REGIONS=2
-CONFIG_PATH_INITIAL="/mnt/romfs"
-CONFIG_PREALLOC_TIMERS=4
-CONFIG_RAM_SIZE=114688
-CONFIG_RAM_START=0x20000000
-CONFIG_RAW_BINARY=y
-CONFIG_RR_INTERVAL=200
-CONFIG_SCHED_STARTHOOK=y
-CONFIG_SDCLONE_DISABLE=y
-CONFIG_START_DAY=26
-CONFIG_START_MONTH=10
-CONFIG_START_YEAR=2012
-CONFIG_STM32_JTAG_SW_ENABLE=y
-CONFIG_STM32_USART1=y
-CONFIG_SYMTAB_ORDEREDBYNAME=y
-CONFIG_USART1_RXBUFSIZE=128
-CONFIG_USART1_SERIAL_CONSOLE=y
-CONFIG_USART1_TXBUFSIZE=128
-CONFIG_USER_ENTRYPOINT="posix_spawn_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/pseudoterm/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/pseudoterm/defconfig
deleted file mode 100644
index 404f7309e..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/pseudoterm/defconfig
+++ /dev/null
@@ -1,55 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_ARCH_FPU is not set
-# CONFIG_NSH_ARGCAT is not set
-# CONFIG_NSH_CMDOPT_HEXDUMP is not set
-# CONFIG_NSH_CMDPARMS is not set
-CONFIG_ADD_NUTTX_FETURES=y
-CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="aiit-arm32-board"
-CONFIG_ARCH_BOARD_STM32F4_AIIT=y
-CONFIG_ARCH_BUTTONS=y
-CONFIG_ARCH_CHIP="stm32"
-CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F407VG=y
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_BOARD_LOOPSPERMSEC=16717
-CONFIG_BUILTIN=y
-CONFIG_EXAMPLES_PTYTEST=y
-CONFIG_EXAMPLES_PTYTEST_POLL=y
-CONFIG_FS_PROCFS=y
-CONFIG_HAVE_CXX=y
-CONFIG_HAVE_CXXINITIALIZE=y
-CONFIG_INTELHEX_BINARY=y
-CONFIG_MM_REGIONS=2
-CONFIG_NSH_BUILTIN_APPS=y
-CONFIG_NSH_FILEIOSIZE=512
-CONFIG_NSH_LINELEN=64
-CONFIG_NSH_READLINE=y
-CONFIG_PREALLOC_TIMERS=4
-CONFIG_PSEUDOTERM=y
-CONFIG_RAM_SIZE=114688
-CONFIG_RAM_START=0x20000000
-CONFIG_RAW_BINARY=y
-CONFIG_RR_INTERVAL=200
-CONFIG_SCHED_WAITPID=y
-CONFIG_SDCLONE_DISABLE=y
-CONFIG_SERIAL_TERMIOS=y
-CONFIG_START_DAY=6
-CONFIG_START_MONTH=12
-CONFIG_START_YEAR=2011
-CONFIG_STM32_JTAG_SW_ENABLE=y
-CONFIG_STM32_PWR=y
-CONFIG_STM32_SPI1=y
-CONFIG_STM32_USART1=y
-CONFIG_STM32_USART3=y
-CONFIG_SYSTEM_NSH=y
-CONFIG_USART1_RXBUFSIZE=128
-CONFIG_USART1_SERIAL_CONSOLE=y
-CONFIG_USART1_TXBUFSIZE=128
-CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/rgbled/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/rgbled/defconfig
deleted file mode 100644
index ad09c7e54..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/rgbled/defconfig
+++ /dev/null
@@ -1,65 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_ARCH_FPU is not set
-# CONFIG_NSH_ARGCAT is not set
-# CONFIG_NSH_CMDOPT_HEXDUMP is not set
-# CONFIG_NSH_CMDPARMS is not set
-CONFIG_ADD_NUTTX_FETURES=y
-CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="aiit-arm32-board"
-CONFIG_ARCH_BOARD_STM32F4_AIIT=y
-CONFIG_ARCH_BUTTONS=y
-CONFIG_ARCH_CHIP="stm32"
-CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F407VG=y
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_BOARD_LATE_INITIALIZE=y
-CONFIG_BOARD_LOOPSPERMSEC=16717
-CONFIG_BUILTIN=y
-CONFIG_EXAMPLES_RGBLED=y
-CONFIG_FS_PROCFS=y
-CONFIG_HAVE_CXX=y
-CONFIG_HAVE_CXXINITIALIZE=y
-CONFIG_INTELHEX_BINARY=y
-CONFIG_MM_REGIONS=2
-CONFIG_NSH_BUILTIN_APPS=y
-CONFIG_NSH_FILEIOSIZE=512
-CONFIG_NSH_LINELEN=64
-CONFIG_NSH_READLINE=y
-CONFIG_PREALLOC_TIMERS=4
-CONFIG_PWM=y
-CONFIG_RAM_SIZE=114688
-CONFIG_RAM_START=0x20000000
-CONFIG_RAW_BINARY=y
-CONFIG_RGBLED=y
-CONFIG_RR_INTERVAL=200
-CONFIG_SCHED_WAITPID=y
-CONFIG_SDCLONE_DISABLE=y
-CONFIG_START_DAY=6
-CONFIG_START_MONTH=12
-CONFIG_START_YEAR=2011
-CONFIG_STM32_JTAG_SW_ENABLE=y
-CONFIG_STM32_OTGFS=y
-CONFIG_STM32_PWR=y
-CONFIG_STM32_SPI1=y
-CONFIG_STM32_TIM1=y
-CONFIG_STM32_TIM1_PWM=y
-CONFIG_STM32_TIM2=y
-CONFIG_STM32_TIM2_CH2OUT=y
-CONFIG_STM32_TIM2_CHANNEL=2
-CONFIG_STM32_TIM2_PWM=y
-CONFIG_STM32_TIM3=y
-CONFIG_STM32_TIM3_CH3OUT=y
-CONFIG_STM32_TIM3_CHANNEL=3
-CONFIG_STM32_TIM3_PWM=y
-CONFIG_STM32_USART1=y
-CONFIG_SYSTEM_NSH=y
-CONFIG_USART1_RXBUFSIZE=128
-CONFIG_USART1_SERIAL_CONSOLE=y
-CONFIG_USART1_TXBUFSIZE=128
-CONFIG_USER_ENTRYPOINT="rgbled_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/rndis/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/rndis/defconfig
deleted file mode 100644
index adfced3dd..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/rndis/defconfig
+++ /dev/null
@@ -1,101 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_ARCH_FPU is not set
-# CONFIG_NSH_ARGCAT is not set
-# CONFIG_NSH_CMDOPT_HEXDUMP is not set
-# CONFIG_NSH_CMDPARMS is not set
-CONFIG_ADD_NUTTX_FETURES=y
-CONFIG_ALLOW_BSD_COMPONENTS=y
-CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="aiit-arm32-board"
-CONFIG_ARCH_BOARD_STM32F4_AIIT=y
-CONFIG_ARCH_BUTTONS=y
-CONFIG_ARCH_CHIP="stm32"
-CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F407VG=y
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_BOARDCTL_RESET=y
-CONFIG_BOARDCTL_USBDEVCTRL=y
-CONFIG_BOARD_LOOPSPERMSEC=16717
-CONFIG_BUILTIN=y
-CONFIG_CLOCK_MONOTONIC=y
-CONFIG_DEBUG_FULLOPT=y
-CONFIG_DEBUG_SYMBOLS=y
-CONFIG_ELF=y
-CONFIG_EXAMPLES_HELLO=m
-CONFIG_FAT_LCNAMES=y
-CONFIG_FAT_LFN=y
-CONFIG_FS_FAT=y
-CONFIG_FS_PROCFS=y
-CONFIG_HAVE_CXX=y
-CONFIG_HAVE_CXXINITIALIZE=y
-CONFIG_HOST_WINDOWS=y
-CONFIG_INTELHEX_BINARY=y
-CONFIG_LIBC_ENVPATH=y
-CONFIG_LIBC_EXECFUNCS=y
-CONFIG_NET=y
-CONFIG_NETDB_DNSCLIENT=y
-CONFIG_NETDB_DNSSERVER_IPv4ADDR=0x0
-CONFIG_NETDEVICES=y
-CONFIG_NETINIT_DHCPC=y
-CONFIG_NETINIT_DRIPADDR=0x0
-CONFIG_NETINIT_MACADDR_1=0xdeadcafe
-CONFIG_NETINIT_NETMASK=0x0
-CONFIG_NETINIT_NOMAC=y
-CONFIG_NETINIT_THREAD=y
-CONFIG_NETUTILS_DHCPC=y
-CONFIG_NETUTILS_TELNETD=y
-CONFIG_NETUTILS_WEBCLIENT=y
-CONFIG_NET_ARP_SEND=y
-CONFIG_NET_BROADCAST=y
-CONFIG_NET_ICMP=y
-CONFIG_NET_ICMP_SOCKET=y
-CONFIG_NET_LOOPBACK=y
-CONFIG_NET_STATISTICS=y
-CONFIG_NET_TCP=y
-CONFIG_NET_TCP_WRITE_BUFFERS=y
-CONFIG_NET_UDP=y
-CONFIG_NFS=y
-CONFIG_NFS_STATISTICS=y
-CONFIG_NSH_ARCHINIT=y
-CONFIG_NSH_BUILTIN_APPS=y
-CONFIG_NSH_FILEIOSIZE=512
-CONFIG_NSH_FILE_APPS=y
-CONFIG_NSH_LINELEN=128
-CONFIG_NSH_READLINE=y
-CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=3072
-CONFIG_PATH_INITIAL="/mnt/nfs/bin"
-CONFIG_PREALLOC_TIMERS=4
-CONFIG_RAM_SIZE=114688
-CONFIG_RAM_START=0x20000000
-CONFIG_RAW_BINARY=y
-CONFIG_RNDIS=y
-CONFIG_SCHED_LPWORK=y
-CONFIG_SCHED_WAITPID=y
-CONFIG_SDCLONE_DISABLE=y
-CONFIG_SENSORS=y
-CONFIG_START_DAY=13
-CONFIG_START_MONTH=9
-CONFIG_START_YEAR=2014
-CONFIG_STM32_DMA2=y
-CONFIG_STM32_DMACAPABLE=y
-CONFIG_STM32_JTAG_SW_ENABLE=y
-CONFIG_STM32_OTGFS=y
-CONFIG_STM32_PWR=y
-CONFIG_STM32_SPI1=y
-CONFIG_STM32_USART1=y
-CONFIG_SYMTAB_ORDEREDBYNAME=y
-CONFIG_SYSTEM_NSH=y
-CONFIG_SYSTEM_NSH_SYMTAB=y
-CONFIG_SYSTEM_NSH_SYMTAB_ARRAYNAME="g_symtab"
-CONFIG_SYSTEM_NSH_SYMTAB_COUNTNAME="g_nsymbols"
-CONFIG_SYSTEM_PING=y
-CONFIG_USART1_SERIAL_CONSOLE=y
-CONFIG_USBDEV=y
-CONFIG_USERMAIN_STACKSIZE=3072
-CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/sporadic/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/sporadic/defconfig
deleted file mode 100644
index 4e0245440..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/sporadic/defconfig
+++ /dev/null
@@ -1,53 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_ARCH_FPU is not set
-# CONFIG_NSH_ARGCAT is not set
-# CONFIG_NSH_CMDOPT_HEXDUMP is not set
-# CONFIG_NSH_CMDPARMS is not set
-CONFIG_ADD_NUTTX_FETURES=y
-CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="aiit-arm32-board"
-CONFIG_ARCH_BOARD_STM32F4_AIIT=y
-CONFIG_ARCH_BUTTONS=y
-CONFIG_ARCH_CHIP="stm32"
-CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F407VG=y
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_BOARD_LATE_INITIALIZE=y
-CONFIG_BOARD_LOOPSPERMSEC=16717
-CONFIG_BUILTIN=y
-CONFIG_FS_PROCFS=y
-CONFIG_HOST_WINDOWS=y
-CONFIG_INTELHEX_BINARY=y
-CONFIG_MM_REGIONS=2
-CONFIG_NSH_BUILTIN_APPS=y
-CONFIG_NSH_FILEIOSIZE=512
-CONFIG_NSH_LINELEN=64
-CONFIG_NSH_READLINE=y
-CONFIG_PREALLOC_TIMERS=4
-CONFIG_RAM_SIZE=114688
-CONFIG_RAM_START=0x20000000
-CONFIG_RAW_BINARY=y
-CONFIG_SCHED_SPORADIC=y
-CONFIG_SCHED_SPORADIC_MAXREPL=5
-CONFIG_SCHED_WAITPID=y
-CONFIG_SDCLONE_DISABLE=y
-CONFIG_START_DAY=6
-CONFIG_START_MONTH=3
-CONFIG_START_YEAR=2021
-CONFIG_STM32_JTAG_SW_ENABLE=y
-CONFIG_STM32_PWR=y
-CONFIG_STM32_SPI1=y
-CONFIG_STM32_USART6=y
-CONFIG_SYSTEM_NSH=y
-CONFIG_TESTING_OSTEST=y
-CONFIG_USART6_RXBUFSIZE=128
-CONFIG_USART6_SERIAL_CONSOLE=y
-CONFIG_USART6_TXBUFSIZE=128
-CONFIG_USEC_PER_TICK=1000
-CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/st7789/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/st7789/defconfig
deleted file mode 100644
index 61bd8edf9..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/st7789/defconfig
+++ /dev/null
@@ -1,68 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_ARCH_FPU is not set
-# CONFIG_NSH_ARGCAT is not set
-# CONFIG_NSH_CMDOPT_HEXDUMP is not set
-# CONFIG_NSH_CMDPARMS is not set
-CONFIG_ADD_NUTTX_FETURES=y
-CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="aiit-arm32-board"
-CONFIG_ARCH_BOARD_STM32F4_AIIT=y
-CONFIG_ARCH_BUTTONS=y
-CONFIG_ARCH_CHIP="stm32"
-CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F407VG=y
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_BOARD_LATE_INITIALIZE=y
-CONFIG_BOARD_LOOPSPERMSEC=16717
-CONFIG_BUILTIN=y
-CONFIG_DRIVERS_VIDEO=y
-CONFIG_EXAMPLES_FB=y
-CONFIG_EXAMPLES_HELLO=y
-CONFIG_FS_PROCFS=y
-CONFIG_HAVE_CXX=y
-CONFIG_HAVE_CXXINITIALIZE=y
-CONFIG_INTELHEX_BINARY=y
-CONFIG_LCD=y
-CONFIG_LCD_FRAMEBUFFER=y
-CONFIG_LCD_NOGETRUN=y
-CONFIG_LCD_PORTRAIT=y
-CONFIG_LCD_ST7789=y
-CONFIG_MM_REGIONS=2
-CONFIG_NSH_ARCHINIT=y
-CONFIG_NSH_BUILTIN_APPS=y
-CONFIG_NSH_FILEIOSIZE=512
-CONFIG_NSH_LINELEN=64
-CONFIG_NSH_READLINE=y
-CONFIG_NXFONTS_DISABLE_1BPP=y
-CONFIG_NXFONTS_DISABLE_24BPP=y
-CONFIG_NXFONTS_DISABLE_2BPP=y
-CONFIG_NXFONTS_DISABLE_32BPP=y
-CONFIG_NXFONTS_DISABLE_4BPP=y
-CONFIG_NXFONTS_DISABLE_8BPP=y
-CONFIG_PREALLOC_TIMERS=4
-CONFIG_RAM_SIZE=114688
-CONFIG_RAM_START=0x20000000
-CONFIG_RAW_BINARY=y
-CONFIG_RR_INTERVAL=200
-CONFIG_SCHED_WAITPID=y
-CONFIG_SDCLONE_DISABLE=y
-CONFIG_SPI_CMDDATA=y
-CONFIG_START_DAY=6
-CONFIG_START_MONTH=12
-CONFIG_START_YEAR=2011
-CONFIG_STM32_JTAG_SW_ENABLE=y
-CONFIG_STM32_PWR=y
-CONFIG_STM32_SPI1=y
-CONFIG_STM32_USART1=y
-CONFIG_SYSTEM_NSH=y
-CONFIG_USART1_RXBUFSIZE=128
-CONFIG_USART1_SERIAL_CONSOLE=y
-CONFIG_USART1_TXBUFSIZE=128
-CONFIG_USER_ENTRYPOINT="nsh_main"
-CONFIG_VIDEO_FB=y
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/testlibcxx/Make.defs b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/testlibcxx/Make.defs
deleted file mode 100644
index 0d729085f..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/testlibcxx/Make.defs
+++ /dev/null
@@ -1,70 +0,0 @@
-############################################################################
-# boards/arm/stm32/aiit-arm32-board/configs/testlibcxx/Make.defs
-#
-# Licensed to the Apache Software Foundation (ASF) under one or more
-# contributor license agreements.  See the NOTICE file distributed with
-# this work for additional information regarding copyright ownership.  The
-# ASF licenses this file to you under the Apache License, Version 2.0 (the
-# "License"); you may not use this file except in compliance with the
-# License.  You may obtain a copy of the License at
-#
-#   http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
-# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
-# License for the specific language governing permissions and limitations
-# under the License.
-#
-############################################################################
-
-include $(TOPDIR)/.config
-include $(TOPDIR)/tools/Config.mk
-include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs
-
-LDSCRIPT = ld.script
-ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
-  ARCHSCRIPT = -T "${shell cygpath -w \
-                   $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}"
-else
-  ARCHSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
-endif
-
-ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
-  ARCHOPTIMIZATION = -g
-endif
-
-ifneq ($(CONFIG_DEBUG_NOOPT),y)
-  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing \
-                      -fno-strength-reduce -fomit-frame-pointer
-endif
-
-ARCHCFLAGS = -fno-builtin
-ifeq ($(CONFIG_CXX_EXCEPTION),y)
-  ARCHCPUFLAGSXX = -fno-builtin
-else
-  ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fcheck-new
-endif
-ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
-ARCHWARNINGSXX = -Wall -Wshadow -Wundef
-ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
-
-CFLAGS := $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) \
-         $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
-CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
-CXXFLAGS  = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \
-            $(ARCHCPUFLAGS) $(ARCHXXINCLUDES)
-CXXFLAGS += $(ARCHDEFINES) $(EXTRAFLAGS) -pipe -std=c++11
-CXXFLAGS += -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
-CXXFLAGS += -pedantic -D_DEBUG -D_LIBCPP_BUILD_STATIC -D_LIBCPP_NO_EXCEPTIONS
-CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
-CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
-AFLAGS := $(CFLAGS) -D__ASSEMBLY__
-
-NXFLATLDFLAGS1 = -r -d -warn-common
-NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
-LDNXFLATFLAGS = -e main -s 2048
-
-ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
-  LDFLAGS += -g
-endif
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/testlibcxx/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/testlibcxx/defconfig
deleted file mode 100644
index c70ac036b..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/testlibcxx/defconfig
+++ /dev/null
@@ -1,53 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_ARCH_FPU is not set
-CONFIG_ADD_NUTTX_FETURES=y
-CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="aiit-arm32-board"
-CONFIG_ARCH_BOARD_STM32F4_AIIT=y
-CONFIG_ARCH_CHIP="stm32"
-CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F407VG=y
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
-CONFIG_BOARD_LOOPSPERMSEC=16717
-CONFIG_BUILTIN=y
-CONFIG_C99_BOOL8=y
-CONFIG_DISABLE_MOUNTPOINT=y
-CONFIG_EXAMPLES_HELLOXX=y
-CONFIG_HAVE_CXX=y
-CONFIG_HOST_WINDOWS=y
-CONFIG_INTELHEX_BINARY=y
-CONFIG_LIBCXX=y
-CONFIG_LIBCXXABI=y
-CONFIG_LIBC_FLOATINGPOINT=y
-CONFIG_LIBC_LOCALTIME=y
-CONFIG_LIBM=y
-CONFIG_MM_REGIONS=2
-CONFIG_NSH_BUILTIN_APPS=y
-CONFIG_NSH_FILEIOSIZE=512
-CONFIG_PREALLOC_TIMERS=4
-CONFIG_RAM_SIZE=114688
-CONFIG_RAM_START=0x20000000
-CONFIG_RAW_BINARY=y
-CONFIG_RR_INTERVAL=200
-CONFIG_SCHED_ONEXIT=y
-CONFIG_SCHED_ONEXIT_MAX=4
-CONFIG_SCHED_WAITPID=y
-CONFIG_SDCLONE_DISABLE=y
-CONFIG_START_DAY=2
-CONFIG_START_MONTH=11
-CONFIG_START_YEAR=2012
-CONFIG_STM32_JTAG_SW_ENABLE=y
-CONFIG_STM32_USART1=y
-CONFIG_SYMTAB_ORDEREDBYNAME=y
-CONFIG_SYSTEM_NSH=y
-CONFIG_USART1_RXBUFSIZE=128
-CONFIG_USART1_SERIAL_CONSOLE=y
-CONFIG_USART1_TXBUFSIZE=128
-CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/usbmsc/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/usbmsc/defconfig
deleted file mode 100644
index 86e58275b..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/usbmsc/defconfig
+++ /dev/null
@@ -1,61 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_ARCH_FPU is not set
-CONFIG_ADD_NUTTX_FETURES=y
-CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="aiit-arm32-board"
-CONFIG_ARCH_BOARD_STM32F4_AIIT=y
-CONFIG_ARCH_BUTTONS=y
-CONFIG_ARCH_CHIP="stm32"
-CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F407VG=y
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_BOARD_LOOPSPERMSEC=16717
-CONFIG_BUILTIN=y
-CONFIG_DEBUG_SYMBOLS=y
-CONFIG_FAT_LCNAMES=y
-CONFIG_FAT_LFN=y
-CONFIG_FS_FAT=y
-CONFIG_FS_PROCFS=y
-CONFIG_HAVE_CXX=y
-CONFIG_HAVE_CXXINITIALIZE=y
-CONFIG_INTELHEX_BINARY=y
-CONFIG_MM_REGIONS=2
-CONFIG_NSH_ARCHINIT=y
-CONFIG_NSH_BUILTIN_APPS=y
-CONFIG_NSH_DISABLE_IFUPDOWN=y
-CONFIG_NSH_FILEIOSIZE=512
-CONFIG_NSH_LINELEN=64
-CONFIG_NSH_READLINE=y
-CONFIG_PREALLOC_TIMERS=4
-CONFIG_RAM_SIZE=114688
-CONFIG_RAM_START=0x20000000
-CONFIG_RAW_BINARY=y
-CONFIG_RR_INTERVAL=200
-CONFIG_SCHED_HPWORK=y
-CONFIG_SCHED_HPWORKPRIORITY=192
-CONFIG_SCHED_WAITPID=y
-CONFIG_SDCLONE_DISABLE=y
-CONFIG_START_DAY=27
-CONFIG_START_YEAR=2013
-CONFIG_STM32_JTAG_SW_ENABLE=y
-CONFIG_STM32_OTGFS=y
-CONFIG_STM32_PWR=y
-CONFIG_STM32_SPI1=y
-CONFIG_STM32_USART1=y
-CONFIG_SYSLOG_CHAR=y
-CONFIG_SYSLOG_DEVPATH="/dev/ttyS0"
-CONFIG_SYSTEM_NSH=y
-CONFIG_SYSTEM_USBMSC=y
-CONFIG_SYSTEM_USBMSC_DEVPATH1="/dev/ram0"
-CONFIG_TASK_NAME_SIZE=0
-CONFIG_USART1_SERIAL_CONSOLE=y
-CONFIG_USBDEV=y
-CONFIG_USBMSC=y
-CONFIG_USBMSC_REMOVABLE=y
-CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/usbnsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/usbnsh/defconfig
deleted file mode 100644
index c51b2589e..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/usbnsh/defconfig
+++ /dev/null
@@ -1,60 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_ARCH_FPU is not set
-# CONFIG_DEV_CONSOLE is not set
-CONFIG_ADD_NUTTX_FETURES=y
-CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="aiit-arm32-board"
-CONFIG_ARCH_BOARD_STM32F4_AIIT=y
-CONFIG_ARCH_BUTTONS=y
-CONFIG_ARCH_CHIP="stm32"
-CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F407VG=y
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_BOARDCTL_USBDEVCTRL=y
-CONFIG_BOARD_LOOPSPERMSEC=16717
-CONFIG_BUILTIN=y
-CONFIG_CDCACM=y
-CONFIG_CDCACM_CONSOLE=y
-CONFIG_CDCACM_RXBUFSIZE=256
-CONFIG_CDCACM_TXBUFSIZE=256
-CONFIG_DEBUG_FULLOPT=y
-CONFIG_DEBUG_SYMBOLS=y
-CONFIG_EXAMPLES_HELLO=y
-CONFIG_FS_PROCFS=y
-CONFIG_HAVE_CXX=y
-CONFIG_HAVE_CXXINITIALIZE=y
-CONFIG_IDLETHREAD_STACKSIZE=2048
-CONFIG_INTELHEX_BINARY=y
-CONFIG_MM_REGIONS=2
-CONFIG_NSH_ARCHINIT=y
-CONFIG_NSH_BUILTIN_APPS=y
-CONFIG_NSH_FILEIOSIZE=512
-CONFIG_NSH_LINELEN=64
-CONFIG_NSH_READLINE=y
-CONFIG_PREALLOC_TIMERS=4
-CONFIG_RAMLOG=y
-CONFIG_RAMLOG_BUFSIZE=4096
-CONFIG_RAMLOG_SYSLOG=y
-CONFIG_RAM_SIZE=114688
-CONFIG_RAM_START=0x20000000
-CONFIG_RAW_BINARY=y
-CONFIG_RR_INTERVAL=200
-CONFIG_SCHED_WAITPID=y
-CONFIG_SDCLONE_DISABLE=y
-CONFIG_STACK_COLORATION=y
-CONFIG_START_DAY=27
-CONFIG_START_YEAR=2013
-CONFIG_STM32_JTAG_SW_ENABLE=y
-CONFIG_STM32_OTGFS=y
-CONFIG_STM32_PWR=y
-CONFIG_STM32_SPI1=y
-CONFIG_STM32_USART1=y
-CONFIG_SYSTEM_NSH=y
-CONFIG_USBDEV=y
-CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/wifi/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/wifi/defconfig
deleted file mode 100644
index 462474f24..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/wifi/defconfig
+++ /dev/null
@@ -1,112 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_MMCSD_HAVE_CARDDETECT is not set
-# CONFIG_MMCSD_HAVE_WRITEPROTECT is not set
-# CONFIG_NSH_ARGCAT is not set
-# CONFIG_NSH_CMDOPT_HEXDUMP is not set
-# CONFIG_NSH_CMDPARMS is not set
-# CONFIG_SPI_CALLBACK is not set
-CONFIG_ADD_NUTTX_FETURES=y
-CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="aiit-arm32-board"
-CONFIG_ARCH_BOARD_STM32F4_AIIT=y
-CONFIG_ARCH_BUTTONS=y
-CONFIG_ARCH_CHIP="stm32"
-CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F407VG=y
-CONFIG_ARCH_INTERRUPTSTACK=2048
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_ARMV7M_LAZYFPU=y
-CONFIG_BOARDCTL_RESET=y
-CONFIG_BOARD_LOOPSPERMSEC=16717
-CONFIG_BUILTIN=y
-CONFIG_CODECS_HASH_MD5=y
-CONFIG_DEBUG_FULLOPT=y
-CONFIG_DEBUG_HARDFAULT_ALERT=y
-CONFIG_DEBUG_SYMBOLS=y
-CONFIG_DRIVERS_WIRELESS=y
-CONFIG_ELF=y
-CONFIG_EXAMPLES_HELLO=m
-CONFIG_EXAMPLES_WEBSERVER=y
-CONFIG_FAT_LFN=y
-CONFIG_FS_FAT=y
-CONFIG_FS_FATTIME=y
-CONFIG_FS_PROCFS=y
-CONFIG_HAVE_CXX=y
-CONFIG_HAVE_CXXINITIALIZE=y
-CONFIG_HEAP_COLORATION=y
-CONFIG_INTELHEX_BINARY=y
-CONFIG_LIBC_ENVPATH=y
-CONFIG_LIBC_EXECFUNCS=y
-CONFIG_MMCSD=y
-CONFIG_MM_REGIONS=2
-CONFIG_NET=y
-CONFIG_NETDB_DNSCLIENT=y
-CONFIG_NETDEVICES=y
-CONFIG_NETINIT_NETLOCAL=y
-CONFIG_NETUTILS_CODECS=y
-CONFIG_NETUTILS_FTPC=y
-CONFIG_NETUTILS_HTTPD_DIRLIST=y
-CONFIG_NETUTILS_HTTPD_SENDFILE=y
-CONFIG_NETUTILS_TELNETD=y
-CONFIG_NETUTILS_WEBCLIENT=y
-CONFIG_NETUTILS_WEBSERVER=y
-CONFIG_NET_BROADCAST=y
-CONFIG_NET_ICMP=y
-CONFIG_NET_TCP_NO_STACK=y
-CONFIG_NET_UDP_NO_STACK=y
-CONFIG_NET_USRSOCK=y
-CONFIG_NET_USRSOCK_CONNS=16
-CONFIG_NET_USRSOCK_UDP=y
-CONFIG_NSH_ARCHINIT=y
-CONFIG_NSH_BUILTIN_APPS=y
-CONFIG_NSH_FILEIOSIZE=512
-CONFIG_NSH_LINELEN=64
-CONFIG_NSH_READLINE=y
-CONFIG_PATH_INITIAL="/mnt/sd0/bin"
-CONFIG_PREALLOC_TIMERS=4
-CONFIG_RAM_SIZE=114688
-CONFIG_RAM_START=0x20000000
-CONFIG_RAW_BINARY=y
-CONFIG_READLINE_CMD_HISTORY=y
-CONFIG_RR_INTERVAL=200
-CONFIG_SCHED_LPWORKPRIORITY=30
-CONFIG_SCHED_WAITPID=y
-CONFIG_SDCLONE_DISABLE=y
-CONFIG_SENDFILE_BUFSIZE=1024
-CONFIG_STACK_COLORATION=y
-CONFIG_START_DAY=22
-CONFIG_START_MONTH=10
-CONFIG_START_YEAR=2019
-CONFIG_STM32_DMA1=y
-CONFIG_STM32_DMA2=y
-CONFIG_STM32_JTAG_SW_ENABLE=y
-CONFIG_STM32_PWR=y
-CONFIG_STM32_SPI2=y
-CONFIG_STM32_SPI2_DMA=y
-CONFIG_STM32_SPI3=y
-CONFIG_STM32_SPI3_DMA=y
-CONFIG_STM32_SPI_DMA=y
-CONFIG_STM32_USART1=y
-CONFIG_SYMTAB_ORDEREDBYNAME=y
-CONFIG_SYSTEM_DHCPC_RENEW=y
-CONFIG_SYSTEM_NSH=y
-CONFIG_SYSTEM_NSH_SYMTAB=y
-CONFIG_SYSTEM_NSH_SYMTAB_ARRAYNAME="g_symtab"
-CONFIG_SYSTEM_NSH_SYMTAB_COUNTNAME="g_nsymbols"
-CONFIG_SYSTEM_NTPC=y
-CONFIG_TESTING_OSTEST=y
-CONFIG_TESTING_OSTEST_FPUSIZE=132
-CONFIG_USART1_RXBUFSIZE=128
-CONFIG_USART1_SERIAL_CONSOLE=y
-CONFIG_USART1_TXBUFSIZE=128
-CONFIG_USER_ENTRYPOINT="nsh_main"
-CONFIG_WIRELESS_GS2200M=y
-CONFIG_WL_GS2200M=y
-CONFIG_WL_GS2200M_DISABLE_DHCPC=y
-CONFIG_WL_GS2200M_SPI_FREQUENCY=10000000
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/winbuild/Make.defs b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/winbuild/Make.defs
deleted file mode 100644
index e28ac43fa..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/winbuild/Make.defs
+++ /dev/null
@@ -1,56 +0,0 @@
-############################################################################
-# boards/arm/stm32/aiit-arm32-board/configs/winbuild/Make.defs
-#
-# Licensed to the Apache Software Foundation (ASF) under one or more
-# contributor license agreements.  See the NOTICE file distributed with
-# this work for additional information regarding copyright ownership.  The
-# ASF licenses this file to you under the Apache License, Version 2.0 (the
-# "License"); you may not use this file except in compliance with the
-# License.  You may obtain a copy of the License at
-#
-#   http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
-# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
-# License for the specific language governing permissions and limitations
-# under the License.
-#
-############################################################################
-
-include $(TOPDIR)\.config
-include $(TOPDIR)\tools\Config.mk
-include $(TOPDIR)\arch\arm\src\armv7-m\Toolchain.defs
-
-LDSCRIPT = ld.script
-
-ARCHSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
-
-ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
-  ARCHOPTIMIZATION = -g
-endif
-
-ifneq ($(CONFIG_DEBUG_NOOPT),y)
-  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
-endif
-
-ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
-ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
-ARCHWARNINGSXX = -Wall -Wshadow -Wundef
-ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
-
-CFLAGS := $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
-CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
-CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
-CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
-CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
-AFLAGS := $(CFLAGS) -D__ASSEMBLY__
-
-NXFLATLDFLAGS1 = -r -d -warn-common
-NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)\binfmt\libnxflat\gnu-nxflat-pcrel.ld -no-check-sections
-LDNXFLATFLAGS = -e main -s 2048
-
-ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
-  LDFLAGS += -g
-endif
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/winbuild/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/winbuild/defconfig
deleted file mode 100644
index d1de6e677..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/winbuild/defconfig
+++ /dev/null
@@ -1,44 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_ARCH_FPU is not set
-CONFIG_ADD_NUTTX_FETURES=y
-CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="aiit-arm32-board"
-CONFIG_ARCH_BOARD_STM32F4_AIIT=y
-CONFIG_ARCH_CHIP="stm32"
-CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F407VG=y
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_BOARD_LOOPSPERMSEC=16717
-CONFIG_CONSOLE_SYSLOG=y
-CONFIG_DISABLE_ENVIRON=y
-CONFIG_DISABLE_MOUNTPOINT=y
-CONFIG_EXPERIMENTAL=y
-CONFIG_HOST_WINDOWS=y
-CONFIG_INTELHEX_BINARY=y
-CONFIG_MM_REGIONS=2
-CONFIG_PREALLOC_TIMERS=4
-CONFIG_RAM_SIZE=114688
-CONFIG_RAM_START=0x20000000
-CONFIG_RAW_BINARY=y
-CONFIG_RR_INTERVAL=200
-CONFIG_SDCLONE_DISABLE=y
-CONFIG_START_DAY=21
-CONFIG_START_MONTH=9
-CONFIG_START_YEAR=2009
-CONFIG_STM32_JTAG_SW_ENABLE=y
-CONFIG_STM32_USART1=y
-CONFIG_SYMTAB_ORDEREDBYNAME=y
-CONFIG_TESTING_OSTEST=y
-CONFIG_TESTING_OSTEST_NBARRIER_THREADS=3
-CONFIG_TESTING_OSTEST_STACKSIZE=2048
-CONFIG_USART1_RXBUFSIZE=128
-CONFIG_USART1_SERIAL_CONSOLE=y
-CONFIG_USART1_TXBUFSIZE=128
-CONFIG_USER_ENTRYPOINT="ostest_main"
-CONFIG_WINDOWS_NATIVE=y
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/xen1210/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/xen1210/defconfig
deleted file mode 100644
index 1939bed03..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/xen1210/defconfig
+++ /dev/null
@@ -1,58 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_ARCH_FPU is not set
-# CONFIG_NSH_ARGCAT is not set
-# CONFIG_NSH_CMDOPT_HEXDUMP is not set
-# CONFIG_NSH_CMDPARMS is not set
-CONFIG_ADD_NUTTX_FETURES=y
-CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="aiit-arm32-board"
-CONFIG_ARCH_BOARD_STM32F4_AIIT=y
-CONFIG_ARCH_BUTTONS=y
-CONFIG_ARCH_CHIP="stm32"
-CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F407VG=y
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_BOARD_LATE_INITIALIZE=y
-CONFIG_BOARD_LOOPSPERMSEC=16717
-CONFIG_BUILTIN=y
-CONFIG_FS_PROCFS=y
-CONFIG_HAVE_CXX=y
-CONFIG_HAVE_CXXINITIALIZE=y
-CONFIG_INTELHEX_BINARY=y
-CONFIG_MM_REGIONS=2
-CONFIG_NSH_BUILTIN_APPS=y
-CONFIG_NSH_FILEIOSIZE=512
-CONFIG_NSH_LINELEN=64
-CONFIG_NSH_READLINE=y
-CONFIG_PREALLOC_TIMERS=4
-CONFIG_PWM=y
-CONFIG_RAM_SIZE=114688
-CONFIG_RAM_START=0x20000000
-CONFIG_RAW_BINARY=y
-CONFIG_RR_INTERVAL=200
-CONFIG_SCHED_HPWORK=y
-CONFIG_SCHED_WAITPID=y
-CONFIG_SDCLONE_DISABLE=y
-CONFIG_SENSORS=y
-CONFIG_SENSORS_XEN1210=y
-CONFIG_START_DAY=17
-CONFIG_START_MONTH=8
-CONFIG_START_YEAR=2016
-CONFIG_STM32_JTAG_SW_ENABLE=y
-CONFIG_STM32_PWR=y
-CONFIG_STM32_SPI1=y
-CONFIG_STM32_TIM1=y
-CONFIG_STM32_TIM1_CH1OUT=y
-CONFIG_STM32_TIM1_PWM=y
-CONFIG_STM32_USART1=y
-CONFIG_SYSTEM_NSH=y
-CONFIG_USART1_RXBUFSIZE=128
-CONFIG_USART1_SERIAL_CONSOLE=y
-CONFIG_USART1_TXBUFSIZE=128
-CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/include/board.h b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/include/board.h
index bf871f982..2d84f3c59 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/include/board.h
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/include/board.h
@@ -22,7 +22,7 @@
 * @file board.h
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/kernel/Makefile b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/kernel/Makefile
index 3ba86a6d9..d58c2890e 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/kernel/Makefile
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/kernel/Makefile
@@ -22,29 +22,18 @@ include $(TOPDIR)/Make.defs
 
 # The entry point name (if none is provided in the .config file)
 
-CONFIG_USER_ENTRYPOINT ?= user_start
-ENTRYPT = $(patsubst "%",%,$(CONFIG_USER_ENTRYPOINT))
+CONFIG_INIT_ENTRYPOINT ?= user_start
+ENTRYPT = $(patsubst "%",%,$(CONFIG_INIT_ENTRYPOINT))
 
 # Get the paths to the libraries and the links script path in format that
 # is appropriate for the host OS
 
-ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
-  # Windows-native toolchains
-  USER_LIBPATHS = ${shell for path in $(USERLIBS); do dir=`dirname $(TOPDIR)$(DELIM)$$path`;echo "-L\"`cygpath -w $$dir`\"";done}
-  USER_LDSCRIPT = -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)memory.ld}"
-  USER_LDSCRIPT += -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)user-space.ld}"
-  USER_HEXFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.hex}"
-  USER_SRECFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.srec}"
-  USER_BINFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.bin}"
-else
-  # Linux/Cygwin-native toolchain
-  USER_LIBPATHS = $(addprefix -L$(TOPDIR)$(DELIM),$(dir $(USERLIBS)))
-  USER_LDSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)memory.ld
-  USER_LDSCRIPT += -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)user-space.ld
-  USER_HEXFILE += "$(TOPDIR)$(DELIM)nuttx_user.hex"
-  USER_SRECFILE += "$(TOPDIR)$(DELIM)nuttx_user.srec"
-  USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin"
-endif
+USER_LIBPATHS = $(addprefix -L,$(call CONVERT_PATH,$(addprefix $(TOPDIR)$(DELIM),$(dir $(USERLIBS)))))
+USER_LDSCRIPT = -T $(call CONVERT_PATH,$(BOARD_DIR)$(DELIM)scripts$(DELIM)memory.ld)
+USER_LDSCRIPT += -T $(call CONVERT_PATH,$(BOARD_DIR)$(DELIM)scripts$(DELIM)user-space.ld)
+USER_HEXFILE += $(call CONVERT_PATH,$(TOPDIR)$(DELIM)nuttx_user.hex)
+USER_SRECFILE += $(call CONVERT_PATH,$(TOPDIR)$(DELIM)nuttx_user.srec)
+USER_BINFILE += $(call CONVERT_PATH,$(TOPDIR)$(DELIM)nuttx_user.bin)
 
 USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT)
 USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS))))
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/kernel/stm32_userspace.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/kernel/stm32_userspace.c
index f9df0f3ab..1e4f4065c 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/kernel/stm32_userspace.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/kernel/stm32_userspace.c
@@ -22,7 +22,7 @@
 * @file stm32_userspace.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
@@ -82,13 +82,13 @@ extern uint32_t _ebss;            /* End+1 of .bss */
 
 /* This is the user space entry point */
 
-int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]);
+int CONFIG_INIT_ENTRYPOINT(int argc, char *argv[]);
 
 const struct userspace_s userspace locate_data(".userspace") =
 {
   /* General memory map */
 
-  .us_entrypoint    = (main_t)CONFIG_USER_ENTRYPOINT,
+  .us_entrypoint    = (main_t)CONFIG_INIT_ENTRYPOINT,
   .us_textstart     = (uintptr_t)&_stext,
   .us_textend       = (uintptr_t)&_etext,
   .us_datasource    = (uintptr_t)&_eronly,
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/scripts/Make.defs b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/scripts/Make.defs
index ae8423fd1..cbea2bfd1 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/scripts/Make.defs
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/scripts/Make.defs
@@ -24,22 +24,22 @@ include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs
 
 LDSCRIPT = ld.script
 
-ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
-  ARCHSCRIPT = -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}"
-else
-  ARCHSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
-endif
+ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
 
 ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
   ARCHOPTIMIZATION = -g
 endif
 
 ifneq ($(CONFIG_DEBUG_NOOPT),y)
-  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fomit-frame-pointer
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing
+endif
+
+ARCHCFLAGS = -fno-common -ffunction-sections -fdata-sections
+ARCHCXXFLAGS = -fno-common -ffunction-sections -fdata-sections
+ifneq ($(CONFIG_CXX_EXCEPTION),y)
+  ARCHCXXFLAGS = -fno-exceptions -fcheck-new
 endif
 
-ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
@@ -50,9 +50,6 @@ ifeq ($(CONFIG_ARMV7M_TOOLCHAIN_CLANGL),y)
 else
   ARCHCFLAGS += -funwind-tables
   ARCHCXXFLAGS += -fno-rtti -funwind-tables
-  ifneq ($(CONFIG_DEBUG_NOOPT),y)
-    ARCHOPTIMIZATION += -fno-strength-reduce
-  endif
 
 endif
 
@@ -67,16 +64,14 @@ NXFLATLDFLAGS1 = -r -d -warn-common
 NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
 LDNXFLATFLAGS = -e main -s 2048
 
+LDFLAGS += --gc-sections
+
 # Loadable module definitions
 
 CMODULEFLAGS = $(CFLAGS) -mlong-calls # --target1-abs
 
 LDMODULEFLAGS = -r -e module_initialize
-ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
-  LDMODULEFLAGS += -T "${shell cygpath -w $(TOPDIR)/libs/libc/modlib/gnu-elf.ld}"
-else
-  LDMODULEFLAGS += -T $(TOPDIR)/libs/libc/modlib/gnu-elf.ld
-endif
+LDMODULEFLAGS += -T $(call CONVERT_PATH,$(TOPDIR)/libs/libc/modlib/gnu-elf.ld)
 
 # ELF module definitions
 
@@ -84,11 +79,7 @@ CELFFLAGS = $(CFLAGS) -mlong-calls # --target1-abs
 CXXELFFLAGS = $(CXXFLAGS) -mlong-calls # --target1-abs
 
 LDELFFLAGS = -r -e main
-ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
-  LDELFFLAGS += -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)gnu-elf.ld}"
-else
-  LDELFFLAGS += -T $(BOARD_DIR)$(DELIM)scripts$(DELIM)gnu-elf.ld
-endif
+LDELFFLAGS += -T $(call CONVERT_PATH,$(BOARD_DIR)$(DELIM)scripts$(DELIM)gnu-elf.ld)
 
 ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
   LDFLAGS += -g
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/scripts/ld.script b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/scripts/ld.script
index d4a3756c8..719d41325 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/scripts/ld.script
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/scripts/ld.script
@@ -74,6 +74,18 @@ SECTIONS
         __exidx_end = ABSOLUTE(.);
     } > flash
 
+    .tdata : {
+        _stdata = ABSOLUTE(.);
+        *(.tdata .tdata.* .gnu.linkonce.td.*);
+        _etdata = ABSOLUTE(.);
+    } > flash
+
+    .tbss : {
+        _stbss = ABSOLUTE(.);
+        *(.tbss .tbss.* .gnu.linkonce.tb.* .tcommon);
+        _etbss = ABSOLUTE(.);
+    } > flash
+
     _eronly = ABSOLUTE(.);
 
     .data : ALIGN(4) {
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/Make.defs b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/Make.defs
index 0cf18bb48..462dc788e 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/Make.defs
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/Make.defs
@@ -20,7 +20,7 @@
 
 include $(TOPDIR)/Make.defs
 
-CSRCS = stm32_boot.c stm32_bringup.c stm32_spi.c
+CSRCS = stm32_boot.c stm32_bringup.c stm32_spi.c stm32_perfcount.c
 
 ifeq ($(CONFIG_ARCH_LEDS),y)
 CSRCS += stm32_autoleds.c
@@ -28,10 +28,6 @@ else
 CSRCS += stm32_userleds.c
 endif
 
-ifeq ($(CONFIG_SCHED_CRITMONITOR),y)
-CSRCS += stm32_critmon.c
-endif
-
 ifeq ($(CONFIG_AUDIO_CS43L22),y)
 CSRCS += stm32_cs43l22.c
 endif
@@ -40,7 +36,7 @@ ifeq ($(CONFIG_ARCH_BUTTONS),y)
 CSRCS +=  stm32_buttons.c
 endif
 
-ifeq ($(CONFIG_CAN),y)
+ifeq ($(CONFIG_STM32_CAN_CHARDRIVER),y)
 CSRCS += stm32_can.c
 endif
 
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/aiit-arm32-board.h b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/aiit-arm32-board.h
index a65768e0a..6523dc40f 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/aiit-arm32-board.h
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/aiit-arm32-board.h
@@ -22,7 +22,7 @@
 * @file aiit-arm32-board.h
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
@@ -571,7 +571,7 @@ int stm32_pwm_setup(void);
  *
  ****************************************************************************/
 
-#ifdef CONFIG_CAN
+#ifdef CONFIG_STM32_CAN_CHARDRIVER
 int stm32_can_setup(void);
 #endif
 
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_appinit.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_appinit.c
index b18a429eb..7aeb2c2cd 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_appinit.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_appinit.c
@@ -22,7 +22,7 @@
 * @file stm32_appinit.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_autoleds.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_autoleds.c
index 7e2c05e82..64bdd08b1 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_autoleds.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_autoleds.c
@@ -22,7 +22,7 @@
 * @file stm32_autoleds.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
@@ -41,7 +41,6 @@
 #include <arch/board/board.h>
 
 #include "chip.h"
-#include "arm_arch.h"
 #include "arm_internal.h"
 #include "stm32.h"
 #include "aiit-arm32-board.h"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_boot.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_boot.c
index 9874024ea..db1d21370 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_boot.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_boot.c
@@ -22,7 +22,7 @@
 * @file stm32_boot.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
@@ -38,7 +38,7 @@
 #include <nuttx/board.h>
 #include <arch/board/board.h>
 
-#include "arm_arch.h"
+#include "arm_internal.h"
 #include "nvic.h"
 #include "itm.h"
 
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_bringup.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_bringup.c
index 1a68dc21d..a8ff193dc 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_bringup.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_bringup.c
@@ -22,7 +22,7 @@
 * @file stm32_bringup.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
@@ -81,6 +81,10 @@
 #include "stm32_bmp180.h"
 #endif
 
+#ifdef CONFIG_SENSORS_MS5611
+#include "stm32_ms5611.h"
+#endif
+
 #ifdef CONFIG_SENSORS_MAX6675
 #include "stm32_max6675.h"
 #endif
@@ -222,6 +226,17 @@ int stm32_bringup(void)
     }
 #endif
 
+#ifdef CONFIG_SENSORS_MS5611
+  /* Initialize the MS5611 pressure sensor. */
+
+  ret = board_ms5611_initialize(0, 1);
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "Failed to initialize MS5611, error %d\n", ret);
+      return ret;
+    }
+#endif
+
 #ifdef CONFIG_SENSORS_BH1750FVI
   ret = board_bh1750_initialize(0, 1);
   if (ret < 0)
@@ -345,7 +360,7 @@ int stm32_bringup(void)
     }
 #endif
 
-#ifdef CONFIG_CAN
+#ifdef CONFIG_STM32_CAN_CHARDRIVER
   /* Initialize CAN and register the CAN driver. */
 
   ret = stm32_can_setup();
@@ -531,7 +546,7 @@ int stm32_bringup(void)
   ret = stm32_gs2200m_initialize("/dev/gs2200m", 3);
   if (ret < 0)
     {
-      serr("ERROR: Failed to initialize GS2200M: %d \n", ret);
+      serr("ERROR: Failed to initialize GS2200M: %d\n", ret);
     }
 #endif
 
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_buttons.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_buttons.c
index 8d2f5a64c..418cb8d28 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_buttons.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_buttons.c
@@ -22,7 +22,7 @@
 * @file stm32_buttons.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_can.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_can.c
index bb411b432..eabf286be 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_can.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_can.c
@@ -22,7 +22,7 @@
 * @file stm32_can.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
@@ -40,8 +40,7 @@
 #include <arch/board/board.h>
 
 #include "chip.h"
-#include "arm_arch.h"
-
+#include "arm_internal.h"
 #include "stm32.h"
 #include "stm32_can.h"
 #include "aiit-arm32-board.h"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_cs43l22.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_cs43l22.c
index bb26e6203..34284a36e 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_cs43l22.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_cs43l22.c
@@ -22,7 +22,7 @@
 * @file stm32_cs43l22.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_ds1307.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_ds1307.c
index 8dd2ae0b1..6612a863d 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_ds1307.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_ds1307.c
@@ -22,7 +22,7 @@
 * @file stm32_ds1307.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
@@ -109,7 +109,7 @@ int stm32_ds1307_init(void)
 
       /* Synchronize the system time to the RTC time */
 
-      clock_synchronize();
+      clock_synchronize(NULL);
 
       /* Now we are initialized */
 
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_enc28j60.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_enc28j60.c
index e170eeb05..86d81e4f3 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_enc28j60.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_enc28j60.c
@@ -22,7 +22,7 @@
 * @file stm32_enc28j60.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
@@ -56,7 +56,6 @@
 #include <arch/board/board.h>
 
 #include "chip.h"
-#include "arm_arch.h"
 #include "arm_internal.h"
 #include "stm32_spi.h"
 
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_ethernet.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_ethernet.c
index f49a185f6..35902b3c9 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_ethernet.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_ethernet.c
@@ -22,7 +22,7 @@
 * @file stm32_ethernet.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_extmem.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_extmem.c
index 251958819..e107be040 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_extmem.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_extmem.c
@@ -22,7 +22,7 @@
 * @file stm32_extmem.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
@@ -40,8 +40,7 @@
 #include <arch/board/board.h>
 
 #include "chip.h"
-#include "arm_arch.h"
-
+#include "arm_internal.h"
 #include "stm32.h"
 #include "aiit-arm32-board.h"
 
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_gs2200m.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_gs2200m.c
index 236c3d344..813be72c9 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_gs2200m.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_gs2200m.c
@@ -22,7 +22,7 @@
 * @file stm32_gs2200m.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
@@ -42,7 +42,7 @@
 #include <nuttx/spinlock.h>
 #include <nuttx/wireless/gs2200m.h>
 
-#include "arm_arch.h"
+#include "arm_internal.h"
 #include "chip.h"
 #include "stm32.h"
 
@@ -116,7 +116,7 @@ static void gs2200m_irq_enable(void)
   irqstate_t flags = spin_lock_irqsave(NULL);
   uint32_t dready = 0;
 
-  wlinfo("== ec:%" PRId32 " called=%" PRId32 " \n",
+  wlinfo("== ec:%" PRId32 " called=%" PRId32 "\n",
          _enable_count, _n_called++);
 
   if (0 == _enable_count)
@@ -139,7 +139,7 @@ static void gs2200m_irq_enable(void)
     {
       /* Call g_irq_handler directly */
 
-      wlinfo("== ** call irq handler ** \n");
+      wlinfo("== ** call irq handler **\n");
       g_irq_handler(0, NULL, g_irq_arg);
     }
 }
@@ -152,7 +152,7 @@ static void gs2200m_irq_disable(void)
 {
   irqstate_t flags = spin_lock_irqsave(NULL);
 
-  wlinfo("== ec:%" PRId32 " called=%" PRId32 " \n",
+  wlinfo("== ec:%" PRId32 " called=%" PRId32 "\n",
          _enable_count, _n_called++);
 
   _enable_count--;
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_hciuart.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_hciuart.c
index e94ed9b2a..94342b235 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_hciuart.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_hciuart.c
@@ -22,7 +22,7 @@
 * @file stm32_hciuart.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_idle.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_idle.c
index 4487f69cb..ffdda4a41 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_idle.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_idle.c
@@ -22,7 +22,7 @@
 * @file stm32_idle.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_max7219.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_max7219.c
index eb5429413..66eec35a9 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_max7219.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_max7219.c
@@ -22,7 +22,7 @@
 * @file stm32_max7219.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_max7219_leds.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_max7219_leds.c
index b479acf8c..e6db84c1c 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_max7219_leds.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_max7219_leds.c
@@ -22,7 +22,7 @@
 * @file stm32_max7219_leds.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_mmcsd.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_mmcsd.c
index cf06dc462..7beb5bf58 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_mmcsd.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_mmcsd.c
@@ -22,7 +22,7 @@
 * @file stm32_mmcsd.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
@@ -40,7 +40,7 @@
 #include <time.h>
 #include <unistd.h>
 
-#include "arm_arch.h"
+#include "arm_internal.h"
 #include "chip.h"
 #include "stm32.h"
 
@@ -91,7 +91,7 @@ int stm32_mmcsd_initialize(int port, int minor)
   stm32_configgpio(GPIO_MMCSD_NSS);   /* Assign CS */
   stm32_gpiowrite(GPIO_MMCSD_NSS, 1); /* Ensure the CS is inactive */
 
-  mcinfo("INFO: Initializing mmcsd port %d minor %d \n",
+  mcinfo("INFO: Initializing mmcsd port %d minor %d\n",
          port, minor);
 
   spi = stm32_spibus_initialize(port);
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_netinit.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_netinit.c
index 817503313..fccd9805c 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_netinit.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_netinit.c
@@ -22,7 +22,7 @@
 * @file stm32_netinit.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_ostest.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_ostest.c
index 4ffe259c3..179960e38 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_ostest.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_ostest.c
@@ -22,7 +22,7 @@
 * @file stm32_ostest.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
@@ -41,7 +41,6 @@
 #include <nuttx/irq.h>
 #include <arch/board/board.h>
 
-#include "arm_arch.h"
 #include "arm_internal.h"
 #include "aiit-arm32-board.h"
 
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_pca9635.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_pca9635.c
index 4b29444bb..fad7cfdfd 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_pca9635.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_pca9635.c
@@ -22,7 +22,7 @@
 * @file stm32_pca9635.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_critmon.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_perfcount.c
similarity index 80%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_critmon.c
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_perfcount.c
index bad6a2377..4f2881264 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_critmon.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_perfcount.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * boards/arm/stm32/aiit-arm32-board/src/stm32_critmon.c
+ * boards/arm/stm32/stm32f4discovery/src/stm32_perfcount.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
@@ -19,14 +19,13 @@
  ****************************************************************************/
 
 /**
-* @file stm32_critmon.c
+* @file stm32_perfcount.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
-
 /****************************************************************************
  * Included Files
  ****************************************************************************/
@@ -37,32 +36,39 @@
 #include <fixedmath.h>
 
 #include "dwt.h"
-#include "arm_arch.h"
+#include "arm_internal.h"
 
 #include <nuttx/clock.h>
 
 #include <arch/board/board.h>
 
-#ifdef CONFIG_SCHED_CRITMONITOR
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
 
 /****************************************************************************
- * Name: up_critmon_gettime
+ * Name: up_perf_gettime
  ****************************************************************************/
 
-uint32_t up_critmon_gettime(void)
+uint32_t up_perf_gettime(void)
 {
   return getreg32(DWT_CYCCNT);
 }
 
 /****************************************************************************
- * Name: up_critmon_gettime
+ * Name: up_perf_getfreq
  ****************************************************************************/
 
-void up_critmon_convert(uint32_t elapsed, FAR struct timespec *ts)
+uint32_t up_perf_getfreq(void)
+{
+  return STM32_SYSCLK_FREQUENCY;
+}
+
+/****************************************************************************
+ * Name: up_perf_convert
+ ****************************************************************************/
+
+void up_perf_convert(uint32_t elapsed, FAR struct timespec *ts)
 {
   b32_t b32elapsed;
 
@@ -70,5 +76,3 @@ void up_critmon_convert(uint32_t elapsed, FAR struct timespec *ts)
   ts->tv_sec  = b32toi(b32elapsed);
   ts->tv_nsec = NSEC_PER_SEC * b32frac(b32elapsed) / b32ONE;
 }
-
-#endif /* CONFIG_SCHED_CRITMONITOR */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_pm.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_pm.c
index feffe53f7..386b86413 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_pm.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_pm.c
@@ -22,7 +22,7 @@
 * @file stm32_pm.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
@@ -32,10 +32,6 @@
  ****************************************************************************/
 
 #include <nuttx/config.h>
-
-#include <nuttx/board.h>
-#include <nuttx/power/pm.h>
-
 #include "arm_internal.h"
 #include "stm32_pm.h"
 #include "aiit-arm32-board.h"
@@ -66,10 +62,6 @@
 
 void arm_pminitialize(void)
 {
-  /* Then initialize the NuttX power management subsystem proper */
-
-  pm_initialize();
-
 #if defined(CONFIG_ARCH_IDLE_CUSTOM) && defined(CONFIG_PM_BUTTONS)
   /* Initialize the buttons to wake up the system from low power modes */
 
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_pmbuttons.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_pmbuttons.c
index 8842e2e72..4be834d00 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_pmbuttons.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_pmbuttons.c
@@ -22,7 +22,7 @@
 * @file stm32_pmbuttons.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
@@ -41,7 +41,7 @@
 #include <nuttx/power/pm.h>
 #include <arch/irq.h>
 
-#include "arm_arch.h"
+#include "arm_internal.h"
 #include "nvic.h"
 #include "stm32_pwr.h"
 #include "stm32_pm.h"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_pwm.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_pwm.c
index 5bafad301..89897d52c 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_pwm.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_pwm.c
@@ -22,7 +22,7 @@
 * @file stm32_pwm.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
@@ -40,7 +40,7 @@
 #include <arch/board/board.h>
 
 #include "chip.h"
-#include "arm_arch.h"
+#include "arm_internal.h"
 #include "stm32_pwm.h"
 #include "aiit-arm32-board.h"
 
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_reset.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_reset.c
index 923f44c11..22036b02e 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_reset.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_reset.c
@@ -22,7 +22,7 @@
 * @file stm32_reset.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_rgbled.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_rgbled.c
index 59f4ae12a..498d22b69 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_rgbled.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_rgbled.c
@@ -22,7 +22,7 @@
 * @file stm32_rgbled.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
@@ -42,7 +42,7 @@
 #include <arch/board/board.h>
 
 #include "chip.h"
-#include "arm_arch.h"
+#include "arm_internal.h"
 #include "stm32_pwm.h"
 #include "aiit-arm32-board.h"
 
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_romfs.h b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_romfs.h
index a50be6b5f..d6d472078 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_romfs.h
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_romfs.h
@@ -37,7 +37,7 @@
 * @file stm32_romfs.h
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_romfs_initialize.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_romfs_initialize.c
index dbedfdd1f..8fc0b401c 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_romfs_initialize.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_romfs_initialize.c
@@ -38,7 +38,7 @@
 * @file stm32_romfs_initialize.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_sdio.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_sdio.c
index 17209f1af..62e701b5f 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_sdio.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_sdio.c
@@ -22,7 +22,7 @@
 * @file stm32_sdio.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_spi.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_spi.c
index 13cc33ad3..30b357039 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_spi.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_spi.c
@@ -21,7 +21,7 @@
 * @file stm32_spi.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
@@ -40,7 +40,7 @@
 #include <nuttx/spi/spi.h>
 #include <arch/board/board.h>
 
-#include "arm_arch.h"
+#include "arm_internal.h"
 #include "chip.h"
 #include "stm32.h"
 
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_ssd1289.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_ssd1289.c
index e17fd9ab3..47b4d760e 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_ssd1289.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_ssd1289.c
@@ -22,7 +22,7 @@
 * @file stm32_ssd1289.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
@@ -49,7 +49,7 @@
 
 #include <arch/board/board.h>
 
-#include "arm_arch.h"
+#include "arm_internal.h"
 #include "stm32.h"
 #include "aiit-arm32-board.h"
 
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_ssd1351.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_ssd1351.c
index ea0a12a6b..df673db20 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_ssd1351.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_ssd1351.c
@@ -22,7 +22,7 @@
 * @file stm32_ssd1351.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_st7032.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_st7032.c
index 319eafe71..b6399d418 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_st7032.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_st7032.c
@@ -22,7 +22,7 @@
 * @file stm32_st7032.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_st7567.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_st7567.c
index 35a6ce241..7d4ddd7e9 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_st7567.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_st7567.c
@@ -22,7 +22,7 @@
 * @file stm32_st7567.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
@@ -44,9 +44,7 @@
 #include <nuttx/lcd/lcd.h>
 #include <nuttx/lcd/st7567.h>
 
-#include "arm_arch.h"
 #include "arm_internal.h"
-
 #include "stm32_gpio.h"
 #include "stm32_spi.h"
 #include "aiit-arm32-board.h"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_st7789.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_st7789.c
index e61f9c720..77e71dea7 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_st7789.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_st7789.c
@@ -22,7 +22,7 @@
 * @file stm32_st7789.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_sx127x.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_sx127x.c
index 8b3eff601..7c65ccf55 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_sx127x.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_sx127x.c
@@ -22,7 +22,7 @@
 * @file stm32_sx127x.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_timer.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_timer.c
index 351b0f868..0573f846c 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_timer.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_timer.c
@@ -22,7 +22,7 @@
 * @file stm32_timer.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_ug2864ambag01.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_ug2864ambag01.c
index 50d40dcd2..0a208da33 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_ug2864ambag01.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_ug2864ambag01.c
@@ -22,7 +22,7 @@
 * @file stm32_ug2864ambag01.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_ug2864hsweg01.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_ug2864hsweg01.c
index 7db3aae0a..86d92bf55 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_ug2864hsweg01.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_ug2864hsweg01.c
@@ -22,7 +22,7 @@
 * @file stm32_ug2864hsweg01.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_uid.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_uid.c
index baee521f7..cb0bcc132 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_uid.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_uid.c
@@ -37,7 +37,7 @@
 * @file stm32_uid.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_usb.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_usb.c
index cb7a036da..dba193bea 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_usb.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_usb.c
@@ -22,7 +22,7 @@
 * @file stm32_usb.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
@@ -46,7 +46,7 @@
 #include <nuttx/usb/usbhost.h>
 #include <nuttx/usb/usbdev_trace.h>
 
-#include "arm_arch.h"
+#include "arm_internal.h"
 #include "stm32.h"
 #include "stm32_otgfs.h"
 #include "aiit-arm32-board.h"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_usbmsc.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_usbmsc.c
index 999a27292..f519db776 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_usbmsc.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_usbmsc.c
@@ -22,7 +22,7 @@
 * @file stm32_usbmsc.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_userleds.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_userleds.c
index d8549802a..95bd5bc2a 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_userleds.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/src/stm32_userleds.c
@@ -22,7 +22,7 @@
 * @file stm32_userleds.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
@@ -42,9 +42,7 @@
 #include <arch/board/board.h>
 
 #include "chip.h"
-#include "arm_arch.h"
 #include "arm_internal.h"
-
 #include "stm32.h"
 #include "aiit-arm32-board.h"
 
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/configs/elf/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/configs/elf/defconfig
deleted file mode 100644
index 324ea1595..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/configs/elf/defconfig
+++ /dev/null
@@ -1,54 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_STANDARD_SERIAL is not set
-CONFIG_ADD_NUTTX_FETURES=y
-CONFIG_ARCH="risc-v"
-CONFIG_ARCH_BOARD="aiit-riscv64-board"
-CONFIG_ARCH_BOARD_AIIT_RISCV64=y
-CONFIG_ARCH_CHIP="k210"
-CONFIG_ARCH_CHIP_K210=y
-CONFIG_ARCH_INTERRUPTSTACK=2048
-CONFIG_ARCH_RISCV=y
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_BOARDCTL=y
-CONFIG_BOARDCTL_APP_SYMTAB=y
-CONFIG_BOARDCTL_ROMDISK=y
-CONFIG_BOARD_LOOPSPERMSEC=46000
-CONFIG_BUILTIN=y
-CONFIG_DEBUG_FULLOPT=y
-CONFIG_DEBUG_SYMBOLS=y
-CONFIG_DEV_ZERO=y
-CONFIG_ELF=y
-CONFIG_ELF_ALIGN_LOG2=3
-CONFIG_EXAMPLES_ELF=y
-CONFIG_FS_PROCFS=y
-CONFIG_FS_ROMFS=y
-CONFIG_HAVE_CXX=y
-CONFIG_IDLETHREAD_STACKSIZE=2048
-CONFIG_INTELHEX_BINARY=y
-CONFIG_LIBC_ENVPATH=y
-CONFIG_LIBC_PERROR_STDOUT=y
-CONFIG_LIBC_STRERROR=y
-CONFIG_PATH_INITIAL="/mnt/romfs"
-CONFIG_PIPES=y
-CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=3072
-CONFIG_PREALLOC_TIMERS=4
-CONFIG_RAM_SIZE=6291456
-CONFIG_RAM_START=0x80000000
-CONFIG_RAW_BINARY=y
-CONFIG_RR_INTERVAL=200
-CONFIG_SCHED_WAITPID=y
-CONFIG_STACK_COLORATION=y
-CONFIG_START_DAY=5
-CONFIG_START_MONTH=2
-CONFIG_START_YEAR=2020
-CONFIG_SYMTAB_ORDEREDBYNAME=y
-CONFIG_TASK_NAME_SIZE=20
-CONFIG_UART0_SERIAL_CONSOLE=y
-CONFIG_USERMAIN_STACKSIZE=3072
-CONFIG_USER_ENTRYPOINT="elf_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/configs/knsh_smp/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/configs/knsh_smp/defconfig
deleted file mode 100644
index 3abc7c7db..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/configs/knsh_smp/defconfig
+++ /dev/null
@@ -1,61 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_STANDARD_SERIAL is not set
-CONFIG_ADD_NUTTX_FETURES=y
-CONFIG_ARCH="risc-v"
-CONFIG_ARCH_BOARD="aiit-riscv64-board"
-CONFIG_ARCH_BOARD_AIIT_RISCV64=y
-CONFIG_ARCH_CHIP="k210"
-CONFIG_ARCH_CHIP_K210=y
-CONFIG_ARCH_INTERRUPTSTACK=2048
-CONFIG_ARCH_RISCV=y
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_ARCH_USE_MPU=y
-CONFIG_BOARD_LOOPSPERMSEC=46000
-CONFIG_BUILD_PROTECTED=y
-CONFIG_BUILTIN=y
-CONFIG_DEBUG_FULLOPT=y
-CONFIG_DEBUG_SYMBOLS=y
-CONFIG_DEV_ZERO=y
-CONFIG_EXAMPLES_HELLO=y
-CONFIG_FS_PROCFS=y
-CONFIG_IDLETHREAD_STACKSIZE=2048
-CONFIG_INTELHEX_BINARY=y
-CONFIG_LIBC_PERROR_STDOUT=y
-CONFIG_LIBC_STRERROR=y
-CONFIG_MM_KERNEL_HEAPSIZE=524288
-CONFIG_NSH_ARCHINIT=y
-CONFIG_NSH_BUILTIN_APPS=y
-CONFIG_NSH_READLINE=y
-CONFIG_NSH_STRERROR=y
-CONFIG_NUTTX_USERSPACE=0x80100000
-CONFIG_PASS1_BUILDIR="boards/risc-v/k210/aiit-riscv64-board/kernel"
-CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=2048
-CONFIG_PREALLOC_TIMERS=4
-CONFIG_RAM_SIZE=6291456
-CONFIG_RAM_START=0x80000000
-CONFIG_RAW_BINARY=y
-CONFIG_READLINE_CMD_HISTORY=y
-CONFIG_RR_INTERVAL=200
-CONFIG_SMP=y
-CONFIG_SMP_NCPUS=2
-CONFIG_STACK_COLORATION=y
-CONFIG_START_DAY=9
-CONFIG_START_MONTH=4
-CONFIG_START_YEAR=2021
-CONFIG_SYSTEM_NSH=y
-CONFIG_SYSTEM_SYSTEM=y
-CONFIG_SYSTEM_TASKSET=y
-CONFIG_SYS_RESERVED=9
-CONFIG_TASK_NAME_SIZE=20
-CONFIG_TESTING_GETPRIME=y
-CONFIG_TESTING_OSTEST=y
-CONFIG_TESTING_SMP=y
-CONFIG_UART0_SERIAL_CONSOLE=y
-CONFIG_USERMAIN_STACKSIZE=3072
-CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/configs/kostest/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/configs/kostest/defconfig
deleted file mode 100644
index 20814c344..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/configs/kostest/defconfig
+++ /dev/null
@@ -1,51 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_STANDARD_SERIAL is not set
-CONFIG_ADD_NUTTX_FETURES=y
-CONFIG_ARCH="risc-v"
-CONFIG_ARCH_BOARD="aiit-riscv64-board"
-CONFIG_ARCH_BOARD_AIIT_RISCV64=y
-CONFIG_ARCH_CHIP="k210"
-CONFIG_ARCH_CHIP_K210=y
-CONFIG_ARCH_INTERRUPTSTACK=2048
-CONFIG_ARCH_RISCV=y
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_ARCH_USE_MPU=y
-CONFIG_BOARD_LOOPSPERMSEC=46000
-CONFIG_CLOCK_MONOTONIC=y
-CONFIG_BUILD_PROTECTED=y
-CONFIG_DEBUG_ASSERTIONS=y
-CONFIG_DEBUG_ERROR=y
-CONFIG_DEBUG_FEATURES=y
-CONFIG_DEBUG_FULLOPT=y
-CONFIG_DEBUG_SYMBOLS=y
-CONFIG_DEV_ZERO=y
-CONFIG_FS_PROCFS=y
-CONFIG_IDLETHREAD_STACKSIZE=2048
-CONFIG_INTELHEX_BINARY=y
-CONFIG_LIBC_PERROR_STDOUT=y
-CONFIG_LIBC_STRERROR=y
-CONFIG_MM_KERNEL_HEAPSIZE=524288
-CONFIG_NUTTX_USERSPACE=0x80100000
-CONFIG_PASS1_BUILDIR="boards/risc-v/k210/aiit-riscv64-board/kernel"
-CONFIG_PREALLOC_TIMERS=4
-CONFIG_RAM_SIZE=6291456
-CONFIG_RAM_START=0x80000000
-CONFIG_RAW_BINARY=y
-CONFIG_RR_INTERVAL=200
-CONFIG_SCHED_WAITPID=y
-CONFIG_STACK_COLORATION=y
-CONFIG_START_DAY=14
-CONFIG_START_MONTH=2
-CONFIG_START_YEAR=2020
-CONFIG_SYS_RESERVED=9
-CONFIG_TASK_NAME_SIZE=20
-CONFIG_TESTING_OSTEST=y
-CONFIG_UART0_SERIAL_CONSOLE=y
-CONFIG_USERMAIN_STACKSIZE=3072
-CONFIG_USER_ENTRYPOINT="ostest_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/configs/module/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/configs/module/defconfig
deleted file mode 100644
index 666f72481..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/configs/module/defconfig
+++ /dev/null
@@ -1,56 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_STANDARD_SERIAL is not set
-CONFIG_ADD_NUTTX_FETURES=y
-CONFIG_ARCH="risc-v"
-CONFIG_ARCH_BOARD="aiit-riscv64-board"
-CONFIG_ARCH_BOARD_AIIT_RISCV64=y
-CONFIG_ARCH_CHIP="k210"
-CONFIG_ARCH_CHIP_K210=y
-CONFIG_ARCH_INTERRUPTSTACK=2048
-CONFIG_ARCH_RISCV=y
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_BOARDCTL=y
-CONFIG_BOARDCTL_APP_SYMTAB=y
-CONFIG_BOARDCTL_ROMDISK=y
-CONFIG_BOARD_LOOPSPERMSEC=46000
-CONFIG_BUILTIN=y
-CONFIG_DEBUG_FULLOPT=y
-CONFIG_DEBUG_SYMBOLS=y
-CONFIG_DEV_ZERO=y
-CONFIG_ELF=y
-CONFIG_ELF_ALIGN_LOG2=3
-CONFIG_EXAMPLES_MODULE=y
-CONFIG_FS_PROCFS=y
-CONFIG_FS_ROMFS=y
-CONFIG_HAVE_CXX=y
-CONFIG_IDLETHREAD_STACKSIZE=2048
-CONFIG_INTELHEX_BINARY=y
-CONFIG_LIBC_ENVPATH=y
-CONFIG_LIBC_EXECFUNCS=y
-CONFIG_LIBC_PERROR_STDOUT=y
-CONFIG_LIBC_STRERROR=y
-CONFIG_MODULE=y
-CONFIG_PATH_INITIAL="/mnt/romfs"
-CONFIG_PIPES=y
-CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=3072
-CONFIG_PREALLOC_TIMERS=4
-CONFIG_RAM_SIZE=6291456
-CONFIG_RAM_START=0x80000000
-CONFIG_RAW_BINARY=y
-CONFIG_RR_INTERVAL=200
-CONFIG_SCHED_WAITPID=y
-CONFIG_STACK_COLORATION=y
-CONFIG_START_DAY=5
-CONFIG_START_MONTH=2
-CONFIG_START_YEAR=2020
-CONFIG_SYMTAB_ORDEREDBYNAME=y
-CONFIG_TASK_NAME_SIZE=20
-CONFIG_UART0_SERIAL_CONSOLE=y
-CONFIG_USERMAIN_STACKSIZE=3072
-CONFIG_USER_ENTRYPOINT="module_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/configs/nsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/configs/nsh/defconfig
index 44abceac8..641746360 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/configs/nsh/defconfig
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/configs/nsh/defconfig
@@ -19,13 +19,12 @@ CONFIG_ARCH_STACKDUMP=y
 CONFIG_BINFMT_DISABLE=y
 CONFIG_BOARD_LOOPSPERMSEC=46000
 CONFIG_BUILTIN=y
-CONFIG_CLOCK_MONOTONIC=y
 CONFIG_DEBUG_FULLOPT=y
 CONFIG_DEBUG_SYMBOLS=y
-CONFIG_DEV_ZERO=y
 CONFIG_EXAMPLES_HELLO=y
-CONFIG_FS_PROCFS=y
 CONFIG_IDLETHREAD_STACKSIZE=2048
+CONFIG_INIT_ENTRYPOINT="nsh_main"
+CONFIG_INIT_STACKSIZE=3072
 CONFIG_INTELHEX_BINARY=y
 CONFIG_LIBC_PERROR_STDOUT=y
 CONFIG_LIBC_STRERROR=y
@@ -39,10 +38,12 @@ CONFIG_NSH_DISABLE_UMOUNT=y
 CONFIG_NSH_READLINE=y
 CONFIG_NSH_STRERROR=y
 CONFIG_PREALLOC_TIMERS=4
-CONFIG_RAM_SIZE=6291456
-CONFIG_RAM_START=0x80000000
+CONFIG_RAM_SIZE=2097152
+CONFIG_RAM_START=0x80400000
 CONFIG_RAW_BINARY=y
 CONFIG_READLINE_CMD_HISTORY=y
+CONFIG_READLINE_CMD_HISTORY_LEN=100
+CONFIG_READLINE_CMD_HISTORY_LINELEN=120
 CONFIG_RR_INTERVAL=200
 CONFIG_SCHED_WAITPID=y
 CONFIG_STACK_COLORATION=y
@@ -52,7 +53,7 @@ CONFIG_START_YEAR=2019
 CONFIG_SYSTEM_NSH=y
 CONFIG_TASK_NAME_SIZE=20
 CONFIG_TESTING_GETPRIME=y
-CONFIG_TESTING_OSTEST=y
 CONFIG_UART0_SERIAL_CONSOLE=y
-CONFIG_USERMAIN_STACKSIZE=3072
-CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_READLINE_TABCOMPLETION=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_DEV_GPIO=y
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/configs/posix_spawn/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/configs/posix_spawn/defconfig
deleted file mode 100644
index 15a3e123f..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/configs/posix_spawn/defconfig
+++ /dev/null
@@ -1,53 +0,0 @@
-#
-# This file is autogenerated: PLEASE DO NOT EDIT IT.
-#
-# You can use "make menuconfig" to make any modifications to the installed .config file.
-# You can then do "make savedefconfig" to generate a new defconfig file that includes your
-# modifications.
-#
-# CONFIG_STANDARD_SERIAL is not set
-CONFIG_ADD_NUTTX_FETURES=y
-CONFIG_ARCH="risc-v"
-CONFIG_ARCH_BOARD="aiit-riscv64-board"
-CONFIG_ARCH_BOARD_AIIT_RISCV64=y
-CONFIG_ARCH_CHIP="k210"
-CONFIG_ARCH_CHIP_K210=y
-CONFIG_ARCH_INTERRUPTSTACK=2048
-CONFIG_ARCH_RISCV=y
-CONFIG_ARCH_STACKDUMP=y
-CONFIG_BOARDCTL=y
-CONFIG_BOARDCTL_APP_SYMTAB=y
-CONFIG_BOARDCTL_ROMDISK=y
-CONFIG_BOARD_LOOPSPERMSEC=46000
-CONFIG_BUILTIN=y
-CONFIG_DEBUG_FULLOPT=y
-CONFIG_DEBUG_SYMBOLS=y
-CONFIG_DEV_ZERO=y
-CONFIG_ELF=y
-CONFIG_EXAMPLES_POSIXSPAWN=y
-CONFIG_FS_PROCFS=y
-CONFIG_FS_ROMFS=y
-CONFIG_IDLETHREAD_STACKSIZE=2048
-CONFIG_INTELHEX_BINARY=y
-CONFIG_LIBC_ENVPATH=y
-CONFIG_LIBC_EXECFUNCS=y
-CONFIG_LIBC_PERROR_STDOUT=y
-CONFIG_LIBC_STRERROR=y
-CONFIG_PATH_INITIAL="/mnt/romfs"
-CONFIG_PIPES=y
-CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=2048
-CONFIG_PREALLOC_TIMERS=4
-CONFIG_RAM_SIZE=6291456
-CONFIG_RAM_START=0x80000000
-CONFIG_RAW_BINARY=y
-CONFIG_RR_INTERVAL=200
-CONFIG_SCHED_WAITPID=y
-CONFIG_STACK_COLORATION=y
-CONFIG_START_DAY=28
-CONFIG_START_MONTH=12
-CONFIG_START_YEAR=2019
-CONFIG_SYMTAB_ORDEREDBYNAME=y
-CONFIG_TASK_NAME_SIZE=20
-CONFIG_UART0_SERIAL_CONSOLE=y
-CONFIG_USERMAIN_STACKSIZE=3072
-CONFIG_USER_ENTRYPOINT="posix_spawn_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/include/board.h b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/include/board.h
index 966069836..c80fd878f 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/include/board.h
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/include/board.h
@@ -1,31 +1,22 @@
-/****************************************************************************
- * boards/risc-v/k210/maix-bit/include/board.h
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements.  See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership.  The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License.  You may obtain a copy of the License at
- *
- *   http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
+/*
+* Copyright (c) 2020 AIIT XUOS Lab
+* XiUOS is licensed under Mulan PSL v2.
+* You can use this software according to the terms and conditions of the Mulan PSL v2.
+* You may obtain a copy of Mulan PSL v2 at:
+*        http://license.coscl.org.cn/MulanPSL2
+* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+* See the Mulan PSL v2 for more details.
+*/
 
 /**
-* @file board.h
-* @brief nuttx source code
-*                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
+ * @file board.h
+ * @brief aiit-riscv64-board board.h
+ * @version 1.0
+ * @author AIIT XUOS Lab
+ * @date 2022.03.17
+ */
 
 #ifndef __BOARDS_K210_AIIT_RISCV64_INCLUDE_BOARD_H
 #define __BOARDS_K210_AIIT_RISCV64_INCLUDE_BOARD_H
@@ -64,6 +55,11 @@
 #define LED_ASSERTION     6  /* N/C */
 #define LED_PANIC         7  /* blink */
 
+/* GPIO pins used by the GPIO Subsystem */
+
+#define BOARD_NGPIOOUT    2 /* Amount of GPIO Output pins */
+#define BOARD_NGPIOINT    0 /* Amount of GPIO Input */
+
 /****************************************************************************
  * Public Types
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/kernel/Makefile b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/kernel/Makefile
index 538b81c9a..9c9b71aa0 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/kernel/Makefile
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/kernel/Makefile
@@ -22,29 +22,18 @@ include $(TOPDIR)/Make.defs
 
 # The entry point name (if none is provided in the .config file)
 
-CONFIG_USER_ENTRYPOINT ?= user_start
-ENTRYPT = $(patsubst "%",%,$(CONFIG_USER_ENTRYPOINT))
+CONFIG_INIT_ENTRYPOINT ?= user_start
+ENTRYPT = $(patsubst "%",%,$(CONFIG_INIT_ENTRYPOINT))
 
 # Get the paths to the libraries and the links script path in format that
 # is appropriate for the host OS
 
-ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
-  # Windows-native toolchains
-  USER_LIBPATHS = ${shell for path in $(USERLIBS); do dir=`dirname $(TOPDIR)$(DELIM)$$path`;echo "-L\"`cygpath -w $$dir`\"";done}
-  USER_LDSCRIPT = -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)memory.ld}"
-  USER_LDSCRIPT += -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)user-space.ld}"
-  USER_HEXFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.hex}"
-  USER_SRECFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.srec}"
-  USER_BINFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.bin}"
-else
-  # Linux/Cygwin-native toolchain
-  USER_LIBPATHS = $(addprefix -L$(TOPDIR)$(DELIM),$(dir $(USERLIBS)))
-  USER_LDSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)memory.ld
-  USER_LDSCRIPT += -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)user-space.ld
-  USER_HEXFILE += "$(TOPDIR)$(DELIM)nuttx_user.hex"
-  USER_SRECFILE += "$(TOPDIR)$(DELIM)nuttx_user.srec"
-  USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin"
-endif
+USER_LIBPATHS = $(addprefix -L,$(call CONVERT_PATH,$(addprefix $(TOPDIR)$(DELIM),$(dir $(USERLIBS)))))
+USER_LDSCRIPT = -T $(call CONVERT_PATH,$(BOARD_DIR)$(DELIM)scripts$(DELIM)memory.ld)
+USER_LDSCRIPT += -T $(call CONVERT_PATH,$(BOARD_DIR)$(DELIM)scripts$(DELIM)user-space.ld)
+USER_HEXFILE += $(call CONVERT_PATH,$(TOPDIR)$(DELIM)nuttx_user.hex)
+USER_SRECFILE += $(call CONVERT_PATH,$(TOPDIR)$(DELIM)nuttx_user.srec)
+USER_BINFILE += $(call CONVERT_PATH,$(TOPDIR)$(DELIM)nuttx_user.bin)
 
 USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT)
 USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS))))
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/kernel/k210_userspace.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/kernel/k210_userspace.c
index ba57aba7c..3bca134c2 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/kernel/k210_userspace.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/kernel/k210_userspace.c
@@ -1,31 +1,22 @@
-/****************************************************************************
- * boards/risc-v/k210/aiit-riscv64-board/kernel/k210_userspace.c
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements.  See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership.  The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License.  You may obtain a copy of the License at
- *
- *   http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
+/*
+* Copyright (c) 2020 AIIT XUOS Lab
+* XiUOS is licensed under Mulan PSL v2.
+* You can use this software according to the terms and conditions of the Mulan PSL v2.
+* You may obtain a copy of Mulan PSL v2 at:
+*        http://license.coscl.org.cn/MulanPSL2
+* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+* See the Mulan PSL v2 for more details.
+*/
 
 /**
-* @file k210_userspace.c
-* @brief nuttx source code
-*                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
+ * @file k210_userspace.c
+ * @brief aiit-riscv64-board k210_userspace.c
+ * @version 1.0
+ * @author AIIT XUOS Lab
+ * @date 2022.03.17
+ */
 
 /****************************************************************************
  * Included Files
@@ -82,13 +73,13 @@ extern uint32_t _ebss;            /* End+1 of .bss */
 
 /* This is the user space entry point */
 
-int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]);
+int CONFIG_INIT_ENTRYPOINT(int argc, char *argv[]);
 
 const struct userspace_s userspace locate_data(".userspace") =
 {
   /* General memory map */
 
-  .us_entrypoint    = (main_t)CONFIG_USER_ENTRYPOINT,
+  .us_entrypoint    = (main_t)CONFIG_INIT_ENTRYPOINT,
   .us_textstart     = (uintptr_t)&_stext,
   .us_textend       = (uintptr_t)&_etext,
   .us_datasource    = (uintptr_t)&_eronly,
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/scripts/Make.defs b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/scripts/Make.defs
index 53869fd4e..0a04e3d65 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/scripts/Make.defs
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/scripts/Make.defs
@@ -20,15 +20,11 @@
 
 include $(TOPDIR)/.config
 include $(TOPDIR)/tools/Config.mk
-include $(TOPDIR)/arch/risc-v/src/rv64gc/Toolchain.defs
+include $(TOPDIR)/arch/risc-v/src/common/Toolchain.defs
 
 LDSCRIPT = ld.script
 
-ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
-  ARCHSCRIPT = -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}"
-else
-  ARCHSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
-endif
+ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
 
 ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
   ARCHOPTIMIZATION = -g
@@ -38,57 +34,36 @@ endif
 MAXOPTIMIZATION = -Os
 
 ifneq ($(CONFIG_DEBUG_NOOPT),y)
-  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing
 endif
 
-ifeq ($(CONFIG_ARCH_HAVE_DPFPU),y)
-  ARCHCPUFLAGS = -march=rv64gc -mabi=lp64d -mcmodel=medany -mstrict-align
-else
-  ARCHCPUFLAGS = -march=rv64imac -mabi=lp64 -mcmodel=medany -mstrict-align
-endif
-
-ARCHCFLAGS = -fno-builtin -ffunction-sections -fdata-sections -fno-omit-frame-pointer
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
+ARCHCPUFLAGS += -mcmodel=medany -mstrict-align
+ARCHCFLAGS = -fno-common -ffunction-sections -fdata-sections
+ARCHCXXFLAGS = -fno-common -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 
-SDKINCLUDES = -I$(TOPDIR)/arch/risc-v/src/k210 
-
-CFLAGS := $(APPPATHS) $(SDKINCLUDES) $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
+CFLAGS := $(APPPATHS) $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
 CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
 CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
 CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
 CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
 AFLAGS += $(CFLAGS) -D__ASSEMBLY__ $(ASARCHCPUFLAGS)
 
-# NXFLAT module definitions
-
-NXFLATLDFLAGS1 = -r -d -warn-common
-NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
-LDNXFLATFLAGS = -e main -s 2048
-
 # Loadable module definitions
 
 CMODULEFLAGS = $(CFLAGS)
 
 LDMODULEFLAGS = -r -e module_initialize
-ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
-  LDMODULEFLAGS += -T "${shell cygpath -w $(TOPDIR)/libs/libc/modlib/gnu-elf.ld}"
-else
-  LDMODULEFLAGS += -T $(TOPDIR)/libs/libc/modlib/gnu-elf.ld
-endif
+LDMODULEFLAGS += -T $(call CONVERT_PATH,$(TOPDIR)/libs/libc/modlib/gnu-elf.ld)
 
 # ELF module definitions
 
-CELFFLAGS = $(CFLAGS) -fno-common
-CXXELFFLAGS = $(CXXFLAGS) -fno-common
+CELFFLAGS = $(CFLAGS)
+CXXELFFLAGS = $(CXXFLAGS)
 
 LDELFFLAGS = -r -e main
-ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
-  LDELFFLAGS += -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)gnu-elf.ld}"
-else
-  LDELFFLAGS += -T $(BOARD_DIR)$(DELIM)scripts$(DELIM)gnu-elf.ld
-endif
+LDELFFLAGS += -T $(call CONVERT_PATH,$(BOARD_DIR)$(DELIM)scripts$(DELIM)gnu-elf.ld)
 
 # File extensions
 
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/scripts/ld.script b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/scripts/ld.script
index e253fbdc1..ad95526d6 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/scripts/ld.script
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/scripts/ld.script
@@ -79,10 +79,8 @@ SECTIONS
         *(.gnu.linkonce.b.*)
         *(.gnu.linkonce.sb.*)
         *(COMMON)
-        . = ALIGN(4);
-        _ebss = ABSOLUTE(.);
         . = ALIGN(32);
-        _default_stack_limit = ABSOLUTE(.);
+        _ebss = ABSOLUTE(.);
     } > sram
 
     /* Stabs debugging sections. */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/src/Makefile b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/src/Makefile
index 61c309713..5dceb4b28 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/src/Makefile
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/src/Makefile
@@ -34,8 +34,4 @@ ifeq ($(CONFIG_DEV_GPIO),y)
 CSRCS += k210_gpio.c
 endif
 
-ifeq ($(CONFIG_ARCH_FPU),y)
-CSRCS += k210_ostest.c
-endif
-
 include $(TOPDIR)/boards/Board.mk
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/src/aiit-riscv64-board.h b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/src/aiit-riscv64-board.h
index 50cfa013e..902641c5e 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/src/aiit-riscv64-board.h
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/src/aiit-riscv64-board.h
@@ -1,32 +1,22 @@
-/****************************************************************************
- * boards/risc-v/k210/aiit-riscv64-board/src/aiit-riscv64-board.h
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements.  See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership.  The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License.  You may obtain a copy of the License at
- *
- *   http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
-
+/*
+* Copyright (c) 2020 AIIT XUOS Lab
+* XiUOS is licensed under Mulan PSL v2.
+* You can use this software according to the terms and conditions of the Mulan PSL v2.
+* You may obtain a copy of Mulan PSL v2 at:
+*        http://license.coscl.org.cn/MulanPSL2
+* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+* See the Mulan PSL v2 for more details.
+*/
 
 /**
-* @file aiit-riscv64-board.h
-* @brief nuttx source code
-*                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
+ * @file aiit-riscv64-board.h.h
+ * @brief aiit-riscv64-board aiit-riscv64-board.h.h
+ * @version 1.0
+ * @author AIIT XUOS Lab
+ * @date 2022.03.17
+ */
 
 #ifndef __AIIT_RISCV64_BOARDS_K210_H
 #define __AIIT_RISCV64_BOARDS_K210_H
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/src/k210_appinit.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/src/k210_appinit.c
index 2a9a838d4..ab3db2bca 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/src/k210_appinit.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/src/k210_appinit.c
@@ -1,31 +1,22 @@
-/****************************************************************************
- * boards/risc-v/k210/aiit-riscv64-board/src/k210_appinit.c
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements.  See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership.  The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License.  You may obtain a copy of the License at
- *
- *   http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
+/*
+* Copyright (c) 2020 AIIT XUOS Lab
+* XiUOS is licensed under Mulan PSL v2.
+* You can use this software according to the terms and conditions of the Mulan PSL v2.
+* You may obtain a copy of Mulan PSL v2 at:
+*        http://license.coscl.org.cn/MulanPSL2
+* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+* See the Mulan PSL v2 for more details.
+*/
 
 /**
-* @file k210_appinit.c
-* @brief nuttx source code
-*                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
+ * @file k210_appinit.c
+ * @brief aiit-riscv64-board k210_appinit.c
+ * @version 1.0
+ * @author AIIT XUOS Lab
+ * @date 2022.03.17
+ */
 
 /****************************************************************************
  * Included Files
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/src/k210_boot.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/src/k210_boot.c
index e4ae4f4b9..5cab4cce7 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/src/k210_boot.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/src/k210_boot.c
@@ -1,31 +1,22 @@
-/****************************************************************************
- * boards/risc-v/k210/aiit-riscv64-board/src/k210_boot.c
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements.  See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership.  The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License.  You may obtain a copy of the License at
- *
- *   http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
+/*
+* Copyright (c) 2020 AIIT XUOS Lab
+* XiUOS is licensed under Mulan PSL v2.
+* You can use this software according to the terms and conditions of the Mulan PSL v2.
+* You may obtain a copy of Mulan PSL v2 at:
+*        http://license.coscl.org.cn/MulanPSL2
+* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+* See the Mulan PSL v2 for more details.
+*/
 
 /**
-* @file k210_boot.c
-* @brief nuttx source code
-*                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
+ * @file k210_boot.c
+ * @brief aiit-riscv64-board k210_boot.c
+ * @version 1.0
+ * @author AIIT XUOS Lab
+ * @date 2022.03.17
+ */
 
 /****************************************************************************
  * Included Files
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/src/k210_bringup.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/src/k210_bringup.c
index a5ffc9ede..4b6b5efeb 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/src/k210_bringup.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/src/k210_bringup.c
@@ -1,31 +1,22 @@
-/****************************************************************************
- * boards/risc-v/k210/maix-bit/src/k210_bringup.c
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements.  See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership.  The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License.  You may obtain a copy of the License at
- *
- *   http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
+/*
+* Copyright (c) 2020 AIIT XUOS Lab
+* XiUOS is licensed under Mulan PSL v2.
+* You can use this software according to the terms and conditions of the Mulan PSL v2.
+* You may obtain a copy of Mulan PSL v2 at:
+*        http://license.coscl.org.cn/MulanPSL2
+* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+* See the Mulan PSL v2 for more details.
+*/
 
 /**
-* @file k210_bringup.c
-* @brief nuttx source code
-*                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
+ * @file k210_bringup.c
+ * @brief aiit-riscv64-board k210_bringup.c
+ * @version 1.0
+ * @author AIIT XUOS Lab
+ * @date 2022.03.17
+ */
 
 /****************************************************************************
  * Included Files
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/src/k210_gpio.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/src/k210_gpio.c
index b4e71b8d5..6c81fb8be 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/src/k210_gpio.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/src/k210_gpio.c
@@ -1,31 +1,22 @@
-/****************************************************************************
- * boards/risc-v/k210/aiit-riscv64-board/src/k210_gpio.c
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements.  See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership.  The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License.  You may obtain a copy of the License at
- *
- *   http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
+/*
+* Copyright (c) 2020 AIIT XUOS Lab
+* XiOS is licensed under Mulan PSL v2.
+* You can use this software according to the terms and conditions of the Mulan PSL v2.
+* You may obtain a copy of Mulan PSL v2 at:
+*        http://license.coscl.org.cn/MulanPSL2
+* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+* See the Mulan PSL v2 for more details.
+*/
 
 /**
-* @file k210_gpio.c
-* @brief nuttx source code
-*                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
+ * @file k210_gpio.c
+ * @brief aiit-riscv64-board k210_gpio.c
+ * @version 1.0
+ * @author AIIT XUOS Lab
+ * @date 2022.06.08
+ */
 
 /****************************************************************************
  * Included Files
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/src/k210_leds.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/src/k210_leds.c
index 337a56715..c62ffa1dd 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/src/k210_leds.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/src/k210_leds.c
@@ -1,31 +1,22 @@
-/****************************************************************************
- * boards/risc-v/k210/aiit-riscv64-board/src/k210_leds.c
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements.  See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership.  The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License.  You may obtain a copy of the License at
- *
- *   http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
+/*
+* Copyright (c) 2020 AIIT XUOS Lab
+* XiOS is licensed under Mulan PSL v2.
+* You can use this software according to the terms and conditions of the Mulan PSL v2.
+* You may obtain a copy of Mulan PSL v2 at:
+*        http://license.coscl.org.cn/MulanPSL2
+* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+* See the Mulan PSL v2 for more details.
+*/
 
 /**
-* @file k210_leds.c
-* @brief nuttx source code
-*                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
+ * @file k210_leds.c
+ * @brief aiit-riscv64-board k210_leds.c
+ * @version 1.0
+ * @author AIIT XUOS Lab
+ * @date 2022.06.08
+ */
 
 /****************************************************************************
  * Included Files
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/Kconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/Kconfig
similarity index 81%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/Kconfig
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/Kconfig
index e729e70d3..2f080eff2 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/Kconfig
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/Kconfig
@@ -3,85 +3,85 @@
 # see the file kconfig-language.txt in the NuttX tools repository.
 #
 
-if ARCH_BOARD_XIDATONG
+if ARCH_BOARD_XIDATONG_ARM32
 
 choice
     prompt "Boot Flash"
-    default XIDATONG_QSPI_FLASH
+    default XIDATONG_ARM32_QSPI_FLASH
 
-config XIDATONG_HYPER_FLASH
+config XIDATONG_ARM32_HYPER_FLASH
     bool "HYPER Flash"
 
-config XIDATONG_QSPI_FLASH
+config XIDATONG_ARM32_QSPI_FLASH
     bool "QSPI Flash"
 
 endchoice # Boot Flash
 
-config XIDATONG_SDRAM
+config XIDATONG_ARM32_SDRAM
     bool "Enable SDRAM"
     default y
     select IMXRT_SEMC_INIT_DONE
     ---help---
         Activate DCD configuration of SDRAM
 
-config XIDATONG_SDIO_AUTOMOUNT
+config XIDATONG_ARM32_SDIO_AUTOMOUNT
     bool "SD card automounter"
     default n
     depends on FS_AUTOMOUNTER && IMXRT_USDHC
 
-if XIDATONG_SDIO_AUTOMOUNT
+if XIDATONG_ARM32_SDIO_AUTOMOUNT
 
-config XIDATONG_SDIO_AUTOMOUNT_FSTYPE
+config XIDATONG_ARM32_SDIO_AUTOMOUNT_FSTYPE
     string "SD card file system type"
     default "vfat"
 
-config XIDATONG_SDIO_AUTOMOUNT_BLKDEV
+config XIDATONG_ARM32_SDIO_AUTOMOUNT_BLKDEV
     string "SD card block device"
     default "/dev/mmcsd0"
 
-config XIDATONG_SDIO_AUTOMOUNT_MOUNTPOINT
+config XIDATONG_ARM32_SDIO_AUTOMOUNT_MOUNTPOINT
     string "SD card mount point"
     default "/mnt/sdcard"
 
-config XIDATONG_SDIO_AUTOMOUNT_DDELAY
+config XIDATONG_ARM32_SDIO_AUTOMOUNT_DDELAY
     int "SD card debounce delay (milliseconds)"
     default 1000
 
-config XIDATONG_SDIO_AUTOMOUNT_UDELAY
+config XIDATONG_ARM32_SDIO_AUTOMOUNT_UDELAY
     int "SD card unmount retry delay (milliseconds)"
     default 2000
 
-endif # XIDATONG_SDIO_AUTOMOUNT
+endif # XIDATONG_ARM32_SDIO_AUTOMOUNT
 
-config XIDATONG_USB_AUTOMOUNT
+config XIDATONG_ARM32_USB_AUTOMOUNT
     bool "USB Mass Storage automounter"
     default n
     depends on USBHOST_MSC && USBHOST_MSC_NOTIFIER
 
-if XIDATONG_USB_AUTOMOUNT
+if XIDATONG_ARM32_USB_AUTOMOUNT
 
-config XIDATONG_USB_AUTOMOUNT_FSTYPE
+config XIDATONG_ARM32_USB_AUTOMOUNT_FSTYPE
     string "USB file system type"
     default "vfat"
 
-config XIDATONG_USB_AUTOMOUNT_BLKDEV
+config XIDATONG_ARM32_USB_AUTOMOUNT_BLKDEV
     string "USB block device prefix"
     default "/dev/sd"
 
-config XIDATONG_USB_AUTOMOUNT_MOUNTPOINT
+config XIDATONG_ARM32_USB_AUTOMOUNT_MOUNTPOINT
     string "USB mount point prefix"
     default "/mnt/usb"
 
-config XIDATONG_USB_AUTOMOUNT_NUM_BLKDEV
+config XIDATONG_ARM32_USB_AUTOMOUNT_NUM_BLKDEV
     int "Number of block devices to monitor."
     range 1 26
     default 4
 
-config XIDATONG_USB_AUTOMOUNT_UDELAY
+config XIDATONG_ARM32_USB_AUTOMOUNT_UDELAY
     int "USB unmount retry delay (milliseconds)"
     default 2000
 
-endif # XIDATONG_USB_AUTOMOUNT
+endif # XIDATONG_ARM32_USB_AUTOMOUNT
 
 menuconfig BSP_USING_CH438
     bool "Using CH438 device"
@@ -202,4 +202,4 @@ endmenu
 
 endif # BSP_USING_CH438
 
-endif # ARCH_BOARD_XIDATONG
+endif # ARCH_BOARD_XIDATONG_ARM32
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/4gnsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/4gnsh/defconfig
similarity index 94%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/4gnsh/defconfig
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/4gnsh/defconfig
index 6239ffa42..e77bb4385 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/4gnsh/defconfig
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/4gnsh/defconfig
@@ -7,8 +7,8 @@
 #
 CONFIG_ADD_NUTTX_FETURES=y
 CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="xidatong"
-CONFIG_ARCH_BOARD_XIDATONG=y
+CONFIG_ARCH_BOARD="xidatong-arm32"
+CONFIG_ARCH_BOARD_XIDATONG_ARM32=y
 CONFIG_ARCH_CHIP="imxrt"
 CONFIG_ARCH_CHIP_IMXRT=y
 CONFIG_ARCH_CHIP_MIMXRT1052CVL5B=y
@@ -65,4 +65,4 @@ CONFIG_FS_ROMFS=y
 CONFIG_NSH_ROMFSETC=y
 CONFIG_NSH_ARCHROMFS=y
 CONFIG_BOARDCTL_RESET=y
-CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_INIT_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/btnsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/btnsh/defconfig
similarity index 94%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/btnsh/defconfig
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/btnsh/defconfig
index fff76d485..9b7af5b16 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/btnsh/defconfig
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/btnsh/defconfig
@@ -7,8 +7,8 @@
 #
 CONFIG_ADD_NUTTX_FETURES=y
 CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="xidatong"
-CONFIG_ARCH_BOARD_XIDATONG=y
+CONFIG_ARCH_BOARD="xidatong-arm32"
+CONFIG_ARCH_BOARD_XIDATONG_ARM32=y
 CONFIG_ARCH_CHIP="imxrt"
 CONFIG_ARCH_CHIP_IMXRT=y
 CONFIG_ARCH_CHIP_MIMXRT1052CVL5B=y
@@ -62,4 +62,4 @@ CONFIG_ADAPTER_BLUETOOTH_HC08="hc08"
 CONFIG_ADAPTER_HC08_WORK_ROLE="M"
 CONFIG_ADAPTER_HC08_DRIVER_EXTUART=y
 CONFIG_ADAPTER_HC08_DRIVER="/dev/extuart_dev2"
-CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_INIT_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/knsh/Make.defs b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/knsh/Make.defs
similarity index 98%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/knsh/Make.defs
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/knsh/Make.defs
index 3b7371cf7..00b339b61 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/knsh/Make.defs
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/knsh/Make.defs
@@ -1,5 +1,5 @@
 ############################################################################
-# boards/arm/imxrt/xidatong/configs/knsh/Make.defs
+# boards/arm/imxrt/xidatong-arm32/configs/knsh/Make.defs
 #
 # Licensed to the Apache Software Foundation (ASF) under one or more
 # contributor license agreements.  See the NOTICE file distributed with
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/knsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/knsh/defconfig
similarity index 89%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/knsh/defconfig
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/knsh/defconfig
index ed458a723..ff39028e0 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/knsh/defconfig
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/knsh/defconfig
@@ -8,8 +8,8 @@
 # CONFIG_ARCH_RAMFUNCS is not set
 CONFIG_ADD_NUTTX_FETURES=y
 CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="xidatong"
-CONFIG_ARCH_BOARD_XIDATONG=y
+CONFIG_ARCH_BOARD="xidatong-arm32"
+CONFIG_ARCH_BOARD_XIDATONG_ARM32=y
 CONFIG_ARCH_CHIP="imxrt"
 CONFIG_ARCH_CHIP_IMXRT=y
 CONFIG_ARCH_CHIP_MIMXRT1052CVL5B=y
@@ -35,7 +35,7 @@ CONFIG_NSH_FILEIOSIZE=512
 CONFIG_NSH_LINELEN=64
 CONFIG_NSH_READLINE=y
 CONFIG_NUTTX_USERSPACE=0x60200000
-CONFIG_PASS1_BUILDIR="boards/arm/imxrt/xidatong/kernel"
+CONFIG_PASS1_BUILDIR="boards/arm/imxrt/xidatong-arm32/kernel"
 CONFIG_RAM_SIZE=524288
 CONFIG_RAM_START=0x20200000
 CONFIG_RAW_BINARY=y
@@ -54,4 +54,4 @@ CONFIG_FS_ROMFS=y
 CONFIG_NSH_ROMFSETC=y
 CONFIG_NSH_ARCHROMFS=y
 CONFIG_BOARDCTL_RESET=y
-CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_INIT_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/lcdnsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/lcdnsh/defconfig
similarity index 96%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/lcdnsh/defconfig
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/lcdnsh/defconfig
index 7083d8a39..df2f82504 100755
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/lcdnsh/defconfig
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/lcdnsh/defconfig
@@ -7,8 +7,8 @@
 #
 CONFIG_ADD_NUTTX_FETURES=y
 CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="xidatong"
-CONFIG_ARCH_BOARD_XIDATONG=y
+CONFIG_ARCH_BOARD="xidatong-arm32"
+CONFIG_ARCH_BOARD_XIDATONG_ARM32=y
 CONFIG_ARCH_CHIP="imxrt"
 CONFIG_ARCH_CHIP_IMXRT=y
 CONFIG_ARCH_CHIP_MIMXRT1052CVL5B=y
@@ -47,7 +47,7 @@ CONFIG_READLINE_CMD_HISTORY_LEN=100
 CONFIG_READLINE_CMD_HISTORY_LINELEN=120
 CONFIG_READLINE_TABCOMPLETION=y
 
-CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_INIT_ENTRYPOINT="nsh_main"
 
 CONFIG_IMXRT_LPI2C=y
 CONFIG_IMXRT_LCD=y
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/libcxxtest/Make.defs b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/libcxxtest/Make.defs
similarity index 97%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/libcxxtest/Make.defs
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/libcxxtest/Make.defs
index 8d5a217a8..e743b5926 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/libcxxtest/Make.defs
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/libcxxtest/Make.defs
@@ -1,5 +1,5 @@
 ############################################################################
-# boards/arm/imxrt/xidatong/configs/libcxxtest/Make.defs
+# boards/arm/imxrt/xidatong-arm32/configs/libcxxtest/Make.defs
 #
 # Licensed to the Apache Software Foundation (ASF) under one or more
 # contributor license agreements.  See the NOTICE file distributed with
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/libcxxtest/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/libcxxtest/defconfig
similarity index 93%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/libcxxtest/defconfig
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/libcxxtest/defconfig
index f347bad94..9ebbdc50c 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/libcxxtest/defconfig
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/libcxxtest/defconfig
@@ -7,8 +7,8 @@
 #
 CONFIG_ADD_NUTTX_FETURES=y
 CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="xidatong"
-CONFIG_ARCH_BOARD_XIDATONG=y
+CONFIG_ARCH_BOARD="xidatong-arm32"
+CONFIG_ARCH_BOARD_XIDATONG_ARM32=y
 CONFIG_ARCH_CHIP="imxrt"
 CONFIG_ARCH_CHIP_IMXRT=y
 CONFIG_ARCH_CHIP_MIMXRT1052CVL5B=y
@@ -53,4 +53,4 @@ CONFIG_FS_ROMFS=y
 CONFIG_NSH_ROMFSETC=y
 CONFIG_NSH_ARCHROMFS=y
 CONFIG_BOARDCTL_RESET=y
-CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_INIT_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/loransh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/loransh/defconfig
similarity index 90%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/loransh/defconfig
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/loransh/defconfig
index 7d41f2298..b13f681e5 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/loransh/defconfig
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/loransh/defconfig
@@ -7,8 +7,8 @@
 #
 CONFIG_ADD_NUTTX_FETURES=y
 CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="xidatong"
-CONFIG_ARCH_BOARD_XIDATONG=y
+CONFIG_ARCH_BOARD="xidatong-arm32"
+CONFIG_ARCH_BOARD_XIDATONG_ARM32=y
 CONFIG_ARCH_CHIP="imxrt"
 CONFIG_ARCH_CHIP_IMXRT=y
 CONFIG_ARCH_CHIP_MIMXRT1052CVL5B=y
@@ -60,6 +60,6 @@ CONFIG_ADAPTER_E220=y
 CONFIG_ADAPTER_LORA_E220="e220"
 CONFIG_ADAPTER_E220_DRIVER_EXTUART=y
 CONFIG_ADAPTER_E220_DRIVER="/dev/extuart_dev3"
-CONFIG_ADAPTER_E220_M0_PATH="/dev/gpout0"
-CONFIG_ADAPTER_E220_M1_PATH="/dev/gpout1"
-CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_ADAPTER_E220_M0_PATH="/dev/gpio0"
+CONFIG_ADAPTER_E220_M1_PATH="/dev/gpio1"
+CONFIG_INIT_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/netnsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/netnsh/defconfig
similarity index 95%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/netnsh/defconfig
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/netnsh/defconfig
index 901df0b65..9c4f04b90 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/netnsh/defconfig
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/netnsh/defconfig
@@ -8,8 +8,8 @@
 # CONFIG_ARCH_LEDS is not set
 CONFIG_ADD_NUTTX_FETURES=y
 CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="xidatong"
-CONFIG_ARCH_BOARD_XIDATONG=y
+CONFIG_ARCH_BOARD="xidatong-arm32"
+CONFIG_ARCH_BOARD_XIDATONG_ARM32=y
 CONFIG_ARCH_CHIP="imxrt"
 CONFIG_ARCH_CHIP_IMXRT=y
 CONFIG_ARCH_CHIP_MIMXRT1052CVL5B=y
@@ -76,4 +76,4 @@ CONFIG_FS_ROMFS=y
 CONFIG_NSH_ROMFSETC=y
 CONFIG_NSH_ARCHROMFS=y
 CONFIG_BOARDCTL_RESET=y
-CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_INIT_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/nsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/nsh/defconfig
similarity index 93%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/nsh/defconfig
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/nsh/defconfig
index a03e3c01f..9bbac573a 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/nsh/defconfig
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/nsh/defconfig
@@ -7,8 +7,8 @@
 #
 CONFIG_ADD_NUTTX_FETURES=y
 CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="xidatong"
-CONFIG_ARCH_BOARD_XIDATONG=y
+CONFIG_ARCH_BOARD="xidatong-arm32"
+CONFIG_ARCH_BOARD_XIDATONG_ARM32=y
 CONFIG_ARCH_CHIP="imxrt"
 CONFIG_ARCH_CHIP_IMXRT=y
 CONFIG_ARCH_CHIP_MIMXRT1052CVL5B=y
@@ -51,4 +51,4 @@ CONFIG_FS_ROMFS=y
 CONFIG_NSH_ROMFSETC=y
 CONFIG_NSH_ARCHROMFS=y
 CONFIG_BOARDCTL_RESET=y
-CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_INIT_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/sdionsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/sdionsh/defconfig
similarity index 92%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/sdionsh/defconfig
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/sdionsh/defconfig
index 8f33ec725..09b581648 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/sdionsh/defconfig
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/sdionsh/defconfig
@@ -7,8 +7,8 @@
 #
 CONFIG_ADD_NUTTX_FETURES=y
 CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="xidatong"
-CONFIG_ARCH_BOARD_XIDATONG=y
+CONFIG_ARCH_BOARD="xidatong-arm32"
+CONFIG_ARCH_BOARD_XIDATONG_ARM32=y
 CONFIG_ARCH_CHIP="imxrt"
 CONFIG_ARCH_CHIP_IMXRT=y
 CONFIG_ARCH_CHIP_MIMXRT1052CVL5B=y
@@ -63,11 +63,11 @@ CONFIG_START_MONTH=3
 CONFIG_SYSTEM_CLE_CMD_HISTORY=y
 CONFIG_SYSTEM_COLOR_CLE=y
 CONFIG_FS_AUTOMOUNTER=y
-CONFIG_XIDATONG_SDIO_AUTOMOUNT=y
+CONFIG_XIDATONG_ARM32_SDIO_AUTOMOUNT=y
 CONFIG_SYSTEM_NSH=y
 CONFIG_READLINE_CMD_HISTORY=y
 CONFIG_READLINE_CMD_HISTORY_LEN=100
 CONFIG_READLINE_CMD_HISTORY_LINELEN=120
 CONFIG_READLINE_TABCOMPLETION=y
 CONFIG_BOARDCTL_RESET=y
-CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_INIT_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/usbnsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/usbnsh/defconfig
similarity index 92%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/usbnsh/defconfig
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/usbnsh/defconfig
index 0b3687f87..fbb2ab1d2 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/usbnsh/defconfig
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/usbnsh/defconfig
@@ -7,8 +7,8 @@
 #
 CONFIG_ADD_NUTTX_FETURES=y
 CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="xidatong"
-CONFIG_ARCH_BOARD_XIDATONG=y
+CONFIG_ARCH_BOARD="xidatong-arm32"
+CONFIG_ARCH_BOARD_XIDATONG_ARM32=y
 CONFIG_ARCH_CHIP="imxrt"
 CONFIG_ARCH_CHIP_IMXRT=y
 CONFIG_ARCH_CHIP_MIMXRT1052CVL5B=y
@@ -62,11 +62,11 @@ CONFIG_USBDEV=y
 CONFIG_USBHOST=y
 CONFIG_USBHOST_MSC=y
 CONFIG_USBHOST_MSC_NOTIFIER=y
-CONFIG_XIDATONG_USB_AUTOMOUNT=y
+CONFIG_XIDATONG_ARM32_USB_AUTOMOUNT=y
 CONFIG_DEV_GPIO=y
 CONFIG_READLINE_CMD_HISTORY=y
 CONFIG_READLINE_CMD_HISTORY_LEN=100
 CONFIG_READLINE_CMD_HISTORY_LINELEN=120
 CONFIG_READLINE_TABCOMPLETION=y
 CONFIG_BOARDCTL_RESET=y
-CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_INIT_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/wifinsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/wifinsh/defconfig
similarity index 93%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/wifinsh/defconfig
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/wifinsh/defconfig
index 9f77feaf2..6fe18f3ff 100755
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/wifinsh/defconfig
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/wifinsh/defconfig
@@ -7,8 +7,8 @@
 #
 CONFIG_ADD_NUTTX_FETURES=y
 CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="xidatong"
-CONFIG_ARCH_BOARD_XIDATONG=y
+CONFIG_ARCH_BOARD="xidatong-arm32"
+CONFIG_ARCH_BOARD_XIDATONG_ARM32=y
 CONFIG_ARCH_CHIP="imxrt"
 CONFIG_ARCH_CHIP_IMXRT=y
 CONFIG_ARCH_CHIP_MIMXRT1052CVL5B=y
@@ -58,4 +58,4 @@ CONFIG_CONNECTION_ADAPTER_WIFI=y
 CONFIG_ADAPTER_ESP07S_WIFI=y
 CONFIG_ADAPTER_WIFI_ESP07S="esp07s_wifi"
 CONFIG_ADAPTER_ESP07S_DRIVER="/dev/ttyS2"
-CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_INIT_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/zbnsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/zbnsh/defconfig
similarity index 94%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/zbnsh/defconfig
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/zbnsh/defconfig
index deb156dfa..f2bb2dd5a 100755
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/configs/zbnsh/defconfig
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/configs/zbnsh/defconfig
@@ -7,8 +7,8 @@
 #
 CONFIG_ADD_NUTTX_FETURES=y
 CONFIG_ARCH="arm"
-CONFIG_ARCH_BOARD="xidatong"
-CONFIG_ARCH_BOARD_XIDATONG=y
+CONFIG_ARCH_BOARD="xidatong-arm32"
+CONFIG_ARCH_BOARD_XIDATONG_ARM32=y
 CONFIG_ARCH_CHIP="imxrt"
 CONFIG_ARCH_CHIP_IMXRT=y
 CONFIG_ARCH_CHIP_MIMXRT1052CVL5B=y
@@ -61,4 +61,4 @@ CONFIG_ADAPTER_E18=y
 CONFIG_ADAPTER_ZIGBEE_E18="e18"
 CONFIG_AS_END_DEVICE_ROLE=y
 CONFIG_ADAPTER_E18_DRIVER="/dev/extuart_dev1"
-CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_INIT_ENTRYPOINT="nsh_main"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/etc/init.d/Adapter4GTest b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/etc/init.d/Adapter4GTest
similarity index 100%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/etc/init.d/Adapter4GTest
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/etc/init.d/Adapter4GTest
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/etc/init.d/hello b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/etc/init.d/hello
similarity index 100%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/etc/init.d/hello
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/etc/init.d/hello
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/etc/init.d/rcS b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/etc/init.d/rcS
similarity index 100%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/etc/init.d/rcS
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/etc/init.d/rcS
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/img/NXPBootUtility_1.png b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/img/NXPBootUtility_1.png
similarity index 100%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/img/NXPBootUtility_1.png
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/img/NXPBootUtility_1.png
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/img/NXPBootUtility_2.png b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/img/NXPBootUtility_2.png
similarity index 100%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/img/NXPBootUtility_2.png
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/img/NXPBootUtility_2.png
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/img/flashconfig.png b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/img/flashconfig.png
similarity index 100%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/img/flashconfig.png
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/img/flashconfig.png
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/img/menuconfig.png b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/img/menuconfig.png
similarity index 100%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/img/menuconfig.png
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/img/menuconfig.png
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/img/menuconfig1.png b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/img/menuconfig1.png
similarity index 100%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/img/menuconfig1.png
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/img/menuconfig1.png
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/img/menuconfigexit.png b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/img/menuconfigexit.png
similarity index 100%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/img/menuconfigexit.png
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/img/menuconfigexit.png
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/img/terminal.png b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/img/terminal.png
similarity index 100%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/img/terminal.png
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/img/terminal.png
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/img/vscode.jpg b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/img/vscode.jpg
similarity index 100%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/img/vscode.jpg
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/img/vscode.jpg
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/include/board.h b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/include/board.h
similarity index 98%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/include/board.h
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/include/board.h
index 46d73d22a..7f44f7d27 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/include/board.h
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/include/board.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * boards/arm/imxrt/xidatong/include/board.h
+ * boards/arm/imxrt/xidatong-arm32/include/board.h
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
@@ -22,13 +22,13 @@
 * @file board.h
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-23
 */
 
-#ifndef __BOARDS_ARM_IMXRT_XIDATONG_INCLUDE_BOARD_H
-#define __BOARDS_ARM_IMXRT_XIDATONG_INCLUDE_BOARD_H
+#ifndef __BOARDS_ARM_IMXRT_XIDATONG_ARM32_INCLUDE_BOARD_H
+#define __BOARDS_ARM_IMXRT_XIDATONG_ARM32_INCLUDE_BOARD_H
 
 /****************************************************************************
  * Included Files
@@ -360,4 +360,4 @@ extern "C"
 #endif
 
 #endif /* __ASSEMBLY__ */
-#endif /* __BOARDS_ARM_IMXRT_XIDATONG_INCLUDE_BOARD_H */
+#endif /* __BOARDS_ARM_IMXRT_XIDATONG_ARM32_INCLUDE_BOARD_H */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/include/nsh_romfsimg.h b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/include/nsh_romfsimg.h
similarity index 100%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/include/nsh_romfsimg.h
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/include/nsh_romfsimg.h
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/kernel/Makefile b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/kernel/Makefile
similarity index 70%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/kernel/Makefile
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/kernel/Makefile
index 147b40f82..030395723 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/kernel/Makefile
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/kernel/Makefile
@@ -1,5 +1,5 @@
 ############################################################################
-# boards/arm/imxrt/xidatong/kernel/Makefile
+# boards/arm/imxrt/xidatong-arm32/kernel/Makefile
 #
 # Licensed to the Apache Software Foundation (ASF) under one or more
 # contributor license agreements.  See the NOTICE file distributed with
@@ -22,29 +22,18 @@ include $(TOPDIR)/Make.defs
 
 # The entry point name (if none is provided in the .config file)
 
-CONFIG_USER_ENTRYPOINT ?= user_start
-ENTRYPT = $(patsubst "%",%,$(CONFIG_USER_ENTRYPOINT))
+CONFIG_INIT_ENTRYPOINT ?= user_start
+ENTRYPT = $(patsubst "%",%,$(CONFIG_INIT_ENTRYPOINT))
 
 # Get the paths to the libraries and the links script path in format that
 # is appropriate for the host OS
 
-ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
-  # Windows-native toolchains
-  USER_LIBPATHS = ${shell for path in $(USERLIBS); do dir=`dirname $(TOPDIR)$(DELIM)$$path`;echo "-L\"`cygpath -w $$dir`\"";done}
-  USER_LDSCRIPT = -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)memory.ld}"
-  USER_LDSCRIPT += -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)user-space.ld}"
-  USER_HEXFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.hex}"
-  USER_SRECFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.srec}"
-  USER_BINFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.bin}"
-else
-  # Linux/Cygwin-native toolchain
-  USER_LIBPATHS = $(addprefix -L$(TOPDIR)$(DELIM),$(dir $(USERLIBS)))
-  USER_LDSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)memory.ld
-  USER_LDSCRIPT += -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)user-space.ld
-  USER_HEXFILE += "$(TOPDIR)$(DELIM)nuttx_user.hex"
-  USER_SRECFILE += "$(TOPDIR)$(DELIM)nuttx_user.srec"
-  USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin"
-endif
+USER_LIBPATHS = $(addprefix -L,$(call CONVERT_PATH,$(addprefix $(TOPDIR)$(DELIM),$(dir $(USERLIBS)))))
+USER_LDSCRIPT = -T $(call CONVERT_PATH,$(BOARD_DIR)$(DELIM)scripts$(DELIM)memory.ld)
+USER_LDSCRIPT += -T $(call CONVERT_PATH,$(BOARD_DIR)$(DELIM)scripts$(DELIM)user-space.ld)
+USER_HEXFILE += $(call CONVERT_PATH,$(TOPDIR)$(DELIM)nuttx_user.hex)
+USER_SRECFILE += $(call CONVERT_PATH,$(TOPDIR)$(DELIM)nuttx_user.srec)
+USER_BINFILE += $(call CONVERT_PATH,$(TOPDIR)$(DELIM)nuttx_user.bin)
 
 USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT)
 USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS))))
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/kernel/imxrt_userspace.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/kernel/imxrt_userspace.c
similarity index 92%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/kernel/imxrt_userspace.c
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/kernel/imxrt_userspace.c
index 6735ddec2..94fe85ed3 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/kernel/imxrt_userspace.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/kernel/imxrt_userspace.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * boards/arm/imxrt/xidatong/kernel/imxrt_userspace.c
+ * boards/arm/imxrt/xidatong-arm32/kernel/imxrt_userspace.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
@@ -26,7 +26,7 @@
 * @file imxrt_userspace.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-23
 */
@@ -64,10 +64,10 @@
  * They are only used meaningfully in the following way:
  *
  *  - The linker script defines, for example, the symbol_sdata.
- *  - The declareion extern uint32_t _sdata; makes C happy.  C will believe
+ *  - The declaration extern uint32_t _sdata; makes C happy.  C will believe
  *    that the value _sdata is the address of a uint32_t variable _data (it
  *    is not!).
- *  - We can recoved the linker value then by simply taking the address of
+ *  - We can recover the linker value then by simply taking the address of
  *    of _data.  like:  uint32_t *pdata = &_sdata;
  */
 
@@ -81,13 +81,13 @@ extern uint32_t _ebss;            /* End+1 of .bss */
 
 /* This is the user space entry point */
 
-int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]);
+int CONFIG_INIT_ENTRYPOINT(int argc, char *argv[]);
 
 const struct userspace_s userspace locate_data(".userspace") =
 {
   /* General memory map */
 
-  .us_entrypoint    = (main_t)CONFIG_USER_ENTRYPOINT,
+  .us_entrypoint    = (main_t)CONFIG_INIT_ENTRYPOINT,
   .us_textstart     = (uintptr_t)&_stext,
   .us_textend       = (uintptr_t)&_etext,
   .us_datasource    = (uintptr_t)&_eronly,
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/readme.md b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/readme.md
similarity index 99%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/readme.md
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/readme.md
index 01a71f401..c0cf863c9 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/readme.md
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/readme.md
@@ -1,6 +1,6 @@
 # 浠庨浂寮�濮嬫瀯寤虹熃鐠撳伐涓氱墿鑱旀搷浣滅郴缁燂細浣跨敤ARM鏋舵瀯鐨勭熃杈鹃��
 
-# xidatong
+# xidatong-arm32
 
 [XiUOS](http://xuos.io/) (X Industrial Ubiquitous Operating System) 鐭界挀XiUOS鏄竴娆鹃潰鍚戞櫤鎱ц溅闂寸殑宸ヤ笟鐗╄仈缃戞搷浣滅郴缁燂紝涓昏鐢变竴涓瀬绠�鐨勫井鍨嬪疄鏃舵搷浣滅郴缁熷唴鏍稿拰鍏朵笂鐨勫伐涓氱墿鑱旀鏋舵瀯鎴愶紝閫氳繃楂樻晥绠＄悊宸ヤ笟鐗╄仈缃戣澶囥�佹敮鎾戝伐涓氱墿鑱斿簲鐢紝鍦ㄧ敓浜ц溅闂村唴瀹炵幇鏅鸿兘鍖栫殑鈥滄劅鐭ョ幆澧冦�佽仈缃戜紶杈撱�佺煡鎮夎瘑鍒�佹帶鍒惰皟鏁粹�濓紝淇冭繘浠ュ伐涓氳澶囧拰宸ヤ笟鎺у埗绯荤粺涓烘牳蹇冪殑浜恒�佹満銆佺墿娣卞害浜掕仈锛屽府鍔╂彁鍗囩敓浜х嚎鐨勬暟瀛楀寲鍜屾櫤鑳藉寲姘村钩銆�
 
@@ -137,7 +137,7 @@ source build.sh
 
 鎵ц瀹屾瘯浼氳嚜鍔ㄨ繘鍏�./Ubiquitous/Nuttx_Fusion_XiUOS/nuttx涓嬶紝缁х画鎵ц
 
-./tools/configure.sh xidatong:nsh
+./tools/configure.sh xidatong-arm32:nsh
 make menuconfig
 瑙嗘儏鍐佃�屽畾锛屽鏋滈渶瑕佸墠闈㈠姞sudo
 ```
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/scripts/Make.defs b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/scripts/Make.defs
similarity index 81%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/scripts/Make.defs
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/scripts/Make.defs
index c3fecc52d..eae5fa7b9 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/scripts/Make.defs
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/scripts/Make.defs
@@ -1,5 +1,5 @@
 ############################################################################
-# boards/arm/imxrt/xidatong/scripts/Make.defs
+# boards/arm/imxrt/xidatong-arm32/scripts/Make.defs
 #
 # Licensed to the Apache Software Foundation (ASF) under one or more
 # contributor license agreements.  See the NOTICE file distributed with
@@ -28,11 +28,7 @@ else
   LDSCRIPT = flash-ocram.ld
 endif
 
-ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
-  ARCHSCRIPT = -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}"
-else
-  ARCHSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
-endif
+ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
 
 ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
   ARCHOPTIMIZATION = -g
@@ -42,8 +38,13 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
   ARCHOPTIMIZATION += $(MAXOPTIMIZATION)
 endif
 
-ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
+ARCHCFLAGS = -fno-common
+ifeq ($(CONFIG_CXX_EXCEPTION),y)
+  ARCHCXXFLAGS = -fno-common
+else
+  ARCHCXXFLAGS = -fno-common -fno-exceptions -fcheck-new -fno-rtti
+endif
+
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
@@ -64,11 +65,7 @@ LDNXFLATFLAGS = -e main -s 2048
 CMODULEFLAGS = $(CFLAGS) -mlong-calls # --target1-abs
 
 LDMODULEFLAGS = -r -e module_initialize
-ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
-  LDMODULEFLAGS += -T "${shell cygpath -w $(TOPDIR)/libs/libc/modlib/gnu-elf.ld}"
-else
-  LDMODULEFLAGS += -T $(TOPDIR)/libs/libc/modlib/gnu-elf.ld
-endif
+LDMODULEFLAGS += -T $(call CONVERT_PATH,$(TOPDIR)/libs/libc/modlib/gnu-elf.ld)
 
 ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
   LDFLAGS += -g
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/scripts/flash-ocram.ld b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/scripts/flash-ocram.ld
similarity index 98%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/scripts/flash-ocram.ld
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/scripts/flash-ocram.ld
index fb625d802..ff8aa17c3 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/scripts/flash-ocram.ld
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/scripts/flash-ocram.ld
@@ -1,5 +1,5 @@
 /****************************************************************************
- * boards/arm/imxrt/xidatong/scripts/flash-ocram.ld
+ * boards/arm/imxrt/xidatong-arm32/scripts/flash-ocram.ld
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/scripts/kernel-space.ld b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/scripts/kernel-space.ld
similarity index 97%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/scripts/kernel-space.ld
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/scripts/kernel-space.ld
index 7ad3587d0..40f222ed9 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/scripts/kernel-space.ld
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/scripts/kernel-space.ld
@@ -1,5 +1,5 @@
 /****************************************************************************
- * boards/arm/imxrt/xidatong/scripts/kernel-space.ld
+ * boards/arm/imxrt/xidatong-arm32/scripts/kernel-space.ld
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/scripts/memory.ld b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/scripts/memory.ld
similarity index 98%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/scripts/memory.ld
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/scripts/memory.ld
index fea61bc8d..921c16aff 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/scripts/memory.ld
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/scripts/memory.ld
@@ -1,5 +1,5 @@
 /****************************************************************************
- * boards/arm/imxrt/xidatong/scripts/memory.ld
+ * boards/arm/imxrt/xidatong-arm32/scripts/memory.ld
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/scripts/user-space.ld b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/scripts/user-space.ld
similarity index 98%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/scripts/user-space.ld
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/scripts/user-space.ld
index ed09f8110..dd499d000 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/scripts/user-space.ld
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/scripts/user-space.ld
@@ -1,5 +1,5 @@
 /****************************************************************************
- * boards/arm/imxrt/xidatong/scripts/user-space.ld
+ * boards/arm/imxrt/xidatong-arm32/scripts/user-space.ld
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/Makefile b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/Makefile
similarity index 94%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/Makefile
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/Makefile
index 528b9f1cc..41b485d50 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/Makefile
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/Makefile
@@ -1,5 +1,5 @@
 ############################################################################
-# boards/arm/imxrt/xidatong/src/Makefile
+# boards/arm/imxrt/xidatong-arm32/src/Makefile
 #
 # Licensed to the Apache Software Foundation (ASF) under one or more
 # contributor license agreements.  See the NOTICE file distributed with
@@ -66,7 +66,7 @@ ifeq ($(CONFIG_DEV_GPIO),y)
 CSRCS += imxrt_gpio.c
 endif
 
-ifeq ($(CONFIG_XIDATONG_SDRAM),y)
+ifeq ($(CONFIG_XIDATONG_ARM32_SDRAM),y)
 CSRCS += imxrt_sdram_ini_dcd.c
 endif
 
@@ -78,7 +78,7 @@ ifeq ($(CONFIG_IMXRT_USDHC),y)
 CSRCS += imxrt_mmcsd.c
 endif
 
-ifeq ($(CONFIG_XIDATONG_SDIO_AUTOMOUNT),y)
+ifeq ($(CONFIG_XIDATONG_ARM32_SDIO_AUTOMOUNT),y)
 CSRCS += imxrt_mmcsd_automount.c
 endif
 
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/ch438_demo.c
similarity index 96%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/ch438_demo.c
index c3b574e18..77da402af 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/ch438_demo.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/ch438_demo.c
@@ -38,8 +38,8 @@ void CH438Demo(void)
 
     fd = open("/dev/extuart_dev3", O_RDWR);
     ioctl(fd, OPE_INT, (unsigned long)9600);
-    m0fd = open("/dev/gpout0", O_RDWR);
-    m1fd = open("/dev/gpout1", O_RDWR);
+    m0fd = open("/dev/gpio0", O_RDWR);
+    m1fd = open("/dev/gpio1", O_RDWR);
     ioctl(m0fd, GPIOC_WRITE, (unsigned long)1);
     ioctl(m1fd, GPIOC_WRITE, (unsigned long)1);
     sleep(1);
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_appinit.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_appinit.c
similarity index 96%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_appinit.c
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_appinit.c
index 6070be4c9..8b9e79d14 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_appinit.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_appinit.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * boards/arm/imxrt/xidatong/src/imxrt_appinit.c
+ * boards/arm/imxrt/xidatong-arm32/src/imxrt_appinit.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
@@ -22,7 +22,7 @@
 * @file imxrt_appinit.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-23
 */
@@ -37,7 +37,7 @@
 
 #include <nuttx/board.h>
 
-#include "xidatong.h"
+#include "xidatong-arm32.h"
 
 #ifdef CONFIG_BOARDCTL
 
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_autoleds.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_autoleds.c
similarity index 97%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_autoleds.c
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_autoleds.c
index 56ce9daeb..a4b1814bd 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_autoleds.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_autoleds.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * boards/arm/imxrt/xidatong/src/imxrt_autoleds.c
+ * boards/arm/imxrt/xidatong-arm32/src/imxrt_autoleds.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
@@ -22,7 +22,7 @@
 * @file imxrt_autoleds.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-23
 */
@@ -74,7 +74,7 @@
 
 #include "imxrt_gpio.h"
 #include "imxrt_iomuxc.h"
-#include "xidatong.h"
+#include "xidatong-arm32.h"
 
 #include <arch/board/board.h>
 
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_boot.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_boot.c
similarity index 96%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_boot.c
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_boot.c
index 81d823f5d..cf8972cd6 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_boot.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_boot.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * boards/arm/imxrt/xidatong/src/imxrt_boot.c
+ * boards/arm/imxrt/xidatong-arm32/src/imxrt_boot.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
@@ -22,7 +22,7 @@
 * @file imxrt_boot.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-23
 */
@@ -37,7 +37,7 @@
 #include <arch/board/board.h>
 
 #include "imxrt_start.h"
-#include "xidatong.h"
+#include "xidatong-arm32.h"
 
 /****************************************************************************
  * Public Functions
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_bringup.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_bringup.c
similarity index 98%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_bringup.c
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_bringup.c
index 18922681b..5c478f958 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_bringup.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_bringup.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * boards/arm/imxrt/xidatong/src/imxrt_bringup.c
+ * boards/arm/imxrt/xidatong-arm32/src/imxrt_bringup.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
@@ -22,7 +22,7 @@
 * @file imxrt_bringup.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-23
 */
@@ -55,7 +55,7 @@
 #include "imxrt_gt9xx.h"
 #endif
 
-#include "xidatong.h"
+#include "xidatong-arm32.h"
 
 #include <arch/board/board.h>  /* Must always be included last */
 
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_buttons.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_buttons.c
similarity index 97%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_buttons.c
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_buttons.c
index b5283cb71..18a593a83 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_buttons.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_buttons.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * boards/arm/imxrt/xidatong/src/imxrt_buttons.c
+ * boards/arm/imxrt/xidatong-arm32/src/imxrt_buttons.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
@@ -22,7 +22,7 @@
 * @file imxrt_buttons.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-23
 */
@@ -40,12 +40,12 @@
 #include <nuttx/irq.h>
 #include <arch/board/board.h>
 
-#include "arm_arch.h"
+#include "arm_internal.h"
 
 #include "imxrt_config.h"
 #include "imxrt_irq.h"
 #include "imxrt_gpio.h"
-#include "xidatong.h"
+#include "xidatong-arm32.h"
 
 #ifdef CONFIG_ARCH_BUTTONS
 
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_ch438.c
similarity index 100%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.c
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_ch438.c
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_ch438.h
similarity index 98%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_ch438.h
index 866bdde0a..6ba50105e 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ch438.h
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_ch438.h
@@ -18,8 +18,8 @@
  * @date 2022.04.26
  */
 
-#ifndef __BOARDS_ARM_IMXRT_XIDATONG_SRC_IMXRT_CH438_H
-#define __BOARDS_ARM_IMXRT_XIDATONG_SRC_IMXRT_CH438_H
+#ifndef __BOARDS_ARM_IMXRT_XIDATONG_ARM32_SRC_IMXRT_CH438_H
+#define __BOARDS_ARM_IMXRT_XIDATONG_ARM32_SRC_IMXRT_CH438_H
 
 /****************************************************************************
  * Included Files
@@ -55,12 +55,12 @@
 #include <fcntl.h>
 
 #include <arch/board/board.h>
-#include "arm_arch.h"
+#include "arm_internal.h"
 
 #include "imxrt_config.h"
 #include "imxrt_irq.h"
 #include "imxrt_gpio.h"
-#include "xidatong.h"
+#include "xidatong-arm32.h"
 
 /******************************************************************************************/
 
@@ -365,5 +365,5 @@
 void board_ch438_initialize(void);
 #endif
 
-#endif /* __BOARDS_ARM_IMXRT_XIDATONG_SRC_IMXRT_CH438_H */
+#endif /* __BOARDS_ARM_IMXRT_XIDATONG_ARM32_SRC_IMXRT_CH438_H */
 
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ethernet.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_ethernet.c
similarity index 98%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ethernet.c
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_ethernet.c
index dafbc9e4b..5c7d4096a 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_ethernet.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_ethernet.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * boards/arm/imxrt/xidatong/src/imxrt_ethernet.c
+ * boards/arm/imxrt/xidatong-arm32/src/imxrt_ethernet.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
@@ -22,7 +22,7 @@
 * @file imxrt_ethernet.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-23
 */
@@ -54,7 +54,7 @@
 #include "imxrt_gpio.h"
 #include "imxrt_enet.h"
 
-#include "xidatong.h"
+#include "xidatong-arm32.h"
 
 #include <arch/board/board.h>
 
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_flexspi_nor_boot.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_flexspi_nor_boot.c
similarity index 96%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_flexspi_nor_boot.c
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_flexspi_nor_boot.c
index c2ce4e2b1..eb46883e5 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_flexspi_nor_boot.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_flexspi_nor_boot.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * boards/arm/imxrt/xidatong/src/imxrt_flexspi_nor_boot.c
+ * boards/arm/imxrt/xidatong-arm32/src/imxrt_flexspi_nor_boot.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
@@ -22,7 +22,7 @@
 * @file imxrt_flexspi_nor_boot.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-23
 */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_flexspi_nor_boot.h b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_flexspi_nor_boot.h
similarity index 92%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_flexspi_nor_boot.h
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_flexspi_nor_boot.h
index 33b86eb40..3a5e3dbcf 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_flexspi_nor_boot.h
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_flexspi_nor_boot.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * boards/arm/imxrt/xidatong/src/imxrt_flexspi_nor_boot.h
+ * boards/arm/imxrt/xidatong-arm32/src/imxrt_flexspi_nor_boot.h
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
@@ -22,13 +22,13 @@
 * @file imxrt_flexspi_nor_boot.h
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-23
 */
 
-#ifndef __BOARDS_ARM_IMXRT_XIDATONG_SRC_IMXRT_FLEXSPI_NOR_BOOT_H
-#define __BOARDS_ARM_IMXRT_XIDATONG_SRC_IMXRT_FLEXSPI_NOR_BOOT_H
+#ifndef __BOARDS_ARM_IMXRT_XIDATONG_ARM32_SRC_IMXRT_FLEXSPI_NOR_BOOT_H
+#define __BOARDS_ARM_IMXRT_XIDATONG_ARM32_SRC_IMXRT_FLEXSPI_NOR_BOOT_H
 
 /****************************************************************************
  * Included Files
@@ -71,7 +71,7 @@
 #define FLASH_END                   0x7f7fffff
 #define SCLK 1
 
-#ifdef CONFIG_XIDATONG_SDRAM
+#ifdef CONFIG_XIDATONG_ARM32_SDRAM
 #  define DCD_ADDRESS               &g_dcd_data
 #else
 #  define DCD_ADDRESS               0
@@ -144,8 +144,8 @@ struct boot_data_s
 
 extern const struct boot_data_s g_boot_data;
 
-#ifdef CONFIG_XIDATONG_SDRAM
+#ifdef CONFIG_XIDATONG_ARM32_SDRAM
 extern const uint8_t g_dcd_data[];
 #endif
 
-#endif /* __BOARDS_ARM_IMXRT_XIDATONG_SRC_IMXRT_FLEXSPI_NOR_BOOT_H */
+#endif /* __BOARDS_ARM_IMXRT_XIDATONG_ARM32_SRC_IMXRT_FLEXSPI_NOR_BOOT_H */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_flexspi_nor_flash.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_flexspi_nor_flash.c
similarity index 96%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_flexspi_nor_flash.c
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_flexspi_nor_flash.c
index b3ba34f0c..52ade4d09 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_flexspi_nor_flash.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_flexspi_nor_flash.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * boards/arm/imxrt/xidatong/src/imxrt_flexspi_nor_flash.c
+ * boards/arm/imxrt/xidatong-arm32/src/imxrt_flexspi_nor_flash.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
@@ -22,7 +22,7 @@
 * @file imxrt_flexspi_nor_flash.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-23
 */
@@ -37,7 +37,7 @@
  * Public Data
  ****************************************************************************/
 
-#if defined (CONFIG_XIDATONG_HYPER_FLASH)
+#if defined (CONFIG_XIDATONG_ARM32_HYPER_FLASH)
 locate_data(".boot_hdr.conf")
 const struct flexspi_nor_config_s g_flash_config =
 {
@@ -84,7 +84,7 @@ const struct flexspi_nor_config_s g_flash_config =
   .is_uniform_blocksize     = 1,
 };
 
-#elif defined (CONFIG_XIDATONG_QSPI_FLASH)
+#elif defined (CONFIG_XIDATONG_ARM32_QSPI_FLASH)
 locate_data(".boot_hdr.conf")
 const struct flexspi_nor_config_s g_flash_config =
 {
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_flexspi_nor_flash.h b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_flexspi_nor_flash.h
similarity index 97%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_flexspi_nor_flash.h
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_flexspi_nor_flash.h
index 3ea7a74d2..ee94af96a 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_flexspi_nor_flash.h
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_flexspi_nor_flash.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * boards/arm/imxrt/xidatong/src/imxrt_flexspi_nor_flash.h
+ * boards/arm/imxrt/xidatong-arm32/src/imxrt_flexspi_nor_flash.h
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
@@ -22,13 +22,13 @@
 * @file imxrt_flexspi_nor_flash.h
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-23
 */
 
-#ifndef __BOARDS_ARM_IMXRT_XIDATONG_SRC_IMXRT_FLEXSPI_NOR_FLASH_H
-#define __BOARDS_ARM_IMXRT_XIDATONG_SRC_IMXRT_FLEXSPI_NOR_FLASH_H
+#ifndef __BOARDS_ARM_IMXRT_XIDATONG_ARM32_SRC_IMXRT_FLEXSPI_NOR_FLASH_H
+#define __BOARDS_ARM_IMXRT_XIDATONG_ARM32_SRC_IMXRT_FLEXSPI_NOR_FLASH_H
 
 /****************************************************************************
  * Included Files
@@ -356,4 +356,4 @@ struct flexspi_nor_config_s
   uint32_t reserve2[11];                  /* Reserved for future use */
 };
 
-#endif /* __BOARDS_ARM_IMXRT_XIDATONG_SRC_IMXRT_FLEXSPI_NOR_FLASH_H */
+#endif /* __BOARDS_ARM_IMXRT_XIDATONG_ARM32_SRC_IMXRT_FLEXSPI_NOR_FLASH_H */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_gpio.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_gpio.c
similarity index 97%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_gpio.c
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_gpio.c
index 4f92668ce..e5db10431 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_gpio.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_gpio.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * boards/arm/imxrt/xidatong/src/imxrt_gpio.c
+ * boards/arm/imxrt/xidatong-arm32/src/imxrt_gpio.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
@@ -22,7 +22,7 @@
 * @file imxrt_gpio.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-23
 */
@@ -46,7 +46,7 @@
 #include "chip.h"
 
 #include <imxrt_gpio.h>
-#include "xidatong.h"
+#include "xidatong-arm32.h"
 
 #if defined(CONFIG_DEV_GPIO) && !defined(CONFIG_GPIO_LOWER_HALF)
 
@@ -175,11 +175,10 @@ static int gpout_write(FAR struct gpio_dev_s *dev, bool value)
 
 int imxrt_gpio_initialize(void)
 {
-  int pincount;
+  int pincount = 0;
   int i;
 
 #if BOARD_NGPIOIN > 0
-  pincount = 0;
   for (i = 0; i < BOARD_NGPIOIN; i++)
     {
       /* Setup and register the GPIO pin */
@@ -199,7 +198,6 @@ int imxrt_gpio_initialize(void)
 #endif
 
 #if BOARD_NGPIOOUT > 0
-  pincount = 0;
   for (i = 0; i < BOARD_NGPIOOUT; i++)
     {
       /* Setup and register the GPIO pin */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_gt9xx.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_gt9xx.c
similarity index 99%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_gt9xx.c
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_gt9xx.c
index 427f79a9c..fac40b358 100755
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_gt9xx.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_gt9xx.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * boards/arm/imxrt/xidatong/src/imxrt_gt9xx.c
+ * boards/arm/imxrt/xidatong-arm32/src/imxrt_gt9xx.c
  *
  *   Copyright 2019 ElFaro LAB S.L. All rights reserved.
  *   Author: Fabio Balzano <fabio@elfarolab.com>
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_gt9xx.h b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_gt9xx.h
similarity index 100%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_gt9xx.h
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_gt9xx.h
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_lcd.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_lcd.c
similarity index 96%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_lcd.c
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_lcd.c
index 8b8a6c7b4..c2fc34840 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_lcd.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_lcd.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * boards/arm/imxrt/xidatong/src/imxrt_lcd.c
+ * boards/arm/imxrt/xidatong-arm32/src/imxrt_lcd.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
@@ -22,7 +22,7 @@
 * @file imxrt_lcd.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-23
 */
@@ -39,7 +39,7 @@
 #include "imxrt_lcd.h"
 #include "imxrt_gpio.h"
 
-#include "xidatong.h"
+#include "xidatong-arm32.h"
 
 /****************************************************************************
  * Public Functions
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_mmcsd.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_mmcsd.c
similarity index 96%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_mmcsd.c
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_mmcsd.c
index be2238c36..869fa25b9 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_mmcsd.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_mmcsd.c
@@ -29,7 +29,7 @@
 #include <errno.h>
 #include <debug.h>
 
-#include "xidatong.h"
+#include "xidatong-arm32.h"
 
 #ifdef CONFIG_IMXRT_USDHC
 
@@ -67,7 +67,7 @@ int nsh_sdmmc_initialize(void)
       return ret;
     }
 
-#ifdef CONFIG_XIDATONG_SDIO_AUTOMOUNT
+#ifdef CONFIG_XIDATONG_ARM32_SDIO_AUTOMOUNT
       imxrt_automount_initialize();
       imxrt_usdhc_set_sdio_card_isr(sdmmc, imxrt_sdhc_automount_event, NULL);
 #else
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_mmcsd_automount.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_mmcsd_automount.c
similarity index 96%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_mmcsd_automount.c
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_mmcsd_automount.c
index 84b8e539b..a21d53a74 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_mmcsd_automount.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_mmcsd_automount.c
@@ -35,7 +35,7 @@
 #include <nuttx/clock.h>
 #include <nuttx/fs/automount.h>
 #include "hardware/imxrt_pinmux.h"
-#include "xidatong.h"
+#include "xidatong-arm32.h"
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -94,11 +94,11 @@ static const struct imxrt_automount_config_s g_sdhc_config =
 {
   .lower        =
     {
-    .fstype     = CONFIG_XIDATONG_SDIO_AUTOMOUNT_FSTYPE,
-    .blockdev   = CONFIG_XIDATONG_SDIO_AUTOMOUNT_BLKDEV,
-    .mountpoint = CONFIG_XIDATONG_SDIO_AUTOMOUNT_MOUNTPOINT,
-    .ddelay     = MSEC2TICK(CONFIG_XIDATONG_SDIO_AUTOMOUNT_DDELAY),
-    .udelay     = MSEC2TICK(CONFIG_XIDATONG_SDIO_AUTOMOUNT_UDELAY),
+    .fstype     = CONFIG_XIDATONG_ARM32_SDIO_AUTOMOUNT_FSTYPE,
+    .blockdev   = CONFIG_XIDATONG_ARM32_SDIO_AUTOMOUNT_BLKDEV,
+    .mountpoint = CONFIG_XIDATONG_ARM32_SDIO_AUTOMOUNT_MOUNTPOINT,
+    .ddelay     = MSEC2TICK(CONFIG_XIDATONG_ARM32_SDIO_AUTOMOUNT_DDELAY),
+    .udelay     = MSEC2TICK(CONFIG_XIDATONG_ARM32_SDIO_AUTOMOUNT_UDELAY),
     .attach     = imxrt_sdhc_attach,
     .enable     = imxrt_sdhc_enable,
     .inserted   = imxrt_sdhc_inserted
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_mmcsd_spi.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_mmcsd_spi.c
similarity index 97%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_mmcsd_spi.c
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_mmcsd_spi.c
index 1f495ec14..63de0a743 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_mmcsd_spi.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_mmcsd_spi.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * boards/arm/imxrt/xidatong/src/imxrt_mmcsd_spi.c
+ * boards/arm/imxrt/xidatong-arm32/src/imxrt_mmcsd_spi.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
@@ -22,7 +22,7 @@
 * @file imxrt_mmcsd_spi.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-23
 */
@@ -40,7 +40,7 @@
 #include <nuttx/spi/spi.h>
 #include <arch/board/board.h>
 
-#include "arm_arch.h"
+#include "arm_internal.h"
 #include "chip.h"
 #include "imxrt_lpspi.h"
 
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_reset.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_reset.c
similarity index 100%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_reset.c
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_reset.c
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_sdram_ini_dcd.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_sdram_ini_dcd.c
similarity index 99%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_sdram_ini_dcd.c
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_sdram_ini_dcd.c
index 91692c2b4..66343a81b 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_sdram_ini_dcd.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_sdram_ini_dcd.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * boards/arm/imxrt/xidatong/src/imxrt_sdram_ini_dcd.c
+ * boards/arm/imxrt/xidatong-arm32/src/imxrt_sdram_ini_dcd.c
  *
  *   Copyright (C) 2017, NXP Semiconductors, Inc.
  *
@@ -35,7 +35,7 @@
 * @file imxrt_sdram_ini_dcd.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-23
 */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_spi.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_spi.c
similarity index 98%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_spi.c
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_spi.c
index 673eaec0b..8fec30c3f 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_spi.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_spi.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * boards/arm/imxrt/xidatong/src/imxrt_spi.c
+ * boards/arm/imxrt/xidatong-arm32/src/imxrt_spi.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
@@ -22,7 +22,7 @@
 * @file imxrt_spi.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-23
 */
@@ -41,12 +41,12 @@
 #include <nuttx/spi/spi.h>
 #include <arch/board/board.h>
 
-#include "arm_arch.h"
+#include "arm_internal.h"
 
 #include "imxrt_config.h"
 #include "imxrt_lpspi.h"
 #include "imxrt_gpio.h"
-#include "xidatong.h"
+#include "xidatong-arm32.h"
 
 #if defined(CONFIG_IMXRT_LPSPI1) || defined(CONFIG_IMXRT_LPSPI2) || \
     defined(CONFIG_IMXRT_LPSPI3) || defined(CONFIG_IMXRT_LPSPI4)
@@ -59,7 +59,7 @@
  * Name: imxrt_spidev_initialize
  *
  * Description:
- *   Called to configure SPI chip select GPIO pins for the xidatong
+ *   Called to configure SPI chip select GPIO pins for the xidatong-arm32
  *    board.
  *
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_usbhost.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_usbhost.c
similarity index 91%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_usbhost.c
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_usbhost.c
index f0f96f800..85d9e82f0 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_usbhost.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_usbhost.c
@@ -48,7 +48,7 @@
 #include "hardware/imxrt_pinmux.h"
 #include "hardware/imxrt_usbotg.h"
 #include "imxrt_periphclks.h"
-#include "xidatong.h"
+#include "xidatong-arm32.h"
 
 #include <arch/board/board.h>  /* Must always be included last */
 
@@ -78,10 +78,10 @@
 
 static struct usbhost_connection_s *g_ehciconn;
 
-#ifdef CONFIG_XIDATONG_USB_AUTOMOUNT
+#ifdef CONFIG_XIDATONG_ARM32_USB_AUTOMOUNT
 /* Unmount retry timer */
 
-static struct wdog_s g_umount_tmr[CONFIG_XIDATONG_USB_AUTOMOUNT_NUM_BLKDEV];
+static struct wdog_s g_umount_tmr[CONFIG_XIDATONG_ARM32_USB_AUTOMOUNT_NUM_BLKDEV];
 #endif
 
 /****************************************************************************
@@ -106,8 +106,7 @@ static int ehci_waiter(int argc, char *argv[])
       /* Wait for the device to change state */
 
       DEBUGVERIFY(CONN_WAIT(g_ehciconn, &hport));
-      syslog(LOG_INFO, "ehci_waiter: %s\n",
-             hport->connected ? "connected" : "disconnected");
+      uinfo("ehci_waiter: %s\n", hport->connected ? "connected" : "disconnected");
 
       /* Did we just become connected? */
 
@@ -128,7 +127,7 @@ static int ehci_waiter(int argc, char *argv[])
  * Public Functions
  ****************************************************************************/
 
-#ifdef CONFIG_XIDATONG_USB_AUTOMOUNT
+#ifdef CONFIG_XIDATONG_ARM32_USB_AUTOMOUNT
 /****************************************************************************
  * Name: usb_msc_connect
  *
@@ -147,7 +146,7 @@ static void usb_msc_connect(FAR void *arg)
   char mntpnt[32];
 
   DEBUGASSERT(index >= 0 &&
-              index < CONFIG_XIDATONG_USB_AUTOMOUNT_NUM_BLKDEV);
+              index < CONFIG_XIDATONG_ARM32_USB_AUTOMOUNT_NUM_BLKDEV);
 
   wd_cancel(&g_umount_tmr[index]);
 
@@ -157,14 +156,14 @@ static void usb_msc_connect(FAR void *arg)
       sdchar, arg);
 
   snprintf(blkdev, sizeof(blkdev), "%s%c",
-      CONFIG_XIDATONG_USB_AUTOMOUNT_BLKDEV, sdchar);
+      CONFIG_XIDATONG_ARM32_USB_AUTOMOUNT_BLKDEV, sdchar);
   snprintf(mntpnt, sizeof(mntpnt), "%s%c",
-      CONFIG_XIDATONG_USB_AUTOMOUNT_MOUNTPOINT, sdchar);
+      CONFIG_XIDATONG_ARM32_USB_AUTOMOUNT_MOUNTPOINT, sdchar);
 
   /* Mount */
 
   ret = nx_mount((FAR const char *)blkdev, (FAR const char *)mntpnt,
-      CONFIG_XIDATONG_USB_AUTOMOUNT_FSTYPE, 0, NULL);
+      CONFIG_XIDATONG_ARM32_USB_AUTOMOUNT_FSTYPE, 0, NULL);
   if (ret < 0)
     {
       ferr("ERROR: Mount failed: %d\n", ret);
@@ -198,7 +197,7 @@ static void unmount_retry_timeout(wdparm_t arg)
 
   finfo("Timeout!\n");
   DEBUGASSERT(index >= 0 &&
-              index < CONFIG_XIDATONG_USB_AUTOMOUNT_NUM_BLKDEV);
+              index < CONFIG_XIDATONG_ARM32_USB_AUTOMOUNT_NUM_BLKDEV);
 
   /* Resend the notification. */
 
@@ -222,7 +221,7 @@ static void usb_msc_disconnect(FAR void *arg)
   char mntpnt[32];
 
   DEBUGASSERT(index >= 0 &&
-              index < CONFIG_XIDATONG_USB_AUTOMOUNT_NUM_BLKDEV);
+              index < CONFIG_XIDATONG_ARM32_USB_AUTOMOUNT_NUM_BLKDEV);
 
   wd_cancel(&g_umount_tmr[index]);
 
@@ -232,7 +231,7 @@ static void usb_msc_disconnect(FAR void *arg)
       sdchar, arg);
 
   snprintf(mntpnt, sizeof(mntpnt), "%s%c",
-      CONFIG_XIDATONG_USB_AUTOMOUNT_MOUNTPOINT, sdchar);
+      CONFIG_XIDATONG_ARM32_USB_AUTOMOUNT_MOUNTPOINT, sdchar);
 
   /* Unmount */
 
@@ -251,7 +250,7 @@ static void usb_msc_disconnect(FAR void *arg)
           /* Start a timer to retry the umount2 after a delay */
 
           ret = wd_start(&g_umount_tmr[index],
-                          MSEC2TICK(CONFIG_XIDATONG_USB_AUTOMOUNT_UDELAY),
+                          MSEC2TICK(CONFIG_XIDATONG_ARM32_USB_AUTOMOUNT_UDELAY),
                           unmount_retry_timeout, index);
           if (ret < 0)
             {
@@ -267,7 +266,7 @@ static void usb_msc_disconnect(FAR void *arg)
         }
     }
 }
-#endif /* CONFIG_XIDATONG_USB_AUTOMOUNT */
+#endif /* CONFIG_XIDATONG_ARM32_USB_AUTOMOUNT */
 
 
 /****************************************************************************
@@ -285,7 +284,7 @@ int imxrt_usbhost_initialize(void)
 {
   pid_t pid;
   int ret;
-#ifdef CONFIG_XIDATONG_USB_AUTOMOUNT
+#ifdef CONFIG_XIDATONG_ARM32_USB_AUTOMOUNT
   int index;
 #endif
 
@@ -318,10 +317,10 @@ int imxrt_usbhost_initialize(void)
 #ifdef CONFIG_USBHOST_MSC
   /* Register the USB host Mass Storage Class */
 
-#ifdef CONFIG_XIDATONG_USB_AUTOMOUNT
+#ifdef CONFIG_XIDATONG_ARM32_USB_AUTOMOUNT
   /* Initialize the notifier listener for automount */
 
-  for (index = 0; index < CONFIG_XIDATONG_USB_AUTOMOUNT_NUM_BLKDEV; index++)
+  for (index = 0; index < CONFIG_XIDATONG_ARM32_USB_AUTOMOUNT_NUM_BLKDEV; index++)
     {
       char sdchar = 'a' + index;
 
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_userleds.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_userleds.c
similarity index 96%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_userleds.c
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_userleds.c
index 1b5c187c9..d7eb5ef53 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/imxrt_userleds.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/imxrt_userleds.c
@@ -1,5 +1,5 @@
 /****************************************************************************
- * boards/arm/imxrt/xidatong/src/imxrt_userleds.c
+ * boards/arm/imxrt/xidatong-arm32/src/imxrt_userleds.c
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
@@ -22,7 +22,7 @@
 * @file imxrt_userleds.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-23
 */
@@ -49,7 +49,7 @@
 
 #include "imxrt_gpio.h"
 #include "imxrt_iomuxc.h"
-#include "xidatong.h"
+#include "xidatong-arm32.h"
 
 #include <arch/board/board.h>
 
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/xidatong.h b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/xidatong-arm32.h
similarity index 94%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/xidatong.h
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/xidatong-arm32.h
index f4a88b1e2..5c8464577 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong/src/xidatong.h
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-arm32/src/xidatong-arm32.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * boards/arm/imxrt/xidatong/src/xidatong.h
+ * boards/arm/imxrt/xidatong-arm32/src/xidatong-arm32.h
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
@@ -19,16 +19,16 @@
  ****************************************************************************/
 
 /**
-* @file xidatong.h
+* @file xidatong-arm32.h
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-23
 */
 
-#ifndef __BOARDS_ARM_IMXRT_XIDATONG_SRC_XIDATONG_H
-#define __BOARDS_ARM_IMXRT_XIDATONG_SRC_XIDATONG_H
+#ifndef __BOARDS_ARM_IMXRT_XIDATONG_ARM32_SRC_XIDATONG_ARM32_H
+#define __BOARDS_ARM_IMXRT_XIDATONG_ARM32_SRC_XIDATONG_ARM32_H
 
 /****************************************************************************
  * Included Files
@@ -210,10 +210,10 @@ int nsh_sdmmc_initialize(void);
 #  define nsh_sdmmc_initialize() (OK)
 #endif
 
-#if defined(CONFIG_IMXRT_USDHC) && defined(CONFIG_XIDATONG_SDIO_AUTOMOUNT)
+#if defined(CONFIG_IMXRT_USDHC) && defined(CONFIG_XIDATONG_ARM32_SDIO_AUTOMOUNT)
 int imxrt_sdhc_automount_event(void *arg);
 void imxrt_automount_initialize(void);
 #endif
 
 #endif /* __ASSEMBLY__ */
-#endif /* __BOARDS_ARM_IMXRT_XIDATONG_SRC_XIDATONG_H */
+#endif /* __BOARDS_ARM_IMXRT_XIDATONG_ARM32_SRC_XIDATONG_ARM32_H */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/Kconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/Kconfig
new file mode 100644
index 000000000..56405367b
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/Kconfig
@@ -0,0 +1,126 @@
+#
+# For a description of the syntax of this configuration file,
+# see misc/tools/kconfig-language.txt.
+#
+
+if ARCH_BOARD_XIDATONG_RISCV64
+
+menuconfig BSP_USING_CH438
+    bool "Using CH438 device"
+    default n
+
+if BSP_USING_CH438
+config CH438_EXTUART0
+    bool "Using Ch438 Port 0"
+    default n
+
+menu "Ch438 Port 0 Configuration"
+    depends on CH438_EXTUART0
+
+    config CH438_EXTUART0_BAUD
+        int "Ch438 Port 0 Baud Rate."
+        default 115200
+        ---help---
+            The configured BAUD of the CH438 EXTUART0.
+endmenu
+
+config CH438_EXTUART1
+    bool "Using Ch438 Port 1"
+    default n
+
+menu "Ch438 Port 1 Configuration"
+    depends on CH438_EXTUART1
+
+    config CH438_EXTUART1_BAUD
+        int "Ch438 Port 1 Baud Rate."
+        default 115200
+        ---help---
+            The configured BAUD of the CH438 EXTUART1.
+endmenu
+
+config CH438_EXTUART2
+    bool "Using Ch438 Port 2"
+    default n
+
+menu "Ch438 Port 2 Configuration"
+    depends on CH438_EXTUART2
+
+    config CH438_EXTUART2_BAUD
+        int "Ch438 Port 2 Baud Rate."
+        default 115200
+        ---help---
+            The configured BAUD of the CH438 EXTUART2.
+endmenu
+
+config CH438_EXTUART3
+    bool "Using Ch438 Port 3"
+    default n
+
+menu "Ch438 Port 3 Configuration"
+    depends on CH438_EXTUART3
+
+    config CH438_EXTUART3_BAUD
+        int "Ch438 Port 3 Baud Rate."
+        default 115200
+        ---help---
+            The configured BAUD of the CH438 EXTUART3.
+endmenu
+
+config CH438_EXTUART4
+    bool "Using Ch438 Port 4"
+    default n
+
+menu "Ch438 Port 4 Configuration"
+    depends on CH438_EXTUART4
+
+    config CH438_EXTUART4_BAUD
+        int "Ch438 Port 4 Baud Rate."
+        default 115200
+        ---help---
+            The configured BAUD of the CH438 EXTUART4.
+endmenu
+
+config CH438_EXTUART5
+    bool "Using Ch438 Port 5"
+    default n
+
+menu "Ch438 Port 5 Configuration"
+    depends on CH438_EXTUART5
+
+    config CH438_EXTUART5_BAUD
+        int "Ch438 Port 5 Baud Rate."
+        default 115200
+        ---help---
+            The configured BAUD of the CH438 EXTUART5.
+endmenu
+
+config CH438_EXTUART6
+    bool "Using Ch438 Port 6"
+    default n
+
+menu "Ch438 Port 6 Configuration"
+    depends on CH438_EXTUART6
+
+    config CH438_EXTUART6_BAUD
+        int "Ch438 Port 6 Baud Rate."
+        default 115200
+        ---help---
+            The configured BAUD of the CH438 EXTUART6.
+endmenu
+
+config CH438_EXTUART7
+    bool "Using Ch438 Port 7"
+    default n
+
+menu "Ch438 Port 7 Configuration"
+    depends on CH438_EXTUART7
+
+    config CH438_EXTUART7_BAUD
+        int "Ch438 Port 7 Baud Rate."
+        default 115200
+        ---help---
+            The configured BAUD of the CH438 EXTUART7.
+endmenu
+
+endif # BSP_USING_CH438
+endif # ARCH_BOARD_XIDATONG_RISCV64
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/README.txt b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/README.txt
new file mode 100644
index 000000000..29c17decf
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/README.txt
@@ -0,0 +1,42 @@
+1. Download and install toolchain and openocd-k210
+
+  $ curl https://static.dev.sifive.com/dev-tools/riscv64-unknown-elf-gcc-8.3.0-2019.08.0-x86_64-linux-ubuntu14.tar.gz
+  $ export PATH=$PATH:/$TOOL_CHAIN_PATH/bin
+
+2. Build openocd-k210
+
+  $ git clone https://github.com/kendryte/openocd-kendryte
+  $ cd openocd-kendryte
+  $ ./bootstrap & ./configure & make
+
+3. Configure and build NuttX
+
+  $ mkdir ./nuttx; cd ./nuttx
+  $ git clone https://github.com/apache/incubator-nuttx.git nuttx
+  $ git clone https://github.com/apache/incubator-nuttx-apps.git apps
+  $ cd nuttx
+  $ make distclean
+  $ ./tools/configure.sh xidatong-riscv64:nsh
+  $ make V=1
+
+4. Download and run the nuttx from SRAM (not SPI-Flash)
+
+  $ picocom -b 115200 /dev/ttyUSB0
+  $ sudo ./src/openocd -s ./tcl -f ./tcl/kendryte.cfg -m 0
+  $ riscv64-unknown-elf-gdb ./nuttx
+  (gdb) target extended-remote :3333
+  (gdb) load nuttx
+  (gdb) c
+
+5. Write nuttx.bin to SPI-Flash
+
+  $ pip3 install kflash
+  $ kflash -p /dev/ttyUSB0 -b 1500000 ./nuttx/nuttx.bin
+
+  NOTE: The kflash_gui is not recommended because it's unstable
+
+6. TODO
+
+  Support peripherals such as GPIO/SPI/I2C/...
+  Support FPU
+  Support RISC-V U-mode including memory protection
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/configs/btnsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/configs/btnsh/defconfig
new file mode 100644
index 000000000..d22793b51
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/configs/btnsh/defconfig
@@ -0,0 +1,71 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed .config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that includes your
+# modifications.
+#
+# CONFIG_NSH_DISABLE_LOSMART is not set
+# CONFIG_STANDARD_SERIAL is not set
+CONFIG_ADD_NUTTX_FETURES=y
+CONFIG_ARCH="risc-v"
+CONFIG_ARCH_BOARD="xidatong-riscv64"
+CONFIG_ARCH_BOARD_XIDATONG_RISCV64=y
+CONFIG_ARCH_CHIP="k210"
+CONFIG_ARCH_CHIP_K210=y
+CONFIG_ARCH_INTERRUPTSTACK=2048
+CONFIG_ARCH_RISCV=y
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_BINFMT_DISABLE=y
+CONFIG_BOARD_LOOPSPERMSEC=46000
+CONFIG_BUILTIN=y
+CONFIG_DEBUG_FULLOPT=y
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_EXAMPLES_HELLO=y
+CONFIG_IDLETHREAD_STACKSIZE=2048
+CONFIG_INIT_ENTRYPOINT="nsh_main"
+CONFIG_INIT_STACKSIZE=3072
+CONFIG_INTELHEX_BINARY=y
+CONFIG_LIBC_PERROR_STDOUT=y
+CONFIG_LIBC_STRERROR=y
+CONFIG_NSH_ARCHINIT=y
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_DISABLE_IFUPDOWN=y
+CONFIG_NSH_DISABLE_MKDIR=y
+CONFIG_NSH_DISABLE_RM=y
+CONFIG_NSH_DISABLE_RMDIR=y
+CONFIG_NSH_DISABLE_UMOUNT=y
+CONFIG_NSH_READLINE=y
+CONFIG_NSH_STRERROR=y
+CONFIG_PREALLOC_TIMERS=4
+CONFIG_RAM_SIZE=2097152
+CONFIG_RAM_START=0x80400000
+CONFIG_RAW_BINARY=y
+CONFIG_READLINE_CMD_HISTORY=y
+CONFIG_READLINE_CMD_HISTORY_LEN=100
+CONFIG_READLINE_CMD_HISTORY_LINELEN=120
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_WAITPID=y
+CONFIG_STACK_COLORATION=y
+CONFIG_START_DAY=28
+CONFIG_START_MONTH=12
+CONFIG_START_YEAR=2019
+CONFIG_SYSTEM_NSH=y
+CONFIG_TASK_NAME_SIZE=20
+CONFIG_TESTING_GETPRIME=y
+CONFIG_UART0_SERIAL_CONSOLE=y
+CONFIG_READLINE_TABCOMPLETION=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_DEV_GPIO=y
+CONFIG_BOARDCTL_RESET=y
+CONFIG_BSP_USING_CH438=y
+CONFIG_CH438_EXTUART2=y
+CONFIG_CH438_EXTUART2_BAUD=9600
+CONFIG_SUPPORT_CONNECTION_FRAMEWORK=y
+CONFIG_CONNECTION_FRAMEWORK_DEBUG=y
+CONFIG_CONNECTION_ADAPTER_BLUETOOTH=y
+CONFIG_ADAPTER_HC08=y
+CONFIG_ADAPTER_BLUETOOTH_HC08="hc08"
+CONFIG_ADAPTER_HC08_WORK_ROLE="M"
+CONFIG_ADAPTER_HC08_DRIVER_EXTUART=y
+CONFIG_ADAPTER_HC08_DRIVER="/dev/extuart_dev2"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/configs/smp2/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/configs/lcdnsh/defconfig
old mode 100644
new mode 100755
similarity index 58%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/configs/smp2/defconfig
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/configs/lcdnsh/defconfig
index 5c9c923e4..062a4e8e7
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/configs/smp2/defconfig
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/configs/lcdnsh/defconfig
@@ -9,8 +9,8 @@
 # CONFIG_STANDARD_SERIAL is not set
 CONFIG_ADD_NUTTX_FETURES=y
 CONFIG_ARCH="risc-v"
-CONFIG_ARCH_BOARD="aiit-riscv64-board"
-CONFIG_ARCH_BOARD_AIIT_RISCV64=y
+CONFIG_ARCH_BOARD="xidatong-riscv64"
+CONFIG_ARCH_BOARD_XIDATONG_RISCV64=y
 CONFIG_ARCH_CHIP="k210"
 CONFIG_ARCH_CHIP_K210=y
 CONFIG_ARCH_INTERRUPTSTACK=2048
@@ -21,47 +21,45 @@ CONFIG_BOARD_LOOPSPERMSEC=46000
 CONFIG_BUILTIN=y
 CONFIG_DEBUG_FULLOPT=y
 CONFIG_DEBUG_SYMBOLS=y
-CONFIG_DEV_ZERO=y
-CONFIG_DRIVER_NOTE=y
 CONFIG_EXAMPLES_HELLO=y
-CONFIG_FS_PROCFS=y
-CONFIG_FS_PROCFS_REGISTER=y
 CONFIG_IDLETHREAD_STACKSIZE=2048
+CONFIG_INIT_ENTRYPOINT="nsh_main"
+CONFIG_INIT_STACKSIZE=3072
 CONFIG_INTELHEX_BINARY=y
 CONFIG_LIBC_PERROR_STDOUT=y
 CONFIG_LIBC_STRERROR=y
 CONFIG_NSH_ARCHINIT=y
 CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_DISABLE_IFUPDOWN=y
+CONFIG_NSH_DISABLE_MKDIR=y
+CONFIG_NSH_DISABLE_RM=y
+CONFIG_NSH_DISABLE_RMDIR=y
+CONFIG_NSH_DISABLE_UMOUNT=y
 CONFIG_NSH_READLINE=y
 CONFIG_NSH_STRERROR=y
-CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=2048
 CONFIG_PREALLOC_TIMERS=4
-CONFIG_PTHREAD_MUTEX_TYPES=y
-CONFIG_PTHREAD_STACK_DEFAULT=3072
-CONFIG_RAM_SIZE=6291456
-CONFIG_RAM_START=0x80000000
+CONFIG_RAM_SIZE=2097152
+CONFIG_RAM_START=0x80400000
 CONFIG_RAW_BINARY=y
 CONFIG_READLINE_CMD_HISTORY=y
-CONFIG_SCHED_ATEXIT=y
-CONFIG_SCHED_CHILD_STATUS=y
-CONFIG_SCHED_HAVE_PARENT=y
-CONFIG_SCHED_INSTRUMENTATION=y
-CONFIG_SCHED_ONEXIT=y
-CONFIG_SCHED_ONEXIT_MAX=32
-CONFIG_SCHED_STARTHOOK=y
-CONFIG_SMP=y
-CONFIG_SMP_NCPUS=2
+CONFIG_READLINE_CMD_HISTORY_LEN=100
+CONFIG_READLINE_CMD_HISTORY_LINELEN=120
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_WAITPID=y
 CONFIG_STACK_COLORATION=y
-CONFIG_START_DAY=22
-CONFIG_START_MONTH=4
-CONFIG_START_YEAR=2021
+CONFIG_START_DAY=28
+CONFIG_START_MONTH=12
+CONFIG_START_YEAR=2019
 CONFIG_SYSTEM_NSH=y
-CONFIG_SYSTEM_SYSTEM=y
-CONFIG_SYSTEM_TASKSET=y
 CONFIG_TASK_NAME_SIZE=20
 CONFIG_TESTING_GETPRIME=y
-CONFIG_TESTING_OSTEST=y
-CONFIG_TESTING_SMP=y
 CONFIG_UART0_SERIAL_CONSOLE=y
-CONFIG_USERMAIN_STACKSIZE=3072
-CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_READLINE_TABCOMPLETION=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_DEV_GPIO=y
+CONFIG_BOARDCTL_RESET=y
+CONFIG_K210_HAVE_LCD=y
+CONFIG_K210_LCD=y
+CONFIG_K210_LCD_BACKLIGHT=y
+CONFIG_LCD=y
+CONFIG_LCD_LT768=y
\ No newline at end of file
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/configs/loransh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/configs/loransh/defconfig
new file mode 100644
index 000000000..d86e29dfb
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/configs/loransh/defconfig
@@ -0,0 +1,71 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed .config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that includes your
+# modifications.
+#
+# CONFIG_NSH_DISABLE_LOSMART is not set
+# CONFIG_STANDARD_SERIAL is not set
+CONFIG_ADD_NUTTX_FETURES=y
+CONFIG_ARCH="risc-v"
+CONFIG_ARCH_BOARD="xidatong-riscv64"
+CONFIG_ARCH_BOARD_XIDATONG_RISCV64=y
+CONFIG_ARCH_CHIP="k210"
+CONFIG_ARCH_CHIP_K210=y
+CONFIG_ARCH_INTERRUPTSTACK=2048
+CONFIG_ARCH_RISCV=y
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_BINFMT_DISABLE=y
+CONFIG_BOARD_LOOPSPERMSEC=46000
+CONFIG_BUILTIN=y
+CONFIG_DEBUG_FULLOPT=y
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_EXAMPLES_HELLO=y
+CONFIG_IDLETHREAD_STACKSIZE=2048
+CONFIG_INIT_ENTRYPOINT="nsh_main"
+CONFIG_INIT_STACKSIZE=3072
+CONFIG_INTELHEX_BINARY=y
+CONFIG_LIBC_PERROR_STDOUT=y
+CONFIG_LIBC_STRERROR=y
+CONFIG_NSH_ARCHINIT=y
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_DISABLE_IFUPDOWN=y
+CONFIG_NSH_DISABLE_MKDIR=y
+CONFIG_NSH_DISABLE_RM=y
+CONFIG_NSH_DISABLE_RMDIR=y
+CONFIG_NSH_DISABLE_UMOUNT=y
+CONFIG_NSH_READLINE=y
+CONFIG_NSH_STRERROR=y
+CONFIG_PREALLOC_TIMERS=4
+CONFIG_RAM_SIZE=2097152
+CONFIG_RAM_START=0x80400000
+CONFIG_RAW_BINARY=y
+CONFIG_READLINE_CMD_HISTORY=y
+CONFIG_READLINE_CMD_HISTORY_LEN=100
+CONFIG_READLINE_CMD_HISTORY_LINELEN=120
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_WAITPID=y
+CONFIG_STACK_COLORATION=y
+CONFIG_START_DAY=28
+CONFIG_START_MONTH=12
+CONFIG_START_YEAR=2019
+CONFIG_SYSTEM_NSH=y
+CONFIG_TASK_NAME_SIZE=20
+CONFIG_TESTING_GETPRIME=y
+CONFIG_UART0_SERIAL_CONSOLE=y
+CONFIG_READLINE_TABCOMPLETION=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_DEV_GPIO=y
+CONFIG_BOARDCTL_RESET=y
+CONFIG_BSP_USING_CH438=y
+CONFIG_CH438_EXTUART3=y
+CONFIG_SUPPORT_CONNECTION_FRAMEWORK=y
+CONFIG_CONNECTION_FRAMEWORK_DEBUG=y
+CONFIG_CONNECTION_ADAPTER_LORA=y
+CONFIG_ADAPTER_E220=y
+CONFIG_ADAPTER_LORA_E220="e220"
+CONFIG_ADAPTER_E220_DRIVER_EXTUART=y
+CONFIG_ADAPTER_E220_DRIVER="/dev/extuart_dev3"
+CONFIG_ADAPTER_E220_M0_PATH="/dev/gpio0"
+CONFIG_ADAPTER_E220_M1_PATH="/dev/gpio1"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/configs/smp/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/configs/nsh/defconfig
similarity index 72%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/configs/smp/defconfig
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/configs/nsh/defconfig
index c31b14061..aaad9d7a0 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/configs/smp/defconfig
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/configs/nsh/defconfig
@@ -9,8 +9,8 @@
 # CONFIG_STANDARD_SERIAL is not set
 CONFIG_ADD_NUTTX_FETURES=y
 CONFIG_ARCH="risc-v"
-CONFIG_ARCH_BOARD="aiit-riscv64-board"
-CONFIG_ARCH_BOARD_AIIT_RISCV64=y
+CONFIG_ARCH_BOARD="xidatong-riscv64"
+CONFIG_ARCH_BOARD_XIDATONG_RISCV64=y
 CONFIG_ARCH_CHIP="k210"
 CONFIG_ARCH_CHIP_K210=y
 CONFIG_ARCH_INTERRUPTSTACK=2048
@@ -21,11 +21,10 @@ CONFIG_BOARD_LOOPSPERMSEC=46000
 CONFIG_BUILTIN=y
 CONFIG_DEBUG_FULLOPT=y
 CONFIG_DEBUG_SYMBOLS=y
-CONFIG_DEV_ZERO=y
 CONFIG_EXAMPLES_HELLO=y
-CONFIG_FS_PROCFS=y
-CONFIG_FS_PROCFS_REGISTER=y
 CONFIG_IDLETHREAD_STACKSIZE=2048
+CONFIG_INIT_ENTRYPOINT="nsh_main"
+CONFIG_INIT_STACKSIZE=3072
 CONFIG_INTELHEX_BINARY=y
 CONFIG_LIBC_PERROR_STDOUT=y
 CONFIG_LIBC_STRERROR=y
@@ -38,25 +37,24 @@ CONFIG_NSH_DISABLE_RMDIR=y
 CONFIG_NSH_DISABLE_UMOUNT=y
 CONFIG_NSH_READLINE=y
 CONFIG_NSH_STRERROR=y
-CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=2048
 CONFIG_PREALLOC_TIMERS=4
-CONFIG_RAM_SIZE=6291456
-CONFIG_RAM_START=0x80000000
+CONFIG_RAM_SIZE=2097152
+CONFIG_RAM_START=0x80400000
 CONFIG_RAW_BINARY=y
 CONFIG_READLINE_CMD_HISTORY=y
+CONFIG_READLINE_CMD_HISTORY_LEN=100
+CONFIG_READLINE_CMD_HISTORY_LINELEN=120
 CONFIG_RR_INTERVAL=200
-CONFIG_SMP=y
-CONFIG_SMP_NCPUS=2
+CONFIG_SCHED_WAITPID=y
 CONFIG_STACK_COLORATION=y
-CONFIG_START_DAY=8
-CONFIG_START_YEAR=2020
+CONFIG_START_DAY=28
+CONFIG_START_MONTH=12
+CONFIG_START_YEAR=2019
 CONFIG_SYSTEM_NSH=y
-CONFIG_SYSTEM_SYSTEM=y
-CONFIG_SYSTEM_TASKSET=y
 CONFIG_TASK_NAME_SIZE=20
 CONFIG_TESTING_GETPRIME=y
-CONFIG_TESTING_OSTEST=y
-CONFIG_TESTING_SMP=y
 CONFIG_UART0_SERIAL_CONSOLE=y
-CONFIG_USERMAIN_STACKSIZE=3072
-CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_READLINE_TABCOMPLETION=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_DEV_GPIO=y
+CONFIG_BOARDCTL_RESET=y
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/configs/knsh/defconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/configs/zbnsh/defconfig
similarity index 50%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/configs/knsh/defconfig
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/configs/zbnsh/defconfig
index 551af9c41..2eef08514 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/configs/knsh/defconfig
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/configs/zbnsh/defconfig
@@ -5,51 +5,67 @@
 # You can then do "make savedefconfig" to generate a new defconfig file that includes your
 # modifications.
 #
+# CONFIG_NSH_DISABLE_LOSMART is not set
 # CONFIG_STANDARD_SERIAL is not set
 CONFIG_ADD_NUTTX_FETURES=y
 CONFIG_ARCH="risc-v"
-CONFIG_ARCH_BOARD="aiit-riscv64-board"
-CONFIG_ARCH_BOARD_AIIT_RISCV64=y
+CONFIG_ARCH_BOARD="xidatong-riscv64"
+CONFIG_ARCH_BOARD_XIDATONG_RISCV64=y
 CONFIG_ARCH_CHIP="k210"
 CONFIG_ARCH_CHIP_K210=y
 CONFIG_ARCH_INTERRUPTSTACK=2048
 CONFIG_ARCH_RISCV=y
 CONFIG_ARCH_STACKDUMP=y
-CONFIG_ARCH_USE_MPU=y
+CONFIG_BINFMT_DISABLE=y
 CONFIG_BOARD_LOOPSPERMSEC=46000
-CONFIG_BUILD_PROTECTED=y
 CONFIG_BUILTIN=y
 CONFIG_DEBUG_FULLOPT=y
 CONFIG_DEBUG_SYMBOLS=y
-CONFIG_DEV_ZERO=y
 CONFIG_EXAMPLES_HELLO=y
-CONFIG_FS_PROCFS=y
 CONFIG_IDLETHREAD_STACKSIZE=2048
+CONFIG_INIT_ENTRYPOINT="nsh_main"
+CONFIG_INIT_STACKSIZE=3072
 CONFIG_INTELHEX_BINARY=y
 CONFIG_LIBC_PERROR_STDOUT=y
 CONFIG_LIBC_STRERROR=y
-CONFIG_MM_KERNEL_HEAPSIZE=524288
 CONFIG_NSH_ARCHINIT=y
 CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_DISABLE_IFUPDOWN=y
+CONFIG_NSH_DISABLE_MKDIR=y
+CONFIG_NSH_DISABLE_RM=y
+CONFIG_NSH_DISABLE_RMDIR=y
+CONFIG_NSH_DISABLE_UMOUNT=y
 CONFIG_NSH_READLINE=y
-CONFIG_NUTTX_USERSPACE=0x80100000
-CONFIG_PASS1_BUILDIR="boards/risc-v/k210/aiit-riscv64-board/kernel"
+CONFIG_NSH_STRERROR=y
 CONFIG_PREALLOC_TIMERS=4
-CONFIG_RAM_SIZE=6291456
-CONFIG_RAM_START=0x80000000
+CONFIG_RAM_SIZE=2097152
+CONFIG_RAM_START=0x80400000
 CONFIG_RAW_BINARY=y
 CONFIG_READLINE_CMD_HISTORY=y
+CONFIG_READLINE_CMD_HISTORY_LEN=100
+CONFIG_READLINE_CMD_HISTORY_LINELEN=120
 CONFIG_RR_INTERVAL=200
 CONFIG_SCHED_WAITPID=y
 CONFIG_STACK_COLORATION=y
-CONFIG_START_DAY=12
-CONFIG_START_MONTH=5
-CONFIG_START_YEAR=2020
+CONFIG_START_DAY=28
+CONFIG_START_MONTH=12
+CONFIG_START_YEAR=2019
 CONFIG_SYSTEM_NSH=y
-CONFIG_SYS_RESERVED=9
 CONFIG_TASK_NAME_SIZE=20
 CONFIG_TESTING_GETPRIME=y
-CONFIG_TESTING_OSTEST=y
 CONFIG_UART0_SERIAL_CONSOLE=y
-CONFIG_USERMAIN_STACKSIZE=3072
-CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_READLINE_TABCOMPLETION=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_DEV_GPIO=y
+CONFIG_BOARDCTL_RESET=y
+CONFIG_BSP_USING_CH438=y
+CONFIG_CH438_EXTUART1=y
+CONFIG_SUPPORT_CONNECTION_FRAMEWORK=y
+CONFIG_CONNECTION_FRAMEWORK_DEBUG=y
+CONFIG_CONNECTION_ADAPTER_ZIGBEE=y
+CONFIG_ADAPTER_E18=y
+CONFIG_ADAPTER_ZIGBEE_E18="e18"
+CONFIG_AS_END_DEVICE_ROLE=y
+CONFIG_ADAPTER_E18_MODE_PATH="/dev/gpio2"
+CONFIG_ADAPTER_E18_DRIVER_EXTUART=y
+CONFIG_ADAPTER_E18_DRIVER="/dev/extuart_dev1"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/img/K-Flash.jpg b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/img/K-Flash.jpg
new file mode 100644
index 000000000..aa5ebc0f5
Binary files /dev/null and b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/img/K-Flash.jpg differ
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/img/gccdir.jpg b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/img/gccdir.jpg
new file mode 100644
index 000000000..00af7af3d
Binary files /dev/null and b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/img/gccdir.jpg differ
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/img/k210-shell.jpg b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/img/k210-shell.jpg
new file mode 100644
index 000000000..72b137ae4
Binary files /dev/null and b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/img/k210-shell.jpg differ
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/img/menuconfig.png b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/img/menuconfig.png
new file mode 100644
index 000000000..ea275e1ff
Binary files /dev/null and b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/img/menuconfig.png differ
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/img/menuconfig1.png b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/img/menuconfig1.png
new file mode 100644
index 000000000..cb8291f00
Binary files /dev/null and b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/img/menuconfig1.png differ
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/img/menuconfigexit.png b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/img/menuconfigexit.png
new file mode 100644
index 000000000..adb6c2192
Binary files /dev/null and b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/img/menuconfigexit.png differ
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/include/board.h b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/include/board.h
new file mode 100644
index 000000000..9435e91c8
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/include/board.h
@@ -0,0 +1,97 @@
+/*
+* Copyright (c) 2020 AIIT XUOS Lab
+* XiUOS is licensed under Mulan PSL v2.
+* You can use this software according to the terms and conditions of the Mulan PSL v2.
+* You may obtain a copy of Mulan PSL v2 at:
+*        http://license.coscl.org.cn/MulanPSL2
+* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+* See the Mulan PSL v2 for more details.
+*/
+
+/**
+ * @file board.h
+ * @brief xidatong-riscv64 board.h
+ * @version 1.0
+ * @author AIIT XUOS Lab
+ * @date 2022.03.17
+ */
+
+#ifndef __BOARDS_RISCV_K210_XIDATONG_RISCV64_INCLUDE_BOARD_H
+#define __BOARDS_RISCV_K210_XIDATONG_RISCV64_INCLUDE_BOARD_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#ifndef __ASSEMBLY__
+# include <stdint.h>
+#endif
+
+#include "k210.h"
+
+#include "k210_fpioa.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define BOARD_LED_PAD     14 /* Connected to red led */
+
+/* Map pad 14 to gpiohs io 0 */
+
+#define BOARD_LED_IO_FUNC K210_IO_FUNC_GPIOHS0
+#define BOARD_LED_IO      0
+
+#define LED_STARTED       0  /* N/C */
+#define LED_HEAPALLOCATE  1  /* N/C */
+#define LED_IRQSENABLED   2  /* N/C */
+#define LED_STACKCREATED  3  /* N/C */
+#define LED_INIRQ         4  /* N/C */
+#define LED_SIGNAL        5  /* N/C */
+#define LED_ASSERTION     6  /* N/C */
+#define LED_PANIC         7  /* blink */
+
+/* GPIO pins used by the GPIO Subsystem */
+
+#define BOARD_NGPIOOUT    3 /* Amount of GPIO Output pins */
+#define BOARD_NGPIOINT    0 /* Amount of GPIO Input */
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: k210_boardinitialize
+ ****************************************************************************/
+
+void k210_boardinitialize(void);
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+#endif /* __ASSEMBLY__ */
+#endif /* __BOARDS_RISC-V_K210_XIDATONG_RISCV64_INCLUDE_BOARD_H */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/kernel/Makefile b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/kernel/Makefile
new file mode 100644
index 000000000..f1cfad233
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/kernel/Makefile
@@ -0,0 +1,92 @@
+############################################################################
+# boards/risc-v/k210/xidatong-riscv64/kernel/Makefile
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more
+# contributor license agreements.  See the NOTICE file distributed with
+# this work for additional information regarding copyright ownership.  The
+# ASF licenses this file to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance with the
+# License.  You may obtain a copy of the License at
+#
+#   http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations
+# under the License.
+#
+############################################################################
+
+include $(TOPDIR)/Make.defs
+
+# The entry point name (if none is provided in the .config file)
+
+CONFIG_INIT_ENTRYPOINT ?= user_start
+ENTRYPT = $(patsubst "%",%,$(CONFIG_INIT_ENTRYPOINT))
+
+# Get the paths to the libraries and the links script path in format that
+# is appropriate for the host OS
+
+USER_LIBPATHS = $(addprefix -L,$(call CONVERT_PATH,$(addprefix $(TOPDIR)$(DELIM),$(dir $(USERLIBS)))))
+USER_LDSCRIPT = -T $(call CONVERT_PATH,$(BOARD_DIR)$(DELIM)scripts$(DELIM)memory.ld)
+USER_LDSCRIPT += -T $(call CONVERT_PATH,$(BOARD_DIR)$(DELIM)scripts$(DELIM)user-space.ld)
+USER_HEXFILE += $(call CONVERT_PATH,$(TOPDIR)$(DELIM)nuttx_user.hex)
+USER_SRECFILE += $(call CONVERT_PATH,$(TOPDIR)$(DELIM)nuttx_user.srec)
+USER_BINFILE += $(call CONVERT_PATH,$(TOPDIR)$(DELIM)nuttx_user.bin)
+
+USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT)
+USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS))))
+USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}"
+
+# Source files
+
+CSRCS = k210_userspace.c
+COBJS = $(CSRCS:.c=$(OBJEXT))
+OBJS  = $(COBJS)
+
+# Targets:
+
+all: $(TOPDIR)$(DELIM)nuttx_user.elf $(TOPDIR)$(DELIM)User.map
+.PHONY: nuttx_user.elf depend clean distclean
+
+$(COBJS): %$(OBJEXT): %.c
+	$(call COMPILE, $<, $@)
+
+# Create the nuttx_user.elf file containing all of the user-mode code
+
+nuttx_user.elf: $(OBJS)
+	$(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC)
+
+$(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf
+	@echo "LD: nuttx_user.elf"
+	$(Q) cp -a nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.elf
+ifeq ($(CONFIG_INTELHEX_BINARY),y)
+	@echo "CP: nuttx_user.hex"
+	$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O ihex nuttx_user.elf $(USER_HEXFILE)
+endif
+ifeq ($(CONFIG_MOTOROLA_SREC),y)
+	@echo "CP: nuttx_user.srec"
+	$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O srec nuttx_user.elf $(USER_SRECFILE)
+endif
+ifeq ($(CONFIG_RAW_BINARY),y)
+	@echo "CP: nuttx_user.bin"
+	$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O binary nuttx_user.elf $(USER_BINFILE)
+endif
+
+$(TOPDIR)$(DELIM)User.map: nuttx_user.elf
+	@echo "MK: User.map"
+	$(Q) $(NM) -n nuttx_user.elf >$(TOPDIR)$(DELIM)User.map
+	$(Q) $(CROSSDEV)size nuttx_user.elf
+
+.depend:
+
+depend: .depend
+
+clean:
+	$(call DELFILE, nuttx_user.elf)
+	$(call DELFILE, "$(TOPDIR)$(DELIM)nuttx_user.*")
+	$(call DELFILE, "$(TOPDIR)$(DELIM)User.map")
+	$(call CLEAN)
+
+distclean: clean
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/kernel/k210_userspace.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/kernel/k210_userspace.c
new file mode 100644
index 000000000..3eab447e9
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/kernel/k210_userspace.c
@@ -0,0 +1,114 @@
+/*
+* Copyright (c) 2020 AIIT XUOS Lab
+* XiUOS is licensed under Mulan PSL v2.
+* You can use this software according to the terms and conditions of the Mulan PSL v2.
+* You may obtain a copy of Mulan PSL v2 at:
+*        http://license.coscl.org.cn/MulanPSL2
+* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+* See the Mulan PSL v2 for more details.
+*/
+
+/**
+ * @file k210_userspace.c
+ * @brief xidatong-riscv64 k210_userspace.c
+ * @version 1.0
+ * @author AIIT XUOS Lab
+ * @date 2022.03.17
+ */
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdlib.h>
+
+#include <nuttx/arch.h>
+#include <nuttx/mm/mm.h>
+#include <nuttx/wqueue.h>
+#include <nuttx/userspace.h>
+
+#if defined(CONFIG_BUILD_PROTECTED) && !defined(__KERNEL__)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Configuration ************************************************************/
+
+#ifndef CONFIG_NUTTX_USERSPACE
+#  error "CONFIG_NUTTX_USERSPACE not defined"
+#endif
+
+#if CONFIG_NUTTX_USERSPACE != 0x80100000
+#  error "CONFIG_NUTTX_USERSPACE must match the value in memory.ld"
+#endif
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/* These 'addresses' of these values are setup by the linker script.
+ * They are not actual uint32_t storage locations!
+ * They are only used meaningfully in the following way:
+ *
+ *  - The linker script defines, for example, the symbol_sdata.
+ *  - The declaration extern uint32_t _sdata; makes C happy.  C will believe
+ *    that the value _sdata is the address of a uint32_t variable _data
+ *    (it is not!).
+ *  - We can recover the linker value then by simply taking the address of
+ *    of _data.  like:  uint32_t *pdata = &_sdata;
+ */
+
+extern uint32_t _stext;           /* Start of .text */
+extern uint32_t _etext;           /* End_1 of .text + .rodata */
+extern const uint32_t _eronly;    /* End+1 of read only section */
+extern uint32_t _sdata;           /* Start of .data */
+extern uint32_t _edata;           /* End+1 of .data */
+extern uint32_t _sbss;            /* Start of .bss */
+extern uint32_t _ebss;            /* End+1 of .bss */
+
+/* This is the user space entry point */
+
+int CONFIG_INIT_ENTRYPOINT(int argc, char *argv[]);
+
+const struct userspace_s userspace locate_data(".userspace") =
+{
+  /* General memory map */
+
+  .us_entrypoint    = (main_t)CONFIG_INIT_ENTRYPOINT,
+  .us_textstart     = (uintptr_t)&_stext,
+  .us_textend       = (uintptr_t)&_etext,
+  .us_datasource    = (uintptr_t)&_eronly,
+  .us_datastart     = (uintptr_t)&_sdata,
+  .us_dataend       = (uintptr_t)&_edata,
+  .us_bssstart      = (uintptr_t)&_sbss,
+  .us_bssend        = (uintptr_t)&_ebss,
+
+  /* Memory manager heap structure */
+
+  .us_heap          = &g_mmheap,
+
+  /* Task/thread startup routines */
+
+  .task_startup     = nxtask_startup,
+
+  /* Signal handler trampoline */
+
+  .signal_handler   = up_signal_handler,
+
+  /* User-space work queue support (declared in include/nuttx/wqueue.h) */
+
+#ifdef CONFIG_LIBC_USRWORK
+  .work_usrstart    = work_usrstart,
+#endif
+};
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+#endif /* CONFIG_BUILD_PROTECTED && !__KERNEL__ */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/readme.md b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/readme.md
new file mode 100644
index 000000000..535d98084
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/readme.md
@@ -0,0 +1,174 @@
+# 浠庨浂寮�濮嬫瀯寤虹熃鐠撳伐涓氱墿鑱旀搷浣滅郴缁燂細浣跨敤ARM鏋舵瀯鐨勭熃杈鹃��
+
+# xidatong-riscv64
+
+[XiUOS](http://xuos.io/) (X Industrial Ubiquitous Operating System) 鐭界挀XiUOS鏄竴娆鹃潰鍚戞櫤鎱ц溅闂寸殑宸ヤ笟鐗╄仈缃戞搷浣滅郴缁燂紝涓昏鐢变竴涓瀬绠�鐨勫井鍨嬪疄鏃舵搷浣滅郴缁熷唴鏍稿拰鍏朵笂鐨勫伐涓氱墿鑱旀鏋舵瀯鎴愶紝閫氳繃楂樻晥绠＄悊宸ヤ笟鐗╄仈缃戣澶囥�佹敮鎾戝伐涓氱墿鑱斿簲鐢紝鍦ㄧ敓浜ц溅闂村唴瀹炵幇鏅鸿兘鍖栫殑鈥滄劅鐭ョ幆澧冦�佽仈缃戜紶杈撱�佺煡鎮夎瘑鍒�佹帶鍒惰皟鏁粹�濓紝淇冭繘浠ュ伐涓氳澶囧拰宸ヤ笟鎺у埗绯荤粺涓烘牳蹇冪殑浜恒�佹満銆佺墿娣卞害浜掕仈锛屽府鍔╂彁鍗囩敓浜х嚎鐨勬暟瀛楀寲鍜屾櫤鑳藉寲姘村钩銆�
+
+## 1. 绠�浠�
+
+| 纭欢 | 鎻忚堪 |
+| -- | -- |
+|鑺墖鍨嬪彿| 鍕樻櫤K210 |
+|鏋舵瀯| 鍙屾牳riscv64 |
+|涓婚| 400MHz                                                       |
+|鐗囧唴SRAM| 8M |
+|澶栬鏀寔| 鍐呭祵AES涓嶴HA256绠楁硶鍔犻�熷櫒 |
+|| DVP銆丣TAG銆丱TP銆丗PIOA銆丟PIO銆乁ART銆丼PI銆丷TC銆両虏S銆両虏C銆乄DT銆乀imer涓嶱WM |
+
+XiUOS鏉跨骇褰撳墠鏀寔浣跨敤CH438銆丟PIO銆乁ART绛夈��
+
+## 2. 寮�鍙戠幆澧冩惌寤�
+
+### 鎺ㄨ崘浣跨敤锛�
+
+**鎿嶄綔绯荤粺锛�** ubuntu18.04 [https://ubuntu.com/download/desktop](https://ubuntu.com/download/desktop)
+
+鏇存柊`ubuntu 18.04`婧愮殑鏂规硶:锛堟牴鎹嚜韬儏鍐佃�屽畾锛屽彲浠ヤ笉鏇存敼锛�
+
+绗竴姝�:鎵撳紑sources.list鏂囦欢
+
+```c
+sudo vim /etc/apt/sources.list
+```
+
+绗簩姝�:灏嗕互涓嬪唴瀹瑰鍒跺埌sources.list鏂囦欢
+
+```c
+deb http://mirrors.aliyun.com/ubuntu/ bionic main restricted universe multiverse
+deb http://mirrors.aliyun.com/ubuntu/ bionic-security main restricted universe multiverse
+deb http://mirrors.aliyun.com/ubuntu/ bionic-updates main restricted universe multiverse
+deb http://mirrors.aliyun.com/ubuntu/ bionic-proposed main restricted universe multiverse
+deb http://mirrors.aliyun.com/ubuntu/ bionic-backports main restricted universe multiverse
+deb-src http://mirrors.aliyun.com/ubuntu/ bionic main restricted universe multiverse
+deb-src http://mirrors.aliyun.com/ubuntu/ bionic-security main restricted universe multiverse
+deb-src http://mirrors.aliyun.com/ubuntu/ bionic-updates main restricted universe multiverse
+deb-src http://mirrors.aliyun.com/ubuntu/ bionic-proposed main restricted universe multiverse
+deb-src http://mirrors.aliyun.com/ubuntu/ bionic-backports main restricted universe multiverse
+```
+
+绗笁姝�:鏇存柊婧愬拰绯荤粺杞欢
+
+```c
+sudo apt-get update
+sudo apt-get upgrade
+```
+
+**寮�鍙戝伐鍏锋帹鑽愪娇鐢� VSCode   锛孷Scode涓嬭浇鍦板潃涓猴細** VSCode  [https://code.visualstudio.com/](https://code.visualstudio.com/)锛屾帹鑽愪笅杞藉湴鍧�涓� [http://vscode.cdn.azure.cn/stable/3c4e3df9e89829dce27b7b5c24508306b151f30d/code_1.55.2-1618307277_amd64.deb](http://vscode.cdn.azure.cn/stable/3c4e3df9e89829dce27b7b5c24508306b151f30d/code_1.55.2-1618307277_amd64.deb)
+
+### 渚濊禆鍖呭畨瑁咃細
+
+```
+$ sudo apt install build-essential pkg-config  git
+$ sudo apt install gcc make libncurses5-dev openssl libssl-dev bison flex libelf-dev autoconf libtool gperf libc6-dev
+```
+
+**XiUOS鎿嶄綔绯荤粺婧愮爜涓嬭浇锛岃繖涓粨閲岀殑浠ｇ爜鍙兘涓嶆槸鏈�鏂扮殑锛屾渶濂絞it clone鑷繁浠撻噷鐨勪唬鐮侊細** XiUOS [https://www.gitlink.org.cn/xuos/xiuos](https://www.gitlink.org.cn/xuos/xiuos)
+
+鏂板缓涓�涓┖鏂囦欢澶瑰苟杩涘叆鏂囦欢澶逛腑锛屽苟涓嬭浇婧愮爜锛屽叿浣撳懡浠ゅ涓嬶細
+
+```c
+mkdir test  &&  cd test
+git clone https://gitlink.org.cn/xuos/xiuos.git
+git checkout origin/prepare_for_master  (浠ュ疄闄呭垎鏀负鍑�)
+```
+
+鎵撳紑XiUOS婧愮爜鏂囦欢鍖呭彲浠ョ湅鍒颁互涓嬬洰褰曪細
+| 鍚嶇О | 璇存槑 |
+| -- | -- |
+| APP_Framework | 搴旂敤浠ｇ爜 |
+| Ubiquitous | 鏉跨骇鏀寔鍖�,鏀寔NuttX銆丷T-Thread鍜孹iZi鍐呮牳 |
+
+
+### 瑁佸噺閰嶇疆宸ュ叿鐨勪笅杞�
+
+瑁佸噺閰嶇疆宸ュ叿锛�
+
+**宸ュ叿鍦板潃锛�** kconfig-frontends [https://www.gitlink.org.cn/xuos/kconfig-frontends](https://www.gitlink.org.cn/xuos/kconfig-frontends)锛屼笅杞戒笌瀹夎鐨勫叿浣撳懡浠ゅ涓嬶細
+
+```c
+mkdir kfrontends  && cd kfrontends
+git clone https://gitlink.org.cn/xuos/kconfig-frontends.git
+```
+
+涓嬭浇婧愮爜鍚庢寜浠ヤ笅姝ラ鎵ц杞欢瀹夎锛�
+
+```c
+cd kconfig-frontends
+./xs_build.sh
+```
+
+### 缂栬瘧宸ュ叿閾撅細
+
+Riscv64锛� riscv64-unknown-elf-toolchain-10.2.0-2020.12.8-x86_64-linux-ubuntu14.tar锛屽湪鎴戠殑涓汉浠撲繚瀛樻湁涓�浠斤細
+
+https://gitlink.org.cn/wgzAIIT/build_tools.git
+
+涓嬭浇鍚庤В鍘嬪埌Ubantu鐜鐨�/opt鐩綍涓嬨��
+
+鍐嶅皢/opt/riscv64-unknown-elf-toolchain-10.2.0-2020.12.8-x86_64-linux-ubuntu14/bin鐩綍涓嬬殑鍏ㄩ儴浜岃繘鍒舵枃浠惰蒋杩炴帴鍒�/usr/bin锛屼緥濡�
+
+![gccdir](img/gccdir.jpg)
+
+
+
+## 3.缂栬瘧bin鍖�
+
+1.XiUOS鎿嶄綔绯荤粺婧愮爜涓嬭浇锛� [https://www.gitlink.org.cn/xuos/xiuos](https://www.gitlink.org.cn/xuos/xiuos)
+
+   鐩墠澶у閮戒娇鐢ㄧ殑涓汉浠擄紝璇锋敞鎰忔澶勭殑璺緞鍙婂垎鏀紝濡傛灉闇�瑕侀』杩涜鍒嗘敮鍒囨崲
+
+2.鍦║buntu18.04鐜涓殑浠ｇ爜璺緞锛屾墽琛屼互涓嬪懡浠わ紝鐢熸垚閰嶇疆鏂囦欢
+
+```shell
+cd ./Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx
+source build.sh
+
+鎵ц瀹屾瘯浼氳嚜鍔ㄨ繘鍏�./Ubiquitous/Nuttx_Fusion_XiUOS/nuttx涓嬶紝缁х画鎵ц
+
+./tools/configure.sh xidatong-riscv64:nsh
+make menuconfig
+瑙嗘儏鍐佃�屽畾锛屽鏋滈渶瑕佸墠闈㈠姞sudo
+```
+
+3..鍦╩enuconfig鐣岄潰閰嶇疆闇�瑕佸叧闂拰寮�鍚殑鍔熻兘锛屾寜鍥炶溅閿繘鍏ヤ笅绾ц彍鍗曪紝鎸塝閿�変腑闇�瑕佸紑鍚殑鍔熻兘锛屾寜N閿�変腑闇�瑕佸叧闂殑鍔熻兘锛岄厤缃粨鏉熷悗淇濆瓨骞堕��鍑猴紙鏈緥鏃ㄥ湪婕旂ず绠�鍗曠殑杈撳嚭渚嬬▼锛屾墍浠ユ病鏈夐渶瑕侀厤缃殑閫夐」锛屽弻鍑诲揩鎹烽敭ESC閫�鍑洪厤缃級
+
+![menuconfig](./img/menuconfig.png)
+
+閫�鍑烘椂閫夋嫨`yes`淇濆瓨涓婇潰鎵�閰嶇疆鐨勫唴瀹癸紝濡備笅鍥炬墍绀猴細
+
+![menuconfig1](./img/menuconfigexit.png)
+
+4.缁х画鎵ц浠ヤ笅鍛戒护锛岃繘琛岀紪璇�
+
+```shell
+make
+鎴�
+make -j8
+```
+
+make鏃跺姞涓奦=1鍙傛暟鍙互鐪嬪埌杈冧负璇︾粏鐨勭紪璇戜俊鎭紝浣嗘槸缂栬瘧杩囩▼浼氭瘮杈冩參銆�
+
+5.濡傛灉缂栬瘧姝ｇ‘鏃犺锛屼細鍦ㄥ綋鍓嶇洰褰曚笅浜х敓nuttx.bin銆乶uttx銆乶uttx.hex绛夋枃浠躲��
+
+## 4. 鐑у啓鍙婅繍琛�
+
+### 4.1 鐑у啓
+1銆佺儳鍐欏伐鍏凤細K-Flash.exe锛屽彲https://gitlink.org.cn/wgzAIIT/build_tools.git涓嬭浇
+
+![K-Flash](img/K-Flash.jpg)
+
+鍦ㄢ憼閫夋嫨涓插彛 com 鍙�
+
+鍦ㄢ憽澶勯�夋嫨娉㈢壒鐜囷紝閫夋嫨 115200
+
+鍦ㄢ憿澶勯�夋嫨缂栬瘧鍑虹殑 nuttx.bin 鏂囦欢
+
+璁惧鍦ㄤ笂鐢垫椂纭繚 Boot 鍜� GND 鐭帴锛岃繖鏄崌绾фā寮忋��
+
+鐐瑰嚮鈶ｅ Flash 寮�濮嬬儳褰曪紝鏄剧ず鐑у綍瀹屾垚鍗冲彲锛屼腑闂存湁鎶ラ敊鐨勮瘽锛岄噸鏂� Flash銆�
+
+### 4.2 杩愯缁撴灉
+
+鐑у啓瀹屾瘯閲嶆柊涓婄數锛岃繘鍏� shell銆�
+
+![k210-shell](img/k210-shell.jpg)
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/cxxtest/Make.defs b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/scripts/Make.defs
similarity index 58%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/cxxtest/Make.defs
rename to Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/scripts/Make.defs
index dc5dbeb20..151bfd807 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-arm32-board/configs/cxxtest/Make.defs
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/scripts/Make.defs
@@ -1,5 +1,5 @@
 ############################################################################
-# boards/arm/stm32/aiit-arm32-board/configs/cxxtest/Make.defs
+# boards/risc-v/k210/xidatong-riscv64/scripts/Make.defs
 #
 # Licensed to the Apache Software Foundation (ASF) under one or more
 # contributor license agreements.  See the NOTICE file distributed with
@@ -20,44 +20,51 @@
 
 include $(TOPDIR)/.config
 include $(TOPDIR)/tools/Config.mk
-include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs
+include $(TOPDIR)/arch/risc-v/src/common/Toolchain.defs
 
 LDSCRIPT = ld.script
-ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
-  ARCHSCRIPT = -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}"
-else
-  ARCHSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
-endif
+
+ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
 
 ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
   ARCHOPTIMIZATION = -g
+  ASARCHCPUFLAGS += -Wa,-g
 endif
 
+MAXOPTIMIZATION = -Os
+
 ifneq ($(CONFIG_DEBUG_NOOPT),y)
-  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing
 endif
 
-ARCHCFLAGS = -fno-builtin
-ifeq ($(CONFIG_CXX_EXCEPTION),y)
-  ARCHCPUFLAGSXX = -fno-builtin
-else
-  ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fcheck-new
-endif
+ARCHCPUFLAGS += -mcmodel=medany -mstrict-align
+ARCHCFLAGS = -fno-common -ffunction-sections -fdata-sections
+ARCHCXXFLAGS = -fno-common -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
-ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
 
-CFLAGS := $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
+CFLAGS := $(APPPATHS) $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
 CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
 CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
 CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
 CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
-AFLAGS := $(CFLAGS) -D__ASSEMBLY__
+AFLAGS += $(CFLAGS) -D__ASSEMBLY__ $(ASARCHCPUFLAGS)
 
-NXFLATLDFLAGS1 = -r -d -warn-common
-NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
-LDNXFLATFLAGS = -e main -s 2048
+# Loadable module definitions
 
-ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
-  LDFLAGS += -g
-endif
+CMODULEFLAGS = $(CFLAGS)
+
+LDMODULEFLAGS = -r -e module_initialize
+LDMODULEFLAGS += -T $(call CONVERT_PATH,$(TOPDIR)/libs/libc/modlib/gnu-elf.ld)
+
+# ELF module definitions
+
+CELFFLAGS = $(CFLAGS)
+CXXELFFLAGS = $(CXXFLAGS)
+
+LDELFFLAGS = -r -e main
+LDELFFLAGS += -T $(call CONVERT_PATH,$(BOARD_DIR)$(DELIM)scripts$(DELIM)gnu-elf.ld)
+
+# File extensions
+
+LDFLAGS += --gc-sections -melf64lriscv
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/scripts/gnu-elf.ld b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/scripts/gnu-elf.ld
new file mode 100644
index 000000000..baf87f6c7
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/scripts/gnu-elf.ld
@@ -0,0 +1,115 @@
+/****************************************************************************
+ * boards/risc-v/k210/xidatong-riscv64/scripts/gnu-elf.ld
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+SECTIONS
+{
+  .text 0x00000000 :
+    {
+      _stext = . ;
+      *(.text)
+      *(.text.*)
+      *(.gnu.warning)
+      *(.stub)
+      *(.glue_7)
+      *(.glue_7t)
+      *(.jcr)
+
+      /* C++ support:  The .init and .fini sections contain specific logic
+       * to manage static constructors and destructors.
+       */
+
+      *(.gnu.linkonce.t.*)
+      *(.init)             /* Old ABI */
+      *(.fini)             /* Old ABI */
+      _etext = . ;
+    }
+
+  .rodata :
+    {
+      _srodata = . ;
+      *(.rodata)
+      *(.rodata1)
+      *(.rodata.*)
+      *(.gnu.linkonce.r*)
+      _erodata = . ;
+    }
+
+  .data :
+    {
+      _sdata = . ;
+      *(.data)
+      *(.data1)
+      *(.data.*)
+      *(.gnu.linkonce.d*)
+      . = ALIGN(4);
+      _edata = . ;
+    }
+
+  /* C++ support. For each global and static local C++ object,
+   * GCC creates a small subroutine to construct the object. Pointers
+   * to these routines (not the routines themselves) are stored as
+   * simple, linear arrays in the .ctors section of the object file.
+   * Similarly, pointers to global/static destructor routines are
+   * stored in .dtors.
+   */
+
+  .ctors :
+    {
+      _sctors = . ;
+      *(.ctors)       /* Old ABI:  Unallocated */
+      *(.init_array)  /* New ABI:  Allocated */
+      _edtors = . ;
+    }
+
+  .dtors :
+    {
+      _sdtors = . ;
+      *(.dtors)       /* Old ABI:  Unallocated */
+      *(.fini_array)  /* New ABI:  Allocated */
+      _edtors = . ;
+    }
+
+  .bss :
+    {
+      _sbss = . ;
+      *(.bss)
+      *(.bss.*)
+      *(.sbss)
+      *(.sbss.*)
+      *(.gnu.linkonce.b*)
+      *(COMMON)
+      _ebss = . ;
+    }
+
+    /* Stabs debugging sections.    */
+
+    .stab 0 : { *(.stab) }
+    .stabstr 0 : { *(.stabstr) }
+    .stab.excl 0 : { *(.stab.excl) }
+    .stab.exclstr 0 : { *(.stab.exclstr) }
+    .stab.index 0 : { *(.stab.index) }
+    .stab.indexstr 0 : { *(.stab.indexstr) }
+    .comment 0 : { *(.comment) }
+    .debug_abbrev 0 : { *(.debug_abbrev) }
+    .debug_info 0 : { *(.debug_info) }
+    .debug_line 0 : { *(.debug_line) }
+    .debug_pubnames 0 : { *(.debug_pubnames) }
+    .debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/scripts/ld.script b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/scripts/ld.script
new file mode 100644
index 000000000..8e4ca70f8
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/scripts/ld.script
@@ -0,0 +1,100 @@
+/****************************************************************************
+ * boards/risc-v/k210/xidatong-riscv64/scripts/ld.script
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/* Reg   Access        Start addr    End addr     Size
+ * MEM0  CPU w/  cache  0x80000000 - 0x803fffff : 4MB
+ * MEM1  CPU w/  cache  0x80400000 - 0x805fffff : 2MB
+ * MEM0  CPU w/o cache  0x40000000 - 0x403fffff : 4MB
+ * MEM1  CPU w/o cache  0x40400000 - 0x405fffff : 4MB
+ */
+
+MEMORY
+{
+  progmem (rx) : ORIGIN = 0x80000000, LENGTH = 4096K  /* w/ cache */
+  sram   (rwx) : ORIGIN = 0x80400000, LENGTH = 2048K  /* w/ cache */
+}
+
+OUTPUT_ARCH("riscv")
+
+ENTRY(_stext)
+EXTERN(_vectors)
+SECTIONS
+{
+    .text : {
+        _stext = ABSOLUTE(.);
+        *(.vectors)
+        *(.text .text.*)
+        *(.fixup)
+        *(.gnu.warning)
+        *(.rodata .rodata.* .srodata .srodata.*)
+        *(.gnu.linkonce.t.*)
+        *(.glue_7)
+        *(.glue_7t)
+        *(.got)
+        *(.gcc_except_table)
+        *(.gnu.linkonce.r.*)
+        _etext = ABSOLUTE(.);
+    } > progmem
+
+    .init_section : ALIGN(4) {
+        _sinit = ABSOLUTE(.);
+        KEEP(*(.init_array .init_array.*))
+        _einit = ABSOLUTE(.);
+    } > progmem
+
+    _eronly = ABSOLUTE(.);
+
+    .data : ALIGN(4) {
+        _sdata = ABSOLUTE(.);
+        *(.data .data.*)
+        *(.sdata .sdata.* .sdata2.*)
+        *(.gnu.linkonce.d.*)
+        *(.gnu.linkonce.s.*)
+        CONSTRUCTORS
+        . = ALIGN(4);
+        _edata = ABSOLUTE(.);
+    } > sram AT > progmem
+
+    .bss : ALIGN(4) {
+        _sbss = ABSOLUTE(.);
+        *(.bss .bss.*)
+        *(.sbss .sbss.*)
+        *(.gnu.linkonce.b.*)
+        *(.gnu.linkonce.sb.*)
+        *(COMMON)
+        . = ALIGN(32);
+        _ebss = ABSOLUTE(.);
+    } > sram
+
+    /* Stabs debugging sections. */
+
+    .stab 0 : { *(.stab) }
+    .stabstr 0 : { *(.stabstr) }
+    .stab.excl 0 : { *(.stab.excl) }
+    .stab.exclstr 0 : { *(.stab.exclstr) }
+    .stab.index 0 : { *(.stab.index) }
+    .stab.indexstr 0 : { *(.stab.indexstr) }
+    .comment 0 : { *(.comment) }
+    .debug_abbrev 0 : { *(.debug_abbrev) }
+    .debug_info 0 : { *(.debug_info) }
+    .debug_line 0 : { *(.debug_line) }
+    .debug_pubnames 0 : { *(.debug_pubnames) }
+    .debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/scripts/memory.ld b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/scripts/memory.ld
new file mode 100644
index 000000000..d4453581c
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/scripts/memory.ld
@@ -0,0 +1,37 @@
+/****************************************************************************
+ * boards/risc-v/k210/xidatong-riscv64/scripts/memory.ld
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/* Reg   Access        Start addr    End addr     Size
+ * MEM0  CPU w/  cache  0x80000000 - 0x803fffff : 4MB
+ * MEM1  CPU w/  cache  0x80400000 - 0x805fffff : 2MB
+ * MEM0  CPU w/o cache  0x40000000 - 0x403fffff : 4MB
+ * MEM1  CPU w/o cache  0x40400000 - 0x405fffff : 4MB
+ */
+
+MEMORY
+{
+  kflash (rx)  : ORIGIN = 0x80000000, LENGTH = 1024K  /* w/ cache */
+  uflash (rx)  : ORIGIN = 0x80100000, LENGTH = 1024K  /* w/ cache */
+  xflash (rx)  : ORIGIN = 0x80200000, LENGTH = 2048K  /* w/ cache */
+
+  ksram (rwx)  : ORIGIN = 0x80400000, LENGTH = 512K   /* w/ cache */
+  usram (rwx)  : ORIGIN = 0x80480000, LENGTH = 512K   /* w/ cache */
+  xsram (rwx)  : ORIGIN = 0x80500000, LENGTH = 1024K  /* w/ cache */
+}
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/scripts/user-space.ld b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/scripts/user-space.ld
new file mode 100644
index 000000000..011c0c949
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/scripts/user-space.ld
@@ -0,0 +1,94 @@
+/****************************************************************************
+ * boards/risc-v/k210/xidatong-riscv64/scripts/user-space.ld
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/* NOTE:  This depends on the memory.ld script having been included prior to
+ * this script.
+ */
+
+OUTPUT_ARCH("riscv")
+
+SECTIONS
+{
+    .userspace : {
+        *(.userspace)
+    } > uflash
+
+    .text : {
+        _stext = ABSOLUTE(.);
+        *(.text .text.*)
+        *(.fixup)
+        *(.gnu.warning)
+        *(.rodata .rodata.*)
+        *(.gnu.linkonce.t.*)
+        *(.glue_7)
+        *(.glue_7t)
+        *(.got)
+        *(.gcc_except_table)
+        *(.gnu.linkonce.r.*)
+        _etext = ABSOLUTE(.);
+    } > uflash
+
+    .init_section : {
+        _sinit = ABSOLUTE(.);
+        KEEP(*(.init_array .init_array.*))
+        _einit = ABSOLUTE(.);
+    } > uflash
+
+    __exidx_start = ABSOLUTE(.);
+
+    __exidx_end = ABSOLUTE(.);
+
+    _eronly = ABSOLUTE(.);
+
+    .data : {
+        _sdata = ABSOLUTE(.);
+        *(.data .data.*)
+        *(.sdata .sdata.* .sdata2.*)
+        *(.gnu.linkonce.d.*)
+        CONSTRUCTORS
+        . = ALIGN(4);
+        _edata = ABSOLUTE(.);
+    } > usram AT > uflash
+
+    .bss : {
+        _sbss = ABSOLUTE(.);
+        *(.bss .bss.*)
+        *(.sbss .sbss.*)
+        *(.gnu.linkonce.b.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = ABSOLUTE(.);
+    } > usram
+
+    /* Stabs debugging sections */
+
+    .stab 0 : { *(.stab) }
+    .stabstr 0 : { *(.stabstr) }
+    .stab.excl 0 : { *(.stab.excl) }
+    .stab.exclstr 0 : { *(.stab.exclstr) }
+    .stab.index 0 : { *(.stab.index) }
+    .stab.indexstr 0 : { *(.stab.indexstr) }
+    .comment 0 : { *(.comment) }
+    .debug_abbrev 0 : { *(.debug_abbrev) }
+    .debug_info 0 : { *(.debug_info) }
+    .debug_line 0 : { *(.debug_line) }
+    .debug_pubnames 0 : { *(.debug_pubnames) }
+    .debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/Makefile b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/Makefile
new file mode 100644
index 000000000..d6fa521c7
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/Makefile
@@ -0,0 +1,49 @@
+############################################################################
+# boards/risc-v/k210/xidatong-riscv64/src/Makefile
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more
+# contributor license agreements.  See the NOTICE file distributed with
+# this work for additional information regarding copyright ownership.  The
+# ASF licenses this file to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance with the
+# License.  You may obtain a copy of the License at
+#
+#   http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations
+# under the License.
+#
+############################################################################
+
+include $(TOPDIR)/Make.defs
+
+CSRCS  = k210_bringup.c k210_boot.c
+
+ifeq ($(CONFIG_BOARDCTL_RESET),y)
+CSRCS += k210_reset.c
+endif
+
+ifeq ($(CONFIG_BOARDCTL),y)
+CSRCS += k210_appinit.c
+endif
+
+ifeq ($(CONFIG_ARCH_LEDS),y)
+CSRCS += k210_leds.c
+endif
+
+ifeq ($(CONFIG_K210_LCD),y)
+CSRCS += k210_lcd.c lcd_demo.c
+endif
+
+ifeq ($(CONFIG_DEV_GPIO),y)
+CSRCS += k210_gpio.c
+endif
+
+ifeq ($(CONFIG_BSP_USING_CH438),y)
+CSRCS += k210_ch438.c ch438_demo.c
+endif
+
+include $(TOPDIR)/boards/Board.mk
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/ch438_demo.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/ch438_demo.c
new file mode 100644
index 000000000..149f7f8e2
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/ch438_demo.c
@@ -0,0 +1,84 @@
+/*
+* Copyright (c) 2020 AIIT XUOS Lab
+* XiUOS is licensed under Mulan PSL v2.
+* You can use this software according to the terms and conditions of the Mulan PSL v2.
+* You may obtain a copy of Mulan PSL v2 at:
+*        http://license.coscl.org.cn/MulanPSL2
+* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+* See the Mulan PSL v2 for more details.
+*/
+
+/**
+ * @file ch438_demo.c
+ * @brief xidatong-riscv64 ch438_demo.c
+ * @version 1.0
+ * @author AIIT XUOS Lab
+ * @date 2022.03.17
+ */
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+#include "k210_ch438.h"
+#include <sys/ioctl.h>
+#include <nuttx/ioexpander/gpio.h>
+
+void CH438Demo(void)
+{
+    int fd, m0fd, m1fd;
+    int i;
+    char sendbuffer1[4] = {0xC0,0x04,0x01,0x09};
+    char sendbuffer2[6] = {0xC0,0x00,0x03,0x12,0x34,0x61};
+    char sendbuffer3[3] = {0xC1,0x04,0x01};
+    char sendbuffer4[3] = {0xC1,0x00,0x03};
+    char buffer[256];
+    int readlen;
+
+    fd = open("/dev/extuart_dev3", O_RDWR);
+    ioctl(fd, OPE_INT, (unsigned long)9600);
+    m0fd = open("/dev/gpio0", O_RDWR);
+    m1fd = open("/dev/gpio1", O_RDWR);
+    ioctl(m0fd, GPIOC_WRITE, (unsigned long)1);
+    ioctl(m1fd, GPIOC_WRITE, (unsigned long)1);
+    sleep(1);
+
+    write(fd, sendbuffer1,4);
+    sleep(1);
+    readlen = read(fd, buffer, 256);
+    printf("readlen1 = %d\n", readlen);
+    for(i = 0;i< readlen; ++i)
+    {
+        printf("0x%x\n", buffer[i]);
+    }
+
+    write(fd, sendbuffer2,6);
+    sleep(1);
+    readlen = read(fd, buffer, 256);
+    printf("readlen1 = %d\n", readlen);
+    for(i = 0;i< readlen; ++i)
+    {
+        printf("0x%x\n", buffer[i]);
+    }
+
+    write(fd, sendbuffer3,3);
+    sleep(1);
+    readlen = read(fd, buffer, 256);
+    printf("readlen1 = %d\n", readlen);
+    for(i = 0;i< readlen; ++i)
+    {
+        printf("0x%x\n", buffer[i]);
+    }
+
+    write(fd, sendbuffer4,3);
+    sleep(1);
+    readlen = read(fd, buffer, 256);
+    printf("readlen1 = %d\n", readlen);
+    for(i = 0;i< readlen; ++i)
+    {
+        printf("0x%x\n", buffer[i]);
+    }
+
+    close(fd);
+}
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/k210_appinit.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/k210_appinit.c
new file mode 100644
index 000000000..acbd09be7
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/k210_appinit.c
@@ -0,0 +1,76 @@
+/*
+* Copyright (c) 2020 AIIT XUOS Lab
+* XiUOS is licensed under Mulan PSL v2.
+* You can use this software according to the terms and conditions of the Mulan PSL v2.
+* You may obtain a copy of Mulan PSL v2 at:
+*        http://license.coscl.org.cn/MulanPSL2
+* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+* See the Mulan PSL v2 for more details.
+*/
+
+/**
+ * @file k210_appinit.c
+ * @brief xidatong-riscv64 k210_appinit.c
+ * @version 1.0
+ * @author AIIT XUOS Lab
+ * @date 2022.03.17
+ */
+
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdbool.h>
+#include <stdio.h>
+#include <syslog.h>
+#include <errno.h>
+
+#include <nuttx/board.h>
+
+#include "k210.h"
+#include "xidatong-riscv64.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_app_initialize
+ *
+ * Description:
+ *   Perform architecture specific initialization
+ *
+ * Input Parameters:
+ *   arg - The boardctl() argument is passed to the board_app_initialize()
+ *         implementation without modification.  The argument has no
+ *         meaning to NuttX; the meaning of the argument is a contract
+ *         between the board-specific initialization logic and the
+ *         matching application logic.  The value could be such things as a
+ *         mode enumeration value, a set of DIP switch switch settings, a
+ *         pointer to configuration data read from a file or serial FLASH,
+ *         or whatever you would like to do with it.  Every implementation
+ *         should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure to indicate the nature of the failure.
+ *
+ ****************************************************************************/
+
+int board_app_initialize(uintptr_t arg)
+{
+#ifdef CONFIG_BOARD_LATE_INITIALIZE
+  /* Board initialization already performed by board_late_initialize() */
+
+  return OK;
+#else
+  /* Perform board-specific initialization */
+
+  return k210_bringup();
+#endif
+}
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/k210_boot.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/k210_boot.c
new file mode 100644
index 000000000..745905fcf
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/k210_boot.c
@@ -0,0 +1,59 @@
+/*
+* Copyright (c) 2020 AIIT XUOS Lab
+* XiUOS is licensed under Mulan PSL v2.
+* You can use this software according to the terms and conditions of the Mulan PSL v2.
+* You may obtain a copy of Mulan PSL v2 at:
+*        http://license.coscl.org.cn/MulanPSL2
+* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+* See the Mulan PSL v2 for more details.
+*/
+
+/**
+ * @file k210_boot.c
+ * @brief xidatong-riscv64 k210_boot.c
+ * @version 1.0
+ * @author AIIT XUOS Lab
+ * @date 2022.03.17
+ */
+
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <debug.h>
+
+#include <nuttx/board.h>
+#include <arch/board/board.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: k210_boardinitialize
+ *
+ * Description:
+ *   All K210 architectures must provide the following entry point.
+ *   This entry point is called early in the initialization -- after all
+ *   memory has been configured and mapped but before any devices have been
+ *   initialized.
+ *
+ ****************************************************************************/
+
+void k210_boardinitialize(void)
+{
+  board_autoled_initialize();
+}
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/k210_bringup.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/k210_bringup.c
new file mode 100644
index 000000000..bc90e372b
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/k210_bringup.c
@@ -0,0 +1,89 @@
+/*
+* Copyright (c) 2020 AIIT XUOS Lab
+* XiUOS is licensed under Mulan PSL v2.
+* You can use this software according to the terms and conditions of the Mulan PSL v2.
+* You may obtain a copy of Mulan PSL v2 at:
+*        http://license.coscl.org.cn/MulanPSL2
+* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+* See the Mulan PSL v2 for more details.
+*/
+
+/**
+ * @file k210_bringup.c
+ * @brief xidatong-riscv64 k210_bringup.c
+ * @version 1.0
+ * @author AIIT XUOS Lab
+ * @date 2022.03.17
+ */
+
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdbool.h>
+#include <stdio.h>
+#include <debug.h>
+#include <errno.h>
+
+#include <nuttx/board.h>
+#include <nuttx/fs/fs.h>
+
+#include "k210.h"
+#include "k210_clockconfig.h"
+#include "xidatong-riscv64.h"
+
+#ifdef CONFIG_BSP_USING_CH438
+#  include "k210_ch438.h"
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: k210_bringup
+ ****************************************************************************/
+
+int k210_bringup(void)
+{
+  int ret = OK;
+
+#ifdef CONFIG_FS_PROCFS
+  /* Mount the procfs file system */
+
+  ret = nx_mount(NULL, "/proc", "procfs", 0, NULL);
+  if (ret < 0)
+    {
+      serr("ERROR: Failed to mount procfs at %s: %d\n", "/proc", ret);
+    }
+#endif
+
+#ifdef CONFIG_DEV_GPIO
+  ret = k210_gpio_init();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "Failed to initialize GPIO Driver: %d\n", ret);
+      return ret;
+    }
+#endif
+
+#ifdef CONFIG_BSP_USING_CH438
+  board_ch438_initialize();
+#endif
+
+#ifdef CONFIG_K210_LCD
+  k210_sysctl_init();
+  ret = board_lcd_initialize();
+  if (ret < 0)
+    {
+      syslog(LOG_NOTICE, "board lcd initialize %d\n", ret);
+    }
+#endif
+
+  return ret;
+}
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/k210_ch438.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/k210_ch438.c
new file mode 100644
index 000000000..7e7ca338d
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/k210_ch438.c
@@ -0,0 +1,922 @@
+/*
+* Copyright (c) 2020 AIIT XUOS Lab
+* XiOS is licensed under Mulan PSL v2.
+* You can use this software according to the terms and conditions of the Mulan PSL v2.
+* You may obtain a copy of Mulan PSL v2 at:
+*        http://license.coscl.org.cn/MulanPSL2
+* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+* See the Mulan PSL v2 for more details.
+*/
+
+/**
+ * @file k210_ch438.c
+ * @brief xidatong-riscv64 k210_ch438.c
+ * @version 1.0
+ * @author AIIT XUOS Lab
+ * @date 2022.06.08
+ */
+
+#include "k210_ch438.h"
+
+#define CH438PORTNUM  8
+#define CH438_BUFFSIZE  256
+#define CH438_INCREMENT  MSEC2TICK(33)
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+static FAR void getInterruptStatus(FAR void *arg);
+static void ch438_io_config(void);
+static void CH438SetOutput(void);
+static void CH438SetInput(void);
+static uint8_t ReadCH438Data(uint8_t addr);
+static void WriteCH438Data(uint8_t addr, const uint8_t dat);
+static void WriteCH438Block(uint8_t mAddr, uint8_t mLen, const uint8_t *mBuf);
+static void Ch438UartSend(uint8_t ext_uart_no, const uint8_t *Data, uint16_t Num);
+uint8_t CH438UARTRcv(uint8_t ext_uart_no, uint8_t *buf, size_t size);
+static void K210CH438Init(void);
+static void CH438PortInit(uint8_t ext_uart_no, uint32_t	baud_rate);
+static int K210Ch438WriteData(uint8_t ext_uart_no, const uint8_t *write_buffer, size_t size);
+static size_t K210Ch438ReadData(uint8_t ext_uart_no, size_t size);
+static void Ch438InitDefault(void);
+
+static int ch438_open(FAR struct file *filep);
+static int ch438_close(FAR struct file *filep);
+static ssize_t ch438_read(FAR struct file *filep, FAR char *buffer, size_t buflen);
+static ssize_t ch438_write(FAR struct file *filep, FAR const char *buffer, size_t buflen);
+static int ch438_ioctl(FAR struct file *filep, int cmd, unsigned long arg);
+static int ch438_register(FAR const char *devpath, uint8_t ext_uart_no);
+
+/****************************************************************************
+ * Private type
+ ****************************************************************************/
+struct ch438_dev_s
+{
+  sem_t devsem;    /* ch438 port devsem */
+  uint8_t port;    /* ch438 port number*/
+};
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/*mutex of corresponding port*/
+static pthread_mutex_t mutex[CH438PORTNUM] =
+{
+  PTHREAD_MUTEX_INITIALIZER,
+  PTHREAD_MUTEX_INITIALIZER,
+  PTHREAD_MUTEX_INITIALIZER,
+  PTHREAD_MUTEX_INITIALIZER,
+  PTHREAD_MUTEX_INITIALIZER,
+  PTHREAD_MUTEX_INITIALIZER,
+  PTHREAD_MUTEX_INITIALIZER,
+  PTHREAD_MUTEX_INITIALIZER
+};
+
+/* Condition variable of corresponding port */
+static pthread_cond_t cond[CH438PORTNUM] =
+{
+  PTHREAD_COND_INITIALIZER,
+  PTHREAD_COND_INITIALIZER,
+  PTHREAD_COND_INITIALIZER,
+  PTHREAD_COND_INITIALIZER,
+  PTHREAD_COND_INITIALIZER,
+  PTHREAD_COND_INITIALIZER,
+  PTHREAD_COND_INITIALIZER,
+  PTHREAD_COND_INITIALIZER
+};
+
+/* This array shows whether the current serial port is selected */
+static bool const g_uart_selected[CH438PORTNUM] =
+{
+#ifdef CONFIG_CH438_EXTUART0
+  [0] = true,
+#endif
+#ifdef CONFIG_CH438_EXTUART1
+  [1] = true,
+#endif
+#ifdef CONFIG_CH438_EXTUART2
+  [2] = true,
+#endif
+#ifdef CONFIG_CH438_EXTUART3
+  [3] = true,
+#endif
+#ifdef CONFIG_CH438_EXTUART4
+  [4] = true,
+#endif
+#ifdef CONFIG_CH438_EXTUART5
+  [5] = true,
+#endif
+#ifdef CONFIG_CH438_EXTUART6
+  [6] = true,
+#endif
+#ifdef CONFIG_CH438_EXTUART7
+  [7] = true,
+#endif
+};
+
+/* ch438 Callback work queue structure */
+static struct work_s g_ch438irqwork;
+
+/* there is data available on the corresponding port */
+static volatile bool done[CH438PORTNUM] = {false,false,false,false,false,false,false,false};
+
+/* Eight port data buffer */
+static uint8_t buff[CH438PORTNUM][CH438_BUFFSIZE];
+
+/* the value of interrupt number of SSR register */
+static uint8_t Interruptnum[CH438PORTNUM] = {0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,};
+
+/* Offset address of serial port number */
+static uint8_t offsetadd[CH438PORTNUM] = {0x00,0x10,0x20,0x30,0x08,0x18,0x28,0x38,};
+
+/* port open status global variable */
+static volatile bool g_ch438open[CH438PORTNUM] = {false,false,false,false,false,false,false,false};
+
+/* Ch438 POSIX interface */
+static const struct file_operations g_ch438fops =
+{
+  ch438_open,
+  ch438_close,
+  ch438_read,
+  ch438_write,
+  NULL,
+  ch438_ioctl,
+  NULL
+};
+
+/****************************************************************************
+ * Name: getInterruptStatus
+ *
+ * Description:
+ *   thread task getInterruptStatus
+ *
+ ****************************************************************************/
+static FAR void getInterruptStatus(FAR void *arg)
+{
+    uint8_t i;
+    uint8_t gInterruptStatus;  /* Interrupt register status */
+
+    gInterruptStatus = ReadCH438Data(REG_SSR_ADDR);
+
+    if(gInterruptStatus)
+    {
+        for(i = 0; i < CH438PORTNUM; i++)
+        {
+            if(g_uart_selected[i] && (gInterruptStatus & Interruptnum[i]))
+            {
+                pthread_mutex_lock(&mutex[i]);
+                done[i] = true;
+                pthread_cond_signal(&cond[i]);
+                pthread_mutex_unlock(&mutex[i]);
+            }
+        }
+    }
+
+    work_queue(HPWORK, &g_ch438irqwork, getInterruptStatus, NULL, CH438_INCREMENT);
+}
+
+/****************************************************************************
+ * Name: Ch438SetPinMode
+ *
+ * Description:
+ *   Configure pin mode
+ *
+ * Input Parameters:
+ *   hard_io  - Hardware IO
+ *   soft_io  - Software IO mapped to
+ *   dir      - true for output, false for input
+ *
+ ****************************************************************************/
+static void ch438_io_config(void)
+{
+    k210_fpioa_config(CH438_NWR_PIN, CH438_FUNC_GPIO(FPIOA_CH438_NWR));
+    k210_fpioa_config(CH438_NRD_PIN, CH438_FUNC_GPIO(FPIOA_CH438_NRD));
+    k210_fpioa_config(CH438_ALE_PIN, CH438_FUNC_GPIO(FPIOA_CH438_ALE));
+
+    k210_fpioa_config(CH438_D0_PIN, CH438_FUNC_GPIO(FPIOA_CH438_D0));
+    k210_fpioa_config(CH438_D1_PIN, CH438_FUNC_GPIO(FPIOA_CH438_D1));
+    k210_fpioa_config(CH438_D2_PIN, CH438_FUNC_GPIO(FPIOA_CH438_D2));
+    k210_fpioa_config(CH438_D3_PIN, CH438_FUNC_GPIO(FPIOA_CH438_D3));
+    k210_fpioa_config(CH438_D4_PIN, CH438_FUNC_GPIO(FPIOA_CH438_D4));
+    k210_fpioa_config(CH438_D5_PIN, CH438_FUNC_GPIO(FPIOA_CH438_D5));
+    k210_fpioa_config(CH438_D6_PIN, CH438_FUNC_GPIO(FPIOA_CH438_D6));
+    k210_fpioa_config(CH438_D7_PIN, CH438_FUNC_GPIO(FPIOA_CH438_D7));
+}
+
+/****************************************************************************
+ * Name: CH438SetOutput
+ *
+ * Description:
+ *   Configure pin mode to output
+ *
+ ****************************************************************************/
+
+static void CH438SetOutput(void)
+{
+    k210_gpiohs_set_direction(FPIOA_CH438_D0, GPIO_DM_OUTPUT);
+	k210_gpiohs_set_direction(FPIOA_CH438_D1, GPIO_DM_OUTPUT);
+	k210_gpiohs_set_direction(FPIOA_CH438_D2, GPIO_DM_OUTPUT);
+	k210_gpiohs_set_direction(FPIOA_CH438_D3, GPIO_DM_OUTPUT);
+	k210_gpiohs_set_direction(FPIOA_CH438_D4, GPIO_DM_OUTPUT);
+	k210_gpiohs_set_direction(FPIOA_CH438_D5, GPIO_DM_OUTPUT);
+	k210_gpiohs_set_direction(FPIOA_CH438_D6, GPIO_DM_OUTPUT);
+	k210_gpiohs_set_direction(FPIOA_CH438_D7, GPIO_DM_OUTPUT);
+}
+
+/****************************************************************************
+ * Name: CH438SetInput
+ *
+ * Description:
+ *   Configure pin mode to input
+ *
+ ****************************************************************************/
+static void CH438SetInput(void)
+{
+	k210_gpiohs_set_direction(FPIOA_CH438_D0, GPIO_DM_INPUT_PULL_UP);
+	k210_gpiohs_set_direction(FPIOA_CH438_D1, GPIO_DM_INPUT_PULL_UP);
+	k210_gpiohs_set_direction(FPIOA_CH438_D2, GPIO_DM_INPUT_PULL_UP);
+	k210_gpiohs_set_direction(FPIOA_CH438_D3, GPIO_DM_INPUT_PULL_UP);
+	k210_gpiohs_set_direction(FPIOA_CH438_D4, GPIO_DM_INPUT_PULL_UP);
+	k210_gpiohs_set_direction(FPIOA_CH438_D5, GPIO_DM_INPUT_PULL_UP);
+	k210_gpiohs_set_direction(FPIOA_CH438_D6, GPIO_DM_INPUT_PULL_UP);
+	k210_gpiohs_set_direction(FPIOA_CH438_D7, GPIO_DM_INPUT_PULL_UP);
+}
+
+/****************************************************************************
+ * Name: ReadCH438Data
+ *
+ * Description:
+ *   Read data from ch438 address
+ *
+ ****************************************************************************/
+static uint8_t ReadCH438Data(uint8_t addr)
+{
+    uint8_t dat = 0;
+    k210_gpiohs_set_value(FPIOA_CH438_NWR, true);
+    k210_gpiohs_set_value(FPIOA_CH438_NRD, true);
+    k210_gpiohs_set_value(FPIOA_CH438_ALE, true);
+
+    CH438SetOutput();
+    up_udelay(1);
+    
+    if(addr &0x80)    k210_gpiohs_set_value(FPIOA_CH438_D7, true);   else    k210_gpiohs_set_value(FPIOA_CH438_D7, false);
+    if(addr &0x40)    k210_gpiohs_set_value(FPIOA_CH438_D6, true);   else    k210_gpiohs_set_value(FPIOA_CH438_D6, false);
+    if(addr &0x20)    k210_gpiohs_set_value(FPIOA_CH438_D5, true);   else    k210_gpiohs_set_value(FPIOA_CH438_D5, false);
+    if(addr &0x10)    k210_gpiohs_set_value(FPIOA_CH438_D4, true);   else    k210_gpiohs_set_value(FPIOA_CH438_D4, false);
+    if(addr &0x08)    k210_gpiohs_set_value(FPIOA_CH438_D3, true);   else    k210_gpiohs_set_value(FPIOA_CH438_D3, false);
+    if(addr &0x04)    k210_gpiohs_set_value(FPIOA_CH438_D2, true);   else    k210_gpiohs_set_value(FPIOA_CH438_D2, false);
+    if(addr &0x02)    k210_gpiohs_set_value(FPIOA_CH438_D1, true);   else    k210_gpiohs_set_value(FPIOA_CH438_D1, false);
+    if(addr &0x01)    k210_gpiohs_set_value(FPIOA_CH438_D0, true);   else    k210_gpiohs_set_value(FPIOA_CH438_D0, false);
+        
+    up_udelay(1);
+
+    k210_gpiohs_set_value(FPIOA_CH438_ALE, false);
+    up_udelay(1);        
+
+    CH438SetInput();
+    up_udelay(1);
+    
+    k210_gpiohs_set_value(FPIOA_CH438_NRD, false);
+    up_udelay(1);    
+    
+    if (k210_gpiohs_get_value(FPIOA_CH438_D7))    dat |= 0x80;
+    if (k210_gpiohs_get_value(FPIOA_CH438_D6))    dat |= 0x40;
+    if (k210_gpiohs_get_value(FPIOA_CH438_D5))    dat |= 0x20;
+    if (k210_gpiohs_get_value(FPIOA_CH438_D4))    dat |= 0x10;
+    if (k210_gpiohs_get_value(FPIOA_CH438_D3))    dat |= 0x08;
+    if (k210_gpiohs_get_value(FPIOA_CH438_D2))    dat |= 0x04;
+    if (k210_gpiohs_get_value(FPIOA_CH438_D1))    dat |= 0x02;
+    if (k210_gpiohs_get_value(FPIOA_CH438_D0))    dat |= 0x01;
+    
+    k210_gpiohs_set_value(FPIOA_CH438_NRD, true);
+    k210_gpiohs_set_value(FPIOA_CH438_ALE, true);
+    up_udelay(1);
+
+    return dat;
+}
+
+/****************************************************************************
+ * Name: WriteCH438Data
+ *
+ * Description:
+ *   write data to ch438 address
+ *
+ ****************************************************************************/
+static void WriteCH438Data(uint8_t addr, const uint8_t dat)
+{
+    k210_gpiohs_set_value(FPIOA_CH438_ALE, true);
+    k210_gpiohs_set_value(FPIOA_CH438_NRD, true);
+    k210_gpiohs_set_value(FPIOA_CH438_NWR, true);
+
+    CH438SetOutput();
+    up_udelay(1);    
+    
+    if(addr &0x80)    k210_gpiohs_set_value(FPIOA_CH438_D7, true);    else    k210_gpiohs_set_value(FPIOA_CH438_D7, false);
+    if(addr &0x40)    k210_gpiohs_set_value(FPIOA_CH438_D6, true);    else    k210_gpiohs_set_value(FPIOA_CH438_D6, false);
+    if(addr &0x20)    k210_gpiohs_set_value(FPIOA_CH438_D5, true);    else    k210_gpiohs_set_value(FPIOA_CH438_D5, false);
+    if(addr &0x10)    k210_gpiohs_set_value(FPIOA_CH438_D4, true);    else    k210_gpiohs_set_value(FPIOA_CH438_D4, false);
+    if(addr &0x08)    k210_gpiohs_set_value(FPIOA_CH438_D3, true);    else    k210_gpiohs_set_value(FPIOA_CH438_D3, false);
+    if(addr &0x04)    k210_gpiohs_set_value(FPIOA_CH438_D2, true);    else    k210_gpiohs_set_value(FPIOA_CH438_D2, false);
+    if(addr &0x02)    k210_gpiohs_set_value(FPIOA_CH438_D1, true);    else    k210_gpiohs_set_value(FPIOA_CH438_D1, false);
+    if(addr &0x01)    k210_gpiohs_set_value(FPIOA_CH438_D0, true);    else    k210_gpiohs_set_value(FPIOA_CH438_D0, false);
+
+    up_udelay(1);    
+    
+    k210_gpiohs_set_value(FPIOA_CH438_ALE, false);
+    up_udelay(1);
+
+    if(dat &0x80)    k210_gpiohs_set_value(FPIOA_CH438_D7, true);    else    k210_gpiohs_set_value(FPIOA_CH438_D7, false);
+    if(dat &0x40)    k210_gpiohs_set_value(FPIOA_CH438_D6, true);    else    k210_gpiohs_set_value(FPIOA_CH438_D6, false);
+    if(dat &0x20)    k210_gpiohs_set_value(FPIOA_CH438_D5, true);    else    k210_gpiohs_set_value(FPIOA_CH438_D5, false);
+    if(dat &0x10)    k210_gpiohs_set_value(FPIOA_CH438_D4, true);    else    k210_gpiohs_set_value(FPIOA_CH438_D4, false);
+    if(dat &0x08)    k210_gpiohs_set_value(FPIOA_CH438_D3, true);    else    k210_gpiohs_set_value(FPIOA_CH438_D3, false);
+    if(dat &0x04)    k210_gpiohs_set_value(FPIOA_CH438_D2, true);    else    k210_gpiohs_set_value(FPIOA_CH438_D2, false);
+    if(dat &0x02)    k210_gpiohs_set_value(FPIOA_CH438_D1, true);    else    k210_gpiohs_set_value(FPIOA_CH438_D1, false);
+    if(dat &0x01)    k210_gpiohs_set_value(FPIOA_CH438_D0, true);    else    k210_gpiohs_set_value(FPIOA_CH438_D0, false);
+    
+    up_udelay(1);    
+
+    k210_gpiohs_set_value(FPIOA_CH438_NWR, false);
+    up_udelay(1);    
+    
+    k210_gpiohs_set_value(FPIOA_CH438_NWR, true);
+    k210_gpiohs_set_value(FPIOA_CH438_ALE, true);
+    up_udelay(1);    
+
+    CH438SetInput();
+
+    return;
+}
+
+/****************************************************************************
+ * Name: WriteCH438Block
+ *
+ * Description:
+ *   Write data block from ch438 address
+ *
+ ****************************************************************************/
+static void WriteCH438Block(uint8_t mAddr, uint8_t mLen, const uint8_t *mBuf)
+{
+    while(mLen--)
+        WriteCH438Data(mAddr, *mBuf++);
+}
+
+/****************************************************************************
+ * Name: CH438UARTSend
+ *
+ * Description:
+ *   Enable FIFO mode, which is used for ch438 serial port to send multi byte data,
+ *   with a maximum of 128 bytes of data sent at a time
+ *
+ ****************************************************************************/
+static void Ch438UartSend(uint8_t ext_uart_no, const uint8_t *Data, uint16_t Num)
+{
+    uint8_t REG_LSR_ADDR,REG_THR_ADDR;
+    REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR;
+    REG_THR_ADDR = offsetadd[ext_uart_no] | REG_THR0_ADDR;
+    
+    while(1)
+    {
+        while((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_TEMT) == 0); /* wait for sending data done, THR and TSR is NULL */
+        if(Num <= 128)
+        {
+            WriteCH438Block(REG_THR_ADDR, Num, Data);
+            break;
+        }
+        else
+        {
+            WriteCH438Block(REG_THR_ADDR, 128, Data);
+            Num -= 128;
+            Data += 128;
+        }
+    }
+}
+
+/****************************************************************************
+ * Name: CH438UARTRcv
+ *
+ * Description:
+ *   Disable FIFO mode for ch438 serial port to receive multi byte data
+ *
+ ****************************************************************************/
+uint8_t CH438UARTRcv(uint8_t ext_uart_no, uint8_t *buf, size_t size)
+{
+    uint8_t rcv_num = 0;
+    uint8_t dat = 0;
+    uint8_t REG_LSR_ADDR,REG_RBR_ADDR;
+    uint8_t *read_buffer;
+    size_t buffer_index = 0;
+
+    read_buffer = buf;
+
+    REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR;
+    REG_RBR_ADDR = offsetadd[ext_uart_no] | REG_RBR0_ADDR;
+
+    /* Wait for the data to be ready */	
+    while ((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_DATARDY) == 0);
+
+    while (((ReadCH438Data(REG_LSR_ADDR) & BIT_LSR_DATARDY) == 0x01) && (size != 0))
+    {
+        dat = ReadCH438Data(REG_RBR_ADDR);
+        *read_buffer = dat;
+        read_buffer++;
+        buffer_index++;
+        if (255 == buffer_index) {
+            buffer_index = 0;
+            read_buffer = buf;
+        }
+
+        ++rcv_num;
+        --size;
+    }
+
+    return rcv_num;
+}
+
+/****************************************************************************
+ * Name: K210CH438Init
+ *
+ * Description:
+ *   ch438 initialization
+ *
+ ****************************************************************************/
+static void K210CH438Init(void)
+{
+    CH438SetOutput();
+    k210_gpiohs_set_direction(FPIOA_CH438_NWR, GPIO_DM_OUTPUT);
+    k210_gpiohs_set_direction(FPIOA_CH438_NRD, GPIO_DM_OUTPUT);
+    k210_gpiohs_set_direction(FPIOA_CH438_ALE, GPIO_DM_OUTPUT);
+    
+    k210_gpiohs_set_value(FPIOA_CH438_NWR, true);
+    k210_gpiohs_set_value(FPIOA_CH438_NRD, true);
+    k210_gpiohs_set_value(FPIOA_CH438_ALE, true);
+}
+
+/****************************************************************************
+ * Name: CH438PortInit
+ *
+ * Description:
+ *   ch438 port initialization
+ *
+ ****************************************************************************/
+static void CH438PortInit(uint8_t ext_uart_no, uint32_t baud_rate)
+{
+    uint32_t div;
+    uint8_t DLL,DLM,dlab;
+    uint8_t REG_LCR_ADDR;
+    uint8_t REG_DLL_ADDR;
+    uint8_t REG_DLM_ADDR;
+    uint8_t REG_IER_ADDR;
+    uint8_t REG_MCR_ADDR;
+    uint8_t REG_FCR_ADDR;
+
+    REG_LCR_ADDR = offsetadd[ext_uart_no] | REG_LCR0_ADDR;
+    REG_DLL_ADDR = offsetadd[ext_uart_no] | REG_DLL0_ADDR;
+    REG_DLM_ADDR = offsetadd[ext_uart_no] | REG_DLM0_ADDR;
+    REG_IER_ADDR = offsetadd[ext_uart_no] | REG_IER0_ADDR;
+    REG_MCR_ADDR = offsetadd[ext_uart_no] | REG_MCR0_ADDR;
+    REG_FCR_ADDR = offsetadd[ext_uart_no] | REG_FCR0_ADDR;
+
+    /* reset the uart */
+    WriteCH438Data(REG_IER_ADDR, BIT_IER_RESET); 
+    up_mdelay(50);
+
+    dlab = ReadCH438Data(REG_IER_ADDR);
+    dlab &= 0xDF;
+    WriteCH438Data(REG_IER_ADDR, dlab);
+    
+    /* set LCR register DLAB bit 1 */
+    dlab = ReadCH438Data(REG_LCR_ADDR);
+    dlab |= 0x80;
+    WriteCH438Data(REG_LCR_ADDR, dlab);
+
+    div = (Fpclk >> 4) / baud_rate;
+    DLM = div >> 8;
+    DLL = div & 0xff;
+
+    /* set bps */
+    WriteCH438Data(REG_DLL_ADDR, DLL);
+    WriteCH438Data(REG_DLM_ADDR, DLM);
+
+    /* set FIFO mode, 112 bytes */
+    WriteCH438Data(REG_FCR_ADDR, BIT_FCR_RECVTG1 | BIT_FCR_RECVTG0 | BIT_FCR_FIFOEN);
+
+    /* 8 bit word size, 1 bit stop bit, no crc */
+    WriteCH438Data(REG_LCR_ADDR, BIT_LCR_WORDSZ1 | BIT_LCR_WORDSZ0);
+
+    /* enable interrupt */
+    WriteCH438Data(REG_IER_ADDR, BIT_IER_IERECV);
+
+    /* allow interrupt output, DTR and RTS is 1 */
+    WriteCH438Data(REG_MCR_ADDR, BIT_MCR_OUT2);
+
+    /* release the data in FIFO */
+    WriteCH438Data(REG_FCR_ADDR, ReadCH438Data(REG_FCR_ADDR)| BIT_FCR_TFIFORST);
+}
+
+/****************************************************************************
+ * Name: K210Ch438ReadData
+ *
+ * Description:
+ *   Read data from ch438 port
+ *
+ ****************************************************************************/
+static int K210Ch438WriteData(uint8_t ext_uart_no, const uint8_t *write_buffer, size_t size)
+{
+    int write_len, write_len_continue;
+    int i, write_index;
+    DEBUGASSERT(write_buffer != NULL);
+
+    write_len = size;
+    write_len_continue = size;
+
+    if(write_len > 256) 
+    {
+        if(0 == write_len % 256) 
+        {
+            write_index = write_len / 256;
+            for(i = 0; i < write_index; i ++) 
+            {
+                Ch438UartSend(ext_uart_no, write_buffer + i * 256, 256);
+            }
+        }
+        else
+        {
+            write_index = 0;
+            while(write_len_continue > 256) 
+            {
+                Ch438UartSend(ext_uart_no, write_buffer + write_index * 256, 256);
+                write_index++;
+                write_len_continue = write_len - write_index * 256;
+            }
+            Ch438UartSend(ext_uart_no, write_buffer + write_index * 256, write_len_continue);
+        }
+    } 
+    else
+    {
+        Ch438UartSend(ext_uart_no, write_buffer, write_len);
+    }
+
+    return OK;
+}
+
+/****************************************************************************
+ * Name: K210Ch438ReadData
+ *
+ * Description:
+ *   Read data from ch438 port
+ *
+ ****************************************************************************/
+static size_t K210Ch438ReadData(uint8_t ext_uart_no, size_t size)
+{
+    size_t RevLen = 0;
+    uint8_t InterruptStatus;
+    uint8_t REG_IIR_ADDR;
+    uint8_t REG_LSR_ADDR;
+    uint8_t REG_MSR_ADDR;
+
+    pthread_mutex_lock(&mutex[ext_uart_no]);
+    while(done[ext_uart_no] == false)
+        pthread_cond_wait(&cond[ext_uart_no], &mutex[ext_uart_no]);
+    if(done[ext_uart_no] == true)
+    {
+        REG_IIR_ADDR = offsetadd[ext_uart_no] | REG_IIR0_ADDR;
+        REG_LSR_ADDR = offsetadd[ext_uart_no] | REG_LSR0_ADDR;
+        REG_MSR_ADDR = offsetadd[ext_uart_no] | REG_MSR0_ADDR;
+        /* Read the interrupt status of the serial port */
+        InterruptStatus = ReadCH438Data(REG_IIR_ADDR) & 0x0f;
+        ch438info("InterruptStatus is %d\n", InterruptStatus);
+
+        switch(InterruptStatus)
+        {
+            case INT_NOINT:            /* no interrupt */
+                break;
+            case INT_THR_EMPTY:        /* the transmit hold register is not interrupted */
+                break;
+            case INT_RCV_OVERTIME:     /* receive data timeout interrupt */
+            case INT_RCV_SUCCESS:      /* receive data available interrupt */
+                RevLen = CH438UARTRcv(ext_uart_no, buff[ext_uart_no], size);
+                break;
+            case INT_RCV_LINES:       /* receive line status interrupt */
+                ReadCH438Data(REG_LSR_ADDR);
+                break;
+            case INT_MODEM_CHANGE:    /* modem input change interrupt */
+                ReadCH438Data(REG_MSR_ADDR);
+                break;
+            default:
+                break;
+        }
+        done[ext_uart_no]  = false;
+    }
+    pthread_mutex_unlock(&mutex[ext_uart_no]);
+
+    return RevLen;
+}
+
+/****************************************************************************
+ * Name: Ch438InitDefault
+ *
+ * Description:
+ *   Ch438 default initialization function
+ *
+ ****************************************************************************/
+static void Ch438InitDefault(void)
+{ 
+    int ret = 0;
+    int i;
+
+    /* Initialize the mutex */
+    for(i = 0; i < CH438PORTNUM; i++)
+    {
+        if(!g_uart_selected[i])
+        {
+            continue;
+        }
+        
+        ret = pthread_mutex_init(&mutex[i], NULL);
+        if(ret != 0)
+        {
+            ch438err("pthread_mutex_init failed, status=%d\n", ret);
+        }
+    }
+
+    /* Initialize the condition variable */
+    for(i = 0; i < CH438PORTNUM; i++)
+    {
+        if(!g_uart_selected[i])
+        {
+            continue;
+        }
+        
+        ret = pthread_cond_init(&cond[i], NULL);
+        if(ret != 0)
+        {
+            ch438err("pthread_cond_init failed, status=%d\n", ret);
+        }
+    }
+
+    ch438_io_config();
+    K210CH438Init();
+
+/* If a port is checked, the port will be initialized. Otherwise, the interrupt of the port will be disabled. */
+
+#ifdef CONFIG_CH438_EXTUART0
+    CH438PortInit(0, CONFIG_CH438_EXTUART0_BAUD);
+#else
+    WriteCH438Data(REG_IER0_ADDR, 0x00);
+#endif
+
+#ifdef CONFIG_CH438_EXTUART1
+    CH438PortInit(1, CONFIG_CH438_EXTUART1_BAUD);
+#else
+    WriteCH438Data(REG_IER1_ADDR, 0x00);
+#endif
+
+#ifdef CONFIG_CH438_EXTUART2
+    CH438PortInit(2, CONFIG_CH438_EXTUART2_BAUD);
+#else
+    WriteCH438Data(REG_IER2_ADDR, 0x00);
+#endif
+
+#ifdef CONFIG_CH438_EXTUART3
+    CH438PortInit(3, CONFIG_CH438_EXTUART3_BAUD);
+#else
+    WriteCH438Data(REG_IER3_ADDR, 0x00);
+#endif
+
+#ifdef CONFIG_CH438_EXTUART4
+    CH438PortInit(4, CONFIG_CH438_EXTUART4_BAUD);
+#else
+    WriteCH438Data(REG_IER4_ADDR, 0x00);
+#endif
+
+#ifdef CONFIG_CH438_EXTUART5
+    CH438PortInit(5, CONFIG_CH438_EXTUART5_BAUD);
+#else
+    WriteCH438Data(REG_IER5_ADDR, 0x00);
+#endif
+
+#ifdef CONFIG_CH438_EXTUART6
+    CH438PortInit(6, CONFIG_CH438_EXTUART6_BAUD);
+#else
+    WriteCH438Data(REG_IER6_ADDR, 0x00);
+#endif
+
+#ifdef CONFIG_CH438_EXTUART7
+    CH438PortInit(7, CONFIG_CH438_EXTUART7_BAUD);
+#else
+    WriteCH438Data(REG_IER7_ADDR, 0x00);
+#endif
+
+    up_mdelay(10);
+
+    work_queue(HPWORK, &g_ch438irqwork, getInterruptStatus, NULL, CH438_INCREMENT);
+}
+
+/****************************************************************************
+ * Name: ch438_open
+ ****************************************************************************/
+static int ch438_open(FAR struct file *filep)
+{
+    FAR struct inode *inode = filep->f_inode;
+    FAR struct ch438_dev_s *priv = inode->i_private;
+    uint8_t port = priv->port;
+    int ret = OK;
+
+    DEBUGASSERT(port >= 0 && port < CH438PORTNUM);
+
+    ret = nxsem_wait_uninterruptible(&priv->devsem);
+    if (ret < 0)
+    {
+        return ret;
+    }
+
+    if(g_ch438open[port])
+    {
+        ch438err("ERROR: ch438 port %d is opened!\n",port);
+        return -EBUSY;
+    }
+    g_ch438open[port] = true;
+
+    nxsem_post(&priv->devsem);
+
+    return ret;
+}
+
+/****************************************************************************
+ * Name: ch438_close
+ ****************************************************************************/
+static int ch438_close(FAR struct file *filep)
+{
+    FAR struct inode *inode = filep->f_inode;
+    FAR struct ch438_dev_s *priv = inode->i_private;
+    uint8_t port = priv->port;
+    int ret = OK;
+
+    DEBUGASSERT(port >= 0 && port < CH438PORTNUM);
+
+    ret = nxsem_wait_uninterruptible(&priv->devsem);
+    if (ret < 0)
+    {
+        return ret;
+    }
+
+    if(!g_ch438open[port])
+    {
+        ch438err("ERROR: ch438 port %d is closed!\n",port);
+        return -EBUSY;
+    }
+    g_ch438open[port] = false;
+
+    nxsem_post(&priv->devsem);
+    return ret;
+}
+
+/****************************************************************************
+ * Name: ch438_read
+ ****************************************************************************/
+static ssize_t ch438_read(FAR struct file *filep, FAR char *buffer, size_t buflen)
+{
+    size_t length = 0;
+    FAR struct inode *inode = filep->f_inode;
+    FAR struct ch438_dev_s *priv = inode->i_private;
+    uint8_t port = priv->port;
+
+    DEBUGASSERT(port >= 0 && port < CH438PORTNUM);
+
+    length = K210Ch438ReadData(port, buflen);
+    memcpy(buffer, buff[port], length);
+
+    if(length > buflen)
+    {
+        length = buflen;
+    }
+
+    return length;
+}
+
+/****************************************************************************
+ * Name: ch438_write
+ ****************************************************************************/
+static ssize_t ch438_write(FAR struct file *filep, FAR const char *buffer, size_t buflen)
+{
+    FAR struct inode *inode = filep->f_inode;
+    FAR struct ch438_dev_s *priv = inode->i_private;
+    uint8_t port = priv->port;
+
+    DEBUGASSERT(port >= 0 && port < CH438PORTNUM);
+
+    K210Ch438WriteData(port, (const uint8_t *)buffer, buflen);
+    
+    return buflen;
+}
+
+/****************************************************************************
+ * Name: ch438_ioctl
+ ****************************************************************************/
+static int ch438_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
+{
+    FAR struct inode *inode = filep->f_inode;
+    FAR struct ch438_dev_s *priv = inode->i_private;
+    uint8_t port = priv->port;
+    int ret = OK;
+
+    DEBUGASSERT(port >= 0 && port < CH438PORTNUM);
+
+    switch(cmd)
+    {
+        case OPE_INT:
+        case OPE_CFG:
+            CH438PortInit(port, (uint32_t)arg);
+            break;
+
+        default:
+            ch438info("Unrecognized cmd: %d\n", cmd);
+            ret = -ENOTTY;
+            break;
+    }
+    return ret;
+}
+
+
+/****************************************************************************
+ * Name: ch438_register
+ *
+ * Description:
+ *   Register /dev/ext_uartN
+ *
+ ****************************************************************************/
+static int ch438_register(FAR const char *devpath, uint8_t port)
+{
+    FAR struct ch438_dev_s *priv;
+    int ret = 0;
+
+    /* port number check */
+    DEBUGASSERT(port >= 0 && port < CH438PORTNUM);
+
+    priv = (FAR struct ch438_dev_s *)kmm_malloc(sizeof(struct ch438_dev_s));
+    if(priv == NULL)
+    {
+        ch438err("ERROR: Failed to allocate instance\n");
+        return -ENOMEM;
+    }
+
+    priv->port = port;
+    nxsem_init(&priv->devsem, 0, 1);
+
+    /* Register the character driver */
+    ret = register_driver(devpath, &g_ch438fops, 0666, priv);
+    if(ret < 0)
+    {
+        kmm_free(priv);
+    }
+    
+    return ret;
+}
+
+/****************************************************************************
+ * Name: board_ch438_initialize
+ *
+ * Description:
+ *   ch438 initialize
+ *
+ ****************************************************************************/
+void board_ch438_initialize(void)
+{
+    Ch438InitDefault();
+
+#ifdef CONFIG_CH438_EXTUART0
+    ch438_register("/dev/extuart_dev0", 0);
+#endif
+
+#ifdef CONFIG_CH438_EXTUART1
+    ch438_register("/dev/extuart_dev1", 1);
+#endif
+
+#ifdef CONFIG_CH438_EXTUART2
+    ch438_register("/dev/extuart_dev2", 2);
+#endif
+
+#ifdef CONFIG_CH438_EXTUART3
+    ch438_register("/dev/extuart_dev3", 3);
+#endif
+
+#ifdef CONFIG_CH438_EXTUART4
+    ch438_register("/dev/extuart_dev4", 4);
+#endif
+
+#ifdef CONFIG_CH438_EXTUART5
+    ch438_register("/dev/extuart_dev5", 5);
+#endif
+
+#ifdef CONFIG_CH438_EXTUART6
+    ch438_register("/dev/extuart_dev6", 6);
+#endif
+
+#ifdef CONFIG_CH438_EXTUART7
+    ch438_register("/dev/extuart_dev7", 7);
+#endif
+}
\ No newline at end of file
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/k210_ch438.h b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/k210_ch438.h
new file mode 100644
index 000000000..f952320e8
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/k210_ch438.h
@@ -0,0 +1,358 @@
+/*
+* Copyright (c) 2020 AIIT XUOS Lab
+* XiOS is licensed under Mulan PSL v2.
+* You can use this software according to the terms and conditions of the Mulan PSL v2.
+* You may obtain a copy of Mulan PSL v2 at:
+*        http://license.coscl.org.cn/MulanPSL2
+* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+* See the Mulan PSL v2 for more details.
+*/
+
+/**
+ * @file k210_ch438.h
+ * @brief xidatong-riscv64 k210_ch438.h
+ * @version 1.0
+ * @author AIIT XUOS Lab
+ * @date 2022.04.26
+ */
+
+#ifndef __BOARDS_ARM_IMXRT_XIDATONG_SRC_IMXRT_CH438_H
+#define __BOARDS_ARM_IMXRT_XIDATONG_SRC_IMXRT_CH438_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+#include <nuttx/config.h>
+#include <nuttx/kmalloc.h>
+#include <nuttx/arch.h>
+#include <nuttx/irq.h>
+#include <nuttx/pthread.h>
+#include <nuttx/semaphore.h>
+#include <nuttx/wqueue.h>
+#include <nuttx/wdog.h>
+#include <nuttx/clock.h>
+#include <nuttx/time.h>
+#include <nuttx/fs/fs.h>
+#include <nuttx/fs/ioctl.h>
+
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <sys/ioctl.h>
+#include <errno.h>
+#include <stddef.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <sched.h>
+#include <debug.h>
+#include <assert.h>
+#include <unistd.h>
+#include <stdbool.h>
+#include <string.h>
+#include <stdlib.h>
+#include <fcntl.h>
+
+#include <arch/board/board.h>
+#include "riscv_internal.h"
+
+#include "k210_config.h"
+#include "k210_fpioa.h"
+#include "k210_gpiohs.h"
+#include "xidatong-riscv64.h"
+
+/******************************************************************************************/
+
+/* chip definition */
+/* CH438serial port0 register address */
+
+#define REG_RBR0_ADDR        0x00      /* serial port0receive buffer register address */
+#define REG_THR0_ADDR        0x00      /* serial port0send hold register address */
+#define REG_IER0_ADDR        0x01      /* serial port0interrupt enable register address */
+#define REG_IIR0_ADDR        0x02      /* serial port0interrupt identifies register address */
+#define REG_FCR0_ADDR        0x02      /* serial port0FIFO controls register address */
+#define REG_LCR0_ADDR        0x03      /* serial port0circuit control register address */
+#define REG_MCR0_ADDR        0x04      /* serial port0MODEM controls register address */
+#define REG_LSR0_ADDR        0x05      /* serial port0line status register address */
+#define REG_MSR0_ADDR        0x06      /* serial port0address of MODEM status register */
+#define REG_SCR0_ADDR        0x07      /* serial port0the user can define the register address */
+#define REG_DLL0_ADDR        0x00      /* Baud rate divisor latch low 8-bit byte address */
+#define REG_DLM0_ADDR        0x01      /* Baud rate divisor latch high 8-bit byte address */
+
+
+/* CH438serial port1 register address */
+
+#define REG_RBR1_ADDR       0x10      /* serial port1receive buffer register address */
+#define REG_THR1_ADDR       0x10      /* serial port1send hold register address */
+#define REG_IER1_ADDR       0x11      /* serial port1interrupt enable register address */
+#define REG_IIR1_ADDR       0x12      /* serial port1interrupt identifies register address */
+#define REG_FCR1_ADDR       0x12      /* serial port1FIFO controls register address */
+#define REG_LCR1_ADDR       0x13      /* serial port1circuit control register address */
+#define REG_MCR1_ADDR       0x14      /* serial port1MODEM controls register address */
+#define REG_LSR1_ADDR       0x15      /* serial port1line status register address */
+#define REG_MSR1_ADDR       0x16      /* serial port1address of MODEM status register */
+#define REG_SCR1_ADDR       0x17      /* serial port1the user can define the register address */
+#define REG_DLL1_ADDR       0x10      /* Baud rate divisor latch low 8-bit byte address */
+#define REG_DLM1_ADDR       0x11      /* Baud rate divisor latch high 8-bit byte address */
+
+
+/* CH438serial port2 register address */
+
+#define REG_RBR2_ADDR       0x20      /* serial port2receive buffer register address */
+#define REG_THR2_ADDR       0x20      /* serial port2send hold register address */
+#define REG_IER2_ADDR       0x21      /* serial port2interrupt enable register address */
+#define REG_IIR2_ADDR       0x22      /* serial port2interrupt identifies register address */
+#define REG_FCR2_ADDR       0x22      /* serial port2FIFO controls register address */
+#define REG_LCR2_ADDR       0x23      /* serial port2circuit control register address */
+#define REG_MCR2_ADDR       0x24      /* serial port2MODEM controls register address */
+#define REG_LSR2_ADDR       0x25      /* serial port2line status register address */
+#define REG_MSR2_ADDR       0x26      /* serial port2address of MODEM status register */
+#define REG_SCR2_ADDR       0x27      /* serial port2the user can define the register address */
+#define REG_DLL2_ADDR       0x20      /* Baud rate divisor latch low 8-bit byte address */
+#define REG_DLM2_ADDR       0x21      /* Baud rate divisor latch high 8-bit byte address */
+
+
+/* CH438serial port3 register address */
+
+#define REG_RBR3_ADDR       0x30      /* serial port3receive buffer register address */
+#define REG_THR3_ADDR       0x30      /* serial port3send hold register address */
+#define REG_IER3_ADDR       0x31      /* serial port3interrupt enable register address */
+#define REG_IIR3_ADDR       0x32      /* serial port3interrupt identifies register address */
+#define REG_FCR3_ADDR       0x32      /* serial port3FIFO controls register address */
+#define REG_LCR3_ADDR       0x33      /* serial port3circuit control register address */
+#define REG_MCR3_ADDR       0x34      /* serial port3MODEM controls register address */
+#define REG_LSR3_ADDR       0x35      /* serial port3line status register address */
+#define REG_MSR3_ADDR       0x36      /* serial port3address of MODEM status register */
+#define REG_SCR3_ADDR       0x37      /* serial port3the user can define the register address */
+#define REG_DLL3_ADDR       0x30      /* Baud rate divisor latch low 8-bit byte address */
+#define REG_DLM3_ADDR       0x31      /* Baud rate divisor latch high 8-bit byte address */
+
+
+/* CH438serial port4 register address */
+
+#define REG_RBR4_ADDR       0x08      /* serial port4receive buffer register address */
+#define REG_THR4_ADDR       0x08      /* serial port4send hold register address */
+#define REG_IER4_ADDR       0x09      /* serial port4interrupt enable register address */
+#define REG_IIR4_ADDR       0x0A      /* serial port4interrupt identifies register address */
+#define REG_FCR4_ADDR       0x0A      /* serial port4FIFO controls register address */
+#define REG_LCR4_ADDR       0x0B      /* serial port4circuit control register address */
+#define REG_MCR4_ADDR       0x0C      /* serial port4MODEM controls register address */
+#define REG_LSR4_ADDR       0x0D      /* serial port4line status register address */
+#define REG_MSR4_ADDR       0x0E      /* serial port4address of MODEM status register */
+#define REG_SCR4_ADDR       0x0F      /* serial port4the user can define the register address */
+#define REG_DLL4_ADDR       0x08      /* Baud rate divisor latch low 8-bit byte address */
+#define REG_DLM4_ADDR       0x09      /* Baud rate divisor latch high 8-bit byte address */
+
+
+/* CH438serial port5 register address */
+
+#define REG_RBR5_ADDR       0x18      /* serial port5receive buffer register address */
+#define REG_THR5_ADDR       0x18      /* serial port5send hold register address */
+#define REG_IER5_ADDR       0x19      /* serial port5interrupt enable register address */
+#define REG_IIR5_ADDR       0x1A      /* serial port5interrupt identifies register address */
+#define REG_FCR5_ADDR       0x1A      /* serial port5FIFO controls register address */
+#define REG_LCR5_ADDR       0x1B      /* serial port5circuit control register address */
+#define REG_MCR5_ADDR       0x1C      /* serial port5MODEM controls register address */
+#define REG_LSR5_ADDR       0x1D      /* serial port5line status register address */
+#define REG_MSR5_ADDR       0x1E      /* serial port5address of MODEM status register */
+#define REG_SCR5_ADDR       0x1F      /* serial port5the user can define the register address */
+#define REG_DLL5_ADDR       0x18      /* Baud rate divisor latch low 8-bit byte address */
+#define REG_DLM5_ADDR       0x19      /* Baud rate divisor latch high 8-bit byte address */
+
+
+/* CH438serial port6 register address */
+
+#define REG_RBR6_ADDR       0x28      /* serial port6receive buffer register address */
+#define REG_THR6_ADDR       0x28      /* serial port6send hold register address */
+#define REG_IER6_ADDR       0x29      /* serial port6interrupt enable register address */
+#define REG_IIR6_ADDR       0x2A      /* serial port6interrupt identifies register address */
+#define REG_FCR6_ADDR       0x2A      /* serial port6FIFO controls register address */
+#define REG_LCR6_ADDR       0x2B      /* serial port6circuit control register address */
+#define REG_MCR6_ADDR       0x2C      /* serial port6MODEM controls register address */
+#define REG_LSR6_ADDR       0x2D      /* serial port6line status register address */
+#define REG_MSR6_ADDR       0x2E      /* serial port6address of MODEM status register */
+#define REG_SCR6_ADDR       0x2F      /* serial port6the user can define the register address */
+#define REG_DLL6_ADDR       0x28      /* Baud rate divisor latch low 8-bit byte address */
+#define REG_DLM6_ADDR       0x29      /* Baud rate divisor latch high 8-bit byte address */
+
+
+/* CH438serial port7 register address */
+
+#define REG_RBR7_ADDR       0x38      /* serial port7receive buffer register address */
+#define REG_THR7_ADDR       0x38      /* serial port7send hold register address */
+#define REG_IER7_ADDR       0x39      /* serial port7interrupt enable register address */
+#define REG_IIR7_ADDR       0x3A      /* serial port7interrupt identifies register address */
+#define REG_FCR7_ADDR       0x3A      /* serial port7FIFO controls register address */
+#define REG_LCR7_ADDR       0x3B      /* serial port7circuit control register address */
+#define REG_MCR7_ADDR       0x3C      /* serial port7MODEM controls register address */
+#define REG_LSR7_ADDR       0x3D      /* serial port7line status register address */
+#define REG_MSR7_ADDR       0x3E      /* serial port7address of MODEM status register */
+#define REG_SCR7_ADDR       0x3F      /* serial port7the user can define the register address */
+#define REG_DLL7_ADDR       0x38      /* Baud rate divisor latch low 8-bit byte address */
+#define REG_DLM7_ADDR       0x39      /* Baud rate divisor latch high 8-bit byte address */
+
+
+#define REG_SSR_ADDR        0x4F       /* pecial status register address */
+
+
+/* IER register bit */
+
+#define BIT_IER_RESET       0x80      /* The bit is 1 soft reset serial port */
+#define BIT_IER_LOWPOWER    0x40      /* The bit is 1 close serial port internal reference clock */
+#define BIT_IER_SLP         0x20      /* serial port0 is SLP, 1 close clock vibrator  */
+#define BIT_IER1_CK2X       0x20      /* serial port1 is CK2X, 1 force the external clock signal after 2 times as internal */
+#define BIT_IER_IEMODEM     0x08      /* The bit is 1 allows MODEM input status to interrupt */
+#define BIT_IER_IELINES     0x04      /* The bit is 1 allow receiving line status to be interrupted */
+#define BIT_IER_IETHRE      0x02      /* The bit is 1 allows the send hold register to break in mid-air */
+#define BIT_IER_IERECV      0x01      /* The bit is 1 allows receiving data interrupts */
+
+/* IIR register bit */
+
+#define BIT_IIR_FIFOENS1    0x80
+#define BIT_IIR_FIFOENS0    0x40      /* The two is 1 said use FIFO */
+
+/* Interrupt type: 0001 has no interrupt, 0110 receiving line status is interrupted, 0100 receiving data can be interrupted,
+1100 received data timeout interrupt, 0010THR register air interrupt, 0000MODEM input change interrupt */
+#define BIT_IIR_IID3        0x08
+#define BIT_IIR_IID2        0x04
+#define BIT_IIR_IID1        0x02
+#define BIT_IIR_NOINT       0x01
+
+/* FCR register bit */
+
+/* Trigger point: 00 corresponds to 1 byte, 01 corresponds to 16 bytes, 10 corresponds to 64 bytes, 11 corresponds to 112 bytes */
+#define BIT_FCR_RECVTG1     0x80      /* Set the trigger point for FIFO interruption and automatic hardware flow control */
+#define BIT_FCR_RECVTG0     0x40      /* Set the trigger point for FIFO interruption and automatic hardware flow control */
+                                      
+#define BIT_FCR_TFIFORST    0x04      /* The bit is 1 empty the data sent in FIFO */
+#define BIT_FCR_RFIFORST    0x02      /* The bit is 1 empty the data sent in FIFO */
+#define BIT_FCR_FIFOEN      0x01      /* The bit is 1 use FIFO, 0 disable FIFO */
+
+/* LCR register bit */
+
+#define BIT_LCR_DLAB        0x80      /* To access DLL, DLM, 0 to access RBR/THR/IER */
+#define BIT_LCR_BREAKEN     0x40      /* 1 forces a BREAK line interval*/
+
+/* Set the check format: when PAREN is 1, 00 odd check, 01 even check, 10 MARK (set 1), 11 blank (SPACE, clear 0) */
+#define BIT_LCR_PARMODE1    0x20      /* Sets the parity bit format */
+#define BIT_LCR_PARMODE0    0x10      /* Sets the parity bit format */
+                                      
+#define BIT_LCR_PAREN       0x08      /* A value of 1 allows you to generate and receive parity bits when sending */
+#define BIT_LCR_STOPBIT     0x04      /* If is 1, then two stop bits, is 0, a stop bit */
+
+/* Set word length: 00 for 5 data bits, 01 for 6 data bits, 10 for 7 data bits and 11 for 8 data bits */
+#define BIT_LCR_WORDSZ1     0x02      /* Set the word length length */
+#define BIT_LCR_WORDSZ0     0x01
+
+/* MCR register bit */
+
+#define BIT_MCR_AFE         0x20      /* For 1 allows automatic flow control of CTS and RTS hardware */
+#define BIT_MCR_LOOP        0x10      /* Is the test mode of 1 enabling internal loop */
+#define BIT_MCR_OUT2        0x08      /* 1 Allows an interrupt request for the serial port output  */
+#define BIT_MCR_OUT1        0x04      /* The MODEM control bit defined for the user */
+#define BIT_MCR_RTS         0x02      /* The bit is 1 RTS pin  output  effective  */
+#define BIT_MCR_DTR         0x01      /* The bit is 1 DTR pin  output  effective  */
+
+/* LSR register bit */
+
+#define BIT_LSR_RFIFOERR    0x80      /* 1 said There is at least one error in receiving FIFO */
+#define BIT_LSR_TEMT        0x40      /* 1 said THR and TSR are empty */
+#define BIT_LSR_THRE        0x20      /* 1 said THR is empty*/
+#define BIT_LSR_BREAKINT    0x10      /* The bit is 1 said the BREAK line interval was detected*/
+#define BIT_LSR_FRAMEERR    0x08      /* The bit is 1 said error reading data frame */
+#define BIT_LSR_PARERR      0x04      /* The bit is 1 said parity error */
+#define BIT_LSR_OVERR       0x02      /*  1 said receive FIFO buffer overflow */
+#define BIT_LSR_DATARDY     0x01      /* The bit is 1 said receive data received in FIFO */
+
+/* MSR register bit */
+
+#define BIT_MSR_DCD         0x80      /* The bit is 1 said DCD pin  effective  */
+#define BIT_MSR_RI          0x40      /* The bit is 1 said RI pin  effective  */
+#define BIT_MSR_DSR         0x20      /* The bit is 1 said DSR pin  effective  */
+#define BIT_MSR_CTS         0x10      /* The bit is 1 said CTS pin  effective  */
+#define BIT_MSR_DDCD        0x08      /* The bit is 1 said DCD pin The input state has changed */
+#define BIT_MSR_TERI        0x04      /* The bit is 1 said RI pin The input state has changed */
+#define BIT_MSR_DDSR        0x02      /* The bit is 1 said DSR pin The input state has changed */
+#define BIT_MSR_DCTS        0x01      /* The bit is 1 said CTS pin The input state has changed */
+
+/* Interrupt status code */
+
+#define INT_NOINT           0x01      /* There is no interruption */
+#define INT_THR_EMPTY       0x02      /* THR empty interruption */
+#define INT_RCV_OVERTIME    0x0C      /* Receive timeout interrupt */
+#define INT_RCV_SUCCESS     0x04      /* Interrupts are available to receive data */
+#define INT_RCV_LINES       0x06      /* Receiving line status interrupted */
+#define INT_MODEM_CHANGE    0x00      /* MODEM input changes interrupt */
+
+#define CH438_IIR_FIFOS_ENABLED 0xC0  /* use FIFO */
+
+
+#define Fpclk    1843200       /* Define the internal clock frequency*/
+
+
+/* Define CH438 PIN NUM */
+#define CH438_ALE_PIN       24
+#define CH438_NWR_PIN       25
+#define CH438_NRD_PIN       26
+
+#define CH438_D0_PIN        27
+#define CH438_D1_PIN        28
+#define CH438_D2_PIN        29
+#define CH438_D3_PIN        30
+#define CH438_D4_PIN        31
+#define CH438_D5_PIN        32
+#define CH438_D6_PIN        33
+#define CH438_D7_PIN        34
+
+#define CH438_INT_PIN       35
+
+/* Define ch438 FPIOA NUMBER */
+#define FPIOA_CH438_ALE   11
+#define FPIOA_CH438_NWR   12
+#define FPIOA_CH438_NRD   13
+
+#define FPIOA_CH438_D0    14
+#define FPIOA_CH438_D1    15
+#define FPIOA_CH438_D2    16
+#define FPIOA_CH438_D3    17
+#define FPIOA_CH438_D4    18
+#define FPIOA_CH438_D5    29
+#define FPIOA_CH438_D6    20
+#define FPIOA_CH438_D7    31
+
+#define FPIOA_CH438_INT   22
+
+/* ch438 debug */
+#ifdef CONFIG_DEBUG_CH438_ERROR
+#  define ch438err    _err
+#else
+#  define ch438err    _none
+#endif
+
+#ifdef CONFIG_DEBUG_CH438_WARN
+#  define ch438warn    _warn
+#else
+#  define ch438warn    _none
+#endif
+
+#ifdef CONFIG_DEBUG_CH438_INFO
+#  define ch438info    _info
+#else
+#  define ch438info    _none
+#endif
+
+#define CH438_FUNC_GPIO(n)  ((K210_IO_FUNC_GPIOHS0 + n) | K210_IOFLAG_GPIOHS)
+
+/* ioctl cmd */
+#define OPE_INT    0x0000
+#define OPE_CFG    0x0001
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+#ifdef CONFIG_BSP_USING_CH438
+void board_ch438_initialize(void);
+#endif
+
+#endif /* __BOARDS_ARM_IMXRT_XIDATONG_SRC_IMXRT_CH438_H */
+
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/k210_gpio.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/k210_gpio.c
new file mode 100644
index 000000000..12c88622b
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/k210_gpio.c
@@ -0,0 +1,187 @@
+/*
+* Copyright (c) 2020 AIIT XUOS Lab
+* XiOS is licensed under Mulan PSL v2.
+* You can use this software according to the terms and conditions of the Mulan PSL v2.
+* You may obtain a copy of Mulan PSL v2 at:
+*        http://license.coscl.org.cn/MulanPSL2
+* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+* See the Mulan PSL v2 for more details.
+*/
+
+/**
+ * @file k210_gpio.c
+ * @brief xidatong-riscv64 k210_gpio.c
+ * @version 1.0
+ * @author AIIT XUOS Lab
+ * @date 2022.06.08
+ */
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <syslog.h>
+#include <assert.h>
+#include <debug.h>
+#include <errno.h>
+
+#include <nuttx/irq.h>
+#include <arch/irq.h>
+
+#include <nuttx/ioexpander/gpio.h>
+
+#include <arch/board/board.h>
+
+#include "k210_fpioa.h"
+#include "k210_gpiohs.h"
+
+#if defined(CONFIG_DEV_GPIO) && !defined(CONFIG_GPIO_LOWER_HALF)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Pin 1 and 2 are used for this example as GPIO outputs. */
+
+#define GPIO_E220_M0   44
+#define GPIO_E220_M1   45
+#define GPIO_E18_MODE  46
+
+#define FPIOA_E220_M0   1
+#define FPIOA_E220_M1   2
+#define FPIOA_E18_MODE  3
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct k210gpio_dev_s
+{
+  struct gpio_dev_s gpio;
+  uint8_t id;
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+#if BOARD_NGPIOOUT > 0
+static int gpout_read(FAR struct gpio_dev_s *dev, FAR bool *value);
+static int gpout_write(FAR struct gpio_dev_s *dev, bool value);
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+#if BOARD_NGPIOOUT > 0
+static const struct gpio_operations_s gpout_ops =
+{
+  .go_read   = gpout_read,
+  .go_write  = gpout_write,
+  .go_attach = NULL,
+  .go_enable = NULL,
+};
+
+/* This array maps the GPIO pins used as OUTPUT */
+
+static const uint32_t g_gpiooutputs[BOARD_NGPIOOUT] =
+{
+  GPIO_E220_M0, 
+  GPIO_E220_M1,
+  GPIO_E18_MODE
+};
+
+static const uint32_t g_fpioa[BOARD_NGPIOOUT] =
+{
+  FPIOA_E220_M0, 
+  FPIOA_E220_M1,
+  FPIOA_E18_MODE
+};
+
+static struct k210gpio_dev_s g_gpout[BOARD_NGPIOOUT];
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: gpout_read
+ ****************************************************************************/
+
+#if BOARD_NGPIOOUT > 0
+static int gpout_read(FAR struct gpio_dev_s *dev, FAR bool *value)
+{
+  FAR struct k210gpio_dev_s *k210gpio =
+    (FAR struct k210gpio_dev_s *)dev;
+
+  DEBUGASSERT(k210gpio != NULL && value != NULL);
+  DEBUGASSERT(k210gpio->id < BOARD_NGPIOOUT);
+  gpioinfo("Reading...\n");
+
+  *value = (int) k210_gpiohs_get_value(g_fpioa[k210gpio->id]);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: gpout_write
+ ****************************************************************************/
+
+static int gpout_write(FAR struct gpio_dev_s *dev, bool value)
+{
+  FAR struct k210gpio_dev_s *k210gpio =
+    (FAR struct k210gpio_dev_s *)dev;
+
+  DEBUGASSERT(k210gpio != NULL);
+  DEBUGASSERT(k210gpio->id < BOARD_NGPIOOUT);
+  gpioinfo("Writing %d\n", (int)value);
+
+  k210_gpiohs_set_value(g_fpioa[k210gpio->id], value);
+
+  return OK;
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: k210_gpio_init
+ ****************************************************************************/
+
+int k210_gpio_init(void)
+{
+  int i;
+  int pincount = 0;
+
+#if BOARD_NGPIOOUT > 0
+  for (i = 0; i < BOARD_NGPIOOUT; i++)
+    {
+      /* Setup and register the GPIO pin */
+
+      g_gpout[i].gpio.gp_pintype = GPIO_OUTPUT_PIN;
+      g_gpout[i].gpio.gp_ops     = &gpout_ops;
+      g_gpout[i].id              = i;
+      gpio_pin_register(&g_gpout[i].gpio, pincount);
+
+      /* Configure the pins that will be used as output */
+
+      k210_fpioa_config(g_gpiooutputs[i],
+                        (K210_IO_FUNC_GPIOHS0 + g_fpioa[i]) | K210_IOFLAG_GPIOHS);
+      k210_gpiohs_set_direction(g_fpioa[i], GPIO_DM_OUTPUT);
+      k210_gpiohs_set_value(g_fpioa[i], false);
+
+      pincount++;
+    }
+#endif
+
+  return OK;
+}
+#endif /* CONFIG_DEV_GPIO && !CONFIG_GPIO_LOWER_HALF */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/k210_lcd.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/k210_lcd.c
new file mode 100755
index 000000000..5eebdbb4f
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/k210_lcd.c
@@ -0,0 +1,219 @@
+/*
+* Copyright (c) 2022 AIIT XUOS Lab
+* XiUOS is licensed under Mulan PSL v2.
+* You can use this software according to the terms and conditions of the Mulan PSL v2.
+* You may obtain a copy of Mulan PSL v2 at:
+*        http://license.coscl.org.cn/MulanPSL2
+* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+* See the Mulan PSL v2 for more details.
+*/
+
+/**
+ * @file k210_lcd.c
+ * @brief LCD relative driver
+ * @version 1.0
+ * @author AIIT XUOS Lab
+ * @date 2022.7.21
+ */
+
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include "k210_fpioa.h"
+#include "k210_gpiohs.h"
+#include "nuttx/arch.h"
+#include "nuttx/lcd/lt768.h"
+#include "nuttx/lcd/lt768_lib.h"
+#include "nuttx/lcd/k210_lcd.h"
+#ifdef CONFIG_LCD_LCDDRV_SPIIF
+#include "nuttx/lcd/lcddrv_spiif.h"
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+void test_delay(void)
+{
+    volatile uint32_t i = 0;
+    for (i = 0; i < 200; ++i)
+    {
+        __asm("NOP"); /* delay */
+    }
+}
+
+void lcd_pin_init(void)
+{
+    k210_fpioa_config(BSP_LCD_NRST, HS_GPIO(FPIOA_LCD_NRST) | K210_IOFLAG_GPIOHS);
+    k210_fpioa_config(BSP_LCD_SCLK, HS_GPIO(FPIOA_LCD_SCLK) | K210_IOFLAG_GPIOHS);
+    k210_fpioa_config(BSP_LCD_MOSI, HS_GPIO(FPIOA_LCD_MOSI) | K210_IOFLAG_GPIOHS);
+    k210_fpioa_config(BSP_LCD_MISO, HS_GPIO(FPIOA_LCD_MISO) | K210_IOFLAG_GPIOHS);
+    k210_fpioa_config(BSP_LCD_NCS,  HS_GPIO(FPIOA_LCD_NCS)  | K210_IOFLAG_GPIOHS);
+
+    k210_gpiohs_set_direction(FPIOA_LCD_MISO, GPIO_DM_INPUT);
+    k210_gpiohs_set_direction(FPIOA_LCD_NRST, GPIO_DM_OUTPUT);
+    k210_gpiohs_set_direction(FPIOA_LCD_SCLK, GPIO_DM_OUTPUT);
+    k210_gpiohs_set_direction(FPIOA_LCD_MOSI, GPIO_DM_OUTPUT);
+    k210_gpiohs_set_direction(FPIOA_LCD_NCS, GPIO_DM_OUTPUT);
+
+    lcd_set_pin(FPIOA_LCD_SCLK, GPIO_PV_HIGH);
+    lcd_set_pin(FPIOA_LCD_NCS, GPIO_PV_HIGH);
+    lcd_set_pin(FPIOA_LCD_NRST, GPIO_PV_HIGH);
+}
+
+void lcd_backlight_init(bool enable)
+{
+    k210_fpioa_config(BSP_LCD_BL_PIN, HS_GPIO(FPIOA_LCD_BL) | K210_IOFLAG_GPIOHS);
+    k210_gpiohs_set_direction(FPIOA_LCD_BL, GPIO_DM_OUTPUT);
+    k210_gpiohs_set_value(FPIOA_LCD_BL, enable);
+}
+
+#ifdef CONFIG_LCD_LCDDRV_SPIIF
+int spiif_backlight(FAR struct lcddrv_lcd_s *lcd, int level)
+{
+    lcd_backlight_init(true);
+    return 1;
+}
+#endif
+
+uint8_t lcd_transfer_byte(uint8_t dat)
+{
+    uint8_t i, rx_data = 0;
+
+    for(i = 0; i < 8; i++)
+    {
+        CLK_H;
+
+        // MOSI during falling edge
+        if((dat << i) & 0x80)
+        {
+            MOSI_H;
+        }
+        else
+        {
+            MOSI_L;
+        }
+
+        CLK_L;
+
+        // MISO during rising edge
+        rx_data <<= 1;
+        if(lcd_get_pin(FPIOA_LCD_MISO))
+            rx_data ++;
+    }
+    CLK_H;
+    return rx_data;
+}
+
+void LCD_CmdWrite(uint8_t cmd)
+{
+    NCS_L;
+    lcd_transfer_byte(0x00);
+    lcd_transfer_byte(cmd);
+    NCS_H;
+}
+
+void LCD_DataWrite(uint8_t data)
+{
+    NCS_L;
+    lcd_transfer_byte(0x80);
+    lcd_transfer_byte(data);
+    NCS_H;
+}
+
+void LCD_DataWrite_Pixel(uint8_t data)
+{
+    NCS_L;
+    lcd_transfer_byte(0x80);
+    lcd_transfer_byte(data);
+    NCS_H;
+    NCS_L;
+    lcd_transfer_byte(0x80);
+    lcd_transfer_byte(data >> 8);
+    NCS_H;
+}
+
+uint8_t LCD_StatusRead(void)
+{
+    uint8_t temp = 0;
+    NCS_L;
+    lcd_transfer_byte(0x40);
+    temp = lcd_transfer_byte(0xff);
+    NCS_H;
+    return temp;
+}
+
+uint8_t LCD_DataRead(void)
+{
+    uint8_t temp = 0;
+    NCS_L;
+    lcd_transfer_byte(0xc0);
+    temp = lcd_transfer_byte(0xff);
+    NCS_H;
+    return temp;
+}
+
+/*****************************************************************************/
+
+void lcd_drv_init(void)
+{
+    uint8_t PwmControl = 100;
+
+    lcd_pin_init();
+    lt768_init();
+    Select_SFI_Dual_Mode0();
+
+    // PWM1 enable backlight
+    LT768_PWM1_Init(1, 0, 200, 100, PwmControl);
+
+    // enable RGB output
+    Display_ON();
+
+    Main_Image_Start_Address(LCD_START_ADDR);
+    Main_Image_Width(LCD_XSIZE_TFT);
+    Main_Window_Start_XY(0, 0);
+    Canvas_Image_Start_address(LCD_START_ADDR);
+    Canvas_image_width(LCD_XSIZE_TFT);
+    Active_Window_XY(0, 0);
+    Active_Window_WH(LCD_XSIZE_TFT, LCD_YSIZE_TFT);
+    up_mdelay(10);
+    Canvas_Image_Start_address(LCD_START_ADDR);
+
+    //fill blue background
+    LT768_DrawSquare_Fill(0, 0, LCD_XSIZE_TFT, LCD_YSIZE_TFT, Blue);
+}
+
+/****************************************************************************
+ * Name: k210_lcd_initialize
+ *
+ * Description:
+ *   Initialize the LCD.  Setup backlight (initially off)
+ *
+ ****************************************************************************/
+
+void board_lcd_initialize(void)
+{
+    /* Configure the LCD backlight (and turn the backlight off) */
+    lcd_backlight_init(true);
+    lcd_drv_init();
+}
+
+/****************************************************************************
+ * Name: k210_backlight
+ *
+ * Description:
+ *   If CONFIG_K210_LCD_BACKLIGHT is defined, then the board-specific
+ *   logic must provide this interface to turn the backlight on and off.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_K210_LCD_BACKLIGHT
+void k210_backlight(bool blon)
+{
+    lcd_backlight_init(blon);
+}
+#endif
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/k210_leds.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/k210_leds.c
new file mode 100644
index 000000000..709d74107
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/k210_leds.c
@@ -0,0 +1,59 @@
+/*
+* Copyright (c) 2020 AIIT XUOS Lab
+* XiOS is licensed under Mulan PSL v2.
+* You can use this software according to the terms and conditions of the Mulan PSL v2.
+* You may obtain a copy of Mulan PSL v2 at:
+*        http://license.coscl.org.cn/MulanPSL2
+* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+* See the Mulan PSL v2 for more details.
+*/
+
+/**
+ * @file k210_leds.c
+ * @brief xidatong-riscv64 k210_leds.c
+ * @version 1.0
+ * @author AIIT XUOS Lab
+ * @date 2022.06.08
+ */
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <nuttx/board.h>
+
+#include <arch/board/board.h>
+
+#include "k210_fpioa.h"
+#include "k210_gpiohs.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+void board_autoled_initialize(void)
+{
+  k210_fpioa_config(BOARD_LED_PAD, BOARD_LED_IO_FUNC | K210_IOFLAG_GPIOHS);
+  k210_gpiohs_set_direction(BOARD_LED_IO, GPIO_DM_OUTPUT);
+  k210_gpiohs_set_value(BOARD_LED_IO, true); /* LED off */
+}
+
+void board_autoled_on(int led)
+{
+  if (led == LED_PANIC)
+    {
+      k210_gpiohs_set_value(BOARD_LED_IO, false);
+    }
+}
+
+void board_autoled_off(int led)
+{
+  if (led == LED_PANIC)
+    {
+      k210_gpiohs_set_value(BOARD_LED_IO, true);
+    }
+}
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/k210_reset.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/k210_reset.c
new file mode 100644
index 000000000..bb96e664c
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/k210_reset.c
@@ -0,0 +1,60 @@
+/*
+* Copyright (c) 2020 AIIT XUOS Lab
+* XiOS is licensed under Mulan PSL v2.
+* You can use this software according to the terms and conditions of the Mulan PSL v2.
+* You may obtain a copy of Mulan PSL v2 at:
+*        http://license.coscl.org.cn/MulanPSL2
+* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+* See the Mulan PSL v2 for more details.
+*/
+
+/**
+ * @file k210_reset.c
+ * @brief k210_reset.c support reboot
+ * @version 1.0
+ * @author AIIT XUOS Lab
+ * @date 2022.06.27
+ */
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <nuttx/board.h>
+#include <nuttx/arch.h>
+
+#ifdef CONFIG_BOARDCTL_RESET
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_reset
+ *
+ * Description:
+ *   Reset board.  Support for this function is required by board-level
+ *   logic if CONFIG_BOARDCTL_RESET is selected.
+ *
+ * Input Parameters:
+ *   status - Status information provided with the reset event.  This
+ *            meaning of this status information is board-specific.  If not
+ *            used by a board, the value zero may be provided in calls to
+ *            board_reset().
+ *
+ * Returned Value:
+ *   If this function returns, then it was not possible to power-off the
+ *   board due to some constraints.  The return value int this case is a
+ *   board-specific reason for the failure to shutdown.
+ *
+ ****************************************************************************/
+int board_reset(int status)
+{
+  up_systemreset();
+  return 0;
+}
+
+#endif /* CONFIG_BOARDCTL_RESET */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/lcd_demo.c b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/lcd_demo.c
new file mode 100755
index 000000000..cebf7d69e
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/lcd_demo.c
@@ -0,0 +1,64 @@
+/****************************************************************************
+ * lcd_demo.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/**
+* @file lcd_demo.c
+* @brief
+* @version 1.0.0
+* @author AIIT XUOS Lab
+* @date 2022-07-21
+*/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include "nuttx/arch.h"
+#include "nuttx/lcd/lt768.h"
+#include "nuttx/lcd/lt768_lib.h"
+#include "nuttx/lcd/k210_lcd.h"
+
+void LcdDemo(void)
+{
+//    int x1 = 0, y1 = 0, x2 = LCD_XSIZE_TFT, y2 = LCD_YSIZE_TFT;
+    int x1 = 100, y1 = 100, x2 = 200, y2 = 200;
+
+    Main_Image_Start_Address(LCD_START_ADDR);
+    Main_Image_Width(LCD_XSIZE_TFT);
+    Main_Window_Start_XY(0, 0);
+    Canvas_Image_Start_address(LCD_START_ADDR);
+    Canvas_image_width(LCD_XSIZE_TFT);
+    Active_Window_XY(0, 0);
+    Active_Window_WH(LCD_XSIZE_TFT, LCD_YSIZE_TFT);
+    up_mdelay(10);
+    Canvas_Image_Start_address(LCD_START_ADDR);
+
+    for(int i = 0; i < 3; i++)
+    {
+        syslog(LOG_NOTICE, "Disp_demo %d\n", i);
+        LT768_DrawSquare_Fill(x1, y1, x2, y2, Red);
+        up_mdelay(2000);
+        LT768_DrawSquare_Fill(x1, y1, x2, y2, Green);
+        up_mdelay(2000);
+        LT768_DrawSquare_Fill(x1, y1, x2, y2, Blue);
+        up_mdelay(2000);
+    }
+}
+
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/xidatong-riscv64.h b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/xidatong-riscv64.h
new file mode 100644
index 000000000..76263659b
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/xidatong-riscv64/src/xidatong-riscv64.h
@@ -0,0 +1,36 @@
+/*
+* Copyright (c) 2020 AIIT XUOS Lab
+* XiUOS is licensed under Mulan PSL v2.
+* You can use this software according to the terms and conditions of the Mulan PSL v2.
+* You may obtain a copy of Mulan PSL v2 at:
+*        http://license.coscl.org.cn/MulanPSL2
+* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+* See the Mulan PSL v2 for more details.
+*/
+
+/**
+ * @file xidatong-riscv64.h
+ * @brief xidatong-riscv64 xidatong-riscv64.h
+ * @version 1.0
+ * @author AIIT XUOS Lab
+ * @date 2022.03.17
+ */
+
+#ifndef __BOARDS_RISCV_K210_XIDATONG_RISCV64_SRC_XIDATONG_RISCV64_H
+#define __BOARDS_RISCV_K210_XIDATONG_RISCV64_SRC_XIDATONG_RISCV64_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+int k210_bringup(void);
+
+#ifdef CONFIG_DEV_GPIO
+int k210_gpio_init(void);
+#endif
+
+#endif /* __BOARDS_RISCV_K210_XIDATONG_RISCV64_SRC_XIDATONG_RISCV64_H */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/Makefile b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/Makefile
index db4cfa609..664fcb50a 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/Makefile
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/Makefile
@@ -65,6 +65,10 @@ ifeq ($(CONFIG_BUILD_KERNEL),y)
 install: $(foreach SDIR, $(CONFIGURED_APPS), $(SDIR)_install)
 
 .import: $(foreach SDIR, $(CONFIGURED_APPS), $(SDIR)_all)
+	$(Q) for app in ${CONFIGURED_APPS}; do \
+		$(MAKE) -C "$${app}" archive ; \
+	done
+	$(Q) install libapps.a $(APPDIR)$(DELIM)import$(DELIM)libs
 	$(Q) $(MAKE) install
 
 import: $(IMPORT_TOOLS)
@@ -99,11 +103,7 @@ $(SYMTABOBJ): %$(OBJEXT): %.c
 	$(call COMPILE, -fno-lto $<, $@)
 
 $(BIN): $(SYMTABOBJ)
-ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
-	$(call ARCHIVE_ADD, "${shell cygpath -w $(BIN)}", $^)
-else
-	$(call ARCHIVE_ADD, $(BIN), $^)
-endif
+	$(call ARCHIVE_ADD, $(call CONVERT_PATH,$(BIN)), $^)
 
 endif # !CONFIG_BUILD_LOADABLE
 
@@ -156,13 +156,15 @@ preconfig: Kconfig
 
 export:
 ifneq ($(EXPORTDIR),)
+	$(Q) mkdir -p "${EXPORTDIR}"$(DELIM)registry || exit 1;
+ifneq ($(CONFIG_BUILD_KERNEL),y)
 ifneq ($(BUILTIN_REGISTRY),)
-	$(Q) mkdir -p "${EXPORTDIR}"/registry || exit 1; \
-	for f in "${BUILTIN_REGISTRY}"/*.bdat "${BUILTIN_REGISTRY}"/*.pdat ; do \
-		[ -f "$${f}" ] && cp -f "$${f}" "${EXPORTDIR}"/registry ; \
+	for f in "${BUILTIN_REGISTRY}"$(DELIM)*.bdat "${BUILTIN_REGISTRY}"$(DELIM)*.pdat ; do \
+		[ -f "$${f}" ] && cp -f "$${f}" "${EXPORTDIR}"$(DELIM)registry ; \
 	done
 endif
 endif
+endif
 
 .depdirs: $(foreach SDIR, $(CONFIGURED_APPS), $(SDIR)_depend)
 
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/examples/sx127x_demo/sx127x_demo.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/examples/sx127x_demo/sx127x_demo.c
index 59d83dcbc..86521223e 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/examples/sx127x_demo/sx127x_demo.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/examples/sx127x_demo/sx127x_demo.c
@@ -22,7 +22,7 @@
 * @file sx127x_demo.c
 * @brief nuttx source code
 *                 https://github.com/apache/incubator-nuttx-apps
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/Kconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/Kconfig
index a482d7db1..c750eace7 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/Kconfig
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/Kconfig
@@ -1,5 +1,4 @@
 #
-#
 # For a description of the syntax of this configuration file,
 # see the file kconfig-language.txt in the NuttX tools repository.
 #
@@ -11,7 +10,6 @@ config NSH_LIBRARY
 	default n
 	select NETUTILS_NETLIB if NET
 	select LIBC_NETDB if NET
-	select READLINE_HAVE_EXTMATCH
 	select BOARDCTL if (!NSH_DISABLE_MKRD && !DISABLE_MOUNTPOINT) || NSH_ARCHINIT || NSH_ROMFSETC
 	select BOARDCTL_MKRD if !NSH_DISABLE_MKRD && !DISABLE_MOUNTPOINT
 	select BOARDCTL_ROMDISK if NSH_ROMFSETC
@@ -80,6 +78,7 @@ choice
 config NSH_READLINE
 	bool "Minimal readline()"
 	select SYSTEM_READLINE
+	select READLINE_HAVE_EXTMATCH
 	---help---
 		Selects the minimal implementation of readline().  This minimal
 		implementation provides on backspace for command line editing.
@@ -108,8 +107,7 @@ config NSH_LINELEN
 
 config NSH_DISABLE_SEMICOLON
 	bool "Disable multiple commands per line"
-	default y if DEFAULT_SMALL
-	default n if !DEFAULT_SMALL
+	default DEFAULT_SMALL
 	---help---
 		By default, you can enter multiple NSH commands on a line with each
 		command separated by a semicolon.  You can disable this feature to
@@ -117,8 +115,7 @@ config NSH_DISABLE_SEMICOLON
 
 config NSH_QUOTE
 	bool "Enable back-slash quoting of characters"
-	default n if DEFAULT_SMALL || !NSH_ARGCAT
-	default y if !DEFAULT_SMALL && NSH_ARGCAT
+	default !DEFAULT_SMALL && NSH_ARGCAT
 	---help---
 		Force special characters like back-quotes, quotation marks, and the
 		back-slash character itself to be treat like normal text.
@@ -128,8 +125,7 @@ config NSH_QUOTE
 
 config NSH_CMDPARMS
 	bool "Enable commands as parameters"
-	default n if DEFAULT_SMALL
-	default y if !DEFAULT_SMALL
+	default !DEFAULT_SMALL
 	depends on !DISABLE_MOUNTPOINT
 	---help---
 		If selected, then the output from commands, from file applications, and
@@ -155,8 +151,7 @@ config NSH_MAXARGUMENTS
 
 config NSH_ARGCAT
 	bool "Concatenation of argument strings"
-	default n if DEFAULT_SMALL
-	default y if !DEFAULT_SMALL
+	default !DEFAULT_SMALL
 	---help---
 		Support concatenation of strings with environment variables or command
 		output.  For example:
@@ -179,8 +174,7 @@ config NSH_NESTDEPTH
 
 config NSH_DISABLEBG
 	bool "Disable background commands"
-	default y if DEFAULT_SMALL
-	default n if !DEFAULT_SMALL
+	default DEFAULT_SMALL
 	---help---
 		This can be set to 'y' to suppress support for background
 		commands.  This setting disables the 'nice' command prefix and
@@ -213,155 +207,134 @@ menu "Disable Individual commands"
 
 config NSH_DISABLE_ADDROUTE
 	bool "Disable addroute"
-	default y if DEFAULT_SMALL
-	default n if !DEFAULT_SMALL
+	default DEFAULT_SMALL
 	depends on NET_ROUTE
 
 config NSH_DISABLE_ARP
 	bool "Disable arp"
-	default y if DEFAULT_SMALL
-	default n if !DEFAULT_SMALL
+	default DEFAULT_SMALL
 	depends on NET_ARP
 
 config NSH_DISABLE_BASE64DEC
 	bool "Disable base64dec"
-	default y if DEFAULT_SMALL
-	default n if !DEFAULT_SMALL
+	default DEFAULT_SMALL
 	depends on NETUTILS_CODECS && CODECS_BASE64
 
 config NSH_DISABLE_BASE64ENC
 	bool "Disable base64enc"
-	default y if DEFAULT_SMALL
-	default n if !DEFAULT_SMALL
+	default DEFAULT_SMALL
 	depends on NETUTILS_CODECS && CODECS_BASE64
 
 config NSH_DISABLE_BASENAME
 	bool "Disable basename"
-	default y if DEFAULT_SMALL || NSH_DISABLESCRIPT
-	default n if !DEFAULT_SMALL && !NSH_DISABLESCRIPT
+	default DEFAULT_SMALL || NSH_DISABLESCRIPT
 
 config NSH_DISABLE_CAT
 	bool "Disable cat"
-	default n
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_CD
 	bool "Disable cd"
-	default n
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_CP
 	bool "Disable cp"
-	default n
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_CMP
 	bool "Disable cmp"
-	default y if DEFAULT_SMALL
-	default n if !DEFAULT_SMALL
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_DATE
 	bool "Disable date"
-	default n if RTC
-	default y if !RTC
+	default DEFAULT_SMALL || !RTC
 
 config NSH_DISABLE_DD
 	bool "Disable dd"
-	default y if DEFAULT_SMALL
-	default n if !DEFAULT_SMALL
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_DF
 	bool "Disable df"
-	default y if DEFAULT_SMALL
-	default n if !DEFAULT_SMALL
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_DELROUTE
 	bool "Disable delroute"
-	default y if DEFAULT_SMALL
-	default n if !DEFAULT_SMALL
+	default DEFAULT_SMALL
 	depends on NET_ROUTE
 
 config NSH_DISABLE_DIRNAME
 	bool "Disable dirname"
-	default y if DEFAULT_SMALL || NSH_DISABLESCRIPT
-	default n if !DEFAULT_SMALL && !NSH_DISABLESCRIPT
+	default DEFAULT_SMALL || NSH_DISABLESCRIPT
 
 config NSH_DISABLE_DMESG
 	bool "Disable dmesg"
-	default y if DEFAULT_SMALL
-	default n if !DEFAULT_SMALL
+	default DEFAULT_SMALL
 	depends on RAMLOG_SYSLOG
 
 config NSH_DISABLE_ECHO
 	bool "Disable echo"
-	default n
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_ENV
 	bool "Disable env"
-	default n
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_EXEC
 	bool "Disable exec"
-	default y if DEFAULT_SMALL
-	default n if !DEFAULT_SMALL
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_EXIT
 	bool "Disable exit"
-	default y if DEFAULT_SMALL && !NSH_TELNET
-	default n if !DEFAULT_SMALL || NSH_TELNET
+	default DEFAULT_SMALL && !NSH_TELNET
 
 config NSH_DISABLE_EXPORT
 	bool "Disable export"
-	default n
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_FREE
 	bool "Disable free"
-	default n
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_GET
 	bool "Disable get"
-	default y if DEFAULT_SMALL
-	default n if !DEFAULT_SMALL
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_HELP
 	bool "Disable help"
-	default n
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_HEXDUMP
 	bool "Disable hexdump"
-	default y if DEFAULT_SMALL
-	default n if !DEFAULT_SMALL
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_IFCONFIG
 	bool "Disable ifconfig"
-	default y if !FS_PROCFS || FS_PROCFS_EXCLUDE_NET
-	default n if FS_PROCFS && !FS_PROCFS_EXCLUDE_NET
+	default DEFAULT_SMALL || !FS_PROCFS || FS_PROCFS_EXCLUDE_NET
 
 config NSH_DISABLE_IFUPDOWN
 	bool "Disable ifup/down"
-	default y if !FS_PROCFS || FS_PROCFS_EXCLUDE_NET
-	default n if FS_PROCFS && !FS_PROCFS_EXCLUDE_NET
+	default DEFAULT_SMALL || !FS_PROCFS || FS_PROCFS_EXCLUDE_NET
 
 config NSH_DISABLE_KILL
 	bool "Disable kill"
-	default n
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_LOSETUP
 	bool "Disable losetup"
-	default y if DEFAULT_SMALL
-	default n if !DEFAULT_SMALL
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_LOSMART
 	bool "Disable losmart"
-	default y if DEFAULT_SMALL || !MTD_SMART
-	default n if !DEFAULT_SMALL && MTD_SMART
+	default DEFAULT_SMALL || !MTD_SMART
 
 config NSH_DISABLE_LN
 	bool "Disable ln"
-	default y if DEFAULT_SMALL
-	default n if !DEFAULT_SMALL
+	default DEFAULT_SMALL
 	depends on PSEUDOFS_SOFTLINKS
 
 config NSH_DISABLE_LS
 	bool "Disable ls"
-	default n
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_MB
 	bool "Disable mb"
@@ -369,35 +342,30 @@ config NSH_DISABLE_MB
 
 config NSH_DISABLE_MD5
 	bool "Disable md5"
-	default y if DEFAULT_SMALL
-	default n if !DEFAULT_SMALL
+	default DEFAULT_SMALL
 	depends on NETUTILS_CODECS && CODECS_HASH_MD5
 
 config NSH_DISABLE_MKDIR
 	bool "Disable mkdir"
-	default n
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_MKFATFS
 	bool "Disable mkfatfs"
-	default y if DEFAULT_SMALL
-	default n if !DEFAULT_SMALL
+	default DEFAULT_SMALL
 	depends on FSUTILS_MKFATFS
 
 config NSH_DISABLE_MKFIFO
 	bool "Disable mkfifo"
-	default y if DEFAULT_SMALL
-	default n if !DEFAULT_SMALL
+	default DEFAULT_SMALL
 	depends on PIPES
 
 config NSH_DISABLE_MKRD
 	bool "Disable mkrd"
-	default y if DEFAULT_SMALL
-	default n if !DEFAULT_SMALL
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_MKSMARTFS
 	bool "Disable mksmartfs"
-	default y if DEFAULT_SMALL
-	default n if !DEFAULT_SMALL
+	default DEFAULT_SMALL
 	depends on FS_SMARTFS && FSUTILS_MKSMARTFS
 
 config NSH_DISABLE_MH
@@ -406,16 +374,16 @@ config NSH_DISABLE_MH
 
 config NSH_DISABLE_MODCMDS
 	bool "Disable modules commands (insmod, rmmod, lsmod)"
-	default n
+	default DEFAULT_SMALL
 	depends on MODULE
 
 config NSH_DISABLE_MOUNT
 	bool "Disable mount"
-	default n
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_MV
 	bool "Disable mv"
-	default n
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_MW
 	bool "Disable mw"
@@ -423,170 +391,161 @@ config NSH_DISABLE_MW
 
 config NSH_DISABLE_NSFMOUNT
 	bool "Disable nfsmount"
-	default n
+	default DEFAULT_SMALL
 	depends on NFS
 
 config NSH_DISABLE_NSLOOKUP
 	bool "Disable nslookup"
-	default n
+	default DEFAULT_SMALL
 	depends on LIBC_NETDB && NETDB_DNSCLIENT
 
 config NSH_DISABLE_PASSWD
 	bool "Disable passwd"
-	default y
+	default DEFAULT_SMALL
 	depends on NSH_LOGIN_PASSWD && !FSUTILS_PASSWD_READONLY
 
 config NSH_DISABLE_PMCONFIG
 	bool "Disable pmconfig"
-	default n
+	default DEFAULT_SMALL
 	depends on PM
 
 config NSH_DISABLE_POWEROFF
 	bool "Disable poweroff"
-	default n if !DEFAULT_SMALL
-	default y if DEFAULT_SMALL
+	default DEFAULT_SMALL
 	depends on BOARDCTL_POWEROFF
 
 config NSH_DISABLE_PRINTF
 	bool "Disable printf"
-	default y
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_PS
 	bool "Disable ps"
-	default y if !FS_PROCFS || FS_PROCFS_EXCLUDE_PROCESS
-	default n if FS_PROCFS && !FS_PROCFS_EXCLUDE_PROCESS
+	default DEFAULT_SMALL || !FS_PROCFS || FS_PROCFS_EXCLUDE_PROCESS
+
+config NSH_DISABLE_PSHEAPUSAGE
+	bool "Disable ps heap usage"
+	depends on DEBUG_MM && !NSH_DISABLE_PS
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_PSSTACKUSAGE
 	bool "Disable ps stack usage"
 	depends on STACK_COLORATION && !NSH_DISABLE_PS
-	default n
+	default DEFAULT_SMALL
 	---help---
 		Disable to save space and not pull in floating point routines
 
 config NSH_DISABLE_PUT
 	bool "Disable put"
-	default y if DEFAULT_SMALL
-	default n if !DEFAULT_SMALL
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_PWD
 	bool "Disable pwd"
-	default n
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_READLINK
 	bool "Disable readlink"
-	default y if DEFAULT_SMALL
-	default n if !DEFAULT_SMALL
+	default DEFAULT_SMALL
 	depends on PSEUDOFS_SOFTLINKS
 
 config NSH_DISABLE_REBOOT
 	bool "Disable reboot"
-	default n if !DEFAULT_SMALL
-	default y if DEFAULT_SMALL
+	default DEFAULT_SMALL
 	depends on BOARDCTL_RESET
 
 config NSH_DISABLE_RM
 	bool "Disable rm"
-	default n
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_RMDIR
 	bool "Disable rmdir"
-	default n
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_ROUTE
 	bool "Disable delroute"
 	depends on FS_PROCFS && NET_ROUTE && !FS_PROCFS_EXCLUDE_NET && !FS_PROCFS_EXCLUDE_ROUTE
-	default y if DEFAULT_SMALL
-	default n if !DEFAULT_SMALL
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_RPTUN
 	bool "Disable rptun"
-	default n
+	default DEFAULT_SMALL
 	depends on RPTUN
 
 config NSH_DISABLE_SET
 	bool "Disable set"
-	default n
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_SOURCE
 	bool "Disable source"
-	default n
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_SHUTDOWN
 	bool "Disable shutdown"
-	default n if !DEFAULT_SMALL && BOARD_POWEROFF && BOARD_RESET
-	default y if DEFAULT_SMALL || !BOARD_POWEROFF || !BOARD_RESET
+	default DEFAULT_SMALL || !BOARD_POWEROFF || !BOARD_RESET
 	depends on BOARDCTL_POWEROFF || BOARDCTL_RESET
 
 config NSH_DISABLE_SLEEP
 	bool "Disable sleep"
-	default n
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_TIME
 	bool "Disable time"
-	default y if DEFAULT_SMALL
-	default n if !DEFAULT_SMALL
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_TEST
 	bool "Disable test"
-	default n
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_TELNETD
 	bool "Disable telnetd"
-	default n if !NSH_NETLOCAL
-	default y if NSH_NETLOCAL
+	default DEFAULT_SMALL || NSH_NETLOCAL
 
 config NSH_DISABLE_TRUNCATE
 	bool "Disable truncate"
-	default y
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_UMOUNT
 	bool "Disable umount"
-	default n
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_UNAME
 	bool "Disable uname"
-	default y if DEFAULT_SMALL
-	default n if !DEFAULT_SMALL
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_UNSET
 	bool "Disable unset"
-	default n
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_URLDECODE
 	bool "Disable urldecode"
-	default y if DEFAULT_SMALL
-	default n if !DEFAULT_SMALL
+	default DEFAULT_SMALL
 	depends on NETUTILS_CODECS && CODECS_URLCODE
 
 config NSH_DISABLE_URLENCODE
 	bool "Disable urlencode"
-	default y if DEFAULT_SMALL
-	default n if !DEFAULT_SMALL
+	default DEFAULT_SMALL
 	depends on NETUTILS_CODECS && CODECS_URLCODE
 
 config NSH_DISABLE_USERADD
 	bool "Disable useradd"
-	default y
+	default DEFAULT_SMALL
 	depends on NSH_LOGIN_PASSWD && !FSUTILS_PASSWD_READONLY
 
 config NSH_DISABLE_USERDEL
 	bool "Disable userdel"
-	default y
+	default DEFAULT_SMALL
 	depends on NSH_LOGIN_PASSWD && !FSUTILS_PASSWD_READONLY
 
 config NSH_DISABLE_USLEEP
 	bool "Disable usleep"
-	default n
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_WGET
 	bool "Disable wget"
-	default y if DEFAULT_SMALL
-	default n if !DEFAULT_SMALL
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_XD
 	bool "Disable xd"
-	default y if DEFAULT_SMALL
-	default n if !DEFAULT_SMALL
+	default DEFAULT_SMALL
 
 config NSH_DISABLE_CH438
 	bool "Disable the ch438 demo."
@@ -612,6 +571,10 @@ config NSH_DISABLE_CO2ZG09
 	bool "Disable the sensor zg09."
 	default n
 
+config NSH_DISABLE_CO2G8S
+	bool "Disable the sensor g8-s."
+	default n
+
 config NSH_DISABLE_PM1_0PS5308
 	bool "Disable the pm1.0 function of the sensor ps5308."
 	default n
@@ -689,12 +652,14 @@ endmenu
 if MMCSD
 
 config NSH_MMCSDMINOR
-	int "MMC/SD minor number"
+	int "MMC/SD minor device number"
 	default 0
 	---help---
-		If board-specific NSH start-up logic needs to mount an MMC/SD device, then the
-		setting should be provided to identify the MMC/SD minor device number (i.e., the N ini
-		/dev/mmcsdN).  Default 0
+		If the architecture supports an MMC/SD slot and if the NSH
+		architecture specific logic is present, this option will provide
+		the MMC/SD minor number, i.e., the MMC/SD block driver will
+		be registered as /dev/mmcsdN where N is the minor number.
+		Default is zero.
 
 config NSH_MMCSDSLOTNO
 	int "MMC/SD slot number"
@@ -760,8 +725,7 @@ config NSH_CODECS_BUFSIZE
 
 config NSH_CMDOPT_HEXDUMP
 	bool "hexdump: Enable 'skip' and 'count' parameters"
-	default n if DEFAULT_SMALL
-	default y if !DEFAULT_SMALL
+	default !DEFAULT_SMALL
 	depends on !NSH_DISABLE_HEXDUMP
 
 config NSH_PROC_MOUNTPOINT
@@ -793,8 +757,7 @@ menu "Scripting Support"
 
 config NSH_DISABLESCRIPT
 	bool "Disable script support"
-	default y if DEFAULT_SMALL
-	default n if !DEFAULT_SMALL
+	default DEFAULT_SMALL
 	---help---
 		This can be set to 'y' to suppress support for scripting.  This
 		setting disables the 'sh', 'test', and '[' commands and the
@@ -805,8 +768,7 @@ if !NSH_DISABLESCRIPT
 
 config NSH_DISABLE_ITEF
 	bool "Disable if-then-else-fi"
-	default y if DEFAULT_SMALL
-	default n if !DEFAULT_SMALL
+	default DEFAULT_SMALL
 	---help---
 		This can be set to 'y' to suppress support for if-then-else-fi
 		sequences in scripts.  This would only be set on systems where
@@ -814,8 +776,7 @@ config NSH_DISABLE_ITEF
 
 config NSH_DISABLE_LOOPS
 	bool "Disable loops"
-	default y if DEFAULT_SMALL
-	default n if !DEFAULT_SMALL
+	default DEFAULT_SMALL
 	---help---
 		This can be set to 'y' to suppress support for while-do-done and
 		until-do-done sequences in scripts.  This would only be set on
@@ -824,16 +785,6 @@ config NSH_DISABLE_LOOPS
 
 endif # !NSH_DISABLESCRIPT
 
-config NSH_MMCSDMINOR
-	int "MMC/SD minor device number"
-	default 0
-	---help---
-		If the architecture supports an MMC/SD slot and if the NSH
-		architecture specific logic is present, this option will provide
-		the MMC/SD minor number, i.e., the MMC/SD block driver will
-		be registered as /dev/mmcsdN where N is the minor number.
-		Default is zero.
-
 config NSH_ROMFSETC
 	bool "Support ROMFS start-up script"
 	default n
@@ -848,7 +799,7 @@ if NSH_ROMFSETC
 config NSH_CROMFSETC
 	bool "Support CROMFS (compressed) start-up script"
 	default n
-	depends on NSH_ROMFSETC && FS_CROMFS
+	depends on FS_CROMFS
 	---help---
 		Mount a CROMFS filesystem at /etc and provide a compressed startup
 		script at /etc/init.d/rcS.
@@ -1232,8 +1183,7 @@ menu "Telnet Configuration"
 
 config NSH_TELNET
 	bool "Use Telnet console"
-	default n if DEFAULT_SMALL
-	default y if !DEFAULT_SMALL
+	default !DEFAULT_SMALL
 	depends on NETUTILS_TELNETD
 	---help---
 		If NSH_TELNET is set to 'y', then a TELENET
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/Makefile b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/Makefile
index 2c09aad61..6f75f336b 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/Makefile
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/Makefile
@@ -24,7 +24,7 @@ include $(APPDIR)/Make.defs
 
 CSRCS  = nsh_init.c nsh_parse.c nsh_console.c nsh_script.c nsh_system.c
 CSRCS += nsh_command.c nsh_fscmds.c nsh_ddcmd.c nsh_proccmds.c nsh_mmcmds.c
-CSRCS += nsh_timcmds.c nsh_envcmds.c nsh_syscmds.c nsh_dbgcmds.c  nsh_Applicationscmd.c
+CSRCS += nsh_timcmds.c nsh_envcmds.c nsh_syscmds.c nsh_dbgcmds.c nsh_Applicationscmd.c
 
 ifeq ($(CONFIG_FILE_STREAM),y)
 CSRCS += nsh_session.c
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h
index cfa6b1afc..8bc4b8879 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh.h
@@ -19,10 +19,10 @@
  ****************************************************************************/
 
 /**
-* @file nsh.h
+* @file nsh_h.c
 * @brief nuttx source code
 *                 https://github.com/apache/incubator-nuttx-apps
-* @version 10.2.0
+* @version 10.23.0
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
@@ -574,9 +574,15 @@
 #  define CONFIG_NSH_DISABLE_FREE 1
 #endif
 
+#if !defined(CONFIG_FS_PROCFS) || defined(CONFIG_FS_PROCFS_EXCLUDE_MEMDUMP)
+#  undef  CONFIG_NSH_DISABLE_MEMDUMP
+#  define CONFIG_NSH_DISABLE_MEMDUMP 1
+#endif
+
 /* Suppress unused file utilities */
 
 #define NSH_HAVE_CATFILE          1
+#define NSH_HAVE_WRITEFILE        1
 #define NSH_HAVE_READFILE         1
 #define NSH_HAVE_FOREACH_DIRENTRY 1
 #define NSH_HAVE_TRIMDIR          1
@@ -949,6 +955,9 @@ void nsh_usbtrace(void);
 #ifndef CONFIG_NSH_DISABLE_FREE
   int cmd_free(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv);
 #endif
+#ifndef CONFIG_NSH_DISABLE_MEMDUMP
+  int cmd_memdump(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv);
+#endif
 #ifndef CONFIG_NSH_DISABLE_TIME
   int cmd_time(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv);
 #endif
@@ -1282,7 +1291,7 @@ int nsh_catfile(FAR struct nsh_vtbl_s *vtbl, FAR const char *cmd,
  *
  * Description:
  *   Read a small file into a user-provided buffer.  The data is assumed to
- *   be a string and is guaranteed to be NUL-termined.  An error occurs if
+ *   be a string and is guaranteed to be NULL-terminated.  An error occurs if
  *   the file content (+terminator)  will not fit into the provided 'buffer'.
  *
  * Input Parameters:
@@ -1303,6 +1312,30 @@ int nsh_readfile(FAR struct nsh_vtbl_s *vtbl, FAR const char *cmd,
                  FAR const char *filepath, FAR char *buffer, size_t buflen);
 #endif
 
+/****************************************************************************
+ * Name: nsh_writefile
+ *
+ * Description:
+ *   Dump the contents of a file to the current NSH terminal.
+ *
+ * Input Paratemets:
+ *   vtbl     - session vtbl
+ *   cmd      - NSH command name to use in error reporting
+ *   buffer   - The pointer of writting buffer
+ *   len      - The length of writting buffer
+ *   filepath - The full path to the file to be dumped
+ *
+ * Returned Value:
+ *   Zero (OK) on success; -1 (ERROR) on failure.
+ *
+ ****************************************************************************/
+
+#ifdef NSH_HAVE_WRITEFILE
+int nsh_writefile(FAR struct nsh_vtbl_s *vtbl, FAR const char *cmd,
+                  FAR const char *buffer, size_t len,
+                  FAR const char *filepath);
+#endif
+
 /****************************************************************************
  * Name: nsh_foreach_direntry
  *
@@ -1421,6 +1454,10 @@ int nsh_foreach_var(FAR struct nsh_vtbl_s *vtbl, nsh_foreach_var_t cb,
   int cmd_Ch438(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv);
 #endif
 
+#if defined(CONFIG_K210_LCD) && !defined(CONFIG_NSH_DISABLE_LCD)
+  int cmd_Lcd(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv);
+#endif
+
 #if defined(CONFIG_APPLICATION_SENSOR_HCHO_TB600B_WQ_HCHO1OS) && !defined(CONFIG_NSH_DISABLE_HCHO_TB600B_WQ_HCHO1OS)
   int cmd_Hcho1os(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv);
 #endif
@@ -1441,6 +1478,10 @@ int nsh_foreach_var(FAR struct nsh_vtbl_s *vtbl, nsh_foreach_var_t cb,
   int cmd_Co2Zg09(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv);
 #endif
 
+#if defined(CONFIG_APPLICATION_SENSOR_CO2_G8S) && !defined(CONFIG_NSH_DISABLE_CO2G8S)
+  int cmd_Co2G8S(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv);
+#endif
+
 #if defined(CONFIG_APPLICATION_SENSOR_PM1_0_PS5308) && !defined(CONFIG_NSH_DISABLE_PM1_0PS5308)
   int cmd_Pm10Ps5308(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv);
 #endif
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c
index 34fb18629..a81bb457a 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_Applicationscmd.c
@@ -49,6 +49,19 @@ int cmd_Ch438(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv)
 }
 #endif
 
+/****************************************************************************
+ * Name: cmd_lcd
+ ****************************************************************************/
+#if defined(CONFIG_K210_LCD) && !defined(CONFIG_NSH_DISABLE_LCD)
+extern void LcdDemo(void);
+int cmd_Lcd(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv)
+{
+    nsh_output(vtbl, "Hello, LCD!\n");
+    LcdDemo();
+    return OK;
+}
+#endif
+
 /****************************************************************************
  * Name: cmd_Hcho1os
  ****************************************************************************/
@@ -125,6 +138,21 @@ int cmd_Co2Zg09(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv)
 }
 #endif
 
+/****************************************************************************
+ * Name: cmd_Co2g8s
+ ****************************************************************************/
+
+#if defined(CONFIG_APPLICATION_SENSOR_CO2_G8S) && !defined(CONFIG_NSH_DISABLE_CO2G8S)
+extern void Co2G8s(void);
+int cmd_Co2G8S(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv)
+{
+    nsh_output(vtbl, "Hello, world!\n");
+    FrameworkInit();
+    Co2G8s();
+    return OK;
+}
+#endif
+
 /****************************************************************************
  * Name: cmd_Pm10Ps5308
  ****************************************************************************/
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c
index acc04fb15..5a97738fe 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/apps/nshlib/nsh_command.c
@@ -22,7 +22,7 @@
 * @file nsh_command.c
 * @brief nuttx source code
 *                 https://github.com/apache/incubator-nuttx-apps
-* @version 10.2.0
+* @version 10.3.0
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
@@ -225,6 +225,12 @@ static const struct cmdmap_s g_cmdmap[] =
   { "free",     cmd_free,     1, 1, NULL },
 #endif
 
+#ifdef CONFIG_DEBUG_MM
+# ifndef CONFIG_NSH_DISABLE_MEMDUMP
+  { "memdump",  cmd_memdump,  1, 3, "[pid/used/free]" },
+# endif
+#endif
+
 #ifdef CONFIG_NET_UDP
 # ifndef CONFIG_NSH_DISABLE_GET
   { "get",      cmd_get,      4, 7,
@@ -594,6 +600,10 @@ static const struct cmdmap_s g_cmdmap[] =
   { "ch438",    cmd_Ch438,     1, 1, "[ch438 demo cmd.]" },
 #endif
 
+#if defined(CONFIG_K210_LCD) && !defined(CONFIG_NSH_DISABLE_LCD)
+  { "lcd",      cmd_Lcd,     1, 1, "[LCD demo cmd.]" },
+#endif
+
 #if defined(CONFIG_APPLICATION_SENSOR_HCHO_TB600B_WQ_HCHO1OS) && !defined(CONFIG_NSH_DISABLE_HCHO_TB600B_WQ_HCHO1OS)
   { "hcho1os",       cmd_Hcho1os,       1, 1, "[get the concentration of formaldehyde with sensor tb600b_wq_hcho1os.]" },
 #endif
@@ -614,6 +624,10 @@ static const struct cmdmap_s g_cmdmap[] =
   { "zg09",       cmd_Co2Zg09,       1, 1, "[get the concentration of co2  with sensor ZG09.]" },
 #endif
 
+#if defined(CONFIG_APPLICATION_SENSOR_CO2_G8S) && !defined(CONFIG_NSH_DISABLE_CO2G8S)
+  { "g8s",       cmd_Co2G8S,       1, 1, "[get the concentration of co2  with sensor G8S.]" },
+#endif
+
 #if defined(CONFIG_APPLICATION_SENSOR_PM1_0_PS5308) && !defined(CONFIG_NSH_DISABLE_PM1_0PS5308)
   { "pm1.0",       cmd_Pm10Ps5308,       1, 1, "[get pm1.0 with sensor Ps5308.]" },
 #endif
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/build.sh b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/build.sh
index 89b0edaf3..d85487f97 100755
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/build.sh
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/build.sh
@@ -17,6 +17,7 @@ cp -rf $current/nuttx $nuttx
 cp -rf $current/apps $nuttx
 cp -rf $nuttx/aiit_board/aiit-arm32-board  $nuttx/nuttx/boards/arm/stm32
 cp -rf $nuttx/aiit_board/aiit-riscv64-board $nuttx/nuttx/boards/risc-v/k210
-cp -rf $nuttx/aiit_board/xidatong $nuttx/nuttx/boards/arm/imxrt
+cp -rf $nuttx/aiit_board/xidatong-riscv64 $nuttx/nuttx/boards/risc-v/k210
+cp -rf $nuttx/aiit_board/xidatong-arm32 $nuttx/nuttx/boards/arm/imxrt
 
 cd ../nuttx
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/Kconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/Kconfig
index e7243e890..8a70fd220 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/Kconfig
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/Kconfig
@@ -8,7 +8,7 @@ mainmenu "NuttX/$ARCH Configuration"
 config APPSDIR
 	string
 	option env="APPSDIR"
-
+    
 menu "XIUOS features"
 
 source "$APPSDIR/../../../APP_Framework/Kconfig"
@@ -46,6 +46,17 @@ config ALLOW_GPL_COMPONENTS
 		NOTE: Please check that the license for each enabled
 		component matches your project license.
 
+config ALLOW_BSDNORDIC_COMPONENTS
+	bool "Use components that have 5-Clause Nordic licenses"
+	depends on ARCH_CHIP_NRF52
+	default n
+	---help---
+		When this option is enabled the project will allow the use
+		of components that have 5-Clause Nordic licenses.
+
+		NOTE: Please check that the license for each enabled
+		component matches your project license.
+
 endmenu # License Setup
 
 menu "Build Setup"
@@ -552,6 +563,10 @@ endmenu # Customize Header Files
 
 menu "Debug Options"
 
+config NDEBUG
+	bool "Define NDEBUG globally"
+	default y
+
 config DEBUG_ALERT
 	bool
 	default n
@@ -937,6 +952,37 @@ config DEBUG_POWER_INFO
 
 endif # DEBUG_POWER
 
+config DEBUG_BATTERY
+	bool "Battery-related Debug Features"
+	default n
+	---help---
+		Enable Battery-related debug features.
+
+if DEBUG_BATTERY
+
+config DEBUG_BATTERY_ERROR
+	bool "Battery-related Error Output"
+	default n
+	depends on DEBUG_ERROR
+	---help---
+		Enable battery-related error output to SYSLOG.
+
+config DEBUG_BATTERY_WARN
+	bool "Battery-related Warnings Output"
+	default n
+	depends on DEBUG_WARN
+	---help---
+		Enable battery-related warning output to SYSLOG.
+
+config DEBUG_BATTERY_INFO
+	bool "Battery-related Informational Output"
+	default n
+	depends on DEBUG_INFO
+	---help---
+		Enable battery-related informational output to SYSLOG.
+
+endif # DEBUG_BATTERY
+
 config DEBUG_WIRELESS
 	bool "Wireless Debug Features"
 	default n
@@ -1782,34 +1828,34 @@ config DEBUG_MOTOR_INFO
 endif # DEBUG_MOTOR
 
 config DEBUG_VIDEO
-        bool "Video Debug Features"
-        default n
-        depends on DRIVERS_VIDEO
-        ---help---
-                Enable video debug features.
+	bool "Video Debug Features"
+	default n
+	depends on DRIVERS_VIDEO
+	---help---
+		Enable video debug features.
 
 if DEBUG_VIDEO
 
 config DEBUG_VIDEO_ERROR
-        bool "Video Error Output"
-        default n
-        depends on DEBUG_ERROR
-        ---help---
-                Enable video error output to SYSLOG.
+	bool "Video Error Output"
+	default n
+	depends on DEBUG_ERROR
+	---help---
+		Enable video error output to SYSLOG.
 
 config DEBUG_VIDEO_WARN
-        bool "Video Warnings Output"
-        default n
-        depends on DEBUG_WARN
-        ---help---
-                Enable video warning output to SYSLOG.
+	bool "Video Warnings Output"
+	default n
+	depends on DEBUG_WARN
+	---help---
+		Enable video warning output to SYSLOG.
 
 config DEBUG_VIDEO_INFO
-        bool "Video Informational Output"
-        default n
-        depends on DEBUG_INFO
-        ---help---
-                Enable video informational output to SYSLOG.
+	bool "Video Informational Output"
+	default n
+	depends on DEBUG_INFO
+	---help---
+		Enable video informational output to SYSLOG.
 
 endif # DEBUG_VIDEO
 
@@ -1846,6 +1892,14 @@ endif # DEBUG_CH438
 
 endif # DEBUG_FEATURES
 
+config DEBUG_TCBINFO
+	bool "Enable TCBinfo struct for debug"
+	default n
+	---help---
+		Enables tcbinfo struct for debugger infomation.
+		Selecting this option will enable g_tcbinfo in arch and
+		procfs.
+
 config ARCH_HAVE_STACKCHECK
 	bool
 	default n
@@ -1861,20 +1915,6 @@ config STACK_COLORATION
 
 		Only supported by a few architectures.
 
-config STACK_USAGE_SAFE_PERCENT
-	int "Stack usage safe percent"
-	default 0
-	range 0 100
-	depends on STACK_COLORATION
-	---help---
-		Stack usage percent = up_check_tcbstack() * 100 / tcb->adj_stack_size,
-		this should be lower than STACK_USAGE_SAFE_PERCENT.
-
-		Idle thread will periodically check stack usage when this macro
-		value > 0.
-
-		N.B. This feature should not be used in production code.
-
 config STACK_CANARIES
 	bool "Compiler stack canaries"
 	depends on ARCH_HAVE_STACKCHECK
@@ -1907,6 +1947,14 @@ config DEBUG_SYMBOLS
 	---help---
 		Build with debug symbols (needed for use with a debugger).
 
+config FRAME_POINTER
+	bool "Compile the NuttX with frame pointers"
+	default n
+	---help---
+		If you say Y here the resulting NuttX image will be slightly
+		larger and slower, but it gives very useful debugging information
+		in case of bugs.
+
 endmenu # Debug Options
 
 config ARCH_HAVE_CUSTOMOPT
@@ -2023,7 +2071,7 @@ endmenu
 # does not contain a Kconfig file
 
 config EXTERNALDIR
-        string
-        option env="EXTERNALDIR"
+	string
+	option env="EXTERNALDIR"
 
 source "$EXTERNALDIR/Kconfig"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/Makefile b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/Makefile
index 0a97c7365..15d1ee4dc 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/Makefile
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/Makefile
@@ -40,9 +40,9 @@ DUMMY  := ${shell $(MAKE) -C tools -f Makefile.host incdir \
 # Include the correct Makefile for the selected architecture.
 
 ifeq ($(CONFIG_WINDOWS_NATIVE),y)
-include tools/Makefile.win
+include tools/Win.mk
 else
 export KERNEL_ROOT = $(CURDIR)
-include tools/Makefile.unix
+include tools/Unix.mk
 endif
 endif
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/include/imxrt/chip.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/include/imxrt/chip.h
index 26a96acae..ed8c7f65f 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/include/imxrt/chip.h
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/include/imxrt/chip.h
@@ -22,7 +22,7 @@
 * @file chip.h
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-23
 */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/Kconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/Kconfig
index e46a53aa1..d191dc030 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/Kconfig
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/Kconfig
@@ -200,8 +200,8 @@ config IMXRT_FLEXSPI
 	default n
 
 config IMXRT_ADC
-    bool
-    default n
+	bool
+	default n
 
 config IMXRT_ENC
 	bool
@@ -371,7 +371,7 @@ config IMXRT_FLEXIO3
 	bool "FLEXIO3"
 	default n
 	select IMXRT_FLEXIO
-    ---help---
+	---help---
 		FLEXIO3 uses the FLEXIO2 clock settings.
 
 endif # ARCH_FAMILY_IMXRT106x
@@ -927,14 +927,14 @@ endmenu # FLEXSPI Peripherals
 menu "ADC Peripherals"
 
 menuconfig IMXRT_ADC1
-    bool "ADC1"
-    default n
-    select IMXRT_ADC
+	bool "ADC1"
+	default n
+	select IMXRT_ADC
 
 menuconfig IMXRT_ADC2
-    bool "ADC2"
-    default n
-    select IMXRT_ADC
+	bool "ADC2"
+	default n
+	select IMXRT_ADC
 
 endmenu
 
@@ -1988,24 +1988,24 @@ if IMXRT_USBDEV
 menu "USB device controller driver (DCD) options"
 
 config IMXRT_USBDEV_NOVBUS
-    bool "No USB VBUS sensing"
-    default n
+	bool "No USB VBUS sensing"
+	default n
 
 config IMXRT_USBDEV_FRAME_INTERRUPT
-    bool "USB frame interrupt"
-    default n
-    ---help---
-        Handle USB Start-Of-Frame events.  Enable reading SOF from interrupt
-        handler vs. simply reading on demand. Probably a bad idea... Unless
-        there is some issue with sampling the SOF from hardware asynchronously.
+	bool "USB frame interrupt"
+	default n
+	---help---
+		Handle USB Start-Of-Frame events.  Enable reading SOF from interrupt
+		handler vs. simply reading on demand. Probably a bad idea... Unless
+		there is some issue with sampling the SOF from hardware asynchronously.
 
 config IMXRT_USBDEV_REGDEBUG
-    bool "Register level debug"
-    depends on DEBUG_USB_INFO
-    default n
-    ---help---
-        Output detailed register-level USB device debug information.  Requires
-        also CONFIG_DEBUG_USB_INFO.
+	bool "Register level debug"
+	depends on DEBUG_USB_INFO
+	default n
+	---help---
+		Output detailed register-level USB device debug information.  Requires
+		also CONFIG_DEBUG_USB_INFO.
 
 endmenu # USB device controller driver (DCD) options
 endif # IMXRT_USBDEV
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/hardware/imxrt_usbphy.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/hardware/imxrt_usbphy.h
index ec30f0aee..e9706a68a 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/hardware/imxrt_usbphy.h
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/hardware/imxrt_usbphy.h
@@ -18,8 +18,8 @@
  *
  ****************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_IMXRT_HARDWARE_IMXRT_USB_PHY_H
-#define __ARCH_ARM_SRC_IMXRT_HARDWARE_IMXRT_USB_PHY_H
+#ifndef __ARCH_ARM_SRC_IMXRT_HARDWARE_IMXRT_USBPHY_H
+#define __ARCH_ARM_SRC_IMXRT_HARDWARE_IMXRT_USBPHY_H
 
 /****************************************************************************
  * Included Files
@@ -79,4 +79,4 @@
 #define USBPHY_CTRL_SFTRST          (1 << 31)  /* Bit 31: Soft-reset */
 #define USBPHY_CTRL_CLKGATE         (1 << 30)  /* Bit 30: Gate UTMI clocks */
 
-#endif /* __ARCH_ARM_SRC_IMXRT_HARDWARE_IMXRT_USB_PHY_H */
+#endif /* __ARCH_ARM_SRC_IMXRT_HARDWARE_IMXRT_USBPHY_H */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/hardware/rt105x/imxrt105x_memorymap.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/hardware/rt105x/imxrt105x_memorymap.h
index dc42ac2e8..e8fd0701d 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/hardware/rt105x/imxrt105x_memorymap.h
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/hardware/rt105x/imxrt105x_memorymap.h
@@ -18,8 +18,17 @@
  *
  ****************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_IMXRT_HARDWARE_IMXRT105X_MEMORYMAP_H
-#define __ARCH_ARM_SRC_IMXRT_HARDWARE_IMXRT105X_MEMORYMAP_H
+/**
+* @file imxrt105x_memorymap.h
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.3.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-23
+*/
+
+#ifndef __ARCH_ARM_SRC_IMXRT_HARDWARE_RT105X_IMXRT105X_MEMORYMAP_H
+#define __ARCH_ARM_SRC_IMXRT_HARDWARE_RT105X_IMXRT105X_MEMORYMAP_H
 
 /****************************************************************************
  * Included Files
@@ -308,4 +317,4 @@
 #define IMXRT_PROCROM_BASE        0xe00fe000  /* 4KB Processor ROM */
 #define IMXRT_PPBROM_BASE         0xe00ff000  /* 4KB PPB ROM */
 
-#endif /* __ARCH_ARM_SRC_IMXRT_HARDWARE_IMXRT105X_MEMORYMAP_H */
+#endif /* __ARCH_ARM_SRC_IMXRT_HARDWARE_RT105X_IMXRT105X_MEMORYMAP_H */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/imxrt_clockconfig.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/imxrt_clockconfig.c
index 97fef0a96..e4725a8ff 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/imxrt_clockconfig.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/imxrt_clockconfig.c
@@ -18,13 +18,22 @@
  *
  ****************************************************************************/
 
+/**
+* @file imxrt_clockconfig.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.3.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-23
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
 
 #include <nuttx/config.h>
 
-#include "arm_arch.h"
+#include "arm_internal.h"
 #include <arch/board/board.h>
 #include "hardware/imxrt_ccm.h"
 #include "hardware/imxrt_dcdc.h"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/imxrt_ehci.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/imxrt_ehci.c
index e5b28c3f0..d2f5838b1 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/imxrt_ehci.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/imxrt_ehci.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file imxrt_ehci.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.3.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-23
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
@@ -43,7 +52,7 @@
 #include <nuttx/usb/usbhost_devaddr.h>
 #include <nuttx/usb/usbhost_trace.h>
 
-#include "arm_arch.h"
+#include "arm_internal.h"
 #include "chip.h"
 #include "hardware/imxrt_usbotg.h"
 #include "imxrt_periphclks.h"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/imxrt_enet.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/imxrt_enet.c
index 8949a418a..ce4931c5b 100755
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/imxrt_enet.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/imxrt_enet.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file imxrt_enet.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.3.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-23
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
@@ -51,7 +60,7 @@
 #  include <nuttx/net/pkt.h>
 #endif
 
-#include "arm_arch.h"
+#include "arm_internal.h"
 #include "chip.h"
 #include "imxrt_config.h"
 #include "hardware/imxrt_enet.h"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/imxrt_lowputc.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/imxrt_lowputc.c
index 3649ec4f7..700523b62 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/imxrt_lowputc.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/imxrt_lowputc.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file imxrt_lowputc.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.3.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-23
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
@@ -28,8 +37,6 @@
 #include <fixedmath.h>
 #include <assert.h>
 
-#include "arm_arch.h"
-
 #include "hardware/imxrt_iomuxc.h"
 #include "hardware/imxrt_pinmux.h"
 #include "hardware/imxrt_ccm.h"
@@ -39,7 +46,6 @@
 #include "imxrt_iomuxc.h"
 #include "imxrt_gpio.h"
 #include "imxrt_lowputc.h"
-
 #include "arm_internal.h"
 
 #include <arch/board/board.h> /* Include last:  has dependencies */
@@ -567,9 +573,10 @@ int imxrt_lpuart_configure(uint32_t base,
  *
  ****************************************************************************/
 
-#if defined(HAVE_LPUART_DEVICE) && defined(CONFIG_DEBUG_FEATURES)
+#if defined(HAVE_LPUART_DEVICE)
 void imxrt_lowputc(int ch)
 {
+#ifdef HAVE_LPUART_CONSOLE
   while ((getreg32(IMXRT_CONSOLE_BASE + IMXRT_LPUART_STAT_OFFSET) &
          LPUART_STAT_TDRE) == 0)
     {
@@ -599,5 +606,6 @@ void imxrt_lowputc(int ch)
   /* Send the character by writing it into the UART_TXD register. */
 
   putreg32((uint32_t)ch, IMXRT_CONSOLE_BASE + IMXRT_LPUART_DATA_OFFSET);
+#endif
 }
 #endif
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/imxrt_lpi2c.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/imxrt_lpi2c.c
index 20d8e1914..7f628ef09 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/imxrt_lpi2c.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/imxrt_lpi2c.c
@@ -18,6 +18,15 @@
  *
  ****************************************************************************/
 
+/**
+* @file imxrt_lpi2c.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.3.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-23
+*/
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
@@ -42,8 +51,7 @@
 
 #include <arch/board/board.h>
 
-#include "arm_arch.h"
-
+#include "arm_internal.h"
 #include "imxrt_lpi2c.h"
 #include "imxrt_gpio.h"
 
@@ -1054,8 +1062,8 @@ static void imxrt_lpi2c_setclock(FAR struct imxrt_lpi2c_priv_s *priv,
             }
           else
             {
-              if ((getreg32(IMXRT_CCM_ANALOG_PLL_USB2) &
-                   CCM_ANALOG_PLL_USB2_DIV_SELECT_MASK) != 0)
+              if ((getreg32(IMXRT_CCM_ANALOG_PLL_USB1) &
+                   CCM_ANALOG_PLL_USB1_DIV_SELECT_MASK) != 0)
                 {
                   pll3_div = 22;
                 }
@@ -1686,7 +1694,7 @@ static int imxrt_lpi2c_transfer(FAR struct i2c_master_s *dev,
   priv->msgc  = count;
   priv->flags = msgs->flags;
 
-  i2cinfo("Flags %x, len %d \n", msgs->flags, msgs->length);
+  i2cinfo("Flags %x, len %d\n", msgs->flags, msgs->length);
 
   /* Reset I2C trace logic */
 
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/imxrt_lpspi.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/imxrt_lpspi.c
index 3abe7d9d2..04891a936 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/imxrt_lpspi.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/imxrt_lpspi.c
@@ -18,29 +18,14 @@
  *
  ****************************************************************************/
 
-/****************************************************************************
- * The external functions, imxrt_lpspi1/2/3/4select and
- * imxrt_lpspi1/2/3/4status must be provided by board-specific logic.
- * They are implementations of the select and status methods of the SPI
- * interface defined by struct imxrt_lpspi_ops_s (see
- * include/nuttx/spi/spi.h). All other methods (including
- * imxrt_lpspibus_initialize()) are provided by common IMXRT logic.
- * To use this common SPI logic on your board:
- *
- *   1. Provide logic in imxrt_boardinitialize() to configure SPI chip
- *      select pins.
- *   2. Provide imxrt_lpspi1/2/3/4select() and imxrt_lpspi1/2/3/4status()
- *      functions in your board-specific logic.  These functions will
- *      perform chip selection and status operations using GPIOs in the way
- *      your board is configured.
- *   3. Add a calls to imxrt_lpspibus_initialize() in your low level
- *      application initialization logic
- *   4. The handle returned by imxrt_lpspibus_initialize() may then be
- *      used to bind the SPI driver to higher level logic (e.g., calling
- *      mmcsd_lpspislotinitialize(), for example, will bind the SPI
- *      driver to the SPI MMC/SD driver).
- *
- ****************************************************************************/
+/**
+* @file imxrt_lpspi.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.3.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-23
+*/
 
 /****************************************************************************
  * Included Files
@@ -61,13 +46,10 @@
 #include <nuttx/arch.h>
 #include <nuttx/semaphore.h>
 #include <nuttx/spi/spi.h>
-#include <nuttx/power/pm.h>
 
 #include <arch/board/board.h>
 
 #include "arm_internal.h"
-#include "arm_arch.h"
-
 #include "chip.h"
 
 #include "imxrt_lpspi.h"
@@ -1695,7 +1677,6 @@ FAR struct spi_dev_s *imxrt_lpspibus_initialize(int bus)
 #endif
     {
       spierr("ERROR: Unsupported SPI bus: %d\n", bus);
-      return NULL;
     }
 
   leave_critical_section(flags);
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/imxrt_serial.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/imxrt_serial.c
index 895084b09..fa2b2ccb0 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/imxrt_serial.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/imxrt_serial.c
@@ -22,10 +22,9 @@
 * @file imxrt_serial.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-23
-*/
 
 /****************************************************************************
  * Included Files
@@ -57,9 +56,7 @@
 #include <arch/board/board.h>
 
 #include "chip.h"
-#include "arm_arch.h"
 #include "arm_internal.h"
-
 #include "hardware/imxrt_lpuart.h"
 #include "imxrt_gpio.h"
 #include "hardware/imxrt_pinmux.h"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/imxrt_usbdev.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/imxrt_usbdev.c
index 3f0d6ff03..f4ef278bb 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/imxrt_usbdev.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/imxrt/imxrt_usbdev.c
@@ -18,6 +18,14 @@
  *
  ****************************************************************************/
 
+/**
+* @file imxrt_usbdev.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.3.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-23
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
@@ -43,9 +51,7 @@
 #include <arch/board/board.h>
 
 #include "chip.h"
-#include "arm_arch.h"
 #include "arm_internal.h"
-
 #include "hardware/imxrt_usbotg.h"
 #include "hardware/imxrt_usbphy.h"
 #include "hardware/rt106x/imxrt106x_ccm.h"
@@ -204,6 +210,14 @@ const struct trace_msg_t g_usb_trace_strings_intdecode[] =
 };
 #endif
 
+#if defined(CONFIG_ARMV7M_DCACHE)
+#  define cache_aligned_alloc(s) kmm_memalign(ARMV7M_DCACHE_LINESIZE,(s))
+#  define CACHE_ALIGNED_DATA     aligned_data(ARMV7M_DCACHE_LINESIZE)
+#else
+#  define cache_aligned_alloc kmm_malloc
+#  define CACHE_ALIGNED_DATA
+#endif
+
 /* Hardware interface *******************************************************/
 
 /* This represents a Endpoint Transfer Descriptor - note these must be 32
@@ -237,7 +251,7 @@ struct imxrt_dtd_s
 #define DTD_CONFIG_BUFFER_ERROR      (1 << 5)    /* Bit 6      : Status Buffer Error */
 #define DTD_CONFIG_TRANSACTION_ERROR (1 << 3)    /* Bit 3      : Status Transaction Error */
 
-/* This represents a queue head  - not these must be aligned to a 2048 byte
+/* This represents a queue head  - note these must be aligned to a 2048 byte
  * boundary
  */
 
@@ -284,9 +298,9 @@ struct imxrt_dqh_s
 #define IMXRT_EPOUTSET               (0x5555)       /* Even phy endpoint numbers are OUT EPs */
 #define IMXRT_EPINSET                (0xaaaa)       /* Odd endpoint numbers are IN EPs */
 #define IMXRT_EPCTRLSET              (0x0003)       /* EP0 IN/OUT are control endpoints */
-#define IMXRT_EPINTRSET              (0xfffc)       /* Interrupt endpoints */
-#define IMXRT_EPBULKSET              (0xfffc)       /* Bulk endpoints */
-#define IMXRT_EPISOCSET              (0xfffc)       /* Isochronous endpoints */
+#define IMXRT_EPINTRSET              (0x000c)       /* Interrupt endpoints */
+#define IMXRT_EPBULKSET              (0x0ff0)       /* Bulk endpoints */
+#define IMXRT_EPISOCSET              (0xf000)       /* Isochronous endpoints */
 
 /* Maximum packet sizes for endpoints */
 
@@ -358,7 +372,8 @@ struct imxrt_usbdev_s
   /* IMXRTXX-specific fields */
 
   uint8_t                 ep0state;      /* State of certain EP0 operations */
-  uint8_t                 ep0buf[64];    /* buffer for EP0 short transfers */
+                                         /* buffer for EP0 short transfers */
+  uint8_t                 ep0buf[64] CACHE_ALIGNED_DATA;
   uint8_t                 paddr;         /* Address assigned by SETADDRESS */
   uint8_t                 stalled:1;     /* 1: Protocol stalled */
   uint8_t                 selfpowered:1; /* 1: Device is self powered */
@@ -780,9 +795,9 @@ static void imxrt_queuedtd(uint8_t epphy, struct imxrt_dtd_s *dtd)
 
   uint32_t bit = IMXRT_ENDPTMASK(epphy);
 
-  imxrt_setbits (bit, IMXRT_USBDEV_ENDPTPRIME);
+  imxrt_setbits(bit, IMXRT_USBDEV_ENDPTPRIME);
 
-  while (imxrt_getreg (IMXRT_USBDEV_ENDPTPRIME) & bit)
+  while (imxrt_getreg(IMXRT_USBDEV_ENDPTPRIME) & bit)
     ;
 }
 
@@ -841,7 +856,7 @@ static void imxrt_readsetup(uint8_t epphy, struct usb_ctrlreq_s *ctrl)
 
   /* Clear the Setup Interrupt */
 
-  imxrt_putreg (IMXRT_ENDPTMASK(IMXRT_EP0_OUT), IMXRT_USBDEV_ENDPTSETUPSTAT);
+  imxrt_putreg(IMXRT_ENDPTMASK(IMXRT_EP0_OUT), IMXRT_USBDEV_ENDPTSETUPSTAT);
 }
 
 /****************************************************************************
@@ -876,7 +891,7 @@ static void imxrt_flushep(struct imxrt_ep_s *privep)
   uint32_t mask = IMXRT_ENDPTMASK(privep->epphy);
   do
     {
-      imxrt_putreg (mask, IMXRT_USBDEV_ENDPTFLUSH);
+      imxrt_putreg(mask, IMXRT_USBDEV_ENDPTFLUSH);
       while ((imxrt_getreg(IMXRT_USBDEV_ENDPTFLUSH) & mask) != 0)
       ;
     }
@@ -910,13 +925,13 @@ static int imxrt_progressep(struct imxrt_ep_s *privep)
   if (privreq->req.len == 0)
     {
       /* If the class driver is responding to a setup packet, then wait for
-       * the host to illicit thr response
+       * the host to illicit the response
        */
 
       if (privep->epphy == IMXRT_EP0_IN &&
           privep->dev->ep0state == EP0STATE_SETUP_OUT)
         {
-          imxrt_ep0state (privep->dev, EP0STATE_WAIT_NAK_IN);
+          imxrt_ep0state(privep->dev, EP0STATE_WAIT_NAK_IN);
         }
       else
         {
@@ -936,11 +951,11 @@ static int imxrt_progressep(struct imxrt_ep_s *privep)
 
   if (privep->epphy == IMXRT_EP0_IN)
     {
-      imxrt_ep0state (privep->dev,  EP0STATE_DATA_IN);
+      imxrt_ep0state(privep->dev,  EP0STATE_DATA_IN);
     }
   else if (privep->epphy == IMXRT_EP0_OUT)
     {
-      imxrt_ep0state (privep->dev, EP0STATE_DATA_OUT);
+      imxrt_ep0state(privep->dev, EP0STATE_DATA_OUT);
     }
 
   int bytesleft = privreq->req.len - privreq->req.xfrd;
@@ -956,7 +971,7 @@ static int imxrt_progressep(struct imxrt_ep_s *privep)
 
   /* Initialise the DTD to transfer the next chunk */
 
-  imxrt_writedtd (dtd, privreq->req.buf + privreq->req.xfrd, bytesleft);
+  imxrt_writedtd(dtd, privreq->req.buf + privreq->req.xfrd, bytesleft);
 
   /* Then queue onto the DQH */
 
@@ -1121,13 +1136,13 @@ static void imxrt_ep0configure(struct imxrt_usbdev_s *priv)
   g_qh[IMXRT_EP0_OUT].currdesc = DTD_NEXTDESC_INVALID;
   g_qh[IMXRT_EP0_IN].currdesc = DTD_NEXTDESC_INVALID;
 
-  up_flush_dcache((uintptr_t)g_qh,
+  up_clean_dcache((uintptr_t)g_qh,
                   (uintptr_t)g_qh + (sizeof(struct imxrt_dqh_s) * 2));
 
   /* Enable EP0 */
 
-  imxrt_setbits (USBDEV_ENDPTCTRL0_RXE | USBDEV_ENDPTCTRL0_TXE,
-                 IMXRT_USBDEV_ENDPTCTRL0);
+  imxrt_setbits(USBDEV_ENDPTCTRL0_RXE | USBDEV_ENDPTCTRL0_TXE,
+                IMXRT_USBDEV_ENDPTCTRL0);
 }
 
 /****************************************************************************
@@ -1144,34 +1159,34 @@ static void imxrt_usbreset(struct imxrt_usbdev_s *priv)
 
   /* Disable all endpoints. Control endpoint 0 is always enabled */
 
-  imxrt_clrbits (USBDEV_ENDPTCTRL_RXE | USBDEV_ENDPTCTRL_TXE,
-                 IMXRT_USBDEV_ENDPTCTRL1);
-  imxrt_clrbits (USBDEV_ENDPTCTRL_RXE | USBDEV_ENDPTCTRL_TXE,
-                 IMXRT_USBDEV_ENDPTCTRL2);
-  imxrt_clrbits (USBDEV_ENDPTCTRL_RXE | USBDEV_ENDPTCTRL_TXE,
-                 IMXRT_USBDEV_ENDPTCTRL3);
-  imxrt_clrbits (USBDEV_ENDPTCTRL_RXE | USBDEV_ENDPTCTRL_TXE,
-                 IMXRT_USBDEV_ENDPTCTRL4);
-  imxrt_clrbits (USBDEV_ENDPTCTRL_RXE | USBDEV_ENDPTCTRL_TXE,
-                 IMXRT_USBDEV_ENDPTCTRL5);
+  imxrt_clrbits(USBDEV_ENDPTCTRL_RXE | USBDEV_ENDPTCTRL_TXE,
+                IMXRT_USBDEV_ENDPTCTRL1);
+  imxrt_clrbits(USBDEV_ENDPTCTRL_RXE | USBDEV_ENDPTCTRL_TXE,
+                IMXRT_USBDEV_ENDPTCTRL2);
+  imxrt_clrbits(USBDEV_ENDPTCTRL_RXE | USBDEV_ENDPTCTRL_TXE,
+                IMXRT_USBDEV_ENDPTCTRL3);
+  imxrt_clrbits(USBDEV_ENDPTCTRL_RXE | USBDEV_ENDPTCTRL_TXE,
+                IMXRT_USBDEV_ENDPTCTRL4);
+  imxrt_clrbits(USBDEV_ENDPTCTRL_RXE | USBDEV_ENDPTCTRL_TXE,
+                IMXRT_USBDEV_ENDPTCTRL5);
 
   /* Clear all pending interrupts */
 
-  imxrt_putreg (imxrt_getreg(IMXRT_USBDEV_ENDPTNAK),
-                IMXRT_USBDEV_ENDPTNAK);
-  imxrt_putreg (imxrt_getreg(IMXRT_USBDEV_ENDPTSETUPSTAT),
-                IMXRT_USBDEV_ENDPTSETUPSTAT);
-  imxrt_putreg (imxrt_getreg(IMXRT_USBDEV_ENDPTCOMPLETE),
-                IMXRT_USBDEV_ENDPTCOMPLETE);
+  imxrt_putreg(imxrt_getreg(IMXRT_USBDEV_ENDPTNAK),
+               IMXRT_USBDEV_ENDPTNAK);
+  imxrt_putreg(imxrt_getreg(IMXRT_USBDEV_ENDPTSETUPSTAT),
+               IMXRT_USBDEV_ENDPTSETUPSTAT);
+  imxrt_putreg(imxrt_getreg(IMXRT_USBDEV_ENDPTCOMPLETE),
+               IMXRT_USBDEV_ENDPTCOMPLETE);
 
   /* Wait for all prime operations to have completed and then flush all
    * DTDs
    */
 
-  while (imxrt_getreg (IMXRT_USBDEV_ENDPTPRIME) != 0)
+  while (imxrt_getreg(IMXRT_USBDEV_ENDPTPRIME) != 0)
     ;
-  imxrt_putreg (IMXRT_ENDPTMASK_ALL, IMXRT_USBDEV_ENDPTFLUSH);
-  while (imxrt_getreg (IMXRT_USBDEV_ENDPTFLUSH))
+  imxrt_putreg(IMXRT_ENDPTMASK_ALL, IMXRT_USBDEV_ENDPTFLUSH);
+  while (imxrt_getreg(IMXRT_USBDEV_ENDPTFLUSH))
     ;
 
   /* Reset endpoints */
@@ -1180,7 +1195,7 @@ static void imxrt_usbreset(struct imxrt_usbdev_s *priv)
     {
       struct imxrt_ep_s *privep = &priv->eplist[epphy];
 
-      imxrt_cancelrequests (privep, -ESHUTDOWN);
+      imxrt_cancelrequests(privep, -ESHUTDOWN);
 
       /* Reset endpoint status */
 
@@ -1206,16 +1221,16 @@ static void imxrt_usbreset(struct imxrt_usbdev_s *priv)
   memset ((void *) g_qh, 0, sizeof (g_qh));
   memset ((void *) g_td, 0, sizeof (g_td));
 
-  up_flush_dcache((uintptr_t)g_qh, (uintptr_t)g_qh + sizeof(g_qh));
-  up_flush_dcache((uintptr_t)g_td, (uintptr_t)g_td + sizeof(g_td));
+  up_clean_dcache((uintptr_t)g_qh, (uintptr_t)g_qh + sizeof(g_qh));
+  up_clean_dcache((uintptr_t)g_td, (uintptr_t)g_td + sizeof(g_td));
 
   /* Set USB address to 0 */
 
-  imxrt_set_address (priv, 0);
+  imxrt_set_address(priv, 0);
 
   /* Initialise the Enpoint List Address */
 
-  imxrt_putreg ((uint32_t)g_qh, IMXRT_USBDEV_ENDPOINTLIST);
+  imxrt_putreg((uint32_t)g_qh, IMXRT_USBDEV_ENDPOINTLIST);
 
   /* EndPoint 0 initialization */
 
@@ -1244,11 +1259,11 @@ static inline void imxrt_ep0state(struct imxrt_usbdev_s *priv,
   switch (state)
     {
     case EP0STATE_WAIT_NAK_IN:
-      imxrt_putreg (IMXRT_ENDPTMASK(IMXRT_EP0_IN), IMXRT_USBDEV_ENDPTNAKEN);
+      imxrt_putreg(IMXRT_ENDPTMASK(IMXRT_EP0_IN), IMXRT_USBDEV_ENDPTNAKEN);
       break;
 
     case EP0STATE_WAIT_NAK_OUT:
-      imxrt_putreg (IMXRT_ENDPTMASK(IMXRT_EP0_OUT), IMXRT_USBDEV_ENDPTNAKEN);
+      imxrt_putreg(IMXRT_ENDPTMASK(IMXRT_EP0_OUT), IMXRT_USBDEV_ENDPTNAKEN);
       break;
 
     default:
@@ -1308,11 +1323,11 @@ static inline void imxrt_ep0setup(struct imxrt_usbdev_s *priv)
 
   if (ctrl->type & USB_REQ_DIR_IN)
     {
-      imxrt_ep0state (priv, EP0STATE_SETUP_IN);
+      imxrt_ep0state(priv, EP0STATE_SETUP_IN);
     }
   else
     {
-      imxrt_ep0state (priv, EP0STATE_SETUP_OUT);
+      imxrt_ep0state(priv, EP0STATE_SETUP_OUT);
 
       if (len > 0)
         {
@@ -1379,8 +1394,8 @@ static inline void imxrt_ep0setup(struct imxrt_usbdev_s *priv)
 
                           priv->ep0buf[1] = 0;
 
-                          imxrt_ep0xfer (IMXRT_EP0_IN, priv->ep0buf, 2);
-                          imxrt_ep0state (priv, EP0STATE_SHORTWRITE);
+                          imxrt_ep0xfer(IMXRT_EP0_IN, priv->ep0buf, 2);
+                          imxrt_ep0state(priv, EP0STATE_SHORTWRITE);
                         }
                     }
                     break;
@@ -1402,7 +1417,7 @@ static inline void imxrt_ep0setup(struct imxrt_usbdev_s *priv)
                           priv->ep0buf[1] = 0;
 
                           imxrt_ep0xfer(IMXRT_EP0_IN, priv->ep0buf, 2);
-                          imxrt_ep0state (priv, EP0STATE_SHORTWRITE);
+                          imxrt_ep0state(priv, EP0STATE_SHORTWRITE);
                         }
                       else
                         {
@@ -1422,7 +1437,7 @@ static inline void imxrt_ep0setup(struct imxrt_usbdev_s *priv)
                       priv->ep0buf[1] = 0;
 
                       imxrt_ep0xfer(IMXRT_EP0_IN, priv->ep0buf, 2);
-                      imxrt_ep0state (priv, EP0STATE_SHORTWRITE);
+                      imxrt_ep0state(priv, EP0STATE_SHORTWRITE);
                     }
                     break;
 
@@ -1457,7 +1472,7 @@ static inline void imxrt_ep0setup(struct imxrt_usbdev_s *priv)
               len == 0 && (privep = imxrt_epfindbyaddr(priv, index)) != NULL)
             {
               imxrt_epstall(&privep->ep, true);
-              imxrt_ep0state (priv, EP0STATE_WAIT_NAK_IN);
+              imxrt_ep0state(priv, EP0STATE_WAIT_NAK_IN);
             }
           else
             {
@@ -1491,7 +1506,7 @@ static inline void imxrt_ep0setup(struct imxrt_usbdev_s *priv)
               len == 0 && (privep = imxrt_epfindbyaddr(priv, index)) != NULL)
             {
               imxrt_epstall(&privep->ep, false);
-              imxrt_ep0state (priv, EP0STATE_WAIT_NAK_IN);
+              imxrt_ep0state(priv, EP0STATE_WAIT_NAK_IN);
             }
           else
             {
@@ -1521,7 +1536,7 @@ static inline void imxrt_ep0setup(struct imxrt_usbdev_s *priv)
 
               priv->paddr = ctrl->value[0];
               priv->paddrset = false;
-              imxrt_ep0state (priv, EP0STATE_WAIT_NAK_IN);
+              imxrt_ep0state(priv, EP0STATE_WAIT_NAK_IN);
             }
           else
             {
@@ -1679,9 +1694,9 @@ static void imxrt_ep0complete(struct imxrt_usbdev_s *priv, uint8_t epphy)
           return;
         }
 
-      if (imxrt_epcomplete (priv, epphy))
+      if (imxrt_epcomplete(priv, epphy))
         {
-          imxrt_ep0state (priv, EP0STATE_WAIT_NAK_OUT);
+          imxrt_ep0state(priv, EP0STATE_WAIT_NAK_OUT);
         }
       break;
 
@@ -1691,9 +1706,9 @@ static void imxrt_ep0complete(struct imxrt_usbdev_s *priv, uint8_t epphy)
           return;
         }
 
-      if (imxrt_epcomplete (priv, epphy))
+      if (imxrt_epcomplete(priv, epphy))
         {
-          imxrt_ep0state (priv, EP0STATE_WAIT_NAK_IN);
+          imxrt_ep0state(priv, EP0STATE_WAIT_NAK_IN);
         }
       break;
 
@@ -1707,15 +1722,15 @@ static void imxrt_ep0complete(struct imxrt_usbdev_s *priv, uint8_t epphy)
                            (uintptr_t)priv->ep0buf + sizeof(priv->ep0buf));
 
       imxrt_dispatchrequest(priv, &priv->ep0ctrl);
-      imxrt_ep0state (priv, EP0STATE_WAIT_NAK_IN);
+      imxrt_ep0state(priv, EP0STATE_WAIT_NAK_IN);
       break;
 
     case EP0STATE_SHORTWRITE:
-      imxrt_ep0state (priv, EP0STATE_WAIT_NAK_OUT);
+      imxrt_ep0state(priv, EP0STATE_WAIT_NAK_OUT);
       break;
 
     case EP0STATE_WAIT_STATUS_IN:
-      imxrt_ep0state (priv, EP0STATE_IDLE);
+      imxrt_ep0state(priv, EP0STATE_IDLE);
 
       /* If we've received a SETADDRESS packet, then we set the address
        * now that the status phase has completed
@@ -1725,13 +1740,13 @@ static void imxrt_ep0complete(struct imxrt_usbdev_s *priv, uint8_t epphy)
         {
           usbtrace(TRACE_INTDECODE(IMXRT_TRACEINTID_EP0INSETADDRESS),
                    (uint16_t)priv->paddr);
-          imxrt_set_address (priv, priv->paddr);
+          imxrt_set_address(priv, priv->paddr);
         }
 
       break;
 
     case EP0STATE_WAIT_STATUS_OUT:
-      imxrt_ep0state (priv, EP0STATE_IDLE);
+      imxrt_ep0state(priv, EP0STATE_IDLE);
       break;
 
     default:
@@ -1771,13 +1786,13 @@ static void imxrt_ep0nak(struct imxrt_usbdev_s *priv, uint8_t epphy)
   switch (priv->ep0state)
     {
     case EP0STATE_WAIT_NAK_IN:
-      imxrt_ep0xfer (IMXRT_EP0_IN, NULL, 0);
-      imxrt_ep0state (priv, EP0STATE_WAIT_STATUS_IN);
+      imxrt_ep0xfer(IMXRT_EP0_IN, NULL, 0);
+      imxrt_ep0state(priv, EP0STATE_WAIT_STATUS_IN);
       break;
 
     case EP0STATE_WAIT_NAK_OUT:
-      imxrt_ep0xfer (IMXRT_EP0_OUT, NULL, 0);
-      imxrt_ep0state (priv, EP0STATE_WAIT_STATUS_OUT);
+      imxrt_ep0xfer(IMXRT_EP0_OUT, NULL, 0);
+      imxrt_ep0state(priv, EP0STATE_WAIT_STATUS_OUT);
       break;
 
     default:
@@ -1869,7 +1884,7 @@ bool imxrt_epcomplete(struct imxrt_usbdev_s *priv, uint8_t epphy)
 
   if (complete)
     {
-      privreq = imxrt_rqdequeue (privep);
+      privreq = imxrt_rqdequeue(privep);
     }
 
   if (!imxrt_rqempty(privep))
@@ -2005,14 +2020,14 @@ static int imxrt_usbinterrupt(int irq, FAR void *context, FAR void *arg)
     {
       /* Handle completion interrupts */
 
-      uint32_t mask = imxrt_getreg (IMXRT_USBDEV_ENDPTCOMPLETE);
+      uint32_t mask = imxrt_getreg(IMXRT_USBDEV_ENDPTCOMPLETE);
 
       if (mask)
         {
           /* Clear any NAK interrupt and completion interrupts */
 
-          imxrt_putreg (mask, IMXRT_USBDEV_ENDPTNAK);
-          imxrt_putreg (mask, IMXRT_USBDEV_ENDPTCOMPLETE);
+          imxrt_putreg(mask, IMXRT_USBDEV_ENDPTNAK);
+          imxrt_putreg(mask, IMXRT_USBDEV_ENDPTCOMPLETE);
 
           if (mask & IMXRT_ENDPTMASK(0))
             {
@@ -2028,7 +2043,7 @@ static int imxrt_usbinterrupt(int irq, FAR void *context, FAR void *arg)
             {
               if (mask & IMXRT_ENDPTMASK((n << 1)))
                 {
-                  imxrt_epcomplete (priv, (n << 1));
+                  imxrt_epcomplete(priv, (n << 1));
                 }
 
               if (mask & IMXRT_ENDPTMASK((n << 1)+1))
@@ -2132,7 +2147,7 @@ static int imxrt_epconfigure(FAR struct usbdev_ep_s *ep,
                     DQH_CAPABILITY_ZLT);
     }
 
-  up_flush_dcache((uintptr_t)dqh,
+  up_clean_dcache((uintptr_t)dqh,
                   (uintptr_t)dqh + sizeof(struct imxrt_dqh_s));
 
   /* Setup Endpoint Control Register */
@@ -2157,8 +2172,8 @@ static int imxrt_epconfigure(FAR struct usbdev_ep_s *ep,
             cfg |= USBDEV_ENDPTCTRL_TXT_INTR; break;
         }
 
-      imxrt_chgbits (0xffff0000, cfg,
-                     IMXRT_USBDEV_ENDPTCTRL(privep->epphy >> 1));
+      imxrt_chgbits(0xffff0000, cfg,
+                    IMXRT_USBDEV_ENDPTCTRL(privep->epphy >> 1));
     }
   else
     {
@@ -2180,8 +2195,8 @@ static int imxrt_epconfigure(FAR struct usbdev_ep_s *ep,
             cfg |= USBDEV_ENDPTCTRL_RXT_INTR; break;
         }
 
-      imxrt_chgbits (0x0000ffff, cfg,
-                     IMXRT_USBDEV_ENDPTCTRL(privep->epphy >> 1));
+      imxrt_chgbits(0x0000ffff, cfg,
+                    IMXRT_USBDEV_ENDPTCTRL(privep->epphy >> 1));
     }
 
   /* Reset endpoint status */
@@ -2192,13 +2207,13 @@ static int imxrt_epconfigure(FAR struct usbdev_ep_s *ep,
 
   if (IMXRT_EPPHYIN(privep->epphy))
     {
-      imxrt_setbits (USBDEV_ENDPTCTRL_TXE,
-                     IMXRT_USBDEV_ENDPTCTRL(privep->epphy >> 1));
+      imxrt_setbits(USBDEV_ENDPTCTRL_TXE,
+                    IMXRT_USBDEV_ENDPTCTRL(privep->epphy >> 1));
     }
   else
     {
-      imxrt_setbits (USBDEV_ENDPTCTRL_RXE,
-                     IMXRT_USBDEV_ENDPTCTRL(privep->epphy >> 1));
+      imxrt_setbits(USBDEV_ENDPTCTRL_RXE,
+                    IMXRT_USBDEV_ENDPTCTRL(privep->epphy >> 1));
     }
 
   return OK;
@@ -2233,13 +2248,13 @@ static int imxrt_epdisable(FAR struct usbdev_ep_s *ep)
 
   if (IMXRT_EPPHYIN(privep->epphy))
     {
-      imxrt_clrbits (USBDEV_ENDPTCTRL_TXE,
-                     IMXRT_USBDEV_ENDPTCTRL(privep->epphy >> 1));
+      imxrt_clrbits(USBDEV_ENDPTCTRL_TXE,
+                    IMXRT_USBDEV_ENDPTCTRL(privep->epphy >> 1));
     }
   else
     {
-      imxrt_clrbits (USBDEV_ENDPTCTRL_RXE,
-                     IMXRT_USBDEV_ENDPTCTRL(privep->epphy >> 1));
+      imxrt_clrbits(USBDEV_ENDPTCTRL_RXE,
+                    IMXRT_USBDEV_ENDPTCTRL(privep->epphy >> 1));
     }
 
   privep->stalled = true;
@@ -2326,13 +2341,13 @@ static void *imxrt_epallocbuffer(FAR struct usbdev_ep_s *ep, uint16_t bytes)
    */
 
   FAR struct imxrt_ep_s *privep = (FAR struct imxrt_ep_s *)ep;
+  UNUSED(privep);
 
   usbtrace(TRACE_EPALLOCBUFFER, privep->epphy);
-
 #ifdef CONFIG_USBDEV_DMAMEMORY
   return usbdev_dma_alloc(bytes);
 #else
-  return kmm_malloc(bytes);
+  return cache_aligned_alloc(bytes);
 #endif
 }
 #endif
@@ -2349,6 +2364,7 @@ static void *imxrt_epallocbuffer(FAR struct usbdev_ep_s *ep, uint16_t bytes)
 static void imxrt_epfreebuffer(FAR struct usbdev_ep_s *ep, FAR void *buf)
 {
   FAR struct imxrt_ep_s *privep = (FAR struct imxrt_ep_s *)ep;
+  UNUSED(privep);
 
   usbtrace(TRACE_EPFREEBUFFER, privep->epphy);
 
@@ -2502,13 +2518,13 @@ static int imxrt_epstall(FAR struct usbdev_ep_s *ep, bool resume)
 
       /* Clear stall and reset the data toggle */
 
-      imxrt_chgbits (ctrl_xs | ctrl_xr, ctrl_xr, addr);
+      imxrt_chgbits(ctrl_xs | ctrl_xr, ctrl_xr, addr);
     }
   else
     {
       privep->stalled = true;
 
-      imxrt_setbits (ctrl_xs, addr);
+      imxrt_setbits(ctrl_xs, addr);
     }
 
   leave_critical_section(flags);
@@ -2769,18 +2785,18 @@ static int imxrt_pullup(struct usbdev_s *dev, bool enable)
   irqstate_t flags = enter_critical_section();
   if (enable)
     {
-      imxrt_setbits (USBDEV_USBCMD_RS, IMXRT_USBDEV_USBCMD);
+      imxrt_setbits(USBDEV_USBCMD_RS, IMXRT_USBDEV_USBCMD);
 
 #ifdef CONFIG_IMXRT_USB0DEV_NOVBUS
       /* Create a 'false' power event on the USB port so the MAC connects */
 
-      imxrt_clrbits (USBOTG_OTGSC_VD, IMXRT_USBOTG_OTGSC);
-      imxrt_setbits (USBOTG_OTGSC_VC, IMXRT_USBOTG_OTGSC);
+      imxrt_clrbits(USBOTG_OTGSC_VD, IMXRT_USBOTG_OTGSC);
+      imxrt_setbits(USBOTG_OTGSC_VC, IMXRT_USBOTG_OTGSC);
 #endif
     }
   else
     {
-      imxrt_clrbits (USBDEV_USBCMD_RS, IMXRT_USBDEV_USBCMD);
+      imxrt_clrbits(USBDEV_USBCMD_RS, IMXRT_USBDEV_USBCMD);
     }
 
   leave_critical_section(flags);
@@ -2887,8 +2903,8 @@ void arm_usbinitialize(void)
 
   /* Reset the controller */
 
-  imxrt_setbits (USBDEV_USBCMD_RST, IMXRT_USBDEV_USBCMD);
-  while (imxrt_getreg (IMXRT_USBDEV_USBCMD) & USBDEV_USBCMD_RST)
+  imxrt_setbits(USBDEV_USBCMD_RST, IMXRT_USBDEV_USBCMD);
+  while (imxrt_getreg(IMXRT_USBDEV_USBCMD) & USBDEV_USBCMD_RST)
       ;
 
   /* Power up the PHY (turn off power disable) - USBPHYx_PWDn
@@ -2902,7 +2918,7 @@ void arm_usbinitialize(void)
 
   /* Program the controller to be the USB device controller */
 
-  imxrt_putreg (USBDEV_USBMODE_SDIS | USBDEV_USBMODE_SLOM |
+  imxrt_putreg(USBDEV_USBMODE_SDIS | USBDEV_USBMODE_SLOM |
                 USBDEV_USBMODE_CM_DEVICE, IMXRT_USBDEV_USBMODE);
 
   /* Attach USB controller interrupt handler */
@@ -2950,8 +2966,8 @@ void arm_usbuninitialize(void)
 
   /* Reset the controller */
 
-  imxrt_setbits (USBDEV_USBCMD_RST, IMXRT_USBDEV_USBCMD);
-  while (imxrt_getreg (IMXRT_USBDEV_USBCMD) & USBDEV_USBCMD_RST)
+  imxrt_setbits(USBDEV_USBCMD_RST, IMXRT_USBDEV_USBCMD);
+  while (imxrt_getreg(IMXRT_USBDEV_USBCMD) & USBDEV_USBCMD_RST)
       ;
 
   /* Turn off USB power and clocking */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/stm32/stm32_serial.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/stm32/stm32_serial.c
index 352a9da76..20dcd4d1e 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/stm32/stm32_serial.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/arm/src/stm32/stm32_serial.c
@@ -22,7 +22,7 @@
 * @file stm32_serial.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
@@ -58,7 +58,6 @@
 #include "stm32_uart.h"
 #include "stm32_dma.h"
 #include "stm32_rcc.h"
-#include "arm_arch.h"
 #include "arm_internal.h"
 
 /****************************************************************************
@@ -2238,7 +2237,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
 #if defined(CONFIG_SERIAL_TERMIOS) || defined(CONFIG_STM32_SERIALBRK_BSDCOMPAT)
   struct up_dev_s   *priv  = (struct up_dev_s *)dev->priv;
 #endif
-  int                ret    = OK;
+  int                ret   = OK;
 
   switch (cmd)
     {
@@ -2967,6 +2966,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
 #  ifdef CONFIG_STM32_SERIALBRK_BSDCOMPAT
       if (priv->ie & USART_CR1_IE_BREAK_INPROGRESS)
         {
+          leave_critical_section(flags);
           return;
         }
 #  endif
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/Kconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/Kconfig
new file mode 100644
index 000000000..d648ca6d1
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/Kconfig
@@ -0,0 +1,245 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+if ARCH_RISCV
+comment "RISC-V Options"
+
+choice
+	prompt "RISC-V chip selection"
+	default ARCH_CHIP_RISCV_CUSTOM
+
+config ARCH_CHIP_FE310
+	bool "SiFive FE310"
+	select ARCH_RV32
+	select ARCH_RV_ISA_M
+	select ARCH_RV_ISA_A
+	select ARCH_RV_ISA_C
+	---help---
+		SiFive FE310 processor (E31 RISC-V Core with MAC extensions).
+
+config ARCH_CHIP_K210
+	bool "Kendryte K210"
+	select ARCH_RV64
+	select ARCH_RV_ISA_M
+	select ARCH_RV_ISA_A
+	select ARCH_RV_ISA_C
+	select ARCH_HAVE_MPU
+	select ARCH_HAVE_TESTSET
+	select ARCH_HAVE_MULTICPU
+	select ARCH_HAVE_RESET
+	---help---
+		Kendryte K210 processor (RISC-V 64bit core with GC extensions)
+
+config ARCH_CHIP_LITEX
+	bool "Enjoy Digital LITEX VEXRISCV"
+	select ARCH_RV32
+	select ARCH_RV_ISA_M
+	select ARCH_RV_ISA_A
+	---help---
+		Enjoy Digital LITEX VEXRISCV softcore processor (RV32IMA).
+
+config ARCH_CHIP_BL602
+	bool "BouffaloLab BL602"
+	select ARCH_RV32
+	select ARCH_RV_ISA_M
+	select ARCH_RV_ISA_A
+	select ARCH_RV_ISA_C
+	select ARCH_HAVE_FPU
+	select ARCH_HAVE_RESET
+	---help---
+		BouffaloLab BL602(rv32imfc)
+
+config ARCH_CHIP_ESP32C3
+	bool "Espressif ESP32-C3"
+	select ARCH_RV32
+	select ARCH_RV_ISA_M
+	select ARCH_RV_ISA_C
+	select ARCH_VECNOTIRQ
+	select ARCH_HAVE_RESET
+	select LIBC_ARCH_ATOMIC
+	select LIBC_ARCH_MEMCPY
+	select LIBC_ARCH_MEMCHR
+	select LIBC_ARCH_MEMCMP
+	select LIBC_ARCH_MEMMOVE
+	select LIBC_ARCH_MEMSET
+	select LIBC_ARCH_STRCHR
+	select LIBC_ARCH_STRCMP
+	select LIBC_ARCH_STRCPY
+	select LIBC_ARCH_STRLCPY
+	select LIBC_ARCH_STRNCPY
+	select LIBC_ARCH_STRLEN
+	select LIBC_ARCH_STRNLEN
+	select ARCH_HAVE_TEXT_HEAP
+	select ARCH_HAVE_BOOTLOADER
+	---help---
+		Espressif ESP32-C3 (RV32IMC).
+
+config ARCH_CHIP_C906
+	bool "THEAD C906"
+	select ARCH_RV64
+	select ARCH_RV_ISA_M
+	select ARCH_RV_ISA_A
+	select ARCH_RV_ISA_C
+	select ARCH_HAVE_FPU
+	select ARCH_HAVE_DPFPU
+	select ARCH_HAVE_MPU
+	---help---
+		THEAD C906 processor (RISC-V 64bit core with GCVX extensions).
+
+config ARCH_CHIP_MPFS
+	bool "MicroChip Polarfire (MPFS)"
+	select ARCH_RV64
+	select ARCH_RV_ISA_M
+	select ARCH_RV_ISA_A
+	select ARCH_RV_ISA_C
+	select ARCH_HAVE_FPU
+	select ARCH_HAVE_DPFPU
+	select ARCH_HAVE_MPU
+	select ARCH_HAVE_MMU
+	select ARCH_MMU_TYPE_SV39
+	select ARCH_HAVE_RESET
+	select ARCH_HAVE_SPI_CS_CONTROL
+	select ARCH_HAVE_PWM_MULTICHAN
+	select PMP_HAS_LIMITED_FEATURES
+	---help---
+		MicroChip Polarfire processor (RISC-V 64bit core with GCVX extensions).
+
+config ARCH_CHIP_RV32M1
+	bool "NXP RV32M1"
+	select ARCH_RV32
+	select ARCH_RV_ISA_M
+	select ARCH_RV_ISA_C
+	---help---
+		NXP RV32M1 processor (RISC-V Core with PULP extensions).
+
+config ARCH_CHIP_QEMU_RV
+	bool "QEMU RV"
+	select ARCH_HAVE_FPU
+	select ARCH_HAVE_DPFPU
+	select ARCH_HAVE_MULTICPU
+	---help---
+		QEMU Generic RV32/RV64 processor
+
+config ARCH_CHIP_RISCV_CUSTOM
+	bool "Custom RISC-V chip"
+	select ARCH_CHIP_CUSTOM
+	---help---
+		Select this option if there is no directory for the chip under arch/risc-v/src/.
+
+endchoice
+
+config ARCH_RV32
+	bool
+	default n
+
+config ARCH_RV64
+	bool
+	default n
+	select LIBC_ARCH_ELF_64BIT if LIBC_ARCH_ELF
+
+config ARCH_RV_ISA_M
+	bool
+	default n
+
+config ARCH_RV_ISA_A
+	bool
+	default n
+	select ARCH_HAVE_TESTSET
+
+config ARCH_RV_ISA_C
+	bool
+	default n
+
+config ARCH_FAMILY
+	string
+	default "rv32"		if ARCH_RV32
+	default "rv64"		if ARCH_RV64
+
+config ARCH_CHIP
+	string
+	default "fe310"		if ARCH_CHIP_FE310
+	default "k210"		if ARCH_CHIP_K210
+	default "litex"		if ARCH_CHIP_LITEX
+	default "bl602"		if ARCH_CHIP_BL602
+	default "esp32c3"	if ARCH_CHIP_ESP32C3
+	default "c906"		if ARCH_CHIP_C906
+	default "mpfs"		if ARCH_CHIP_MPFS
+	default "rv32m1"	if ARCH_CHIP_RV32M1
+	default "qemu-rv"	if ARCH_CHIP_QEMU_RV
+
+config ARCH_RISCV_INTXCPT_EXTENSIONS
+	bool "RISC-V Integer Context Extensions"
+	default n
+	depends on RV32M1_OPENISA_TOOLCHAIN
+	---help---
+		RISC-V could be customized with extensions. Some Integer Context
+		Registers have to be saved and restored when Contexts switch.
+
+if ARCH_RISCV_INTXCPT_EXTENSIONS
+
+config ARCH_RISCV_INTXCPT_EXTREGS
+	int "Number of Extral RISC-V Integer Context Registers"
+	default 0
+
+endif
+
+config ARCH_MMU_TYPE_SV39
+	bool
+	default n
+
+# MPU has certain architecture dependent configurations, which are presented
+# here. Default is that the full RISC-V PMP specification is supported.
+
+config PMP_HAS_LIMITED_FEATURES
+	bool
+	default n
+
+config ARCH_MPU_MIN_BLOCK_SIZE
+	int "Minimum MPU (PMP) block size"
+	default 4	if !PMP_HAS_LIMITED_FEATURES
+
+config ARCH_MPU_HAS_TOR
+	bool "PMP supports TOR"
+	default y	if !PMP_HAS_LIMITED_FEATURES
+
+config ARCH_MPU_HAS_NO4
+	bool "PMP supports NO4"
+	default y	if !PMP_HAS_LIMITED_FEATURES
+
+config ARCH_MPU_HAS_NAPOT
+	bool "PMP supports NAPOT"
+	default y	if !PMP_HAS_LIMITED_FEATURES
+
+source "arch/risc-v/src/opensbi/Kconfig"
+source "arch/risc-v/src/common/Kconfig"
+
+if ARCH_CHIP_FE310
+source "arch/risc-v/src/fe310/Kconfig"
+endif
+if ARCH_CHIP_K210
+source "arch/risc-v/src/k210/Kconfig"
+endif
+if ARCH_CHIP_LITEX
+source "arch/risc-v/src/litex/Kconfig"
+endif
+if ARCH_CHIP_BL602
+source "arch/risc-v/src/bl602/Kconfig"
+endif
+if ARCH_CHIP_ESP32C3
+source "arch/risc-v/src/esp32c3/Kconfig"
+endif
+if ARCH_CHIP_C906
+source "arch/risc-v/src/c906/Kconfig"
+endif
+if ARCH_CHIP_MPFS
+source "arch/risc-v/src/mpfs/Kconfig"
+endif
+if ARCH_CHIP_RV32M1
+source "arch/risc-v/src/rv32m1/Kconfig"
+endif
+if ARCH_CHIP_QEMU_RV
+source "arch/risc-v/src/qemu-rv/Kconfig"
+endif
+endif
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/common/riscv_internal.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/common/riscv_internal.h
deleted file mode 100644
index 4a861acee..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/common/riscv_internal.h
+++ /dev/null
@@ -1,260 +0,0 @@
-/****************************************************************************
- * arch/risc-v/src/common/riscv_internal.h
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements.  See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership.  The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License.  You may obtain a copy of the License at
- *
- *   http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
-
-/**
-* @file riscv_internal.h
-* @brief nuttx source code
-*                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
-
-#ifndef __ARCH_RISCV_SRC_COMMON_UP_INTERNAL_H
-#define __ARCH_RISCV_SRC_COMMON_UP_INTERNAL_H
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include <nuttx/config.h>
-
-#ifndef __ASSEMBLY__
-#  include <nuttx/compiler.h>
-#  include <sys/types.h>
-#  include <stdint.h>
-#endif
-
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* This is the value used to mark the stack for subsequent stack monitoring
- * logic.
- */
-
-#define STACK_COLOR    0xdeadbeef
-#define INTSTACK_COLOR 0xdeadbeef
-#define HEAP_COLOR     'h'
-
-/* In the RISC_V model, the state is copied from the stack to the TCB, but
- * only a referenced is passed to get the state from the TCB.
- */
-
-#ifdef CONFIG_ARCH_RV64GC
-#define riscv_savestate(regs)    riscv_copystate(regs, (uint64_t*)CURRENT_REGS)
-#define riscv_restorestate(regs) (CURRENT_REGS = regs)
-#else
-#define riscv_savestate(regs)    riscv_copystate(regs, (uint32_t*)g_current_regs)
-#define riscv_restorestate(regs) (g_current_regs = regs)
-#endif
-
-#define _START_TEXT  &_stext
-#define _END_TEXT    &_etext
-#define _START_BSS   &_sbss
-#define _END_BSS     &_ebss
-#define _DATA_INIT   &_eronly
-#define _START_DATA  &_sdata
-#define _END_DATA    &_edata
-#define _START_TDATA &_stdata
-#define _END_TDATA   &_etdata
-#define _START_TBSS  &_stbss
-#define _END_TBSS    &_etbss
-
-/* Determine which (if any) console driver to use.  If a console is enabled
- * and no other console device is specified, then a serial console is
- * assumed.
- */
-
-#ifndef CONFIG_DEV_CONSOLE
-#  undef  USE_SERIALDRIVER
-#  undef  USE_EARLYSERIALINIT
-#else
-#  if defined(CONFIG_CONSOLE_SYSLOG)
-#    undef  USE_SERIALDRIVER
-#    undef  USE_EARLYSERIALINIT
-#  else
-#    define USE_SERIALDRIVER 1
-#    define USE_EARLYSERIALINIT 1
-#  endif
-#endif
-
-/****************************************************************************
- * Public Types
- ****************************************************************************/
-
-#undef EXTERN
-#if defined(__cplusplus)
-#define EXTERN extern "C"
-extern "C"
-{
-#else
-#define EXTERN extern
-#endif
-
-#ifndef __ASSEMBLY__
-#ifdef CONFIG_ARCH_RV64GC
-#ifdef CONFIG_SMP
-EXTERN volatile uint64_t *g_current_regs[CONFIG_SMP_NCPUS];
-#  define CURRENT_REGS (g_current_regs[up_cpu_index()])
-#else
-EXTERN volatile uint64_t *g_current_regs[1];
-#  define CURRENT_REGS (g_current_regs[0])
-#endif
-EXTERN uintptr_t g_idle_topstack;
-#else
-EXTERN volatile uint32_t *g_current_regs;
-#  define CURRENT_REGS (g_current_regs)
-EXTERN uint32_t g_idle_topstack;
-#endif
-
-/* Address of the saved user stack pointer */
-
-#if CONFIG_ARCH_INTERRUPTSTACK > 15
-EXTERN uint32_t g_intstackalloc; /* Allocated stack base */
-EXTERN uint32_t g_intstacktop;   /* Initial top of interrupt stack */
-#endif
-
-/* These 'addresses' of these values are setup by the linker script.  They
- * are not actual uint32_t storage locations! They are only used meaningfully
- * in the following way:
- *
- *  - The linker script defines, for example, the symbol_sdata.
- *  - The declareion extern uint32_t _sdata; makes C happy.  C will believe
- *    that the value _sdata is the address of a uint32_t variable _data (it
- *    is not!).
- *  - We can recoved the linker value then by simply taking the address of
- *    of _data.  like:  uint32_t *pdata = &_sdata;
- */
-
-EXTERN uint32_t _stext;           /* Start of .text */
-EXTERN uint32_t _etext;           /* End_1 of .text + .rodata */
-EXTERN const uint32_t _eronly;    /* End+1 of read only section (.text + .rodata) */
-EXTERN uint32_t _sdata;           /* Start of .data */
-EXTERN uint32_t _edata;           /* End+1 of .data */
-EXTERN uint32_t _sbss;            /* Start of .bss */
-EXTERN uint32_t _ebss;            /* End+1 of .bss */
-EXTERN uint32_t _stdata;          /* Start of .tdata */
-EXTERN uint32_t _etdata;          /* End+1 of .tdata */
-EXTERN uint32_t _stbss;           /* Start of .tbss */
-EXTERN uint32_t _etbss;           /* End+1 of .tbss */
-
-#endif /* __ASSEMBLY__ */
-
-/****************************************************************************
-* Public Function Prototypes
-  ***************************************************************************/
-
-#ifndef __ASSEMBLY__
-
-/* Memory allocation ********************************************************/
-
-#if CONFIG_MM_REGIONS > 1
-void riscv_addregion(void);
-#else
-# define riscv_addregion()
-#endif
-
-void up_allocat_eheap(FAR void **heap_start, size_t *heap_size);
-
-/* IRQ initialization *******************************************************/
-
-void up_irqinitialize(void);
-void riscv_ack_irq(int irq);
-
-#ifdef CONFIG_ARCH_RV64GC
-void riscv_copystate(uint64_t *dest, uint64_t *src);
-void riscv_copyfullstate(uint64_t *dest, uint64_t *src);
-#else
-void riscv_copystate(uint32_t *dest, uint32_t *src);
-void riscv_copyfullstate(uint32_t *dest, uint32_t *src);
-#endif
-
-void riscv_sigdeliver(void);
-int riscv_swint(int irq, void *context, void *arg);
-uint32_t riscv_get_newintctx(void);
-
-#ifdef CONFIG_ARCH_FPU
-#ifdef CONFIG_ARCH_RV64GC
-void riscv_savefpu(uint64_t *regs);
-void riscv_restorefpu(const uint64_t *regs);
-#else /* !CONFIG_ARCH_RV64GC */
-void riscv_savefpu(uint32_t *regs);
-void riscv_restorefpu(const uint32_t *regs);
-#endif /* CONFIG_ARCH_RV64GC */
-#else
-#  define riscv_savefpu(regs)
-#  define riscv_restorefpu(regs)
-#endif
-
-/* RISC-V PMP Config ********************************************************/
-
-void riscv_config_pmp_region(uintptr_t region, uintptr_t attr,
-                             uintptr_t base, uintptr_t size);
-
-/* Power management *********************************************************/
-
-void up_timer_initialize(void);
-
-#ifdef CONFIG_PM
-void riscv_pminitialize(void);
-#else
-#  define riscv_pminitialize()
-#endif
-
-/* Low level serial output **************************************************/
-void up_serialinit(void);
-void riscv_lowputc(char ch);
-void riscv_lowputs(const char *str);
-void up_puts(const char *str);
-
-#ifdef USE_SERIALDRIVER
-void riscv_serialinit(void);
-#endif
-
-#ifdef USE_EARLYSERIALINIT
-void riscv_earlyserialinit(void);
-#endif
-
-#ifdef CONFIG_RPMSG_UART
-void rpmsg_serialinit(void);
-#endif
-
-/* Exception Handler ********************************************************/
-
-void riscv_exception(uint32_t mcause, uint32_t *regs);
-
-/* Debug ********************************************************************/
-
-#ifdef CONFIG_STACK_COLORATION
-void riscv_stack_color(void *stackbase, size_t nbytes);
-#endif
-
-/* The OS start routine    **************************************************/
-
-void nx_start(void);
-
-#undef EXTERN
-#ifdef __cplusplus
-}
-#endif
-#endif /* __ASSEMBLY__ */
-
-#endif /* __ARCH_RISCV_SRC_COMMON_UP_INTERNAL_H */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/Kconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/Kconfig
old mode 100644
new mode 100755
index 800cc5a7f..0502d2b18
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/Kconfig
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/Kconfig
@@ -5,15 +5,6 @@
 
 comment "K210 Configuration Options"
 
-config K210_ENABLE_DPFPU
-	bool "K210 DP_FPU Support"
-	default y
-	select ARCH_HAVE_FPU
-	select ARCH_HAVE_DPFPU
-	select LIBC_FLOATINGPOINT
-	---help---
-		Enable the RISC-V Double-Precision Floating Point Unit (DP-FPU).
-
 menu "K210 Peripheral Support"
 
 # These "hidden" settings determine whether a peripheral option is available
@@ -34,6 +25,19 @@ config K210_UART0
 	select ARCH_HAVE_SERIAL_TERMIOS
 	select K210_UART
 
+config K210_HAVE_LCD
+	bool
+	default n
+
+config K210_LCD
+	bool "LCD"
+	default n
+	select K210_HAVE_LCD
+
+config K210_LCD_BACKLIGHT
+    bool "LCD BACKLIGHT"
+    default n
+
 endmenu
 
 menu "K210 Others"
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/Make.defs b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/Make.defs
index 99af2c783..63dbba19a 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/Make.defs
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/Make.defs
@@ -20,54 +20,48 @@
 
 # Specify our HEAD assembly file.  This will be linked as
 # the first object file, so it will appear at address 0
-HEAD_ASRC = k210_vectors.S
+HEAD_ASRC = k210_head.S
 
 # Specify our general Assembly files
-CHIP_ASRCS = k210_head.S riscv_syscall.S
-
-CMN_ASRCS  += riscv_testset.S
+CMN_ASRCS += riscv_vectors.S riscv_testset.S riscv_exception_common.S
 
 # Specify C code within the common directory to be included
-CMN_CSRCS  += riscv_initialize.c riscv_swint.c
-CMN_CSRCS  += riscv_createstack.c riscv_exit.c riscv_fault.c
-CMN_CSRCS  += riscv_assert.c riscv_blocktask.c riscv_copystate.c riscv_initialstate.c
-CMN_CSRCS  += riscv_interruptcontext.c riscv_modifyreg32.c riscv_puts.c
-CMN_CSRCS  += riscv_releasepending.c riscv_reprioritizertr.c
-CMN_CSRCS  += riscv_releasestack.c riscv_stackframe.c riscv_schedulesigaction.c
-CMN_CSRCS  += riscv_sigdeliver.c riscv_unblocktask.c riscv_usestack.c
-CMN_CSRCS  += riscv_mdelay.c riscv_copyfullstate.c
+CMN_CSRCS += riscv_initialize.c riscv_swint.c
+CMN_CSRCS += riscv_createstack.c riscv_exit.c riscv_fault.c
+CMN_CSRCS += riscv_assert.c riscv_blocktask.c riscv_copystate.c riscv_initialstate.c
+CMN_CSRCS += riscv_interruptcontext.c riscv_modifyreg32.c riscv_puts.c
+CMN_CSRCS += riscv_releasepending.c riscv_reprioritizertr.c
+CMN_CSRCS += riscv_releasestack.c riscv_stackframe.c riscv_schedulesigaction.c
+CMN_CSRCS += riscv_sigdeliver.c riscv_unblocktask.c riscv_usestack.c
+CMN_CSRCS += riscv_mdelay.c riscv_udelay.c riscv_copyfullstate.c riscv_idle.c
+CMN_CSRCS += riscv_tcbinfo.c riscv_cpuidlestack.c
+
+ifeq ($(CONFIG_SMP), y)
+CMN_CSRCS += riscv_cpuindex.c riscv_cpupause.c riscv_cpustart.c
+endif
+
+ifeq ($(CONFIG_SCHED_BACKTRACE),y)
+CMN_CSRCS += riscv_backtrace.c
+endif
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
 CMN_CSRCS += riscv_checkstack.c
 endif
 
 ifeq ($(CONFIG_ARCH_HAVE_VFORK),y)
-CMN_CSRCS  += riscv_vfork.c
-endif
-
-ifeq ($(CONFIG_ARCH_FPU),y)
-CMN_ASRCS  += riscv_fpu.S
+CMN_CSRCS += riscv_vfork.c
 endif
 
 # Specify our C code within this directory to be included
-CHIP_CSRCS  = k210_arch.c 
-CHIP_CSRCS += k210_allocateheap.c k210_clockconfig.c
-CHIP_CSRCS += k210_idle.c k210_irq.c k210_irq_dispatch.c
+CHIP_CSRCS  = k210_allocateheap.c k210_clockconfig.c
+CHIP_CSRCS += k210_irq.c k210_irq_dispatch.c k210_systemreset.c
 CHIP_CSRCS += k210_lowputc.c k210_serial.c k210_fpioa.c
-CHIP_CSRCS += k210_start.c k210_timerisr.c k210_gpiohs.c
-CHIP_CSRCS += interrupt.c syscalls.c
-CHIP_CSRCS += uarths.c plic.c sysctl.c fpioa.c clint.c gpio.c gpiohs.c utils.c
-CHIP_CSRCS += dmac.c fft.c i2s.c apu.c 
-
-ifeq ($(CONFIG_SMP), y)
-CHIP_CSRCS += k210_cpuidlestack.c k210_cpuindex.c
-CHIP_CSRCS += k210_cpupause.c k210_cpustart.c
-endif
+CHIP_CSRCS += k210_start.c k210_timerisr.c k210_gpiohs.c k210_gpio.c
+CHIP_CSRCS += k210_sysctl.c
 
 ifeq ($(CONFIG_BUILD_PROTECTED),y)
-CMN_CSRCS  += riscv_task_start.c
-CMN_CSRCS  += riscv_pthread_start.c riscv_pthread_exit.c
-CMN_CSRCS  += riscv_signal_dispatch.c riscv_pmp.c
+CMN_CSRCS  += riscv_task_start.c riscv_pthread_start.c
+CMN_CSRCS  += riscv_signal_dispatch.c
 CMN_UASRCS += riscv_signal_handler.S
 
 CHIP_CSRCS += k210_userspace.c
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/apu.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/apu.c
deleted file mode 100644
index a60eec10b..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/apu.c
+++ /dev/null
@@ -1,540 +0,0 @@
-/* Copyright 2018 Canaan Inc.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
-* @file apu.c
-* @brief kendryte k210 source code
-*                https://github.com/kendryte/kendryte-standalone-sdk.git
-* @version 1.0
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
-
-#include <debug.h>
-#include <stddef.h>
-#include <stdint.h>
-#include <math.h>
-#include "syscalls.h"
-#include "sysctl.h"
-#include "apu.h"
-
-#define BEAFORMING_BASE_ADDR    (0x50250200)
-#ifndef M_PI
-#define M_PI 3.14159265358979323846264338327950288
-#endif
-
-volatile apu_reg_t *const apu = (volatile apu_reg_t *)BEAFORMING_BASE_ADDR;
-
-/*
-Voice strength average value right shift factor.  When performing sound direction detect,
-the average value of samples from different channels is required, this right shift factor
-is used to perform division.
-0x0: no right shift;               0x1: right shift by 1-bit;
- . . . . . .
-0xF: right shift by 15-bit.
-*/
-void apu_set_audio_gain(uint16_t gain)
-{
-    apu_ch_cfg_t ch_cfg = apu->bf_ch_cfg_reg;
-
-    ch_cfg.we_bf_target_dir = 0;
-    ch_cfg.we_bf_sound_ch_en = 0;
-    ch_cfg.we_data_src_mode = 0;
-    ch_cfg.we_audio_gain = 1;
-    ch_cfg.audio_gain = gain;
-    apu->bf_ch_cfg_reg = ch_cfg;
-}
-
-/*set sampling shift*/
-void apu_set_smpl_shift(uint8_t smpl_shift)
-{
-    apu_dwsz_cfg_t tmp = apu->bf_dwsz_cfg_reg;
-
-    tmp.smpl_shift_bits = smpl_shift;
-    apu->bf_dwsz_cfg_reg = tmp;
-}
-
-/*get sampling shift*/
-uint8_t apu_get_smpl_shift(void)
-{
-    apu_dwsz_cfg_t tmp = apu->bf_dwsz_cfg_reg;
-
-    return tmp.smpl_shift_bits;
-}
-
-/*
- * APU unit sound channel enable control bits.  Bit 'x' corresponds to enable bit for sound
- * channel 'x' (x = 0, 1, 2, . . ., 7).  APU sound channels are related with I2S host RX channels.
- * APU sound channel 0/1 correspond to the left/right channel of I2S RX0; APU channel 2/3 correspond
- * to left/right channels of I2S RX1; and things like that.  Software write '1' to enable a sound
- * channel and hardware automatically clear the bit after the sample buffers used for direction
- * searching is filled full.
- * 0x1: writing '1' to enable the corresponding APU sound channel.
- */
-void apu_set_channel_enabled(uint8_t channel_bit)
-{
-    apu_ch_cfg_t ch_cfg;
-
-    ch_cfg.we_audio_gain = 0;
-    ch_cfg.we_bf_target_dir = 0;
-    ch_cfg.we_bf_sound_ch_en = 1;
-    ch_cfg.bf_sound_ch_en = channel_bit;
-    apu->bf_ch_cfg_reg = ch_cfg;
-}
-
-/*
- * APU unit sound channel enable control bits.  Bit 'x' corresponds to enable bit for sound
- * channel 'x' (x = 0, 1, 2, . . ., 7).  APU sound channels are related with I2S host RX channels.
- * APU sound channel 0/1 correspond to the left/right channel of I2S RX0; APU channel 2/3 correspond
- * to left/right channels of I2S RX1; and things like that.  Software write '1' to enable a sound
- * channel and hardware automatically clear the bit after the sample buffers used for direction
- * searching is filled full.
- * 0x1: writing '1' to enable the corresponding APU sound channel.
- */
-void apu_channel_enable(uint8_t channel_bit)
-{
-    apu_ch_cfg_t ch_cfg = apu->bf_ch_cfg_reg;
-
-    ch_cfg.we_audio_gain = 0;
-    ch_cfg.we_bf_target_dir = 0;
-    ch_cfg.we_data_src_mode = 0;
-    ch_cfg.we_bf_sound_ch_en = 1;
-    ch_cfg.bf_sound_ch_en = channel_bit;
-    apu->bf_ch_cfg_reg = ch_cfg;
-}
-
-/*
- *  audio data source configure parameter.  This parameter controls where the audio data source comes from.
- *  0x0: audio data directly sourcing from apu internal buffer;
- *  0x1: audio data sourcing from FFT result buffer.
- */
-void apu_set_src_mode(uint8_t src_mode)
-{
-    apu_ch_cfg_t ch_cfg = apu->bf_ch_cfg_reg;
-
-    ch_cfg.we_audio_gain = 0;
-    ch_cfg.we_bf_target_dir = 0;
-    ch_cfg.we_bf_sound_ch_en = 0;
-    ch_cfg.we_data_src_mode = 1;
-    ch_cfg.data_src_mode = src_mode;
-    apu->bf_ch_cfg_reg = ch_cfg;
-}
-
-/*
- * I2S host beam-forming direction sample ibuffer read index configure register
- */
-void apu_set_direction_delay(uint8_t dir_num, uint8_t *dir_bidx)
-{
-    apu->bf_dir_bidx[dir_num][0] =(apu_dir_bidx_t)
-    {
-        .dir_rd_idx0 = dir_bidx[0],
-        .dir_rd_idx1 = dir_bidx[1],
-        .dir_rd_idx2 = dir_bidx[2],
-        .dir_rd_idx3 = dir_bidx[3]
-    };
-    apu->bf_dir_bidx[dir_num][1] =(apu_dir_bidx_t)
-    {
-        .dir_rd_idx0 = dir_bidx[4],
-        .dir_rd_idx1 = dir_bidx[5],
-        .dir_rd_idx2 = dir_bidx[6],
-        .dir_rd_idx3 = dir_bidx[7]
-    };
-}
-
-/*
- * radius mic_num_a_circle: the num of mic per circle; center: 0: no center mic, 1:have center mic
- */
-void apu_set_delay(float radius, uint8_t mic_num_a_circle, uint8_t center)
-{
-    uint8_t offsets[16][8];
-    int i,j;
-    float seta[8], delay[8], hudu_jiao;
-    float cm_tick = (float)SOUND_SPEED * 100 / I2S_FS;/*distance per tick (cm)*/
-    float min;
-
-    for (i = 0; i < mic_num_a_circle; ++i)
-    {
-        seta[i] = 360 * i / mic_num_a_circle;
-        hudu_jiao = 2 * M_PI * seta[i] / 360;
-        delay[i] = radius * (1 - cos(hudu_jiao)) / cm_tick;
-    }
-    if(center)
-        delay[mic_num_a_circle] = radius / cm_tick;
-
-    for (i = 0; i < mic_num_a_circle + center; ++i)
-    {
-        offsets[0][i] = (int)(delay[i] + 0.5);
-    }
-    for(; i < 8; i++)
-        offsets[0][i] = 0;
-
-
-    for (j = 1; j < DIRECTION_RES; ++j)
-    {
-        for (i = 0; i < mic_num_a_circle; ++i)
-        {
-            seta[i] -= 360 / DIRECTION_RES;
-            hudu_jiao = 2 * M_PI * seta[i] / 360;
-            delay[i] = radius * (1 - cos(hudu_jiao)) / cm_tick;
-        }
-        if(center)
-            delay[mic_num_a_circle] = radius / cm_tick;
-
-        min = 2 * radius;
-        for (i = 0; i < mic_num_a_circle; ++i)
-        {
-            if(delay[i] < min)
-                min = delay[i];
-        }
-        if(min)
-        {
-            for (i = 0; i < mic_num_a_circle + center; ++i)
-            {
-                delay[i] = delay[i] - min;
-            }
-        }
-
-        for (i = 0; i < mic_num_a_circle + center; ++i)
-        {
-            offsets[j][i] = (int)(delay[i] + 0.5);
-        }
-        for(; i < 8; i++)
-            offsets[0][i] = 0;
-    }
-    for (i = 0; i < DIRECTION_RES; i++)
-    {
-        apu_set_direction_delay(i, offsets[i]);
-    }
-}
-
-/*
- Sound direction searching enable bit.  Software writes '1' to start sound direction searching function.
- When all the sound sample buffers are filled full, this bit is cleared by hardware (this sample buffers
- are used for direction detect only).
- 0x1: enable direction searching.
- */
-void apu_dir_enable(void)
-{
-    apu_ctl_t bf_en_tmp = apu->bf_ctl_reg;
-
-    bf_en_tmp.we_bf_dir_search_en = 1;
-    bf_en_tmp.bf_dir_search_en = 1;
-    apu->bf_ctl_reg = bf_en_tmp;
-}
-
-void apu_dir_reset(void)
-{
-    apu_ctl_t bf_en_tmp = apu->bf_ctl_reg;
-
-    bf_en_tmp.we_search_path_rst = 1;
-    bf_en_tmp.search_path_reset = 1;
-    apu->bf_ctl_reg = bf_en_tmp;
-}
-
-/*
- Valid voice sample stream generation enable bit.  After sound direction searching is done, software can
- configure this bit to generate a stream of voice samples for voice recognition.
- 0x1: enable output of voice sample stream.
- 0x0: stop the voice samlpe stream output.
- */
-void apu_voc_enable(uint8_t enable_flag)
-{
-    apu_ctl_t bf_en_tmp = apu->bf_ctl_reg;
-
-    bf_en_tmp.we_bf_stream_gen = 1;
-    bf_en_tmp.bf_stream_gen_en = enable_flag;
-    apu->bf_ctl_reg = bf_en_tmp;
-}
-
-void apu_voc_reset(void)
-{
-    apu_ctl_t bf_en_tmp = apu->bf_ctl_reg;
-
-    bf_en_tmp.we_voice_gen_path_rst = 1;
-    bf_en_tmp.voice_gen_path_reset = 1;
-    apu->bf_ctl_reg = bf_en_tmp;
-}
-
-/*
-Target direction select for valid voice output.  When the source voice direaction searching
-is done, software can use this field to select one from 16 sound directions for the following
-voice recognition
-0x0: select sound direction 0;   0x1: select sound direction 1;
- . . . . . .
-0xF: select sound direction 15.
-*/
-void apu_voc_set_direction(en_bf_dir_t direction)
-{
-    apu_ch_cfg_t ch_cfg = apu->bf_ch_cfg_reg;
-
-    ch_cfg.we_bf_sound_ch_en = 0;
-    ch_cfg.we_audio_gain = 0;
-    ch_cfg.we_data_src_mode = 0;
-    ch_cfg.we_bf_target_dir = 1;
-    ch_cfg.bf_target_dir = direction;
-    apu->bf_ch_cfg_reg = ch_cfg;
-
-    apu_ctl_t bf_en_tmp = apu->bf_ctl_reg;
-
-    bf_en_tmp.we_update_voice_dir = 1;
-    bf_en_tmp.update_voice_dir = 1;
-    apu->bf_ctl_reg = bf_en_tmp;
-}
-
-/*
- *I2S host beam-forming Filter FIR16 Coefficient Register
- */
-void apu_dir_set_prev_fir(uint16_t *fir_coef)
-{
-    uint8_t i = 0;
-
-    for (i = 0; i < 9; i++) {
-        apu->bf_pre_fir0_coef[i] =
-        (apu_fir_coef_t){
-            .fir_tap0 = fir_coef[i * 2],
-            .fir_tap1 = i == 8 ? 0 : fir_coef[i * 2 + 1]
-        };
-    }
-}
-
-void apu_dir_set_post_fir(uint16_t *fir_coef)
-{
-    uint8_t i = 0;
-
-    for (i = 0; i < 9; i++) {
-        apu->bf_post_fir0_coef[i] =
-        (apu_fir_coef_t){
-            .fir_tap0 = fir_coef[i * 2],
-            .fir_tap1 = i == 8 ? 0 : fir_coef[i * 2 + 1]
-        };
-    }
-}
-
-void apu_voc_set_prev_fir(uint16_t *fir_coef)
-{
-    uint8_t i = 0;
-
-    for (i = 0; i < 9; i++) {
-        apu->bf_pre_fir1_coef[i] =
-        (apu_fir_coef_t){
-            .fir_tap0 = fir_coef[i * 2],
-            .fir_tap1 = i == 8 ? 0 : fir_coef[i * 2 + 1]
-        };
-    }
-}
-
-void apu_voc_set_post_fir(uint16_t *fir_coef)
-{
-    uint8_t i = 0;
-
-    for (i = 0; i < 9; i++) {
-        apu->bf_post_fir1_coef[i] =
-        (apu_fir_coef_t){
-            .fir_tap0 = fir_coef[i * 2],
-            .fir_tap1 = i == 8 ? 0 : fir_coef[i * 2 + 1]
-        };
-    }
-}
-
-void apu_set_fft_shift_factor(uint8_t enable_flag, uint16_t shift_factor)
-{
-    apu->bf_fft_cfg_reg =
-    (apu_fft_cfg_t){
-        .fft_enable = enable_flag,
-        .fft_shift_factor = shift_factor
-    };
-
-    apu_ch_cfg_t ch_cfg = apu->bf_ch_cfg_reg;
-
-    ch_cfg.we_data_src_mode = 1;
-    ch_cfg.data_src_mode = enable_flag;
-    apu->bf_ch_cfg_reg = ch_cfg;
-}
-
-void apu_dir_set_down_size(uint8_t dir_dwn_size)
-{
-    apu_dwsz_cfg_t tmp = apu->bf_dwsz_cfg_reg;
-
-    tmp.dir_dwn_siz_rate = dir_dwn_size;
-    apu->bf_dwsz_cfg_reg = tmp;
-}
-
-void apu_dir_set_interrupt_mask(uint8_t dir_int_mask)
-{
-    apu_int_mask_t tmp = apu->bf_int_mask_reg;
-
-    tmp.dir_data_rdy_msk = dir_int_mask;
-    apu->bf_int_mask_reg = tmp;
-}
-
-void apu_voc_set_down_size(uint8_t voc_dwn_size)
-{
-    apu_dwsz_cfg_t tmp = apu->bf_dwsz_cfg_reg;
-
-    tmp.voc_dwn_siz_rate = voc_dwn_size;
-    apu->bf_dwsz_cfg_reg = tmp;
-}
-
-void apu_voc_set_interrupt_mask(uint8_t voc_int_mask)
-{
-    apu_int_mask_t tmp = apu->bf_int_mask_reg;
-
-    tmp.voc_buf_rdy_msk = voc_int_mask;
-    apu->bf_int_mask_reg = tmp;
-}
-
-void apu_set_down_size(uint8_t dir_dwn_size, uint8_t voc_dwn_size)
-{
-    apu_dwsz_cfg_t tmp = apu->bf_dwsz_cfg_reg;
-
-    tmp.dir_dwn_siz_rate = dir_dwn_size;
-    tmp.voc_dwn_siz_rate = voc_dwn_size;
-    apu->bf_dwsz_cfg_reg = tmp;
-}
-
-void apu_set_interrupt_mask(uint8_t dir_int_mask, uint8_t voc_int_mask)
-{
-    apu->bf_int_mask_reg =
-    (apu_int_mask_t){
-        .dir_data_rdy_msk = dir_int_mask,
-        .voc_buf_rdy_msk = voc_int_mask
-    };
-}
-
-void apu_dir_clear_int_state(void)
-{
-    apu->bf_int_stat_reg =
-    (apu_int_stat_t){
-        .dir_search_data_rdy = 1
-    };
-}
-
-void apu_voc_clear_int_state(void)
-{
-    apu->bf_int_stat_reg =
-    (apu_int_stat_t){
-        .voc_buf_data_rdy = 1
-    };
-}
-
-/* reset saturation_counter */
-void apu_voc_reset_saturation_counter(void)
-{
-    apu->saturation_counter = 1<<31;
-}
-
-/*get saturation counter*/
-/*heigh 16 bit is counter, low 16 bit is total.*/
-uint32_t apu_voc_get_saturation_counter(void)
-{
-    return apu->saturation_counter;
-}
-
-/*set saturation limit*/
-void apu_voc_set_saturation_limit(uint16_t upper, uint16_t bottom)
-{
-    apu->saturation_limits = (uint32_t)bottom<<16 | upper;
-}
-
-/*get saturation limit*/
-/*heigh 16 bit is counter, low 16 bit is total.*/
-uint32_t apu_voc_get_saturation_limit(void)
-{
-    return apu->saturation_limits;
-}
-
-static void print_fir(const char *member_name, volatile apu_fir_coef_t *pfir)
-{
-    syslog(LOG_INFO,"  for(int i = 0; i < 9; i++){\n");
-    for (int i = 0; i < 9; i++) {
-        apu_fir_coef_t fir = pfir[i];
-
-        syslog(LOG_INFO,"    apu->%s[%d] = (apu_fir_coef_t){\n", member_name, i);
-        syslog(LOG_INFO,"      .fir_tap0 = 0x%x,\n", fir.fir_tap0);
-        syslog(LOG_INFO,"      .fir_tap1 = 0x%x\n", fir.fir_tap1);
-        syslog(LOG_INFO,"    };\n");
-    }
-    syslog(LOG_INFO,"  }\n");
-}
-
-void apu_print_setting(void)
-{
-    syslog(LOG_INFO,"void apu_setting(void) {\n");
-    apu_ch_cfg_t bf_ch_cfg_reg = apu->bf_ch_cfg_reg;
-
-    syslog(LOG_INFO,"  apu->bf_ch_cfg_reg = (apu_ch_cfg_t){\n");
-    syslog(LOG_INFO,"    .we_audio_gain = 1, .we_bf_target_dir = 1, .we_bf_sound_ch_en = 1,\n");
-    syslog(LOG_INFO,"    .audio_gain = 0x%x, .bf_target_dir = %d, .bf_sound_ch_en = %d, .data_src_mode = %d\n",
-           bf_ch_cfg_reg.audio_gain, bf_ch_cfg_reg.bf_target_dir, bf_ch_cfg_reg.bf_sound_ch_en, bf_ch_cfg_reg.data_src_mode);
-    syslog(LOG_INFO,"  };\n");
-
-    apu_ctl_t bf_ctl_reg = apu->bf_ctl_reg;
-
-    syslog(LOG_INFO,"  apu->bf_ctl_reg = (apu_ctl_t){\n");
-    syslog(LOG_INFO,"    .we_bf_stream_gen = 1, .we_bf_dir_search_en = 1,\n");
-    syslog(LOG_INFO,"    .bf_stream_gen_en = %d, .bf_dir_search_en = %d\n",
-           bf_ctl_reg.bf_stream_gen_en, bf_ctl_reg.bf_dir_search_en);
-    syslog(LOG_INFO,"  };\n");
-
-    syslog(LOG_INFO,"  for(int i = 0; i < 16; i++){\n");
-    for (int i = 0; i < 16; i++) {
-        apu_dir_bidx_t bidx0 = apu->bf_dir_bidx[i][0];
-        apu_dir_bidx_t bidx1 = apu->bf_dir_bidx[i][1];
-
-        syslog(LOG_INFO,"    apu->bf_dir_bidx[%d][0] = (apu_dir_bidx_t){\n", i);
-        syslog(LOG_INFO,"      .dir_rd_idx0 = 0x%x,\n", bidx0.dir_rd_idx0);
-        syslog(LOG_INFO,"      .dir_rd_idx1 = 0x%x,\n", bidx0.dir_rd_idx1);
-        syslog(LOG_INFO,"      .dir_rd_idx2 = 0x%x,\n", bidx0.dir_rd_idx2);
-        syslog(LOG_INFO,"      .dir_rd_idx3 = 0x%x\n", bidx0.dir_rd_idx3);
-        syslog(LOG_INFO,"    };\n");
-        syslog(LOG_INFO,"    apu->bf_dir_bidx[%d][1] = (apu_dir_bidx_t){\n", i);
-        syslog(LOG_INFO,"      .dir_rd_idx0 = 0x%x,\n", bidx1.dir_rd_idx0);
-        syslog(LOG_INFO,"      .dir_rd_idx1 = 0x%x,\n", bidx1.dir_rd_idx1);
-        syslog(LOG_INFO,"      .dir_rd_idx2 = 0x%x,\n", bidx1.dir_rd_idx2);
-        syslog(LOG_INFO,"      .dir_rd_idx3 = 0x%x\n", bidx1.dir_rd_idx3);
-        syslog(LOG_INFO,"    };\n");
-    }
-    syslog(LOG_INFO,"  }\n");
-
-    print_fir("bf_pre_fir0_coef", apu->bf_pre_fir0_coef);
-    print_fir("bf_post_fir0_coef", apu->bf_post_fir0_coef);
-    print_fir("bf_pre_fir1_coef", apu->bf_pre_fir1_coef);
-    print_fir("bf_post_fir1_coef", apu->bf_post_fir1_coef);
-
-
-    apu_dwsz_cfg_t bf_dwsz_cfg_reg = apu->bf_dwsz_cfg_reg;
-
-    syslog(LOG_INFO,"  apu->bf_dwsz_cfg_reg = (apu_dwsz_cfg_t){\n");
-    syslog(LOG_INFO,"    .dir_dwn_siz_rate = %d, .voc_dwn_siz_rate = %d\n",
-           bf_dwsz_cfg_reg.dir_dwn_siz_rate, bf_dwsz_cfg_reg.voc_dwn_siz_rate);
-    syslog(LOG_INFO,"  };\n");
-
-    apu_fft_cfg_t bf_fft_cfg_reg = apu->bf_fft_cfg_reg;
-
-    syslog(LOG_INFO,"  apu->bf_fft_cfg_reg = (apu_fft_cfg_t){\n");
-    syslog(LOG_INFO,"    .fft_enable = %d, .fft_shift_factor = 0x%x\n",
-           bf_fft_cfg_reg.fft_enable, bf_fft_cfg_reg.fft_shift_factor);
-    syslog(LOG_INFO,"  };\n");
-
-    apu_int_mask_t bf_int_mask_reg = apu->bf_int_mask_reg;
-
-    syslog(LOG_INFO,"  apu->bf_int_mask_reg = (apu_int_mask_t){\n");
-    syslog(LOG_INFO,"    .dir_data_rdy_msk = %d, .voc_buf_rdy_msk = %d\n",
-           bf_int_mask_reg.dir_data_rdy_msk, bf_int_mask_reg.voc_buf_rdy_msk);
-    syslog(LOG_INFO,"  };\n");
-
-    syslog(LOG_INFO,"}\n");
-}
-
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/apu.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/apu.h
deleted file mode 100644
index 3728c2327..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/apu.h
+++ /dev/null
@@ -1,571 +0,0 @@
-/* Copyright 2018 Canaan Inc.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
-* @file apu.h
-* @brief kendryte k210 source code
-*                https://github.com/kendryte/kendryte-standalone-sdk.git
-* @version 1.0
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
-
-
-#ifndef _apu_H_
-#define _apu_H_
-
-#if defined(__cplusplus)
-extern "C" {
-#endif
-
-#define DIRECTION_RES 16
-#define I2S_FS 44100
-#define SOUND_SPEED 340
-
-typedef enum en_bf_dir
-{
-    APU_DIR0 = 0,
-    APU_DIR1,
-    APU_DIR2,
-    APU_DIR3,
-    APU_DIR4,
-    APU_DIR5,
-    APU_DIR6,
-    APU_DIR7,
-    APU_DIR8,
-    APU_DIR9,
-    APU_DIR10,
-    APU_DIR11,
-    APU_DIR12,
-    APU_DIR13,
-    APU_DIR14,
-    APU_DIR15,
-} en_bf_dir_t;
-
-typedef struct _apu_ch_cfg
-{
-    /**
-     * BF unit sound channel enable control bits.
-     * Bit 'x' corresponds to enable bit for sound channel 'x' (x = 0, 1, 2,
-     * . . ., 7). BF sound channels are related with I2S host RX channels.
-     * BF sound channel 0/1 correspond to the left/right channel of I2S RX0;
-     * BF channel 2/3 correspond to left/right channels of I2S RX1; and
-     * things like that. 0x1: writing '1' to enable the corresponding BF
-     * sound channel. 0x0: writing '0' to close the corresponding BF sound
-     * channel.
-     */
-    uint32_t bf_sound_ch_en : 8;
-    /**
-     * Target direction select for valid voice output.
-     * When the source voice direaction searching is done, software can use
-     * this field to select one from 16 sound directions for the following
-     * voice recognition. 0x0: select sound direction 0;   0x1: select sound
-     * direction 1; . . . . . . 0xF: select sound direction 15.
-     */
-    uint32_t bf_target_dir : 4;
-    /**
-     * This is the audio sample gain factor. Using this gain factor to
-     * enhance or reduce the stength of the sum of at most 8 source
-     * sound channel outputs. This is a unsigned 11-bit fix-point number,
-     * bit 10 is integer part and bit 9~0 are the fractional part.
-     */
-    uint32_t audio_gain : 11;
-    uint32_t reserved1 : 1;
-    /**
-     * audio data source configure parameter. This parameter controls where
-     * the audio data source comes from. 0x0: audio data directly sourcing
-     * from apu internal buffer; 0x1: audio data sourcing from
-     * FFT result buffer.
-     */
-    uint32_t data_src_mode : 1;
-    uint32_t reserved2 : 3;
-    /**
-     * write enable for bf_sound_ch_en parameter.
-     * 0x1: allowing updates made to 'bf_sound_ch_en'.
-     * Access Mode: write only
-     */
-    uint32_t we_bf_sound_ch_en : 1;
-    /**
-     * write enable for bf_target_dir parameter.
-     * 0x1: allowing updates made to 'bf_target_dir'.
-     * Access Mode: write only
-     */
-    uint32_t we_bf_target_dir : 1;
-    /**
-     * write enable for audio_gain parameter.
-     * 0x1: allowing updates made to 'audio_gain'.
-     * Access Mode: write only
-     */
-    uint32_t we_audio_gain : 1;
-    /**
-     * write enable for data_out_mode parameter.
-     * 0x1: allowing updates made to 'data_src_mode'.
-     */
-    uint32_t we_data_src_mode : 1;
-} __attribute__((packed, aligned(4))) apu_ch_cfg_t;
-
-typedef struct _apu_ctl_t
-{
-    /**
-     * Sound direction searching enable bit.
-     * Software writes '1' to start sound direction searching function.
-     * When all the sound sample buffers are filled full, this bit is
-     * cleared by hardware (this sample buffers are used for direction
-     * detect only). 0x1: enable direction searching.
-     */
-    uint32_t bf_dir_search_en : 1;
-    /*
-     *use this parameter to reset all the control logic on direction search processing path.  This bit is self-clearing.
-     *  0x1: apply reset to direction searching control logic;
-     *  0x0: No operation.
-     */
-    uint32_t search_path_reset : 1;
-    uint32_t reserved : 2;
-    /**
-     * Valid voice sample stream generation enable bit.
-     * After sound direction searching is done, software can configure this
-     * bit to generate a stream of voice samples for voice recognition. 0x1:
-     * enable output of voice sample stream. 0x0: stop the voice samlpe
-     * stream output.
-     */
-    uint32_t bf_stream_gen_en : 1;
-    /*
-     *use this parameter to reset all the control logic on voice stream generating path.  This bit is self-clearing.
-     *  0x1: apply reset to voice stream generating control logic;
-     *  0x0: No operation.
-     */
-    uint32_t voice_gen_path_reset : 1;
-    /*
-     *use this parameter to switch to a new voice source direction.  Software write '1' here and hardware will automatically clear it.
-     *  0x1: write '1' here to request switching to new voice source direction.
-     */
-    uint32_t update_voice_dir : 1;
-
-    uint32_t reserved1 : 1;
-    //write enable for 'bf_dir_search_en' parameter.
-    uint32_t we_bf_dir_search_en : 1;
-    uint32_t we_search_path_rst : 1;
-    uint32_t we_bf_stream_gen : 1;
-    uint32_t we_voice_gen_path_rst : 1;
-    uint32_t we_update_voice_dir : 1;
-    uint32_t reserved2 : 19;
-
-} __attribute__((packed, aligned(4))) apu_ctl_t;
-
-typedef struct _apu_dir_bidx
-{
-    uint32_t dir_rd_idx0 : 6;
-    uint32_t reserved : 2;
-    uint32_t dir_rd_idx1 : 6;
-    uint32_t reserved1 : 2;
-    uint32_t dir_rd_idx2 : 6;
-    uint32_t reserved2 : 2;
-    uint32_t dir_rd_idx3 : 6;
-    uint32_t reserved3 : 2;
-} __attribute__((packed, aligned(4))) apu_dir_bidx_t;
-
-typedef struct _apu_fir_coef
-{
-    uint32_t fir_tap0 : 16;
-    uint32_t fir_tap1 : 16;
-} __attribute__((packed, aligned(4))) apu_fir_coef_t;
-
-typedef struct _apu_dwsz_cfg
-{
-    /**
-     * The down-sizing ratio used for direction searching.
-     * 0x0: no down-sizing;
-     * 0x1: 1/2 down sizing;
-     * 0x2: 1/3 down sizing;
-     * . . . . . .
-     * 0xF: 1/16 down sizing.
-     */
-    uint32_t dir_dwn_siz_rate : 4;
-    /**
-     * The down-sizing ratio used for voice stream generation.
-     * 0x0: no down-sizing;
-     * 0x1: 1/2 down sizing;
-     * 0x2: 1/3 down sizing;
-     * . . . . . .
-     * 0xF: 1/16 down sizing.
-     */
-    uint32_t voc_dwn_siz_rate : 4;
-    /**
-     * This bit field is used to perform sample precision reduction when
-     * the source sound sample (from I2S0 host receiving channels)
-     * precision is 20/24/32 bits.
-     * 0x0: take bits 15~0 from the source sound sample;
-     * 0x1: take bits 16~1 from the source sound sample;
-     * 0x2: take bits 17~2 from the source sound sample;
-     * . . . . . .
-     * 0x10: take bits 31~16 from the source sound sample;
-     */
-    uint32_t smpl_shift_bits : 5;
-    uint32_t reserved : 19;
-} __attribute__((packed, aligned(4))) apu_dwsz_cfg_t;
-
-/*0x31c*/
-typedef struct _apu_fft_cfg
-{
-    uint32_t fft_shift_factor : 9;
-    uint32_t reserved1 : 3;
-    uint32_t fft_enable : 1;
-    uint32_t reserved2 : 19;
-} __attribute__((packed, aligned(4))) apu_fft_cfg_t;
-
-/*0x328*/
-typedef struct _apu_int_stat
-{
-    /**
-     * sound direction searching data ready interrupt event.
-     * Writing '1' to clear this interrupt event.
-     * 0x1: data is ready for sound direction detect;
-     * 0x0: no event.
-     */
-    uint32_t dir_search_data_rdy : 1;
-    /**
-     * voice output stream buffer data ready interrupt event.
-     * When a block of 512 voice samples are collected, this interrupt event
-     * is asserted. Writing '1' to clear this interrupt event. 0x1: voice
-     * output stream buffer data is ready; 0x0: no event.
-     */
-    uint32_t voc_buf_data_rdy : 1;
-    uint32_t reserved : 30;
-} __attribute__((packed, aligned(4))) apu_int_stat_t;
-
-/*0x32c*/
-typedef struct _apu_int_mask
-{
-    /**
-     * This is the interrupt mask to dir searching data ready interrupt.
-     * 0x1: mask off this interrupt;
-     * 0x0: enable this interrupt.
-     */
-    uint32_t dir_data_rdy_msk : 1;
-    /**
-     * This is the interrupt mask to voice output stream buffer ready
-     * interrupt. 0x1: mask off this interrupt; 0x0: enable this interrupt.
-     */
-    uint32_t voc_buf_rdy_msk : 1;
-    uint32_t reserved : 30;
-} __attribute__((packed, aligned(4))) apu_int_mask_t;
-
-typedef struct _apu_reg
-{
-    //0x200
-    apu_ch_cfg_t     bf_ch_cfg_reg;
-    //0x204
-    apu_ctl_t            bf_ctl_reg;
-    //0x208
-    apu_dir_bidx_t       bf_dir_bidx[16][2];
-    //0x288
-    apu_fir_coef_t       bf_pre_fir0_coef[9];
-    //0x2ac
-    apu_fir_coef_t       bf_post_fir0_coef[9];
-    //0x2d0
-    apu_fir_coef_t       bf_pre_fir1_coef[9];
-    //0x2f4
-    apu_fir_coef_t       bf_post_fir1_coef[9];
-    //0x318
-    apu_dwsz_cfg_t       bf_dwsz_cfg_reg;
-    //0x31c
-    apu_fft_cfg_t        bf_fft_cfg_reg;
-    // 0x320
-    /**
-     * This is the read register for system DMA to read data stored in
-     * sample out buffers (the sample out buffers are used for sound
-     * direction detect). Each data contains two sound samples.
-     */
-    volatile uint32_t           sobuf_dma_rdata;
-    // 0x324
-    /**
-     * This is the read register for system DMA to read data stored in voice
-     * out buffers (the voice out buffers are used for voice recognition).
-     * Each data contains two sound samples.
-     */
-    volatile uint32_t           vobuf_dma_rdata;
-    /*0x328*/
-    apu_int_stat_t       bf_int_stat_reg;
-    /*0x32c*/
-    apu_int_mask_t       bf_int_mask_reg;
-    /*0x330*/
-    uint32_t                saturation_counter;
-    /*0x334*/
-    uint32_t                saturation_limits;
-} __attribute__((packed, aligned(4))) apu_reg_t;
-
-extern volatile apu_reg_t *const apu;
-
-/**
- * @brief       Voice strength average value right shift factor.  When performing sound direction detect,
- *              the average value of samples from different channels is required, this right shift factor
- *              is used to perform division.
- *
- * @param[in]   gain            value of audio gain.
- *                              0x0: no right shift;
- *                              0x1: right shift by 1-bit;
- *                              . . . . . .
- *                              0xF: right shift by 15-bit.
- *
- */
-void apu_set_audio_gain(uint16_t gain);
-
-/**
- * @brief       Set sampling shift.
- *
- * @param[in]   smpl_shift             vlaue of sampling shift
- *
- */
-void apu_set_smpl_shift(uint8_t smpl_shift);
-
-/**
- * @brief       Get sampling shift
- *
- * @return      vlaue of sampling shift
- */
-uint8_t apu_get_smpl_shift(void);
-
-/**
- * @brief       APU unit sound channel enable control bits.  Bit 'x' corresponds to enable bit for sound
- *              channel 'x' (x = 0, 1, 2, . . ., 7).  APU sound channels are related with I2S host RX channels.
- *              APU sound channel 0/1 correspond to the left/right channel of I2S RX0; APU channel 2/3 correspond
- *              to left/right channels of I2S RX1; and things like that.  Software write '1' to enable a sound
- *              channel and hardware automatically clear the bit after the sample buffers used for direction
- *              searching is filled full.
- *
- *
- * @param[in]   channel_bit         APU sound channel.0x1: writing
- *                                  '1' to enable the corresponding APU sound channel.
- *
- */
-void apu_set_channel_enabled(uint8_t channel_bit);
-
-/**
- * @brief       I2S host beam-forming direction sample ibuffer read index configure register
- *
- * @param[in]   dir_num          the direction of index
- * @param[in]   dir_bidx
- *
- */
-void apu_set_direction_delay(uint8_t dir_num, uint8_t *dir_bidx);
-
-/**
- * @brief       I2S host beam-forming direction sample ibuffer read index configure register
- *
- * @param[in]   radius               radius
- * @param[in]   mic_num_a_circle     the num of mic per circle
- * @param[in]   center               0: no center mic, 1:have center mic
- *
- */
-void apu_set_delay(float radius, uint8_t mic_num_a_circle, uint8_t center);
-
-/**
- * @brief       Set ffp shift factor
- *
- * @param[in]   enable_flag               enable fft
- * @param[in]   shift_factor              shift factor
- *
- */
-void apu_set_fft_shift_factor(uint8_t enable_flag, uint16_t shift_factor);
-
-/**
- * @brief       Set down-sizing ratio used for voice direction searching and voice stream generation.
- *
- * @param[in]   dir_dwn_siz               down-sizing ratio used for voice direction searching
- *                                        0x0: no down-sizing
- *                                        0x1: 1/2 down sizing
- *                                        0x2: 1/3 down sizing
- *                                        . . . . . .
- *                                        0xF: 1/16 down sizing
- * @param[in]   voc_dwn_siz               down-sizing ratio used for voice stream generation
- *                                        0x0: no down-sizing
- *                                        0x1: 1/2 down sizing
- *                                        0x2: 1/3 down sizing
- *                                        . . . . . .
- *                                        0xF: 1/16 down sizing
- */
-void apu_set_down_size(uint8_t dir_dwn_siz, uint8_t voc_dwn_siz);
-
-/**
- * @brief       Set direction and voice interrupt mask
- *
- * @param[in]   dir_int_mask                direction interrupt mask
- * @param[in]   voc_int_mask                voice interrupt mask
- *
- */
-void apu_set_interrupt_mask(uint8_t dir_int_mask, uint8_t voc_int_mask);
-
-/**
- * @brief       Enable direction searching.
- *
- */
-void apu_dir_enable(void);
-
-/**
- * @brief       Reset direction searching.
- *
- */
-void apu_dir_reset(void);
-
-/**
- * @brief       I2S host beam-forming Filter FIR16 Coefficient Register
- *
- * @param[in]   fir_coef                direction prev FIR
- *
- */
-void apu_dir_set_prev_fir(uint16_t *fir_coef);
-
-/**
- * @brief       I2S host beam-forming Filter FIR16 Coefficient Register
- *
- * @param[in]   fir_coef                direction post FIR
- *
- */
-void apu_dir_set_post_fir(uint16_t *fir_coef);
-
-/**
- * @brief       Set down-sizing ratio used for voice direction searching
- *
- * @param[in]   dir_dwn_siz               down-sizing ratio used for voice direction searching
- *                                        0x0: no down-sizing
- *                                        0x1: 1/2 down sizing
- *                                        0x2: 1/3 down sizing
- *                                        . . . . . .
- *                                        0xF: 1/16 down sizing
- */
-void apu_dir_set_down_size(uint8_t dir_dwn_size);
-
-/**
- * @brief       Set direction searching interrupt mask
- *
- * @param[in]   dir_int_mask                direction interrupt mask
- *
- */
-void apu_dir_set_interrupt_mask(uint8_t dir_int_mask);
-
-/**
- * @brief       Clear direction interrupt
- *
- */
-void apu_dir_clear_int_state(void);
-
-/**
- * @brief        Valid voice sample stream generation enable bit.  After sound direction searching is done, software can
- *               configure this bit to generate a stream of voice samples for voice recognition.
- *
- * @param[in]   enable_flag                0x1: enable output of voice sample stream. 0x0: stop the voice samlpe stream output.
- *
- */
-void apu_voc_enable(uint8_t enable_flag);
-
-/**
- * @brief       Reset voice sample
- *
- */
-void apu_voc_reset(void);
-
-/**
- * @brief        Target direction select for valid voice output.  When the source voice direaction searching
- *               is done, software can use this field to select one from 16 sound directions for the following
- *               voice recognition
- *
- * @param[in]   direction                0x0: select sound direction 0;
- *                                       0x1: select sound direction 1;
- *                                       . . . . . .
- *                                       0xF: select sound direction 15.
- */
-void apu_voc_set_direction(en_bf_dir_t direction);
-
-/**
- * @brief       I2S host beam-forming Filter FIR16 Coefficient Register
- *
- * @param[in]   fir_coef                voice prev FIR
- *
- */
-void apu_voc_set_prev_fir(uint16_t *fir_coef);
-
-/**
- * @brief       I2S host beam-forming Filter FIR16 Coefficient Register
- *
- * @param[in]   fir_coef                voice post FIR
- *
- */
-void apu_voc_set_post_fir(uint16_t *fir_coef);
-
-/**
- * @brief       Set down-sizing ratio used for voice stream generation.
- *
- * @param[in]   voc_dwn_siz               down-sizing ratio used for voice stream generation
- *                                        0x0: no down-sizing
- *                                        0x1: 1/2 down sizing
- *                                        0x2: 1/3 down sizing
- *                                        . . . . . .
- *                                        0xF: 1/16 down sizing
- */
-void apu_voc_set_down_size(uint8_t voc_dwn_size);
-
-/**
- * @brief       Set voice stream generation interrupt mask
- *
- * @param[in]   voc_int_mask                voice interrupt mask
- *
- */
-void apu_voc_set_interrupt_mask(uint8_t voc_int_mask);
-
-/**
- * @brief       Clear voice interrupt
- *
- */
-void apu_voc_clear_int_state(void);
-
-/**
- * @brief       Reset saturation_counter
- *
- */
-void apu_voc_reset_saturation_counter(void);
-
-/**
- * @brief       Get saturation counter
- *
- * @return      vlaue of saturation counter.heigh 16 bit is counter, low 16 bit is total
- */
-uint32_t apu_voc_get_saturation_counter(void);
-
-/**
- * @brief        set saturation limit
- *
- * @param[in]    upper                  heigh 16 bit is counter
- * @param[in]    bottom                 low 16 bit is total
- *
- */
-void apu_voc_set_saturation_limit(uint16_t upper, uint16_t bottom);
-
-/**
- * @brief       Get saturation limit
- *
- * @return      vlaue of saturation limit.heigh 16 bit is counter, low 16 bit is total
- */
-uint32_t apu_voc_get_saturation_limit(void);
-
-/**
- * @brief       Print apu setting for debug
- *
- */
-void apu_print_setting(void);
-
-#if defined(__cplusplus)
-}
-#endif
-#endif
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/atomic.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/atomic.h
deleted file mode 100644
index b3eb1c58a..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/atomic.h
+++ /dev/null
@@ -1,254 +0,0 @@
-
-/* Copyright 2018 Canaan Inc.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
-* @file atomic.h
-* @brief kendryte k210 source code
-*                https://github.com/kendryte/kendryte-standalone-sdk.git
-* @version 1.0
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
-
-#ifndef _BSP_ATOMIC_H
-#define _BSP_ATOMIC_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-
-#define SPINLOCK_INIT \
-    {                 \
-        0             \
-    }
-
-#define CORELOCK_INIT          \
-    {                          \
-        .lock = SPINLOCK_INIT, \
-        .count = 0,            \
-        .core = -1             \
-    }
-
-
-/* Defination of memory barrier macro */
-#define mb()                          \
-    {                                 \
-        asm volatile("fence" ::       \
-                         : "memory"); \
-    }
-
-#define atomic_set(ptr, val) (*(volatile typeof(*(ptr))*)(ptr) = val)
-#define atomic_read(ptr) (*(volatile typeof(*(ptr))*)(ptr))
-
-#ifndef __riscv_atomic
-#error "atomic extension is required."
-#endif
-#define atomic_add(ptr, inc) __sync_fetch_and_add(ptr, inc)
-#define atomic_or(ptr, inc) __sync_fetch_and_or(ptr, inc)
-#define atomic_swap(ptr, swp) __sync_lock_test_and_set(ptr, swp)
-#define atomic_cas(ptr, cmp, swp) __sync_val_compare_and_swap(ptr, cmp, swp)
-
-typedef struct _spinlock
-{
-    int lock;
-} spinlock_t;
-
-typedef struct _semaphore
-{
-    spinlock_t lock;
-    int count;
-    int waiting;
-} semaphore_t;
-
-
-typedef struct _corelock
-{
-    spinlock_t lock;
-    int count;
-    int core;
-} corelock_t;
-
-static inline int spinlock_trylock(spinlock_t *lock)
-{
-    int res = atomic_swap(&lock->lock, -1);
-    /* Use memory barrier to keep coherency */
-    mb();
-    return res;
-}
-
-static inline void spinlock_lock(spinlock_t *lock)
-{
-    while (spinlock_trylock(lock));
-}
-
-static inline void spinlock_unlock(spinlock_t *lock)
-{
-    /* Use memory barrier to keep coherency */
-    mb();
-    atomic_set(&lock->lock, 0);
-    asm volatile ("nop");
-}
-
-static inline void semaphore_signal(semaphore_t *semaphore, int i)
-{
-    spinlock_lock(&(semaphore->lock));
-    semaphore->count += i;
-    spinlock_unlock(&(semaphore->lock));
-}
-
-static inline void semaphore_wait(semaphore_t *semaphore, int i)
-{
-    atomic_add(&(semaphore->waiting), 1);
-    while (1)
-    {
-        spinlock_lock(&(semaphore->lock));
-        if (semaphore->count >= i)
-        {
-            semaphore->count -= i;
-            atomic_add(&(semaphore->waiting), -1);
-            spinlock_unlock(&(semaphore->lock));
-            break;
-        }
-        spinlock_unlock(&(semaphore->lock));
-    }
-}
-
-static inline int semaphore_count(semaphore_t *semaphore)
-{
-    int res = 0;
-
-    spinlock_lock(&(semaphore->lock));
-    res = semaphore->count;
-    spinlock_unlock(&(semaphore->lock));
-    return res;
-}
-
-static inline int semaphore_waiting(semaphore_t *semaphore)
-{
-    return atomic_read(&(semaphore->waiting));
-}
-
-static inline int corelock_trylock(corelock_t *lock)
-{
-    int res = 0;
-    unsigned long core;
-
-    asm volatile("csrr %0, mhartid;"
-                 : "=r"(core));
-    if(spinlock_trylock(&lock->lock))
-    {
-        return -1;
-    }
-
-    if (lock->count == 0)
-    {
-        /* First time get lock */
-        lock->count++;
-        lock->core = core;
-        res = 0;
-    }
-    else if (lock->core == core)
-    {
-        /* Same core get lock */
-        lock->count++;
-        res = 0;
-    }
-    else
-    {
-        /* Different core get lock */
-        res = -1;
-    }
-    spinlock_unlock(&lock->lock);
-
-    return res;
-}
-
-static inline void corelock_lock(corelock_t *lock)
-{
-    unsigned long core;
-
-    asm volatile("csrr %0, mhartid;"
-                 : "=r"(core));
-    spinlock_lock(&lock->lock);
-
-    if (lock->count == 0)
-    {
-        /* First time get lock */
-        lock->count++;
-        lock->core = core;
-    }
-    else if (lock->core == core)
-    {
-        /* Same core get lock */
-        lock->count++;
-    }
-    else
-    {
-        /* Different core get lock */
-        spinlock_unlock(&lock->lock);
-
-        do
-        {
-            while (atomic_read(&lock->count))
-                ;
-        } while (corelock_trylock(lock));
-        return;
-    }
-    spinlock_unlock(&lock->lock);
-}
-
-static inline void corelock_unlock(corelock_t *lock)
-{
-    unsigned long core;
-
-    asm volatile("csrr %0, mhartid;"
-                 : "=r"(core));
-    spinlock_lock(&lock->lock);
-
-    if (lock->core == core)
-    {
-        /* Same core release lock */
-        lock->count--;
-        if (lock->count <= 0)
-        {
-            lock->core = -1;
-            lock->count = 0;
-        }
-    }
-    else
-    {
-        /* Different core release lock */
-        spinlock_unlock(&lock->lock);
-
-        register unsigned long a7 asm("a7") = 93;
-        register unsigned long a0 asm("a0") = 0;
-        register unsigned long a1 asm("a1") = 0;
-        register unsigned long a2 asm("a2") = 0;
-
-        asm volatile("scall"
-                     : "+r"(a0)
-                     : "r"(a1), "r"(a2), "r"(a7));
-    }
-    spinlock_unlock(&lock->lock);
-}
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* _BSP_ATOMIC_H */
-
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/bsp.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/bsp.h
deleted file mode 100644
index 5ef25bac7..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/bsp.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/**
-* @file bsp.h
-* @brief kendryte k210 source code
-*                https://github.com/kendryte/kendryte-standalone-sdk.git
-* @version 1.0
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
-
-#ifndef _KENDRYTE_BSP_H
-#define _KENDRYTE_BSP_H
-#include "atomic.h"
-#include "encoding.h"
-#endif
\ No newline at end of file
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/clint.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/clint.c
deleted file mode 100644
index 3ad5b6f53..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/clint.c
+++ /dev/null
@@ -1,271 +0,0 @@
-/* Copyright 2018 Canaan Inc.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
-* @file clint.c
-* @brief kendryte k210 source code
-*                https://github.com/kendryte/kendryte-standalone-sdk.git
-* @version 1.0
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
-
-#include <stddef.h>
-#include <stdint.h>
-#include "encoding.h"
-#include "clint.h"
-#include "sysctl.h"
-
-volatile clint_t* const clint = (volatile clint_t*)CLINT_BASE_ADDR;
-static clint_timer_instance_t clint_timer_instance[CLINT_NUM_CORES];
-static clint_ipi_instance_t clint_ipi_instance[CLINT_NUM_CORES];
-
-uint64_t clint_get_time(void)
-{
-    /* No difference on cores */
-    return clint->mtime;
-}
-
-int clint_timer_init(void)
-{
-    /* Read core id */
-    unsigned long core_id = current_coreid();
-    /* Clear the Machine-Timer bit in MIE */
-    clear_csr(mie, MIP_MTIP);
-    /* Fill core's instance with original data */
-
-    /* clang-format off */
-    clint_timer_instance[core_id] = (const clint_timer_instance_t)
-    {
-        .interval    = 0,
-        .cycles      = 0,
-        .single_shot = 0,
-        .callback    = NULL,
-        .ctx         = NULL,
-    };
-    /* clang-format on */
-
-    return 0;
-}
-
-int clint_timer_stop(void)
-{
-    /* Clear the Machine-Timer bit in MIE */
-    clear_csr(mie, MIP_MTIP);
-    return 0;
-}
-
-uint64_t clint_timer_get_freq(void)
-{
-    /* The clock is divided by CLINT_CLOCK_DIV */
-    return sysctl_clock_get_freq(SYSCTL_CLOCK_CPU) / CLINT_CLOCK_DIV;
-}
-
-int clint_timer_start(uint64_t interval, int single_shot)
-{
-    /* Read core id */
-    unsigned long core_id = current_coreid();
-    /* Set timer interval */
-    if (clint_timer_set_interval(interval) != 0)
-        return -1;
-    /* Set timer single shot */
-    if (clint_timer_set_single_shot(single_shot) != 0)
-        return -1;
-    /* Check settings to prevent interval is 0 */
-    if (clint_timer_instance[core_id].interval == 0)
-        return -1;
-    /* Check settings to prevent cycles is 0 */
-    if (clint_timer_instance[core_id].cycles == 0)
-        return -1;
-    /* Add cycle interval to mtimecmp */
-    uint64_t now = clint->mtime;
-    uint64_t then = now + clint_timer_instance[core_id].cycles;
-    /* Set mtimecmp by core id */
-    clint->mtimecmp[core_id] = then;
-    /* Enable interrupts in general */
-    set_csr(mstatus, MSTATUS_MIE);
-    /* Enable the Machine-Timer bit in MIE */
-    set_csr(mie, MIP_MTIP);
-    return 0;
-}
-
-uint64_t clint_timer_get_interval(void)
-{
-    /* Read core id */
-    unsigned long core_id = current_coreid();
-    return clint_timer_instance[core_id].interval;
-}
-
-int clint_timer_set_interval(uint64_t interval)
-{
-    /* Read core id */
-    unsigned long core_id = current_coreid();
-    /* Check parameter */
-    if (interval == 0)
-        return -1;
-
-    /* Assign user interval with Millisecond(ms) */
-    clint_timer_instance[core_id].interval = interval;
-    /* Convert interval to cycles */
-    clint_timer_instance[core_id].cycles = interval * clint_timer_get_freq() / 1000ULL;
-    return 0;
-}
-
-int clint_timer_get_single_shot(void)
-{
-    /* Read core id */
-    unsigned long core_id = current_coreid();
-    /* Get single shot mode by core id */
-    return clint_timer_instance[core_id].single_shot;
-}
-
-int clint_timer_set_single_shot(int single_shot)
-{
-    /* Read core id */
-    unsigned long core_id = current_coreid();
-    /* Set single shot mode by core id */
-    clint_timer_instance[core_id].single_shot = single_shot;
-    return 0;
-}
-
-int clint_timer_register(clint_timer_callback_t callback, void *ctx)
-{
-    /* Read core id */
-    unsigned long core_id = current_coreid();
-    /* Set user callback function */
-    clint_timer_instance[core_id].callback = callback;
-    /* Assign user context */
-    clint_timer_instance[core_id].ctx = ctx;
-    return 0;
-}
-
-int clint_timer_unregister(void)
-{
-    /* Just assign NULL to user callback function and context */
-    return clint_timer_register(NULL, NULL);
-}
-
-int clint_ipi_init(void)
-{
-    /* Read core id */
-    unsigned long core_id = current_coreid();
-    /* Clear the Machine-Software bit in MIE */
-    clear_csr(mie, MIP_MSIP);
-    /* Fill core's instance with original data */
-    /* clang-format off */
-    clint_ipi_instance[core_id] = (const clint_ipi_instance_t){
-        .callback    = NULL,
-        .ctx         = NULL,
-    };
-    /* clang-format on */
-
-    return 0;
-}
-
-int clint_ipi_enable(void)
-{
-    /* Enable interrupts in general */
-    set_csr(mstatus, MSTATUS_MIE);
-    /* Set the Machine-Software bit in MIE */
-    set_csr(mie, MIP_MSIP);
-    return 0;
-}
-
-int clint_ipi_disable(void)
-{
-    /* Clear the Machine-Software bit in MIE */
-    clear_csr(mie, MIP_MSIP);
-    return 0;
-}
-
-int clint_ipi_send(size_t core_id)
-{
-    if (core_id >= CLINT_NUM_CORES)
-        return -1;
-    clint->msip[core_id].msip = 1;
-    return 0;
-}
-
-int clint_ipi_clear(size_t core_id)
-{
-    if (core_id >= CLINT_NUM_CORES)
-        return -1;
-    if (clint->msip[core_id].msip)
-    {
-        clint->msip[core_id].msip = 0;
-        return 1;
-    }
-    return 0;
-}
-
-int clint_ipi_register(clint_ipi_callback_t callback, void *ctx)
-{
-    /* Read core id */
-    unsigned long core_id = current_coreid();
-    /* Set user callback function */
-    clint_ipi_instance[core_id].callback = callback;
-    /* Assign user context */
-    clint_ipi_instance[core_id].ctx = ctx;
-    return 0;
-}
-
-int clint_ipi_unregister(void)
-{
-    /* Just assign NULL to user callback function and context */
-    return clint_ipi_register(NULL, NULL);
-}
-
-uintptr_t handle_irq_m_timer(uintptr_t cause, uintptr_t epc)
-{
-    /* Read core id */
-    uint64_t core_id = current_coreid();
-    uint64_t ie_flag = read_csr(mie);
-
-    clear_csr(mie, MIP_MTIP | MIP_MSIP);
-    set_csr(mstatus, MSTATUS_MIE);
-    if (clint_timer_instance[core_id].callback != NULL)
-        clint_timer_instance[core_id].callback(
-            clint_timer_instance[core_id].ctx);
-    clear_csr(mstatus, MSTATUS_MIE);
-    set_csr(mstatus, MSTATUS_MPIE | MSTATUS_MPP);
-    write_csr(mie, ie_flag);
-    /* If not single shot and cycle interval is not 0, repeat this timer */
-    if (!clint_timer_instance[core_id].single_shot && clint_timer_instance[core_id].cycles != 0)
-    {
-        /* Set mtimecmp by core id */
-        clint->mtimecmp[core_id] += clint_timer_instance[core_id].cycles;
-    }
-    else
-        clear_csr(mie, MIP_MTIP);
-    return epc;
-}
-
-uintptr_t handle_irq_m_soft(uintptr_t cause, uintptr_t epc)
-{
-    /* Read core id */
-    uint64_t core_id = current_coreid();
-    /* Clear the Machine-Software bit in MIE to prevent call again */
-    clear_csr(mie, MIP_MSIP);
-    set_csr(mstatus, MSTATUS_MIE);
-    /* Clear ipi flag */
-    clint_ipi_clear(core_id);
-    if (clint_ipi_instance[core_id].callback != NULL)
-        clint_ipi_instance[core_id].callback(clint_ipi_instance[core_id].ctx);
-    clear_csr(mstatus, MSTATUS_MIE);
-    set_csr(mstatus, MSTATUS_MPIE | MSTATUS_MPP);
-    set_csr(mie, MIP_MSIP);
-    return epc;
-}
-
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/clint.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/clint.h
deleted file mode 100644
index 7f0aeb193..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/clint.h
+++ /dev/null
@@ -1,347 +0,0 @@
-/* Copyright 2018 Canaan Inc.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-/**
- * @file
- * @brief      The CLINT block holds memory-mapped control and status registers
- *             associated with local interrupts for a Coreplex.
- *
- * @note       CLINT RAM Layout
- *
- * | Address   -| Description                     |
- * |------------|---------------------------------|
- * | 0x02000000 | msip for core 0                 |
- * | 0x02000004 | msip for core 1                 |
- * | ...        | ...                             |
- * | 0x02003FF8 | msip for core 4094              |
- * |            |                                 |
- * | 0x02004000 | mtimecmp for core 0             |
- * | 0x02004008 | mtimecmp for core 1             |
- * | ...        | ...                             |
- * | 0x0200BFF0 | mtimecmp For core 4094          |
- * | 0x0200BFF8 | mtime                           |
- * |            |                                 |
- * | 0x0200C000 | Reserved                        |
- * | ...        | ...                             |
- * | 0x0200EFFC | Reserved                        |
- */
-
-/**
-* @file clint.h
-* @brief kendryte k210 source code
-*                https://github.com/kendryte/kendryte-standalone-sdk.git
-* @version 1.0
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
-
-#ifndef _DRIVER_CLINT_H
-#define _DRIVER_CLINT_H
-
-#include <stddef.h>
-#include <stdint.h>
-#include "platform.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* clang-format off */
-/* Register address offsets */
-#define CLINT_MSIP          (0x0000)
-#define CLINT_MSIP_SIZE     (0x4)
-#define CLINT_MTIMECMP      (0x4000)
-#define CLINT_MTIMECMP_SIZE (0x8)
-#define CLINT_MTIME         (0xBFF8)
-#define CLINT_MTIME_SIZE    (0x8)
-/* Max number of cores */
-#define CLINT_MAX_CORES     (4095)
-/* Real number of cores */
-#define CLINT_NUM_CORES     (2)
-/* Clock frequency division factor */
-#define CLINT_CLOCK_DIV     (50)
-/* clang-format on */
-
-/**
- * @brief       MSIP Registers
- *
- *              Machine-mode software interrupts are generated by writing to a
- *              per-core memory-mapped control register. The msip registers are
- *              32-bit wide WARL registers, where the LSB is reflected in the
- *              msip bit of the associated core鈥檚 mip register. Other bits in
- *              the msip registers are hardwired to zero. The mapping supports
- *              up to 4095 machine-mode cores.
- */
-typedef struct _clint_msip
-{
-    uint32_t msip : 1;  /*!< Bit 0 is msip */
-    uint32_t zero : 31; /*!< Bits [32:1] is 0 */
-} __attribute__((packed, aligned(4))) clint_msip_t;
-
-/**
- * @brief       Timer compare Registers Machine-mode timer interrupts are
- *              generated by a real-time counter and a per-core comparator. The
- *              mtime register is a 64-bit read-only register that contains the
- *              current value of the real-time counter. Each mtimecmp register
- *              holds its core鈥檚 time comparator. A timer interrupt is pending
- *              whenever mtime is greater than or equal to the value in a
- *              core鈥檚 mtimecmp register. The timer interrupt is reflected in
- *              the mtip bit of the associated core鈥檚 mip register.
- */
-typedef uint64_t clint_mtimecmp_t;
-
-/**
- * @brief       Timer Registers
- *
- *              The mtime register has a 64-bit precision on all RV32, RV64,
- *              and RV128 systems. Platforms provide a 64-bit memory-mapped
- *              machine-mode timer compare register (mtimecmp), which causes a
- *              timer interrupt to be posted when the mtime register contains a
- *              value greater than or equal to the value in the mtimecmp
- *              register. The interrupt remains posted until it is cleared by
- *              writing the mtimecmp register. The interrupt will only be taken
- *              if interrupts are enabled and the MTIE bit is set in the mie
- *              register.
- */
-typedef uint64_t clint_mtime_t;
-
-/**
- * @brief       CLINT object
- *
- *              Coreplex-Local INTerrupts, which includes software interrupts,
- *              local timer interrupts, and other interrupts routed directly to
- *              a core.
- */
-typedef struct _clint
-{
-    /* 0x0000 to 0x3FF8, MSIP Registers */
-    clint_msip_t msip[CLINT_MAX_CORES];
-    /* Resverd space, do not use */
-    uint32_t resv0;
-    /* 0x4000 to 0xBFF0, Timer Compare Registers */
-    clint_mtimecmp_t mtimecmp[CLINT_MAX_CORES];
-    /* 0xBFF8, Time Register */
-    clint_mtime_t mtime;
-} __attribute__((packed, aligned(4))) clint_t;
-
-/**
- * @brief       Clint object instanse
- */
-extern volatile clint_t* const clint;
-
-/**
- * @brief       Definitions for the timer callbacks
- */
-typedef int (*clint_timer_callback_t)(void *ctx);
-
-/**
- * @brief       Definitions for local interprocessor interrupt callbacks
- */
-typedef int (*clint_ipi_callback_t)(void *ctx);
-
-typedef struct _clint_timer_instance
-{
-    uint64_t interval;
-    uint64_t cycles;
-    uint64_t single_shot;
-    clint_timer_callback_t callback;
-    void *ctx;
-} clint_timer_instance_t;
-
-typedef struct _clint_ipi_instance
-{
-    clint_ipi_callback_t callback;
-    void *ctx;
-} clint_ipi_instance_t;
-
-/**
- * @brief       Get the time form CLINT timer register
- *
- * @note        The CLINT must init to get right time
- *
- * @return      64bit Time
- */
-uint64_t clint_get_time(void);
-
-/**
- * @brief       Init the CLINT timer
- *
- * @note        MIP_MTIP will be clear after init. The MSTATUS_MIE must set by
- *              user.
- *
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-int clint_timer_init(void);
-
-/**
- * @brief       Stop the CLINT timer
- *
- * @note        MIP_MTIP will be clear after stop
- *
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-int clint_timer_stop(void);
-
-/**
- * @brief       Start the CLINT timer
- *
- * @param[in]   interval        The interval with Millisecond(ms)
- * @param[in]   single_shot     Single shot or repeat
- *
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-int clint_timer_start(uint64_t interval, int single_shot);
-
-/**
- * @brief       Get the interval of timer
- *
- * @return      The interval with Millisecond(ms)
- */
-uint64_t clint_timer_get_interval(void);
-
-/**
- * @brief       Set the interval with Millisecond(ms)
- *
- * @param[in]   interval  The interval with Millisecond(ms)
- *
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-int clint_timer_set_interval(uint64_t interval);
-
-/**
- * @brief      Get whether the timer is a single shot timer
- *
- * @return     result
- *     - 0     It is a repeat timer
- *     - 1     It is a single shot timer
- */
-int clint_timer_get_single_shot(void);
-
-/**
- * @brief       Set the timer working as a single shot timer or repeat timer
- *
- * @param[in]   single_shot  Single shot or repeat
- *
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-int clint_timer_set_single_shot(int single_shot);
-
-/**
- * @brief       Set user callback function when timer is timeout
- *
- * @param[in]   callback        The callback function
- * @param[in]   ctx             The context
- *
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-int clint_timer_register(clint_timer_callback_t callback, void *ctx);
-
-/**
- * @brief       Deregister user callback function
- *
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-int clint_timer_unregister(void);
-
-/**
- * @brief       Initialize local interprocessor interrupt
- *
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-int clint_ipi_init(void);
-
-/**
- * @brief       Enable local interprocessor interrupt
- *
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-int clint_ipi_enable(void);
-
-/**
- * @brief       Disable local interprocessor interrupt
- *
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-int clint_ipi_disable(void);
-
-/**
- * @brief       Send local interprocessor interrupt to core by core id
- *
- * @param[in]   core_id  The core identifier
- *
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-int clint_ipi_send(size_t core_id);
-
-/**
- * @brief       Clear local interprocessor interrupt
- *
- * @param[in]   core_id  The core identifier
- *
- * @return      result
- *     - 1      An IPI was pending
- *     - 0      Non IPI was pending
- *     - -1     Fail
- */
-int clint_ipi_clear(size_t core_id);
-
-/**
- * @brief      Set user callback function when interprocessor interrupt
- *
- * @param[in]   callback        The callback function
- * @param[in]   ctx             The context
- *
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-int clint_ipi_register(clint_ipi_callback_t callback, void *ctx);
-
-/**
- * @brief       Deregister user callback function
- *
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-int clint_ipi_unregister(void);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* _DRIVER_CLINT_H */
-
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/dmac.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/dmac.c
deleted file mode 100644
index 30d79f3f1..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/dmac.c
+++ /dev/null
@@ -1,808 +0,0 @@
-/* Copyright 2018 Canaan Inc.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
-* @file damc.c
-* @brief kendryte k210 source code
-*                https://github.com/kendryte/kendryte-standalone-sdk.git
-* @version 1.0
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
-
-#include <stdint.h>
-#include <stddef.h>
-#include <stdio.h>
-#include "dmac.h"
-#include "sysctl.h"
-#include "fpioa.h"
-#include "utils.h"
-#include "plic.h"
-#include "stdlib.h"
-#include <nuttx/arch.h>
-#include <arch/irq.h>
-
-volatile dmac_t *const dmac = (dmac_t *)DMAC_BASE_ADDR;
-
-typedef struct _dmac_context
-{
-    dmac_channel_number_t dmac_channel;
-    plic_irq_callback_t callback;
-    void *ctx;
-} dmac_context_t;
-
-dmac_context_t dmac_context[6];
-
-static int is_memory(uintptr_t address)
-{
-    enum {
-        mem_len = 6 * 1024 * 1024,
-        mem_no_cache_len = 8 * 1024 * 1024,
-    };
-    return ((address >= 0x80000000) && (address < 0x80000000 + mem_len)) || ((address >= 0x40000000) && (address < 0x40000000 + mem_no_cache_len)) || (address == 0x50450040);
-}
-
-uint64_t dmac_read_id(void)
-{
-    return dmac->id;
-}
-
-uint64_t dmac_read_version(void)
-{
-    return dmac->compver;
-}
-
-uint64_t dmac_read_channel_id(dmac_channel_number_t channel_num)
-{
-    return dmac->channel[channel_num].axi_id;
-}
-
-static void dmac_enable(void)
-{
-    dmac_cfg_u_t  dmac_cfg;
-
-    dmac_cfg.data = readq(&dmac->cfg);
-    dmac_cfg.cfg.dmac_en = 1;
-    dmac_cfg.cfg.int_en = 1;
-    writeq(dmac_cfg.data, &dmac->cfg);
-}
-
-void dmac_disable(void)
-{
-    dmac_cfg_u_t  dmac_cfg;
-
-    dmac_cfg.data = readq(&dmac->cfg);
-    dmac_cfg.cfg.dmac_en = 0;
-    dmac_cfg.cfg.int_en = 0;
-    writeq(dmac_cfg.data, &dmac->cfg);
-}
-
-void src_transaction_complete_int_enable(dmac_channel_number_t channel_num)
-{
-    dmac_ch_intstatus_enable_u_t  ch_intstat;
-
-    ch_intstat.data = readq(&dmac->channel[channel_num].intstatus_en);
-    ch_intstat.ch_intstatus_enable.enable_src_transcomp_intstat = 1;
-
-    writeq(ch_intstat.data, &dmac->channel[channel_num].intstatus_en);
-}
-
-void dmac_channel_enable(dmac_channel_number_t channel_num)
-{
-    dmac_chen_u_t chen;
-
-    chen.data = readq(&dmac->chen);
-
-    switch (channel_num) {
-    case DMAC_CHANNEL0:
-        chen.dmac_chen.ch1_en = 1;
-        chen.dmac_chen.ch1_en_we = 1;
-        break;
-    case DMAC_CHANNEL1:
-        chen.dmac_chen.ch2_en = 1;
-        chen.dmac_chen.ch2_en_we = 1;
-        break;
-    case DMAC_CHANNEL2:
-        chen.dmac_chen.ch3_en = 1;
-        chen.dmac_chen.ch3_en_we = 1;
-        break;
-    case DMAC_CHANNEL3:
-        chen.dmac_chen.ch4_en = 1;
-        chen.dmac_chen.ch4_en_we = 1;
-        break;
-    case DMAC_CHANNEL4:
-        chen.dmac_chen.ch5_en = 1;
-        chen.dmac_chen.ch5_en_we = 1;
-        break;
-    case DMAC_CHANNEL5:
-        chen.dmac_chen.ch6_en = 1;
-        chen.dmac_chen.ch6_en_we = 1;
-        break;
-    default:
-        break;
-    }
-
-    writeq(chen.data, &dmac->chen);
-}
-
-void dmac_channel_disable(dmac_channel_number_t channel_num)
-{
-    dmac_chen_u_t chen;
-
-    chen.data = readq(&dmac->chen);
-
-    switch (channel_num)
-    {
-    case DMAC_CHANNEL0:
-        chen.dmac_chen.ch1_en = 0;
-        chen.dmac_chen.ch1_en_we = 1;
-        break;
-    case DMAC_CHANNEL1:
-        chen.dmac_chen.ch2_en = 0;
-        chen.dmac_chen.ch2_en_we = 1;
-        break;
-    case DMAC_CHANNEL2:
-        chen.dmac_chen.ch3_en = 0;
-        chen.dmac_chen.ch3_en_we = 1;
-        break;
-    case DMAC_CHANNEL3:
-        chen.dmac_chen.ch4_en = 0;
-        chen.dmac_chen.ch4_en_we = 1;
-        break;
-    case DMAC_CHANNEL4:
-        chen.dmac_chen.ch5_en = 0;
-        chen.dmac_chen.ch5_en_we = 1;
-        break;
-    case DMAC_CHANNEL5:
-        chen.dmac_chen.ch6_en = 0;
-        chen.dmac_chen.ch6_en_we = 1;
-        break;
-    default:
-        break;
-    }
-
-    writeq(chen.data, &dmac->chen);
-}
-
-int32_t dmac_check_channel_busy(dmac_channel_number_t channel_num)
-{
-    int32_t ret = 0;
-    dmac_chen_u_t chen_u;
-
-    chen_u.data = readq(&dmac->chen);
-    switch (channel_num) {
-    case DMAC_CHANNEL0:
-        if (chen_u.dmac_chen.ch1_en == 1)
-            ret = 1;
-        break;
-    case DMAC_CHANNEL1:
-        if (chen_u.dmac_chen.ch2_en == 1)
-            ret = 1;
-        break;
-    case DMAC_CHANNEL2:
-        if (chen_u.dmac_chen.ch3_en == 1)
-            ret = 1;
-        break;
-    case DMAC_CHANNEL3:
-        if (chen_u.dmac_chen.ch4_en == 1)
-            ret = 1;
-        break;
-    case DMAC_CHANNEL4:
-        if (chen_u.dmac_chen.ch5_en == 1)
-            ret = 1;
-        break;
-    case DMAC_CHANNEL5:
-        if (chen_u.dmac_chen.ch6_en == 1)
-            ret = 1;
-        break;
-    default:
-        break;
-    }
-
-    writeq(chen_u.data, &dmac->chen);
-
-    return ret;
-}
-
-int32_t dmac_set_list_master_select(dmac_channel_number_t channel_num,
-    dmac_src_dst_select_t sd_sel, dmac_master_number_t  mst_num)
-{
-    int32_t ret = 0;
-    uint64_t tmp = 0;
-    dmac_ch_ctl_u_t ctl;
-
-    ctl.data = readq(&dmac->channel[channel_num].ctl);
-    ret = dmac_check_channel_busy(channel_num);
-    if (ret == 0) {
-        if (sd_sel == DMAC_SRC || sd_sel == DMAC_SRC_DST)
-            ctl.ch_ctl.sms = mst_num;
-
-        if (sd_sel == DMAC_DST || sd_sel == DMAC_SRC_DST)
-            ctl.ch_ctl.dms = mst_num;
-        tmp |= *(uint64_t *)&dmac->channel[channel_num].ctl;
-        writeq(ctl.data, &dmac->channel[channel_num].ctl);
-    }
-
-    return ret;
-}
-
-void dmac_enable_common_interrupt_status(void)
-{
-    dmac_commonreg_intstatus_enable_u_t intstatus;
-
-    intstatus.data = readq(&dmac->com_intstatus_en);
-    intstatus.intstatus_enable.enable_slvif_dec_err_intstat = 1;
-    intstatus.intstatus_enable.enable_slvif_wr2ro_err_intstat = 1;
-    intstatus.intstatus_enable.enable_slvif_rd2wo_err_intstat = 1;
-    intstatus.intstatus_enable.enable_slvif_wronhold_err_intstat = 1;
-    intstatus.intstatus_enable.enable_slvif_undefinedreg_dec_err_intstat = 1;
-
-    writeq(intstatus.data, &dmac->com_intstatus_en);
-}
-
-void dmac_enable_common_interrupt_signal(void)
-{
-    dmac_commonreg_intsignal_enable_u_t intsignal;
-
-    intsignal.data = readq(&dmac->com_intsignal_en);
-    intsignal.intsignal_enable.enable_slvif_dec_err_intsignal = 1;
-    intsignal.intsignal_enable.enable_slvif_wr2ro_err_intsignal = 1;
-    intsignal.intsignal_enable.enable_slvif_rd2wo_err_intsignal = 1;
-    intsignal.intsignal_enable.enable_slvif_wronhold_err_intsignal = 1;
-    intsignal.intsignal_enable.enable_slvif_undefinedreg_dec_err_intsignal = 1;
-
-    writeq(intsignal.data, &dmac->com_intsignal_en);
-}
-
-static void dmac_enable_channel_interrupt(dmac_channel_number_t channel_num)
-{
-    writeq(0xffffffff, &dmac->channel[channel_num].intclear);
-    writeq(0x2, &dmac->channel[channel_num].intstatus_en);
-}
-
-void dmac_disable_channel_interrupt(dmac_channel_number_t channel_num)
-{
-    writeq(0, &dmac->channel[channel_num].intstatus_en);
-}
-
-void dmac_chanel_interrupt_clear(dmac_channel_number_t channel_num)
-{
-    writeq(0xffffffff, &dmac->channel[channel_num].intclear);
-}
-
-int dmac_set_channel_config(dmac_channel_number_t channel_num,
-        dmac_channel_config_t *cfg_param)
-{
-    dmac_ch_ctl_u_t  ctl;
-    dmac_ch_cfg_u_t cfg;
-    dmac_ch_llp_u_t ch_llp;
-
-    if (cfg_param->ctl_sms > DMAC_MASTER2)
-        return -1;
-    if (cfg_param->ctl_dms > DMAC_MASTER2)
-        return -1;
-    if (cfg_param->ctl_src_msize > DMAC_MSIZE_256)
-        return -1;
-    if (cfg_param->ctl_drc_msize > DMAC_MSIZE_256)
-        return -1;
-
-    /**
-     * cfg register must configure before ts_block and
-     * sar dar register
-     */
-    cfg.data = readq(&dmac->channel[channel_num].cfg);
-
-    cfg.ch_cfg.hs_sel_src = cfg_param->cfg_hs_sel_src;
-    cfg.ch_cfg.hs_sel_dst = cfg_param->cfg_hs_sel_dst;
-    cfg.ch_cfg.src_hwhs_pol = cfg_param->cfg_src_hs_pol;
-    cfg.ch_cfg.dst_hwhs_pol  = cfg_param->cfg_dst_hs_pol;
-    cfg.ch_cfg.src_per = cfg_param->cfg_src_per;
-    cfg.ch_cfg.dst_per = cfg_param->cfg_dst_per;
-    cfg.ch_cfg.ch_prior = cfg_param->cfg_ch_prior;
-    cfg.ch_cfg.tt_fc = cfg_param->ctl_tt_fc;
-
-    cfg.ch_cfg.src_multblk_type = cfg_param->cfg_src_multblk_type;
-    cfg.ch_cfg.dst_multblk_type = cfg_param->cfg_dst_multblk_type;
-
-    writeq(cfg.data, &dmac->channel[channel_num].cfg);
-
-    ctl.data = readq(&dmac->channel[channel_num].ctl);
-    ctl.ch_ctl.sms = cfg_param->ctl_sms;
-    ctl.ch_ctl.dms = cfg_param->ctl_dms;
-    /* master select */
-    ctl.ch_ctl.sinc = cfg_param->ctl_sinc;
-    ctl.ch_ctl.dinc = cfg_param->ctl_dinc;
-    /* address incrememt */
-    ctl.ch_ctl.src_tr_width = cfg_param->ctl_src_tr_width;
-    ctl.ch_ctl.dst_tr_width  = cfg_param->ctl_dst_tr_width;
-    /* transfer width */
-    ctl.ch_ctl.src_msize = cfg_param->ctl_src_msize;
-    ctl.ch_ctl.dst_msize = cfg_param->ctl_drc_msize;
-    /* Burst transaction length */
-    ctl.ch_ctl.ioc_blktfr = cfg_param->ctl_ioc_blktfr;
-    /* interrupt on completion of block transfer */
-    /* 0x1 enable BLOCK_TFR_DONE_IntStat field */
-
-    writeq(cfg_param->ctl_block_ts, &dmac->channel[channel_num].block_ts);
-    /* the number of (blcok_ts +1) data of width SRC_TR_WIDTF to be */
-    /* transferred in a dma block transfer */
-
-    dmac->channel[channel_num].sar = cfg_param->sar;
-    dmac->channel[channel_num].dar = cfg_param->dar;
-
-    ch_llp.data = readq(&dmac->channel[channel_num].llp);
-    ch_llp.llp.loc = cfg_param->llp_loc;
-    ch_llp.llp.lms = cfg_param->llp_lms;
-    writeq(ch_llp.data, &dmac->channel[channel_num].llp);
-    writeq(ctl.data, &dmac->channel[channel_num].ctl);
-    readq(&dmac->channel[channel_num].swhssrc);
-
-    return 0;
-}
-
-int dmac_set_channel_param(dmac_channel_number_t channel_num,
-    const void *src, void *dest, dmac_address_increment_t src_inc, dmac_address_increment_t dest_inc,
-    dmac_burst_trans_length_t dmac_burst_size,
-    dmac_transfer_width_t dmac_trans_width,
-    uint32_t blockSize)
-{
-    dmac_ch_ctl_u_t  ctl;
-    dmac_ch_cfg_u_t cfg_u;
-
-    int mem_type_src = is_memory((uintptr_t)src), mem_type_dest = is_memory((uintptr_t)dest);
-    dmac_transfer_flow_t flow_control;
-    if (mem_type_src == 0 && mem_type_dest == 0)
-    {
-        flow_control = DMAC_PRF2PRF_DMA;
-    }else if (mem_type_src == 1 && mem_type_dest == 0)
-        flow_control = DMAC_MEM2PRF_DMA;
-    else if (mem_type_src == 0 && mem_type_dest == 1)
-        flow_control = DMAC_PRF2MEM_DMA;
-    else
-        flow_control = DMAC_MEM2MEM_DMA;
-
-    /**
-     * cfg register must configure before ts_block and
-     * sar dar register
-     */
-    cfg_u.data = readq(&dmac->channel[channel_num].cfg);
-
-    cfg_u.ch_cfg.tt_fc = flow_control;
-    cfg_u.ch_cfg.hs_sel_src = mem_type_src ? DMAC_HS_SOFTWARE : DMAC_HS_HARDWARE;
-    cfg_u.ch_cfg.hs_sel_dst = mem_type_dest ? DMAC_HS_SOFTWARE : DMAC_HS_HARDWARE;
-    cfg_u.ch_cfg.src_per = channel_num;
-    cfg_u.ch_cfg.dst_per = channel_num;
-    cfg_u.ch_cfg.src_multblk_type = 0;
-    cfg_u.ch_cfg.dst_multblk_type = 0;
-
-    writeq(cfg_u.data, &dmac->channel[channel_num].cfg);
-
-    dmac->channel[channel_num].sar = (uint64_t)src;
-    dmac->channel[channel_num].dar = (uint64_t)dest;
-
-    ctl.data = readq(&dmac->channel[channel_num].ctl);
-    ctl.ch_ctl.sms = DMAC_MASTER1;
-    ctl.ch_ctl.dms = DMAC_MASTER2;
-    /* master select */
-    ctl.ch_ctl.sinc = src_inc;
-    ctl.ch_ctl.dinc = dest_inc;
-    /* address incrememt */
-    ctl.ch_ctl.src_tr_width = dmac_trans_width;
-    ctl.ch_ctl.dst_tr_width  = dmac_trans_width;
-    /* transfer width */
-    ctl.ch_ctl.src_msize = dmac_burst_size;
-    ctl.ch_ctl.dst_msize = dmac_burst_size;
-
-    writeq(ctl.data, &dmac->channel[channel_num].ctl);
-
-    writeq(blockSize - 1, &dmac->channel[channel_num].block_ts);
-    /*the number of (blcok_ts +1) data of width SRC_TR_WIDTF to be */
-    /* transferred in a dma block transfer */
-    return 0;
-}
-
-int dmac_get_channel_config(dmac_channel_number_t channel_num,
-        dmac_channel_config_t *cfg_param)
-{
-    dmac_ch_ctl_u_t  ctl;
-    dmac_ch_cfg_u_t cfg;
-    dmac_ch_llp_u_t ch_llp;
-
-    if (cfg_param == 0)
-        return -1;
-    if (channel_num < DMAC_CHANNEL0 ||
-        channel_num > DMAC_CHANNEL3)
-        return -1;
-
-    ctl.data = readq(&dmac->channel[channel_num].ctl);
-
-    cfg_param->ctl_sms = ctl.ch_ctl.sms;
-    cfg_param->ctl_dms = ctl.ch_ctl.dms;
-    cfg_param->ctl_sinc = ctl.ch_ctl.sinc;
-    cfg_param->ctl_dinc = ctl.ch_ctl.dinc;
-    cfg_param->ctl_src_tr_width = ctl.ch_ctl.src_tr_width;
-    cfg_param->ctl_dst_tr_width = ctl.ch_ctl.dst_tr_width;
-    cfg_param->ctl_src_msize = ctl.ch_ctl.src_msize;
-    cfg_param->ctl_drc_msize = ctl.ch_ctl.dst_msize;
-    cfg_param->ctl_ioc_blktfr = ctl.ch_ctl.ioc_blktfr;
-
-    cfg.data = readq(&dmac->channel[channel_num].cfg);
-    cfg_param->cfg_hs_sel_src = cfg.ch_cfg.hs_sel_src;
-    cfg_param->cfg_hs_sel_dst = cfg.ch_cfg.hs_sel_dst;
-    cfg_param->cfg_src_hs_pol = cfg.ch_cfg.src_hwhs_pol;
-    cfg_param->cfg_dst_hs_pol =  cfg.ch_cfg.dst_hwhs_pol;
-    cfg_param->cfg_src_per = cfg.ch_cfg.src_per;
-    cfg_param->cfg_dst_per = cfg.ch_cfg.dst_per;
-    cfg_param->cfg_ch_prior = cfg.ch_cfg.ch_prior;
-    cfg_param->cfg_src_multblk_type = cfg.ch_cfg.src_multblk_type;
-    cfg_param->cfg_dst_multblk_type = cfg.ch_cfg.dst_multblk_type;
-
-    cfg_param->sar = dmac->channel[channel_num].sar;
-    cfg_param->dar = dmac->channel[channel_num].dar;
-
-    ch_llp.data = readq(&dmac->channel[channel_num].llp);
-    cfg_param->llp_loc = ch_llp.llp.loc;
-    cfg_param->llp_lms = ch_llp.llp.lms;
-
-    cfg_param->ctl_block_ts = readq(&dmac->channel[channel_num].block_ts);
-
-    return 0;
-}
-
-void dmac_set_address(dmac_channel_number_t channel_num, uint64_t src_addr,
-        uint64_t dst_addr)
-{
-    writeq(src_addr, &dmac->channel[channel_num].sar);
-    writeq(dst_addr, &dmac->channel[channel_num].dar);
-}
-
-void dmac_set_block_ts(dmac_channel_number_t channel_num,
-        uint32_t block_size)
-{
-    uint32_t block_ts;
-
-    block_ts = block_size & 0x3fffff;
-    writeq(block_ts, &dmac->channel[channel_num].block_ts);
-}
-
-void dmac_source_control(dmac_channel_number_t channel_num,
-        dmac_master_number_t master_select,
-        dmac_address_increment_t address_mode,
-        dmac_transfer_width_t tr_width,
-        dmac_burst_trans_length_t burst_length)
-{
-    dmac_ch_ctl_u_t ctl_u;
-
-    ctl_u.data = readq(&dmac->channel[channel_num].ctl);
-    ctl_u.ch_ctl.sms = master_select;
-    ctl_u.ch_ctl.sinc = address_mode;
-    ctl_u.ch_ctl.src_tr_width = tr_width;
-    ctl_u.ch_ctl.src_msize = burst_length;
-
-    writeq(ctl_u.data, &dmac->channel[channel_num].ctl);
-}
-
-void dmac_master_control(dmac_channel_number_t channel_num,
-        dmac_master_number_t master_select,
-        dmac_address_increment_t address_mode,
-        dmac_transfer_width_t tr_width,
-        dmac_burst_trans_length_t burst_length)
-{
-    dmac_ch_ctl_u_t ctl_u;
-
-    ctl_u.data = readq(&dmac->channel[channel_num].ctl);
-    ctl_u.ch_ctl.dms = master_select;
-    ctl_u.ch_ctl.dinc = address_mode;
-    ctl_u.ch_ctl.dst_tr_width = tr_width;
-    ctl_u.ch_ctl.dst_msize = burst_length;
-
-    writeq(ctl_u.data, &dmac->channel[channel_num].ctl);
-}
-
-void dmac_set_source_transfer_control(dmac_channel_number_t channel_num,
-                dmac_multiblk_transfer_type_t transfer_type,
-                dmac_sw_hw_hs_select_t handshak_select)
-{
-    dmac_ch_cfg_u_t cfg_u;
-
-    cfg_u.data = readq(&dmac->channel[channel_num].cfg);
-    cfg_u.ch_cfg.src_multblk_type = transfer_type;
-    cfg_u.ch_cfg.hs_sel_src = handshak_select;
-
-    writeq(cfg_u.data, &dmac->channel[channel_num].cfg);
-}
-
-void dmac_set_destination_transfer_control(dmac_channel_number_t channel_num,
-                dmac_multiblk_transfer_type_t transfer_type,
-                dmac_sw_hw_hs_select_t handshak_select)
-{
-    dmac_ch_cfg_u_t cfg_u;
-
-    cfg_u.data = readq(&dmac->channel[channel_num].cfg);
-    cfg_u.ch_cfg.dst_multblk_type = transfer_type;
-    cfg_u.ch_cfg.hs_sel_dst = handshak_select;
-
-    writeq(cfg_u.data, &dmac->channel[channel_num].cfg);
-}
-
-void dmac_set_flow_control(dmac_channel_number_t channel_num,
-            dmac_transfer_flow_t flow_control)
-{
-    dmac_ch_cfg_u_t cfg_u;
-
-    cfg_u.data = readq(&dmac->channel[channel_num].cfg);
-    cfg_u.ch_cfg.tt_fc = flow_control;
-
-    writeq(cfg_u.data, &dmac->channel[channel_num].cfg);
-}
-
-void dmac_set_linked_list_addr_point(dmac_channel_number_t channel_num,
-            uint64_t *addr)
-{
-    dmac_ch_llp_u_t llp_u;
-
-    llp_u.data = readq(&dmac->channel[channel_num].llp);
-    /* Cast pointer to uint64_t */
-    llp_u.llp.loc = (uint64_t)addr;
-    writeq(llp_u.data, &dmac->channel[channel_num].llp);
-}
-
-void dmac_init(void)
-{
-    uint64_t tmp;
-    dmac_commonreg_intclear_u_t intclear;
-    dmac_cfg_u_t dmac_cfg;
-    dmac_reset_u_t dmac_reset;
-
-    sysctl_clock_enable(SYSCTL_CLOCK_DMA);
-
-    dmac_reset.data = readq(&dmac->reset);
-    dmac_reset.reset.rst = 1;
-    writeq(dmac_reset.data, &dmac->reset);
-    while (dmac_reset.reset.rst)
-        dmac_reset.data = readq(&dmac->reset);
-
-    /*reset dmac */
-
-    intclear.data = readq(&dmac->com_intclear);
-    intclear.com_intclear.cear_slvif_dec_err_intstat = 1;
-    intclear.com_intclear.clear_slvif_wr2ro_err_intstat = 1;
-    intclear.com_intclear.clear_slvif_rd2wo_err_intstat = 1;
-    intclear.com_intclear.clear_slvif_wronhold_err_intstat = 1;
-    intclear.com_intclear.clear_slvif_undefinedreg_dec_err_intstat = 1;
-    writeq(intclear.data, &dmac->com_intclear);
-    /* clear common register interrupt */
-
-    dmac_cfg.data = readq(&dmac->cfg);
-    dmac_cfg.cfg.dmac_en = 0;
-    dmac_cfg.cfg.int_en = 0;
-    writeq(dmac_cfg.data, &dmac->cfg);
-    /* disable dmac and disable interrupt */
-
-    while (readq(&dmac->cfg))
-        ;
-    tmp = readq(&dmac->chen);
-    tmp &= ~0xf;
-    writeq(tmp, &dmac->chen);
-    /* disable all channel before configure */
-    dmac_enable();
-}
-
-static void list_add(struct list_head_t *new, struct list_head_t *prev,
-        struct list_head_t *next)
-{
-    next->prev = new;
-    new->next = next;
-    new->prev = prev;
-    prev->next = new;
-}
-
-void list_add_tail(struct list_head_t *new, struct list_head_t *head)
-{
-    list_add(new, head->prev, head);
-}
-
-void INIT_LIST_HEAD(struct list_head_t *list)
-{
-    list->next = list;
-    list->prev = list;
-}
-
-void dmac_link_list_item(dmac_channel_number_t channel_num,
-    uint8_t LLI_row_num, int8_t LLI_last_row,
-    dmac_lli_item_t *lli_item,
-    dmac_channel_config_t *cfg_param)
-{
-    dmac_ch_ctl_u_t ctl;
-    dmac_ch_llp_u_t  llp_u;
-
-    lli_item[LLI_row_num].sar = cfg_param->sar;
-    lli_item[LLI_row_num].dar = cfg_param->dar;
-
-    ctl.data = readq(&dmac->channel[channel_num].ctl);
-    ctl.ch_ctl.sms = cfg_param->ctl_sms;
-    ctl.ch_ctl.dms = cfg_param->ctl_dms;
-    ctl.ch_ctl.sinc = cfg_param->ctl_sinc;
-    ctl.ch_ctl.dinc = cfg_param->ctl_dinc;
-    ctl.ch_ctl.src_tr_width = cfg_param->ctl_src_tr_width;
-    ctl.ch_ctl.dst_tr_width = cfg_param->ctl_dst_tr_width;
-    ctl.ch_ctl.src_msize = cfg_param->ctl_src_msize;
-    ctl.ch_ctl.dst_msize = cfg_param->ctl_drc_msize;
-    ctl.ch_ctl.src_stat_en = cfg_param->ctl_src_stat_en;
-    ctl.ch_ctl.dst_stat_en = cfg_param->ctl_dst_stat_en;
-
-    if (LLI_last_row != LAST_ROW) {
-        ctl.ch_ctl.shadowreg_or_lli_valid = 1;
-        ctl.ch_ctl.shadowreg_or_lli_last = 0;
-    } else {
-        ctl.ch_ctl.shadowreg_or_lli_valid = 1;
-        ctl.ch_ctl.shadowreg_or_lli_last = 1;
-    }
-
-    lli_item[LLI_row_num].ctl = ctl.data;
-
-    lli_item[LLI_row_num].ch_block_ts = cfg_param->ctl_block_ts;
-    lli_item[LLI_row_num].sstat = 0;
-    lli_item[LLI_row_num].dstat = 0;
-
-    llp_u.data = readq(&dmac->channel[channel_num].llp);
-
-    if (LLI_last_row != LAST_ROW)
-        llp_u.llp.loc = ((uint64_t)&lli_item[LLI_row_num + 1]) >> 6;
-    else
-        llp_u.llp.loc = 0;
-
-    lli_item[LLI_row_num].llp = llp_u.data;
-}
-
-void dmac_update_shandow_register(dmac_channel_number_t channel_num,
-        int8_t last_block, dmac_channel_config_t *cfg_param)
-{
-    dmac_ch_ctl_u_t ctl_u;
-
-    do {
-        ctl_u.data = readq(&dmac->channel[channel_num].ctl);
-    } while (ctl_u.ch_ctl.shadowreg_or_lli_valid);
-
-    writeq(cfg_param->sar, &dmac->channel[channel_num].sar);
-    writeq(cfg_param->dar, &dmac->channel[channel_num].dar);
-    writeq(cfg_param->ctl_block_ts, &dmac->channel[channel_num].block_ts);
-
-    ctl_u.ch_ctl.sms = cfg_param->ctl_sms;
-    ctl_u.ch_ctl.dms = cfg_param->ctl_dms;
-    ctl_u.ch_ctl.sinc = cfg_param->ctl_sinc;
-    ctl_u.ch_ctl.dinc = cfg_param->ctl_dinc;
-    ctl_u.ch_ctl.src_tr_width = cfg_param->ctl_src_tr_width;
-    ctl_u.ch_ctl.dst_tr_width = cfg_param->ctl_dst_tr_width;
-    ctl_u.ch_ctl.src_msize = cfg_param->ctl_src_msize;
-    ctl_u.ch_ctl.dst_msize = cfg_param->ctl_drc_msize;
-    ctl_u.ch_ctl.src_stat_en = cfg_param->ctl_src_stat_en;
-    ctl_u.ch_ctl.dst_stat_en = cfg_param->ctl_dst_stat_en;
-    if (last_block != LAST_ROW)
-    {
-        ctl_u.ch_ctl.shadowreg_or_lli_valid = 1;
-        ctl_u.ch_ctl.shadowreg_or_lli_last = 0;
-    } else {
-        ctl_u.ch_ctl.shadowreg_or_lli_valid = 1;
-        ctl_u.ch_ctl.shadowreg_or_lli_last = 1;
-    }
-
-    writeq(ctl_u.data, &dmac->channel[channel_num].ctl);
-    writeq(0, &dmac->channel[channel_num].blk_tfr);
-}
-
-void dmac_set_shadow_invalid_flag(dmac_channel_number_t channel_num)
-{
-    dmac_ch_ctl_u_t ctl_u;
-
-    ctl_u.data = readq(&dmac->channel[channel_num].ctl);
-    ctl_u.ch_ctl.shadowreg_or_lli_valid = 1;
-    ctl_u.ch_ctl.shadowreg_or_lli_last = 0;
-    writeq(ctl_u.data, &dmac->channel[channel_num].ctl);
-}
-
-void dmac_set_single_mode(dmac_channel_number_t channel_num,
-                          const void *src, void *dest, dmac_address_increment_t src_inc,
-                          dmac_address_increment_t dest_inc,
-                          dmac_burst_trans_length_t dmac_burst_size,
-                          dmac_transfer_width_t dmac_trans_width,
-                          size_t block_size) {
-    dmac_chanel_interrupt_clear(channel_num);
-    dmac_channel_disable(channel_num);
-    dmac_wait_idle(channel_num);
-    dmac_set_channel_param(channel_num, src, dest, src_inc, dest_inc,
-                           dmac_burst_size, dmac_trans_width, block_size);
-    dmac_enable();
-    dmac_channel_enable(channel_num);
-}
-
-int dmac_is_done(dmac_channel_number_t channel_num)
-{
-    if(readq(&dmac->channel[channel_num].intstatus) & 0x2)
-        return 1;
-    else
-        return 0;
-}
-
-void dmac_wait_done(dmac_channel_number_t channel_num)
-{
-    dmac_wait_idle(channel_num);
-}
-
-int dmac_is_idle(dmac_channel_number_t channel_num)
-{
-    dmac_chen_u_t chen;
-    chen.data = readq(&dmac->chen);
-    if((chen.data >> channel_num) & 0x1UL)
-        return 0;
-    else
-        return 1;
-}
-
-void dmac_wait_idle(dmac_channel_number_t channel_num)
-{
-    while(!dmac_is_idle(channel_num));
-    dmac_chanel_interrupt_clear(channel_num); /* clear interrupt */
-}
-
-void dmac_set_src_dest_length(dmac_channel_number_t channel_num, const void *src, void *dest, size_t len)
-{
-    if(src != NULL)
-        dmac->channel[channel_num].sar = (uint64_t)src;
-    if(dest != NULL)
-        dmac->channel[channel_num].dar = (uint64_t)dest;
-    if(len > 0)
-        dmac_set_block_ts(channel_num, len - 1);
-    dmac_channel_enable(channel_num);
-}
-
-static int dmac_irq_callback(int irq, void *ctx, void *arg)
-{
-    dmac_context_t *v_dmac_context = (dmac_context_t *)(ctx);
-    dmac_channel_number_t v_dmac_channel = v_dmac_context->dmac_channel;
-    dmac_chanel_interrupt_clear(v_dmac_channel);
-    if(v_dmac_context->callback != NULL)
-        v_dmac_context->callback(v_dmac_context->ctx);
-
-    return 0;
-}
-
-void dmac_irq_register(dmac_channel_number_t channel_num , plic_irq_callback_t dmac_callback, void *ctx, uint32_t priority)
-{
-    int ret;
-    dmac_context[channel_num].dmac_channel = channel_num;
-    dmac_context[channel_num].callback = dmac_callback;
-    dmac_context[channel_num].ctx = ctx;
-    dmac_enable_channel_interrupt(channel_num);
-    plic_set_priority(IRQN_DMA0_INTERRUPT + channel_num, priority);
-    ret = irq_attach(IRQN_DMA0_INTERRUPT + channel_num, dmac_irq_callback, &dmac_context[channel_num]);
-    if (ret == OK)
-    {
-      up_enable_irq(IRQN_DMA0_INTERRUPT + channel_num);
-    }
-}
-
-void __attribute__((weak, alias("dmac_irq_register"))) dmac_set_irq(dmac_channel_number_t channel_num , plic_irq_callback_t dmac_callback, void *ctx, uint32_t priority);
-
-void dmac_irq_unregister(dmac_channel_number_t channel_num)
-{
-    dmac_context[channel_num].callback = NULL;
-    dmac_context[channel_num].ctx = NULL;
-    up_disable_irq(IRQN_DMA0_INTERRUPT + channel_num);
-    irq_detach(IRQN_DMA0_INTERRUPT + channel_num);
-}
-
-void __attribute__((weak, alias("dmac_irq_unregister"))) dmac_free_irq(dmac_channel_number_t channel_num);
-
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/dmac.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/dmac.h
deleted file mode 100644
index a27504cf7..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/dmac.h
+++ /dev/null
@@ -1,1553 +0,0 @@
-/* Copyright 2018 Canaan Inc.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
-* @file damc.h
-* @brief kendryte k210 source code
-*                https://github.com/kendryte/kendryte-standalone-sdk.git
-* @version 1.0
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
-
-#ifndef _DRIVER_DMAC_H
-#define _DRIVER_DMAC_H
-
-#include <stdint.h>
-#include "io.h"
-#include "platform.h"
-#include "stdbool.h"
-#include "plic.h"
-#include <stddef.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* DMAC */
-#define DMAC_CHANNEL_COUNT (DMAC_CHANNEL_MAX)
-#define LAST_ROW (-1)
-
-typedef enum _dmac_channel_number
-{
-    DMAC_CHANNEL0 = 0,
-    DMAC_CHANNEL1 = 1,
-    DMAC_CHANNEL2 = 2,
-    DMAC_CHANNEL3 = 3,
-    DMAC_CHANNEL4 = 4,
-    DMAC_CHANNEL5 = 5,
-    DMAC_CHANNEL_MAX
-} dmac_channel_number_t;
-
-typedef enum _dmac_src_dst_select
-{
-    DMAC_SRC = 0x1,
-    DMAC_DST = 0x2,
-    DMAC_SRC_DST = 0x3
-} dmac_src_dst_select_t;
-
-typedef enum _state_value
-{
-    clear = 0,
-    set = 1
-} state_value_t;
-
-typedef enum _dmac_lock_bus_ch
-{
-    DMAC_LOCK_BUS     = 0x1,
-    DMAC_LOCK_CHANNEL = 0x2,
-    DMAC_LOCK_BUS_CH  = 0x3
-} dmac_lock_bus_ch_t;
-
-typedef enum _dmac_sw_hw_hs_select
-{
-    DMAC_HS_HARDWARE = 0x0,
-    DMAC_HS_SOFTWARE = 0x1
-} dmac_sw_hw_hs_select_t;
-
-typedef enum _dmac_scatter_gather_param
-{
-    DMAC_SG_COUNT = 0x0,
-    DMAC_SG_INTERVAL = 0x1
-} dmac_scatter_gather_param_t;
-
-typedef enum _dmac_irq
-{
-    /* no interrupts */
-    DMAC_IRQ_NONE    = 0x00,
-    /* transfer complete */
-    DMAC_IRQ_TFR     = 0x01,
-    /* block transfer complete */
-    DMAC_IRQ_BLOCK   = 0x02,
-    /* source transaction complete */
-    DMAC_IRQ_SRCTRAN = 0x04,
-    /* destination transaction complete */
-    DMAC_IRQ_DSTTRAN = 0x08,
-    /* error */
-    DMAC_IRQ_ERR     = 0x10,
-    /* all interrupts */
-    DMAC_IRQ_ALL     = 0x1f
-} dmac_irq_t;
-
-typedef enum _dmac_software_req
-{
-    /* ReqSrcReq/ReqDstReq */
-    DMAC_REQUEST    = 0x1,
-    /* SglReqSrcReq/SglReqDstReq */
-    DMAC_SINGLE_REQUEST = 0x2,
-    /* LstReqSrcReq/LstReqDstReq */
-    DMAC_LAST_REQUEST   = 0x4
-} dmac_software_req_t;
-
-typedef enum _dmac_master_number
-{
-    DMAC_MASTER1 = 0x0,
-    DMAC_MASTER2 = 0x1
-} dmac_master_number_t;
-
-typedef enum _dmac_transfer_flow
-{
-    /* mem to mem - DMAC   flow ctlr */
-    DMAC_MEM2MEM_DMA    = 0x0,
-    /* mem to prf - DMAC   flow ctlr */
-    DMAC_MEM2PRF_DMA    = 0x1,
-    /* prf to mem - DMAC   flow ctlr */
-    DMAC_PRF2MEM_DMA    = 0x2,
-    /* prf to prf - DMAC   flow ctlr */
-    DMAC_PRF2PRF_DMA    = 0x3,
-    /* prf to mem - periph flow ctlr */
-    DMAC_PRF2MEM_PRF    = 0x4,
-    /* prf to prf - source flow ctlr */
-    DMAC_PRF2PRF_SRCPRF = 0x5,
-    /* mem to prf - periph flow ctlr */
-    DMAC_MEM2PRF_PRF    = 0x6,
-    /* prf to prf - dest   flow ctlr */
-    DMAC_PRF2PRF_DSTPRF = 0x7
-} dmac_transfer_flow_t;
-
-typedef enum _dmac_burst_trans_length
-{
-    DMAC_MSIZE_1   = 0x0,
-    DMAC_MSIZE_4   = 0x1,
-    DMAC_MSIZE_8   = 0x2,
-    DMAC_MSIZE_16  = 0x3,
-    DMAC_MSIZE_32  = 0x4,
-    DMAC_MSIZE_64  = 0x5,
-    DMAC_MSIZE_128 = 0x6,
-    DMAC_MSIZE_256 = 0x7
-} dmac_burst_trans_length_t;
-
-typedef enum _dmac_address_increment
-{
-    DMAC_ADDR_INCREMENT = 0x0,
-    DMAC_ADDR_NOCHANGE  = 0x1
-} dmac_address_increment_t;
-
-typedef enum _dmac_transfer_width
-{
-    DMAC_TRANS_WIDTH_8   = 0x0,
-    DMAC_TRANS_WIDTH_16  = 0x1,
-    DMAC_TRANS_WIDTH_32  = 0x2,
-    DMAC_TRANS_WIDTH_64  = 0x3,
-    DMAC_TRANS_WIDTH_128 = 0x4,
-    DMAC_TRANS_WIDTH_256 = 0x5
-} dmac_transfer_width_t;
-
-typedef enum _dmac_hs_interface
-{
-    DMAC_HS_IF0  = 0x0,
-    DMAC_HS_IF1  = 0x1,
-    DMAC_HS_IF2  = 0x2,
-    DMAC_HS_IF3  = 0x3,
-    DMAC_HS_IF4  = 0x4,
-    DMAC_HS_IF5  = 0x5,
-    DMAC_HS_IF6  = 0x6,
-    DMAC_HS_IF7  = 0x7,
-    DMAC_HS_IF8  = 0x8,
-    DMAC_HS_IF9  = 0x9,
-    DMAC_HS_IF10 = 0xa,
-    DMAC_HS_IF11 = 0xb,
-    DMAC_HS_IF12 = 0xc,
-    DMAC_HS_IF13 = 0xd,
-    DMAC_HS_IF14 = 0xe,
-    DMAC_HS_IF15 = 0xf
-} dmac_hs_interface_t;
-
-typedef enum _dmac_multiblk_transfer_type
-{
-    CONTIGUOUS     = 0,
-    RELOAD   = 1,
-    SHADOWREGISTER = 2,
-    LINKEDLIST     = 3
-} dmac_multiblk_transfer_type_t;
-
-typedef enum _dmac_multiblk_type
-{
-    DMAC_SRC_DST_CONTINUE          = 0,
-    DMAC_SRC_CONTINUE_DST_RELAOD       = 2,
-    DMAC_SRC_CONTINUE_DST_LINKEDLIST   = 3,
-    DMAC_SRC_RELOAD_DST_CONTINUE       = 4,
-    DMAC_SRC_RELOAD_DST_RELOAD   = 5,
-    DMAC_SRC_RELOAD_DST_LINKEDLIST     = 6,
-    DMAC_SRC_LINKEDLIST_DST_CONTINUE   = 7,
-    DMAC_SRC_LINKEDLIST_DST_RELOAD     = 8,
-    DMAC_SRC_LINKEDLIST_DST_LINKEDLIST = 9,
-    DMAC_SRC_SHADOWREG_DST_CONTINUE    = 10
-} dmac_multiblk_type_t;
-
-typedef enum _dmac_transfer_type
-{
-    DMAC_TRANSFER_ROW1  = 0x1,
-    DMAC_TRANSFER_ROW2  = 0x2,
-    DMAC_TRANSFER_ROW3  = 0x3,
-    DMAC_TRANSFER_ROW4  = 0x4,
-    DMAC_TRANSFER_ROW5  = 0x5,
-    DMAC_TRANSFER_ROW6  = 0x6,
-    DMAC_TRANSFER_ROW7  = 0x7,
-    DMAC_TRANSFER_ROW8  = 0x8,
-    DMAC_TRANSFER_ROW9  = 0x9,
-    DMAC_TRANSFER_ROW10 = 0xa
-} dmac_transfer_type_t;
-
-typedef enum _dmac_prot_level
-{
-    /* default prot level */
-    DMAC_NONCACHE_NONBUFF_NONPRIV_OPCODE = 0x0,
-    DMAC_NONCACHE_NONBUFF_NONPRIV_DATA   = 0x1,
-    DMAC_NONCACHE_NONBUFF_PRIV_OPCODE    = 0x2,
-    DMAC_NONCACHE_NONBUFF_PRIV_DATA      = 0x3,
-    DMAC_NONCACHE_BUFF_NONPRIV_OPCODE    = 0x4,
-    DMAC_NONCACHE_BUFF_NONPRIV_DATA      = 0x5,
-    DMAC_NONCACHE_BUFF_PRIV_OPCODE       = 0x6,
-    DMAC_NONCACHE_BUFF_PRIV_DATA     = 0x7,
-    DMAC_CACHE_NONBUFF_NONPRIV_OPCODE    = 0x8,
-    DMAC_CACHE_NONBUFF_NONPRIV_DATA      = 0x9,
-    DMAC_CACHE_NONBUFF_PRIV_OPCODE       = 0xa,
-    DMAC_CACHE_NONBUFF_PRIV_DATA     = 0xb,
-    DMAC_CACHE_BUFF_NONPRIV_OPCODE       = 0xc,
-    DMAC_CACHE_BUFF_NONPRIV_DATA     = 0xd,
-    DMAC_CACHE_BUFF_PRIV_OPCODE   = 0xe,
-    DMAC_CACHE_BUFF_PRIV_DATA       = 0xf
-} dmac_prot_level_t;
-
-typedef enum _dmac_fifo_mode
-{
-    DMAC_FIFO_MODE_SINGLE = 0x0,
-    DMAC_FIFO_MODE_HALF = 0x1
-} dmac_fifo_mode_t;
-
-typedef enum _dw_dmac_flow_ctl_mode
-{
-    DMAC_DATA_PREFETCH_ENABLED  = 0x0,
-    DMAC_DATA_PREFETCH_DISABLED = 0x1
-} dw_dmac_flow_ctl_mode_t;
-
-typedef enum _dmac_polarity_level
-{
-    DMAC_ACTIVE_HIGH = 0x0,
-    DMAC_ACTIVE_LOW = 0x1
-} dmac_polarity_level_t;
-
-typedef enum _dmac_lock_level
-{
-    DMAC_LOCK_LEVEL_DMA_TRANSFER   = 0x0,
-    DMAC_LOCK_LEVEL_BLOCK_TRANSFER = 0x1,
-    DMAC_LOCK_LEVEL_TRANSACTION    = 0x2
-} dmac_lock_level_t;
-
-typedef enum _dmac_channel_priority
-{
-    DMAC_PRIORITY_0 = 0x0,
-    DMAC_PRIORITY_1 = 0x1,
-    DMAC_PRIORITY_2 = 0x2,
-    DMAC_PRIORITY_3 = 0x3,
-    DMAC_PRIORITY_4 = 0x4,
-    DMAC_PRIORITY_5 = 0x5,
-    DMAC_PRIORITY_6 = 0x6,
-    DMAC_PRIORITY_7 = 0x7
-} dmac_channel_priority_t;
-
-typedef enum _dmac_state
-{
-    ZERO,
-    ONE
-} dmac_state_t;
-
-typedef enum _dmac_common_int
-{
-    SLVIF_COMMON_DEC_ERR       = 0,
-    SLVIF_COMMON_WR2RO_ERR     = 1,
-    SLVIF_COMMON_RD2WO_ERR     = 2,
-    SLVIF_COMMON__WRONHOLD_ERR = 3,
-    SLVIF_UNDEFINED_DEC_ERR    = 4,
-    SLVIF_ALL_INT          = 5
-} dmac_common_int_t;
-
-typedef struct _dmac_cfg
-{
-    /**
-     * Bit 0 is used to enable dmac
-     * 0x1 for enable, 0x0 for disable
-     */
-    uint64_t dmac_en : 1;
-    /**
-     * Bit 1 is used to glabally enable interrupt generation
-     * 0x1 for enable interrupt, 0x0 for disable interrupt
-     */
-    uint64_t int_en : 1;
-    /* Bits [63:2] is reserved */
-    uint64_t rsvd : 62;
-} __attribute__((packed, aligned(8))) dmac_cfg_t;
-
-typedef union _dmac_cfg_u
-{
-    dmac_cfg_t cfg;
-    uint64_t data;
-} dmac_cfg_u_t;
-
-typedef struct _damc_chen
-{
-    /**
-     * Bit 0 is used to enable channel 1
-     * 0x1 for enable, 0x0 for disable
-     */
-    uint64_t ch1_en : 1;
-    /**
-     * Bit 1 is used to enable channel 2
-     * 0x1 for enable, 0x0 for disable
-     */
-    uint64_t ch2_en : 1;
-    /**
-     * Bit 2 is used to enable channel 3
-     * 0x1 for enable, 0x0 for disable
-     */
-    uint64_t ch3_en : 1;
-    /**
-     * Bit 3 is used to enable channel 4
-     * 0x1 for enable, 0x0 for disable
-     */
-    uint64_t ch4_en : 1;
-    /**
-     * Bit 4 is used to enable channel 5
-     * 0x1 for enable, 0x0 for disable
-     */
-    uint64_t ch5_en : 1;
-    /**
-     * Bit 5 is used to enable channel 6
-     * 0x1 for enable, 0x0 for disable
-     */
-    uint64_t ch6_en : 1;
-    /* Bits [7:6] is reserved */
-    uint64_t rsvd1 : 2;
-    /**
-     * Bit 8 is write enable bit
-     * 0x1 for enable, 0x0 for disable
-     */
-    uint64_t ch1_en_we : 1;
-    /**
-     * Bit 9 is write enable bit
-     * 0x1 for enable, 0x0 for disable
-     */
-    uint64_t ch2_en_we : 1;
-    /**
-     * Bit 10 is write enable bit
-     * 0x1 for enable, 0x0 for disable
-     */
-    uint64_t ch3_en_we : 1;
-    /**
-     * Bit 11 is write enable bit
-     * 0x1 for enable, 0x0 for disable
-     */
-    uint64_t ch4_en_we : 1;
-    /**
-     * Bit 12 is write enable bit
-     * 0x1 for enable, 0x0 for disable
-     */
-    uint64_t ch5_en_we : 1;
-    /**
-     * Bit 13 is write enable bit
-     * 0x1 for enable, 0x0 for disable
-     */
-    uint64_t ch6_en_we : 1;
-    /* Bits [15:14] is reserved */
-    uint64_t rsvd2 : 2;
-    /**
-     * Bit 16 is susped reuest
-     * 0x1 for request channel suspend
-     * 0x0 for no channel suspend request
-     */
-    uint64_t ch1_susp : 1;
-    /**
-     * Bit 17 is susped reuest
-     * 0x1 for request channel suspend
-     * 0x0 for no channel suspend request
-     */
-    uint64_t ch2_susp : 1;
-    /* Bit 18 is susped reuest
-     * 0x1 for request channel suspend
-     * 0x0 for no channel suspend request
-     */
-    uint64_t ch3_susp : 1;
-    /**
-     * Bit 19 is susped reuest
-     * 0x1 for request channel suspend
-     * 0x0 for no channel suspend request
-     */
-    uint64_t ch4_susp : 1;
-    /**
-     * Bit 20 is susped reuest
-     * 0x1 for request channel suspend
-     * 0x0 for no channel suspend request
-     */
-    uint64_t ch5_susp : 1;
-    /**
-     * Bit 21 is susped reuest
-     * 0x1 for request channel suspend
-     * 0x0 for no channel suspend request
-     */
-    uint64_t ch6_susp : 1;
-    /* Bits [23:22] is reserved */
-    uint64_t rsvd3 : 2;
-    /**
-     * Bit  24 is write enable to the channel suspend bit
-     * 0x1 for enable write to CH1_SUSP bit
-     * 0x0 for disable write to CH1_SUSP bit
-     */
-    uint64_t ch1_susp_we : 1;
-    /**
-     * Bit  25 is write enable to the channel suspend bit
-     * 0x1 for enable write to CH2_SUSP bit
-     * 0x0 for disable write to CH2_SUSP bit
-     */
-    uint64_t ch2_susp_we : 1;
-    /**
-     * Bit  26 is write enable to the channel suspend bit
-     * 0x1 for enable write to CH3_SUSP bit
-     * 0x0 for disable write to CH3_SUSP bit
-     */
-    uint64_t ch3_susp_we : 1;
-    /**
-     * Bit  27 is write enable to the channel suspend bit
-     * 0x1 for enable write to CH4_SUSP bit
-     * 0x0 for disable write to CH4_SUSP bit
-     */
-    uint64_t ch4_susp_we : 1;
-    /**
-     * Bit  28 is write enable to the channel suspend bit
-     * 0x1 for enable write to CH5_SUSP bit
-     * 0x0 for disable write to CH5_SUSP bit
-     */
-    uint64_t ch5_susp_we : 1;
-    /**
-     * Bit  29 is write enable to the channel suspend bit
-     * 0x1 for enable write to CH6_SUSP bit
-     * 0x0 for disable write to CH6_SUSP bit
-     */
-    uint64_t ch6_susp_we : 1;
-    /* Bits [31:30] is reserved */
-    uint64_t rsvd4 : 2;
-    /**
-     * Bit  32 is channel-1 abort requst bit
-     * 0x1 for request for channnel abort
-     * 0x0 for no channel abort request
-     */
-    uint64_t ch1_abort : 1;
-    /**
-     * Bit  33 is channel-2 abort requst bit
-     * 0x1 for request for channnel abort
-     * 0x0 for no channel abort request
-     */
-    uint64_t ch2_abort : 1;
-    /**
-     * Bit  34 is channel-3 abort requst bit
-     * 0x1 for request for channnel abort
-     * 0x0 for no channel abort request
-     */
-    uint64_t ch3_abort : 1;
-    /**
-     * Bit  35 is channel-4 abort requst bit
-     * 0x1 for request for channnel abort
-     * 0x0 for no channel abort request
-     */
-    uint64_t ch4_abort : 1;
-    /**
-     * Bit  36 is channel-5 abort requst bit
-     * 0x1 for request for channnel abort
-     * 0x0 for no channel abort request
-     */
-    uint64_t ch5_abort : 1;
-    /**
-     * Bit  37 is channel-6 abort requst bit
-     * 0x1 for request for channnel abort
-     * 0x0 for no channel abort request
-     */
-    uint64_t ch6_abort : 1;
-    /* Bits [39:38] is reserved */
-    uint64_t rsvd5 : 2;
-    /**
-     * Bit 40 is ued to write enable  channel-1 abort bit
-     * 0x1 for enable write to CH1_ABORT bit
-     * 0x0 for disable write to CH1_ABORT bit
-     */
-    uint64_t ch1_abort_we : 1;
-    /**
-     * Bit 41 is ued to write enable  channel-2 abort bit
-     * 0x1 for enable write to CH2_ABORT bit
-     * 0x0 for disable write to CH2_ABORT bit
-     */
-    uint64_t ch2_abort_we : 1;
-    /**
-     * Bit 42 is ued to write enable  channel-3 abort bit
-     * 0x1 for enable write to CH3_ABORT bit
-     * 0x0 for disable write to CH3_ABORT bit
-     */
-    uint64_t ch3_abort_we : 1;
-    /**
-     * Bit 43 is ued to write enable  channel-4 abort bit
-     * 0x1 for enable write to CH4_ABORT bit
-     * 0x0 for disable write to CH4_ABORT bit
-     */
-    uint64_t ch4_abort_we : 1;
-    /**
-     * Bit 44 is ued to write enable  channel-5 abort bit
-     * 0x1 for enable write to CH5_ABORT bit
-     * 0x0 for disable write to CH5_ABORT bit
-     */
-    uint64_t ch5_abort_we : 1;
-    /**
-     * Bit 45 is ued to write enable  channel-6 abort bit
-     * 0x1 for enable write to CH6_ABORT bit
-     * 0x0 for disable write to CH6_ABORT bit
-     */
-    uint64_t ch6_abort_we : 1;
-    /* Bits [47:46] is reserved */
-    uint64_t rsvd6 : 2;
-    /* Bits [63:48] is reserved */
-    uint64_t rsvd7 : 16;
-} __attribute__((packed, aligned(8))) damc_chen_t;
-
-typedef union _dmac_chen_u
-{
-    damc_chen_t dmac_chen;
-    uint64_t data;
-} dmac_chen_u_t;
-
-typedef struct _dmac_intstatus
-{
-    /**
-     * Bit 0 is channel 1 interrupt bit
-     * 0x1 for channel 1 interrupt  active
-     * 0x0 for channel 1 interrupt inactive
-     */
-    uint64_t ch1_intstat : 1;
-    /**
-     * Bit 1 is channel 1 interrupt bit
-     * 0x1 for channel 2 interrupt  active
-     * 0x0 for channel 2 interrupt inactive
-     */
-    uint64_t ch2_intstat : 1;
-    /**
-     * Bit 2 is channel 3 interrupt bit
-     * 0x1 for channel 3 interrupt  active
-     * 0x0 for channel 3 interrupt inactive
-     */
-    uint64_t ch3_intstat : 1;
-    /**
-     * Bit 3 is channel 4 interrupt bit
-     * 0x1 for channel 4 interrupt  active
-     * 0x0 for channel 4 interrupt inactive
-     */
-    uint64_t ch4_intstat : 1;
-    /**
-     * Bit 4 is channel 5 interrupt bit
-     * 0x1 for channel 5 interrupt  active
-     * 0x0 for channel 5 interrupt inactive
-     */
-    uint64_t ch5_intstat : 1;
-    /**
-     * Bit 5 is channel 6 interrupt bit
-     * 0x1 for channel 6 interrupt  active
-     * 0x0 for channel 6 interrupt inactive
-     */
-    uint64_t ch6_intstat : 1;
-    /* Bits [15:6] is reserved */
-    uint64_t rsvd1 : 10;
-    /**
-     * Bit 16 is commom register status bit
-     * 0x1 for common register interrupt is active
-     * 0x0 for common register interrupt inactive
-     */
-    uint64_t commonreg_intstat : 1;
-    /* Bits [63:17] is reserved */
-    uint64_t rsvd2 : 47;
-} __attribute__((packed, aligned(8))) dmac_intstatus_t;
-
-typedef union _dmac_intstatus_u
-{
-    dmac_intstatus_t intstatus;
-    uint64_t data;
-} dmac_intstatus_u_t;
-
-typedef struct _dmac_commonreg_intclear
-{
-    /**
-     * Bit 0 is slave nterface Common Register
-     * Decode Error Interrupt clear Bit
-     * x01 for clear SLVIF_CommonReg_DEC_ERR interrupt
-     * in DMAC_COMMONREG_INTSTATUSREG
-     * 0x0 for inactive signal
-     */
-    uint64_t cear_slvif_dec_err_intstat : 1;
-    /**
-     * Bit 1 is Slave Interface Common Register Write
-     * to Read only Error Interrupt clear Bit
-     * x01 for clear SLVIF_CommonReg_WR2RO_ERR interrupt
-     * in DMAC_COMMONREG_INTSTATUSREG
-     * 0x0 for inactive signal
-     */
-    uint64_t clear_slvif_wr2ro_err_intstat : 1;
-    /**
-     * Bit 2 is Slave Interface Common Register Read to
-     * Write only Error Interrupt clear Bit
-     * x01 for clear SLVIF_CommonReg_RD2WO_ERR  interrupt
-     * in DMAC_COMMONREG_INTSTATUSREG
-     * 0x0 for inactive signal
-     */
-    uint64_t clear_slvif_rd2wo_err_intstat : 1;
-    /**
-     * Bit 3 is Slave Interface Common Register Write
-     * On Hold Error Interrupt clear Bit
-     * x01 for clear SSLVIF_CommonReg_WrOnHold_ERR interrupt
-     * in DMAC_COMMONREG_INTSTATUSREG
-     * 0x0 for inactive signal
-     */
-    uint64_t clear_slvif_wronhold_err_intstat : 1;
-    /* Bits [7:4] is reserved */
-    uint64_t rsvd1 : 4;
-    /**
-     * Bit 8 is Slave Interface Undefined register
-     * Decode Error Interrupt clear Bit
-     * x01 for clear SLVIF_UndefinedReg_DEC_ERRinterrupt
-     * in DMAC_COMMONREG_INTSTATUSREG
-     * 0x0 for inactive signal
-     */
-    uint64_t clear_slvif_undefinedreg_dec_err_intstat : 1;
-    /* Bits [63:9] is reserved */
-    uint64_t rsvd2 : 55;
-} __attribute__((packed, aligned(8))) dmac_commonreg_intclear_t;
-
-typedef union _dmac_commonreg_intclear_u
-{
-    dmac_commonreg_intclear_t com_intclear;
-    uint64_t data;
-} dmac_commonreg_intclear_u_t;
-
-typedef struct _dmac_commonreg_intstatus_enable
-{
-    /**
-     * Bit 0 is Slave Interface Common Register Decode Error
-     * Interrupt Status Enable Bit
-     * 0x1 for SLVIF_CommonReg_DEC_ERR_IntStat bit enable
-     * 0x0 for SLVIF_CommonReg_DEC_ERR_IntStat bit disable
-     */
-    uint64_t enable_slvif_dec_err_intstat : 1;
-    /**
-     * Bit 1 is Slave Interface Common Register Write to Read
-     * only Error Interrupt Status Enable Bit
-     * 0x1 for SLVIF_CommonReg_WR2RO_ERR_IntStat bit enable
-     * 0x0 for SLVIF_CommonReg_WR2RO_ERR_IntStat bit disable
-     */
-    uint64_t enable_slvif_wr2ro_err_intstat : 1;
-    /*!<
-     * Bit 2 is Slave Interface Common Register Read to Write
-     * only Error Interrupt Status Enable Bit
-     * 0x1 for SLVIF_CommonReg_RD2WO_ERR_IntStat bit enable
-     * 0x0 for SLVIF_CommonReg_RD2WO_ERR_IntStat bit disable
-     */
-    uint64_t enable_slvif_rd2wo_err_intstat : 1;
-    /**
-     * Bit 3 is Slave Interface Common Register Write On Hold
-     * Error Interrupt Status Enable Bit
-     * 0x1 for SLVIF_CommonReg_WrOnHold_ERR_IntStat bit enable
-     * 0x0 for SLVIF_CommonReg_WrOnHold_ERR_IntStat bit disable
-     */
-    uint64_t enable_slvif_wronhold_err_intstat : 1;
-    /* Bits [7:4] is reserved */
-    uint64_t rsvd1 : 4;
-    /**
-     * Bit 8 is Slave Interface Undefined register Decode
-     * Error Interrupt Status enable Bit
-     * 0x1 for SLVIF_UndefinedReg_DEC_ERR_IntStat bit enable
-     * 0x0 for SLVIF_UndefinedReg_DEC_ERR_IntStat disable
-     */
-    uint64_t enable_slvif_undefinedreg_dec_err_intstat : 1;
-    /* Bits [63:9] is reserved */
-    uint64_t rsvd2 : 55;
-} __attribute__((packed, aligned(8))) dmac_commonreg_intstatus_enable_t;
-
-typedef union _dmac_commonreg_intstatus_enable_u
-{
-    dmac_commonreg_intstatus_enable_t intstatus_enable;
-    uint64_t data;
-} dmac_commonreg_intstatus_enable_u_t;
-
-typedef struct _dmac_commonreg_intsignal_enable
-{
-    /**
-     * Bit 0 is Slave Interface Common Register Decode Error
-     * Interrupt Signal Enable Bit
-     * 0x1 for SLVIF_CommonReg_DEC_ERR_IntStat signal enable
-     * 0x0 for SLVIF_CommonReg_DEC_ERR_IntStat signal disable
-     */
-    uint64_t enable_slvif_dec_err_intsignal : 1;
-    /**
-     * Bit 1 is Slave Interface Common Register Write to Read only
-     *  Error Interrupt Signal Enable Bit
-     * 0x1 for SLVIF_CommonReg_WR2RO_ERR_IntStat signal enable
-     * 0x0 for SLVIF_CommonReg_WR2RO_ERR_IntStat signal disable
-     */
-    uint64_t enable_slvif_wr2ro_err_intsignal : 1;
-    /**
-     * Bit 2 is Slave Interface Common Register Read to
-     *  Write only Error Interrupt Status Enable Bit
-     * 0x1 for SLVIF_CommonReg_RD2WO_ERR_IntStat bit enable
-     * 0x0 for SLVIF_CommonReg_RD2WO_ERR_IntStat bit disable
-     */
-    uint64_t enable_slvif_rd2wo_err_intsignal : 1;
-    /**
-     * Bit 3 is Slave Interface Common Register Write On Hold Error
-     * Interrupt Signal Enable Bit
-     * 0x1 for SLVIF_CommonReg_WrOnHold_ERR_IntStat signal enable
-     * 0x0 for SLVIF_CommonReg_WrOnHold_ERR_IntStat signal disable
-     */
-    uint64_t enable_slvif_wronhold_err_intsignal : 1;
-    /* Bits [7:4] is reserved */
-    uint64_t rsvd1 : 4;
-    /**
-     * Bit 8 is Slave Interface Undefined register Decode Error
-     * Interrupt Signal Enable Bit
-     * 0x1 for SLVIF_UndefinedReg_DEC_ERR_IntStat signal enable
-     * 0x0 for SLVIF_UndefinedReg_DEC_ERR_IntStat signal disable
-     */
-    uint64_t enable_slvif_undefinedreg_dec_err_intsignal : 1;
-    /* Bits [63:9] is reserved */
-    uint64_t rsvd2 : 55;
-} __attribute__((packed, aligned(8))) dmac_commonreg_intsignal_enable_t;
-
-typedef union _dmac_commonreg_intsignal_enable_u
-{
-    dmac_commonreg_intsignal_enable_t intsignal_enable;
-    uint64_t data;
-} dmac_commonreg_intsignal_enable_u_t;
-
-typedef struct _dmac_commonreg_intstatus
-{
-    /**
-     * Bit 0 is Slave Interface Common Register Decode
-     * Error Interrupt Status Bit
-     * 0x1 for Slave Interface Decode Error detected
-     * 0x0 for No Slave Interface Decode Errors
-     */
-    uint64_t slvif_dec_err_intstat : 1;
-    /**
-     * Bit 1 is Slave Interface Common Register Write to Read Only
-     * Error Interrupt Status bit
-     * 0x1 for Slave Interface Write to Read Only Error detected
-     * 0x0 No Slave Interface Write to Read Only Errors
-     */
-    uint64_t slvif_wr2ro_err_intstat : 1;
-    /**
-     * Bit 2 is Slave Interface Common Register Read to Write
-     * only Error Interrupt Status bit
-     * 0x1 for Slave Interface Read to Write Only Error detected
-     * 0x0 for No Slave Interface Read to Write Only Errors
-     */
-    uint64_t slvif_rd2wo_err_intstat : 1;
-    /**
-     * Bit 3 is Slave Interface Common Register Write On
-     * Hold Error Interrupt Status Bit
-     * 0x1 for Slave Interface Common Register Write On Hold Error detected
-     * 0x0 for No Slave Interface Common Register Write On Hold Errors
-     */
-    uint64_t slvif_wronhold_err_intstat : 1;
-    /*!< Bits [7:4] is reserved */
-    uint64_t rsvd1 : 4;
-    /**
-     * Bit 8 is Slave Interface Undefined register Decode
-     * Error Interrupt Signal Enable Bit
-     * 0x1 for  Slave Interface Decode Error detected
-     * 0x0 for No Slave Interface Decode Errors
-     */
-    uint64_t slvif_undefinedreg_dec_err_intstat : 1;
-    /* Bits [63:9] is reserved */
-    uint64_t rsvd2 : 55;
-} __attribute__((packed, aligned(8))) dmac_commonreg_intstatus_t;
-
-typedef union _dmac_commonreg_intstatus_u
-{
-    dmac_commonreg_intstatus_t commonreg_intstatus;
-    uint64_t data;
-} dmac_commonreg_intstatus_u_t;
-
-typedef struct _dmac_reset
-{
-    /* Bit 0 is DMAC reset request bit */
-    uint64_t rst : 1;
-    /* Bits [63:1] is reserved */
-    uint64_t rsvd : 63;
-} __attribute__((packed, aligned(8))) dmac_reset_t;
-
-typedef union _dmac_reset_u
-{
-    dmac_reset_t reset;
-    uint64_t data;
-} dmac_reset_u_t;
-
-typedef struct _dmac_ch_block_ts
-{
-    uint64_t block_ts : 22;
-    /*!< Bit [21:0] is block transfer size*/
-    uint64_t rsvd : 42;
-    /*!< Bits [63:22] is reserved */
-} __attribute__((packed, aligned(8))) dmac_ch_block_ts_t;
-
-typedef union _dmac_ch_block_ts_u
-{
-    dmac_ch_block_ts_t block_ts;
-    uint64_t data;
-} dmac_ch_block_ts_u_t;
-
-typedef struct _dmac_ch_ctl
-{
-    /**
-     * Bit 0 is source master select
-     * 1 for AXI master 2, 0 for AXI master 1
-     */
-    uint64_t sms : 1;
-    /* Bit 1 is reserved */
-    uint64_t rsvd1 : 1;
-    /**
-     * Bit 2 is destination master select
-     * 0x1 for AXI master 2,0x0 for AXI master 1
-     */
-    uint64_t dms : 1;
-    /* Bit 3 is reserved */
-    uint64_t rsvd2 : 1;
-    /**
-     * Bit 4 is source address increment
-     * 0x1 for no change, 0x0 for incremnet
-     */
-    uint64_t sinc : 1;
-    /**
-     * Bit 5 is reserved
-     */
-    uint64_t rsvd3 : 1;
-    /**
-     * Bit 6 is destination address incremnet
-     * 0x1 for no change, 0x0 for increment
-     */
-    uint64_t dinc : 1;
-    /* Bit 7 is reserved*/
-    uint64_t rsvd4 : 1;
-    /**
-     * Bits [10:8] is source transfer width
-     * 0x0 for source transfer width is 8 bits
-     * 0x1 for source transfer width is 16 bits
-     * 0x2 for source transfer width is 32 bits
-     * 0x3 for source transfer width is 64 bits
-     * 0x4 for source transfer width is 128 bits
-     * 0x5  for source transfer width is 256 bits
-     * 0x6 for source transfer width is 512 bits
-     */
-    uint64_t src_tr_width : 3;
-    /**
-     * Bits [13:11] is detination transfer width
-     * 0x0 for detination transfer width is 8 bits
-     * 0x1 for detination transfer width is 16 bits
-     * 0x2 for detination transfer width is 32 bits
-     * 0x3 for detination transfer width is 64 bits
-     * 0x4 for detination transfer width is 128 bits
-     * 0x5  for detination transfer width is 256 bits
-     * 0x6 for detination transfer width is 512 bits
-     */
-    uint64_t dst_tr_width : 3;
-    /**
-     * Bits [17:14] is source burst transaction length
-     * 0x0 for 1 data item read from rource in the burst transaction
-     * 0x1 for 4 data item read from rource in the burst transaction
-     * 0x2 for 8 data item read from rource in the burst transaction
-     * 0x3 for 16 data item read from rource in the burst transaction
-     * 0x4 for 32 data item read from rource in the burst transaction
-     * 0x5 for 64 data item read from rource in the burst transaction
-     * 0x6 for 128 data item read from rource in the burst transaction
-     * 0x7 for 256 data item read from rource in the burst transaction
-     * 0x8 for 512 data item read from rource in the burst transaction
-     * 0x9 for 1024 data item read from rource in the burst transaction
-     */
-    uint64_t src_msize : 4;
-    /**
-     * Bits [17:14] is sdestination burst transaction length
-     * 0x0 for 1 data item read from rource in the burst transaction
-     * 0x1 for 4 data item read from rource in the burst transaction
-     * 0x2 for 8 data item read from rource in the burst transaction
-     * 0x3 for 16 data item read from rource in the burst transaction
-     * 0x4 for 32 data item read from rource in the burst transaction
-     * 0x5 for 64 data item read from rource in the burst transaction
-     * 0x6 for 128 data item read from rource in the burst transaction
-     * 0x7 for 256 data item read from rource in the burst transaction
-     * 0x8 for 512 data item read from rource in the burst transaction
-     * 0x9 for 1024 data item read from rource in the burst transaction
-     */
-    uint64_t dst_msize : 4;
-    /**
-     * Bits [25:22] is reserved
-     */
-    uint64_t rsvd5 : 4;
-    /*!< Bits [29:26] is reserved */
-    uint64_t rsvd6 : 4;
-    /**
-     * Bit 30 is Non Posted Last Write Enable
-     * 0x1 for posted writes may be used till the end of the block
-     * 0x 0 for posted writes may be used throughout the block transfer
-     */
-    uint64_t nonposted_lastwrite_en : 1;
-    /* Bit 31 is resrved */
-    uint64_t rsvd7 : 1;
-    /* Bits [34:32] is reserved*/
-    uint64_t rsvd8 : 3;
-    /* Bits [37:35] is reserved*/
-    uint64_t rsvd9 : 3;
-    /**
-     * Bit 38 is source burst length enable
-     * 1 for enable, 0 for disable
-     */
-    uint64_t arlen_en : 1;
-    /* Bits [46:39] is source burst length*/
-    uint64_t arlen : 8;
-    /**
-     * Bit 47 is destination burst length enable
-     * 1 for enable, 0 for disable
-     */
-    uint64_t awlen_en : 1;
-    /* Bits [55:48] is destination burst length */
-    uint64_t awlen : 8;
-    /**
-     * Bit 56 is source status enable
-     * 0x1 for enable, 0x0 for disable
-     */
-    uint64_t src_stat_en : 1;
-    /**
-     * Bit 57 is destination status enable
-     * 0x1 for enable, 0x0 for disable
-     */
-    uint64_t dst_stat_en : 1;
-    /**
-     * Bit 58 is interrupt completion of block transfer
-     * 0x1 for enable CHx_IntStatusReg.BLOCK_TFR_DONE_IntStat field
-     * 0x0 for dsiable CHx_IntStatusReg.BLOCK_TFR_DONE_IntStat field
-     */
-    uint64_t ioc_blktfr : 1;
-    /**
-     * Bits [61:59] is reserved
-     */
-    uint64_t rsvd10 : 3;
-    /**
-     * Bit 62 is last shadow linked list item
-     * 0x1 for indicate shadowreg/LLI content is the last one
-     * 0x0 for indicate  shadowreg/LLI content not the last one
-     */
-    uint64_t shadowreg_or_lli_last : 1;
-    /**
-     * Bit 63 is last shadow linked list item valid
-     * 0x1 for indicate shadowreg/LLI content is  valid
-     * 0x0 for indicate  shadowreg/LLI content is invalid
-     */
-    uint64_t shadowreg_or_lli_valid : 1;
-} __attribute__((packed, aligned(8))) dmac_ch_ctl_t;
-
-typedef union _dmac_ch_ctl_u
-{
-    dmac_ch_ctl_t ch_ctl;
-    uint64_t data;
-} dmac_ch_ctl_u_t;
-
-typedef struct _dmac_ch_cfg
-{
-    /**
-     * Bit[1:0] is source multi block transfer type
-     * 0x0 for continuous multiblock type
-     * 0x1 for reload multiblock type
-     * 0x2 for shadow register based multiblock type
-     * 0x3 for linked lisr bases multiblock type
-     */
-    uint64_t src_multblk_type : 2;
-    /**
-     * Bit[3:2] is source multi block transfer type
-     * 0x0 for continuous multiblock type
-     * 0x1 for reload multiblock type
-     * 0x2 for shadow register based multiblock type
-     * 0x3 for linked lisr bases multiblock type
-     */
-    uint64_t dst_multblk_type : 2;
-    /* Bits [31:4] is reserved*/
-    uint64_t rsvd1 : 28;
-    /**
-     * Bits [34:32] is transfer type and flow control
-     * 0x0  transfer memory to memory and flow controler is dmac
-     * 0x1  transfer memory to peripheral and flow controler is dmac
-     * 0x2  transfer peripheral to memory and flow controler is dmac
-     * 0x3  transfer peripheral to peripheral and flow controler is dmac
-     * 0x4  transfer peripheral to memory and flow controler is
-     * source peripheral
-     * 0x5  transfer peripheral to peripheral and flow controler
-     * is source peripheral
-     * 0x6  transfer memory to peripheral and flow controler is
-     * destination peripheral
-     * 0x7  transfer peripheral to peripheral and flow controler
-     * is destination peripheral
-     */
-    uint64_t tt_fc : 3;
-    /**
-     * Bit 35 is source software or hardware handshaking select
-     * 0x1 for software handshaking is used
-     * 0x0 for hardware handshaking is used
-     */
-    uint64_t hs_sel_src : 1;
-    /**
-     * Bit 36 is destination software or hardware handshaking select
-     *0x1 for software handshaking is used
-     *0x0 for hardware handshaking is used
-     */
-    uint64_t hs_sel_dst : 1;
-    /**
-     * Bit 37 is sorce hardware handshaking interface polarity
-     * 0x1 active low, 0x0 active high
-     */
-    uint64_t src_hwhs_pol : 1;
-    /**
-     * Bit 38 is destination hardware handshaking interface polarity
-     * 0x1 active low, 0x0 active high
-     */
-    uint64_t dst_hwhs_pol : 1;
-    /**
-     * Bits [41:39] is assign a hardware handshaking interface
-     * to source of channel x
-     */
-    uint64_t src_per : 4;
-    /* Bit 43 is reserved*/
-    uint64_t rsvd3 : 1;
-    /**
-     * Bits [46:44] is assign a hardware handshaking interface
-     * to destination of channel x
-     */
-    uint64_t dst_per : 4;
-    /* Bit 48 is reserved*/
-    uint64_t rsvd5 : 1;
-    /* Bits [51:49] is channel priority,7 is highest, 0 is lowest*/
-    uint64_t ch_prior : 3;
-    /**
-     * Bit 52 is channel lock bit
-     * 0x0 for channel is not locked, 0x1 for channel is locked
-     */
-    uint64_t lock_ch : 1;
-    /**
-     * Bits [54:53] is chnannel lock level
-     * 0x0 for  duration of channel is locked for entire DMA transfer
-     * 0x1 for duration of channel is locked for current block transfer
-     */
-    uint64_t lock_ch_l : 2;
-    uint64_t src_osr_lmt : 4;
-    /* Bits [58:55] is source outstanding request limit */
-    uint64_t dst_osr_lmt : 4;
-    /* Bits [62:59] is destination outstanding request limit */
-} __attribute__((packed, aligned(8))) dmac_ch_cfg_t;
-
-typedef union _dmac_ch_cfg_u
-{
-    dmac_ch_cfg_t ch_cfg;
-    uint64_t data;
-} dmac_ch_cfg_u_t;
-
-typedef struct _dmac_ch_llp
-{
-    /**
-     * Bit 0 is LLI master select
-     * 0x0 for next linked list item resides on AXI madster1 interface
-     * 0x1 for next linked list item resides on AXI madster2 interface
-     */
-    uint64_t lms : 1;
-    /* Bits [5:1] is reserved */
-    uint64_t rsvd1 : 5;
-    /* Bits [63:6] is starting address memeory of LLI block */
-    uint64_t loc : 58;
-} __attribute__((packed, aligned(8))) dmac_ch_llp_t;
-
-typedef union _dmac_ch_llp_u
-{
-    dmac_ch_llp_t llp;
-    uint64_t data;
-} dmac_ch_llp_u_t;
-
-typedef struct _dmac_ch_status
-{
-    /* Bits [21:0] is completed block transfer size */
-    uint64_t cmpltd_blk_size : 22;
-    /* Bits [46:32] is reserved */
-    uint64_t rsvd1 : 15;
-    /* Bits [63:47] is reserved */
-    uint64_t rsvd2 : 17;
-} __attribute__((packed, aligned(8))) dmac_ch_status_t;
-
-typedef union _dmac_ch_status_u
-{
-    dmac_ch_status_t status;
-    uint64_t data;
-} dmac_ch_status_u_t;
-
-typedef struct _dmac_ch_swhssrc
-{
-    /**
-     * Bit 0 is software handshake request for channel source
-     * 0x1 source periphraral request for a dma transfer
-     * 0x0 source peripheral is not request for a burst transfer
-     */
-    uint64_t swhs_req_src : 1;
-    /**
-     * Bit 1 is write enable bit for software handshake request
-     *0x1 for enable, 0x0 for disable
-     */
-    uint64_t swhs_req_src_we : 1;
-    /**
-     * Bit 2 is software handshake single request for channel source
-     * 0x1 for source peripheral requesr for a single dma transfer
-     *  0x0 for source peripheral is not requesting for a single transfer
-     */
-    uint64_t swhs_sglreq_src : 1;
-    /**
-     * Bit 3 is write enable bit for software handshake
-     * single request for channle source
-     * 0x1 for enable write, 0x0 for disable write
-     */
-    uint64_t swhs_sglreq_src_we : 1;
-    /**
-     * Bit 4 software handshake last request for channel source
-     * 0x1 for current transfer is last transfer
-     * 0x0 for current transfer is not the last transfer
-     */
-    uint64_t swhs_lst_src : 1;
-    /**
-     * Bit 5 is write enable bit for software
-     * handshake last request
-     * 0x1 for enable, 0x0 for disable
-     */
-    uint64_t swhs_lst_src_we : 1;
-    /* Bits [63:6] is reserved */
-    uint64_t rsvd : 58;
-} __attribute__((packed, aligned(8))) dmac_ch_swhssrc_t;
-
-typedef union _dmac_ch_swhssrc_u
-{
-    dmac_ch_swhssrc_t swhssrc;
-    uint64_t data;
-} dmac_ch_swhssrc_u_t;
-
-typedef struct _dmac_ch_swhsdst
-{
-    /**
-     * Bit 0 is software handshake request for channel destination
-     * 0x1 destination periphraral request for a dma transfer
-     * 0x0 destination peripheral is not request for a burst transfer
-     */
-    uint64_t swhs_req_dst : 1;
-    /**
-     * Bit 1 is write enable bit for software handshake request
-     * 0x1 for enable, 0x0 for disable
-     */
-    uint64_t swhs_req_dst_we : 1;
-    /**
-     * Bit 2 is software handshake single request for channel destination
-     * 0x1 for destination peripheral requesr for a single dma transfer
-     * 0x0 for destination peripheral is not requesting
-     * for a single transfer
-     */
-    uint64_t swhs_sglreq_dst : 1;
-    /**
-     * Bit 3 is write enable bit for software handshake
-     * single request for channle destination
-     * 0x1 for enable write, 0x0 for disable write
-     */
-    uint64_t swhs_sglreq_dst_we : 1;
-    /**
-     * Bit 4 software handshake last request for channel dstination
-     * 0x1 for current transfer is last transfer
-     * 0x0 for current transfer is not the last transfer
-     */
-    uint64_t swhs_lst_dst : 1;
-    /**
-     * Bit 5 is write enable bit for software handshake last request
-     * 0x1 for enable, 0x0 for disable
-     */
-    uint64_t swhs_lst_dst_we : 1;
-    /* Bits [63:6] is reserved */
-    uint64_t rsvd : 58;
-} __attribute__((packed, aligned(8))) dmac_ch_swhsdst_t;
-
-typedef union _dmac_ch_swhsdst_u
-{
-    dmac_ch_swhsdst_t swhsdst;
-    uint64_t data;
-} dmac_ch_swhsdst_u_t;
-
-typedef struct _dmac_ch_blk_tfr_resumereq
-{
-    /**
-     * Bit 0 is block transfer resume request bit
-     * 0x1 for request for resuming
-     * 0x0 for no request to resume
-     */
-    uint64_t blk_tfr_resumereq : 1;
-    /* Bits [63:1] is reserved */
-    uint64_t rsvd : 63;
-} __attribute__((packed, aligned(8))) dmac_ch_blk_tfr_resumereq_t;
-
-typedef union _dmac_ch_blk_tfr_resumereq_u
-{
-    dmac_ch_blk_tfr_resumereq_t blk_tfr_resumereq;
-    uint64_t data;
-} dmac_ch_blk_tfr_resumereq_u_t;
-
-typedef struct _dmac_ch_intstatus_enable
-{
-    /* Bit 0 is block transfer done interrupt status enable */
-    uint64_t enable_block_tfr_done_intstatus : 1;
-    /* DMA transfer done interrupt status enable */
-    uint64_t enable_dma_tfr_done_intstat : 1;
-    /* Bit 2 reserved */
-    uint64_t rsvd1 : 1;
-    /* Bit 3 source transaction complete status enable */
-    uint64_t enable_src_transcomp_intstat : 1;
-    /* Bit 4 destination transaction complete */
-    uint64_t enable_dst_transcomp_intstat : 1;
-    /* Bit 5 Source Decode Error Status Enable */
-    uint64_t enable_src_dec_err_intstat : 1;
-    /* Bit 6 Destination Decode Error Status Enable */
-    uint64_t enable_dst_dec_err_intstat : 1;
-    /* Bit 7 Source Slave Error Status Enable */
-    uint64_t enable_src_slv_err_intstat : 1;
-    /* Bit 8 Destination Slave Error Status Enable */
-    uint64_t enable_dst_slv_err_intstat : 1;
-    /* Bit 9 LLI Read Decode Error Status Enable */
-    uint64_t enable_lli_rd_dec_err_intstat : 1;
-    /* Bit 10 LLI WRITE Decode Error Status Enable */
-    uint64_t enable_lli_wr_dec_err_intstat : 1;
-    /* Bit 11 LLI Read Slave Error Status Enable */
-    uint64_t enable_lli_rd_slv_err_intstat : 1;
-    /* Bit 12 LLI WRITE Slave Error Status Enable */
-    uint64_t enable_lli_wr_slv_err_intstat : 1;
-    uint64_t rsvd2 : 51;
-} dmac_ch_intstatus_enable_t;
-
-typedef union _dmac_ch_intstatus_enable_u
-{
-    dmac_ch_intstatus_enable_t ch_intstatus_enable;
-    uint64_t data;
-} dmac_ch_intstatus_enable_u_t;
-
-typedef struct _dmac_ch_intclear
-{
-    /* Bit 0 block transfer done interrupt clear bit.*/
-    uint64_t blk_tfr_done_intstat : 1;
-    /* Bit 1 DMA transfer done interrupt clear bit */
-    uint64_t dma_tfr_done_intstat : 1;
-    /* Bit 2 is reserved */
-    uint64_t resv1 : 1;
-    uint64_t resv2 : 61;
-} __attribute__((packed, aligned(8))) dmac_ch_intclear_t;
-
-typedef union _dmac_ch_intclear_u
-{
-    uint64_t data;
-    dmac_ch_intclear_t intclear;
-} dmac_ch_intclear_u_t;
-
-typedef struct _dmac_channel
-{
-    /* (0x100) SAR Address Register */
-    uint64_t sar;
-    /* (0x108) DAR Address Register */
-    uint64_t dar;
-    /* (0x110) Block Transfer Size Register */
-    uint64_t block_ts;
-    /* (0x118) Control Register */
-    uint64_t ctl;
-    /* (0x120) Configure Register */
-    uint64_t cfg;
-    /* (0x128) Linked List Pointer register */
-    uint64_t llp;
-    /* (0x130) Channelx Status Register */
-    uint64_t status;
-    /* (0x138) Channelx Software handshake Source Register */
-    uint64_t swhssrc;
-    /* (0x140) Channelx Software handshake Destination Register */
-    uint64_t swhsdst;
-    /* (0x148) Channelx Block Transfer Resume Request Register */
-    uint64_t blk_tfr;
-    /* (0x150) Channelx AXI ID Register */
-    uint64_t axi_id;
-    /* (0x158) Channelx AXI QOS Register */
-    uint64_t axi_qos;
-    /* Reserved address */
-    uint64_t reserved1[4];
-    /* (0x180) Interrupt Status Enable Register */
-    uint64_t intstatus_en;
-    /* (0x188) Channelx Interrupt Status Register */
-    uint64_t intstatus;
-    /* (0x190) Interrupt  Siganl Enable Register */
-    uint64_t intsignal_en;
-    /* (0x198) Interrupt Clear Register */
-    uint64_t intclear;
-    uint64_t reserved2[12];
-} __attribute__((packed, aligned(8))) dmac_channel_t;
-
-typedef struct _dmac
-{
-    /* (0x00) DMAC ID Rgister */
-    uint64_t id;
-    /* (0x08) DMAC COMPVER Register */
-    uint64_t compver;
-    /* (0x10) DMAC Configure Register */
-    uint64_t cfg;
-    /* (0x18) Channel Enable Register */
-    uint64_t chen;
-    uint64_t reserved1[2];
-    /* (0x30) DMAC Interrupt Status Register */
-    uint64_t intstatus;
-    /* (0x38) DMAC Common register Interrupt Status Register */
-    uint64_t com_intclear;
-    /* (0x40) DMAC Common Interrupt Enable Register */
-    uint64_t com_intstatus_en;
-    /* (0x48) DMAC Common Interrupt Signal Enable Register */
-    uint64_t com_intsignal_en;
-    /* (0x50) DMAC Common Interrupt Status */
-    uint64_t com_intstatus;
-    /* (0x58) DMAC Reset register */
-    uint64_t reset;
-    uint64_t reserved2[20];
-    dmac_channel_t channel[DMAC_CHANNEL_COUNT];
-} __attribute__((packed, aligned(8))) dmac_t;
-
-typedef struct _dmac_channel_config
-{
-    uint64_t sar;
-    uint64_t dar;
-    uint8_t ctl_sms;
-    uint8_t ctl_dms;
-    uint8_t ctl_src_msize;
-    uint8_t ctl_drc_msize;
-    uint8_t ctl_sinc;
-    uint8_t ctl_dinc;
-    uint8_t ctl_src_tr_width;
-    uint8_t ctl_dst_tr_width;
-    uint8_t ctl_ioc_blktfr;
-    uint8_t ctl_src_stat_en;
-    uint8_t ctl_dst_stat_en;
-    uint8_t cfg_dst_per;
-    uint8_t cfg_src_per;
-    uint8_t cfg_src_hs_pol;
-    uint8_t cfg_dst_hs_pol;
-    uint8_t cfg_hs_sel_src;
-    uint8_t cfg_hs_sel_dst;
-    uint64_t cfg_src_multblk_type;
-    uint64_t cfg_dst_multblk_type;
-    uint64_t llp_loc;
-    uint8_t llp_lms;
-    uint64_t ctl_block_ts;
-    uint8_t ctl_tt_fc;
-    uint8_t cfg_protctl;
-    uint8_t cfg_fifo_mode;
-    uint8_t cfg_fcmode;
-    uint8_t cfg_lock_ch_l;
-    uint8_t cfg_ch_prior;
-} dmac_channel_config_t;
-
-#define LIST_ENTRY(ptr, type, member)                                          \
-    ((type *)((char *)(ptr) - (unsigned long)(&((type *)0)->member)))
-
-struct list_head_t
-{
-    struct list_head_t *next, *prev;
-};
-
-/**
- * @brief       Dmac.data/dw_dmac_lli_item
- *
- * @desc        This structure is used when creating Linked List Items.
- *
- * @see         dw_dmac_addLliItem()
- */
-typedef struct _dmac_lli_item
-{
-    uint64_t sar;
-    uint64_t dar;
-    uint64_t ch_block_ts;
-    uint64_t llp;
-    uint64_t ctl;
-    uint64_t sstat;
-    uint64_t dstat;
-    uint64_t resv;
-} __attribute__((packed, aligned(64))) dmac_lli_item_t;
-
-extern volatile dmac_t *const dmac;
-
-/**
- * @brief       Dmac initialize
- */
-void dmac_init(void);
-
-/**
- * @brief       Set dmac param
- *
- * @param[in]   channel_num             Dmac channel
- * @param[in]   src                     Dmac source
- * @param[in]   dest                    Dmac dest
- * @param[in]   src_inc                 Source address increase or not
- * @param[in]   dest_inc                Dest address increase or not
- * @param[in]   dmac_burst_size         Dmac burst length
- * @param[in]   dmac_trans_width        Dmac transfer data width
- * @param[in]   block_size               Dmac transfer length
- *
- */
-void dmac_set_single_mode(dmac_channel_number_t channel_num,
-                          const void *src, void *dest, dmac_address_increment_t src_inc,
-                          dmac_address_increment_t dest_inc,
-                          dmac_burst_trans_length_t dmac_burst_size,
-                          dmac_transfer_width_t dmac_trans_width,
-                          size_t block_size);
-
-/**
- * @brief       Determine the transfer is complete or not
- *
- * @param[in]   channel_num             Dmac channel
- *
- * @return      result
- *     - 0      uncompleted
- *     - 1  completed
-*/
-int dmac_is_done(dmac_channel_number_t channel_num);
-
-/**
- * @brief       Wait for dmac work done
- *
- * @param[in]   channel_num  Dmac channel
- *
- */
-void dmac_wait_done(dmac_channel_number_t channel_num);
-
-/**
- * @brief       Determine the dma is idle or not
- *
- * @param[in]   channel_num             Dmac channel
- *
- * @return      result
- *     - 0      busy
- *     - 1      idel
-*/
-int dmac_is_idle(dmac_channel_number_t channel_num);
-
-/**
- * @brief       Wait for dmac idle
- *
- * @param[in]   channel_num  Dmac channel
- *
- */
-void dmac_wait_idle(dmac_channel_number_t channel_num);
-
-/**
- * @brief       Set interrupt param
- *
- * @param[in]   channel_num             Dmac channel
- * @param[in]   dmac_callback           Dmac interrupt callback
- * @param[in]   ctx                     The param of callback
- * @param[in]   priority                Interrupt priority
- */
-void dmac_set_irq(dmac_channel_number_t channel_num , plic_irq_callback_t dmac_callback, void *ctx, uint32_t priority);
-
-/**
- * @brief       Set interrupt param
- *
- * @param[in]   channel_num             Dmac channel
- * @param[in]   dmac_callback           Dmac interrupt callback
- * @param[in]   ctx                     The param of callback
- * @param[in]   priority                Interrupt priority
- */
-void dmac_irq_register(dmac_channel_number_t channel_num , plic_irq_callback_t dmac_callback, void *ctx, uint32_t priority);
-
-
-/**
- * @brief       Unregister dmac interrupt
- *
- * @param[in]   channel_num             Dmac channel
- *
- */
-void dmac_irq_unregister(dmac_channel_number_t channel_num);
-
-/**
- * @brief       Disable dmac interrupt
- *
- * @param[in]   channel_num             Dmac channel
- *
- */
-void dmac_free_irq(dmac_channel_number_t channel_num);
-
-/**
- * @brief       Set source dest and length
- *
- * @param[in]   channel_num             Dmac channel
- * @param[in]   src                     Source
- * @param[in]   dest                    Dest
- * @param[in]   len                     The length of dmac transfer
- */
-void dmac_set_src_dest_length(dmac_channel_number_t channel_num, const void *src, void *dest, size_t len);
-
-/**
- * @brief       Disable dmac channel interrupt
- *
- * @param[in]   channel_num             Dmac channel
- *
-*/
-void dmac_disable_channel_interrupt(dmac_channel_number_t channel_num);
-void dmac_chanel_interrupt_clear(dmac_channel_number_t channel_num);
-
-/**
- * @brief       Disable dmac channel
- *
- * @param[in]   channel_num             Dmac channel
- *
-*/
-void dmac_channel_disable(dmac_channel_number_t channel_num);
-
-/**
- * @brief       Enable dmac channel
- *
- * @param[in]   channel_num             Dmac channel
- *
-*/
-void dmac_channel_enable(dmac_channel_number_t channel_num);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* _DRIVER_DMAC_H */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/encoding.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/encoding.h
old mode 100644
new mode 100755
index 8a00bba19..980e36f4c
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/encoding.h
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/encoding.h
@@ -12,107 +12,100 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
-
-/**
-* @file encoding.h
-* @brief kendryte k210 source code
-*                https://github.com/kendryte/kendryte-standalone-sdk.git
-* @version 1.0
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
-
 #ifndef RISCV_CSR_ENCODING_H
 #define RISCV_CSR_ENCODING_H
-#include <arch/csr.h>
 
-#define MSTATUS_UIE         0x00000001U
-#define MSTATUS_SIE         0x00000002U
-#define MSTATUS_HIE         0x00000004U
-#define MSTATUS_UPIE        0x00000010U
-#define MSTATUS_SPIE        0x00000020U
-#define MSTATUS_HPIE        0x00000040U
-#define MSTATUS_SPP         0x00000100U
-#define MSTATUS_HPP         0x00000600U
-#define MSTATUS_MPP         0x00001800U
-#define MSTATUS_XS          0x00018000U
-#define MSTATUS_MPRV        0x00020000U
-#define MSTATUS_PUM         0x00040000U
-#define MSTATUS_MXR         0x00080000U
-#define MSTATUS_VM          0x1F000000U
-#define MSTATUS32_SD        0x80000000U
-#define MSTATUS64_SD        0x8000000000000000U
+#define MSTATUS_UIE 0x00000001U
+#define MSTATUS_SIE 0x00000002U
+#define MSTATUS_HIE 0x00000004U
+//#define MSTATUS_MIE 0x00000008U
+#define MSTATUS_UPIE 0x00000010U
+#define MSTATUS_SPIE 0x00000020U
+#define MSTATUS_HPIE 0x00000040U
+//#define MSTATUS_MPIE 0x00000080U
+#define MSTATUS_SPP 0x00000100U
+#define MSTATUS_HPP 0x00000600U
+#define MSTATUS_MPP 0x00001800U
+//#define MSTATUS_FS 0x00006000U
+#define MSTATUS_XS 0x00018000U
+#define MSTATUS_MPRV 0x00020000U
+#define MSTATUS_PUM 0x00040000U
+#define MSTATUS_MXR 0x00080000U
+#define MSTATUS_VM 0x1F000000U
+#define MSTATUS32_SD 0x80000000U
+#define MSTATUS64_SD 0x8000000000000000U
 
-#define SSTATUS_UIE         0x00000001U
-#define SSTATUS_SIE         0x00000002U
-#define SSTATUS_UPIE        0x00000010U
-#define SSTATUS_SPIE        0x00000020U
-#define SSTATUS_SPP         0x00000100U
-#define SSTATUS_FS          0x00006000U
-#define SSTATUS_XS          0x00018000U
-#define SSTATUS_PUM         0x00040000U
-#define SSTATUS32_SD        0x80000000U
-#define SSTATUS64_SD        0x8000000000000000U
+#define SSTATUS_UIE 0x00000001U
+#define SSTATUS_SIE 0x00000002U
+#define SSTATUS_UPIE 0x00000010U
+#define SSTATUS_SPIE 0x00000020U
+#define SSTATUS_SPP 0x00000100U
+#define SSTATUS_FS 0x00006000U
+#define SSTATUS_XS 0x00018000U
+#define SSTATUS_PUM 0x00040000U
+#define SSTATUS32_SD 0x80000000U
+#define SSTATUS64_SD 0x8000000000000000U
 
-#define DCSR_XDEBUGVER      (3U<<30)
-#define DCSR_NDRESET        (1U<<29)
-#define DCSR_FULLRESET      (1U<<28)
-#define DCSR_EBREAKM        (1U<<15)
-#define DCSR_EBREAKH        (1U<<14)
-#define DCSR_EBREAKS        (1U<<13)
-#define DCSR_EBREAKU        (1U<<12)
-#define DCSR_STOPCYCLE      (1U<<10)
-#define DCSR_STOPTIME       (1U<<9)
-#define DCSR_CAUSE          (7U<<6)
-#define DCSR_DEBUGINT       (1U<<5)
-#define DCSR_HALT           (1U<<3)
-#define DCSR_STEP           (1U<<2)
-#define DCSR_PRV            (3U<<0)
+#define DCSR_XDEBUGVER (3U << 30)
+#define DCSR_NDRESET (1U << 29)
+#define DCSR_FULLRESET (1U << 28)
+#define DCSR_EBREAKM (1U << 15)
+#define DCSR_EBREAKH (1U << 14)
+#define DCSR_EBREAKS (1U << 13)
+#define DCSR_EBREAKU (1U << 12)
+#define DCSR_STOPCYCLE (1U << 10)
+#define DCSR_STOPTIME (1U << 9)
+#define DCSR_CAUSE (7U << 6)
+#define DCSR_DEBUGINT (1U << 5)
+#define DCSR_HALT (1U << 3)
+#define DCSR_STEP (1U << 2)
+#define DCSR_PRV (3U << 0)
 
-#define DCSR_CAUSE_NONE     0
-#define DCSR_CAUSE_SWBP     1
-#define DCSR_CAUSE_HWBP     2
+#define DCSR_CAUSE_NONE 0
+#define DCSR_CAUSE_SWBP 1
+#define DCSR_CAUSE_HWBP 2
 #define DCSR_CAUSE_DEBUGINT 3
-#define DCSR_CAUSE_STEP     4
-#define DCSR_CAUSE_HALT     5
+#define DCSR_CAUSE_STEP 4
+#define DCSR_CAUSE_HALT 5
 
-#define MCONTROL_SELECT     (1U<<19)
-#define MCONTROL_TIMING     (1U<<18)
-#define MCONTROL_ACTION     (0x3fU<<12)
-#define MCONTROL_CHAIN      (1U<<11)
-#define MCONTROL_MATCH      (0xfU<<7)
-#define MCONTROL_M          (1U<<6)
-#define MCONTROL_H          (1U<<5)
-#define MCONTROL_S          (1U<<4)
-#define MCONTROL_U          (1U<<3)
-#define MCONTROL_EXECUTE    (1U<<2)
-#define MCONTROL_STORE      (1U<<1)
-#define MCONTROL_LOAD       (1U<<0)
+#define MCONTROL_SELECT (1U << 19)
+#define MCONTROL_TIMING (1U << 18)
+#define MCONTROL_ACTION (0x3fU << 12)
+#define MCONTROL_CHAIN (1U << 11)
+#define MCONTROL_MATCH (0xfU << 7)
+#define MCONTROL_M (1U << 6)
+#define MCONTROL_H (1U << 5)
+#define MCONTROL_S (1U << 4)
+#define MCONTROL_U (1U << 3)
+#define MCONTROL_EXECUTE (1U << 2)
+#define MCONTROL_STORE (1U << 1)
+#define MCONTROL_LOAD (1U << 0)
 
-#define MCONTROL_TYPE_NONE      0
-#define MCONTROL_TYPE_MATCH     2
+#define MCONTROL_TYPE_NONE 0
+#define MCONTROL_TYPE_MATCH 2
 
-#define MCONTROL_ACTION_DEBUG_EXCEPTION   0
-#define MCONTROL_ACTION_DEBUG_MODE        1
-#define MCONTROL_ACTION_TRACE_START       2
-#define MCONTROL_ACTION_TRACE_STOP        3
-#define MCONTROL_ACTION_TRACE_EMIT        4
+#define MCONTROL_ACTION_DEBUG_EXCEPTION 0
+#define MCONTROL_ACTION_DEBUG_MODE 1
+#define MCONTROL_ACTION_TRACE_START 2
+#define MCONTROL_ACTION_TRACE_STOP 3
+#define MCONTROL_ACTION_TRACE_EMIT 4
 
-#define MCONTROL_MATCH_EQUAL     0
-#define MCONTROL_MATCH_NAPOT     1
-#define MCONTROL_MATCH_GE        2
-#define MCONTROL_MATCH_LT        3
-#define MCONTROL_MATCH_MASK_LOW  4
+#define MCONTROL_MATCH_EQUAL 0
+#define MCONTROL_MATCH_NAPOT 1
+#define MCONTROL_MATCH_GE 2
+#define MCONTROL_MATCH_LT 3
+#define MCONTROL_MATCH_MASK_LOW 4
 #define MCONTROL_MATCH_MASK_HIGH 5
 
-#define MIP_SSIP            (1U << IRQ_S_SOFT)
-#define MIP_HSIP            (1U << IRQ_H_SOFT)
-#define MIP_MSIP            (1U << IRQ_M_SOFT)
-#define MIP_STIP            (1U << IRQ_S_TIMER)
-#define MIP_HTIP            (1U << IRQ_H_TIMER)
-#define MIP_SEIP            (1U << IRQ_S_EXT)
-#define MIP_HEIP            (1U << IRQ_H_EXT)
-#define MIP_MEIP            (1U << IRQ_M_EXT)
+#define MIP_SSIP (1U << IRQ_S_SOFT)
+#define MIP_HSIP (1U << IRQ_H_SOFT)
+#define MIP_MSIP (1U << IRQ_M_SOFT)
+#define MIP_STIP (1U << IRQ_S_TIMER)
+#define MIP_HTIP (1U << IRQ_H_TIMER)
+//#define MIP_MTIP (1U << IRQ_M_TIMER)
+#define MIP_SEIP (1U << IRQ_S_EXT)
+#define MIP_HEIP (1U << IRQ_H_EXT)
+#define MIP_MEIP (1U << IRQ_M_EXT)
 
 #define SIP_SSIP MIP_SSIP
 #define SIP_STIP MIP_STIP
@@ -123,60 +116,60 @@
 #define PRV_M 3
 
 #define VM_MBARE 0
-#define VM_MBB   1
+#define VM_MBB 1
 #define VM_MBBID 2
-#define VM_SV32  8
-#define VM_SV39  9
-#define VM_SV48  10
+#define VM_SV32 8
+#define VM_SV39 9
+#define VM_SV48 10
 
-#define IRQ_S_SOFT   1
-#define IRQ_H_SOFT   2
-#define IRQ_M_SOFT   3
-#define IRQ_S_TIMER  5
-#define IRQ_H_TIMER  6
-#define IRQ_M_TIMER  7
-#define IRQ_S_EXT    9
-#define IRQ_H_EXT    10
-#define IRQ_M_EXT    11
-#define IRQ_COP      12
-#define IRQ_HOST     13
+#define IRQ_S_SOFT 1
+#define IRQ_H_SOFT 2
+#define IRQ_M_SOFT 3
+#define IRQ_S_TIMER 5
+#define IRQ_H_TIMER 6
+#define IRQ_M_TIMER 7
+#define IRQ_S_EXT 9
+#define IRQ_H_EXT 10
+#define IRQ_M_EXT 11
+#define IRQ_COP 12
+#define IRQ_HOST 13
 
-#define DEFAULT_RSTVEC     0x00001000U
-#define DEFAULT_NMIVEC     0x00001004U
-#define DEFAULT_MTVEC      0x00001010U
+#define DEFAULT_RSTVEC 0x00001000U
+#define DEFAULT_NMIVEC 0x00001004U
+#define DEFAULT_MTVEC 0x00001010U
 #define CONFIG_STRING_ADDR 0x0000100CU
-#define EXT_IO_BASE        0x40000000U
-#define DRAM_BASE          0x80000000U
+#define EXT_IO_BASE 0x40000000U
+#define DRAM_BASE 0x80000000U
 
 /* page table entry (PTE) fields */
-#define PTE_V     0x001U /* Valid */
-#define PTE_R     0x002U /* Read */
-#define PTE_W     0x004U /* Write */
-#define PTE_X     0x008U /* Execute */
-#define PTE_U     0x010U /* User */
-#define PTE_G     0x020U /* Global */
-#define PTE_A     0x040U /* Accessed */
-#define PTE_D     0x080U /* Dirty */
-#define PTE_SOFT  0x300U /* Reserved for Software */
+#define PTE_V 0x001U    /* Valid */
+#define PTE_R 0x002U    /* Read */
+#define PTE_W 0x004U    /* Write */
+#define PTE_X 0x008U    /* Execute */
+#define PTE_U 0x010U    /* User */
+#define PTE_G 0x020U    /* Global */
+#define PTE_A 0x040U    /* Accessed */
+#define PTE_D 0x080U    /* Dirty */
+#define PTE_SOFT 0x300U /* Reserved for Software */
 
 #define PTE_PPN_SHIFT 10
 
-#define MCONTROL_TYPE(xlen)    (0xfULL<<((xlen)-4))
-#define MCONTROL_DMODE(xlen)   (1ULL<<((xlen)-5))
-#define MCONTROL_MASKMAX(xlen) (0x3fULL<<((xlen)-11))
+#define MCONTROL_TYPE(xlen) (0xfULL << ((xlen)-4))
+#define MCONTROL_DMODE(xlen) (1ULL << ((xlen)-5))
+#define MCONTROL_MASKMAX(xlen) (0x3fULL << ((xlen)-11))
 
 #define PTE_TABLE(PTE) (((PTE) & (PTE_V | PTE_R | PTE_W | PTE_X)) == PTE_V)
 
 #if defined(__riscv)
 
 #if defined(__riscv64)
-# define MSTATUS_SD MSTATUS64_SD
-# define SSTATUS_SD SSTATUS64_SD
-# define RISCV_PGLEVEL_BITS 9
+#define MSTATUS_SD MSTATUS64_SD
+#define SSTATUS_SD SSTATUS64_SD
+#define RISCV_PGLEVEL_BITS 9
 #else
-# define MSTATUS_SD MSTATUS32_SD
-# define SSTATUS_SD SSTATUS32_SD
-# define RISCV_PGLEVEL_BITS 10
+#define MSTATUS_SD MSTATUS32_SD
+#define SSTATUS_SD SSTATUS32_SD
+#define RISCV_PGLEVEL_BITS 10
 #endif
 #define RISCV_PGSHIFT 12
 #define RISCV_PGSIZE (1 << RISCV_PGSHIFT)
@@ -216,9 +209,9 @@
     asm volatile ("csrrc %0, " #reg ", %1" : "=r"(__tmp) : "r"(bit)); \
   __tmp; })
 
-#define read_time()         read_csr(mtime)
-#define read_cycle()        read_csr(mcycle)
-#define current_coreid()       read_csr(mhartid)
+#define read_time() read_csr(mtime)
+#define read_cycle() read_csr(mcycle)
+#define current_coreid() read_csr(mhartid)
 
 #endif
 
@@ -230,568 +223,671 @@
 
 #ifndef RISCV_ENCODING_H
 #define RISCV_ENCODING_H
-#define MATCH_BEQ                  0x63U
-#define MASK_BEQ                   0x707fU
-#define MATCH_BNE                  0x1063U
-#define MASK_BNE                   0x707fU
-#define MATCH_BLT                  0x4063U
-#define MASK_BLT                   0x707fU
-#define MATCH_BGE                  0x5063U
-#define MASK_BGE                   0x707fU
-#define MATCH_BLTU                 0x6063U
-#define MASK_BLTU                  0x707fU
-#define MATCH_BGEU                 0x7063U
-#define MASK_BGEU                  0x707fU
-#define MATCH_JALR                 0x67U
-#define MASK_JALR                  0x707fU
-#define MATCH_JAL                  0x6fU
-#define MASK_JAL                   0x7fU
-#define MATCH_LUI                  0x37U
-#define MASK_LUI                   0x7fU
-#define MATCH_AUIPC                0x17U
-#define MASK_AUIPC                 0x7fU
-#define MATCH_ADDI                 0x13U
-#define MASK_ADDI                  0x707fU
-#define MATCH_SLLI                 0x1013U
-#define MASK_SLLI                  0xfc00707fU
-#define MATCH_SLTI                 0x2013U
-#define MASK_SLTI                  0x707fU
-#define MATCH_SLTIU                0x3013U
-#define MASK_SLTIU                 0x707fU
-#define MATCH_XORI                 0x4013U
-#define MASK_XORI                  0x707fU
-#define MATCH_SRLI                 0x5013U
-#define MASK_SRLI                  0xfc00707fU
-#define MATCH_SRAI                 0x40005013U
-#define MASK_SRAI                  0xfc00707fU
-#define MATCH_ORI                  0x6013U
-#define MASK_ORI                   0x707fU
-#define MATCH_ANDI                 0x7013U
-#define MASK_ANDI                  0x707fU
-#define MATCH_ADD                  0x33U
-#define MASK_ADD                   0xfe00707fU
-#define MATCH_SUB                  0x40000033U
-#define MASK_SUB                   0xfe00707fU
-#define MATCH_SLL                  0x1033U
-#define MASK_SLL                   0xfe00707fU
-#define MATCH_SLT                  0x2033U
-#define MASK_SLT                   0xfe00707fU
-#define MATCH_SLTU                 0x3033U
-#define MASK_SLTU                  0xfe00707fU
-#define MATCH_XOR                  0x4033U
-#define MASK_XOR                   0xfe00707fU
-#define MATCH_SRL                  0x5033U
-#define MASK_SRL                   0xfe00707fU
-#define MATCH_SRA                  0x40005033U
-#define MASK_SRA                   0xfe00707fU
-#define MATCH_OR                   0x6033U
-#define MASK_OR                    0xfe00707fU
-#define MATCH_AND                  0x7033U
-#define MASK_AND                   0xfe00707fU
-#define MATCH_ADDIW                0x1bU
-#define MASK_ADDIW                 0x707fU
-#define MATCH_SLLIW                0x101bU
-#define MASK_SLLIW                 0xfe00707fU
-#define MATCH_SRLIW                0x501bU
-#define MASK_SRLIW                 0xfe00707fU
-#define MATCH_SRAIW                0x4000501bU
-#define MASK_SRAIW                 0xfe00707fU
-#define MATCH_ADDW                 0x3bU
-#define MASK_ADDW                  0xfe00707fU
-#define MATCH_SUBW                 0x4000003bU
-#define MASK_SUBW                  0xfe00707fU
-#define MATCH_SLLW                 0x103bU
-#define MASK_SLLW                  0xfe00707fU
-#define MATCH_SRLW                 0x503bU
-#define MASK_SRLW                  0xfe00707fU
-#define MATCH_SRAW                 0x4000503bU
-#define MASK_SRAW                  0xfe00707fU
-#define MATCH_LB                   0x3U
-#define MASK_LB                    0x707fU
-#define MATCH_LH                   0x1003U
-#define MASK_LH                    0x707fU
-#define MATCH_LW                   0x2003U
-#define MASK_LW                    0x707fU
-#define MATCH_LD                   0x3003U
-#define MASK_LD                    0x707fU
-#define MATCH_LBU                  0x4003U
-#define MASK_LBU                   0x707fU
-#define MATCH_LHU                  0x5003U
-#define MASK_LHU                   0x707fU
-#define MATCH_LWU                  0x6003U
-#define MASK_LWU                   0x707fU
-#define MATCH_SB                   0x23U
-#define MASK_SB                    0x707fU
-#define MATCH_SH                   0x1023U
-#define MASK_SH                    0x707fU
-#define MATCH_SW                   0x2023U
-#define MASK_SW                    0x707fU
-#define MATCH_SD                   0x3023U
-#define MASK_SD                    0x707fU
-#define MATCH_FENCE                0xfU
-#define MASK_FENCE                 0x707fU
-#define MATCH_FENCE_I              0x100fU
-#define MASK_FENCE_I               0x707fU
-#define MATCH_MUL                  0x2000033U
-#define MASK_MUL                   0xfe00707fU
-#define MATCH_MULH                 0x2001033U
-#define MASK_MULH                  0xfe00707fU
-#define MATCH_MULHSU               0x2002033U
-#define MASK_MULHSU                0xfe00707fU
-#define MATCH_MULHU                0x2003033U
-#define MASK_MULHU                 0xfe00707fU
-#define MATCH_DIV                  0x2004033U
-#define MASK_DIV                   0xfe00707fU
-#define MATCH_DIVU                 0x2005033U
-#define MASK_DIVU                  0xfe00707fU
-#define MATCH_REM                  0x2006033U
-#define MASK_REM                   0xfe00707fU
-#define MATCH_REMU                 0x2007033U
-#define MASK_REMU                  0xfe00707fU
-#define MATCH_MULW                 0x200003bU
-#define MASK_MULW                  0xfe00707fU
-#define MATCH_DIVW                 0x200403bU
-#define MASK_DIVW                  0xfe00707fU
-#define MATCH_DIVUW                0x200503bU
-#define MASK_DIVUW                 0xfe00707fU
-#define MATCH_REMW                 0x200603bU
-#define MASK_REMW                  0xfe00707fU
-#define MATCH_REMUW                0x200703bU
-#define MASK_REMUW                 0xfe00707fU
-#define MATCH_AMOADD_W             0x202fU
-#define MASK_AMOADD_W              0xf800707fU
-#define MATCH_AMOXOR_W             0x2000202fU
-#define MASK_AMOXOR_W              0xf800707fU
-#define MATCH_AMOOR_W              0x4000202fU
-#define MASK_AMOOR_W               0xf800707fU
-#define MATCH_AMOAND_W             0x6000202fU
-#define MASK_AMOAND_W              0xf800707fU
-#define MATCH_AMOMIN_W             0x8000202fU
-#define MASK_AMOMIN_W              0xf800707fU
-#define MATCH_AMOMAX_W             0xa000202fU
-#define MASK_AMOMAX_W              0xf800707fU
-#define MATCH_AMOMINU_W            0xc000202fU
-#define MASK_AMOMINU_W             0xf800707fU
-#define MATCH_AMOMAXU_W            0xe000202fU
-#define MASK_AMOMAXU_W             0xf800707fU
-#define MATCH_AMOSWAP_W            0x800202fU
-#define MASK_AMOSWAP_W             0xf800707fU
-#define MATCH_LR_W                 0x1000202fU
-#define MASK_LR_W                  0xf9f0707fU
-#define MATCH_SC_W                 0x1800202fU
-#define MASK_SC_W                  0xf800707fU
-#define MATCH_AMOADD_D             0x302fU
-#define MASK_AMOADD_D              0xf800707fU
-#define MATCH_AMOXOR_D             0x2000302fU
-#define MASK_AMOXOR_D              0xf800707fU
-#define MATCH_AMOOR_D              0x4000302fU
-#define MASK_AMOOR_D               0xf800707fU
-#define MATCH_AMOAND_D             0x6000302fU
-#define MASK_AMOAND_D              0xf800707fU
-#define MATCH_AMOMIN_D             0x8000302fU
-#define MASK_AMOMIN_D              0xf800707fU
-#define MATCH_AMOMAX_D             0xa000302fU
-#define MASK_AMOMAX_D              0xf800707fU
-#define MATCH_AMOMINU_D            0xc000302fU
-#define MASK_AMOMINU_D             0xf800707fU
-#define MATCH_AMOMAXU_D            0xe000302fU
-#define MASK_AMOMAXU_D             0xf800707fU
-#define MATCH_AMOSWAP_D            0x800302fU
-#define MASK_AMOSWAP_D             0xf800707fU
-#define MATCH_LR_D                 0x1000302fU
-#define MASK_LR_D                  0xf9f0707fU
-#define MATCH_SC_D                 0x1800302fU
-#define MASK_SC_D                  0xf800707fU
-#define MATCH_ECALL                0x73U
-#define MASK_ECALL                 0xffffffffU
-#define MATCH_EBREAK               0x100073U
-#define MASK_EBREAK                0xffffffffU
-#define MATCH_URET                 0x200073U
-#define MASK_URET                  0xffffffffU
-#define MATCH_SRET                 0x10200073U
-#define MASK_SRET                  0xffffffffU
-#define MATCH_HRET                 0x20200073U
-#define MASK_HRET                  0xffffffffU
-#define MATCH_MRET                 0x30200073U
-#define MASK_MRET                  0xffffffffU
-#define MATCH_DRET                 0x7b200073U
-#define MASK_DRET                  0xffffffffU
-#define MATCH_SFENCE_VM            0x10400073U
-#define MASK_SFENCE_VM             0xfff07fffU
-#define MATCH_WFI                  0x10500073U
-#define MASK_WFI                   0xffffffffU
-#define MATCH_CSRRW                0x1073U
-#define MASK_CSRRW                 0x707fU
-#define MATCH_CSRRS                0x2073U
-#define MASK_CSRRS                 0x707fU
-#define MATCH_CSRRC                0x3073U
-#define MASK_CSRRC                 0x707fU
-#define MATCH_CSRRWI               0x5073U
-#define MASK_CSRRWI                0x707fU
-#define MATCH_CSRRSI               0x6073U
-#define MASK_CSRRSI                0x707fU
-#define MATCH_CSRRCI               0x7073U
-#define MASK_CSRRCI                0x707fU
-#define MATCH_FADD_S               0x53U
-#define MASK_FADD_S                0xfe00007fU
-#define MATCH_FSUB_S               0x8000053U
-#define MASK_FSUB_S                0xfe00007fU
-#define MATCH_FMUL_S               0x10000053U
-#define MASK_FMUL_S                0xfe00007fU
-#define MATCH_FDIV_S               0x18000053U
-#define MASK_FDIV_S                0xfe00007fU
-#define MATCH_FSGNJ_S              0x20000053U
-#define MASK_FSGNJ_S               0xfe00707fU
-#define MATCH_FSGNJN_S             0x20001053U
-#define MASK_FSGNJN_S              0xfe00707fU
-#define MATCH_FSGNJX_S             0x20002053U
-#define MASK_FSGNJX_S              0xfe00707fU
-#define MATCH_FMIN_S               0x28000053U
-#define MASK_FMIN_S                0xfe00707fU
-#define MATCH_FMAX_S               0x28001053U
-#define MASK_FMAX_S                0xfe00707fU
-#define MATCH_FSQRT_S              0x58000053U
-#define MASK_FSQRT_S               0xfff0007fU
-#define MATCH_FADD_D               0x2000053U
-#define MASK_FADD_D                0xfe00007fU
-#define MATCH_FSUB_D               0xa000053U
-#define MASK_FSUB_D                0xfe00007fU
-#define MATCH_FMUL_D               0x12000053U
-#define MASK_FMUL_D                0xfe00007fU
-#define MATCH_FDIV_D               0x1a000053U
-#define MASK_FDIV_D                0xfe00007fU
-#define MATCH_FSGNJ_D              0x22000053U
-#define MASK_FSGNJ_D               0xfe00707fU
-#define MATCH_FSGNJN_D             0x22001053U
-#define MASK_FSGNJN_D              0xfe00707fU
-#define MATCH_FSGNJX_D             0x22002053U
-#define MASK_FSGNJX_D              0xfe00707fU
-#define MATCH_FMIN_D               0x2a000053U
-#define MASK_FMIN_D                0xfe00707fU
-#define MATCH_FMAX_D               0x2a001053U
-#define MASK_FMAX_D                0xfe00707fU
-#define MATCH_FCVT_S_D             0x40100053U
-#define MASK_FCVT_S_D              0xfff0007fU
-#define MATCH_FCVT_D_S             0x42000053U
-#define MASK_FCVT_D_S              0xfff0007fU
-#define MATCH_FSQRT_D              0x5a000053U
-#define MASK_FSQRT_D               0xfff0007fU
-#define MATCH_FLE_S                0xa0000053U
-#define MASK_FLE_S                 0xfe00707fU
-#define MATCH_FLT_S                0xa0001053U
-#define MASK_FLT_S                 0xfe00707fU
-#define MATCH_FEQ_S                0xa0002053U
-#define MASK_FEQ_S                 0xfe00707fU
-#define MATCH_FLE_D                0xa2000053U
-#define MASK_FLE_D                 0xfe00707fU
-#define MATCH_FLT_D                0xa2001053U
-#define MASK_FLT_D                 0xfe00707fU
-#define MATCH_FEQ_D                0xa2002053U
-#define MASK_FEQ_D                 0xfe00707fU
-#define MATCH_FCVT_W_S             0xc0000053U
-#define MASK_FCVT_W_S              0xfff0007fU
-#define MATCH_FCVT_WU_S            0xc0100053U
-#define MASK_FCVT_WU_S             0xfff0007fU
-#define MATCH_FCVT_L_S             0xc0200053U
-#define MASK_FCVT_L_S              0xfff0007fU
-#define MATCH_FCVT_LU_S            0xc0300053U
-#define MASK_FCVT_LU_S             0xfff0007fU
-#define MATCH_FMV_X_S              0xe0000053U
-#define MASK_FMV_X_S               0xfff0707fU
-#define MATCH_FCLASS_S             0xe0001053U
-#define MASK_FCLASS_S              0xfff0707fU
-#define MATCH_FCVT_W_D             0xc2000053U
-#define MASK_FCVT_W_D              0xfff0007fU
-#define MATCH_FCVT_WU_D            0xc2100053U
-#define MASK_FCVT_WU_D             0xfff0007fU
-#define MATCH_FCVT_L_D             0xc2200053U
-#define MASK_FCVT_L_D              0xfff0007fU
-#define MATCH_FCVT_LU_D            0xc2300053U
-#define MASK_FCVT_LU_D             0xfff0007fU
-#define MATCH_FMV_X_D              0xe2000053U
-#define MASK_FMV_X_D               0xfff0707fU
-#define MATCH_FCLASS_D             0xe2001053U
-#define MASK_FCLASS_D              0xfff0707fU
-#define MATCH_FCVT_S_W             0xd0000053U
-#define MASK_FCVT_S_W              0xfff0007fU
-#define MATCH_FCVT_S_WU            0xd0100053U
-#define MASK_FCVT_S_WU             0xfff0007fU
-#define MATCH_FCVT_S_L             0xd0200053U
-#define MASK_FCVT_S_L              0xfff0007fU
-#define MATCH_FCVT_S_LU            0xd0300053U
-#define MASK_FCVT_S_LU             0xfff0007fU
-#define MATCH_FMV_S_X              0xf0000053U
-#define MASK_FMV_S_X               0xfff0707fU
-#define MATCH_FCVT_D_W             0xd2000053U
-#define MASK_FCVT_D_W              0xfff0007fU
-#define MATCH_FCVT_D_WU            0xd2100053U
-#define MASK_FCVT_D_WU             0xfff0007fU
-#define MATCH_FCVT_D_L             0xd2200053U
-#define MASK_FCVT_D_L              0xfff0007fU
-#define MATCH_FCVT_D_LU            0xd2300053U
-#define MASK_FCVT_D_LU             0xfff0007fU
-#define MATCH_FMV_D_X              0xf2000053U
-#define MASK_FMV_D_X               0xfff0707fU
-#define MATCH_FLW                  0x2007U
-#define MASK_FLW                   0x707fU
-#define MATCH_FLD                  0x3007U
-#define MASK_FLD                   0x707fU
-#define MATCH_FSW                  0x2027U
-#define MASK_FSW                   0x707fU
-#define MATCH_FSD                  0x3027U
-#define MASK_FSD                   0x707fU
-#define MATCH_FMADD_S              0x43U
-#define MASK_FMADD_S               0x600007fU
-#define MATCH_FMSUB_S              0x47U
-#define MASK_FMSUB_S               0x600007fU
-#define MATCH_FNMSUB_S             0x4bU
-#define MASK_FNMSUB_S              0x600007fU
-#define MATCH_FNMADD_S             0x4fU
-#define MASK_FNMADD_S              0x600007fU
-#define MATCH_FMADD_D              0x2000043U
-#define MASK_FMADD_D               0x600007fU
-#define MATCH_FMSUB_D              0x2000047U
-#define MASK_FMSUB_D               0x600007fU
-#define MATCH_FNMSUB_D             0x200004bU
-#define MASK_FNMSUB_D              0x600007fU
-#define MATCH_FNMADD_D             0x200004fU
-#define MASK_FNMADD_D              0x600007fU
-#define MATCH_C_NOP                0x1U
-#define MASK_C_NOP                 0xffffU
-#define MATCH_C_ADDI16SP           0x6101U
-#define MASK_C_ADDI16SP            0xef83U
-#define MATCH_C_JR                 0x8002U
-#define MASK_C_JR                  0xf07fU
-#define MATCH_C_JALR               0x9002U
-#define MASK_C_JALR                0xf07fU
-#define MATCH_C_EBREAK             0x9002U
-#define MASK_C_EBREAK              0xffffU
-#define MATCH_C_LD                 0x6000U
-#define MASK_C_LD                  0xe003U
-#define MATCH_C_SD                 0xe000U
-#define MASK_C_SD                  0xe003U
-#define MATCH_C_ADDIW              0x2001U
-#define MASK_C_ADDIW               0xe003U
-#define MATCH_C_LDSP               0x6002U
-#define MASK_C_LDSP                0xe003U
-#define MATCH_C_SDSP               0xe002U
-#define MASK_C_SDSP                0xe003U
-#define MATCH_C_ADDI4SPN           0x0U
-#define MASK_C_ADDI4SPN            0xe003U
-#define MATCH_C_FLD                0x2000U
-#define MASK_C_FLD                 0xe003U
-#define MATCH_C_LW                 0x4000U
-#define MASK_C_LW                  0xe003U
-#define MATCH_C_FLW                0x6000U
-#define MASK_C_FLW                 0xe003U
-#define MATCH_C_FSD                0xa000U
-#define MASK_C_FSD                 0xe003U
-#define MATCH_C_SW                 0xc000U
-#define MASK_C_SW                  0xe003U
-#define MATCH_C_FSW                0xe000U
-#define MASK_C_FSW                 0xe003U
-#define MATCH_C_ADDI               0x1U
-#define MASK_C_ADDI                0xe003U
-#define MATCH_C_JAL                0x2001U
-#define MASK_C_JAL                 0xe003U
-#define MATCH_C_LI                 0x4001U
-#define MASK_C_LI                  0xe003U
-#define MATCH_C_LUI                0x6001U
-#define MASK_C_LUI                 0xe003U
-#define MATCH_C_SRLI               0x8001U
-#define MASK_C_SRLI                0xec03U
-#define MATCH_C_SRAI               0x8401U
-#define MASK_C_SRAI                0xec03U
-#define MATCH_C_ANDI               0x8801U
-#define MASK_C_ANDI                0xec03U
-#define MATCH_C_SUB                0x8c01U
-#define MASK_C_SUB                 0xfc63U
-#define MATCH_C_XOR                0x8c21U
-#define MASK_C_XOR                 0xfc63U
-#define MATCH_C_OR                 0x8c41U
-#define MASK_C_OR                  0xfc63U
-#define MATCH_C_AND                0x8c61U
-#define MASK_C_AND                 0xfc63U
-#define MATCH_C_SUBW               0x9c01U
-#define MASK_C_SUBW                0xfc63U
-#define MATCH_C_ADDW               0x9c21U
-#define MASK_C_ADDW                0xfc63U
-#define MATCH_C_J                  0xa001U
-#define MASK_C_J                   0xe003U
-#define MATCH_C_BEQZ               0xc001U
-#define MASK_C_BEQZ                0xe003U
-#define MATCH_C_BNEZ               0xe001U
-#define MASK_C_BNEZ                0xe003U
-#define MATCH_C_SLLI               0x2U
-#define MASK_C_SLLI                0xe003U
-#define MATCH_C_FLDSP              0x2002U
-#define MASK_C_FLDSP               0xe003U
-#define MATCH_C_LWSP               0x4002U
-#define MASK_C_LWSP                0xe003U
-#define MATCH_C_FLWSP              0x6002U
-#define MASK_C_FLWSP               0xe003U
-#define MATCH_C_MV                 0x8002U
-#define MASK_C_MV                  0xf003U
-#define MATCH_C_ADD                0x9002U
-#define MASK_C_ADD                 0xf003U
-#define MATCH_C_FSDSP              0xa002U
-#define MASK_C_FSDSP               0xe003U
-#define MATCH_C_SWSP               0xc002U
-#define MASK_C_SWSP                0xe003U
-#define MATCH_C_FSWSP              0xe002U
-#define MASK_C_FSWSP               0xe003U
-#define MATCH_CUSTOM0              0xbU
-#define MASK_CUSTOM0               0x707fU
-#define MATCH_CUSTOM0_RS1          0x200bU
-#define MASK_CUSTOM0_RS1           0x707fU
-#define MATCH_CUSTOM0_RS1_RS2      0x300bU
-#define MASK_CUSTOM0_RS1_RS2       0x707fU
-#define MATCH_CUSTOM0_RD           0x400bU
-#define MASK_CUSTOM0_RD            0x707fU
-#define MATCH_CUSTOM0_RD_RS1       0x600bU
-#define MASK_CUSTOM0_RD_RS1        0x707fU
-#define MATCH_CUSTOM0_RD_RS1_RS2   0x700bU
-#define MASK_CUSTOM0_RD_RS1_RS2    0x707fU
-#define MATCH_CUSTOM1              0x2bU
-#define MASK_CUSTOM1               0x707fU
-#define MATCH_CUSTOM1_RS1          0x202bU
-#define MASK_CUSTOM1_RS1           0x707fU
-#define MATCH_CUSTOM1_RS1_RS2      0x302bU
-#define MASK_CUSTOM1_RS1_RS2       0x707fU
-#define MATCH_CUSTOM1_RD           0x402bU
-#define MASK_CUSTOM1_RD            0x707fU
-#define MATCH_CUSTOM1_RD_RS1       0x602bU
-#define MASK_CUSTOM1_RD_RS1        0x707fU
-#define MATCH_CUSTOM1_RD_RS1_RS2   0x702bU
-#define MASK_CUSTOM1_RD_RS1_RS2    0x707fU
-#define MATCH_CUSTOM2              0x5bU
-#define MASK_CUSTOM2               0x707fU
-#define MATCH_CUSTOM2_RS1          0x205bU
-#define MASK_CUSTOM2_RS1           0x707fU
-#define MATCH_CUSTOM2_RS1_RS2      0x305bU
-#define MASK_CUSTOM2_RS1_RS2       0x707fU
-#define MATCH_CUSTOM2_RD           0x405bU
-#define MASK_CUSTOM2_RD            0x707fU
-#define MATCH_CUSTOM2_RD_RS1       0x605bU
-#define MASK_CUSTOM2_RD_RS1        0x707fU
-#define MATCH_CUSTOM2_RD_RS1_RS2   0x705bU
-#define MASK_CUSTOM2_RD_RS1_RS2    0x707fU
-#define MATCH_CUSTOM3              0x7bU
-#define MASK_CUSTOM3               0x707fU
-#define MATCH_CUSTOM3_RS1          0x207bU
-#define MASK_CUSTOM3_RS1           0x707fU
-#define MATCH_CUSTOM3_RS1_RS2      0x307bU
-#define MASK_CUSTOM3_RS1_RS2       0x707fU
-#define MATCH_CUSTOM3_RD           0x407bU
-#define MASK_CUSTOM3_RD            0x707fU
-#define MATCH_CUSTOM3_RD_RS1       0x607bU
-#define MASK_CUSTOM3_RD_RS1        0x707fU
-#define MATCH_CUSTOM3_RD_RS1_RS2   0x707bU
-#define MASK_CUSTOM3_RD_RS1_RS2    0x707fU
-#define CSR_HPMCOUNTER3            0xc03U
-#define CSR_HPMCOUNTER4            0xc04U
-#define CSR_HPMCOUNTER5            0xc05U
-#define CSR_HPMCOUNTER6            0xc06U
-#define CSR_HPMCOUNTER7            0xc07U
-#define CSR_HPMCOUNTER8            0xc08U
-#define CSR_HPMCOUNTER9            0xc09U
-#define CSR_HPMCOUNTER10           0xc0aU
-#define CSR_HPMCOUNTER11           0xc0bU
-#define CSR_HPMCOUNTER12           0xc0cU
-#define CSR_HPMCOUNTER13           0xc0dU
-#define CSR_HPMCOUNTER14           0xc0eU
-#define CSR_HPMCOUNTER15           0xc0fU
-#define CSR_HPMCOUNTER16           0xc10U
-#define CSR_HPMCOUNTER17           0xc11U
-#define CSR_HPMCOUNTER18           0xc12U
-#define CSR_HPMCOUNTER19           0xc13U
-#define CSR_HPMCOUNTER20           0xc14U
-#define CSR_HPMCOUNTER21           0xc15U
-#define CSR_HPMCOUNTER22           0xc16U
-#define CSR_HPMCOUNTER23           0xc17U
-#define CSR_HPMCOUNTER24           0xc18U
-#define CSR_HPMCOUNTER25           0xc19U
-#define CSR_HPMCOUNTER26           0xc1aU
-#define CSR_HPMCOUNTER27           0xc1bU
-#define CSR_HPMCOUNTER28           0xc1cU
-#define CSR_HPMCOUNTER29           0xc1dU
-#define CSR_HPMCOUNTER30           0xc1eU
-#define CSR_HPMCOUNTER31           0xc1fU
-#define CSR_SBADADDR               0x143U
-#define CSR_SPTBR                  0x180U
-#define CSR_MBADADDR               0x343U
-#define CSR_MUCOUNTEREN            0x320U
-#define CSR_MSCOUNTEREN            0x321U
-#define CSR_MHPMEVENT3             0x323U
-#define CSR_MHPMEVENT4             0x324U
-#define CSR_MHPMEVENT5             0x325U
-#define CSR_MHPMEVENT6             0x326U
-#define CSR_MHPMEVENT7             0x327U
-#define CSR_MHPMEVENT8             0x328U
-#define CSR_MHPMEVENT9             0x329U
-#define CSR_MHPMEVENT10            0x32aU
-#define CSR_MHPMEVENT11            0x32bU
-#define CSR_MHPMEVENT12            0x32cU
-#define CSR_MHPMEVENT13            0x32dU
-#define CSR_MHPMEVENT14            0x32eU
-#define CSR_MHPMEVENT15            0x32fU
-#define CSR_MHPMEVENT16            0x330U
-#define CSR_MHPMEVENT17            0x331U
-#define CSR_MHPMEVENT18            0x332U
-#define CSR_MHPMEVENT19            0x333U
-#define CSR_MHPMEVENT20            0x334U
-#define CSR_MHPMEVENT21            0x335U
-#define CSR_MHPMEVENT22            0x336U
-#define CSR_MHPMEVENT23            0x337U
-#define CSR_MHPMEVENT24            0x338U
-#define CSR_MHPMEVENT25            0x339U
-#define CSR_MHPMEVENT26            0x33aU
-#define CSR_MHPMEVENT27            0x33bU
-#define CSR_MHPMEVENT28            0x33cU
-#define CSR_MHPMEVENT29            0x33dU
-#define CSR_MHPMEVENT30            0x33eU
-#define CSR_MHPMEVENT31            0x33fU
-#define CSR_HPMCOUNTER3H           0xc83U
-#define CSR_HPMCOUNTER4H           0xc84U
-#define CSR_HPMCOUNTER5H           0xc85U
-#define CSR_HPMCOUNTER6H           0xc86U
-#define CSR_HPMCOUNTER7H           0xc87U
-#define CSR_HPMCOUNTER8H           0xc88U
-#define CSR_HPMCOUNTER9H           0xc89U
-#define CSR_HPMCOUNTER10H          0xc8aU
-#define CSR_HPMCOUNTER11H          0xc8bU
-#define CSR_HPMCOUNTER12H          0xc8cU
-#define CSR_HPMCOUNTER13H          0xc8dU
-#define CSR_HPMCOUNTER14H          0xc8eU
-#define CSR_HPMCOUNTER15H          0xc8fU
-#define CSR_HPMCOUNTER16H          0xc90U
-#define CSR_HPMCOUNTER17H          0xc91U
-#define CSR_HPMCOUNTER18H          0xc92U
-#define CSR_HPMCOUNTER19H          0xc93U
-#define CSR_HPMCOUNTER20H          0xc94U
-#define CSR_HPMCOUNTER21H          0xc95U
-#define CSR_HPMCOUNTER22H          0xc96U
-#define CSR_HPMCOUNTER23H          0xc97U
-#define CSR_HPMCOUNTER24H          0xc98U
-#define CSR_HPMCOUNTER25H          0xc99U
-#define CSR_HPMCOUNTER26H          0xc9aU
-#define CSR_HPMCOUNTER27H          0xc9bU
-#define CSR_HPMCOUNTER28H          0xc9cU
-#define CSR_HPMCOUNTER29H          0xc9dU
-#define CSR_HPMCOUNTER30H          0xc9eU
-#define CSR_HPMCOUNTER31H          0xc9fU
-#define CAUSE_MISALIGNED_FETCH     0x0
-#define CAUSE_FAULT_FETCH          0x1
-#define CAUSE_ILLEGAL_INSTRUCTION  0x2
-#define CAUSE_BREAKPOINT           0x3
-#define CAUSE_MISALIGNED_LOAD      0x4
-#define CAUSE_FAULT_LOAD           0x5
-#define CAUSE_MISALIGNED_STORE     0x6
-#define CAUSE_FAULT_STORE          0x7
-#define CAUSE_USER_ECALL           0x8
-#define CAUSE_SUPERVISOR_ECALL     0x9
-#define CAUSE_HYPERVISOR_ECALL     0xa
-#define CAUSE_MACHINE_ECALL        0xb
+#define MATCH_BEQ 0x63U
+#define MASK_BEQ 0x707fU
+#define MATCH_BNE 0x1063U
+#define MASK_BNE 0x707fU
+#define MATCH_BLT 0x4063U
+#define MASK_BLT 0x707fU
+#define MATCH_BGE 0x5063U
+#define MASK_BGE 0x707fU
+#define MATCH_BLTU 0x6063U
+#define MASK_BLTU 0x707fU
+#define MATCH_BGEU 0x7063U
+#define MASK_BGEU 0x707fU
+#define MATCH_JALR 0x67U
+#define MASK_JALR 0x707fU
+#define MATCH_JAL 0x6fU
+#define MASK_JAL 0x7fU
+#define MATCH_LUI 0x37U
+#define MASK_LUI 0x7fU
+#define MATCH_AUIPC 0x17U
+#define MASK_AUIPC 0x7fU
+#define MATCH_ADDI 0x13U
+#define MASK_ADDI 0x707fU
+#define MATCH_SLLI 0x1013U
+#define MASK_SLLI 0xfc00707fU
+#define MATCH_SLTI 0x2013U
+#define MASK_SLTI 0x707fU
+#define MATCH_SLTIU 0x3013U
+#define MASK_SLTIU 0x707fU
+#define MATCH_XORI 0x4013U
+#define MASK_XORI 0x707fU
+#define MATCH_SRLI 0x5013U
+#define MASK_SRLI 0xfc00707fU
+#define MATCH_SRAI 0x40005013U
+#define MASK_SRAI 0xfc00707fU
+#define MATCH_ORI 0x6013U
+#define MASK_ORI 0x707fU
+#define MATCH_ANDI 0x7013U
+#define MASK_ANDI 0x707fU
+#define MATCH_ADD 0x33U
+#define MASK_ADD 0xfe00707fU
+#define MATCH_SUB 0x40000033U
+#define MASK_SUB 0xfe00707fU
+#define MATCH_SLL 0x1033U
+#define MASK_SLL 0xfe00707fU
+#define MATCH_SLT 0x2033U
+#define MASK_SLT 0xfe00707fU
+#define MATCH_SLTU 0x3033U
+#define MASK_SLTU 0xfe00707fU
+#define MATCH_XOR 0x4033U
+#define MASK_XOR 0xfe00707fU
+#define MATCH_SRL 0x5033U
+#define MASK_SRL 0xfe00707fU
+#define MATCH_SRA 0x40005033U
+#define MASK_SRA 0xfe00707fU
+#define MATCH_OR 0x6033U
+#define MASK_OR 0xfe00707fU
+#define MATCH_AND 0x7033U
+#define MASK_AND 0xfe00707fU
+#define MATCH_ADDIW 0x1bU
+#define MASK_ADDIW 0x707fU
+#define MATCH_SLLIW 0x101bU
+#define MASK_SLLIW 0xfe00707fU
+#define MATCH_SRLIW 0x501bU
+#define MASK_SRLIW 0xfe00707fU
+#define MATCH_SRAIW 0x4000501bU
+#define MASK_SRAIW 0xfe00707fU
+#define MATCH_ADDW 0x3bU
+#define MASK_ADDW 0xfe00707fU
+#define MATCH_SUBW 0x4000003bU
+#define MASK_SUBW 0xfe00707fU
+#define MATCH_SLLW 0x103bU
+#define MASK_SLLW 0xfe00707fU
+#define MATCH_SRLW 0x503bU
+#define MASK_SRLW 0xfe00707fU
+#define MATCH_SRAW 0x4000503bU
+#define MASK_SRAW 0xfe00707fU
+#define MATCH_LB 0x3U
+#define MASK_LB 0x707fU
+#define MATCH_LH 0x1003U
+#define MASK_LH 0x707fU
+#define MATCH_LW 0x2003U
+#define MASK_LW 0x707fU
+#define MATCH_LD 0x3003U
+#define MASK_LD 0x707fU
+#define MATCH_LBU 0x4003U
+#define MASK_LBU 0x707fU
+#define MATCH_LHU 0x5003U
+#define MASK_LHU 0x707fU
+#define MATCH_LWU 0x6003U
+#define MASK_LWU 0x707fU
+#define MATCH_SB 0x23U
+#define MASK_SB 0x707fU
+#define MATCH_SH 0x1023U
+#define MASK_SH 0x707fU
+#define MATCH_SW 0x2023U
+#define MASK_SW 0x707fU
+#define MATCH_SD 0x3023U
+#define MASK_SD 0x707fU
+#define MATCH_FENCE 0xfU
+#define MASK_FENCE 0x707fU
+#define MATCH_FENCE_I 0x100fU
+#define MASK_FENCE_I 0x707fU
+#define MATCH_MUL 0x2000033U
+#define MASK_MUL 0xfe00707fU
+#define MATCH_MULH 0x2001033U
+#define MASK_MULH 0xfe00707fU
+#define MATCH_MULHSU 0x2002033U
+#define MASK_MULHSU 0xfe00707fU
+#define MATCH_MULHU 0x2003033U
+#define MASK_MULHU 0xfe00707fU
+#define MATCH_DIV 0x2004033U
+#define MASK_DIV 0xfe00707fU
+#define MATCH_DIVU 0x2005033U
+#define MASK_DIVU 0xfe00707fU
+#define MATCH_REM 0x2006033U
+#define MASK_REM 0xfe00707fU
+#define MATCH_REMU 0x2007033U
+#define MASK_REMU 0xfe00707fU
+#define MATCH_MULW 0x200003bU
+#define MASK_MULW 0xfe00707fU
+#define MATCH_DIVW 0x200403bU
+#define MASK_DIVW 0xfe00707fU
+#define MATCH_DIVUW 0x200503bU
+#define MASK_DIVUW 0xfe00707fU
+#define MATCH_REMW 0x200603bU
+#define MASK_REMW 0xfe00707fU
+#define MATCH_REMUW 0x200703bU
+#define MASK_REMUW 0xfe00707fU
+#define MATCH_AMOADD_W 0x202fU
+#define MASK_AMOADD_W 0xf800707fU
+#define MATCH_AMOXOR_W 0x2000202fU
+#define MASK_AMOXOR_W 0xf800707fU
+#define MATCH_AMOOR_W 0x4000202fU
+#define MASK_AMOOR_W 0xf800707fU
+#define MATCH_AMOAND_W 0x6000202fU
+#define MASK_AMOAND_W 0xf800707fU
+#define MATCH_AMOMIN_W 0x8000202fU
+#define MASK_AMOMIN_W 0xf800707fU
+#define MATCH_AMOMAX_W 0xa000202fU
+#define MASK_AMOMAX_W 0xf800707fU
+#define MATCH_AMOMINU_W 0xc000202fU
+#define MASK_AMOMINU_W 0xf800707fU
+#define MATCH_AMOMAXU_W 0xe000202fU
+#define MASK_AMOMAXU_W 0xf800707fU
+#define MATCH_AMOSWAP_W 0x800202fU
+#define MASK_AMOSWAP_W 0xf800707fU
+#define MATCH_LR_W 0x1000202fU
+#define MASK_LR_W 0xf9f0707fU
+#define MATCH_SC_W 0x1800202fU
+#define MASK_SC_W 0xf800707fU
+#define MATCH_AMOADD_D 0x302fU
+#define MASK_AMOADD_D 0xf800707fU
+#define MATCH_AMOXOR_D 0x2000302fU
+#define MASK_AMOXOR_D 0xf800707fU
+#define MATCH_AMOOR_D 0x4000302fU
+#define MASK_AMOOR_D 0xf800707fU
+#define MATCH_AMOAND_D 0x6000302fU
+#define MASK_AMOAND_D 0xf800707fU
+#define MATCH_AMOMIN_D 0x8000302fU
+#define MASK_AMOMIN_D 0xf800707fU
+#define MATCH_AMOMAX_D 0xa000302fU
+#define MASK_AMOMAX_D 0xf800707fU
+#define MATCH_AMOMINU_D 0xc000302fU
+#define MASK_AMOMINU_D 0xf800707fU
+#define MATCH_AMOMAXU_D 0xe000302fU
+#define MASK_AMOMAXU_D 0xf800707fU
+#define MATCH_AMOSWAP_D 0x800302fU
+#define MASK_AMOSWAP_D 0xf800707fU
+#define MATCH_LR_D 0x1000302fU
+#define MASK_LR_D 0xf9f0707fU
+#define MATCH_SC_D 0x1800302fU
+#define MASK_SC_D 0xf800707fU
+#define MATCH_ECALL 0x73U
+#define MASK_ECALL 0xffffffffU
+#define MATCH_EBREAK 0x100073U
+#define MASK_EBREAK 0xffffffffU
+#define MATCH_URET 0x200073U
+#define MASK_URET 0xffffffffU
+#define MATCH_SRET 0x10200073U
+#define MASK_SRET 0xffffffffU
+#define MATCH_HRET 0x20200073U
+#define MASK_HRET 0xffffffffU
+#define MATCH_MRET 0x30200073U
+#define MASK_MRET 0xffffffffU
+#define MATCH_DRET 0x7b200073U
+#define MASK_DRET 0xffffffffU
+#define MATCH_SFENCE_VM 0x10400073U
+#define MASK_SFENCE_VM 0xfff07fffU
+#define MATCH_WFI 0x10500073U
+#define MASK_WFI 0xffffffffU
+#define MATCH_CSRRW 0x1073U
+#define MASK_CSRRW 0x707fU
+#define MATCH_CSRRS 0x2073U
+#define MASK_CSRRS 0x707fU
+#define MATCH_CSRRC 0x3073U
+#define MASK_CSRRC 0x707fU
+#define MATCH_CSRRWI 0x5073U
+#define MASK_CSRRWI 0x707fU
+#define MATCH_CSRRSI 0x6073U
+#define MASK_CSRRSI 0x707fU
+#define MATCH_CSRRCI 0x7073U
+#define MASK_CSRRCI 0x707fU
+#define MATCH_FADD_S 0x53U
+#define MASK_FADD_S 0xfe00007fU
+#define MATCH_FSUB_S 0x8000053U
+#define MASK_FSUB_S 0xfe00007fU
+#define MATCH_FMUL_S 0x10000053U
+#define MASK_FMUL_S 0xfe00007fU
+#define MATCH_FDIV_S 0x18000053U
+#define MASK_FDIV_S 0xfe00007fU
+#define MATCH_FSGNJ_S 0x20000053U
+#define MASK_FSGNJ_S 0xfe00707fU
+#define MATCH_FSGNJN_S 0x20001053U
+#define MASK_FSGNJN_S 0xfe00707fU
+#define MATCH_FSGNJX_S 0x20002053U
+#define MASK_FSGNJX_S 0xfe00707fU
+#define MATCH_FMIN_S 0x28000053U
+#define MASK_FMIN_S 0xfe00707fU
+#define MATCH_FMAX_S 0x28001053U
+#define MASK_FMAX_S 0xfe00707fU
+#define MATCH_FSQRT_S 0x58000053U
+#define MASK_FSQRT_S 0xfff0007fU
+#define MATCH_FADD_D 0x2000053U
+#define MASK_FADD_D 0xfe00007fU
+#define MATCH_FSUB_D 0xa000053U
+#define MASK_FSUB_D 0xfe00007fU
+#define MATCH_FMUL_D 0x12000053U
+#define MASK_FMUL_D 0xfe00007fU
+#define MATCH_FDIV_D 0x1a000053U
+#define MASK_FDIV_D 0xfe00007fU
+#define MATCH_FSGNJ_D 0x22000053U
+#define MASK_FSGNJ_D 0xfe00707fU
+#define MATCH_FSGNJN_D 0x22001053U
+#define MASK_FSGNJN_D 0xfe00707fU
+#define MATCH_FSGNJX_D 0x22002053U
+#define MASK_FSGNJX_D 0xfe00707fU
+#define MATCH_FMIN_D 0x2a000053U
+#define MASK_FMIN_D 0xfe00707fU
+#define MATCH_FMAX_D 0x2a001053U
+#define MASK_FMAX_D 0xfe00707fU
+#define MATCH_FCVT_S_D 0x40100053U
+#define MASK_FCVT_S_D 0xfff0007fU
+#define MATCH_FCVT_D_S 0x42000053U
+#define MASK_FCVT_D_S 0xfff0007fU
+#define MATCH_FSQRT_D 0x5a000053U
+#define MASK_FSQRT_D 0xfff0007fU
+#define MATCH_FLE_S 0xa0000053U
+#define MASK_FLE_S 0xfe00707fU
+#define MATCH_FLT_S 0xa0001053U
+#define MASK_FLT_S 0xfe00707fU
+#define MATCH_FEQ_S 0xa0002053U
+#define MASK_FEQ_S 0xfe00707fU
+#define MATCH_FLE_D 0xa2000053U
+#define MASK_FLE_D 0xfe00707fU
+#define MATCH_FLT_D 0xa2001053U
+#define MASK_FLT_D 0xfe00707fU
+#define MATCH_FEQ_D 0xa2002053U
+#define MASK_FEQ_D 0xfe00707fU
+#define MATCH_FCVT_W_S 0xc0000053U
+#define MASK_FCVT_W_S 0xfff0007fU
+#define MATCH_FCVT_WU_S 0xc0100053U
+#define MASK_FCVT_WU_S 0xfff0007fU
+#define MATCH_FCVT_L_S 0xc0200053U
+#define MASK_FCVT_L_S 0xfff0007fU
+#define MATCH_FCVT_LU_S 0xc0300053U
+#define MASK_FCVT_LU_S 0xfff0007fU
+#define MATCH_FMV_X_S 0xe0000053U
+#define MASK_FMV_X_S 0xfff0707fU
+#define MATCH_FCLASS_S 0xe0001053U
+#define MASK_FCLASS_S 0xfff0707fU
+#define MATCH_FCVT_W_D 0xc2000053U
+#define MASK_FCVT_W_D 0xfff0007fU
+#define MATCH_FCVT_WU_D 0xc2100053U
+#define MASK_FCVT_WU_D 0xfff0007fU
+#define MATCH_FCVT_L_D 0xc2200053U
+#define MASK_FCVT_L_D 0xfff0007fU
+#define MATCH_FCVT_LU_D 0xc2300053U
+#define MASK_FCVT_LU_D 0xfff0007fU
+#define MATCH_FMV_X_D 0xe2000053U
+#define MASK_FMV_X_D 0xfff0707fU
+#define MATCH_FCLASS_D 0xe2001053U
+#define MASK_FCLASS_D 0xfff0707fU
+#define MATCH_FCVT_S_W 0xd0000053U
+#define MASK_FCVT_S_W 0xfff0007fU
+#define MATCH_FCVT_S_WU 0xd0100053U
+#define MASK_FCVT_S_WU 0xfff0007fU
+#define MATCH_FCVT_S_L 0xd0200053U
+#define MASK_FCVT_S_L 0xfff0007fU
+#define MATCH_FCVT_S_LU 0xd0300053U
+#define MASK_FCVT_S_LU 0xfff0007fU
+#define MATCH_FMV_S_X 0xf0000053U
+#define MASK_FMV_S_X 0xfff0707fU
+#define MATCH_FCVT_D_W 0xd2000053U
+#define MASK_FCVT_D_W 0xfff0007fU
+#define MATCH_FCVT_D_WU 0xd2100053U
+#define MASK_FCVT_D_WU 0xfff0007fU
+#define MATCH_FCVT_D_L 0xd2200053U
+#define MASK_FCVT_D_L 0xfff0007fU
+#define MATCH_FCVT_D_LU 0xd2300053U
+#define MASK_FCVT_D_LU 0xfff0007fU
+#define MATCH_FMV_D_X 0xf2000053U
+#define MASK_FMV_D_X 0xfff0707fU
+#define MATCH_FLW 0x2007U
+#define MASK_FLW 0x707fU
+#define MATCH_FLD 0x3007U
+#define MASK_FLD 0x707fU
+#define MATCH_FSW 0x2027U
+#define MASK_FSW 0x707fU
+#define MATCH_FSD 0x3027U
+#define MASK_FSD 0x707fU
+#define MATCH_FMADD_S 0x43U
+#define MASK_FMADD_S 0x600007fU
+#define MATCH_FMSUB_S 0x47U
+#define MASK_FMSUB_S 0x600007fU
+#define MATCH_FNMSUB_S 0x4bU
+#define MASK_FNMSUB_S 0x600007fU
+#define MATCH_FNMADD_S 0x4fU
+#define MASK_FNMADD_S 0x600007fU
+#define MATCH_FMADD_D 0x2000043U
+#define MASK_FMADD_D 0x600007fU
+#define MATCH_FMSUB_D 0x2000047U
+#define MASK_FMSUB_D 0x600007fU
+#define MATCH_FNMSUB_D 0x200004bU
+#define MASK_FNMSUB_D 0x600007fU
+#define MATCH_FNMADD_D 0x200004fU
+#define MASK_FNMADD_D 0x600007fU
+#define MATCH_C_NOP 0x1U
+#define MASK_C_NOP 0xffffU
+#define MATCH_C_ADDI16SP 0x6101U
+#define MASK_C_ADDI16SP 0xef83U
+#define MATCH_C_JR 0x8002U
+#define MASK_C_JR 0xf07fU
+#define MATCH_C_JALR 0x9002U
+#define MASK_C_JALR 0xf07fU
+#define MATCH_C_EBREAK 0x9002U
+#define MASK_C_EBREAK 0xffffU
+#define MATCH_C_LD 0x6000U
+#define MASK_C_LD 0xe003U
+#define MATCH_C_SD 0xe000U
+#define MASK_C_SD 0xe003U
+#define MATCH_C_ADDIW 0x2001U
+#define MASK_C_ADDIW 0xe003U
+#define MATCH_C_LDSP 0x6002U
+#define MASK_C_LDSP 0xe003U
+#define MATCH_C_SDSP 0xe002U
+#define MASK_C_SDSP 0xe003U
+#define MATCH_C_ADDI4SPN 0x0U
+#define MASK_C_ADDI4SPN 0xe003U
+#define MATCH_C_FLD 0x2000U
+#define MASK_C_FLD 0xe003U
+#define MATCH_C_LW 0x4000U
+#define MASK_C_LW 0xe003U
+#define MATCH_C_FLW 0x6000U
+#define MASK_C_FLW 0xe003U
+#define MATCH_C_FSD 0xa000U
+#define MASK_C_FSD 0xe003U
+#define MATCH_C_SW 0xc000U
+#define MASK_C_SW 0xe003U
+#define MATCH_C_FSW 0xe000U
+#define MASK_C_FSW 0xe003U
+#define MATCH_C_ADDI 0x1U
+#define MASK_C_ADDI 0xe003U
+#define MATCH_C_JAL 0x2001U
+#define MASK_C_JAL 0xe003U
+#define MATCH_C_LI 0x4001U
+#define MASK_C_LI 0xe003U
+#define MATCH_C_LUI 0x6001U
+#define MASK_C_LUI 0xe003U
+#define MATCH_C_SRLI 0x8001U
+#define MASK_C_SRLI 0xec03U
+#define MATCH_C_SRAI 0x8401U
+#define MASK_C_SRAI 0xec03U
+#define MATCH_C_ANDI 0x8801U
+#define MASK_C_ANDI 0xec03U
+#define MATCH_C_SUB 0x8c01U
+#define MASK_C_SUB 0xfc63U
+#define MATCH_C_XOR 0x8c21U
+#define MASK_C_XOR 0xfc63U
+#define MATCH_C_OR 0x8c41U
+#define MASK_C_OR 0xfc63U
+#define MATCH_C_AND 0x8c61U
+#define MASK_C_AND 0xfc63U
+#define MATCH_C_SUBW 0x9c01U
+#define MASK_C_SUBW 0xfc63U
+#define MATCH_C_ADDW 0x9c21U
+#define MASK_C_ADDW 0xfc63U
+#define MATCH_C_J 0xa001U
+#define MASK_C_J 0xe003U
+#define MATCH_C_BEQZ 0xc001U
+#define MASK_C_BEQZ 0xe003U
+#define MATCH_C_BNEZ 0xe001U
+#define MASK_C_BNEZ 0xe003U
+#define MATCH_C_SLLI 0x2U
+#define MASK_C_SLLI 0xe003U
+#define MATCH_C_FLDSP 0x2002U
+#define MASK_C_FLDSP 0xe003U
+#define MATCH_C_LWSP 0x4002U
+#define MASK_C_LWSP 0xe003U
+#define MATCH_C_FLWSP 0x6002U
+#define MASK_C_FLWSP 0xe003U
+#define MATCH_C_MV 0x8002U
+#define MASK_C_MV 0xf003U
+#define MATCH_C_ADD 0x9002U
+#define MASK_C_ADD 0xf003U
+#define MATCH_C_FSDSP 0xa002U
+#define MASK_C_FSDSP 0xe003U
+#define MATCH_C_SWSP 0xc002U
+#define MASK_C_SWSP 0xe003U
+#define MATCH_C_FSWSP 0xe002U
+#define MASK_C_FSWSP 0xe003U
+#define MATCH_CUSTOM0 0xbU
+#define MASK_CUSTOM0 0x707fU
+#define MATCH_CUSTOM0_RS1 0x200bU
+#define MASK_CUSTOM0_RS1 0x707fU
+#define MATCH_CUSTOM0_RS1_RS2 0x300bU
+#define MASK_CUSTOM0_RS1_RS2 0x707fU
+#define MATCH_CUSTOM0_RD 0x400bU
+#define MASK_CUSTOM0_RD 0x707fU
+#define MATCH_CUSTOM0_RD_RS1 0x600bU
+#define MASK_CUSTOM0_RD_RS1 0x707fU
+#define MATCH_CUSTOM0_RD_RS1_RS2 0x700bU
+#define MASK_CUSTOM0_RD_RS1_RS2 0x707fU
+#define MATCH_CUSTOM1 0x2bU
+#define MASK_CUSTOM1 0x707fU
+#define MATCH_CUSTOM1_RS1 0x202bU
+#define MASK_CUSTOM1_RS1 0x707fU
+#define MATCH_CUSTOM1_RS1_RS2 0x302bU
+#define MASK_CUSTOM1_RS1_RS2 0x707fU
+#define MATCH_CUSTOM1_RD 0x402bU
+#define MASK_CUSTOM1_RD 0x707fU
+#define MATCH_CUSTOM1_RD_RS1 0x602bU
+#define MASK_CUSTOM1_RD_RS1 0x707fU
+#define MATCH_CUSTOM1_RD_RS1_RS2 0x702bU
+#define MASK_CUSTOM1_RD_RS1_RS2 0x707fU
+#define MATCH_CUSTOM2 0x5bU
+#define MASK_CUSTOM2 0x707fU
+#define MATCH_CUSTOM2_RS1 0x205bU
+#define MASK_CUSTOM2_RS1 0x707fU
+#define MATCH_CUSTOM2_RS1_RS2 0x305bU
+#define MASK_CUSTOM2_RS1_RS2 0x707fU
+#define MATCH_CUSTOM2_RD 0x405bU
+#define MASK_CUSTOM2_RD 0x707fU
+#define MATCH_CUSTOM2_RD_RS1 0x605bU
+#define MASK_CUSTOM2_RD_RS1 0x707fU
+#define MATCH_CUSTOM2_RD_RS1_RS2 0x705bU
+#define MASK_CUSTOM2_RD_RS1_RS2 0x707fU
+#define MATCH_CUSTOM3 0x7bU
+#define MASK_CUSTOM3 0x707fU
+#define MATCH_CUSTOM3_RS1 0x207bU
+#define MASK_CUSTOM3_RS1 0x707fU
+#define MATCH_CUSTOM3_RS1_RS2 0x307bU
+#define MASK_CUSTOM3_RS1_RS2 0x707fU
+#define MATCH_CUSTOM3_RD 0x407bU
+#define MASK_CUSTOM3_RD 0x707fU
+#define MATCH_CUSTOM3_RD_RS1 0x607bU
+#define MASK_CUSTOM3_RD_RS1 0x707fU
+#define MATCH_CUSTOM3_RD_RS1_RS2 0x707bU
+#define MASK_CUSTOM3_RD_RS1_RS2 0x707fU
+
+#if 0
+#define CSR_FFLAGS 0x1U
+#define CSR_FRM 0x2U
+#define CSR_FCSR 0x3U
+#define CSR_CYCLE 0xc00U
+#define CSR_TIME 0xc01U
+#define CSR_INSTRET 0xc02U
+#define CSR_HPMCOUNTER3 0xc03U
+#define CSR_HPMCOUNTER4 0xc04U
+#define CSR_HPMCOUNTER5 0xc05U
+#define CSR_HPMCOUNTER6 0xc06U
+#define CSR_HPMCOUNTER7 0xc07U
+#define CSR_HPMCOUNTER8 0xc08U
+#define CSR_HPMCOUNTER9 0xc09U
+#define CSR_HPMCOUNTER10 0xc0aU
+#define CSR_HPMCOUNTER11 0xc0bU
+#define CSR_HPMCOUNTER12 0xc0cU
+#define CSR_HPMCOUNTER13 0xc0dU
+#define CSR_HPMCOUNTER14 0xc0eU
+#define CSR_HPMCOUNTER15 0xc0fU
+#define CSR_HPMCOUNTER16 0xc10U
+#define CSR_HPMCOUNTER17 0xc11U
+#define CSR_HPMCOUNTER18 0xc12U
+#define CSR_HPMCOUNTER19 0xc13U
+#define CSR_HPMCOUNTER20 0xc14U
+#define CSR_HPMCOUNTER21 0xc15U
+#define CSR_HPMCOUNTER22 0xc16U
+#define CSR_HPMCOUNTER23 0xc17U
+#define CSR_HPMCOUNTER24 0xc18U
+#define CSR_HPMCOUNTER25 0xc19U
+#define CSR_HPMCOUNTER26 0xc1aU
+#define CSR_HPMCOUNTER27 0xc1bU
+#define CSR_HPMCOUNTER28 0xc1cU
+#define CSR_HPMCOUNTER29 0xc1dU
+#define CSR_HPMCOUNTER30 0xc1eU
+#define CSR_HPMCOUNTER31 0xc1fU
+#define CSR_SSTATUS 0x100U
+#define CSR_SIE 0x104U
+#define CSR_STVEC 0x105U
+#define CSR_SSCRATCH 0x140U
+#define CSR_SEPC 0x141U
+#define CSR_SCAUSE 0x142U
+#define CSR_SBADADDR 0x143U
+#define CSR_SIP 0x144U
+#define CSR_SPTBR 0x180U
+#define CSR_MSTATUS 0x300U
+#define CSR_MISA 0x301U
+#define CSR_MEDELEG 0x302U
+#define CSR_MIDELEG 0x303U
+#define CSR_MIE 0x304U
+#define CSR_MTVEC 0x305U
+#define CSR_MSCRATCH 0x340U
+#define CSR_MEPC 0x341U
+#define CSR_MCAUSE 0x342U
+#define CSR_MBADADDR 0x343U
+#define CSR_MIP 0x344U
+#define CSR_TSELECT 0x7a0U
+#define CSR_TDATA1 0x7a1U
+#define CSR_TDATA2 0x7a2U
+#define CSR_TDATA3 0x7a3U
+#define CSR_DCSR 0x7b0U
+#define CSR_DPC 0x7b1U
+#define CSR_DSCRATCH 0x7b2U
+#define CSR_MCYCLE 0xb00U
+#define CSR_MINSTRET 0xb02U
+#define CSR_MHPMCOUNTER3 0xb03U
+#define CSR_MHPMCOUNTER4 0xb04U
+#define CSR_MHPMCOUNTER5 0xb05U
+#define CSR_MHPMCOUNTER6 0xb06U
+#define CSR_MHPMCOUNTER7 0xb07U
+#define CSR_MHPMCOUNTER8 0xb08U
+#define CSR_MHPMCOUNTER9 0xb09U
+#define CSR_MHPMCOUNTER10 0xb0aU
+#define CSR_MHPMCOUNTER11 0xb0bU
+#define CSR_MHPMCOUNTER12 0xb0cU
+#define CSR_MHPMCOUNTER13 0xb0dU
+#define CSR_MHPMCOUNTER14 0xb0eU
+#define CSR_MHPMCOUNTER15 0xb0fU
+#define CSR_MHPMCOUNTER16 0xb10U
+#define CSR_MHPMCOUNTER17 0xb11U
+#define CSR_MHPMCOUNTER18 0xb12U
+#define CSR_MHPMCOUNTER19 0xb13U
+#define CSR_MHPMCOUNTER20 0xb14U
+#define CSR_MHPMCOUNTER21 0xb15U
+#define CSR_MHPMCOUNTER22 0xb16U
+#define CSR_MHPMCOUNTER23 0xb17U
+#define CSR_MHPMCOUNTER24 0xb18U
+#define CSR_MHPMCOUNTER25 0xb19U
+#define CSR_MHPMCOUNTER26 0xb1aU
+#define CSR_MHPMCOUNTER27 0xb1bU
+#define CSR_MHPMCOUNTER28 0xb1cU
+#define CSR_MHPMCOUNTER29 0xb1dU
+#define CSR_MHPMCOUNTER30 0xb1eU
+#define CSR_MHPMCOUNTER31 0xb1fU
+#define CSR_MUCOUNTEREN 0x320U
+#define CSR_MSCOUNTEREN 0x321U
+#define CSR_MHPMEVENT3 0x323U
+#define CSR_MHPMEVENT4 0x324U
+#define CSR_MHPMEVENT5 0x325U
+#define CSR_MHPMEVENT6 0x326U
+#define CSR_MHPMEVENT7 0x327U
+#define CSR_MHPMEVENT8 0x328U
+#define CSR_MHPMEVENT9 0x329U
+#define CSR_MHPMEVENT10 0x32aU
+#define CSR_MHPMEVENT11 0x32bU
+#define CSR_MHPMEVENT12 0x32cU
+#define CSR_MHPMEVENT13 0x32dU
+#define CSR_MHPMEVENT14 0x32eU
+#define CSR_MHPMEVENT15 0x32fU
+#define CSR_MHPMEVENT16 0x330U
+#define CSR_MHPMEVENT17 0x331U
+#define CSR_MHPMEVENT18 0x332U
+#define CSR_MHPMEVENT19 0x333U
+#define CSR_MHPMEVENT20 0x334U
+#define CSR_MHPMEVENT21 0x335U
+#define CSR_MHPMEVENT22 0x336U
+#define CSR_MHPMEVENT23 0x337U
+#define CSR_MHPMEVENT24 0x338U
+#define CSR_MHPMEVENT25 0x339U
+#define CSR_MHPMEVENT26 0x33aU
+#define CSR_MHPMEVENT27 0x33bU
+#define CSR_MHPMEVENT28 0x33cU
+#define CSR_MHPMEVENT29 0x33dU
+#define CSR_MHPMEVENT30 0x33eU
+#define CSR_MHPMEVENT31 0x33fU
+#define CSR_MVENDORID 0xf11U
+#define CSR_MARCHID 0xf12U
+#define CSR_MIMPID 0xf13U
+#define CSR_MHARTID 0xf14U
+#define CSR_CYCLEH 0xc80U
+#define CSR_TIMEH 0xc81U
+#define CSR_INSTRETH 0xc82U
+#define CSR_HPMCOUNTER3H 0xc83U
+#define CSR_HPMCOUNTER4H 0xc84U
+#define CSR_HPMCOUNTER5H 0xc85U
+#define CSR_HPMCOUNTER6H 0xc86U
+#define CSR_HPMCOUNTER7H 0xc87U
+#define CSR_HPMCOUNTER8H 0xc88U
+#define CSR_HPMCOUNTER9H 0xc89U
+#define CSR_HPMCOUNTER10H 0xc8aU
+#define CSR_HPMCOUNTER11H 0xc8bU
+#define CSR_HPMCOUNTER12H 0xc8cU
+#define CSR_HPMCOUNTER13H 0xc8dU
+#define CSR_HPMCOUNTER14H 0xc8eU
+#define CSR_HPMCOUNTER15H 0xc8fU
+#define CSR_HPMCOUNTER16H 0xc90U
+#define CSR_HPMCOUNTER17H 0xc91U
+#define CSR_HPMCOUNTER18H 0xc92U
+#define CSR_HPMCOUNTER19H 0xc93U
+#define CSR_HPMCOUNTER20H 0xc94U
+#define CSR_HPMCOUNTER21H 0xc95U
+#define CSR_HPMCOUNTER22H 0xc96U
+#define CSR_HPMCOUNTER23H 0xc97U
+#define CSR_HPMCOUNTER24H 0xc98U
+#define CSR_HPMCOUNTER25H 0xc99U
+#define CSR_HPMCOUNTER26H 0xc9aU
+#define CSR_HPMCOUNTER27H 0xc9bU
+#define CSR_HPMCOUNTER28H 0xc9cU
+#define CSR_HPMCOUNTER29H 0xc9dU
+#define CSR_HPMCOUNTER30H 0xc9eU
+#define CSR_HPMCOUNTER31H 0xc9fU
+#define CSR_MCYCLEH 0xb80U
+#define CSR_MINSTRETH 0xb82U
+#define CSR_MHPMCOUNTER3H 0xb83U
+#define CSR_MHPMCOUNTER4H 0xb84U
+#define CSR_MHPMCOUNTER5H 0xb85U
+#define CSR_MHPMCOUNTER6H 0xb86U
+#define CSR_MHPMCOUNTER7H 0xb87U
+#define CSR_MHPMCOUNTER8H 0xb88U
+#define CSR_MHPMCOUNTER9H 0xb89U
+#define CSR_MHPMCOUNTER10H 0xb8aU
+#define CSR_MHPMCOUNTER11H 0xb8bU
+#define CSR_MHPMCOUNTER12H 0xb8cU
+#define CSR_MHPMCOUNTER13H 0xb8dU
+#define CSR_MHPMCOUNTER14H 0xb8eU
+#define CSR_MHPMCOUNTER15H 0xb8fU
+#define CSR_MHPMCOUNTER16H 0xb90U
+#define CSR_MHPMCOUNTER17H 0xb91U
+#define CSR_MHPMCOUNTER18H 0xb92U
+#define CSR_MHPMCOUNTER19H 0xb93U
+#define CSR_MHPMCOUNTER20H 0xb94U
+#define CSR_MHPMCOUNTER21H 0xb95U
+#define CSR_MHPMCOUNTER22H 0xb96U
+#define CSR_MHPMCOUNTER23H 0xb97U
+#define CSR_MHPMCOUNTER24H 0xb98U
+#define CSR_MHPMCOUNTER25H 0xb99U
+#define CSR_MHPMCOUNTER26H 0xb9aU
+#define CSR_MHPMCOUNTER27H 0xb9bU
+#define CSR_MHPMCOUNTER28H 0xb9cU
+#define CSR_MHPMCOUNTER29H 0xb9dU
+#define CSR_MHPMCOUNTER30H 0xb9eU
+#define CSR_MHPMCOUNTER31H 0xb9fU
+#endif
+
+#define CAUSE_MISALIGNED_FETCH 0x0
+#define CAUSE_FAULT_FETCH 0x1
+#define CAUSE_ILLEGAL_INSTRUCTION 0x2
+#define CAUSE_BREAKPOINT 0x3
+#define CAUSE_MISALIGNED_LOAD 0x4
+#define CAUSE_FAULT_LOAD 0x5
+#define CAUSE_MISALIGNED_STORE 0x6
+#define CAUSE_FAULT_STORE 0x7
+#define CAUSE_USER_ECALL 0x8
+#define CAUSE_SUPERVISOR_ECALL 0x9
+#define CAUSE_HYPERVISOR_ECALL 0xa
+#define CAUSE_MACHINE_ECALL 0xb
 #endif
 #if defined(DECLARE_INSN)
 DECLARE_INSN(beq, MATCH_BEQ, MASK_BEQ)
@@ -1231,4 +1327,3 @@ DECLARE_CAUSE("supervisor_ecall", CAUSE_SUPERVISOR_ECALL)
 DECLARE_CAUSE("hypervisor_ecall", CAUSE_HYPERVISOR_ECALL)
 DECLARE_CAUSE("machine_ecall", CAUSE_MACHINE_ECALL)
 #endif
-
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/fft.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/fft.c
deleted file mode 100644
index 047a2df4d..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/fft.c
+++ /dev/null
@@ -1,79 +0,0 @@
-/* Copyright 2018 Canaan Inc.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
-* @file fft.c
-* @brief kendryte k210 source code
-*                https://github.com/kendryte/kendryte-standalone-sdk.git
-* @version 1.0
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
-
-#include <stddef.h>
-#include <assert.h>
-#include "dmac.h"
-#include "utils.h"
-#include "sysctl.h"
-#include "fft.h"
-
-static volatile fft_t *const fft = (volatile fft_t *)FFT_BASE_ADDR;
-
-static void fft_init(uint8_t point, uint8_t mode, uint16_t shift, uint8_t is_dma, uint8_t input_mode, uint8_t data_mode)
-{
-    fft->fft_ctrl.fft_point = point;
-    fft->fft_ctrl.fft_mode = mode;
-    fft->fft_ctrl.fft_shift = shift;
-    fft->fft_ctrl.dma_send = is_dma;
-    fft->fft_ctrl.fft_enable = 1;
-    fft->fft_ctrl.fft_input_mode = input_mode;
-    fft->fft_ctrl.fft_data_mode = data_mode;
-}
-
-void fft_complex_uint16_dma(dmac_channel_number_t dma_send_channel_num, dmac_channel_number_t dma_receive_channel_num,
-                        uint16_t shift, fft_direction_t direction, const uint64_t *input, size_t point_num, uint64_t *output)
-{
-    fft_point_t point = FFT_512;
-    switch(point_num)
-    {
-        case 512:
-            point = FFT_512;
-            break;
-        case 256:
-            point = FFT_256;
-            break;
-        case 128:
-            point = FFT_128;
-            break;
-        case 64:
-            point = FFT_64;
-            break;
-        default:
-            ASSERT(!"fft point error");
-            break;
-    }
-    sysctl_clock_enable(SYSCTL_CLOCK_FFT);
-    sysctl_reset(SYSCTL_RESET_FFT);
-    fft_init(point, direction, shift, 1, 0, 0);
-    sysctl_dma_select(dma_receive_channel_num, SYSCTL_DMA_SELECT_FFT_RX_REQ);
-    sysctl_dma_select(dma_send_channel_num, SYSCTL_DMA_SELECT_FFT_TX_REQ);
-    dmac_set_single_mode(dma_receive_channel_num, (void *)(&fft->fft_output_fifo), output, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
-        DMAC_MSIZE_4, DMAC_TRANS_WIDTH_64, point_num>>1);
-    dmac_set_single_mode(dma_send_channel_num, input, (void *)(&fft->fft_input_fifo), DMAC_ADDR_INCREMENT, DMAC_ADDR_NOCHANGE,
-        DMAC_MSIZE_4, DMAC_TRANS_WIDTH_64, point_num>>1);
-    dmac_wait_done(dma_receive_channel_num);
-}
-
-
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/fft.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/fft.h
deleted file mode 100644
index 16c4809b1..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/fft.h
+++ /dev/null
@@ -1,257 +0,0 @@
-/* Copyright 2018 Canaan Inc.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
-* @file fft.h
-* @brief kendryte k210 source code
-*                https://github.com/kendryte/kendryte-standalone-sdk.git
-* @version 1.0
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
-
-#ifndef _DRIVER_FFT_H
-#define _DRIVER_FFT_H
-
-#include <stdint.h>
-#include "platform.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef struct _complex_hard
-{
-    int16_t real;
-    int16_t imag;
-} complex_hard_t;
-
-typedef struct _fft_data
-{
-    int16_t I1;
-    int16_t R1;
-    int16_t I2;
-    int16_t R2;
-} fft_data_t;
-
-typedef enum _fft_point
-{
-    FFT_512,
-    FFT_256,
-    FFT_128,
-    FFT_64,
-} fft_point_t;
-
-typedef enum _fft_direction
-{
-    FFT_DIR_BACKWARD,
-    FFT_DIR_FORWARD,
-    FFT_DIR_MAX,
-} fft_direction_t;
-
-/**
- * @brief      FFT algorithm accelerator register
- *
- * @note       FFT algorithm accelerator register table
- *
- * | Offset    | Name           | Description                         |
- * |-----------|----------------|-------------------------------------|
- * | 0x00      | fft_input_fifo | input data fifo                     |
- * | 0x08      | fft_ctrl       | fft ctrl reg                        |
- * | 0x10      | fifo_ctrl      | fifo ctrl                           |
- * | 0x18      | intr_mask      | interrupt mask                      |
- * | 0x20      | intr_clear     | interrupt clear                     |
- * | 0x28      | fft_status     | fft status reg                      |
- * | 0x30      | fft_status_raw | fft_status_raw                      |
- * | 0x38      | fft_output_fifo| fft_output_fifo                     |
- *
- */
-
-/**
- * @brief      The calculation data is input through this register
- *
- *             No. 0 Register (0x00)
- */
-typedef struct _fft_input_fifo
-{
-    uint64_t fft_input_fifo : 64;
-} __attribute__((packed, aligned(8))) fft_input_fifo_t;
-
-/**
- * @brief      fft ctrl reg
- *
- *             No. 1 Register (0x08)
- */
-typedef struct _fft_fft_ctrl
-{
-    /**
-     *FFT calculation data length:
-     *b'000:512 point; b'001:256 point; b'010:128 point; b'011:64 point;
-     */
-    uint64_t fft_point : 3;
-    /* FFT mode: b'0:FFT b'1:IFFT */
-    uint64_t fft_mode : 1;
-    /* Corresponding to the nine layer butterfly shift operation, 0x0: does not shift; 0x1: shift 1st layer. ...*/
-    uint64_t fft_shift : 9;
-    /* FFT enable: b'0:disable b'1:enable */
-    uint64_t fft_enable : 1;
-    /* FFT DMA enable: b'0:disable b'1:enable */
-    uint64_t dma_send : 1;
-    /**
-     *Input data arrangement: b'00:RIRI; b'01:only real part exist, RRRR;
-     *b'10:First input the real part and then input the imaginary part.
-     */
-    uint64_t fft_input_mode : 2;
-    /* Effective width of input data. b'0:64bit effective; b'1:32bit effective  */
-    uint64_t fft_data_mode : 1;
-    uint64_t reserved : 46;
-} __attribute__((packed, aligned(8))) fft_fft_ctrl_t;
-
-/**
- * @brief      fifo ctrl
- *
- *             No. 2 Register (0x10)
- */
-typedef struct _fft_fifo_ctrl
-{
-    /* Response memory initialization flag.b'1:initialization */
-    uint64_t resp_fifo_flush_n : 1;
-    /* Command memory initialization flag.b'1:initialization */
-    uint64_t cmd_fifo_flush_n : 1;
-    /* Output interface memory initialization flag.b'1:initialization */
-    uint64_t gs_fifo_flush_n : 1;
-    uint64_t reserved : 61;
-} __attribute__((packed, aligned(8))) fft_fifo_ctrl_t;
-
-/**
- * @brief      interrupt mask
- *
- *             No. 3 Register (0x18)
- */
-typedef struct _fft_intr_mask
-{
-    /**
-     *FFT return status set.
-     *b'0:FFT returns to the state after completion.
-     *b'1:FFT does not return to the state after completion
-     */
-    uint64_t fft_done_mask : 1;
-    uint64_t reserved : 63;
-} __attribute__((packed, aligned(8))) fft_intr_mask_t;
-
-/**
- * @brief      interrupt clear
- *
- *             No. 4 Register (0x20)
- */
-typedef struct _fft_intr_clear
-{
-    /* The interrupt state clears. b'1:clear current interrupt request */
-    uint64_t fft_done_clear : 1;
-    uint64_t reserved1 : 63;
-} __attribute__((packed, aligned(8))) fft_intr_clear_t;
-
-/**
- * @brief      fft status reg
- *
- *             No. 5 Register (0x28)
- */
-typedef struct _fft_status
-{
-    /* FFT calculation state.b'0:not completed; b'1:completed */
-    uint64_t fft_done_status : 1;
-    uint64_t reserved1 : 63;
-} __attribute__((packed, aligned(8))) fft_status_t;
-
-/**
- * @brief      fft status raw
- *
- *             No. 6 Register (0x30)
- */
-typedef struct _fft_status_raw
-{
-    /* FFT calculation state. b'1:done */
-    uint64_t fft_done_status_raw : 1;
-    /* FFT calculation state. b'1:working */
-    uint64_t fft_work_status_raw : 1;
-    uint64_t reserved : 62;
-} __attribute__((packed, aligned(8))) fft_status_raw_t;
-
-/**
- * @brief      Output of FFT calculation data through this register
- *
- *             No. 7 Register (0x38)
- */
-typedef struct _fft_output_fifo
-{
-    uint64_t fft_output_fifo : 64;
-} __attribute__((packed, aligned(8))) fft_output_fifo_t;
-
-/**
- * @brief      Fast Fourier transform (FFT) algorithm accelerator object
- *
- *             A fast Fourier transform (FFT) algorithm computes the discrete
- *             Fourier transform (DFT) of a sequence, or its inverse (IFFT).
- *             Fourier analysis converts a signal from its original domain
- *             (often time or space) to a representation in the frequency
- *             domain and vice versa. An FFT rapidly computes such
- *             transformations by factorizing the DFT matrix into a product of
- *             sparse (mostly zero) factors.
- */
-typedef struct _fft
-{
-    /* No. 0 (0x00): input data fifo */
-    fft_input_fifo_t fft_input_fifo;
-    /* No. 1 (0x08): fft ctrl reg */
-    fft_fft_ctrl_t fft_ctrl;
-    /* No. 2 (0x10): fifo ctrl */
-    fft_fifo_ctrl_t fifo_ctrl;
-    /* No. 3 (0x18): interrupt mask */
-    fft_intr_mask_t intr_mask;
-    /* No. 4 (0x20): interrupt clear */
-    fft_intr_clear_t intr_clear;
-    /* No. 5 (0x28): fft status reg */
-    fft_status_t fft_status;
-    /* No. 6 (0x30): fft_status_raw */
-    fft_status_raw_t fft_status_raw;
-    /* No. 7 (0x38): fft_output_fifo */
-    fft_output_fifo_t fft_output_fifo;
-} __attribute__((packed, aligned(8))) fft_t;
-
-/**
- * @brief       Do 16bit quantized complex FFT by DMA
- *
- * @param[in]   dma_send_channel_num        Dmac send channel number.
- * @param[in]   dma_receive_channel_num     Dmac receive channel number.
- * @param[in]   shift                       The shifts selection in 9 stage
- * @param[in]   direction                   The direction
- * @param[in]   input                       The input data
- * @param[in]   point                       The FFT points count
- * @param[out]  output                      The output data
- */
-void fft_complex_uint16_dma(dmac_channel_number_t dma_send_channel_num,
-    dmac_channel_number_t dma_receive_channel_num,
-    uint16_t shift,
-    fft_direction_t direction,
-    const uint64_t *input,
-    size_t point_num,
-    uint64_t *output);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* _DRIVER_FFT_H */
-
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/fpioa.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/fpioa.c
deleted file mode 100644
index 6ec7b9ce2..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/fpioa.c
+++ /dev/null
@@ -1,5408 +0,0 @@
-/* Copyright 2018 Canaan Inc.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
-* @file fpioa.c
-* @brief kendryte k210 source code
-*                https://github.com/kendryte/kendryte-standalone-sdk.git
-* @version 1.0
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
-
-#include <stddef.h>
-#include <stdint.h>
-#include "sysctl.h"
-#include "fpioa.h"
-
-volatile fpioa_t *const fpioa = (volatile fpioa_t *)FPIOA_BASE_ADDR;
-
-/**
- * @brief      Internal used FPIOA function initialize cell
- *
- *             This is NOT fpioa_io_config_t, can't assign directly
- *
- */
-typedef struct _fpioa_assign_t
-{
-    uint32_t ch_sel : 8;
-    /* Channel select from 256 input. */
-    uint32_t ds : 4;
-    /* Driving selector. */
-    uint32_t oe_en : 1;
-    /* Static output enable, will AND with OE_INV. */
-    uint32_t oe_inv : 1;
-    /* Invert output enable. */
-    uint32_t do_sel : 1;
-    /* Data output select: 0 for DO, 1 for OE. */
-    uint32_t do_inv : 1;
-    /* Invert the result of data output select (DO_SEL). */
-    uint32_t pu : 1;
-    /* Pull up enable. 0 for nothing, 1 for pull up. */
-    uint32_t pd : 1;
-    /* Pull down enable. 0 for nothing, 1 for pull down. */
-    uint32_t resv0 : 1;
-    /* Reserved bits. */
-    uint32_t sl : 1;
-    /* Slew rate control enable. */
-    uint32_t ie_en : 1;
-    /* Static input enable, will AND with IE_INV. */
-    uint32_t ie_inv : 1;
-    /* Invert input enable. */
-    uint32_t di_inv : 1;
-    /* Invert Data input. */
-    uint32_t st : 1;
-    /* Schmitt trigger. */
-    uint32_t tie_en : 1;
-    /* Input tie enable, 1 for enable, 0 for disable. */
-    uint32_t tie_val : 1;
-    /* Input tie value, 1 for high, 0 for low. */
-    uint32_t resv1 : 5;
-    /* Reserved bits. */
-    uint32_t pad_di : 1;
-    /* Read current PAD's data input. */
-} __attribute__((packed, aligned(4))) fpioa_assign_t;
-
-/* Function list */
-static const fpioa_assign_t function_config[FUNC_MAX] =
-{
-    {
-        .ch_sel  = FUNC_JTAG_TCLK,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_JTAG_TDI,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_JTAG_TMS,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_JTAG_TDO,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_SPI0_D0,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 1,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 1,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_SPI0_D1,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 1,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 1,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_SPI0_D2,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 1,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 1,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_SPI0_D3,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 1,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 1,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_SPI0_D4,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 1,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 1,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_SPI0_D5,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 1,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 1,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_SPI0_D6,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 1,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 1,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_SPI0_D7,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 1,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 1,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_SPI0_SS0,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_SPI0_SS1,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_SPI0_SS2,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_SPI0_SS3,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_SPI0_ARB,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 1,
-        .tie_val = 1,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_SPI0_SCLK,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UARTHS_RX,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UARTHS_TX,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_RESV6,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_RESV7,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_CLK_SPI1,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_CLK_I2C1,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIOHS0,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIOHS1,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIOHS2,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIOHS3,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIOHS4,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIOHS5,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIOHS6,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIOHS7,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIOHS8,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIOHS9,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIOHS10,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIOHS11,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIOHS12,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIOHS13,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIOHS14,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIOHS15,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIOHS16,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIOHS17,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIOHS18,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIOHS19,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIOHS20,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIOHS21,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIOHS22,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIOHS23,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIOHS24,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIOHS25,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIOHS26,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIOHS27,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIOHS28,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIOHS29,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIOHS30,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIOHS31,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIO0,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIO1,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIO2,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIO3,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIO4,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIO5,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIO6,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_GPIO7,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART1_RX,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART1_TX,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART2_RX,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART2_TX,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART3_RX,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART3_TX,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_SPI1_D0,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 1,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 1,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_SPI1_D1,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 1,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 1,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_SPI1_D2,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 1,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 1,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_SPI1_D3,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 1,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 1,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_SPI1_D4,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 1,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 1,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_SPI1_D5,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 1,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 1,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_SPI1_D6,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 1,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 1,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_SPI1_D7,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 1,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 1,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_SPI1_SS0,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_SPI1_SS1,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_SPI1_SS2,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_SPI1_SS3,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_SPI1_ARB,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 1,
-        .tie_val = 1,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_SPI1_SCLK,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_SPI_SLAVE_D0,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 1,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 1,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_SPI_SLAVE_SS,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_SPI_SLAVE_SCLK,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2S0_MCLK,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2S0_SCLK,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2S0_WS,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2S0_IN_D0,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2S0_IN_D1,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2S0_IN_D2,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2S0_IN_D3,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2S0_OUT_D0,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2S0_OUT_D1,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2S0_OUT_D2,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2S0_OUT_D3,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2S1_MCLK,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2S1_SCLK,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2S1_WS,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2S1_IN_D0,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2S1_IN_D1,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2S1_IN_D2,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2S1_IN_D3,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2S1_OUT_D0,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2S1_OUT_D1,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2S1_OUT_D2,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2S1_OUT_D3,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2S2_MCLK,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2S2_SCLK,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2S2_WS,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2S2_IN_D0,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2S2_IN_D1,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2S2_IN_D2,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2S2_IN_D3,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2S2_OUT_D0,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2S2_OUT_D1,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2S2_OUT_D2,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2S2_OUT_D3,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_RESV0,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_RESV1,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_RESV2,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_RESV3,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_RESV4,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_RESV5,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2C0_SCLK,
-        .ds      = 0x0,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 1,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 1,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2C0_SDA,
-        .ds      = 0x0,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 1,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 1,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2C1_SCLK,
-        .ds      = 0x0,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 1,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 1,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2C1_SDA,
-        .ds      = 0x0,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 1,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 1,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2C2_SCLK,
-        .ds      = 0x0,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 1,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 1,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_I2C2_SDA,
-        .ds      = 0x0,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 1,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 1,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_CMOS_XCLK,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_CMOS_RST,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_CMOS_PWDN,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_CMOS_VSYNC,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_CMOS_HREF,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_CMOS_PCLK,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_CMOS_D0,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_CMOS_D1,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_CMOS_D2,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_CMOS_D3,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_CMOS_D4,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_CMOS_D5,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_CMOS_D6,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_CMOS_D7,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_SCCB_SCLK,
-        .ds      = 0x0,
-        .oe_en   = 1,
-        .oe_inv  = 1,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 1,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 1,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_SCCB_SDA,
-        .ds      = 0x0,
-        .oe_en   = 1,
-        .oe_inv  = 1,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 1,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 1,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART1_CTS,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART1_DSR,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART1_DCD,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART1_RI,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART1_SIR_IN,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART1_DTR,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART1_RTS,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART1_OUT2,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART1_OUT1,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART1_SIR_OUT,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART1_BAUD,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART1_RE,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART1_DE,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART1_RS485_EN,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART2_CTS,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART2_DSR,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART2_DCD,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART2_RI,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART2_SIR_IN,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART2_DTR,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART2_RTS,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART2_OUT2,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART2_OUT1,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART2_SIR_OUT,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART2_BAUD,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART2_RE,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART2_DE,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART2_RS485_EN,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART3_CTS,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART3_DSR,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART3_DCD,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART3_RI,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART3_SIR_IN,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART3_DTR,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART3_RTS,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART3_OUT2,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART3_OUT1,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART3_SIR_OUT,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART3_BAUD,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART3_RE,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART3_DE,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_UART3_RS485_EN,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_TIMER0_TOGGLE1,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_TIMER0_TOGGLE2,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_TIMER0_TOGGLE3,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_TIMER0_TOGGLE4,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_TIMER1_TOGGLE1,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_TIMER1_TOGGLE2,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_TIMER1_TOGGLE3,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_TIMER1_TOGGLE4,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_TIMER2_TOGGLE1,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_TIMER2_TOGGLE2,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_TIMER2_TOGGLE3,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_TIMER2_TOGGLE4,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_CLK_SPI2,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_CLK_I2C2,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_INTERNAL0,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_INTERNAL1,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_INTERNAL2,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_INTERNAL3,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_INTERNAL4,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_INTERNAL5,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_INTERNAL6,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_INTERNAL7,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_INTERNAL8,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_INTERNAL9,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_INTERNAL10,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_INTERNAL11,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_INTERNAL12,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_INTERNAL13,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 1,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_INTERNAL14,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 1,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 1,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_INTERNAL15,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_INTERNAL16,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_INTERNAL17,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_CONSTANT,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_INTERNAL18,
-        .ds      = 0x0,
-        .oe_en   = 0,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 1,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 1,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_DEBUG0,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_DEBUG1,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_DEBUG2,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_DEBUG3,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_DEBUG4,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_DEBUG5,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_DEBUG6,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_DEBUG7,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_DEBUG8,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_DEBUG9,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_DEBUG10,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_DEBUG11,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_DEBUG12,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_DEBUG13,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_DEBUG14,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_DEBUG15,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_DEBUG16,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_DEBUG17,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_DEBUG18,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_DEBUG19,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_DEBUG20,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_DEBUG21,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_DEBUG22,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_DEBUG23,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_DEBUG24,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_DEBUG25,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_DEBUG26,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_DEBUG27,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_DEBUG28,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_DEBUG29,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_DEBUG30,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-    {
-        .ch_sel  = FUNC_DEBUG31,
-        .ds      = 0xf,
-        .oe_en   = 1,
-        .oe_inv  = 0,
-        .do_sel  = 0,
-        .do_inv  = 0,
-        .pu      = 0,
-        .pd      = 0,
-        .resv1   = 0,
-        .sl      = 0,
-        .ie_en   = 0,
-        .ie_inv  = 0,
-        .di_inv  = 0,
-        .st      = 0,
-        .tie_en  = 0,
-        .tie_val = 0,
-        .resv0   = 0,
-        .pad_di  = 0
-    },
-};
-
-int fpioa_init(void)
-{
-    int i = 0;
-
-    /* Enable fpioa clock in system controller */
-    sysctl_clock_enable(SYSCTL_CLOCK_FPIOA);
-
-    /* Initialize tie */
-    fpioa_tie_t tie = { 0 };
-
-    /* Set tie enable and tie value */
-    for (i = 0; i < FUNC_MAX; i++)
-    {
-        tie.en[i / 32] |= (function_config[i].tie_en << (i % 32));
-        tie.val[i / 32] |= (function_config[i].tie_val << (i % 32));
-    }
-
-    /* Atomic write every 32bit register to fpioa function */
-    for (i = 0; i < FUNC_MAX / 32; i++)
-    {
-        /* Set value before enable */
-        fpioa->tie.val[i] = tie.val[i];
-        fpioa->tie.en[i] = tie.en[i];
-    }
-
-    return 0;
-}
-
-int fpioa_get_io(int number, fpioa_io_config_t *cfg)
-{
-    /* Check parameters */
-    if (number < 0 || number >= FPIOA_NUM_IO || cfg == NULL)
-        return -1;
-    /* Atomic read register */
-    *cfg = fpioa->io[number];
-    return 0;
-}
-
-int fpioa_set_io(int number, fpioa_io_config_t *cfg)
-{
-    /* Check parameters */
-    if (number < 0 || number >= FPIOA_NUM_IO || cfg == NULL)
-        return -1;
-    /* Atomic write register */
-    fpioa->io[number] = *cfg;
-    return 0;
-}
-
-int fpioa_set_io_pull(int number, fpioa_pull_t pull)
-{
-    /* Check parameters */
-    if (number < 0 || number >= FPIOA_NUM_IO || pull >= FPIOA_PULL_MAX)
-        return -1;
-
-    /* Atomic read register */
-    fpioa_io_config_t cfg = fpioa->io[number];
-
-    switch (pull)
-    {
-        case FPIOA_PULL_NONE:
-            cfg.pu = 0;
-            cfg.pd = 0;
-            break;
-        case FPIOA_PULL_DOWN:
-            cfg.pu = 0;
-            cfg.pd = 1;
-            break;
-        case FPIOA_PULL_UP:
-            cfg.pu = 1;
-            cfg.pd = 0;
-            break;
-        default:
-            break;
-    }
-    /* Atomic write register */
-    fpioa->io[number] = cfg;
-    return 0;
-}
-
-int fpioa_get_io_pull(int number)
-{
-    /* Check parameters */
-    if (number < 0 || number >= FPIOA_NUM_IO)
-        return -1;
-
-    fpioa_pull_t pull;
-    /* Atomic read register */
-    fpioa_io_config_t cfg = fpioa->io[number];
-
-    if (cfg.pu == 0 && cfg.pd == 1)
-        pull = FPIOA_PULL_DOWN;
-    else if (cfg.pu == 1 && cfg.pd == 0)
-        pull = FPIOA_PULL_UP;
-    else
-        pull = FPIOA_PULL_NONE;
-    return pull;
-}
-
-int fpioa_set_io_driving(int number, fpioa_driving_t driving)
-{
-    /* Check parameters */
-    if (number < 0 || number >= FPIOA_NUM_IO || driving >= FPIOA_DRIVING_MAX)
-        return -1;
-
-    /* Atomic read register */
-    fpioa_io_config_t cfg = fpioa->io[number];
-    /* Set IO driving */
-    cfg.ds = driving;
-    /* Atomic write register */
-    fpioa->io[number] = cfg;
-    return 0;
-}
-
-int fpioa_get_io_driving(int number)
-{
-    /* Check parameters */
-    if (number < 0 || number >= FPIOA_NUM_IO)
-        return -1;
-
-    return fpioa->io[number].ds;
-}
-
-int fpioa_set_function_raw(int number, fpioa_function_t function)
-{
-    /* Check parameters */
-    if (number < 0 || number >= FPIOA_NUM_IO || function < 0 || function >= FUNC_MAX)
-        return -1;
-    /* Atomic write register */
-    fpioa->io[number] =(const fpioa_io_config_t)
-    {
-        .ch_sel = function_config[function].ch_sel,
-        .ds     = function_config[function].ds,
-        .oe_en  = function_config[function].oe_en,
-        .oe_inv = function_config[function].oe_inv,
-        .do_sel = function_config[function].do_sel,
-        .do_inv = function_config[function].do_inv,
-        .pu     = function_config[function].pu,
-        .pd     = function_config[function].pd,
-        .sl     = function_config[function].sl,
-        .ie_en  = function_config[function].ie_en,
-        .ie_inv = function_config[function].ie_inv,
-        .di_inv = function_config[function].di_inv,
-        .st     = function_config[function].st,
-        /* resv and pad_di do not need initialization */
-    };
-    return 0;
-}
-
-int fpioa_set_function(int number, fpioa_function_t function)
-{
-    uint8_t index = 0;
-    /* Check parameters */
-    if (number < 0 || number >= FPIOA_NUM_IO || function < 0 || function >= FUNC_MAX)
-        return -1;
-    if (function == FUNC_RESV0)
-    {
-        fpioa_set_function_raw(number, FUNC_RESV0);
-        return 0;
-    }
-    /* Compare all IO */
-    for (index = 0; index < FPIOA_NUM_IO; index++)
-    {
-        if ((fpioa->io[index].ch_sel == function) && (index != number))
-            fpioa_set_function_raw(index, FUNC_RESV0);
-    }
-    fpioa_set_function_raw(number, function);
-    return 0;
-}
-
-int fpioa_set_tie_enable(fpioa_function_t function, int enable)
-{
-    /* Check parameters */
-    if (function < 0 || function >= FUNC_MAX)
-        return -1;
-    /* Set tie enable */
-    if (enable)
-        fpioa->tie.en[function / 32] |= (1UL << (function % 32));
-    else
-        fpioa->tie.en[function / 32] &= (~(1UL << (function % 32)));
-    return 0;
-}
-
-int fpioa_set_tie_value(fpioa_function_t function, int value)
-{
-    /* Check parameters */
-    if (function < 0 || function >= FUNC_MAX)
-        return -1;
-    /* Set tie value */
-    if (value)
-        fpioa->tie.val[function / 32] |= (1UL << (function % 32));
-    else
-        fpioa->tie.val[function / 32] &= (~(1UL << (function % 32)));
-    return 0;
-}
-
-int fpioa_get_io_by_function(fpioa_function_t function)
-{
-    int index = 0;
-    for (index = 0; index < FPIOA_NUM_IO; index++)
-    {
-        if (fpioa->io[index].ch_sel == function)
-            return index;
-    }
-
-    return -1;
-}
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/fpioa.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/fpioa.h
deleted file mode 100644
index afeccb75b..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/fpioa.h
+++ /dev/null
@@ -1,1014 +0,0 @@
-/* Copyright 2018 Canaan Inc.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
-* @file fpioa.h
-* @brief kendryte k210 source code
-*                https://github.com/kendryte/kendryte-standalone-sdk.git
-* @version 1.0
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
-
-#ifndef _DRIVER_FPIOA_H
-#define _DRIVER_FPIOA_H
-
-#include <stdint.h>
-#include "platform.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* clang-format off */
-/* Pad number settings */
-#define FPIOA_NUM_IO    (48)
-/* clang-format on */
-
-/**
- * @brief      FPIOA IO functions
- *
- * @note       FPIOA pin function table
- *
- * | Function  | Name             | Description                       |
- * |-----------|------------------|-----------------------------------|
- * | 0         | JTAG_TCLK        | JTAG Test Clock                   |
- * | 1         | JTAG_TDI         | JTAG Test Data In                 |
- * | 2         | JTAG_TMS         | JTAG Test Mode Select             |
- * | 3         | JTAG_TDO         | JTAG Test Data Out                |
- * | 4         | SPI0_D0          | SPI0 Data 0                       |
- * | 5         | SPI0_D1          | SPI0 Data 1                       |
- * | 6         | SPI0_D2          | SPI0 Data 2                       |
- * | 7         | SPI0_D3          | SPI0 Data 3                       |
- * | 8         | SPI0_D4          | SPI0 Data 4                       |
- * | 9         | SPI0_D5          | SPI0 Data 5                       |
- * | 10        | SPI0_D6          | SPI0 Data 6                       |
- * | 11        | SPI0_D7          | SPI0 Data 7                       |
- * | 12        | SPI0_SS0         | SPI0 Chip Select 0                |
- * | 13        | SPI0_SS1         | SPI0 Chip Select 1                |
- * | 14        | SPI0_SS2         | SPI0 Chip Select 2                |
- * | 15        | SPI0_SS3         | SPI0 Chip Select 3                |
- * | 16        | SPI0_ARB         | SPI0 Arbitration                  |
- * | 17        | SPI0_SCLK        | SPI0 Serial Clock                 |
- * | 18        | UARTHS_RX        | UART High speed Receiver          |
- * | 19        | UARTHS_TX        | UART High speed Transmitter       |
- * | 20        | RESV6            | Reserved function                 |
- * | 21        | RESV7            | Reserved function                 |
- * | 22        | CLK_SPI1         | Clock SPI1                        |
- * | 23        | CLK_I2C1         | Clock I2C1                        |
- * | 24        | GPIOHS0          | GPIO High speed 0                 |
- * | 25        | GPIOHS1          | GPIO High speed 1                 |
- * | 26        | GPIOHS2          | GPIO High speed 2                 |
- * | 27        | GPIOHS3          | GPIO High speed 3                 |
- * | 28        | GPIOHS4          | GPIO High speed 4                 |
- * | 29        | GPIOHS5          | GPIO High speed 5                 |
- * | 30        | GPIOHS6          | GPIO High speed 6                 |
- * | 31        | GPIOHS7          | GPIO High speed 7                 |
- * | 32        | GPIOHS8          | GPIO High speed 8                 |
- * | 33        | GPIOHS9          | GPIO High speed 9                 |
- * | 34        | GPIOHS10         | GPIO High speed 10                |
- * | 35        | GPIOHS11         | GPIO High speed 11                |
- * | 36        | GPIOHS12         | GPIO High speed 12                |
- * | 37        | GPIOHS13         | GPIO High speed 13                |
- * | 38        | GPIOHS14         | GPIO High speed 14                |
- * | 39        | GPIOHS15         | GPIO High speed 15                |
- * | 40        | GPIOHS16         | GPIO High speed 16                |
- * | 41        | GPIOHS17         | GPIO High speed 17                |
- * | 42        | GPIOHS18         | GPIO High speed 18                |
- * | 43        | GPIOHS19         | GPIO High speed 19                |
- * | 44        | GPIOHS20         | GPIO High speed 20                |
- * | 45        | GPIOHS21         | GPIO High speed 21                |
- * | 46        | GPIOHS22         | GPIO High speed 22                |
- * | 47        | GPIOHS23         | GPIO High speed 23                |
- * | 48        | GPIOHS24         | GPIO High speed 24                |
- * | 49        | GPIOHS25         | GPIO High speed 25                |
- * | 50        | GPIOHS26         | GPIO High speed 26                |
- * | 51        | GPIOHS27         | GPIO High speed 27                |
- * | 52        | GPIOHS28         | GPIO High speed 28                |
- * | 53        | GPIOHS29         | GPIO High speed 29                |
- * | 54        | GPIOHS30         | GPIO High speed 30                |
- * | 55        | GPIOHS31         | GPIO High speed 31                |
- * | 56        | GPIO0            | GPIO pin 0                        |
- * | 57        | GPIO1            | GPIO pin 1                        |
- * | 58        | GPIO2            | GPIO pin 2                        |
- * | 59        | GPIO3            | GPIO pin 3                        |
- * | 60        | GPIO4            | GPIO pin 4                        |
- * | 61        | GPIO5            | GPIO pin 5                        |
- * | 62        | GPIO6            | GPIO pin 6                        |
- * | 63        | GPIO7            | GPIO pin 7                        |
- * | 64        | UART1_RX         | UART1 Receiver                    |
- * | 65        | UART1_TX         | UART1 Transmitter                 |
- * | 66        | UART2_RX         | UART2 Receiver                    |
- * | 67        | UART2_TX         | UART2 Transmitter                 |
- * | 68        | UART3_RX         | UART3 Receiver                    |
- * | 69        | UART3_TX         | UART3 Transmitter                 |
- * | 70        | SPI1_D0          | SPI1 Data 0                       |
- * | 71        | SPI1_D1          | SPI1 Data 1                       |
- * | 72        | SPI1_D2          | SPI1 Data 2                       |
- * | 73        | SPI1_D3          | SPI1 Data 3                       |
- * | 74        | SPI1_D4          | SPI1 Data 4                       |
- * | 75        | SPI1_D5          | SPI1 Data 5                       |
- * | 76        | SPI1_D6          | SPI1 Data 6                       |
- * | 77        | SPI1_D7          | SPI1 Data 7                       |
- * | 78        | SPI1_SS0         | SPI1 Chip Select 0                |
- * | 79        | SPI1_SS1         | SPI1 Chip Select 1                |
- * | 80        | SPI1_SS2         | SPI1 Chip Select 2                |
- * | 81        | SPI1_SS3         | SPI1 Chip Select 3                |
- * | 82        | SPI1_ARB         | SPI1 Arbitration                  |
- * | 83        | SPI1_SCLK        | SPI1 Serial Clock                 |
- * | 84        | SPI_SLAVE_D0     | SPI Slave Data 0                  |
- * | 85        | SPI_SLAVE_SS     | SPI Slave Select                  |
- * | 86        | SPI_SLAVE_SCLK   | SPI Slave Serial Clock            |
- * | 87        | I2S0_MCLK        | I2S0 Master Clock                 |
- * | 88        | I2S0_SCLK        | I2S0 Serial Clock(BCLK)           |
- * | 89        | I2S0_WS          | I2S0 Word Select(LRCLK)           |
- * | 90        | I2S0_IN_D0       | I2S0 Serial Data Input 0          |
- * | 91        | I2S0_IN_D1       | I2S0 Serial Data Input 1          |
- * | 92        | I2S0_IN_D2       | I2S0 Serial Data Input 2          |
- * | 93        | I2S0_IN_D3       | I2S0 Serial Data Input 3          |
- * | 94        | I2S0_OUT_D0      | I2S0 Serial Data Output 0         |
- * | 95        | I2S0_OUT_D1      | I2S0 Serial Data Output 1         |
- * | 96        | I2S0_OUT_D2      | I2S0 Serial Data Output 2         |
- * | 97        | I2S0_OUT_D3      | I2S0 Serial Data Output 3         |
- * | 98        | I2S1_MCLK        | I2S1 Master Clock                 |
- * | 99        | I2S1_SCLK        | I2S1 Serial Clock(BCLK)           |
- * | 100       | I2S1_WS          | I2S1 Word Select(LRCLK)           |
- * | 101       | I2S1_IN_D0       | I2S1 Serial Data Input 0          |
- * | 102       | I2S1_IN_D1       | I2S1 Serial Data Input 1          |
- * | 103       | I2S1_IN_D2       | I2S1 Serial Data Input 2          |
- * | 104       | I2S1_IN_D3       | I2S1 Serial Data Input 3          |
- * | 105       | I2S1_OUT_D0      | I2S1 Serial Data Output 0         |
- * | 106       | I2S1_OUT_D1      | I2S1 Serial Data Output 1         |
- * | 107       | I2S1_OUT_D2      | I2S1 Serial Data Output 2         |
- * | 108       | I2S1_OUT_D3      | I2S1 Serial Data Output 3         |
- * | 109       | I2S2_MCLK        | I2S2 Master Clock                 |
- * | 110       | I2S2_SCLK        | I2S2 Serial Clock(BCLK)           |
- * | 111       | I2S2_WS          | I2S2 Word Select(LRCLK)           |
- * | 112       | I2S2_IN_D0       | I2S2 Serial Data Input 0          |
- * | 113       | I2S2_IN_D1       | I2S2 Serial Data Input 1          |
- * | 114       | I2S2_IN_D2       | I2S2 Serial Data Input 2          |
- * | 115       | I2S2_IN_D3       | I2S2 Serial Data Input 3          |
- * | 116       | I2S2_OUT_D0      | I2S2 Serial Data Output 0         |
- * | 117       | I2S2_OUT_D1      | I2S2 Serial Data Output 1         |
- * | 118       | I2S2_OUT_D2      | I2S2 Serial Data Output 2         |
- * | 119       | I2S2_OUT_D3      | I2S2 Serial Data Output 3         |
- * | 120       | RESV0            | Reserved function                 |
- * | 121       | RESV1            | Reserved function                 |
- * | 122       | RESV2            | Reserved function                 |
- * | 123       | RESV3            | Reserved function                 |
- * | 124       | RESV4            | Reserved function                 |
- * | 125       | RESV5            | Reserved function                 |
- * | 126       | I2C0_SCLK        | I2C0 Serial Clock                 |
- * | 127       | I2C0_SDA         | I2C0 Serial Data                  |
- * | 128       | I2C1_SCLK        | I2C1 Serial Clock                 |
- * | 129       | I2C1_SDA         | I2C1 Serial Data                  |
- * | 130       | I2C2_SCLK        | I2C2 Serial Clock                 |
- * | 131       | I2C2_SDA         | I2C2 Serial Data                  |
- * | 132       | CMOS_XCLK        | DVP System Clock                  |
- * | 133       | CMOS_RST         | DVP System Reset                  |
- * | 134       | CMOS_PWDN        | DVP Power Down Mode               |
- * | 135       | CMOS_VSYNC       | DVP Vertical Sync                 |
- * | 136       | CMOS_HREF        | DVP Horizontal Reference output   |
- * | 137       | CMOS_PCLK        | Pixel Clock                       |
- * | 138       | CMOS_D0          | Data Bit 0                        |
- * | 139       | CMOS_D1          | Data Bit 1                        |
- * | 140       | CMOS_D2          | Data Bit 2                        |
- * | 141       | CMOS_D3          | Data Bit 3                        |
- * | 142       | CMOS_D4          | Data Bit 4                        |
- * | 143       | CMOS_D5          | Data Bit 5                        |
- * | 144       | CMOS_D6          | Data Bit 6                        |
- * | 145       | CMOS_D7          | Data Bit 7                        |
- * | 146       | SCCB_SCLK        | SCCB Serial Clock                 |
- * | 147       | SCCB_SDA         | SCCB Serial Data                  |
- * | 148       | UART1_CTS        | UART1 Clear To Send               |
- * | 149       | UART1_DSR        | UART1 Data Set Ready              |
- * | 150       | UART1_DCD        | UART1 Data Carrier Detect         |
- * | 151       | UART1_RI         | UART1 Ring Indicator              |
- * | 152       | UART1_SIR_IN     | UART1 Serial Infrared Input       |
- * | 153       | UART1_DTR        | UART1 Data Terminal Ready         |
- * | 154       | UART1_RTS        | UART1 Request To Send             |
- * | 155       | UART1_OUT2       | UART1 User-designated Output 2    |
- * | 156       | UART1_OUT1       | UART1 User-designated Output 1    |
- * | 157       | UART1_SIR_OUT    | UART1 Serial Infrared Output      |
- * | 158       | UART1_BAUD       | UART1 Transmit Clock Output       |
- * | 159       | UART1_RE         | UART1 Receiver Output Enable      |
- * | 160       | UART1_DE         | UART1 Driver Output Enable        |
- * | 161       | UART1_RS485_EN   | UART1 RS485 Enable                |
- * | 162       | UART2_CTS        | UART2 Clear To Send               |
- * | 163       | UART2_DSR        | UART2 Data Set Ready              |
- * | 164       | UART2_DCD        | UART2 Data Carrier Detect         |
- * | 165       | UART2_RI         | UART2 Ring Indicator              |
- * | 166       | UART2_SIR_IN     | UART2 Serial Infrared Input       |
- * | 167       | UART2_DTR        | UART2 Data Terminal Ready         |
- * | 168       | UART2_RTS        | UART2 Request To Send             |
- * | 169       | UART2_OUT2       | UART2 User-designated Output 2    |
- * | 170       | UART2_OUT1       | UART2 User-designated Output 1    |
- * | 171       | UART2_SIR_OUT    | UART2 Serial Infrared Output      |
- * | 172       | UART2_BAUD       | UART2 Transmit Clock Output       |
- * | 173       | UART2_RE         | UART2 Receiver Output Enable      |
- * | 174       | UART2_DE         | UART2 Driver Output Enable        |
- * | 175       | UART2_RS485_EN   | UART2 RS485 Enable                |
- * | 176       | UART3_CTS        | UART3 Clear To Send               |
- * | 177       | UART3_DSR        | UART3 Data Set Ready              |
- * | 178       | UART3_DCD        | UART3 Data Carrier Detect         |
- * | 179       | UART3_RI         | UART3 Ring Indicator              |
- * | 180       | UART3_SIR_IN     | UART3 Serial Infrared Input       |
- * | 181       | UART3_DTR        | UART3 Data Terminal Ready         |
- * | 182       | UART3_RTS        | UART3 Request To Send             |
- * | 183       | UART3_OUT2       | UART3 User-designated Output 2    |
- * | 184       | UART3_OUT1       | UART3 User-designated Output 1    |
- * | 185       | UART3_SIR_OUT    | UART3 Serial Infrared Output      |
- * | 186       | UART3_BAUD       | UART3 Transmit Clock Output       |
- * | 187       | UART3_RE         | UART3 Receiver Output Enable      |
- * | 188       | UART3_DE         | UART3 Driver Output Enable        |
- * | 189       | UART3_RS485_EN   | UART3 RS485 Enable                |
- * | 190       | TIMER0_TOGGLE1   | TIMER0 Toggle Output 1            |
- * | 191       | TIMER0_TOGGLE2   | TIMER0 Toggle Output 2            |
- * | 192       | TIMER0_TOGGLE3   | TIMER0 Toggle Output 3            |
- * | 193       | TIMER0_TOGGLE4   | TIMER0 Toggle Output 4            |
- * | 194       | TIMER1_TOGGLE1   | TIMER1 Toggle Output 1            |
- * | 195       | TIMER1_TOGGLE2   | TIMER1 Toggle Output 2            |
- * | 196       | TIMER1_TOGGLE3   | TIMER1 Toggle Output 3            |
- * | 197       | TIMER1_TOGGLE4   | TIMER1 Toggle Output 4            |
- * | 198       | TIMER2_TOGGLE1   | TIMER2 Toggle Output 1            |
- * | 199       | TIMER2_TOGGLE2   | TIMER2 Toggle Output 2            |
- * | 200       | TIMER2_TOGGLE3   | TIMER2 Toggle Output 3            |
- * | 201       | TIMER2_TOGGLE4   | TIMER2 Toggle Output 4            |
- * | 202       | CLK_SPI2         | Clock SPI2                        |
- * | 203       | CLK_I2C2         | Clock I2C2                        |
- * | 204       | INTERNAL0        | Internal function signal 0        |
- * | 205       | INTERNAL1        | Internal function signal 1        |
- * | 206       | INTERNAL2        | Internal function signal 2        |
- * | 207       | INTERNAL3        | Internal function signal 3        |
- * | 208       | INTERNAL4        | Internal function signal 4        |
- * | 209       | INTERNAL5        | Internal function signal 5        |
- * | 210       | INTERNAL6        | Internal function signal 6        |
- * | 211       | INTERNAL7        | Internal function signal 7        |
- * | 212       | INTERNAL8        | Internal function signal 8        |
- * | 213       | INTERNAL9        | Internal function signal 9        |
- * | 214       | INTERNAL10       | Internal function signal 10       |
- * | 215       | INTERNAL11       | Internal function signal 11       |
- * | 216       | INTERNAL12       | Internal function signal 12       |
- * | 217       | INTERNAL13       | Internal function signal 13       |
- * | 218       | INTERNAL14       | Internal function signal 14       |
- * | 219       | INTERNAL15       | Internal function signal 15       |
- * | 220       | INTERNAL16       | Internal function signal 16       |
- * | 221       | INTERNAL17       | Internal function signal 17       |
- * | 222       | CONSTANT         | Constant function                 |
- * | 223       | INTERNAL18       | Internal function signal 18       |
- * | 224       | DEBUG0           | Debug function 0                  |
- * | 225       | DEBUG1           | Debug function 1                  |
- * | 226       | DEBUG2           | Debug function 2                  |
- * | 227       | DEBUG3           | Debug function 3                  |
- * | 228       | DEBUG4           | Debug function 4                  |
- * | 229       | DEBUG5           | Debug function 5                  |
- * | 230       | DEBUG6           | Debug function 6                  |
- * | 231       | DEBUG7           | Debug function 7                  |
- * | 232       | DEBUG8           | Debug function 8                  |
- * | 233       | DEBUG9           | Debug function 9                  |
- * | 234       | DEBUG10          | Debug function 10                 |
- * | 235       | DEBUG11          | Debug function 11                 |
- * | 236       | DEBUG12          | Debug function 12                 |
- * | 237       | DEBUG13          | Debug function 13                 |
- * | 238       | DEBUG14          | Debug function 14                 |
- * | 239       | DEBUG15          | Debug function 15                 |
- * | 240       | DEBUG16          | Debug function 16                 |
- * | 241       | DEBUG17          | Debug function 17                 |
- * | 242       | DEBUG18          | Debug function 18                 |
- * | 243       | DEBUG19          | Debug function 19                 |
- * | 244       | DEBUG20          | Debug function 20                 |
- * | 245       | DEBUG21          | Debug function 21                 |
- * | 246       | DEBUG22          | Debug function 22                 |
- * | 247       | DEBUG23          | Debug function 23                 |
- * | 248       | DEBUG24          | Debug function 24                 |
- * | 249       | DEBUG25          | Debug function 25                 |
- * | 250       | DEBUG26          | Debug function 26                 |
- * | 251       | DEBUG27          | Debug function 27                 |
- * | 252       | DEBUG28          | Debug function 28                 |
- * | 253       | DEBUG29          | Debug function 29                 |
- * | 254       | DEBUG30          | Debug function 30                 |
- * | 255       | DEBUG31          | Debug function 31                 |
- *
- * Any IO of FPIOA have 256 functions, it is a IO-function matrix.
- * All IO have default reset function, after reset, re-configure
- * IO function is required.
- */
-
-/* clang-format off */
-typedef enum _fpioa_function
-{
-    FUNC_JTAG_TCLK        = 0,  /*!< JTAG Test Clock */
-    FUNC_JTAG_TDI         = 1,  /*!< JTAG Test Data In */
-    FUNC_JTAG_TMS         = 2,  /*!< JTAG Test Mode Select */
-    FUNC_JTAG_TDO         = 3,  /*!< JTAG Test Data Out */
-    FUNC_SPI0_D0          = 4,  /*!< SPI0 Data 0 */
-    FUNC_SPI0_D1          = 5,  /*!< SPI0 Data 1 */
-    FUNC_SPI0_D2          = 6,  /*!< SPI0 Data 2 */
-    FUNC_SPI0_D3          = 7,  /*!< SPI0 Data 3 */
-    FUNC_SPI0_D4          = 8,  /*!< SPI0 Data 4 */
-    FUNC_SPI0_D5          = 9,  /*!< SPI0 Data 5 */
-    FUNC_SPI0_D6          = 10, /*!< SPI0 Data 6 */
-    FUNC_SPI0_D7          = 11, /*!< SPI0 Data 7 */
-    FUNC_SPI0_SS0         = 12, /*!< SPI0 Chip Select 0 */
-    FUNC_SPI0_SS1         = 13, /*!< SPI0 Chip Select 1 */
-    FUNC_SPI0_SS2         = 14, /*!< SPI0 Chip Select 2 */
-    FUNC_SPI0_SS3         = 15, /*!< SPI0 Chip Select 3 */
-    FUNC_SPI0_ARB         = 16, /*!< SPI0 Arbitration */
-    FUNC_SPI0_SCLK        = 17, /*!< SPI0 Serial Clock */
-    FUNC_UARTHS_RX        = 18, /*!< UART High speed Receiver */
-    FUNC_UARTHS_TX        = 19, /*!< UART High speed Transmitter */
-    FUNC_RESV6            = 20, /*!< Reserved function */
-    FUNC_RESV7            = 21, /*!< Reserved function */
-    FUNC_CLK_SPI1         = 22, /*!< Clock SPI1 */
-    FUNC_CLK_I2C1         = 23, /*!< Clock I2C1 */
-    FUNC_GPIOHS0          = 24, /*!< GPIO High speed 0 */
-    FUNC_GPIOHS1          = 25, /*!< GPIO High speed 1 */
-    FUNC_GPIOHS2          = 26, /*!< GPIO High speed 2 */
-    FUNC_GPIOHS3          = 27, /*!< GPIO High speed 3 */
-    FUNC_GPIOHS4          = 28, /*!< GPIO High speed 4 */
-    FUNC_GPIOHS5          = 29, /*!< GPIO High speed 5 */
-    FUNC_GPIOHS6          = 30, /*!< GPIO High speed 6 */
-    FUNC_GPIOHS7          = 31, /*!< GPIO High speed 7 */
-    FUNC_GPIOHS8          = 32, /*!< GPIO High speed 8 */
-    FUNC_GPIOHS9          = 33, /*!< GPIO High speed 9 */
-    FUNC_GPIOHS10         = 34, /*!< GPIO High speed 10 */
-    FUNC_GPIOHS11         = 35, /*!< GPIO High speed 11 */
-    FUNC_GPIOHS12         = 36, /*!< GPIO High speed 12 */
-    FUNC_GPIOHS13         = 37, /*!< GPIO High speed 13 */
-    FUNC_GPIOHS14         = 38, /*!< GPIO High speed 14 */
-    FUNC_GPIOHS15         = 39, /*!< GPIO High speed 15 */
-    FUNC_GPIOHS16         = 40, /*!< GPIO High speed 16 */
-    FUNC_GPIOHS17         = 41, /*!< GPIO High speed 17 */
-    FUNC_GPIOHS18         = 42, /*!< GPIO High speed 18 */
-    FUNC_GPIOHS19         = 43, /*!< GPIO High speed 19 */
-    FUNC_GPIOHS20         = 44, /*!< GPIO High speed 20 */
-    FUNC_GPIOHS21         = 45, /*!< GPIO High speed 21 */
-    FUNC_GPIOHS22         = 46, /*!< GPIO High speed 22 */
-    FUNC_GPIOHS23         = 47, /*!< GPIO High speed 23 */
-    FUNC_GPIOHS24         = 48, /*!< GPIO High speed 24 */
-    FUNC_GPIOHS25         = 49, /*!< GPIO High speed 25 */
-    FUNC_GPIOHS26         = 50, /*!< GPIO High speed 26 */
-    FUNC_GPIOHS27         = 51, /*!< GPIO High speed 27 */
-    FUNC_GPIOHS28         = 52, /*!< GPIO High speed 28 */
-    FUNC_GPIOHS29         = 53, /*!< GPIO High speed 29 */
-    FUNC_GPIOHS30         = 54, /*!< GPIO High speed 30 */
-    FUNC_GPIOHS31         = 55, /*!< GPIO High speed 31 */
-    FUNC_GPIO0            = 56, /*!< GPIO pin 0 */
-    FUNC_GPIO1            = 57, /*!< GPIO pin 1 */
-    FUNC_GPIO2            = 58, /*!< GPIO pin 2 */
-    FUNC_GPIO3            = 59, /*!< GPIO pin 3 */
-    FUNC_GPIO4            = 60, /*!< GPIO pin 4 */
-    FUNC_GPIO5            = 61, /*!< GPIO pin 5 */
-    FUNC_GPIO6            = 62, /*!< GPIO pin 6 */
-    FUNC_GPIO7            = 63, /*!< GPIO pin 7 */
-    FUNC_UART1_RX         = 64, /*!< UART1 Receiver */
-    FUNC_UART1_TX         = 65, /*!< UART1 Transmitter */
-    FUNC_UART2_RX         = 66, /*!< UART2 Receiver */
-    FUNC_UART2_TX         = 67, /*!< UART2 Transmitter */
-    FUNC_UART3_RX         = 68, /*!< UART3 Receiver */
-    FUNC_UART3_TX         = 69, /*!< UART3 Transmitter */
-    FUNC_SPI1_D0          = 70, /*!< SPI1 Data 0 */
-    FUNC_SPI1_D1          = 71, /*!< SPI1 Data 1 */
-    FUNC_SPI1_D2          = 72, /*!< SPI1 Data 2 */
-    FUNC_SPI1_D3          = 73, /*!< SPI1 Data 3 */
-    FUNC_SPI1_D4          = 74, /*!< SPI1 Data 4 */
-    FUNC_SPI1_D5          = 75, /*!< SPI1 Data 5 */
-    FUNC_SPI1_D6          = 76, /*!< SPI1 Data 6 */
-    FUNC_SPI1_D7          = 77, /*!< SPI1 Data 7 */
-    FUNC_SPI1_SS0         = 78, /*!< SPI1 Chip Select 0 */
-    FUNC_SPI1_SS1         = 79, /*!< SPI1 Chip Select 1 */
-    FUNC_SPI1_SS2         = 80, /*!< SPI1 Chip Select 2 */
-    FUNC_SPI1_SS3         = 81, /*!< SPI1 Chip Select 3 */
-    FUNC_SPI1_ARB         = 82, /*!< SPI1 Arbitration */
-    FUNC_SPI1_SCLK        = 83, /*!< SPI1 Serial Clock */
-    FUNC_SPI_SLAVE_D0     = 84, /*!< SPI Slave Data 0 */
-    FUNC_SPI_SLAVE_SS     = 85, /*!< SPI Slave Select */
-    FUNC_SPI_SLAVE_SCLK   = 86, /*!< SPI Slave Serial Clock */
-    FUNC_I2S0_MCLK        = 87, /*!< I2S0 Master Clock */
-    FUNC_I2S0_SCLK        = 88, /*!< I2S0 Serial Clock(BCLK) */
-    FUNC_I2S0_WS          = 89, /*!< I2S0 Word Select(LRCLK) */
-    FUNC_I2S0_IN_D0       = 90, /*!< I2S0 Serial Data Input 0 */
-    FUNC_I2S0_IN_D1       = 91, /*!< I2S0 Serial Data Input 1 */
-    FUNC_I2S0_IN_D2       = 92, /*!< I2S0 Serial Data Input 2 */
-    FUNC_I2S0_IN_D3       = 93, /*!< I2S0 Serial Data Input 3 */
-    FUNC_I2S0_OUT_D0      = 94, /*!< I2S0 Serial Data Output 0 */
-    FUNC_I2S0_OUT_D1      = 95, /*!< I2S0 Serial Data Output 1 */
-    FUNC_I2S0_OUT_D2      = 96, /*!< I2S0 Serial Data Output 2 */
-    FUNC_I2S0_OUT_D3      = 97, /*!< I2S0 Serial Data Output 3 */
-    FUNC_I2S1_MCLK        = 98, /*!< I2S1 Master Clock */
-    FUNC_I2S1_SCLK        = 99, /*!< I2S1 Serial Clock(BCLK) */
-    FUNC_I2S1_WS          = 100,    /*!< I2S1 Word Select(LRCLK) */
-    FUNC_I2S1_IN_D0       = 101,    /*!< I2S1 Serial Data Input 0 */
-    FUNC_I2S1_IN_D1       = 102,    /*!< I2S1 Serial Data Input 1 */
-    FUNC_I2S1_IN_D2       = 103,    /*!< I2S1 Serial Data Input 2 */
-    FUNC_I2S1_IN_D3       = 104,    /*!< I2S1 Serial Data Input 3 */
-    FUNC_I2S1_OUT_D0      = 105,    /*!< I2S1 Serial Data Output 0 */
-    FUNC_I2S1_OUT_D1      = 106,    /*!< I2S1 Serial Data Output 1 */
-    FUNC_I2S1_OUT_D2      = 107,    /*!< I2S1 Serial Data Output 2 */
-    FUNC_I2S1_OUT_D3      = 108,    /*!< I2S1 Serial Data Output 3 */
-    FUNC_I2S2_MCLK        = 109,    /*!< I2S2 Master Clock */
-    FUNC_I2S2_SCLK        = 110,    /*!< I2S2 Serial Clock(BCLK) */
-    FUNC_I2S2_WS          = 111,    /*!< I2S2 Word Select(LRCLK) */
-    FUNC_I2S2_IN_D0       = 112,    /*!< I2S2 Serial Data Input 0 */
-    FUNC_I2S2_IN_D1       = 113,    /*!< I2S2 Serial Data Input 1 */
-    FUNC_I2S2_IN_D2       = 114,    /*!< I2S2 Serial Data Input 2 */
-    FUNC_I2S2_IN_D3       = 115,    /*!< I2S2 Serial Data Input 3 */
-    FUNC_I2S2_OUT_D0      = 116,    /*!< I2S2 Serial Data Output 0 */
-    FUNC_I2S2_OUT_D1      = 117,    /*!< I2S2 Serial Data Output 1 */
-    FUNC_I2S2_OUT_D2      = 118,    /*!< I2S2 Serial Data Output 2 */
-    FUNC_I2S2_OUT_D3      = 119,    /*!< I2S2 Serial Data Output 3 */
-    FUNC_RESV0            = 120,    /*!< Reserved function */
-    FUNC_RESV1            = 121,    /*!< Reserved function */
-    FUNC_RESV2            = 122,    /*!< Reserved function */
-    FUNC_RESV3            = 123,    /*!< Reserved function */
-    FUNC_RESV4            = 124,    /*!< Reserved function */
-    FUNC_RESV5            = 125,    /*!< Reserved function */
-    FUNC_I2C0_SCLK        = 126,    /*!< I2C0 Serial Clock */
-    FUNC_I2C0_SDA         = 127,    /*!< I2C0 Serial Data */
-    FUNC_I2C1_SCLK        = 128,    /*!< I2C1 Serial Clock */
-    FUNC_I2C1_SDA         = 129,    /*!< I2C1 Serial Data */
-    FUNC_I2C2_SCLK        = 130,    /*!< I2C2 Serial Clock */
-    FUNC_I2C2_SDA         = 131,    /*!< I2C2 Serial Data */
-    FUNC_CMOS_XCLK        = 132,    /*!< DVP System Clock */
-    FUNC_CMOS_RST         = 133,    /*!< DVP System Reset */
-    FUNC_CMOS_PWDN        = 134,    /*!< DVP Power Down Mode */
-    FUNC_CMOS_VSYNC       = 135,    /*!< DVP Vertical Sync */
-    FUNC_CMOS_HREF        = 136,    /*!< DVP Horizontal Reference output */
-    FUNC_CMOS_PCLK        = 137,    /*!< Pixel Clock */
-    FUNC_CMOS_D0          = 138,    /*!< Data Bit 0 */
-    FUNC_CMOS_D1          = 139,    /*!< Data Bit 1 */
-    FUNC_CMOS_D2          = 140,    /*!< Data Bit 2 */
-    FUNC_CMOS_D3          = 141,    /*!< Data Bit 3 */
-    FUNC_CMOS_D4          = 142,    /*!< Data Bit 4 */
-    FUNC_CMOS_D5          = 143,    /*!< Data Bit 5 */
-    FUNC_CMOS_D6          = 144,    /*!< Data Bit 6 */
-    FUNC_CMOS_D7          = 145,    /*!< Data Bit 7 */
-    FUNC_SCCB_SCLK        = 146,    /*!< SCCB Serial Clock */
-    FUNC_SCCB_SDA         = 147,    /*!< SCCB Serial Data */
-    FUNC_UART1_CTS        = 148,    /*!< UART1 Clear To Send */
-    FUNC_UART1_DSR        = 149,    /*!< UART1 Data Set Ready */
-    FUNC_UART1_DCD        = 150,    /*!< UART1 Data Carrier Detect */
-    FUNC_UART1_RI         = 151,    /*!< UART1 Ring Indicator */
-    FUNC_UART1_SIR_IN     = 152,    /*!< UART1 Serial Infrared Input */
-    FUNC_UART1_DTR        = 153,    /*!< UART1 Data Terminal Ready */
-    FUNC_UART1_RTS        = 154,    /*!< UART1 Request To Send */
-    FUNC_UART1_OUT2       = 155,    /*!< UART1 User-designated Output 2 */
-    FUNC_UART1_OUT1       = 156,    /*!< UART1 User-designated Output 1 */
-    FUNC_UART1_SIR_OUT    = 157,    /*!< UART1 Serial Infrared Output */
-    FUNC_UART1_BAUD       = 158,    /*!< UART1 Transmit Clock Output */
-    FUNC_UART1_RE         = 159,    /*!< UART1 Receiver Output Enable */
-    FUNC_UART1_DE         = 160,    /*!< UART1 Driver Output Enable */
-    FUNC_UART1_RS485_EN   = 161,    /*!< UART1 RS485 Enable */
-    FUNC_UART2_CTS        = 162,    /*!< UART2 Clear To Send */
-    FUNC_UART2_DSR        = 163,    /*!< UART2 Data Set Ready */
-    FUNC_UART2_DCD        = 164,    /*!< UART2 Data Carrier Detect */
-    FUNC_UART2_RI         = 165,    /*!< UART2 Ring Indicator */
-    FUNC_UART2_SIR_IN     = 166,    /*!< UART2 Serial Infrared Input */
-    FUNC_UART2_DTR        = 167,    /*!< UART2 Data Terminal Ready */
-    FUNC_UART2_RTS        = 168,    /*!< UART2 Request To Send */
-    FUNC_UART2_OUT2       = 169,    /*!< UART2 User-designated Output 2 */
-    FUNC_UART2_OUT1       = 170,    /*!< UART2 User-designated Output 1 */
-    FUNC_UART2_SIR_OUT    = 171,    /*!< UART2 Serial Infrared Output */
-    FUNC_UART2_BAUD       = 172,    /*!< UART2 Transmit Clock Output */
-    FUNC_UART2_RE         = 173,    /*!< UART2 Receiver Output Enable */
-    FUNC_UART2_DE         = 174,    /*!< UART2 Driver Output Enable */
-    FUNC_UART2_RS485_EN   = 175,    /*!< UART2 RS485 Enable */
-    FUNC_UART3_CTS        = 176,    /*!< UART3 Clear To Send */
-    FUNC_UART3_DSR        = 177,    /*!< UART3 Data Set Ready */
-    FUNC_UART3_DCD        = 178,    /*!< UART3 Data Carrier Detect */
-    FUNC_UART3_RI         = 179,    /*!< UART3 Ring Indicator */
-    FUNC_UART3_SIR_IN     = 180,    /*!< UART3 Serial Infrared Input */
-    FUNC_UART3_DTR        = 181,    /*!< UART3 Data Terminal Ready */
-    FUNC_UART3_RTS        = 182,    /*!< UART3 Request To Send */
-    FUNC_UART3_OUT2       = 183,    /*!< UART3 User-designated Output 2 */
-    FUNC_UART3_OUT1       = 184,    /*!< UART3 User-designated Output 1 */
-    FUNC_UART3_SIR_OUT    = 185,    /*!< UART3 Serial Infrared Output */
-    FUNC_UART3_BAUD       = 186,    /*!< UART3 Transmit Clock Output */
-    FUNC_UART3_RE         = 187,    /*!< UART3 Receiver Output Enable */
-    FUNC_UART3_DE         = 188,    /*!< UART3 Driver Output Enable */
-    FUNC_UART3_RS485_EN   = 189,    /*!< UART3 RS485 Enable */
-    FUNC_TIMER0_TOGGLE1   = 190,    /*!< TIMER0 Toggle Output 1 */
-    FUNC_TIMER0_TOGGLE2   = 191,    /*!< TIMER0 Toggle Output 2 */
-    FUNC_TIMER0_TOGGLE3   = 192,    /*!< TIMER0 Toggle Output 3 */
-    FUNC_TIMER0_TOGGLE4   = 193,    /*!< TIMER0 Toggle Output 4 */
-    FUNC_TIMER1_TOGGLE1   = 194,    /*!< TIMER1 Toggle Output 1 */
-    FUNC_TIMER1_TOGGLE2   = 195,    /*!< TIMER1 Toggle Output 2 */
-    FUNC_TIMER1_TOGGLE3   = 196,    /*!< TIMER1 Toggle Output 3 */
-    FUNC_TIMER1_TOGGLE4   = 197,    /*!< TIMER1 Toggle Output 4 */
-    FUNC_TIMER2_TOGGLE1   = 198,    /*!< TIMER2 Toggle Output 1 */
-    FUNC_TIMER2_TOGGLE2   = 199,    /*!< TIMER2 Toggle Output 2 */
-    FUNC_TIMER2_TOGGLE3   = 200,    /*!< TIMER2 Toggle Output 3 */
-    FUNC_TIMER2_TOGGLE4   = 201,    /*!< TIMER2 Toggle Output 4 */
-    FUNC_CLK_SPI2         = 202,    /*!< Clock SPI2 */
-    FUNC_CLK_I2C2         = 203,    /*!< Clock I2C2 */
-    FUNC_INTERNAL0        = 204,    /*!< Internal function signal 0 */
-    FUNC_INTERNAL1        = 205,    /*!< Internal function signal 1 */
-    FUNC_INTERNAL2        = 206,    /*!< Internal function signal 2 */
-    FUNC_INTERNAL3        = 207,    /*!< Internal function signal 3 */
-    FUNC_INTERNAL4        = 208,    /*!< Internal function signal 4 */
-    FUNC_INTERNAL5        = 209,    /*!< Internal function signal 5 */
-    FUNC_INTERNAL6        = 210,    /*!< Internal function signal 6 */
-    FUNC_INTERNAL7        = 211,    /*!< Internal function signal 7 */
-    FUNC_INTERNAL8        = 212,    /*!< Internal function signal 8 */
-    FUNC_INTERNAL9        = 213,    /*!< Internal function signal 9 */
-    FUNC_INTERNAL10       = 214,    /*!< Internal function signal 10 */
-    FUNC_INTERNAL11       = 215,    /*!< Internal function signal 11 */
-    FUNC_INTERNAL12       = 216,    /*!< Internal function signal 12 */
-    FUNC_INTERNAL13       = 217,    /*!< Internal function signal 13 */
-    FUNC_INTERNAL14       = 218,    /*!< Internal function signal 14 */
-    FUNC_INTERNAL15       = 219,    /*!< Internal function signal 15 */
-    FUNC_INTERNAL16       = 220,    /*!< Internal function signal 16 */
-    FUNC_INTERNAL17       = 221,    /*!< Internal function signal 17 */
-    FUNC_CONSTANT         = 222,    /*!< Constant function */
-    FUNC_INTERNAL18       = 223,    /*!< Internal function signal 18 */
-    FUNC_DEBUG0           = 224,    /*!< Debug function 0 */
-    FUNC_DEBUG1           = 225,    /*!< Debug function 1 */
-    FUNC_DEBUG2           = 226,    /*!< Debug function 2 */
-    FUNC_DEBUG3           = 227,    /*!< Debug function 3 */
-    FUNC_DEBUG4           = 228,    /*!< Debug function 4 */
-    FUNC_DEBUG5           = 229,    /*!< Debug function 5 */
-    FUNC_DEBUG6           = 230,    /*!< Debug function 6 */
-    FUNC_DEBUG7           = 231,    /*!< Debug function 7 */
-    FUNC_DEBUG8           = 232,    /*!< Debug function 8 */
-    FUNC_DEBUG9           = 233,    /*!< Debug function 9 */
-    FUNC_DEBUG10          = 234,    /*!< Debug function 10 */
-    FUNC_DEBUG11          = 235,    /*!< Debug function 11 */
-    FUNC_DEBUG12          = 236,    /*!< Debug function 12 */
-    FUNC_DEBUG13          = 237,    /*!< Debug function 13 */
-    FUNC_DEBUG14          = 238,    /*!< Debug function 14 */
-    FUNC_DEBUG15          = 239,    /*!< Debug function 15 */
-    FUNC_DEBUG16          = 240,    /*!< Debug function 16 */
-    FUNC_DEBUG17          = 241,    /*!< Debug function 17 */
-    FUNC_DEBUG18          = 242,    /*!< Debug function 18 */
-    FUNC_DEBUG19          = 243,    /*!< Debug function 19 */
-    FUNC_DEBUG20          = 244,    /*!< Debug function 20 */
-    FUNC_DEBUG21          = 245,    /*!< Debug function 21 */
-    FUNC_DEBUG22          = 246,    /*!< Debug function 22 */
-    FUNC_DEBUG23          = 247,    /*!< Debug function 23 */
-    FUNC_DEBUG24          = 248,    /*!< Debug function 24 */
-    FUNC_DEBUG25          = 249,    /*!< Debug function 25 */
-    FUNC_DEBUG26          = 250,    /*!< Debug function 26 */
-    FUNC_DEBUG27          = 251,    /*!< Debug function 27 */
-    FUNC_DEBUG28          = 252,    /*!< Debug function 28 */
-    FUNC_DEBUG29          = 253,    /*!< Debug function 29 */
-    FUNC_DEBUG30          = 254,    /*!< Debug function 30 */
-    FUNC_DEBUG31          = 255,    /*!< Debug function 31 */
-    FUNC_MAX              = 256,    /*!< Function numbers */
-} fpioa_function_t;
-/* clang-format on */
-
-/**
- * @brief      FPIOA pull settings
- *
- * @note       FPIOA pull settings description
- *
- * | PU  | PD  | Description                       |
- * |-----|-----|-----------------------------------|
- * | 0   | 0   | No Pull                           |
- * | 0   | 1   | Pull Down                         |
- * | 1   | 0   | Pull Up                           |
- * | 1   | 1   | Undefined                         |
- *
- */
-
-/* clang-format off */
-typedef enum _fpioa_pull
-{
-    FPIOA_PULL_NONE,      /*!< No Pull */
-    FPIOA_PULL_DOWN,      /*!< Pull Down */
-    FPIOA_PULL_UP,        /*!< Pull Up */
-    FPIOA_PULL_MAX        /*!< Count of pull settings */
-} fpioa_pull_t;
-/* clang-format on */
-
-/**
- * @brief      FPIOA driving settings
- *
- * @note       FPIOA driving settings description
- *             There are 16 kinds of driving settings
- *
- * @note       Low Level Output Current
- *
- * |DS[3:0] |Min(mA)|Typ(mA)|Max(mA)|
- * |--------|-------|-------|-------|
- * |0000    |3.2    |5.4    |8.3    |
- * |0001    |4.7    |8.0    |12.3   |
- * |0010    |6.3    |10.7   |16.4   |
- * |0011    |7.8    |13.2   |20.2   |
- * |0100    |9.4    |15.9   |24.2   |
- * |0101    |10.9   |18.4   |28.1   |
- * |0110    |12.4   |20.9   |31.8   |
- * |0111    |13.9   |23.4   |35.5   |
- *
- * @note       High Level Output Current
- *
- * |DS[3:0] |Min(mA)|Typ(mA)|Max(mA)|
- * |--------|-------|-------|-------|
- * |0000    |5.0    |7.6    |11.2   |
- * |0001    |7.5    |11.4   |16.8   |
- * |0010    |10.0   |15.2   |22.3   |
- * |0011    |12.4   |18.9   |27.8   |
- * |0100    |14.9   |22.6   |33.3   |
- * |0101    |17.4   |26.3   |38.7   |
- * |0110    |19.8   |30.0   |44.1   |
- * |0111    |22.3   |33.7   |49.5   |
- *
- */
-
-/* clang-format off */
-typedef enum _fpioa_driving
-{
-    FPIOA_DRIVING_0,      /*!< 0000 */
-    FPIOA_DRIVING_1,      /*!< 0001 */
-    FPIOA_DRIVING_2,      /*!< 0010 */
-    FPIOA_DRIVING_3,      /*!< 0011 */
-    FPIOA_DRIVING_4,      /*!< 0100 */
-    FPIOA_DRIVING_5,      /*!< 0101 */
-    FPIOA_DRIVING_6,      /*!< 0110 */
-    FPIOA_DRIVING_7,      /*!< 0111 */
-    FPIOA_DRIVING_8,      /*!< 1000 */
-    FPIOA_DRIVING_9,      /*!< 1001 */
-    FPIOA_DRIVING_10,     /*!< 1010 */
-    FPIOA_DRIVING_11,     /*!< 1011 */
-    FPIOA_DRIVING_12,     /*!< 1100 */
-    FPIOA_DRIVING_13,     /*!< 1101 */
-    FPIOA_DRIVING_14,     /*!< 1110 */
-    FPIOA_DRIVING_15,     /*!< 1111 */
-    FPIOA_DRIVING_MAX     /*!< Count of driving settings */
-} fpioa_driving_t;
-/* clang-format on */
-
-/**
- * @brief      FPIOA IO
- *
- *             FPIOA IO is the specific pin of the chip package. Every IO
- *             has a 32bit width register that can independently implement
- *             schmitt trigger, invert input, invert output, strong pull
- *             up, driving selector, static input and static output. And more,
- *             it can implement any pin of any peripheral devices.
- *
- * @note       FPIOA IO's register bits Layout
- *
- * | Bits      | Name     |Description                                        |
- * |-----------|----------|---------------------------------------------------|
- * | 31        | PAD_DI   | Read current IO's data input.                     |
- * | 30:24     | NA       | Reserved bits.                                    |
- * | 23        | ST       | Schmitt trigger.                                  |
- * | 22        | DI_INV   | Invert Data input.                                |
- * | 21        | IE_INV   | Invert the input enable signal.                   |
- * | 20        | IE_EN    | Input enable. It can disable or enable IO input.  |
- * | 19        | SL       | Slew rate control enable.                         |
- * | 18        | SPU      | Strong pull up.                                   |
- * | 17        | PD       | Pull select: 0 for pull down, 1 for pull up.      |
- * | 16        | PU       | Pull enable.                                      |
- * | 15        | DO_INV   | Invert the result of data output select (DO_SEL). |
- * | 14        | DO_SEL   | Data output select: 0 for DO, 1 for OE.           |
- * | 13        | OE_INV   | Invert the output enable signal.                  |
- * | 12        | OE_EN    | Output enable.It can disable or enable IO output. |
- * | 11:8      | DS       | Driving selector.                                 |
- * | 7:0       | CH_SEL   | Channel select from 256 input.                    |
- *
- */
-typedef struct _fpioa_io_config
-{
-    uint32_t ch_sel : 8;
-    /*!< Channel select from 256 input. */
-    uint32_t ds : 4;
-    /*!< Driving selector. */
-    uint32_t oe_en : 1;
-    /*!< Static output enable, will AND with OE_INV. */
-    uint32_t oe_inv : 1;
-    /*!< Invert output enable. */
-    uint32_t do_sel : 1;
-    /*!< Data output select: 0 for DO, 1 for OE. */
-    uint32_t do_inv : 1;
-    /*!< Invert the result of data output select (DO_SEL). */
-    uint32_t pu : 1;
-    /*!< Pull up enable. 0 for nothing, 1 for pull up. */
-    uint32_t pd : 1;
-    /*!< Pull down enable. 0 for nothing, 1 for pull down. */
-    uint32_t resv0 : 1;
-    /*!< Reserved bits. */
-    uint32_t sl : 1;
-    /*!< Slew rate control enable. */
-    uint32_t ie_en : 1;
-    /*!< Static input enable, will AND with IE_INV. */
-    uint32_t ie_inv : 1;
-    /*!< Invert input enable. */
-    uint32_t di_inv : 1;
-    /*!< Invert Data input. */
-    uint32_t st : 1;
-    /*!< Schmitt trigger. */
-    uint32_t resv1 : 7;
-    /*!< Reserved bits. */
-    uint32_t pad_di : 1;
-    /*!< Read current IO's data input. */
-} __attribute__((packed, aligned(4))) fpioa_io_config_t;
-
-/**
- * @brief      FPIOA tie setting
- *
- *             FPIOA Object have 48 IO pin object and 256 bit input tie bits.
- *             All SPI arbitration signal will tie high by default.
- *
- * @note       FPIOA function tie bits RAM Layout
- *
- * | Address   | Name             |Description                       |
- * |-----------|------------------|----------------------------------|
- * | 0x000     | TIE_EN[31:0]     | Input tie enable bits [31:0]     |
- * | 0x004     | TIE_EN[63:32]    | Input tie enable bits [63:32]    |
- * | 0x008     | TIE_EN[95:64]    | Input tie enable bits [95:64]    |
- * | 0x00C     | TIE_EN[127:96]   | Input tie enable bits [127:96]   |
- * | 0x010     | TIE_EN[159:128]  | Input tie enable bits [159:128]  |
- * | 0x014     | TIE_EN[191:160]  | Input tie enable bits [191:160]  |
- * | 0x018     | TIE_EN[223:192]  | Input tie enable bits [223:192]  |
- * | 0x01C     | TIE_EN[255:224]  | Input tie enable bits [255:224]  |
- * | 0x020     | TIE_VAL[31:0]    | Input tie value bits [31:0]      |
- * | 0x024     | TIE_VAL[63:32]   | Input tie value bits [63:32]     |
- * | 0x028     | TIE_VAL[95:64]   | Input tie value bits [95:64]     |
- * | 0x02C     | TIE_VAL[127:96]  | Input tie value bits [127:96]    |
- * | 0x030     | TIE_VAL[159:128] | Input tie value bits [159:128]   |
- * | 0x034     | TIE_VAL[191:160] | Input tie value bits [191:160]   |
- * | 0x038     | TIE_VAL[223:192] | Input tie value bits [223:192]   |
- * | 0x03C     | TIE_VAL[255:224] | Input tie value bits [255:224]   |
- *
- * @note       Function which input tie high by default
- *
- * | Name          |Description                            |
- * |---------------|---------------------------------------|
- * | SPI0_ARB      | Arbitration function of SPI master 0  |
- * | SPI1_ARB      | Arbitration function of SPI master 1  |
- *
- *             Tie high means the SPI Arbitration input is 1
- *
- */
-typedef struct _fpioa_tie
-{
-    uint32_t en[FUNC_MAX / 32];
-    /*!< FPIOA GPIO multiplexer tie enable array */
-    uint32_t val[FUNC_MAX / 32];
-    /*!< FPIOA GPIO multiplexer tie value array */
-} __attribute__((packed, aligned(4))) fpioa_tie_t;
-
-/**
- * @brief      FPIOA Object
- *
- *             FPIOA Object have 48 IO pin object and 256 bit input tie bits.
- *             All SPI arbitration signal will tie high by default.
- *
- * @note       FPIOA IO Pin RAM Layout
- *
- * | Address   | Name     |Description                     |
- * |-----------|----------|--------------------------------|
- * | 0x000     | PAD0     | FPIOA GPIO multiplexer io 0    |
- * | 0x004     | PAD1     | FPIOA GPIO multiplexer io 1    |
- * | 0x008     | PAD2     | FPIOA GPIO multiplexer io 2    |
- * | 0x00C     | PAD3     | FPIOA GPIO multiplexer io 3    |
- * | 0x010     | PAD4     | FPIOA GPIO multiplexer io 4    |
- * | 0x014     | PAD5     | FPIOA GPIO multiplexer io 5    |
- * | 0x018     | PAD6     | FPIOA GPIO multiplexer io 6    |
- * | 0x01C     | PAD7     | FPIOA GPIO multiplexer io 7    |
- * | 0x020     | PAD8     | FPIOA GPIO multiplexer io 8    |
- * | 0x024     | PAD9     | FPIOA GPIO multiplexer io 9    |
- * | 0x028     | PAD10    | FPIOA GPIO multiplexer io 10   |
- * | 0x02C     | PAD11    | FPIOA GPIO multiplexer io 11   |
- * | 0x030     | PAD12    | FPIOA GPIO multiplexer io 12   |
- * | 0x034     | PAD13    | FPIOA GPIO multiplexer io 13   |
- * | 0x038     | PAD14    | FPIOA GPIO multiplexer io 14   |
- * | 0x03C     | PAD15    | FPIOA GPIO multiplexer io 15   |
- * | 0x040     | PAD16    | FPIOA GPIO multiplexer io 16   |
- * | 0x044     | PAD17    | FPIOA GPIO multiplexer io 17   |
- * | 0x048     | PAD18    | FPIOA GPIO multiplexer io 18   |
- * | 0x04C     | PAD19    | FPIOA GPIO multiplexer io 19   |
- * | 0x050     | PAD20    | FPIOA GPIO multiplexer io 20   |
- * | 0x054     | PAD21    | FPIOA GPIO multiplexer io 21   |
- * | 0x058     | PAD22    | FPIOA GPIO multiplexer io 22   |
- * | 0x05C     | PAD23    | FPIOA GPIO multiplexer io 23   |
- * | 0x060     | PAD24    | FPIOA GPIO multiplexer io 24   |
- * | 0x064     | PAD25    | FPIOA GPIO multiplexer io 25   |
- * | 0x068     | PAD26    | FPIOA GPIO multiplexer io 26   |
- * | 0x06C     | PAD27    | FPIOA GPIO multiplexer io 27   |
- * | 0x070     | PAD28    | FPIOA GPIO multiplexer io 28   |
- * | 0x074     | PAD29    | FPIOA GPIO multiplexer io 29   |
- * | 0x078     | PAD30    | FPIOA GPIO multiplexer io 30   |
- * | 0x07C     | PAD31    | FPIOA GPIO multiplexer io 31   |
- * | 0x080     | PAD32    | FPIOA GPIO multiplexer io 32   |
- * | 0x084     | PAD33    | FPIOA GPIO multiplexer io 33   |
- * | 0x088     | PAD34    | FPIOA GPIO multiplexer io 34   |
- * | 0x08C     | PAD35    | FPIOA GPIO multiplexer io 35   |
- * | 0x090     | PAD36    | FPIOA GPIO multiplexer io 36   |
- * | 0x094     | PAD37    | FPIOA GPIO multiplexer io 37   |
- * | 0x098     | PAD38    | FPIOA GPIO multiplexer io 38   |
- * | 0x09C     | PAD39    | FPIOA GPIO multiplexer io 39   |
- * | 0x0A0     | PAD40    | FPIOA GPIO multiplexer io 40   |
- * | 0x0A4     | PAD41    | FPIOA GPIO multiplexer io 41   |
- * | 0x0A8     | PAD42    | FPIOA GPIO multiplexer io 42   |
- * | 0x0AC     | PAD43    | FPIOA GPIO multiplexer io 43   |
- * | 0x0B0     | PAD44    | FPIOA GPIO multiplexer io 44   |
- * | 0x0B4     | PAD45    | FPIOA GPIO multiplexer io 45   |
- * | 0x0B8     | PAD46    | FPIOA GPIO multiplexer io 46   |
- * | 0x0BC     | PAD47    | FPIOA GPIO multiplexer io 47   |
- *
- */
-typedef struct _fpioa
-{
-    fpioa_io_config_t io[FPIOA_NUM_IO];
-    /*!< FPIOA GPIO multiplexer io array */
-    fpioa_tie_t tie;
-    /*!< FPIOA GPIO multiplexer tie */
-} __attribute__((packed, aligned(4))) fpioa_t;
-
-/**
- * @brief       FPIOA object instanse
- */
-extern volatile fpioa_t *const fpioa;
-
-/**
- * @brief       Initialize FPIOA user custom default settings
- *
- * @note        This function will set all FPIOA pad registers to user-defined
- *              values from kconfig
- *
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-int fpioa_init(void);
-
-/**
- * @brief       Get IO configuration
- *
- * @param[in]   number      The IO number
- * @param       cfg         Pointer to struct of IO configuration for specified IO
- *
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-int fpioa_get_io(int number, fpioa_io_config_t *cfg);
-
-/**
- * @brief       Set IO configuration
- *
- * @param[in]   number      The IO number
- * @param[in]   cfg         Pointer to struct of IO configuration for specified IO
- *
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-int fpioa_set_io(int number, fpioa_io_config_t *cfg);
-
-/**
- * @brief       Set IO configuration with function number
- *
- * @note        The default IO configuration which bind to function number will
- *              set automatically
- *
- * @param[in]   number      The IO number
- * @param[in]   function    The function enum number
- *
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-int fpioa_set_function_raw(int number, fpioa_function_t function);
-
-/**
- * @brief       Set only IO configuration with function number
- *
- * @note        The default IO configuration which bind to function number will
- *              set automatically
- *
- * @param[in]   number      The IO number
- * @param[in]   function    The function enum number
- *
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-int fpioa_set_function(int number, fpioa_function_t function);
-
-/**
- * @brief       Set tie enable to function
- *
- * @param[in]   function    The function enum number
- * @param[in]   enable      Tie enable to set, 1 is enable, 0 is disable
- *
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-int fpioa_set_tie_enable(fpioa_function_t function, int enable);
-
-/**
- * @brief       Set tie value to function
- *
- * @param[in]   function    The function enum number
- * @param[in]   value       Tie value to set, 1 is HIGH, 0 is LOW
- *
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-int fpioa_set_tie_value(fpioa_function_t function, int value);
-
-/**
- * @brief      Set IO pull function
- *
- * @param[in]   number  The IO number
- * @param[in]   pull    The pull enum number
- *
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-int fpioa_set_io_pull(int number, fpioa_pull_t pull);
-
-/**
- * @brief       Get IO pull function
- *
- * @param[in]   number  The IO number
- *
- * @return      result
- *     - -1     Fail
- *     - Other  The pull enum number
- */
-int fpioa_get_io_pull(int number);
-
-/**
- * @brief       Set IO driving
- *
- * @param[in]   number   The IO number
- * @param[in]   driving  The driving enum number
- *
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-int fpioa_set_io_driving(int number, fpioa_driving_t driving);
-
-/**
- * @brief       Get IO driving
- *
- * @param[in]   number  The IO number
- *
- * @return      result
- *     - -1     Fail
- *     - Other  The driving enum number
- */
-int fpioa_get_io_driving(int number);
-
-/**
- * @brief       Get IO by function
- *
- * @param[in]   function  The function enum number
- *
- * @return      result
- *     - -1     Fail
- *     - Other  The IO number
- */
-int fpioa_get_io_by_function(fpioa_function_t function);
-
-/**
- * @brief       Set IO slew rate control
- *
- * @param[in]   number      The IO number
- * @param[in]   sl_value    Enable slew rate. 0: disable 1:enable
- *
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-int fpioa_set_sl(int number, uint8_t sl_enable);
-
-/**
- * @brief       Set IO slew rate
- *
- * @param[in]   number       The IO number
- * @param[in]   st_enable    Enable schmitt trigger. 0: disable 1:enable
- *
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-int fpioa_set_st(int number, uint8_t st_enable);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* _DRIVER_FPIOA_H */
-
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/gpio.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/gpio.c
deleted file mode 100644
index 1dead478b..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/gpio.c
+++ /dev/null
@@ -1,91 +0,0 @@
-/* Copyright 2018 Canaan Inc.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
-* @file gpio.c
-* @brief kendryte k210 source code
-*                https://github.com/kendryte/kendryte-standalone-sdk.git
-* @version 1.0
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
-
-#include <assert.h>
-#include "gpio.h"
-#include "utils.h"
-#include "fpioa.h"
-#include "sysctl.h"
-#define GPIO_MAX_PINNO 8
-
-volatile gpio_t* const gpio = (volatile gpio_t*)GPIO_BASE_ADDR;
-
-int gpio_init(void)
-{
-    return sysctl_clock_enable(SYSCTL_CLOCK_GPIO);
-}
-
-void gpio_set_drive_mode(uint8_t pin, gpio_drive_mode_t mode)
-{
-    ASSERT(pin < GPIO_MAX_PINNO);
-    int io_number = fpioa_get_io_by_function(FUNC_GPIO0 + pin);
-    ASSERT(io_number >= 0);
-
-    fpioa_pull_t pull;
-    uint32_t dir;
-
-    switch (mode)
-    {
-    case GPIO_DM_INPUT:
-        pull = FPIOA_PULL_NONE;
-        dir = 0;
-        break;
-    case GPIO_DM_INPUT_PULL_DOWN:
-        pull = FPIOA_PULL_DOWN;
-        dir = 0;
-        break;
-    case GPIO_DM_INPUT_PULL_UP:
-        pull = FPIOA_PULL_UP;
-        dir = 0;
-        break;
-    case GPIO_DM_OUTPUT:
-        pull = FPIOA_PULL_DOWN;
-        dir = 1;
-        break;
-    default:
-        ASSERT(!"GPIO drive mode is not supported."); 
-		break;
-    }
-
-    fpioa_set_io_pull(io_number, pull);
-    set_gpio_bit(gpio->direction.u32, pin, dir);
-}
-
-gpio_pin_value_t gpio_get_pin(uint8_t pin)
-{
-    ASSERT(pin < GPIO_MAX_PINNO);
-    uint32_t dir = get_gpio_bit(gpio->direction.u32, pin);
-    volatile uint32_t *reg = dir ? gpio->data_output.u32 : gpio->data_input.u32;
-    return get_gpio_bit(reg, pin);
-}
-
-void gpio_set_pin(uint8_t pin, gpio_pin_value_t value)
-{
-    ASSERT(pin < GPIO_MAX_PINNO);
-    uint32_t dir = get_gpio_bit(gpio->direction.u32, pin);
-    volatile uint32_t *reg = dir ? gpio->data_output.u32 : gpio->data_input.u32;
-    ASSERT(dir == 1);
-    set_gpio_bit(reg, pin, value);
-}
-
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/gpio.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/gpio.h
deleted file mode 100644
index 0a6b06366..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/gpio.h
+++ /dev/null
@@ -1,178 +0,0 @@
-/* Copyright 2018 Canaan Inc.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
-* @file gpio.h
-* @brief kendryte k210 source code
-*                https://github.com/kendryte/kendryte-standalone-sdk.git
-* @version 1.0
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
-
-#ifndef _DRIVER_GPIO_H
-#define _DRIVER_GPIO_H
-
-#include "platform.h"
-#include <inttypes.h>
-#include <stddef.h>
-#include "gpio_common.h"
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * @brief       Structure for accessing GPIO registers by individual bit
- */
-typedef struct _gpio_bits
-{
-    uint32_t b0 : 1;
-    uint32_t b1 : 1;
-    uint32_t b2 : 1;
-    uint32_t b3 : 1;
-    uint32_t b4 : 1;
-    uint32_t b5 : 1;
-    uint32_t b6 : 1;
-    uint32_t b7 : 1;
-    uint32_t b8 : 1;
-    uint32_t b9 : 1;
-    uint32_t b10 : 1;
-    uint32_t b11 : 1;
-    uint32_t b12 : 1;
-    uint32_t b13 : 1;
-    uint32_t b14 : 1;
-    uint32_t b15 : 1;
-    uint32_t b16 : 1;
-    uint32_t b17 : 1;
-    uint32_t b18 : 1;
-    uint32_t b19 : 1;
-    uint32_t b20 : 1;
-    uint32_t b21 : 1;
-    uint32_t b22 : 1;
-    uint32_t b23 : 1;
-    uint32_t b24 : 1;
-    uint32_t b25 : 1;
-    uint32_t b26 : 1;
-    uint32_t b27 : 1;
-    uint32_t b28 : 1;
-    uint32_t b29 : 1;
-    uint32_t b30 : 1;
-    uint32_t b31 : 1;
-} __attribute__((packed, aligned(4))) gpio_bits_t;
-
-/**
- * @brief       Structure of templates for accessing GPIO registers
- */
-typedef union _gpio_access_tp
-{
-    /* 32x1 bit mode */
-    uint32_t u32[1];
-    /* 16x2 bit mode */
-    uint16_t u16[2];
-    /* 8x4 bit mode */
-    uint8_t u8[4];
-    /* 1 bit mode */
-    gpio_bits_t bits;
-} __attribute__((packed, aligned(4))) gpio_access_tp_t;
-
-/**
- * @brief       The GPIO address map
- */
-typedef struct _gpio
-{
-    /* Offset 0x00: Data (output) registers */
-    gpio_access_tp_t data_output;
-    /* Offset 0x04: Data direction registers */
-    gpio_access_tp_t direction;
-    /* Offset 0x08: Data source registers */
-    gpio_access_tp_t source;
-    /* Offset 0x10 - 0x2f: Unused registers, 9x4 bytes */
-    uint32_t unused_0[9];
-    /* Offset 0x30: Interrupt enable/disable registers */
-    gpio_access_tp_t interrupt_enable;
-    /* Offset 0x34: Interrupt mask registers */
-    gpio_access_tp_t interrupt_mask;
-    /* Offset 0x38: Interrupt level registers */
-    gpio_access_tp_t interrupt_level;
-    /* Offset 0x3c: Interrupt polarity registers */
-    gpio_access_tp_t interrupt_polarity;
-    /* Offset 0x40: Interrupt status registers */
-    gpio_access_tp_t interrupt_status;
-    /* Offset 0x44: Raw interrupt status registers */
-    gpio_access_tp_t interrupt_status_raw;
-    /* Offset 0x48: Interrupt debounce registers */
-    gpio_access_tp_t interrupt_debounce;
-    /* Offset 0x4c: Registers for clearing interrupts */
-    gpio_access_tp_t interrupt_clear;
-    /* Offset 0x50: External port (data input) registers */
-    gpio_access_tp_t data_input;
-    /* Offset 0x54 - 0x5f: Unused registers, 3x4 bytes */
-    uint32_t unused_1[3];
-    /* Offset 0x60: Sync level registers */
-    gpio_access_tp_t sync_level;
-    /* Offset 0x64: ID code */
-    gpio_access_tp_t id_code;
-    /* Offset 0x68: Interrupt both edge type */
-    gpio_access_tp_t interrupt_bothedge;
-
-} __attribute__((packed, aligned(4))) gpio_t;
-
-/**
- * @brief       Bus GPIO object instance
- */
-extern volatile gpio_t *const gpio;
-
-/**
- * @brief       Gpio initialize
- *
- * @return      Result
- *     - 0      Success
- *     - Other Fail
- */
-int gpio_init(void);
-
-/**
- * @brief       Set Gpio drive mode
- *
- * @param[in]   pin         Gpio pin
- * @param[in]   mode        Gpio pin drive mode
- */
-void gpio_set_drive_mode(uint8_t pin, gpio_drive_mode_t mode);
-
-/**
- * @brief       Get Gpio pin value
- *
- * @param[in]   pin      Gpio pin
- * @return      Pin value
- *
- *     - GPIO_PV_Low     Gpio pin low
- *     - GPIO_PV_High    Gpio pin high
- */
-gpio_pin_value_t gpio_get_pin(uint8_t pin);
-
-/**
- * @brief       Set Gpio pin value
- *
- * @param[in]   pin         Gpio pin
- * @param[in]   value       Gpio pin value
- */
-void gpio_set_pin(uint8_t pin, gpio_pin_value_t value);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* _DRIVER_GPIO_H */
-
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/gpio_common.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/gpio_common.h
deleted file mode 100644
index c782b5c4d..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/gpio_common.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/* Copyright 2018 Canaan Inc.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
-* @file gpio_common.h
-* @brief kendryte k210 source code
-*                https://github.com/kendryte/kendryte-standalone-sdk.git
-* @version 1.0
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
-
-#ifndef _GPIO_COMMON_H
-#define _GPIO_COMMON_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef enum _gpio_drive_mode
-{
-    GPIO_DM_INPUT,
-    GPIO_DM_INPUT_PULL_DOWN,
-    GPIO_DM_INPUT_PULL_UP,
-    GPIO_DM_OUTPUT,
-} gpio_drive_mode_t;
-
-typedef enum _gpio_pin_edge
-{
-    GPIO_PE_NONE,
-    GPIO_PE_FALLING,
-    GPIO_PE_RISING,
-    GPIO_PE_BOTH,
-    GPIO_PE_LOW,
-    GPIO_PE_HIGH = 8,
-} gpio_pin_edge_t;
-
-typedef enum _gpio_pin_value
-{
-    GPIO_PV_LOW,
-    GPIO_PV_HIGH
-} gpio_pin_value_t;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* _GPIO_COMMON_H */
-
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/gpiohs.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/gpiohs.c
deleted file mode 100644
index d91be6db6..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/gpiohs.c
+++ /dev/null
@@ -1,236 +0,0 @@
-/* Copyright 2018 Canaan Inc.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
-* @file gpiohs.c
-* @brief kendryte k210 source code
-*                https://github.com/kendryte/kendryte-standalone-sdk.git
-* @version 1.0
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
-
-#include <assert.h>
-#include "fpioa.h"
-#include "gpiohs.h"
-#include "sysctl.h"
-#include "utils.h"
-#include <nuttx/arch.h>
-#include <arch/irq.h>
-#define GPIOHS_MAX_PINNO 32
-
-volatile gpiohs_t *const gpiohs = (volatile gpiohs_t *)GPIOHS_BASE_ADDR;
-
-typedef struct _gpiohs_pin_instance
-{
-    size_t pin;
-    gpio_pin_edge_t edge;
-    void (*callback)(void);
-    plic_irq_callback_t gpiohs_callback;
-    void *context;
-} gpiohs_pin_instance_t;
-
-static gpiohs_pin_instance_t pin_instance[32];
-
-void gpiohs_set_drive_mode(uint8_t pin, gpio_drive_mode_t mode)
-{
-    ASSERT(pin < GPIOHS_MAX_PINNO);
-    int io_number = fpioa_get_io_by_function(FUNC_GPIOHS0 + pin);
-    ASSERT(io_number >= 0);
-
-    fpioa_pull_t pull;
-    uint32_t dir;
-
-    switch(mode)
-    {
-        case GPIO_DM_INPUT:
-            pull = FPIOA_PULL_NONE;
-            dir = 0;
-            break;
-        case GPIO_DM_INPUT_PULL_DOWN:
-            pull = FPIOA_PULL_DOWN;
-            dir = 0;
-            break;
-        case GPIO_DM_INPUT_PULL_UP:
-            pull = FPIOA_PULL_UP;
-            dir = 0;
-            break;
-        case GPIO_DM_OUTPUT:
-            pull = FPIOA_PULL_DOWN;
-            dir = 1;
-            break;
-        default:
-            ASSERT(!"GPIO drive mode is not supported.");
-            break;
-    }
-
-    fpioa_set_io_pull(io_number, pull);
-    volatile uint32_t *reg = dir ? gpiohs->output_en.u32 : gpiohs->input_en.u32;
-    volatile uint32_t *reg_d = !dir ? gpiohs->output_en.u32 : gpiohs->input_en.u32;
-    set_gpio_bit(reg_d, pin, 0);
-    set_gpio_bit(reg, pin, 1);
-}
-
-gpio_pin_value_t gpiohs_get_pin(uint8_t pin)
-{
-    ASSERT(pin < GPIOHS_MAX_PINNO);
-    return get_gpio_bit(gpiohs->input_val.u32, pin);
-}
-
-void gpiohs_set_pin(uint8_t pin, gpio_pin_value_t value)
-{
-    ASSERT(pin < GPIOHS_MAX_PINNO);
-    set_gpio_bit(gpiohs->output_val.u32, pin, value);
-}
-
-void gpiohs_set_pin_edge(uint8_t pin, gpio_pin_edge_t edge)
-{
-    set_gpio_bit(gpiohs->rise_ie.u32, pin, 0);
-    set_gpio_bit(gpiohs->rise_ip.u32, pin, 1);
-
-    set_gpio_bit(gpiohs->fall_ie.u32, pin, 0);
-    set_gpio_bit(gpiohs->fall_ip.u32, pin, 1);
-
-    set_gpio_bit(gpiohs->low_ie.u32, pin, 0);
-    set_gpio_bit(gpiohs->low_ip.u32, pin, 1);
-
-    set_gpio_bit(gpiohs->high_ie.u32, pin, 0);
-    set_gpio_bit(gpiohs->high_ip.u32, pin, 1);
-
-    if(edge & GPIO_PE_FALLING)
-    {
-        set_gpio_bit(gpiohs->fall_ie.u32, pin, 1);
-    } else
-    {
-        set_gpio_bit(gpiohs->fall_ie.u32, pin, 0);
-    }
-
-    if(edge & GPIO_PE_RISING)
-    {
-        set_gpio_bit(gpiohs->rise_ie.u32, pin, 1);
-    } else
-    {
-        set_gpio_bit(gpiohs->rise_ie.u32, pin, 0);
-    }
-
-    if(edge & GPIO_PE_LOW)
-    {
-        set_gpio_bit(gpiohs->low_ie.u32, pin, 1);
-    } else
-    {
-        set_gpio_bit(gpiohs->low_ie.u32, pin, 0);
-    }
-
-    if(edge & GPIO_PE_HIGH)
-    {
-        set_gpio_bit(gpiohs->high_ie.u32, pin, 1);
-    } else
-    {
-        set_gpio_bit(gpiohs->high_ie.u32, pin, 0);
-    }
-
-    pin_instance[pin].edge = edge;
-}
-
-int gpiohs_pin_onchange_isr(int irq, void *userdata, void *arg)
-{
-    gpiohs_pin_instance_t *ctx = (gpiohs_pin_instance_t *)userdata;
-    size_t pin = ctx->pin;
-
-    if(ctx->edge & GPIO_PE_FALLING)
-    {
-        set_gpio_bit(gpiohs->fall_ie.u32, pin, 0);
-        set_gpio_bit(gpiohs->fall_ip.u32, pin, 1);
-        set_gpio_bit(gpiohs->fall_ie.u32, pin, 1);
-    }
-
-    if(ctx->edge & GPIO_PE_RISING)
-    {
-        set_gpio_bit(gpiohs->rise_ie.u32, pin, 0);
-        set_gpio_bit(gpiohs->rise_ip.u32, pin, 1);
-        set_gpio_bit(gpiohs->rise_ie.u32, pin, 1);
-    }
-
-    if(ctx->edge & GPIO_PE_LOW)
-    {
-        set_gpio_bit(gpiohs->low_ie.u32, pin, 0);
-        set_gpio_bit(gpiohs->low_ip.u32, pin, 1);
-        set_gpio_bit(gpiohs->low_ie.u32, pin, 1);
-    }
-
-    if(ctx->edge & GPIO_PE_HIGH)
-    {
-        set_gpio_bit(gpiohs->high_ie.u32, pin, 0);
-        set_gpio_bit(gpiohs->high_ip.u32, pin, 1);
-        set_gpio_bit(gpiohs->high_ie.u32, pin, 1);
-    }
-
-    if(ctx->callback)
-        ctx->callback();
-    if(ctx->gpiohs_callback)
-        ctx->gpiohs_callback(ctx->context);
-
-    return 0;
-}
-
-void gpiohs_set_irq(uint8_t pin, uint32_t priority, void (*func)(void))
-{
-
-    int ret;
-    pin_instance[pin].pin = pin;
-    pin_instance[pin].callback = func;
-
-    plic_set_priority(IRQN_GPIOHS0_INTERRUPT + pin, priority);
-    ret = irq_attach(IRQN_GPIOHS0_INTERRUPT + pin, gpiohs_pin_onchange_isr, &(pin_instance[pin]));
-    if (ret == OK)
-    {
-      up_enable_irq(IRQN_GPIOHS0_INTERRUPT + pin);
-    }
-}
-
-void gpiohs_irq_register(uint8_t pin, uint32_t priority, plic_irq_callback_t callback, void *ctx)
-{
-    int ret;
-    pin_instance[pin].pin = pin;
-    pin_instance[pin].gpiohs_callback = callback;
-    pin_instance[pin].context = ctx;
-
-    plic_set_priority(IRQN_GPIOHS0_INTERRUPT + pin, priority);
-    ret = irq_attach(IRQN_GPIOHS0_INTERRUPT + pin, gpiohs_pin_onchange_isr, &(pin_instance[pin]));
-    if (ret == OK)
-    {
-      up_enable_irq(IRQN_GPIOHS0_INTERRUPT + pin);
-    }
-}
-
-void gpiohs_irq_unregister(uint8_t pin)
-{
-    pin_instance[pin] = (gpiohs_pin_instance_t){
-        .callback = NULL,
-        .gpiohs_callback = NULL,
-        .context = NULL,
-    };
-    set_gpio_bit(gpiohs->rise_ie.u32, pin, 0);
-    set_gpio_bit(gpiohs->fall_ie.u32, pin, 0);
-    set_gpio_bit(gpiohs->low_ie.u32, pin, 0);
-    set_gpio_bit(gpiohs->high_ie.u32, pin, 0);
-    up_disable_irq(IRQN_GPIOHS0_INTERRUPT + pin);
-    irq_detach(IRQN_GPIOHS0_INTERRUPT + pin);
-}
-
-void gpiohs_irq_disable(size_t pin)
-{
-    plic_irq_disable(IRQN_GPIOHS0_INTERRUPT + pin);
-}
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/gpiohs.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/gpiohs.h
deleted file mode 100644
index d8a53515a..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/gpiohs.h
+++ /dev/null
@@ -1,276 +0,0 @@
-/* Copyright 2018 Canaan Inc.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
-* @file gpiohs.h
-* @brief kendryte k210 source code
-*                https://github.com/kendryte/kendryte-standalone-sdk.git
-* @version 1.0
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
-
-#ifndef _DRIVER_GPIOHS_H
-#define _DRIVER_GPIOHS_H
-
-#include <stddef.h>
-#include <stdint.h>
-#include "gpio_common.h"
-#include "platform.h"
-#include "plic.h"
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* clang-format off */
-/* Register address offsets */
-#define GPIOHS_INPUT_VAL  (0x00)
-#define GPIOHS_INPUT_EN   (0x04)
-#define GPIOHS_OUTPUT_EN  (0x08)
-#define GPIOHS_OUTPUT_VAL (0x0C)
-#define GPIOHS_PULLUP_EN  (0x10)
-#define GPIOHS_DRIVE      (0x14)
-#define GPIOHS_RISE_IE    (0x18)
-#define GPIOHS_RISE_IP    (0x1C)
-#define GPIOHS_FALL_IE    (0x20)
-#define GPIOHS_FALL_IP    (0x24)
-#define GPIOHS_HIGH_IE    (0x28)
-#define GPIOHS_HIGH_IP    (0x2C)
-#define GPIOHS_LOW_IE     (0x30)
-#define GPIOHS_LOW_IP     (0x34)
-#define GPIOHS_IOF_EN     (0x38)
-#define GPIOHS_IOF_SEL    (0x3C)
-#define GPIOHS_OUTPUT_XOR (0x40)
-/* clang-format on */
-
-/**
- * @brief      GPIO bits raw object
- */
-typedef struct _gpiohs_raw
-{
-    /* Address offset 0x00 */
-    uint32_t input_val;
-    /* Address offset 0x04 */
-    uint32_t input_en;
-    /* Address offset 0x08 */
-    uint32_t output_en;
-    /* Address offset 0x0c */
-    uint32_t output_val;
-    /* Address offset 0x10 */
-    uint32_t pullup_en;
-    /* Address offset 0x14 */
-    uint32_t drive;
-    /* Address offset 0x18 */
-    uint32_t rise_ie;
-    /* Address offset 0x1c */
-    uint32_t rise_ip;
-    /* Address offset 0x20 */
-    uint32_t fall_ie;
-    /* Address offset 0x24 */
-    uint32_t fall_ip;
-    /* Address offset 0x28 */
-    uint32_t high_ie;
-    /* Address offset 0x2c */
-    uint32_t high_ip;
-    /* Address offset 0x30 */
-    uint32_t low_ie;
-    /* Address offset 0x34 */
-    uint32_t low_ip;
-    /* Address offset 0x38 */
-    uint32_t iof_en;
-    /* Address offset 0x3c */
-    uint32_t iof_sel;
-    /* Address offset 0x40 */
-    uint32_t output_xor;
-} __attribute__((packed, aligned(4))) gpiohs_raw_t;
-
-/**
- * @brief       GPIO bits object
- */
-typedef struct _gpiohs_bits
-{
-    uint32_t b0 : 1;
-    uint32_t b1 : 1;
-    uint32_t b2 : 1;
-    uint32_t b3 : 1;
-    uint32_t b4 : 1;
-    uint32_t b5 : 1;
-    uint32_t b6 : 1;
-    uint32_t b7 : 1;
-    uint32_t b8 : 1;
-    uint32_t b9 : 1;
-    uint32_t b10 : 1;
-    uint32_t b11 : 1;
-    uint32_t b12 : 1;
-    uint32_t b13 : 1;
-    uint32_t b14 : 1;
-    uint32_t b15 : 1;
-    uint32_t b16 : 1;
-    uint32_t b17 : 1;
-    uint32_t b18 : 1;
-    uint32_t b19 : 1;
-    uint32_t b20 : 1;
-    uint32_t b21 : 1;
-    uint32_t b22 : 1;
-    uint32_t b23 : 1;
-    uint32_t b24 : 1;
-    uint32_t b25 : 1;
-    uint32_t b26 : 1;
-    uint32_t b27 : 1;
-    uint32_t b28 : 1;
-    uint32_t b29 : 1;
-    uint32_t b30 : 1;
-    uint32_t b31 : 1;
-} __attribute__((packed, aligned(4))) gpiohs_bits_t;
-
-/**
- * @brief       GPIO bits multi access union
- */
-typedef union _gpiohs_u32
-{
-    /* 32x1 bit mode */
-    uint32_t u32[1];
-    /* 16x2 bit mode */
-    uint16_t u16[2];
-    /* 8x4 bit mode */
-    uint8_t u8[4];
-    /* 1 bit mode */
-    gpiohs_bits_t bits;
-} __attribute__((packed, aligned(4))) gpiohs_u32_t;
-
-/**
- * @brief      GPIO object
- *
- *             The GPIO controller is a peripheral device mapped in the
- *             internal memory map, discoverable in the Configuration String.
- *             It is responsible for low-level configuration of the actual
- *             GPIO pads on the device (direction, pull up-enable, and drive
- *             value), as well as selecting between various sources of the
- *             controls for these signals. The GPIO controller allows seperate
- *             configuration of each of N GPIO bits.
- *
- *             Once the interrupt is pending, it will remain set until a 1 is
- *             written to the *_ip register at that bit.
- */
-
-typedef struct _gpiohs
-{
-    /* Address offset 0x00, Input Values */
-    gpiohs_u32_t input_val;
-    /* Address offset 0x04, Input enable */
-    gpiohs_u32_t input_en;
-    /* Address offset 0x08, Output enable */
-    gpiohs_u32_t output_en;
-    /* Address offset 0x0c, Onput Values */
-    gpiohs_u32_t output_val;
-    /* Address offset 0x10, Internal Pull-Ups enable */
-    gpiohs_u32_t pullup_en;
-    /* Address offset 0x14, Drive Strength */
-    gpiohs_u32_t drive;
-    /* Address offset 0x18, Rise interrupt enable */
-    gpiohs_u32_t rise_ie;
-    /* Address offset 0x1c, Rise interrupt pending */
-    gpiohs_u32_t rise_ip;
-    /* Address offset 0x20, Fall interrupt enable */
-    gpiohs_u32_t fall_ie;
-    /* Address offset 0x24, Fall interrupt pending */
-    gpiohs_u32_t fall_ip;
-    /* Address offset 0x28, High interrupt enable */
-    gpiohs_u32_t high_ie;
-    /* Address offset 0x2c, High interrupt pending */
-    gpiohs_u32_t high_ip;
-    /* Address offset 0x30, Low interrupt enable */
-    gpiohs_u32_t low_ie;
-    /* Address offset 0x34, Low interrupt pending */
-    gpiohs_u32_t low_ip;
-    /* Address offset 0x38, HW I/O Function enable */
-    gpiohs_u32_t iof_en;
-    /* Address offset 0x3c, HW I/O Function select */
-    gpiohs_u32_t iof_sel;
-    /* Address offset 0x40, Output XOR (invert) */
-    gpiohs_u32_t output_xor;
-} __attribute__((packed, aligned(4))) gpiohs_t;
-
-/**
- * @brief       GPIO High-speed object instanse
- */
-extern volatile gpiohs_t *const gpiohs;
-
-/**
- * @brief       Set Gpiohs drive mode
- *
- * @param[in]   pin         Gpiohs pin
- * @param[in]   mode        Gpiohs pin drive mode
- */
-void gpiohs_set_drive_mode(uint8_t pin, gpio_drive_mode_t mode);
-
-/**
- * @brief       Get Gpiohs pin value
- *
- * @param[in]   pin     Gpiohs pin
- * @return      Pin     value
- *
- *     - GPIO_PV_Low     Gpiohs pin low
- *     - GPIO_PV_High    Gpiohs pin high
- */
-gpio_pin_value_t gpiohs_get_pin(uint8_t pin);
-
-/**
- * @brief      Set Gpiohs pin value
- *
- * @param[in]   pin      Gpiohs pin
- * @param[in]   value    Gpiohs pin value
- */
-void gpiohs_set_pin(uint8_t pin, gpio_pin_value_t value);
-
-/**
- * @brief      Set Gpiohs pin edge for interrupt
- *
- * @param[in]   pin         Gpiohs pin
- * @param[in]   edge        Gpiohs pin edge type
- */
-void gpiohs_set_pin_edge(uint8_t pin, gpio_pin_edge_t edge);
-
-/**
- * @brief      Set Gpiohs pin interrupt
- *
- * @param[in]   pin             Gpiohs pin
- * @param[in]   priority        Gpiohs pin interrupt priority
- * @param[in]   func            Gpiohs pin interrupt service routine
- */
-void gpiohs_set_irq(uint8_t pin, uint32_t priority, void (*func)(void));
-
-/**
- * @brief      Set Gpiohs pin interrupt
- *
- * @param[in]   pin             Gpiohs pin
- * @param[in]   priority        Gpiohs pin interrupt priority
- * @param[in]   callback        Gpiohs pin interrupt service routine
- * @param[in]   ctx             Gpiohs interrupt param
- */
-void gpiohs_irq_register(uint8_t pin, uint32_t priority, plic_irq_callback_t callback, void *ctx);
-
-/**
- * @brief      Unregister Gpiohs pin interrupt
- *
- * @param[in]   pin             Gpiohs pin
- */
-void gpiohs_irq_unregister(uint8_t pin);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* _DRIVER_GPIOHS_H */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/hardware/k210_memorymap.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/hardware/k210_memorymap.h
new file mode 100644
index 000000000..13da9e3b6
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/hardware/k210_memorymap.h
@@ -0,0 +1,53 @@
+/****************************************************************************
+ * arch/risc-v/src/k210/hardware/k210_memorymap.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/**
+* @file k210_memorymap.h
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.3.0 
+* @author AIIT XUOS Lab
+* @date 2022-06-30
+*/
+
+#ifndef __ARCH_RISCV_SRC_K210_HARDWARE_K210_MEMORYMAP_H
+#define __ARCH_RISCV_SRC_K210_HARDWARE_K210_MEMORYMAP_H
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Register Base Address ****************************************************/
+
+#define K210_CLINT_BASE   0x02000000
+#define K210_PLIC_BASE    0x0c000000
+
+#ifdef CONFIG_K210_WITH_QEMU
+#define K210_UART0_BASE   0x10010000
+#else
+#define K210_UART0_BASE   0x38000000
+#endif
+#define K210_GPIOHS_BASE  0x38001000
+#define K210_GPIO_BASE    0x50200000
+#define K210_FPIOA_BASE   0x502B0000
+
+#define K210_SYSCTL_BASE  0x50440000
+
+#endif /* __ARCH_RISCV_SRC_K210_HARDWARE_K210_MEMORYMAP_H */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/i2s.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/i2s.c
deleted file mode 100644
index 755fef809..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/i2s.c
+++ /dev/null
@@ -1,719 +0,0 @@
-/* Copyright 2018 Canaan Inc.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
-* @file i2s.c
-* @brief kendryte k210 source code
-*                https://github.com/kendryte/kendryte-standalone-sdk.git
-* @version 1.0
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
-
-#include <stdint.h>
-#include <stdio.h>
-#include <math.h>
-#include <assert.h>
-#include "i2s.h"
-#include "sysctl.h"
-#include "stdlib.h"
-#include "utils.h"
-
-volatile i2s_t *const i2s[3] =
-{
-    (volatile i2s_t *)I2S0_BASE_ADDR,
-    (volatile i2s_t *)I2S1_BASE_ADDR,
-    (volatile i2s_t *)I2S2_BASE_ADDR
-};
-
-typedef struct _i2s_instance
-{
-    i2s_device_number_t i2s_num;
-    i2s_transfer_mode_t transfer_mode;
-    dmac_channel_number_t dmac_channel;
-    plic_instance_t i2s_int_instance;
-} i2s_instance_t;
-
-static i2s_instance_t g_i2s_send_instance[3];
-static i2s_instance_t g_i2s_recv_instance[3];
-
-static int i2s_recv_channel_enable(i2s_device_number_t device_num,
-                            i2s_channel_num_t channel_num, uint32_t enable)
-{
-    rer_t u_rer;
-
-    if (channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
-        return -1;
-    u_rer.reg_data = readl(&i2s[device_num]->channel[channel_num].rer);
-    u_rer.rer.rxchenx = enable;
-    writel(u_rer.reg_data, &i2s[device_num]->channel[channel_num].rer);
-    return 0;
-}
-
-static int i2s_transmit_channel_enable(i2s_device_number_t device_num,
-    i2s_channel_num_t channel_num, uint32_t enable)
-{
-    ter_t u_ter;
-
-    if (channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
-        return -1;
-
-    u_ter.reg_data = readl(&i2s[device_num]->channel[channel_num].ter);
-    u_ter.ter.txchenx = enable;
-    writel(u_ter.reg_data, &i2s[device_num]->channel[channel_num].ter);
-    return 0;
-}
-
-static void i2s_receive_enable(i2s_device_number_t device_num, i2s_channel_num_t channel_num)
-{
-    irer_t u_irer;
-
-    u_irer.reg_data = readl(&i2s[device_num]->irer);
-    u_irer.irer.rxen = 1;
-    writel(u_irer.reg_data, &i2s[device_num]->irer);
-    /* Receiver block enable */
-
-    i2s_recv_channel_enable(device_num, channel_num, 1);
-    /* Receive channel enable */
-}
-
-static void i2s_transimit_enable(i2s_device_number_t device_num, i2s_channel_num_t channel_num)
-{
-    iter_t u_iter;
-
-    u_iter.reg_data = readl(&i2s[device_num]->iter);
-    u_iter.iter.txen = 1;
-    writel(u_iter.reg_data, &i2s[device_num]->iter);
-    /* Transmitter block enable */
-
-    i2s_transmit_channel_enable(device_num, channel_num, 1);
-    /* Transmit channel enable */
-}
-
-static void i2s_set_enable(i2s_device_number_t device_num, uint32_t enable)
-{
-    ier_t u_ier;
-
-    u_ier.reg_data = readl(&i2s[device_num]->ier);
-    u_ier.ier.ien = enable;
-    writel(u_ier.reg_data, &i2s[device_num]->ier);
-}
-
-static void i2s_disable_block(i2s_device_number_t device_num, i2s_transmit_t rxtx_mode)
-{
-    irer_t u_irer;
-    iter_t u_iter;
-
-    if (rxtx_mode == I2S_RECEIVER)
-    {
-        u_irer.reg_data = readl(&i2s[device_num]->irer);
-        u_irer.irer.rxen = 0;
-        writel(u_irer.reg_data, &i2s[device_num]->irer);
-        /* Receiver block disable */
-    }
-    else
-    {
-        u_iter.reg_data = readl(&i2s[device_num]->iter);
-        u_iter.iter.txen = 0;
-        writel(u_iter.reg_data, &i2s[device_num]->iter);
-        /* Transmitter block disable */
-    }
-}
-
-static int i2s_set_rx_word_length(i2s_device_number_t device_num,
-               i2s_word_length_t word_length,
-               i2s_channel_num_t channel_num)
-{
-    rcr_tcr_t u_rcr;
-
-    if (word_length > RESOLUTION_32_BIT || word_length < IGNORE_WORD_LENGTH)
-        return -1;
-    if (channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
-        return -1;
-
-    u_rcr.reg_data = readl(&i2s[device_num]->channel[channel_num].rcr);
-    u_rcr.rcr_tcr.wlen = word_length;
-    writel(u_rcr.reg_data, &i2s[device_num]->channel[channel_num].rcr);
-    return 0;
-}
-
-static int i2s_set_tx_word_length(i2s_device_number_t device_num,
-               i2s_word_length_t word_length,
-               i2s_channel_num_t channel_num)
-{
-    rcr_tcr_t u_tcr;
-
-    if (word_length > RESOLUTION_32_BIT || word_length < IGNORE_WORD_LENGTH)
-        return -1;
-    if (channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
-        return -1;
-
-    u_tcr.reg_data = readl(&i2s[device_num]->channel[channel_num].tcr);
-    u_tcr.rcr_tcr.wlen = word_length;
-    writel(u_tcr.reg_data, &i2s[device_num]->channel[channel_num].tcr);
-    return 0;
-}
-
-static void i2s_master_configure(i2s_device_number_t device_num,
-                          i2s_word_select_cycles_t word_select_size,
-                          i2s_sclk_gating_cycles_t gating_cycles,
-                          i2s_work_mode_t word_mode)
-{
-    ASSERT(!(word_select_size < SCLK_CYCLES_16 ||
-                 word_select_size > SCLK_CYCLES_32));
-    ASSERT(!(gating_cycles < NO_CLOCK_GATING ||
-                  gating_cycles > CLOCK_CYCLES_24));
-
-    ccr_t u_ccr;
-    cer_t u_cer;
-
-    u_ccr.reg_data = readl(&i2s[device_num]->ccr);
-    u_ccr.ccr.clk_word_size = word_select_size;
-    u_ccr.ccr.clk_gate = gating_cycles;
-    u_ccr.ccr.align_mode = word_mode;
-    writel(u_ccr.reg_data, &i2s[device_num]->ccr);
-
-    u_cer.reg_data = readl(&i2s[device_num]->cer);
-    u_cer.cer.clken = 1;
-    writel(u_cer.reg_data, &i2s[device_num]->cer);
-    /* Clock generation enable */
-
-}
-
-static int i2s_set_rx_threshold(i2s_device_number_t device_num,
-             i2s_fifo_threshold_t threshold,
-             i2s_channel_num_t channel_num)
-{
-    rfcr_t u_rfcr;
-
-    if (threshold < TRIGGER_LEVEL_1 || threshold > TRIGGER_LEVEL_16)
-        return -1;
-    if (channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
-        return -1;
-
-    u_rfcr.reg_data = readl(&i2s[device_num]->channel[channel_num].rfcr);
-    u_rfcr.rfcr.rxchdt = threshold;
-    writel(u_rfcr.reg_data, &i2s[device_num]->channel[channel_num].rfcr);
-
-    return 0;
-}
-
-static int i2s_set_tx_threshold(i2s_device_number_t device_num,
-             i2s_fifo_threshold_t threshold,
-             i2s_channel_num_t channel_num)
-{
-    tfcr_t u_tfcr;
-
-    if (threshold < TRIGGER_LEVEL_1 || threshold > TRIGGER_LEVEL_16)
-        return -1;
-    if (channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
-        return -1;
-
-    u_tfcr.reg_data = readl(&i2s[device_num]->channel[channel_num].tfcr);
-    u_tfcr.tfcr.txchet = threshold;
-    writel(u_tfcr.reg_data, &i2s[device_num]->channel[channel_num].tfcr);
-    return 0;
-}
-
-static int i2s_set_mask_interrupt(i2s_device_number_t device_num,
-               i2s_channel_num_t channel_num,
-               uint32_t rx_available_int, uint32_t rx_overrun_int,
-               uint32_t tx_empty_int, uint32_t tx_overrun_int)
-{
-    imr_t u_imr;
-
-    if (channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
-        return -1;
-    u_imr.reg_data = readl(&i2s[device_num]->channel[channel_num].imr);
-
-    if (rx_available_int == 1)
-        u_imr.imr.rxdam = 1;
-    else
-        u_imr.imr.rxdam = 0;
-    if (rx_overrun_int == 1)
-        u_imr.imr.rxfom = 1;
-    else
-        u_imr.imr.rxfom = 0;
-
-    if (tx_empty_int == 1)
-        u_imr.imr.txfem = 1;
-    else
-        u_imr.imr.txfem = 0;
-    if (tx_overrun_int == 1)
-        u_imr.imr.txfom = 1;
-    else
-        u_imr.imr.txfom = 0;
-    writel(u_imr.reg_data, &i2s[device_num]->channel[channel_num].imr);
-    return 0;
-}
-
-static int i2s_transmit_dma_enable(i2s_device_number_t device_num, uint32_t enable)
-{
-    ccr_t u_ccr;
-
-    if (device_num >= I2S_DEVICE_MAX)
-        return -1;
-
-    u_ccr.reg_data = readl(&i2s[device_num]->ccr);
-    u_ccr.ccr.dma_tx_en = enable;
-    writel(u_ccr.reg_data, &i2s[device_num]->ccr);
-
-    return 0;
-}
-
-static int i2s_receive_dma_enable(i2s_device_number_t device_num, uint32_t enable)
-{
-    ccr_t u_ccr;
-
-    if (device_num >= I2S_DEVICE_MAX)
-        return -1;
-
-    u_ccr.reg_data = readl(&i2s[device_num]->ccr);
-    u_ccr.ccr.dma_rx_en = enable;
-    writel(u_ccr.reg_data, &i2s[device_num]->ccr);
-
-    return 0;
-}
-
-int i2s_set_dma_divide_16(i2s_device_number_t device_num, uint32_t enable)
-{
-    ccr_t u_ccr;
-
-    if (device_num >= I2S_DEVICE_MAX)
-        return -1;
-
-    u_ccr.reg_data = readl(&i2s[device_num]->ccr);
-    u_ccr.ccr.dma_divide_16 = enable;
-    writel(u_ccr.reg_data, &i2s[device_num]->ccr);
-
-    return 0;
-}
-
-int i2s_get_dma_divide_16(i2s_device_number_t device_num)
-{
-    if (device_num >= I2S_DEVICE_MAX)
-        return -1;
-    ccr_t u_ccr;
-    u_ccr.reg_data = readl(&i2s[device_num]->ccr);
-    return u_ccr.ccr.dma_divide_16;
-}
-
-int i2s_receive_data(i2s_device_number_t device_num, i2s_channel_num_t channel_num, uint64_t *buf, size_t buf_len)
-{
-    uint32_t i = 0;
-    isr_t u_isr;
-
-    readl(&i2s[device_num]->channel[channel_num].ror);
-    /*clear over run*/
-
-    for (i = 0; i < buf_len;)
-    {
-        u_isr.reg_data = readl(&i2s[device_num]->channel[channel_num].isr);
-        if (u_isr.isr.rxda == 1)
-        {
-            buf[i] = readl(&i2s[device_num]->channel[channel_num].left_rxtx);
-            buf[i] <<= 32;
-            buf[i++] |= readl(&i2s[device_num]->channel[channel_num].right_rxtx);
-        }
-    }
-    return 0;
-}
-
-void i2s_receive_data_dma(i2s_device_number_t device_num, uint32_t *buf,
-                          size_t buf_len, dmac_channel_number_t channel_num)
-{
-    dmac_wait_idle(channel_num);
-    sysctl_dma_select((sysctl_dma_channel_t)channel_num, SYSCTL_DMA_SELECT_I2S0_RX_REQ + device_num * 2);
-    dmac_set_single_mode(channel_num, (void *)(&i2s[device_num]->rxdma), buf, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
-                          DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, buf_len);
-}
-
-int i2s_rx_to_tx(i2s_device_number_t device_src_num, i2s_device_number_t device_dest_num,
-    size_t buf_len, dmac_channel_number_t channel_num)
-{
-    static uint8_t dmac_recv_flag[6] = {0,0,0,0,0,0};
-    if(dmac_recv_flag[channel_num])
-        dmac_wait_done(channel_num);
-    else
-        dmac_recv_flag[channel_num] = 1;
-    sysctl_dma_select((sysctl_dma_channel_t)channel_num, SYSCTL_DMA_SELECT_I2S0_RX_REQ + device_src_num * 2);
-    dmac_set_single_mode(channel_num, (void *)(&i2s[device_src_num]->rxdma), (void *)(&i2s[device_dest_num]->txdma), DMAC_ADDR_NOCHANGE, DMAC_ADDR_NOCHANGE,
-                          DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, buf_len);
-    return 0;
-}
-
-int i2s_send_data(i2s_device_number_t device_num, i2s_channel_num_t channel_num, const uint8_t *pcm, size_t buf_len,
-                  size_t single_length)
-{
-    isr_t u_isr;
-    uint32_t left_buffer = 0;
-    uint32_t right_buffer = 0;
-    uint32_t i = 0;
-    uint32_t j = 0;
-    if (channel_num < I2S_CHANNEL_0 || channel_num > I2S_CHANNEL_3)
-        return -1;
-
-    buf_len = buf_len / (single_length / 8) / 2; /* sample num */
-    readl(&i2s[device_num]->channel[channel_num].tor);
-    /* read clear overrun flag */
-
-    for (j = 0; j < buf_len;)
-    {
-        u_isr.reg_data = readl(&i2s[device_num]->channel[channel_num].isr);
-        if (u_isr.isr.txfe == 1)
-        {
-            switch(single_length)
-            {
-                case 16:
-                    left_buffer = ((uint16_t *)pcm)[i++];
-                    right_buffer = ((uint16_t *)pcm)[i++];
-                    break;
-                case 24:
-                    left_buffer = 0;
-                    left_buffer |= pcm[i++];
-                    left_buffer |= pcm[i++] << 8;
-                    left_buffer |= pcm[i++] << 16;
-                    right_buffer = 0;
-                    right_buffer |= pcm[i++];
-                    right_buffer |= pcm[i++] << 8;
-                    right_buffer |= pcm[i++] << 16;
-                    break;
-                case 32:
-                    left_buffer = ((uint32_t *)pcm)[i++];
-                    right_buffer = ((uint32_t *)pcm)[i++];
-                    break;
-                default:
-                    left_buffer = pcm[i++];
-                    right_buffer = pcm[i++];
-                    break;
-            }
-            writel(left_buffer, &i2s[device_num]->channel[channel_num].left_rxtx);
-            writel(right_buffer, &i2s[device_num]->channel[channel_num].right_rxtx);
-            j++;
-        }
-    }
-    return 0;
-}
-
-void i2s_send_data_dma(i2s_device_number_t device_num, const void *buf, size_t buf_len, dmac_channel_number_t channel_num)
-{
-
-    dmac_wait_idle(channel_num);
-    sysctl_dma_select((sysctl_dma_channel_t)channel_num, SYSCTL_DMA_SELECT_I2S0_TX_REQ + device_num * 2);
-    dmac_set_single_mode(channel_num, buf, (void *)(&i2s[device_num]->txdma), DMAC_ADDR_INCREMENT,
-                         DMAC_ADDR_NOCHANGE, DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, buf_len);
-}
-
-static void i2s_parse_voice(i2s_device_number_t device_num, uint32_t *buf, const uint8_t *pcm, size_t length,  size_t bits_per_sample,
-    uint8_t track_num, size_t *send_len)
-{
-    uint32_t i,j=0;
-    *send_len = length * 2;
-    switch(bits_per_sample)
-    {
-        case 16:
-            for(i = 0; i < length; i++)
-            {
-                buf[2*i] = ((uint16_t *)pcm)[i];
-                buf[2*i+1] = 0;
-            }
-            break;
-        case 24:
-            for(i = 0; i < length; i++)
-            {
-                buf[2*i] = 0;
-                buf[2*i] |= pcm[j++];
-                buf[2*i] |= pcm[j++] << 8;
-                buf[2*i] |= pcm[j++] << 16;
-                buf[2*i+1] = 0;
-                if(track_num == 2)
-                {
-                    buf[2*i+1] |= pcm[j++];
-                    buf[2*i+1] |= pcm[j++] << 8;
-                    buf[2*i+1] |= pcm[j++] << 16;
-                }
-            }
-            break;
-        case 32:
-        default:
-            for(i = 0; i < length; i++)
-            {
-                buf[2*i] = ((uint32_t *)pcm)[i];
-                buf[2*i+1] = 0;
-            }
-            break;
-    }
-}
-
-
-void i2s_play(i2s_device_number_t device_num, dmac_channel_number_t channel_num,
-              const uint8_t *buf, size_t buf_len, size_t frame, size_t bits_per_sample, uint8_t track_num)
-{
-    const uint8_t *trans_buf;
-    uint32_t i;
-    size_t sample_cnt = buf_len / ( bits_per_sample / 8 ) / track_num;
-    size_t frame_cnt = sample_cnt / frame;
-    size_t frame_remain = sample_cnt % frame;
-    i2s_set_dma_divide_16(device_num, 0);
-
-    if (bits_per_sample == 16 && track_num == 2)
-    {
-        i2s_set_dma_divide_16(device_num, 1);
-        for (i = 0; i < frame_cnt; i++)
-        {
-            trans_buf = buf + i * frame * (bits_per_sample / 8) * track_num;
-            i2s_send_data_dma(device_num,trans_buf, frame, channel_num);
-        }
-        if(frame_remain)
-        {
-            trans_buf = buf + frame_cnt * frame * (bits_per_sample / 8) * track_num;
-            i2s_send_data_dma(device_num, trans_buf, frame_remain, channel_num);
-        }
-    }
-    else if (bits_per_sample == 32 && track_num == 2)
-    {
-        for (i = 0; i < frame_cnt; i++)
-        {
-            trans_buf = buf + i * frame * (bits_per_sample / 8) * track_num;
-            i2s_send_data_dma(device_num,trans_buf, frame * 2, channel_num);
-        }
-        if(frame_remain)
-        {
-            trans_buf = buf + frame_cnt * frame * (bits_per_sample / 8) * track_num;
-            i2s_send_data_dma(device_num, trans_buf, frame_remain * 2, channel_num);
-        }
-    }
-    else
-    {
-        uint32_t *buff[2];
-        buff[0] = malloc(frame * 2 * sizeof(uint32_t) * 2);
-        buff[1] = buff[0] + frame * 2;
-        uint8_t flag = 0;
-        size_t send_len = 0;
-        for (i = 0; i < frame_cnt; i++)
-        {
-            trans_buf = buf + i * frame * (bits_per_sample / 8) * track_num;
-            i2s_parse_voice(device_num, buff[flag], trans_buf, frame, bits_per_sample, track_num, &send_len);
-            i2s_send_data_dma(device_num,buff[flag], send_len, channel_num);
-            flag = !flag;
-        }
-        if (frame_remain)
-        {
-            trans_buf = buf + frame_cnt * frame * (bits_per_sample / 8) * track_num;
-            i2s_parse_voice(device_num, buff[flag], trans_buf, frame_remain, bits_per_sample, track_num, &send_len);
-            i2s_send_data_dma(device_num, trans_buf, send_len, channel_num);
-        }
-        free(buff[0]);
-    }
-}
-
-static inline void i2s_set_sign_expand_en(i2s_device_number_t device_num, uint32_t enable)
-{
-    ccr_t u_ccr;
-    u_ccr.reg_data = readl(&i2s[device_num]->ccr);
-    u_ccr.ccr.sign_expand_en = enable;
-    writel(u_ccr.reg_data, &i2s[device_num]->ccr);
-}
-
-void i2s_rx_channel_config(i2s_device_number_t device_num,
-    i2s_channel_num_t channel_num,
-    i2s_word_length_t word_length,
-    i2s_word_select_cycles_t word_select_size,
-    i2s_fifo_threshold_t trigger_level,
-    i2s_work_mode_t word_mode)
-{
-    i2s_recv_channel_enable(device_num, channel_num, 0);
-    /* Receive channel disable */
-
-    writel(0, &i2s[device_num]->channel[channel_num].ter);
-    /* disable tx */
-
-    writel(1, &i2s[device_num]->channel[channel_num].rff);
-    /* flash individual fifo */
-
-    writel(1, &i2s[device_num]->rxffr);
-    /* flush tx fifo*/
-
-    i2s_set_rx_word_length(device_num, word_length, channel_num);
-    /* Word buf_len is RESOLUTION_32_BIT */
-
-    i2s_master_configure(device_num,
-        word_select_size, NO_CLOCK_GATING, word_mode);
-    /* word select size is 32 bits,no clock gating */
-
-    i2s_set_rx_threshold(device_num, trigger_level, channel_num);
-    /* Interrupt trigger when FIFO level is 8 */
-
-    readl(&i2s[device_num]->channel[channel_num].ror);
-    readl(&i2s[device_num]->channel[channel_num].tor);
-
-    i2s_recv_channel_enable(device_num, channel_num, 1);
-}
-
-void i2s_tx_channel_config(i2s_device_number_t device_num,
-    i2s_channel_num_t channel_num,
-    i2s_word_length_t word_length,
-    i2s_word_select_cycles_t word_select_size,
-    i2s_fifo_threshold_t trigger_level,
-    i2s_work_mode_t word_mode)
-{
-    writel(0, &i2s[device_num]->channel[channel_num].rer);
-    /* disable rx */
-
-    i2s_transmit_channel_enable(device_num, channel_num, 0);
-    /* Transmit channel disable */
-
-    writel(1, &i2s[device_num]->txffr);
-    /* flush tx fifo */
-    writel(1, &i2s[device_num]->channel[channel_num].tff);
-    /* flush individual fifo */
-
-    i2s_set_tx_word_length(device_num, word_length, channel_num);
-    /* Word buf_len is RESOLUTION_16_BIT */
-
-    i2s_master_configure(device_num, word_select_size, NO_CLOCK_GATING, word_mode);
-    /* word select size is 16 bits,gating after 16 bit */
-
-    i2s_set_tx_threshold(device_num, trigger_level, channel_num);
-    /* Interrupt trigger when FIFO level is 8 */
-
-    i2s_transmit_channel_enable(device_num, channel_num, 1);
-}
-
-void i2s_init(i2s_device_number_t device_num, i2s_transmit_t rxtx_mode, uint32_t channel_mask)
-{
-    sysctl_clock_enable(SYSCTL_CLOCK_I2S0 + device_num);
-    sysctl_reset(SYSCTL_RESET_I2S0  + device_num);
-    sysctl_clock_set_threshold(SYSCTL_THRESHOLD_I2S0  + device_num, 7);
-    /*96k:5,44k:12,24k:23,22k:25 16k:35 sampling*/
-    /*sample rate*32bit*2 =75MHz/((N+1)*2) */
-    i2s_set_enable(device_num, 1);
-    i2s_disable_block(device_num, I2S_TRANSMITTER);
-    i2s_disable_block(device_num, I2S_RECEIVER);
-
-    if (rxtx_mode == I2S_TRANSMITTER)
-    {
-        for (int i=0; i<4; i++)
-        {
-            if ((channel_mask & 0x3) == 0x3)
-            {
-                i2s_set_mask_interrupt(device_num, I2S_CHANNEL_0 + i, 1, 1, 1, 1);
-                i2s_transimit_enable(device_num, I2S_CHANNEL_0 + i);
-            }
-            else
-            {
-                i2s_transmit_channel_enable(device_num, I2S_CHANNEL_0 + i, 0);
-            }
-            channel_mask >>= 2;
-        }
-        i2s_transmit_dma_enable(device_num, 1);
-    }
-    else
-    {
-        for (int i=0; i<4; i++)
-        {
-            if ((channel_mask & 0x3) == 0x3)
-            {
-                i2s_set_mask_interrupt(device_num, I2S_CHANNEL_0 + i, 1, 1, 1, 1);
-                i2s_receive_enable(device_num, I2S_CHANNEL_0 + i);
-            }
-            else
-            {
-                i2s_recv_channel_enable(device_num, I2S_CHANNEL_0 + i, 0);
-            }
-            channel_mask >>= 2;
-        }
-        /* Set expand_en when receive */
-        i2s_set_sign_expand_en(device_num, 1);
-        i2s_receive_dma_enable(device_num, 1);
-    }
-}
-
-uint32_t i2s_set_sample_rate(i2s_device_number_t device_num, uint32_t sample_rate)
-{
-    ccr_t u_ccr;
-    uint32_t pll2_clock = 0;
-    pll2_clock = sysctl_pll_get_freq(SYSCTL_PLL2);
-
-    u_ccr.reg_data = readl(&i2s[device_num]->ccr);
-    /* 0x0 for 16sclk cycles, 0x1 for 24 sclk cycles 0x2 for 32 sclk */
-    uint32_t v_clk_word_size = (u_ccr.ccr.clk_word_size + 2) * 8;
-    uint32_t threshold = round(pll2_clock / (sample_rate * 2.0 * v_clk_word_size * 2.0) - 1);
-    sysctl_clock_set_threshold(SYSCTL_THRESHOLD_I2S0 + device_num, threshold);
-    return sysctl_clock_get_freq(SYSCTL_CLOCK_I2S0 + device_num);
-}
-
-int i2s_dmac_irq(void *ctx)
-{
-    i2s_instance_t *v_instance = (i2s_instance_t *)ctx;
-    dmac_irq_unregister(v_instance->dmac_channel);
-    if(v_instance->i2s_int_instance.callback)
-    {
-        v_instance->i2s_int_instance.callback(v_instance->i2s_int_instance.ctx);
-    }
-    return 0;
-}
-
-void i2s_handle_data_dma(i2s_device_number_t device_num, i2s_data_t data, plic_interrupt_t *cb)
-{
-    ASSERT(device_num < I2S_DEVICE_MAX);
-    if(data.transfer_mode == I2S_SEND)
-    {
-        ASSERT(data.tx_buf && data.tx_len);
-        if(!data.nowait_dma_idle)
-        {
-            dmac_wait_idle(data.tx_channel);
-        }
-        if(cb)
-        {
-            g_i2s_send_instance[device_num].i2s_int_instance.callback = cb->callback;
-            g_i2s_send_instance[device_num].i2s_int_instance.ctx = cb->ctx;
-            g_i2s_send_instance[device_num].dmac_channel = data.tx_channel;
-            g_i2s_send_instance[device_num].transfer_mode = I2S_SEND;
-            dmac_irq_register(data.tx_channel, i2s_dmac_irq, &g_i2s_send_instance[device_num], cb->priority);
-        }
-        sysctl_dma_select((sysctl_dma_channel_t)data.tx_channel, SYSCTL_DMA_SELECT_I2S0_TX_REQ + device_num * 2);
-        dmac_set_single_mode(data.tx_channel, data.tx_buf, (void *)(&i2s[device_num]->txdma), DMAC_ADDR_INCREMENT,
-                             DMAC_ADDR_NOCHANGE, DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, data.tx_len);
-        if(!cb && data.wait_dma_done)
-        {
-            dmac_wait_done(data.tx_channel);
-        }
-    }
-    else
-    {
-        ASSERT(data.rx_buf && data.rx_len);
-        if(!data.nowait_dma_idle)
-        {
-            dmac_wait_idle(data.rx_channel);
-        }
-        if(cb)
-        {
-            g_i2s_recv_instance[device_num].i2s_int_instance.callback = cb->callback;
-            g_i2s_recv_instance[device_num].i2s_int_instance.ctx = cb->ctx;
-            g_i2s_recv_instance[device_num].dmac_channel = data.rx_channel;
-            g_i2s_recv_instance[device_num].transfer_mode = I2S_RECEIVE;
-            dmac_irq_register(data.rx_channel, i2s_dmac_irq, &g_i2s_recv_instance[device_num], cb->priority);
-        }
-        sysctl_dma_select((sysctl_dma_channel_t)data.rx_channel, SYSCTL_DMA_SELECT_I2S0_RX_REQ + device_num * 2);
-        dmac_set_single_mode(data.rx_channel, (void *)(&i2s[device_num]->rxdma), data.rx_buf, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
-                              DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, data.rx_len);
-        if(!cb && data.wait_dma_done)
-        {
-            dmac_wait_done(data.rx_channel);
-        }
-    }
-}
-
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/i2s.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/i2s.h
deleted file mode 100644
index e2d4d50bf..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/i2s.h
+++ /dev/null
@@ -1,793 +0,0 @@
-/* Copyright 2018 Canaan Inc.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
-* @file i2s.h
-* @brief kendryte k210 source code
-*                https://github.com/kendryte/kendryte-standalone-sdk.git
-* @version 1.0
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
-
-#ifndef _DRIVER_I2S_H
-#define _DRIVER_I2S_H
-
-#include <stdint.h>
-#include <stddef.h>
-#include "platform.h"
-#include "io.h"
-#include "dmac.h"
-#include "bsp.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-
-#define I2S0_IN_D0  90
-#define I2S0_SCLK   88
-#define I2S0_WS    89
-
-typedef enum _i2s_device_number
-{
-    I2S_DEVICE_0 = 0,
-    I2S_DEVICE_1 = 1,
-    I2S_DEVICE_2 = 2,
-    I2S_DEVICE_MAX
-} i2s_device_number_t;
-
-typedef enum _i2s_channel_num
-{
-    I2S_CHANNEL_0 = 0,
-    I2S_CHANNEL_1 = 1,
-    I2S_CHANNEL_2 = 2,
-    I2S_CHANNEL_3 = 3
-} i2s_channel_num_t;
-
-typedef enum _i2s_transmit
-{
-    I2S_TRANSMITTER = 0,
-    I2S_RECEIVER = 1
-} i2s_transmit_t;
-
-typedef enum _i2s_work_mode
-{
-    STANDARD_MODE = 1,
-    RIGHT_JUSTIFYING_MODE = 2,
-    LEFT_JUSTIFYING_MODE = 4
-} i2s_work_mode_t;
-
-typedef enum _sclk_gating_cycles
-{
-    /* Clock gating is diable */
-    NO_CLOCK_GATING = 0x0,
-    /* Gating after 12 sclk cycles */
-    CLOCK_CYCLES_12 = 0x1,
-    /* Gating after 16 sclk cycles */
-    CLOCK_CYCLES_16 = 0x2,
-    /* Gating after 20 sclk cycles */
-    CLOCK_CYCLES_20 = 0x3,
-    /* Gating after 24 sclk cycles */
-    CLOCK_CYCLES_24 = 0x4
-} i2s_sclk_gating_cycles_t;
-
-typedef enum _word_select_cycles
-{
-    /* 16 sclk cycles */
-    SCLK_CYCLES_16 = 0x0,
-    /* 24 sclk cycles */
-    SCLK_CYCLES_24 = 0x1,
-    /* 32 sclk cycles */
-    SCLK_CYCLES_32 = 0x2
-} i2s_word_select_cycles_t;
-
-typedef enum _word_length
-{
-    /* Ignore the word length */
-    IGNORE_WORD_LENGTH = 0x0,
-    /* 12-bit data resolution of the receiver */
-    RESOLUTION_12_BIT = 0x1,
-    /* 16-bit data resolution of the receiver */
-    RESOLUTION_16_BIT = 0x2,
-    /* 20-bit data resolution of the receiver */
-    RESOLUTION_20_BIT = 0x3,
-    /* 24-bit data resolution of the receiver */
-    RESOLUTION_24_BIT = 0x4,
-    /* 32-bit data resolution of the receiver */
-    RESOLUTION_32_BIT = 0x5
-} i2s_word_length_t;
-
-typedef enum _fifo_threshold
-{
-    /* Interrupt trigger when FIFO level is 1 */
-    TRIGGER_LEVEL_1 = 0x0,
-    /* Interrupt trigger when FIFO level is 2 */
-    TRIGGER_LEVEL_2 = 0x1,
-    /* Interrupt trigger when FIFO level is 3 */
-    TRIGGER_LEVEL_3 = 0x2,
-    /* Interrupt trigger when FIFO level is 4 */
-    TRIGGER_LEVEL_4 = 0x3,
-    /* Interrupt trigger when FIFO level is 5 */
-    TRIGGER_LEVEL_5 = 0x4,
-    /* Interrupt trigger when FIFO level is 6 */
-    TRIGGER_LEVEL_6 = 0x5,
-    /* Interrupt trigger when FIFO level is 7 */
-    TRIGGER_LEVEL_7 = 0x6,
-    /* Interrupt trigger when FIFO level is 8 */
-    TRIGGER_LEVEL_8 = 0x7,
-    /* Interrupt trigger when FIFO level is 9 */
-    TRIGGER_LEVEL_9 = 0x8,
-    /* Interrupt trigger when FIFO level is 10 */
-    TRIGGER_LEVEL_10 = 0x9,
-    /* Interrupt trigger when FIFO level is 11 */
-    TRIGGER_LEVEL_11 = 0xa,
-    /* Interrupt trigger when FIFO level is 12 */
-    TRIGGER_LEVEL_12 = 0xb,
-    /* Interrupt trigger when FIFO level is 13 */
-    TRIGGER_LEVEL_13 = 0xc,
-    /* Interrupt trigger when FIFO level is 14 */
-    TRIGGER_LEVEL_14 = 0xd,
-    /* Interrupt trigger when FIFO level is 15 */
-    TRIGGER_LEVEL_15 = 0xe,
-    /* Interrupt trigger when FIFO level is 16 */
-    TRIGGER_LEVEL_16 = 0xf
-} i2s_fifo_threshold_t;
-
-
-typedef struct _i2s_ier
-{
-    /* Bit 0 is ien, 0 for disable i2s and 1 for enable i2s */
-    uint32_t ien : 1;
-    /* Bits [31:1] is reserved */
-    uint32_t resv : 31;
-} __attribute__((packed, aligned(4))) i2s_ier_t;
-
-typedef union _ier_u
-{
-    i2s_ier_t ier;
-    uint32_t reg_data;
-} ier_t;
-
-typedef struct _i2s_irer
-{
-    /* Bit 0 is receiver block  enable,
-     * 0 for receiver disable
-     * 1 for receiver enable
-     */
-    uint32_t rxen : 1;
-    /* Bits [31:1] is reserved */
-    uint32_t resv : 31;
-} __attribute__((packed, aligned(4))) i2s_irer_t;
-
-typedef union _irer_u
-{
-    i2s_irer_t irer;
-    uint32_t reg_data;
-} irer_t;
-
-typedef struct _i2s_iter
-{
-    uint32_t txen : 1;
-    /* Bit 0 is transmitter block  enable,
-     * 0 for transmitter disable
-     * 1 for transmitter enable
-     */
-    uint32_t resv : 31;
-    /* Bits [31:1] is reserved */
-} __attribute__((packed, aligned(4))) i2s_iter_t;
-
-typedef union _iter_u
-{
-    i2s_iter_t iter;
-    uint32_t reg_data;
-} iter_t;
-
-typedef struct _i2s_cer
-{
-    uint32_t clken : 1;
-    /* Bit 0 is clock generation enable/disable,
-     * 0 for clock generation disable,
-     * 1 for clock generation enable
-     */
-    uint32_t resv : 31;
-    /* Bits [31:1] is reserved */
-} __attribute__((packed, aligned(4))) i2s_cer_t;
-
-typedef union _cer_u
-{
-    i2s_cer_t cer;
-    uint32_t reg_data;
-} cer_t;
-
-typedef struct _i2s_ccr
-{
-    /* Bits [2:0] is used to program  the gating of sclk,
-     * 0x0 for clock gating is diable,
-     * 0x1 for gating after 12 sclk cycles
-     * 0x2 for gating after 16 sclk cycles
-     * 0x3 for gating after 20 sclk cycles
-     * 0x4 for gating after 24 sclk cycles
-     */
-    uint32_t clk_gate : 3;
-    /* Bits [4:3] used program  the number of sclk cycles for which the
-     * word select line stayd in the left aligned or right aligned mode.
-     * 0x0 for 16sclk cycles, 0x1 for 24 sclk cycles 0x2 for 32 sclk
-     * cycles
-     */
-    uint32_t clk_word_size : 2;
-    /* Bit[5:7] is alignment mode setting.
-     * 0x1 for standard i2s format
-     * 0x2 for right aligned format
-     * 0x4 for left aligned format
-     */
-    uint32_t align_mode : 3;
-    /* Bit[8] is DMA transmit enable control */
-    uint32_t dma_tx_en : 1;
-    /* Bit[9] is DMA receive enable control */
-    uint32_t dma_rx_en : 1;
-    uint32_t dma_divide_16 : 1;
-    /* Bit[10] split 32bit data to two 16 bit data and filled in left
-     * and right channel. Used with dma_tx_en or dma_rx_en
-     */
-    uint32_t sign_expand_en : 1;
-    uint32_t resv : 20;
-    /* Bits [31:11] is reseved */
-} __attribute__((packed, aligned(4))) i2s_ccr_t;
-
-typedef union _ccr_u
-{
-    i2s_ccr_t ccr;
-    uint32_t reg_data;
-} ccr_t;
-
-typedef struct _i2s_rxffr
-{
-    uint32_t rxffr : 1;
-    /* Bit 0 is receiver FIFO reset,
-     * 0 for does not flush RX FIFO, 1 for flush RX FIFO
-     */
-    uint32_t resv : 31;
-    /* Bits [31:1] is reserved */
-} __attribute__((packed, aligned(4))) i2s_rxffr_t;
-
-typedef union _rxffr_u
-{
-    i2s_rxffr_t rxffr;
-    uint32_t reg_data;
-} rxffr_t;
-
-typedef struct _i2s_lrbrthr
-{
-    uint32_t fifo : 16;
-    /* Bits [15:0] if used data receive or transmit */
-    uint32_t resv : 16;
-} i2s_lrbrthr_t;
-
-typedef union _lrbthr_u
-{
-    i2s_lrbrthr_t buffer;
-    uint32_t reg_data;
-} lrbthr_t;
-
-typedef struct _i2s_rthr
-{
-    /* Bits  [15:0] is right stereo data transmitted serially
-     * from transmit channel input
-     */
-    uint32_t rthrx : 16;
-    /* Bits [31:16] is reserved */
-    uint32_t resv : 16;
-} __attribute__((packed, aligned(4))) i2s_rthr_t;
-
-typedef union _rthr_u
-{
-    i2s_rthr_t rthr;
-    uint32_t reg_data;
-} rthr_t;
-
-typedef struct _i2s_rer
-{
-    /* Bit 0 is receive channel enable/disable, 0 for receive channel disable,
-     *1 for receive channel enable
-     */
-    uint32_t rxchenx : 1;
-    /* Bits [31:1] is reseved */
-    uint32_t resv : 31;
-} __attribute__((packed, aligned(4))) i2s_rer_t;
-
-typedef union _rer_u
-{
-    i2s_rer_t rer;
-    uint32_t reg_data;
-} rer_t;
-
-typedef struct _i2s_ter
-{
-    /* Bit 0 is transmit channel enable/disable, 0 for transmit channel disable,
-     * 1 for transmit channel enable
-     */
-    uint32_t txchenx : 1;
-    /* Bits [31:1] is reseved */
-    uint32_t resv : 31;
-} __attribute__((packed, aligned(4))) i2s_ter_t;
-
-typedef union _ter_u
-{
-    i2s_ter_t ter;
-    uint32_t reg_data;
-} ter_t;
-
-typedef struct _i2s_rcr_tcr
-{
-    /* Bits [2:0] is used to program desired data resolution of
-     * receiver/transmitter,
-     * 0x0 for ignore the word length
-     * 0x1 for 12-bit data resolution of the receiver/transmitter,
-     * 0x2 for 16-bit data resolution of the receiver/transmitter,
-     * 0x3 for 20-bit data resolution of the receiver/transmitter,
-     * 0x4 for 24-bit data resolution of the receiver/transmitter,
-     * 0x5 for 32-bit data resolution of the receiver/transmitter
-     */
-    uint32_t wlen : 3;
-    /* Bits [31:3] is reseved */
-    uint32_t resv : 29;
-} __attribute__((packed, aligned(4))) i2s_rcr_tcr_t;
-
-typedef union _rcr_tcr_u {
-    i2s_rcr_tcr_t rcr_tcr;
-    uint32_t reg_data;
-} rcr_tcr_t;
-
-typedef struct _i2s_isr
-{
-    /* Bit 0 is status of receiver data avaliable interrupt
-     * 0x0 for RX FIFO trigger level not reached
-     * 0x1 for RX FIFO trigger level is reached
-     */
-    uint32_t rxda : 1;
-    /* Bit 1 is status of data overrun interrupt for rx channel
-     * 0x0 for RX FIFO write valid
-     * 0x1 for RX FIFO write overrun
-     */
-    uint32_t rxfo : 1;
-    /* Bits [3:2] is reserved */
-    uint32_t resv1 : 2;
-    /* Bit 4 is status of transmit empty triger interrupt
-     * 0x0 for TX FIFO triiger level is reach
-     * 0x1 for TX FIFO trigger level is not reached
-     */
-    uint32_t txfe : 1;
-    /* BIt 5 is status of data overrun interrupt for the TX channel
-     * 0x0 for TX FIFO write valid
-     * 0x1 for TX FIFO write overrun
-     */
-    uint32_t txfo : 1;
-    /* BIts [31:6] is reserved */
-    uint32_t resv2 : 26;
-} __attribute__((packed, aligned(4))) i2s_isr_t;
-
-typedef union _isr_u
-{
-    i2s_isr_t isr;
-    uint32_t reg_data;
-} isr_t;
-
-typedef struct _i2s_imr
-{
-    /* Bit 0 is mask RX FIFO data available interrupt
-     * 0x0 for unmask RX FIFO data available interrupt
-     * 0x1 for mask  RX FIFO data available interrupt
-     */
-    uint32_t rxdam : 1;
-    /* Bit 1 is mask RX FIFO overrun interrupt
-     * 0x0 for unmask RX FIFO overrun interrupt
-     * 0x1 for mask RX FIFO  overrun interrupt
-     */
-    uint32_t rxfom : 1;
-    /* Bits [3:2] is reserved */
-    uint32_t resv1 : 2;
-    /* Bit 4 is mask TX FIFO empty interrupt,
-     * 0x0 for unmask TX FIFO empty interrupt,
-     * 0x1 for mask TX FIFO empty interrupt
-     */
-    uint32_t txfem : 1;
-    /* BIt 5 is mask TX FIFO overrun interrupt
-     * 0x0 for mask TX FIFO overrun interrupt
-     * 0x1 for unmash TX FIFO overrun interrupt
-     */
-    uint32_t txfom : 1;
-    /* Bits [31:6] is reserved */
-    uint32_t resv2 : 26;
-} __attribute__((packed, aligned(4))) i2s_imr_t;
-
-typedef union _imr_u
-{
-    i2s_imr_t imr;
-    uint32_t reg_data;
-} imr_t;
-
-typedef struct _i2s_ror
-{
-    /* Bit 0 is read this bit to clear RX FIFO data overrun interrupt
-     * 0x0 for RX FIFO write valid,
-     *0x1 for RX FIFO write overrun
-     */
-    uint32_t rxcho : 1;
-    /* Bits [31:1] is reserved */
-    uint32_t resv : 31;
-} __attribute__((packed, aligned(4))) i2s_ror_t;
-
-typedef union _ror_u
-{
-    i2s_ror_t ror;
-    uint32_t reg_data;
-} ror_t;
-
-typedef struct _i2s_tor
-{
-    /* Bit 0 is read this bit to clear TX FIFO data overrun interrupt
-     * 0x0 for TX FIFO write valid,
-     *0x1 for TX FIFO write overrun
-     */
-    uint32_t txcho : 1;
-    /* Bits [31:1] is reserved */
-    uint32_t resv : 31;
-} __attribute__((packed, aligned(4))) i2s_tor_t;
-
-typedef union _tor_u
-{
-    i2s_tor_t tor;
-    uint32_t reg_data;
-} tor_t;
-
-typedef struct _i2s_rfcr
-{
-    /* Bits [3:0] is used program the trigger level in the RX FIFO at
-     * which the receiver data available interrupt generate,
-     * 0x0 for interrupt trigger when FIFO level is 1,
-     * 0x2 for interrupt trigger when FIFO level is 2,
-     * 0x3 for interrupt trigger when FIFO level is 4,
-     * 0x4 for interrupt trigger when FIFO level is 5,
-     * 0x5 for interrupt trigger when FIFO level is 6,
-     * 0x6 for interrupt trigger when FIFO level is 7,
-     * 0x7 for interrupt trigger when FIFO level is 8,
-     * 0x8 for interrupt trigger when FIFO level is 9,
-     * 0x9 for interrupt trigger when FIFO level is 10,
-     * 0xa for interrupt trigger when FIFO level is 11,
-     * 0xb for interrupt trigger when FIFO level is 12,
-     * 0xc for interrupt trigger when FIFO level is 13,
-     * 0xd for interrupt trigger when FIFO level is 14,
-     * 0xe for interrupt trigger when FIFO level is 15,
-     * 0xf for interrupt trigger when FIFO level is 16
-     */
-    uint32_t rxchdt : 4;
-    /* Bits [31:4] is reserved */
-    uint32_t rsvd_rfcrx : 28;
-} __attribute__((packed, aligned(4))) i2s_rfcr_t;
-
-typedef union _rfcr_u
-{
-    i2s_rfcr_t rfcr;
-    uint32_t reg_data;
-} rfcr_t;
-
-typedef struct _i2s_tfcr
-{
-    /* Bits [3:0] is used program the trigger level in the TX FIFO at
-     * which the receiver data available interrupt generate,
-     * 0x0 for interrupt trigger when FIFO level is 1,
-     * 0x2 for interrupt trigger when FIFO level is 2,
-     * 0x3 for interrupt trigger when FIFO level is 4,
-     * 0x4 for interrupt trigger when FIFO level is 5,
-     * 0x5 for interrupt trigger when FIFO level is 6,
-     * 0x6 for interrupt trigger when FIFO level is 7,
-     * 0x7 for interrupt trigger when FIFO level is 8,
-     * 0x8 for interrupt trigger when FIFO level is 9,
-     * 0x9 for interrupt trigger when FIFO level is 10,
-     * 0xa for interrupt trigger when FIFO level is 11,
-     * 0xb for interrupt trigger when FIFO level is 12,
-     * 0xc for interrupt trigger when FIFO level is 13,
-     * 0xd for interrupt trigger when FIFO level is 14,
-     * 0xe for interrupt trigger when FIFO level is 15,
-     * 0xf for interrupt trigger when FIFO level is 16
-     */
-    uint32_t txchet : 4;
-    /* Bits [31:4] is reserved */
-    uint32_t rsvd_tfcrx : 28;
-} __attribute__((packed, aligned(4))) i2s_tfcr_t;
-
-typedef union _tfcr_u
-{
-    i2s_tfcr_t tfcr;
-    uint32_t reg_data;
-} tfcr_t;
-
-typedef struct _i2s_rff
-{
-    /* Bit  0 is receiver channel FIFO reset,
-     * 0x0 for does not flush an individual RX FIFO,
-     * 0x1 for flush an indiviadual RX FIFO
-     */
-    uint32_t rxchfr : 1;
-    /*< Bits [31:1] is reserved ,write only */
-    uint32_t rsvd_rffx : 31;
-} __attribute__((packed, aligned(4))) i2s_rff_t;
-
-typedef union _rff_u
-{
-    i2s_rff_t rff;
-    uint32_t reg_data;
-} rff_t;
-
-typedef struct _i2s_tff
-{
-    /* Bit  0 is transmit channel FIFO reset,
-     * 0x0 for does not flush an individual TX FIFO,
-     * 0x1 for flush an indiviadual TX FIFO
-     */
-    uint32_t rtxchfr : 1;
-    /*< Bits [31:1] is reserved ,write only */
-    uint32_t rsvd_rffx : 31;
-} __attribute__((packed, aligned(4))) i2s_tff_t;
-
-typedef union tff_u
-{
-    i2s_tff_t tff;
-    uint32_t reg_data;
-} tff_t;
-
-typedef struct _i2s_channel
-{
-    /* Left  Receive or Left Transmit Register      (0x20) */
-    volatile uint32_t left_rxtx;
-    /* Right Receive or Right Transmit Register     (0x24) */
-    volatile uint32_t right_rxtx;
-    /* Receive Enable Register                      (0x28) */
-    volatile uint32_t rer;
-    /* Transmit Enable Register                     (0x2c) */
-    volatile uint32_t ter;
-    /* Receive Configuration Register               (0x30) */
-    volatile uint32_t rcr;
-    /* Transmit Configuration Register              (0x34) */
-    volatile uint32_t tcr;
-    /* Interrupt Status Register                    (0x38) */
-    volatile uint32_t isr;
-    /* Interrupt Mask Register                      (0x3c) */
-    volatile uint32_t imr;
-    /* Receive Overrun Register                     (0x40) */
-    volatile uint32_t ror;
-    /* Transmit Overrun Register                    (0x44) */
-    volatile uint32_t tor;
-    /* Receive FIFO Configuration Register          (0x48) */
-    volatile uint32_t rfcr;
-    /* Transmit FIFO Configuration Register         (0x4c) */
-    volatile uint32_t tfcr;
-    /* Receive FIFO Flush Register                  (0x50) */
-    volatile uint32_t rff;
-    /* Transmit FIFO Flush Register                 (0x54) */
-    volatile uint32_t tff;
-    /* reserved                                (0x58-0x5c) */
-    volatile uint32_t reserved1[2];
-} __attribute__((packed, aligned(4))) i2s_channel_t;
-
-/****is* i2s.api/dw_i2s_portmap
- * NAME
- *  i2s_t
- * DESCRIPTION
- *  This is the structure used for accessing the i2s register
- *  portmap.
- * EXAMPLE
- *  struct i2s_t *portmap;
- *  portmap = (struct dw_i2s_portmap *) DW_APB_I2S_BASE;
- * SOURCE
- */
-typedef struct _i2s
-{
-    /* I2S Enable Register                          (0x00) */
-    volatile uint32_t ier;
-    /* I2S Receiver Block Enable Register           (0x04) */
-    volatile uint32_t irer;
-    /* I2S Transmitter Block Enable Register        (0x08) */
-    volatile uint32_t iter;
-    /* Clock Enable Register                        (0x0c) */
-    volatile uint32_t cer;
-    /* Clock Configuration Register                 (0x10) */
-    volatile uint32_t ccr;
-    /* Receiver Block FIFO Reset Register           (0x04) */
-    volatile uint32_t rxffr;
-    /* Transmitter Block FIFO Reset Register        (0x18) */
-    volatile uint32_t txffr;
-    /* reserved                                     (0x1c) */
-    volatile uint32_t reserved1;
-    volatile i2s_channel_t channel[4];
-    /* reserved                               (0x118-0x1bc) */
-    volatile uint32_t reserved2[40];
-    /*  Receiver Block DMA Register                 (0x1c0) */
-    volatile uint32_t rxdma;
-    /* Reset Receiver Block DMA Register            (0x1c4) */
-    volatile uint32_t rrxdma;
-    /* Transmitter Block DMA Register               (0x1c8) */
-    volatile uint32_t txdma;
-    /* Reset Transmitter Block DMA Register         (0x1cc) */
-    volatile uint32_t rtxdma;
-    /* reserved                               (0x1d0-0x1ec) */
-    volatile uint32_t reserved3[8];
-    /* Component Parameter Register 2               (0x1f0) */
-    volatile uint32_t i2s_comp_param_2;
-    /* Component Parameter Register 1               (0x1f4) */
-    volatile uint32_t i2s_comp_param_1;
-    /* I2S Component Version Register               (0x1f8) */
-    volatile uint32_t i2s_comp_version_1;
-    /* I2S Component Type Register                  (0x1fc) */
-    volatile uint32_t i2s_comp_type;
-} __attribute__((packed, aligned(4))) i2s_t;
-
-typedef enum _i2s_transfer_mode
-{
-    I2S_SEND,
-    I2S_RECEIVE,
-} i2s_transfer_mode_t;
-
-typedef struct _i2s_data_t
-{
-    dmac_channel_number_t tx_channel;
-    dmac_channel_number_t rx_channel;
-    uint32_t *tx_buf;
-    size_t tx_len;
-    uint32_t *rx_buf;
-    size_t rx_len;
-    i2s_transfer_mode_t transfer_mode;
-    bool nowait_dma_idle;
-    bool wait_dma_done;
-} i2s_data_t;
-
-/**
- * @brief      I2S object instance
- */
-extern volatile i2s_t *const i2s[3];
-
-/**
-* @brief       I2s init
-*
-* @param[in]   device_num          The device number
-* @param[in]   rxtx_mode           I2s work mode
-* @param[in]   channel_mask        Channel mask to which channel work
-*
-*/
-void i2s_init(i2s_device_number_t device_num, i2s_transmit_t rxtx_mode, uint32_t channel_mask);
-
-/**
- * @brief       Read pcm data from dma
- *
- * @param[in]   device_num      which of device
- * @param[in]   buf             save read data
- * @param[in]   buf_len          the length to read form i2s
- * @param[in]   channel_num     The dma channel number
- *
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-void i2s_receive_data_dma(i2s_device_number_t device_num, uint32_t *buf, size_t buf_len,
-                          dmac_channel_number_t channel_num);
-
-/**
- * @brief       Write pcm data to channel_num channel by dma, first wait dmac done
- *
- * @param[in]   device_num      which of device
- * @param[in]   pcm             Send data
- * @param[in]   buf_len          Send data length
- * @param[in]   channel_num     dmac channel
- *
- */
-void i2s_send_data_dma(i2s_device_number_t device_num, const void *buf, size_t buf_len, dmac_channel_number_t channel_num);
-
-/**
- * @brief       I2S receive channel configure
- *
- * @param[in]   device_num              The device number
- * @param[in]   channel_num             The channel number
- * @param[in]   word_length             The word length
- * @param[in]   word_select_size        The word select size
- * @param[in]   trigger_level           The trigger level
- */
-void i2s_rx_channel_config(i2s_device_number_t device_num,
-    i2s_channel_num_t channel_num,
-    i2s_word_length_t word_length,
-    i2s_word_select_cycles_t word_select_size,
-    i2s_fifo_threshold_t trigger_level,
-    i2s_work_mode_t word_mode);
-
-/**
- * @brief       I2S transmit channel  enable
- *
- * @param[in]   device_num              The device number
- * @param[in]   channel_num             The channel number
- * @param[in]   word_length             The word length
- * @param[in]   word_select_size        The word select size
- * @param[in]   trigger_level           The trigger level
- */
-void i2s_tx_channel_config(i2s_device_number_t device_num,
-    i2s_channel_num_t channel_num,
-    i2s_word_length_t word_length,
-    i2s_word_select_cycles_t word_select_size,
-    i2s_fifo_threshold_t trigger_level,
-    i2s_work_mode_t word_mode);
-
-/**
- * @brief       Play PCM format audio
- *
- * @param[in]   device_num              The device number
- * @param[in]   channel_num             The channel number
- * @param[in]   buf                     PCM data
- * @param[in]   buf_len                 PCM data length
- * @param[in]   frame                   Transmit amount once
- * @param[in]   bits_per_sample         Sample bit length
- * @param[in]   track_num               Track amount
- */
-void i2s_play(i2s_device_number_t device_num, dmac_channel_number_t channel_num,
-              const uint8_t *buf, size_t buf_len, size_t frame, size_t bits_per_sample, uint8_t track_num);
-
-/**
- * @brief       Play PCM format audio
- *
- * @param[in]   device_num              The device number
- * @param[in]   sample_rate             The Sample rate
- *
- *
- * @return      The real sample rate
- */
-uint32_t i2s_set_sample_rate(i2s_device_number_t device_num, uint32_t sample_rate);
-
-/**
- * @brief       Set dma_divide_16 split 32bit data to two 16 bit data and filled in left
-*               and right channel. Used with dma_tx_en or dma_rx_en
- *
- * @param[in]   device_num              The device number
- * @param[in]   enable                  The value of dma_divide_16 0:disable 1:enable
- *
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-int i2s_set_dma_divide_16(i2s_device_number_t device_num, uint32_t enable);
-
-/**
- * @brief       Get dma_divide_16.
- *
- * @param[in]   device_num              The device number
- *
- * @return      result
- *     - <0     Fail
- *     - other  value of dma_divide_16
- */
-int i2s_get_dma_divide_16(i2s_device_number_t device_num);
-
-/**
- * @brief       I2s handle transfer data operations
- *
- * @param[in]   device_num           I2s device number
- * @param[in]   data                 I2s data information
- * @param[in]   cb                   I2s dma callback
- *
- */
-void i2s_handle_data_dma(i2s_device_number_t device_num, i2s_data_t data, plic_interrupt_t *cb);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/interrupt.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/interrupt.c
deleted file mode 100644
index 095b86dd3..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/interrupt.c
+++ /dev/null
@@ -1,74 +0,0 @@
-/* Copyright 2018 Canaan Inc.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* Enable kernel-mode log API */
-
-/**
-* @file interrupt.c
-* @brief kendryte k210 source code
-*                https://github.com/kendryte/kendryte-standalone-sdk.git
-* @version 1.0
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
-
-#include <stdint.h>
-#include <stdlib.h>
-#include "interrupt.h"
-#include "encoding.h"
-#include "syscalls.h"
-
-uintptr_t __attribute__((weak))
-handle_irq_dummy(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintptr_t fregs[32])
-{
-    //dump_core("unhandled interrupt", cause, epc, regs, fregs);
-    sys_exit(1337);
-    return epc;
-}
-
-uintptr_t __attribute__((weak, alias("handle_irq_dummy")))
-handle_irq_m_soft(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintptr_t fregs[32]);
-
-uintptr_t __attribute__((weak, alias("handle_irq_dummy")))
-handle_irq_m_timer(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintptr_t fregs[32]);
-
-extern uintptr_t
-handle_irq_m_ext(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintptr_t fregs[32]);
-
-uintptr_t __attribute__((weak))
-handle_irq(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintptr_t fregs[32])
-{
-#if defined(__GNUC__)
-#pragma GCC diagnostic ignored "-Woverride-init"
-#endif
-    /* clang-format off */
-    static uintptr_t (* const irq_table[])(
-        uintptr_t cause,
-        uintptr_t epc,
-        uintptr_t regs[32],
-        uintptr_t fregs[32]) =
-    {
-        [0 ... 14]    = handle_irq_dummy,
-        [IRQ_M_SOFT]  = handle_irq_m_soft,
-        [IRQ_M_TIMER] = handle_irq_m_timer,
-        [IRQ_M_EXT]   = handle_irq_m_ext,
-    };
-    /* clang-format on */
-#if defined(__GNUC__)
-#pragma GCC diagnostic warning "-Woverride-init"
-#endif
-    return irq_table[cause & CAUSE_MACHINE_IRQ_REASON_MASK](cause, epc, regs, fregs);
-}
-
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/interrupt.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/interrupt.h
deleted file mode 100644
index c1c5284d4..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/interrupt.h
+++ /dev/null
@@ -1,56 +0,0 @@
-/* Copyright 2018 Canaan Inc.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
-* @file interrupt.h
-* @brief kendryte k210 source code
-*                https://github.com/kendryte/kendryte-standalone-sdk.git
-* @version 1.0
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
-
-#ifndef _BSP_INTERRUPT_H
-#define _BSP_INTERRUPT_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-/* clang-format off */
-/* Machine interrupt mask for 64 bit system, 0x8000 0000 0000 0000 */
-#define CAUSE_MACHINE_IRQ_MASK            (0x1ULL << 63)
-
-/* Machine interrupt reason mask for 64 bit system, 0x7FFF FFFF FFFF FFFF */
-#define CAUSE_MACHINE_IRQ_REASON_MASK     (CAUSE_MACHINE_IRQ_MASK - 1)
-
-/* Hypervisor interrupt mask for 64 bit system, 0x8000 0000 0000 0000 */
-#define CAUSE_HYPERVISOR_IRQ_MASK         (0x1ULL << 63)
-
-/* Hypervisor interrupt reason mask for 64 bit system, 0x7FFF FFFF FFFF FFFF */
-#define CAUSE_HYPERVISOR_IRQ_REASON_MASK  (CAUSE_HYPERVISOR_IRQ_MASK - 1)
-
-/* Supervisor interrupt mask for 64 bit system, 0x8000 0000 0000 0000 */
-#define CAUSE_SUPERVISOR_IRQ_MASK         (0x1ULL << 63)
-
-/* Supervisor interrupt reason mask for 64 bit system, 0x7FFF FFFF FFFF FFFF */
-#define CAUSE_SUPERVISOR_IRQ_REASON_MASK  (CAUSE_SUPERVISOR_IRQ_MASK - 1)
-/* clang-format on */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* _BSP_INTERRUPT_H */
-
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/io.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/io.h
deleted file mode 100644
index e4ad88f57..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/io.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/* Copyright 2018 Canaan Inc.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
-* @file io.h
-* @brief kendryte k210 source code
-*                https://github.com/kendryte/kendryte-standalone-sdk.git
-* @version 1.0
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
-
-#ifndef _DRIVER_IO_H
-#define _DRIVER_IO_H
-
-#include <stdint.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#define readb(addr) (*(volatile uint8_t *)(addr))
-#define readw(addr) (*(volatile uint16_t *)(addr))
-#define readl(addr) (*(volatile uint32_t *)(addr))
-#define readq(addr) (*(volatile uint64_t *)(addr))
-
-#define writeb(v, addr)                                                        \
-    {                                                                      \
-        (*(volatile uint8_t *)(addr)) = (v);                           \
-    }
-#define writew(v, addr)                                                        \
-    {                                                                      \
-        (*(volatile uint16_t *)(addr)) = (v);                          \
-    }
-#define writel(v, addr)                                                        \
-    {                                                                      \
-        (*(volatile uint32_t *)(addr)) = (v);                          \
-    }
-#define writeq(v, addr)                                                        \
-    {                                                                      \
-        (*(volatile uint64_t *)(addr)) = (v);                          \
-    }
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* _DRIVER_IO_H */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_arch.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_arch.c
deleted file mode 100644
index be7a864a6..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_arch.c
+++ /dev/null
@@ -1,51 +0,0 @@
-/************************************************************************************
- * arch/risc-v/src/nr5m100/nr5_arch.c
- *
- *   Copyright (C) 2016 Ken Pettit. All rights reserved.
- *   Author: Ken Pettit <pettitkd@gmail.com>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ************************************************************************************/
-
-/**
-* @file k210_arch.c
-* @brief kendryte k210 source code
-*                https://github.com/kendryte/kendryte-standalone-sdk.git
-* @version 1.0
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
-
-#include <string.h>
-#include <nuttx/arch.h>
-#include "k210.h"
-#include "uarths.h"
-
-void up_puts(const char *p)
-{
-   uarths_puts(p);
-}
-
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_clockconfig.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_clockconfig.c
new file mode 100755
index 000000000..616348bf6
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_clockconfig.c
@@ -0,0 +1,153 @@
+/****************************************************************************
+ * arch/risc-v/src/k210/k210_clockconfig.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+#include <assert.h>
+#include <debug.h>
+
+#include <nuttx/arch.h>
+#include <arch/board/board.h>
+
+#include "riscv_internal.h"
+#include "k210_clockconfig.h"
+#include "k210_sysctl.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define OSC_FREQ 26000000UL
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static uint32_t g_cpu_clock = 390000000;//416000000;
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: k210_get_cpuclk
+ ****************************************************************************/
+
+uint32_t k210_get_cpuclk(void)
+{
+  return g_cpu_clock;
+}
+
+/****************************************************************************
+ * Name: k210_get_pll0clk
+ ****************************************************************************/
+
+#ifndef CONFIG_K210_WITH_QEMU
+uint32_t k210_get_pll0clk(void)
+{
+  uint32_t pll0;
+  uint32_t nr;
+  uint32_t nf;
+  uint32_t od;
+
+  pll0 = getreg32(K210_SYSCTL_PLL0);
+  nr   = PLL_CLK_R(pll0)  + 1;
+  nf   = PLL_CLK_F(pll0)  + 1;
+  od   = PLL_CLK_OD(pll0) + 1;
+
+  return OSC_FREQ / nr * nf / od;
+}
+
+uint32_t k210_get_pll1clk(void)
+{
+  uint32_t pll1;
+  uint32_t nr;
+  uint32_t nf;
+  uint32_t od;
+
+  pll1 = getreg32(K210_SYSCTL_PLL1);
+  nr   = PLL_CLK_R(pll1)  + 1;
+  nf   = PLL_CLK_F(pll1)  + 1;
+  od   = PLL_CLK_OD(pll1) + 1;
+
+  return OSC_FREQ / nr * nf / od;
+}
+
+uint32_t k210_get_pll2clk(void)
+{
+  uint32_t pll2;
+  uint32_t nr;
+  uint32_t nf;
+  uint32_t od;
+
+  pll2 = getreg32(K210_SYSCTL_PLL2);
+  nr   = PLL_CLK_R(pll2)  + 1;
+  nf   = PLL_CLK_F(pll2)  + 1;
+  od   = PLL_CLK_OD(pll2) + 1;
+
+  return OSC_FREQ / nr * nf / od;
+}
+
+#endif
+
+/****************************************************************************
+ * Name: k210_clockconfig
+ ****************************************************************************/
+
+void k210_clockconfig(void)
+{
+#ifndef CONFIG_K210_WITH_QEMU
+  uint32_t clksel0;
+
+  /* Obtain clock selector for ACLK */
+  clksel0 = getreg32(K210_SYSCTL_CLKSEL0);
+
+  if (1 == CLKSEL0_ACLK_SEL(clksel0))
+    {
+      /* PLL0 selected */
+      g_cpu_clock = k210_get_pll0clk() / 2;
+
+      syslog(LOG_NOTICE, "g_cpu clock = %d sel %#x\r\n", g_cpu_clock, clksel0);
+    }
+  else
+    {
+      /* OSC selected */
+
+      g_cpu_clock = OSC_FREQ;
+    }
+#endif
+}
+
+void k210_sysctl_init(void)
+{
+//    sysctl_pll_set_freq(SYSCTL_PLL0, 800000000UL);
+//    sysctl_pll_set_freq(SYSCTL_PLL1, 400000000UL);
+//    sysctl_pll_set_freq(SYSCTL_PLL2, 45158400UL);
+    sysctl_clock_set_threshold(SYSCTL_THRESHOLD_APB1, 2);
+
+//    sysctl_set_power_mode(SYSCTL_POWER_BANK0, SYSCTL_POWER_V18);
+//    sysctl_set_power_mode(SYSCTL_POWER_BANK1, SYSCTL_POWER_V18);
+//    sysctl_set_power_mode(SYSCTL_POWER_BANK2, SYSCTL_POWER_V18);
+}
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_clockconfig.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_clockconfig.h
new file mode 100755
index 000000000..5c4933a0c
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_clockconfig.h
@@ -0,0 +1,67 @@
+/****************************************************************************
+ * arch/risc-v/src/k210/k210_clockconfig.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_RISCV_SRC_K210_K210_CLOCKCONFIG_H
+#define __ARCH_RISCV_SRC_K210_K210_CLOCKCONFIG_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include "k210_memorymap.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+EXTERN uint32_t k210_get_cpuclk(void);
+EXTERN uint32_t k210_get_pll0clk(void);
+EXTERN void k210_clockconfig(void);
+EXTERN void k210_sysctl_init(void);
+
+#if defined(__cplusplus)
+}
+#endif
+#undef EXTERN
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_RISCV_SRC_K210_K210_CLOCKCONFIG_H */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_fpioa.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_fpioa.c
new file mode 100644
index 000000000..267011ec3
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_fpioa.c
@@ -0,0 +1,101 @@
+/****************************************************************************
+ * arch/risc-v/src/k210/k210_fpioa.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/**
+* @file k210_fpioa.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.3.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-23
+*/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <assert.h>
+#include <debug.h>
+
+#include "riscv_internal.h"
+#include "k210_memorymap.h"
+#include "k210_fpioa.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+int k210_fpioa_get_io_by_function(uint8_t function)
+{
+  int index = 0;
+  uint32_t RegValue = 0x0000;
+  uint32_t *fpioa = (uint32_t *)K210_FPIOA_BASE;
+
+  for (index = 0; index < K210_IO_NUMBER; index++)
+  {
+      RegValue = getreg32(&fpioa[index]);
+      if ((RegValue & 0xFF) == function)
+          return index;
+  }
+  return -1;
+}
+
+int fpioa_set_io_pull(int number, fpioa_pull_t pull)
+{
+  /* Check parameters */
+  if (number < 0 || number >= K210_IO_NUMBER || pull >= FPIOA_PULL_MAX)
+      return -1;
+
+  /* read register */
+  uint32_t *fpioa = (uint32_t *)K210_FPIOA_BASE;
+  fpioa_io_config_t cfg = *(fpioa_io_config_t *)(&fpioa[number]);
+  uint32_t ioflags = 0x0000;
+
+  switch (pull)
+  {
+      case FPIOA_PULL_NONE:
+          cfg.pu = 0;
+          cfg.pd = 0;
+          break;
+      case FPIOA_PULL_DOWN:
+          cfg.pu = 0;
+          cfg.pd = 1;
+          break;
+      case FPIOA_PULL_UP:
+          cfg.pu = 1;
+          cfg.pd = 0;
+          break;
+      default:
+          break;
+  }
+
+  /* write register */
+  ioflags = *(uint32_t*)(&cfg);
+  putreg32(ioflags, &fpioa[number]);
+  return 0;
+}
+
+void k210_fpioa_config(uint32_t io, uint32_t ioflags)
+{
+  uint32_t *fpioa = (uint32_t *)K210_FPIOA_BASE;
+  DEBUGASSERT(io < K210_IO_NUMBER);
+  putreg32(ioflags, &fpioa[io]);
+}
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_fpioa.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_fpioa.h
new file mode 100644
index 000000000..cc122c3b8
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_fpioa.h
@@ -0,0 +1,141 @@
+/****************************************************************************
+ * arch/risc-v/src/k210/k210_fpioa.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/**
+* @file k210_fpioa.h
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.3.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-23
+*/
+
+#ifndef __ARCH_RISCV_SRC_K210_K210_FPIOA_H
+#define __ARCH_RISCV_SRC_K210_K210_FPIOA_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <stdint.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define K210_IO_NUMBER 48
+#define K210_GPIOHS_MAX_PINNO  32
+#define K210_GPIO_MAX_PINNO    8
+
+#define K210_IO_FUNC_UARTHS_RX 18  /* UART High speed Receiver */
+#define K210_IO_FUNC_UARTHS_TX 19  /* UART High speed Transmitter */
+#define K210_IO_FUNC_GPIOHS0   24  /* GPIO High speed 0 */
+#define K210_IO_FUNC_GPIOHS1   25  /* GPIO High speed 1 */
+#define K210_IO_FUNC_GPIOHS2   26  /* GPIO High speed 2 */
+#define K210_IO_FUNC_GPIOHS3   27  /* GPIO High speed 3 */
+#define K210_IO_FUNC_GPIOHS4   28  /* GPIO High speed 4 */
+#define K210_IO_FUNC_GPIOHS5   29  /* GPIO High speed 5 */
+#define K210_IO_FUNC_GPIOHS6   30  /* GPIO High speed 6 */
+#define K210_IO_FUNC_GPIOHS7   31  /* GPIO High speed 7 */
+#define K210_IO_FUNC_GPIOHS8   32  /* GPIO High speed 8 */
+#define K210_IO_FUNC_GPIOHS9   33  /* GPIO High speed 9 */
+#define K210_IO_FUNC_GPIOHS10  34  /* GPIO High speed 10 */
+#define K210_IO_FUNC_GPIOHS11  35  /* GPIO High speed 11 */
+#define K210_IO_FUNC_GPIOHS12  36  /* GPIO High speed 12 */
+#define K210_IO_FUNC_GPIOHS13  37  /* GPIO High speed 13 */
+#define K210_IO_FUNC_GPIOHS14  38  /* GPIO High speed 14 */
+#define K210_IO_FUNC_GPIOHS15  39  /* GPIO High speed 15 */
+#define K210_IO_FUNC_GPIOHS16  40  /* GPIO High speed 16 */
+#define K210_IO_FUNC_GPIOHS17  41  /* GPIO High speed 17 */
+#define K210_IO_FUNC_GPIOHS18  42  /* GPIO High speed 18 */
+#define K210_IO_FUNC_GPIOHS19  43  /* GPIO High speed 19 */
+#define K210_IO_FUNC_GPIOHS20  44  /* GPIO High speed 20 */
+#define K210_IO_FUNC_GPIOHS21  45  /* GPIO High speed 21 */
+#define K210_IO_FUNC_GPIOHS22  46  /* GPIO High speed 22 */
+#define K210_IO_FUNC_GPIOHS23  47  /* GPIO High speed 23 */
+#define K210_IO_FUNC_GPIOHS24  48  /* GPIO High speed 24 */
+#define K210_IO_FUNC_GPIOHS25  49  /* GPIO High speed 25 */
+#define K210_IO_FUNC_GPIOHS26  50  /* GPIO High speed 26 */
+#define K210_IO_FUNC_GPIOHS27  51  /* GPIO High speed 27 */
+#define K210_IO_FUNC_GPIOHS28  52  /* GPIO High speed 28 */
+#define K210_IO_FUNC_GPIOHS29  53  /* GPIO High speed 29 */
+#define K210_IO_FUNC_GPIOHS30  54  /* GPIO High speed 30 */
+#define K210_IO_FUNC_GPIOHS31  55  /* GPIO High speed 31 */
+#define K210_IO_FUNC_GPIO0     56  /* GPIO pin 0 */
+#define K210_IO_FUNC_GPIO1     57  /* GPIO pin 1 */
+#define K210_IO_FUNC_GPIO2     58  /* GPIO pin 2 */
+#define K210_IO_FUNC_GPIO3     59  /* GPIO pin 3 */
+#define K210_IO_FUNC_GPIO4     60  /* GPIO pin 4 */
+#define K210_IO_FUNC_GPIO5     61  /* GPIO pin 5 */
+#define K210_IO_FUNC_GPIO6     62  /* GPIO pin 6 */
+#define K210_IO_FUNC_GPIO7     63  /* GPIO pin 7 */
+
+#define K210_IO_DS(x)  (x << 8) /* Driving Selector */
+
+#define K210_IO_OUTPUT_ENABLE  (1 << 12)
+#define K210_IO_OUTPUT_INVERT  (1 << 13)
+#define K210_IO_INPUT_ENABLE   (1 << 20)
+#define K210_IO_INPUT_INVERT   (1 << 21)
+#define K210_IO_PULL_DOWN      (1 << 16)
+#define K210_IO_PULL_UP        (3 << 16)
+#define K210_IO_PULL_UP_STRONG (7 << 16)
+#define K210_IO_SL             (1 << 19)
+#define K210_IO_ST             (1 << 23)
+
+#define K210_IOFLAG_GPIOHS (K210_IO_DS(0xf) | K210_IO_OUTPUT_ENABLE | \
+                            K210_IO_INPUT_ENABLE | K210_IO_ST)
+
+typedef struct _fpioa_io_config
+{
+    uint32_t ch_sel : 8;  /* Channel select from 256 input. */
+    uint32_t ds : 4;      /* Driving selector. */
+    uint32_t oe_en : 1;   /* Static output enable, will AND with OE_INV. */
+    uint32_t oe_inv : 1;  /* Invert output enable. */
+    uint32_t do_sel : 1;  /* Data output select: 0 for DO, 1 for OE. */
+    uint32_t do_inv : 1;  /* Invert the result of data output select (DO_SEL). */
+    uint32_t pu : 1;      /* Pull up enable. 0 for nothing, 1 for pull up. */
+    uint32_t pd : 1;      /* Pull down enable. 0 for nothing, 1 for pull down. */
+    uint32_t resv0 : 1;   /* Reserved bits. */
+    uint32_t sl : 1;      /* Slew rate control enable. */
+    uint32_t ie_en : 1;   /* Static input enable, will AND with IE_INV. */
+    uint32_t ie_inv : 1;  /* Invert input enable. */
+    uint32_t di_inv : 1;  /* Invert Data input. */
+    uint32_t st : 1;      /* Schmitt trigger. */
+    uint32_t resv1 : 7;   /* Reserved bits. */
+    uint32_t pad_di : 1;  /* Read current IO's data input. */
+} __attribute__((packed, aligned(4))) fpioa_io_config_t;
+
+typedef enum _fpioa_pull
+{
+    FPIOA_PULL_NONE,      /* No Pull */
+    FPIOA_PULL_DOWN,      /* Pull Down */
+    FPIOA_PULL_UP,        /* Pull Up */
+    FPIOA_PULL_MAX        /* Count of pull settings */
+} fpioa_pull_t;
+
+
+/****************************************************************************
+ * Public Functions Prototypes
+ ****************************************************************************/
+int k210_fpioa_get_io_by_function(uint8_t function);
+int fpioa_set_io_pull(int number, fpioa_pull_t pull);
+void k210_fpioa_config(uint32_t io, uint32_t ioflags);
+
+#endif /* __ARCH_RISCV_SRC_K210_K210_FPIOA_H */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_gpio.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_gpio.c
new file mode 100644
index 000000000..b79966c01
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_gpio.c
@@ -0,0 +1,120 @@
+/****************************************************************************
+ * arch/risc-v/src/k210/k210_gpio.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/**
+* @file k210_gpio.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.3.0 
+* @author AIIT XUOS Lab
+* @date 2022-06-30
+*/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <assert.h>
+#include <debug.h>
+
+#include "riscv_internal.h"
+#include "k210_memorymap.h"
+#include "k210_gpio.h"
+#include "k210_fpioa.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define GPIO_INPUT_VAL_OFFSET    0x00
+#define GPIO_INPUT_EN_OFFSET     0x04
+#define GPIO_OUTPUT_EN_OFFSET    0x08
+#define GPIO_OUTPUT_VAL_OFFSET   0x0c
+#define GPIO_PULLUP_EN_OFFSET    0x10
+#define GPIO_DRIVE_OFFSET        0x14
+
+#define GPIO_INPUT      (K210_GPIO_BASE + GPIO_INPUT_VAL_OFFSET)
+#define GPIO_INPUT_EN   (K210_GPIO_BASE + GPIO_INPUT_EN_OFFSET)
+#define GPIO_OUTPUT     (K210_GPIO_BASE + GPIO_OUTPUT_VAL_OFFSET)
+#define GPIO_OUTPUT_EN  (K210_GPIO_BASE + GPIO_OUTPUT_EN_OFFSET)
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+void k210_gpio_set_direction(uint32_t io, gpio_drive_mode_t mode)
+{
+  DEBUGASSERT(io < K210_GPIO_MAX_PINNO);
+  int io_number = k210_fpioa_get_io_by_function(K210_IO_FUNC_GPIO0 + io);
+  DEBUGASSERT(io_number >= 0);
+
+  fpioa_pull_t pull = FPIOA_PULL_NONE;
+  uint32_t dir = 0;
+
+  switch (mode)
+  {
+      case GPIO_DM_INPUT:
+          pull = FPIOA_PULL_NONE;
+          dir = 0;
+          break;
+      case GPIO_DM_INPUT_PULL_DOWN:
+          pull = FPIOA_PULL_DOWN;
+          dir = 0;
+          break;
+      case GPIO_DM_INPUT_PULL_UP:
+          pull = FPIOA_PULL_UP;
+          dir = 0;
+          break;
+      case GPIO_DM_OUTPUT:
+          pull = FPIOA_PULL_DOWN;
+          dir = 1;
+          break;
+      default:
+          DEBUGASSERT(!"GPIO drive mode is not supported.");
+          break;
+  }
+
+  fpioa_set_io_pull(io_number, pull);
+  uint32_t outbit = dir << io;
+  uint32_t inbit  = (!dir) << io;
+  modifyreg32(GPIO_OUTPUT_EN, inbit, outbit);
+  modifyreg32(GPIO_INPUT_EN, outbit, inbit);
+}
+
+void k210_gpio_set_value(uint32_t io, bool val)
+{
+  uint32_t setbit = val << io;
+  uint32_t clrbit  = (!val) << io;
+  modifyreg32(GPIO_OUTPUT, clrbit, setbit);
+}
+
+bool k210_gpio_get_value(uint32_t io)
+{
+  uint32_t reg = getreg32(GPIO_INPUT);
+
+  if (reg & (1 << io))
+    {
+      return true;
+    }
+  else
+    {
+      return false;
+    }
+}
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_gpio.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_gpio.h
new file mode 100644
index 000000000..13d98e04d
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_gpio.h
@@ -0,0 +1,89 @@
+/****************************************************************************
+ * arch/risc-v/src/k210/k210_gpio.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/**
+* @file k210_gpio.h
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.3.0 
+* @author AIIT XUOS Lab
+* @date 2022-06-30
+*/
+
+#ifndef __ARCH_RISCV_SRC_K210_K210_GPIO_H
+#define __ARCH_RISCV_SRC_K210_K210_GPIO_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "k210_gpio_common.h"
+
+/****************************************************************************
+ * Public Functions Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: k210_gpio_set_direction
+ *
+ * Description:
+ *   Set gpiohs direction
+ *
+ * Input Parameters:
+ *   io  - IO number
+ *   dir - true for output, false for input
+ *
+ ****************************************************************************/
+
+void k210_gpio_set_direction(uint32_t io, gpio_drive_mode_t mode);
+
+/****************************************************************************
+ * Name: k210_gpio_set_value
+ *
+ * Description:
+ *   Set gpiohs direction
+ *
+ * Input Parameters:
+ *   io  - IO number
+ *   dir - true for high level, false for low level
+ *
+ ****************************************************************************/
+
+void k210_gpio_set_value(uint32_t io, bool val);
+
+/****************************************************************************
+ * Name: k210_gpio_get_value
+ *
+ * Description:
+ *   Get gpiohs level
+ *
+ * Input Parameters:
+ *   io  - IO number
+ *
+ * Returned Value:
+ *   true for high level, false for low level
+ *
+ ****************************************************************************/
+
+bool k210_gpio_get_value(uint32_t io);
+
+#endif /* __ARCH_RISCV_SRC_K210_K210_GPIO_H */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_gpio_common.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_gpio_common.h
new file mode 100644
index 000000000..c55284348
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_gpio_common.h
@@ -0,0 +1,66 @@
+/****************************************************************************
+ * arch/risc-v/src/k210/k210_gpio_common
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/**
+* @file k210_gpio_common.h
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.3.0 
+* @author AIIT XUOS Lab
+* @date 2022-06-30
+*/
+
+#ifndef __ARCH_RISCV_SRC_K210_GPIO_COMMON_H 
+#define __ARCH_RISCV_SRC_K210_GPIO_COMMON_H 
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum _gpio_drive_mode
+{
+    GPIO_DM_INPUT,
+    GPIO_DM_INPUT_PULL_DOWN,
+    GPIO_DM_INPUT_PULL_UP,
+    GPIO_DM_OUTPUT,
+} gpio_drive_mode_t;
+
+typedef enum _gpio_pin_edge
+{
+    GPIO_PE_NONE,
+    GPIO_PE_FALLING,
+    GPIO_PE_RISING,
+    GPIO_PE_BOTH,
+    GPIO_PE_LOW,
+    GPIO_PE_HIGH = 8,
+} gpio_pin_edge_t;
+
+typedef enum _gpio_pin_value
+{
+    GPIO_PV_LOW,
+    GPIO_PV_HIGH
+} gpio_pin_value_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ARCH_RISCV_SRC_K210_GPIO_COMMON_H */
+
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_gpiohs.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_gpiohs.c
new file mode 100644
index 000000000..df386bf04
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_gpiohs.c
@@ -0,0 +1,120 @@
+/****************************************************************************
+ * arch/risc-v/src/k210/k210_gpiohs.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/**
+* @file k210_gpiohs.c
+* @brief nuttx source code
+*                https://github.com/apache/incubator-nuttx.git
+* @version 10.3.0 
+* @author AIIT XUOS Lab
+* @date 2022-03-23
+*/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <assert.h>
+#include <debug.h>
+
+#include "riscv_internal.h"
+#include "k210_memorymap.h"
+#include "k210_gpiohs.h"
+#include "k210_fpioa.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define GPIOHS_INPUT_VAL_OFFSET    0x00
+#define GPIOHS_INPUT_EN_OFFSET     0x04
+#define GPIOHS_OUTPUT_EN_OFFSET    0x08
+#define GPIOHS_OUTPUT_VAL_OFFSET   0x0c
+#define GPIOHS_PULLUP_EN_OFFSET    0x10
+#define GPIOHS_DRIVE_OFFSET        0x14
+
+#define GPIOHS_INPUT      (K210_GPIOHS_BASE + GPIOHS_INPUT_VAL_OFFSET)
+#define GPIOHS_INPUT_EN   (K210_GPIOHS_BASE + GPIOHS_INPUT_EN_OFFSET)
+#define GPIOHS_OUTPUT     (K210_GPIOHS_BASE + GPIOHS_OUTPUT_VAL_OFFSET)
+#define GPIOHS_OUTPUT_EN  (K210_GPIOHS_BASE + GPIOHS_OUTPUT_EN_OFFSET)
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+void k210_gpiohs_set_direction(uint32_t io, gpio_drive_mode_t mode)
+{
+  DEBUGASSERT(io < K210_GPIOHS_MAX_PINNO);
+  int io_number = k210_fpioa_get_io_by_function(K210_IO_FUNC_GPIOHS0 + io);
+  DEBUGASSERT(io_number >= 0);
+
+  fpioa_pull_t pull = FPIOA_PULL_NONE;
+  uint32_t dir = 0;
+
+  switch (mode)
+  {
+      case GPIO_DM_INPUT:
+          pull = FPIOA_PULL_NONE;
+          dir = 0;
+          break;
+      case GPIO_DM_INPUT_PULL_DOWN:
+          pull = FPIOA_PULL_DOWN;
+          dir = 0;
+          break;
+      case GPIO_DM_INPUT_PULL_UP:
+          pull = FPIOA_PULL_UP;
+          dir = 0;
+          break;
+      case GPIO_DM_OUTPUT:
+          pull = FPIOA_PULL_DOWN;
+          dir = 1;
+          break;
+      default:
+          DEBUGASSERT(!"GPIO drive mode is not supported.");
+          break;
+  }
+
+  fpioa_set_io_pull(io_number, pull);
+  uint32_t outbit = dir << io;
+  uint32_t inbit  = (!dir) << io;
+  modifyreg32(GPIOHS_OUTPUT_EN, inbit, outbit);
+  modifyreg32(GPIOHS_INPUT_EN, outbit, inbit);
+}
+
+void k210_gpiohs_set_value(uint32_t io, bool val)
+{
+  uint32_t setbit = val << io;
+  uint32_t clrbit  = (!val) << io;
+  modifyreg32(GPIOHS_OUTPUT, clrbit, setbit);
+}
+
+bool k210_gpiohs_get_value(uint32_t io)
+{
+  uint32_t reg = getreg32(GPIOHS_INPUT);
+
+  if (reg & (1 << io))
+    {
+      return true;
+    }
+  else
+    {
+      return false;
+    }
+}
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/src/k210_ostest.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_gpiohs.h
similarity index 54%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/src/k210_ostest.c
rename to Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_gpiohs.h
index 860296f66..11a6e63f5 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/aiit_board/aiit-riscv64-board/src/k210_ostest.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_gpiohs.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * boards/risc-v/k210/aiit-riscv64-board/src/k210_ostest.c
+ * arch/risc-v/src/k210/k210_gpiohs.h
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
@@ -19,83 +19,73 @@
  ****************************************************************************/
 
 /**
-* @file k210_ostest.c
+* @file k210_gpiohs.h
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
-* @date 2022-03-17
+* @date 2022-03-23
 */
 
+#ifndef __ARCH_RISCV_SRC_K210_K210_GPIOHS_H
+#define __ARCH_RISCV_SRC_K210_K210_GPIOHS_H
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
 
-#include <nuttx/config.h>
-
 #include <stdint.h>
 #include <stdbool.h>
-#include <string.h>
-#include <syscall.h>
+#include "k210_gpio_common.h"
 
-#include <nuttx/irq.h>
+#define HS_GPIO(n) (K210_IO_FUNC_GPIOHS0 + n)
 
 /****************************************************************************
- * Pre-processor Definitions
+ * Public Functions Prototypes
  ****************************************************************************/
 
-/* Configuration ************************************************************/
-
-#undef HAVE_FPU
-#if defined(CONFIG_ARCH_FPU) && \
-    !defined(CONFIG_TESTING_OSTEST_FPUTESTDISABLE) && \
-    defined(CONFIG_TESTING_OSTEST_FPUSIZE) && \
-    defined(CONFIG_SCHED_WAITPID)
-#    define HAVE_FPU 1
-#endif
-
-#ifdef HAVE_FPU
-
-#if CONFIG_TESTING_OSTEST_FPUSIZE != (8 * FPU_XCPT_REGS)
-#  error "CONFIG_TESTING_OSTEST_FPUSIZE has the wrong size"
-#endif
-
 /****************************************************************************
- * Private Data
+ * Name: k210_gpiohs_set_direction
+ *
+ * Description:
+ *   Set gpiohs direction
+ *
+ * Input Parameters:
+ *   io  - IO number
+ *   dir - true for output, false for input
+ *
  ****************************************************************************/
 
-static uint64_t g_saveregs[XCPTCONTEXT_REGS];
+void k210_gpiohs_set_direction(uint32_t io, gpio_drive_mode_t mode);
 
 /****************************************************************************
- * Public Functions
+ * Name: k210_gpiohs_set_value
+ *
+ * Description:
+ *   Set gpiohs direction
+ *
+ * Input Parameters:
+ *   io  - IO number
+ *   dir - true for high level, false for low level
+ *
  ****************************************************************************/
 
-/* Given an array of size CONFIG_TESTING_OSTEST_FPUSIZE, this function will
- * return the current FPU registers.
- */
+void k210_gpiohs_set_value(uint32_t io, bool val);
 
-void arch_getfpu(FAR uint32_t *fpusave)
-{
-  irqstate_t flags;
+/****************************************************************************
+ * Name: k210_gpiohs_get_value
+ *
+ * Description:
+ *   Get gpiohs level
+ *
+ * Input Parameters:
+ *   io  - IO number
+ *
+ * Returned Value:
+ *   true for high level, false for low level
+ *
+ ****************************************************************************/
 
-  /* Take a snapshot of the thread context right now */
+bool k210_gpiohs_get_value(uint32_t io);
 
-  flags = enter_critical_section();
-  riscv_saveusercontext(g_saveregs);
-
-  /* Return only the floating register values */
-
-  memcpy(fpusave, &g_saveregs[INT_XCPT_REGS], (8 * FPU_XCPT_REGS));
-  leave_critical_section(flags);
-}
-
-/* Given two arrays of size CONFIG_TESTING_OSTEST_FPUSIZE this function
- * will compare them and return true if they are identical.
- */
-
-bool arch_cmpfpu(FAR const uint32_t *fpusave1, FAR const uint32_t *fpusave2)
-{
-  return memcmp(fpusave1, fpusave2, (8 * FPU_XCPT_REGS)) == 0;
-}
-
-#endif /* HAVE_FPU */
+#endif /* __ARCH_RISCV_SRC_K210_K210_GPIOHS_H */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_head.S b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_head.S
deleted file mode 100644
index c54bd2763..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_head.S
+++ /dev/null
@@ -1,256 +0,0 @@
-/****************************************************************************
- * arch/risc-v/src/k210/k210_head.S
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements.  See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership.  The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License.  You may obtain a copy of the License at
- *
- *   http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include <nuttx/config.h>
-#include <arch/csr.h>
-#include <arch/rv64gc/irq.h>
-
-#include "chip.h"
-#include "k210_memorymap.h"
-#include "riscv_internal.h"
-
-/****************************************************************************
- * Public Symbols
- ****************************************************************************/
-
-  .global exception_common
-
-  /* Imported symbols */
-
-  .extern __trap_vec
-
-  .section .text
-  .global __start
-
-__start:
-
-#if defined(__riscv_flen) && __riscv_flen > 0
-  /* Enable FPU */
-  li a0, MSTATUS_FS
-  csrs mstatus, a0
-  csrw fcsr, x0
-#endif
-
-  /* Load mhartid (cpuid) */
-
-  csrr a0, mhartid
-
-  /* Set stack pointer to the idle thread stack */
-
-  bnez a0, 1f
-  la   sp, K210_IDLESTACK0_TOP
-  j    2f
-1:
-  la   sp, K210_IDLESTACK1_TOP
-
-  /* In case of single CPU config, stop here */
-
-#if !(defined CONFIG_SMP) || (CONFIG_SMP_NCPUS == 1)
-  wfi
-#endif
-2:
-
-  /* Disable all interrupts (i.e. timer, external) in mie */
-
-  csrw mie, zero
-
-  /* Initialize the Machine Trap Vector */
-
-  la   t0, __trap_vec
-  csrw mtvec, t0
-
-  /* Jump to __k210_start with mhartid */
-
-  j    __k210_start
-
-  /* We shouldn't return from __k210_start */
-
-  .global _init
-  .global _fini
-
-_init:
-_fini:
-
-  /* These don't have to do anything since we use init_array/fini_array. */
-
-  ret
-
-/****************************************************************************
- * Name: exception_common
- ****************************************************************************/
-
-exception_common:
-
-#if 0
-  csrr gp, mcause   /* exception cause */
-  addi tp, zero, 10 /* 10 = machine ecall */
-  bgtu gp, tp, normal_irq
-  ld   sp, g_fstack_top /* Set sp to fault stack */
-
-normal_irq:
-  addi gp, zero, 0  /* clear  */
-#endif
-
-  addi sp, sp, -XCPTCONTEXT_SIZE
-
-  sd   x1,  1*8(sp)   /* ra */
-  sd   x3,  3*8(sp)   /* gp */
-  sd   x4,  4*8(sp)   /* tp */
-  sd   x5,  5*8(sp)   /* t0 */
-  sd   x6,  6*8(sp)   /* t1 */
-  sd   x7,  7*8(sp)   /* t2 */
-  sd   x8,  8*8(sp)   /* s0 */
-  sd   x9,  9*8(sp)   /* s1 */
-  sd   x10, 10*8(sp)  /* a0 */
-  sd   x11, 11*8(sp)  /* a1 */
-  sd   x12, 12*8(sp)  /* a2 */
-  sd   x13, 13*8(sp)  /* a3 */
-  sd   x14, 14*8(sp)  /* a4 */
-  sd   x15, 15*8(sp)  /* a5 */
-  sd   x16, 16*8(sp)  /* a6 */
-  sd   x17, 17*8(sp)  /* a7 */
-  sd   x18, 18*8(sp)  /* s2 */
-  sd   x19, 19*8(sp)  /* s3 */
-  sd   x20, 20*8(sp)  /* s4 */
-  sd   x21, 21*8(sp)  /* s5 */
-  sd   x22, 22*8(sp)  /* s6 */
-  sd   x23, 23*8(sp)  /* s7 */
-  sd   x24, 24*8(sp)  /* s8 */
-  sd   x25, 25*8(sp)  /* s9 */
-  sd   x26, 26*8(sp)  /* s10 */
-  sd   x27, 27*8(sp)  /* s11 */
-  sd   x28, 28*8(sp)  /* t3 */
-  sd   x29, 29*8(sp)  /* t4 */
-  sd   x30, 30*8(sp)  /* t5 */
-  sd   x31, 31*8(sp)  /* t6 */
-
-  csrr s0, mstatus
-  sd   s0,  32*8(sp)  /* mstatus */
-
-  addi s0, sp, XCPTCONTEXT_SIZE
-  sd   s0,  2*8(sp)   /* original SP */
-
-  /* Setup arg0(exception cause), arg1(context) */
-
-  csrr a0, mcause  /* exception cause */
-  csrr s0, mepc
-  sd   s0, 0(sp)   /* exception PC */
-
-  mv   a1, sp      /* context = sp */
-
-#if CONFIG_ARCH_INTERRUPTSTACK > 15
-  /* Load mhartid (cpuid) */
-
-  csrr s0, mhartid
-
-  /* Switch to interrupt stack */
-
-  bnez s0, 3f
-  la   sp, g_intstacktop
-  j    4f
-3:
-  la   sp, g_intstacktop
-  addi sp, sp, -(CONFIG_ARCH_INTERRUPTSTACK & ~15)
-4:
-
-#endif
-
-  /* Call interrupt handler in C */
-
-  jal  x1, k210_dispatch_irq
-
-  /* If context switch is needed, return a new sp */
-
-  mv   sp, a0
-  ld   s0, 0(sp)    /* restore mepc */
-  csrw mepc, s0
-
-  ld   s0, 32*8(sp) /* restore mstatus */
-  li   s1, MSTATUS_FS
-  or   s0,  s0, s1
-  csrw mstatus, s0
-
-  ld  x3,  3*8(sp)  /* gp */
-  ld  x4,  4*8(sp)  /* tp */
-  ld  x5,  5*8(sp)  /* t0 */
-  ld  x6,  6*8(sp)  /* t1 */
-  ld  x7,  7*8(sp)  /* t2 */
-  ld  x8,  8*8(sp)  /* s0 */
-  ld  x9,  9*8(sp)  /* s1 */
-  ld x10, 10*8(sp)  /* a0 */
-  ld x11, 11*8(sp)  /* a1 */
-  ld x12, 12*8(sp)  /* a2 */
-  ld x13, 13*8(sp)  /* a3 */
-  ld x14, 14*8(sp)  /* a4 */
-  ld x15, 15*8(sp)  /* a5 */
-  ld x16, 16*8(sp)  /* a6 */
-  ld x17, 17*8(sp)  /* a7 */
-  ld x18, 18*8(sp)  /* s2 */
-  ld x19, 19*8(sp)  /* s3 */
-  ld x20, 20*8(sp)  /* s4 */
-  ld x21, 21*8(sp)  /* s5 */
-  ld x22, 22*8(sp)  /* s6 */
-  ld x23, 23*8(sp)  /* s7 */
-  ld x24, 24*8(sp)  /* s8 */
-  ld x25, 25*8(sp)  /* s9 */
-  ld x26, 26*8(sp)  /* s10 */
-  ld x27, 27*8(sp)  /* s11 */
-  ld x28, 28*8(sp)  /* t3 */
-  ld x29, 29*8(sp)  /* t4 */
-  ld x30, 30*8(sp)  /* t5 */
-  ld x31, 31*8(sp)  /* t6 */
-
-  ld  x1,  1*8(sp)  /* ra */
-
-  ld  sp,  2*8(sp)  /* restore original sp */
-
-  /* Return from Machine Interrupt */
-
-  mret
-
-/************************************************************************************
- *  Name: g_intstackalloc and g_intstacktop
- ************************************************************************************/
-
-#if CONFIG_ARCH_INTERRUPTSTACK > 15
-  .bss
-  .balign 16
-  .global g_intstackalloc
-  .global g_intstacktop
-  .type   g_intstackalloc, object
-  .type   g_intstacktop, object
-g_intstackalloc:
-#ifndef CONFIG_SMP
-  .skip  ((CONFIG_ARCH_INTERRUPTSTACK + 8) & ~15)
-#else
-  .skip  (((CONFIG_ARCH_INTERRUPTSTACK * CONFIG_SMP_NCPUS) + 8) & ~15)
-#endif
-g_intstacktop:
-  .size  g_intstacktop, 0
-#ifndef CONFIG_SMP
-  .size  g_intstackalloc, (CONFIG_ARCH_INTERRUPTSTACK & ~15)
-#else
-  .size  g_intstackalloc, ((CONFIG_ARCH_INTERRUPTSTACK * CONFIG_SMP_NCPUS) & ~15)
-#endif
-#endif
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_memorymap.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_memorymap.h
new file mode 100755
index 000000000..11f3b0634
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_memorymap.h
@@ -0,0 +1,50 @@
+/****************************************************************************
+ * arch/risc-v/src/k210/k210_memorymap.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_RISCV_SRC_K210_K210_MEMORYMAP_H
+#define __ARCH_RISCV_SRC_K210_K210_MEMORYMAP_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include "riscv_internal.h"
+#include "hardware/k210_memorymap.h"
+#include "hardware/k210_uart.h"
+#include "hardware/k210_clint.h"
+#include "hardware/k210_plic.h"
+//#include "hardware/k210_sysctl.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Idle thread stack starts from _ebss */
+
+#ifndef __ASSEMBLY__
+#define K210_IDLESTACK_BASE  (uintptr_t)&_ebss
+#else
+#define K210_IDLESTACK_BASE  _ebss
+#endif
+
+#define K210_IDLESTACK0_BASE (K210_IDLESTACK_BASE)
+#define K210_IDLESTACK0_TOP  (K210_IDLESTACK0_BASE + CONFIG_IDLETHREAD_STACKSIZE)
+
+#endif /* __ARCH_RISCV_SRC_K210_K210_MEMORYMAP_H */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_start.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_start.c
deleted file mode 100644
index 39431a4fd..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_start.c
+++ /dev/null
@@ -1,171 +0,0 @@
-/****************************************************************************
- * arch/risc-v/src/k210/k210_start.c
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements.  See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership.  The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License.  You may obtain a copy of the License at
- *
- *   http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-/**
-* @file k210_start.c
-* @brief nuttx source code
-*                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
-
-#include <nuttx/config.h>
-
-#include <nuttx/init.h>
-#include <nuttx/arch.h>
-#include <arch/board/board.h>
-#include <debug.h>
-
-#include "riscv_arch.h"
-#include "k210_clockconfig.h"
-#include "k210_userspace.h"
-#include "k210.h"
-#include "chip.h"
-#include "plic.h"
-#include "uarths.h"
-#include "fpioa.h"
-#include "dmac.h"
-#include "fft.h"
-
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-#ifdef CONFIG_DEBUG_FEATURES
-#  define showprogress(c) riscv_lowputc(c)
-#else
-#  define showprogress(c)
-#endif
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/* NOTE: g_idle_topstack needs to point the top of the idle stack
- * for CPU0 and this value is used in up_initial_state()
- */
-
-uintptr_t g_idle_topstack = K210_IDLESTACK0_TOP;
-volatile bool g_serial_ok = false;
-
-extern void k210_cpu_boot(uint32_t);
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: k210_start
- ****************************************************************************/
-
-void __k210_start(uint32_t mhartid)
-{
-  const uint32_t *src;
-  uint32_t *dest;
-
-  if (0 < mhartid)
-    {
-      goto cpu1;
-    }
-
-  /* Clear .bss.  We'll do this inline (vs. calling memset) just to be
-   * certain that there are no issues with the state of global variables.
-   */
-
-  for (dest = &_sbss; dest < &_ebss; )
-    {
-      *dest++ = 0;
-    }
-
-  /* Move the initialized data section from his temporary holding spot in
-   * FLASH into the correct place in SRAM.  The correct place in SRAM is
-   * give by _sdata and _edata.  The temporary location is in FLASH at the
-   * end of all of the other read-only data (.text, .rodata) at _eronly.
-   */
-
-  for (src = &_eronly, dest = &_sdata; dest < &_edata; )
-    {
-      *dest++ = *src++;
-    }
-
-  /* Setup PLL */
-
-  k210_clockconfig();
-
-  /* Init PLIC */
-  plic_init();
-  /* Init UART */
-  uarths_init();
-  /* Init FPIOA */
-  fpioa_init();
-  /* Init DMA */
-  dmac_init();
-
-  k210_lowsetup();
-
-  showprogress('A');
-
-#ifdef USE_EARLYSERIALINIT
-  riscv_earlyserialinit();
-#endif
-
-  showprogress('B');
-
-  g_serial_ok = true;
-
-  /* Do board initialization */
-
-  k210_boardinitialize();
-
-  showprogress('C');
-
-  /* For the case of the separate user-/kernel-space build, perform whatever
-   * platform specific initialization of the user memory is required.
-   * Normally this just means initializing the user space .data and .bss
-   * segments.
-   */
-
-#ifdef CONFIG_BUILD_PROTECTED
-  k210_userspace();
-  showprogress('D');
-#endif
-
-  /* Call nx_start() */
-
-  nx_start();
-
-cpu1:
-
-  showprogress('a');
-
-#if defined(CONFIG_SMP) && (CONFIG_SMP_NCPUS == 2)
-  k210_cpu_boot(mhartid);
-#endif
-
-  while (true)
-    {
-      asm("WFI");
-    }
-}
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/sysctl.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_sysctl.c
old mode 100644
new mode 100755
similarity index 88%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/sysctl.c
rename to Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_sysctl.c
index 858d1164f..509b35c0e
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/sysctl.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_sysctl.c
@@ -12,42 +12,14 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
-
-/**
-* @file sysctl.c
-* @brief kendryte k210 source code
-*                https://github.com/kendryte/kendryte-standalone-sdk.git
-* @version 1.0
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
-
-//#include <stdint.h>
-#include <stdlib.h>
-//#include <math.h>
+#include <math.h>
+#include <stdint.h>
 #include <stdio.h>
-#include "sysctl.h"
-#include "string.h"
-#include "encoding.h"
-#include "bsp.h"
+#include <stdlib.h>
+#include "k210_sysctl.h"
 
 #define SYSCTRL_CLOCK_FREQ_IN0 (26000000UL)
 
-static double fabs(double a){
-    if(a>0) return a;
-    return -a;
-}
-
-static uint32_t rint(double a){
-    return (uint32_t) a;
-}
-static uint32_t ceil(double a){
-    return (uint32_t) a;
-}
-static uint32_t floor(double a){
-    return (uint32_t) a;
-}
-
 const uint8_t get_select_pll2[] =
 {
     [SYSCTL_SOURCE_IN0] = 0,
@@ -88,7 +60,7 @@ uint32_t sysctl_get_freq(void)
 
 static void sysctl_reset_ctl(sysctl_reset_t reset, uint8_t rst_value)
 {
-    switch (reset)
+    switch(reset)
     {
         case SYSCTL_RESET_SOC:
             sysctl->soft_reset.soft_reset = rst_value;
@@ -202,9 +174,9 @@ static int sysctl_clock_bus_en(sysctl_clock_t clock, uint8_t en)
      */
 
     /* The APB clock should carefully disable */
-    if (en)
+    if(en)
     {
-        switch (clock)
+        switch(clock)
         {
             /*
              * These peripheral devices are under APB0
@@ -262,7 +234,7 @@ static int sysctl_clock_bus_en(sysctl_clock_t clock, uint8_t en)
 
 static int sysctl_clock_device_en(sysctl_clock_t clock, uint8_t en)
 {
-    switch (clock)
+    switch(clock)
     {
         /*
          * These devices are PLL
@@ -412,7 +384,7 @@ static int sysctl_clock_device_en(sysctl_clock_t clock, uint8_t en)
 
 int sysctl_clock_enable(sysctl_clock_t clock)
 {
-    if (clock >= SYSCTL_CLOCK_MAX)
+    if(clock >= SYSCTL_CLOCK_MAX)
         return -1;
     sysctl_clock_bus_en(clock, 1);
     sysctl_clock_device_en(clock, 1);
@@ -421,9 +393,8 @@ int sysctl_clock_enable(sysctl_clock_t clock)
 
 int sysctl_clock_disable(sysctl_clock_t clock)
 {
-    if (clock >= SYSCTL_CLOCK_MAX)
+    if(clock >= SYSCTL_CLOCK_MAX)
         return -1;
-    sysctl_clock_bus_en(clock, 0);
     sysctl_clock_device_en(clock, 0);
     return 0;
 }
@@ -431,7 +402,7 @@ int sysctl_clock_disable(sysctl_clock_t clock)
 int sysctl_clock_set_threshold(sysctl_threshold_t which, int threshold)
 {
     int result = 0;
-    switch (which)
+    switch(which)
     {
         /*
          * These threshold is 2 bit width
@@ -545,7 +516,7 @@ int sysctl_clock_get_threshold(sysctl_threshold_t which)
 {
     int threshold = 0;
 
-    switch (which)
+    switch(which)
     {
         /*
          * Select and get threshold value
@@ -642,7 +613,7 @@ int sysctl_clock_get_threshold(sysctl_threshold_t which)
 int sysctl_clock_set_clock_select(sysctl_clock_select_t which, int select)
 {
     int result = 0;
-    switch (which)
+    switch(which)
     {
         /*
          * These clock select is 1 bit width
@@ -694,7 +665,7 @@ int sysctl_clock_get_clock_select(sysctl_clock_select_t which)
 {
     int clock_select = 0;
 
-    switch (which)
+    switch(which)
     {
         /*
          * Select and get clock select value
@@ -741,7 +712,7 @@ uint32_t sysctl_clock_source_get_freq(sysctl_clock_source_t input)
 {
     uint32_t result;
 
-    switch (input)
+    switch(input)
     {
         case SYSCTL_SOURCE_IN0:
             result = SYSCTRL_CLOCK_FREQ_IN0;
@@ -779,10 +750,10 @@ static int sysctl_pll_is_lock(sysctl_pll_t pll)
      *
      */
 
-    if (pll >= SYSCTL_PLL_MAX)
+    if(pll >= SYSCTL_PLL_MAX)
         return 0;
 
-    switch (pll)
+    switch(pll)
     {
         case SYSCTL_PLL0:
             return sysctl->pll_lock.pll_lock0 == 3;
@@ -802,10 +773,10 @@ static int sysctl_pll_is_lock(sysctl_pll_t pll)
 
 static int sysctl_pll_clear_slip(sysctl_pll_t pll)
 {
-    if (pll >= SYSCTL_PLL_MAX)
+    if(pll >= SYSCTL_PLL_MAX)
         return -1;
 
-    switch (pll)
+    switch(pll)
     {
         case SYSCTL_PLL0:
             sysctl->pll_lock.pll_slip_clear0 = 1;
@@ -845,10 +816,10 @@ int sysctl_pll_enable(sysctl_pll_t pll)
      *                 t2                 t3                             t4
      */
 
-    if (pll >= SYSCTL_PLL_MAX)
+    if(pll >= SYSCTL_PLL_MAX)
         return -1;
 
-    switch (pll)
+    switch(pll)
     {
         case SYSCTL_PLL0:
             /* Do not bypass PLL */
@@ -866,8 +837,8 @@ int sysctl_pll_enable(sysctl_pll_t pll)
              */
             sysctl->pll0.pll_reset0 = 0;
             sysctl->pll0.pll_reset0 = 1;
-            asm volatile ("nop");
-            asm volatile ("nop");
+            asm volatile("nop");
+            asm volatile("nop");
             sysctl->pll0.pll_reset0 = 0;
             break;
 
@@ -887,8 +858,8 @@ int sysctl_pll_enable(sysctl_pll_t pll)
              */
             sysctl->pll1.pll_reset1 = 0;
             sysctl->pll1.pll_reset1 = 1;
-            asm volatile ("nop");
-            asm volatile ("nop");
+            asm volatile("nop");
+            asm volatile("nop");
             sysctl->pll1.pll_reset1 = 0;
             break;
 
@@ -908,8 +879,8 @@ int sysctl_pll_enable(sysctl_pll_t pll)
              */
             sysctl->pll2.pll_reset2 = 0;
             sysctl->pll2.pll_reset2 = 1;
-            asm volatile ("nop");
-            asm volatile ("nop");
+            asm volatile("nop");
+            asm volatile("nop");
             sysctl->pll2.pll_reset2 = 0;
             break;
 
@@ -922,10 +893,10 @@ int sysctl_pll_enable(sysctl_pll_t pll)
 
 int sysctl_pll_disable(sysctl_pll_t pll)
 {
-    if (pll >= SYSCTL_PLL_MAX)
+    if(pll >= SYSCTL_PLL_MAX)
         return -1;
 
-    switch (pll)
+    switch(pll)
     {
         case SYSCTL_PLL0:
             /* Bypass PLL */
@@ -973,23 +944,23 @@ uint32_t sysctl_pll_get_freq(sysctl_pll_t pll)
     uint32_t nr = 0, nf = 0, od = 0;
     uint8_t select = 0;
 
-    if (pll >= SYSCTL_PLL_MAX)
+    if(pll >= SYSCTL_PLL_MAX)
         return 0;
 
-    switch (pll)
+    switch(pll)
     {
         case SYSCTL_PLL0:
             freq_in = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
-            nr      = sysctl->pll0.clkr0 + 1;
-            nf      = sysctl->pll0.clkf0 + 1;
-            od      = sysctl->pll0.clkod0 + 1;
+            nr = sysctl->pll0.clkr0 + 1;
+            nf = sysctl->pll0.clkf0 + 1;
+            od = sysctl->pll0.clkod0 + 1;
             break;
 
         case SYSCTL_PLL1:
             freq_in = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
-            nr      = sysctl->pll1.clkr1 + 1;
-            nf      = sysctl->pll1.clkf1 + 1;
-            od      = sysctl->pll1.clkod1 + 1;
+            nr = sysctl->pll1.clkr1 + 1;
+            nf = sysctl->pll1.clkf1 + 1;
+            od = sysctl->pll1.clkod1 + 1;
             break;
 
         case SYSCTL_PLL2:
@@ -997,14 +968,14 @@ uint32_t sysctl_pll_get_freq(sysctl_pll_t pll)
              * Get input freq accroding select register
              */
             select = sysctl->pll2.pll_ckin_sel2;
-            if (select < sizeof(get_source_pll2))
+            if(select < sizeof(get_source_pll2))
                 freq_in = sysctl_clock_source_get_freq(get_source_pll2[select]);
             else
                 return 0;
 
-            nr      = sysctl->pll2.clkr2 + 1;
-            nf      = sysctl->pll2.clkf2 + 1;
-            od      = sysctl->pll2.clkod2 + 1;
+            nr = sysctl->pll2.clkr2 + 1;
+            nf = sysctl->pll2.clkf2 + 1;
+            od = sysctl->pll2.clkod2 + 1;
             break;
 
         default:
@@ -1023,26 +994,26 @@ static uint32_t sysctl_pll_source_set_freq(sysctl_pll_t pll, sysctl_clock_source
 {
     uint32_t freq_in = 0;
 
-    if (pll >= SYSCTL_PLL_MAX)
+    if(pll >= SYSCTL_PLL_MAX)
         return 0;
 
-    if (source >= SYSCTL_SOURCE_MAX)
+    if(source >= SYSCTL_SOURCE_MAX)
         return 0;
 
-    switch (pll)
+    switch(pll)
     {
         case SYSCTL_PLL0:
         case SYSCTL_PLL1:
             /*
              * Check input clock source
              */
-            if (source != SYSCTL_SOURCE_IN0)
+            if(source != SYSCTL_SOURCE_IN0)
                 return 0;
             freq_in = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
             /*
              * Check input clock freq
              */
-            if (freq_in == 0)
+            if(freq_in == 0)
                 return 0;
             break;
 
@@ -1050,12 +1021,12 @@ static uint32_t sysctl_pll_source_set_freq(sysctl_pll_t pll, sysctl_clock_source
             /*
              * Check input clock source
              */
-            if (source < sizeof(get_select_pll2))
+            if(source < sizeof(get_select_pll2))
                 freq_in = sysctl_clock_source_get_freq(source);
             /*
              * Check input clock freq
              */
-            if (freq_in == 0)
+            if(freq_in == 0)
                 return 0;
             break;
 
@@ -1072,31 +1043,31 @@ static uint32_t sysctl_pll_source_set_freq(sysctl_pll_t pll, sysctl_clock_source
     const double vco_max = 1.75e+09;
     const double ref_min = 1.36719e+07;
     const double ref_max = 1.75e+09;
-    const int nr_min     = 1;
-    const int nr_max     = 16;
-    const int nf_min     = 1;
-    const int nf_max     = 64;
-    const int no_min     = 1;
-    const int no_max     = 16;
-    const int nb_min     = 1;
-    const int nb_max     = 64;
-    const int max_vco    = 1;
-    const int ref_rng    = 1;
+    const int nr_min = 1;
+    const int nr_max = 16;
+    const int nf_min = 1;
+    const int nf_max = 64;
+    const int no_min = 1;
+    const int no_max = 16;
+    const int nb_min = 1;
+    const int nb_max = 64;
+    const int max_vco = 1;
+    const int ref_rng = 1;
 
     /* variables */
-    int nr     = 0;
-    int nrx    = 0;
-    int nf     = 0;
-    int nfi    = 0;
-    int no     = 0;
-    int noe    = 0;
-    int not    = 0;
-    int nor    = 0;
-    int nore   = 0;
-    int nb     = 0;
-    int first  = 0;
+    int nr = 0;
+    int nrx = 0;
+    int nf = 0;
+    int nfi = 0;
+    int no = 0;
+    int noe = 0;
+    int not = 0;
+    int nor = 0;
+    int nore = 0;
+    int nb = 0;
+    int first = 0;
     int firstx = 0;
-    int found  = 0;
+    int found = 0;
 
     long long nfx = 0;
     double fin = 0, fout = 0, fvco = 0;
@@ -1105,131 +1076,130 @@ static uint32_t sysctl_pll_source_set_freq(sysctl_pll_t pll, sysctl_clock_source
     long long x_nfx = 0;
     double x_fvco = 0, x_err = 0;
 
-    fin   = freq_in;
-    fout  = freq;
-    val   = fout / fin;
-    terr  = 0.5 / ((double)(nf_max / 2));
+    fin = freq_in;
+    fout = freq;
+    val = fout / fin;
+    terr = 0.5 / ((double)(nf_max / 2));
     first = firstx = 1;
-    if (terr != -2)
+    if(terr != -2)
     {
         first = 0;
-        if (terr == 0)
+        if(terr == 0)
             terr = 1e-16;
         merr = fabs(terr);
     }
     found = 0;
-    for (nfi = val; nfi < nf_max; ++nfi)
+    for(nfi = val; nfi < nf_max; ++nfi)
     {
         nr = rint(((double)nfi) / val);
-        if (nr == 0)
+        if(nr == 0)
             continue;
-        if ((ref_rng) && (nr < nr_min))
+        if((ref_rng) && (nr < nr_min))
             continue;
-        if (fin / ((double)nr) > ref_max)
+        if(fin / ((double)nr) > ref_max)
             continue;
         nrx = nr;
         nf = nfx = nfi;
         nval = ((double)nfx) / ((double)nr);
-        if (nf == 0)
+        if(nf == 0)
             nf = 1;
         err = 1 - nval / val;
 
-        if ((first) || (fabs(err) < merr * (1 + 1e-6)) || (fabs(err) < 1e-16))
+        if((first) || (fabs(err) < merr * (1 + 1e-6)) || (fabs(err) < 1e-16))
         {
             not = floor(vco_max / fout);
-            for (no = (not > no_max) ? no_max : not; no > no_min; --no)
+            for(no = (not > no_max) ? no_max : not; no > no_min; --no)
             {
-                if ((ref_rng) && ((nr / no) < nr_min))
+                if((ref_rng) && ((nr / no) < nr_min))
                     continue;
-                if ((nr % no) == 0)
+                if((nr % no) == 0)
                     break;
             }
-            if ((nr % no) != 0)
+            if((nr % no) != 0)
                 continue;
-            nor  = ((not > no_max) ? no_max : not) / no;
+            nor = ((not > no_max) ? no_max : not) / no;
             nore = nf_max / nf;
-            if (nor > nore)
+            if(nor > nore)
                 nor = nore;
-            noe  = ceil(vco_min / fout);
-            if (!max_vco)
+            noe = ceil(vco_min / fout);
+            if(!max_vco)
             {
                 nore = (noe - 1) / no + 1;
-                nor  = nore;
-                not  = 0; /* force next if to fail */
+                nor = nore;
+                not = 0; /* force next if to fail */
             }
-            if ((((no * nor) < (not >> 1)) || ((no * nor) < noe)) && ((no * nor) < (nf_max / nf)))
+            if((((no * nor) < (not >> 1)) || ((no * nor) < noe)) && ((no * nor) < (nf_max / nf)))
             {
                 no = nf_max / nf;
-                if (no > no_max)
+                if(no > no_max)
                     no = no_max;
-                if (no > not)
+                if(no > not)
                     no = not;
                 nfx *= no;
                 nf *= no;
-                if ((no > 1) && (!firstx))
+                if((no > 1) && (!firstx))
                     continue;
                 /* wait for larger nf in later iterations */
-            }
-            else
+            } else
             {
                 nrx /= no;
                 nfx *= nor;
                 nf *= nor;
                 no *= nor;
-                if (no > no_max)
+                if(no > no_max)
                     continue;
-                if ((nor > 1) && (!firstx))
+                if((nor > 1) && (!firstx))
                     continue;
                 /* wait for larger nf in later iterations */
             }
 
             nb = nfx;
-            if (nb < nb_min)
+            if(nb < nb_min)
                 nb = nb_min;
-            if (nb > nb_max)
+            if(nb > nb_max)
                 continue;
 
             fvco = fin / ((double)nrx) * ((double)nfx);
-            if (fvco < vco_min)
+            if(fvco < vco_min)
                 continue;
-            if (fvco > vco_max)
+            if(fvco > vco_max)
                 continue;
-            if (nf < nf_min)
+            if(nf < nf_min)
                 continue;
-            if ((ref_rng) && (fin / ((double)nrx) < ref_min))
+            if((ref_rng) && (fin / ((double)nrx) < ref_min))
                 continue;
-            if ((ref_rng) && (nrx > nr_max))
+            if((ref_rng) && (nrx > nr_max))
                 continue;
-            if (!(((firstx) && (terr < 0)) || (fabs(err) < merr * (1 - 1e-6)) || ((max_vco) && (no > x_no))))
+            if(!(((firstx) && (terr < 0)) || (fabs(err) < merr * (1 - 1e-6)) || ((max_vco) && (no > x_no))))
                 continue;
-            if ((!firstx) && (terr >= 0) && (nrx > x_nrx))
+            if((!firstx) && (terr >= 0) && (nrx > x_nrx))
                 continue;
 
-            found  = 1;
-            x_no   = no;
-            x_nrx  = nrx;
-            x_nfx  = nfx;
-            x_nb   = nb;
+            found = 1;
+            x_no = no;
+            x_nrx = nrx;
+            x_nfx = nfx;
+            x_nb = nb;
             x_fvco = fvco;
-            x_err  = err;
-            first  = firstx = 0;
-            merr   = fabs(err);
-            if (terr != -1)
+            x_err = err;
+            first = firstx = 0;
+            merr = fabs(err);
+            if(terr != -1)
                 continue;
         }
     }
-    if (!found)
+    if(!found)
     {
         return 0;
     }
 
-    nrx  = x_nrx;
-    nfx  = x_nfx;
-    no   = x_no;
-    nb   = x_nb;
+    nrx = x_nrx;
+    nfx = x_nfx;
+    no = x_no;
+    nb = x_nb;
     fvco = x_fvco;
-    err  = x_err;
-    if ((terr != -2) && (fabs(err) >= terr * (1 - 1e-6)))
+    err = x_err;
+    if((terr != -2) && (fabs(err) >= terr * (1 - 1e-6)))
     {
         return 0;
     }
@@ -1242,14 +1212,14 @@ static uint32_t sysctl_pll_source_set_freq(sysctl_pll_t pll, sysctl_clock_source
     sysctl_pll1_t pll1;
     sysctl_pll2_t pll2;
 
-    switch (pll)
+    switch(pll)
     {
         case SYSCTL_PLL0:
             /* Read register from bus */
             pll0 = sysctl->pll0;
             /* Set register temporary value */
-            pll0.clkr0  = nrx - 1;
-            pll0.clkf0  = nfx - 1;
+            pll0.clkr0 = nrx - 1;
+            pll0.clkf0 = nfx - 1;
             pll0.clkod0 = no - 1;
             pll0.bwadj0 = nb - 1;
             /* Write register back to bus */
@@ -1260,8 +1230,8 @@ static uint32_t sysctl_pll_source_set_freq(sysctl_pll_t pll, sysctl_clock_source
             /* Read register from bus */
             pll1 = sysctl->pll1;
             /* Set register temporary value */
-            pll1.clkr1  = nrx - 1;
-            pll1.clkf1  = nfx - 1;
+            pll1.clkr1 = nrx - 1;
+            pll1.clkf1 = nfx - 1;
             pll1.clkod1 = no - 1;
             pll1.bwadj1 = nb - 1;
             /* Write register back to bus */
@@ -1272,11 +1242,11 @@ static uint32_t sysctl_pll_source_set_freq(sysctl_pll_t pll, sysctl_clock_source
             /* Read register from bus */
             pll2 = sysctl->pll2;
             /* Set register temporary value */
-            if (source < sizeof(get_select_pll2))
+            if(source < sizeof(get_select_pll2))
                 pll2.pll_ckin_sel2 = get_select_pll2[source];
 
-            pll2.clkr2  = nrx - 1;
-            pll2.clkf2  = nfx - 1;
+            pll2.clkr2 = nrx - 1;
+            pll2.clkf2 = nfx - 1;
             pll2.clkod2 = no - 1;
             pll2.bwadj2 = nb - 1;
             /* Write register back to bus */
@@ -1295,7 +1265,7 @@ uint32_t sysctl_clock_get_freq(sysctl_clock_t clock)
     uint32_t source = 0;
     uint32_t result = 0;
 
-    switch (clock)
+    switch(clock)
     {
         /*
          * The clock IN0
@@ -1326,14 +1296,14 @@ uint32_t sysctl_clock_get_freq(sysctl_clock_t clock)
          * These clock directly under ACLK clock domain
          */
         case SYSCTL_CLOCK_CPU:
-            switch (sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_ACLK))
+            switch(sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_ACLK))
             {
                 case 0:
                     source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
                     break;
                 case 1:
                     source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_PLL0) /
-                        (2ULL << sysctl_clock_get_threshold(SYSCTL_THRESHOLD_ACLK));
+                             (2ULL << sysctl_clock_get_threshold(SYSCTL_THRESHOLD_ACLK));
                     break;
                 default:
                     break;
@@ -1341,14 +1311,14 @@ uint32_t sysctl_clock_get_freq(sysctl_clock_t clock)
             result = source;
             break;
         case SYSCTL_CLOCK_DMA:
-            switch (sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_ACLK))
+            switch(sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_ACLK))
             {
                 case 0:
                     source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
                     break;
                 case 1:
                     source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_PLL0) /
-                        (2ULL << sysctl_clock_get_threshold(SYSCTL_THRESHOLD_ACLK));
+                             (2ULL << sysctl_clock_get_threshold(SYSCTL_THRESHOLD_ACLK));
                     break;
                 default:
                     break;
@@ -1356,14 +1326,14 @@ uint32_t sysctl_clock_get_freq(sysctl_clock_t clock)
             result = source;
             break;
         case SYSCTL_CLOCK_FFT:
-            switch (sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_ACLK))
+            switch(sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_ACLK))
             {
                 case 0:
                     source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
                     break;
                 case 1:
                     source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_PLL0) /
-                        (2ULL << sysctl_clock_get_threshold(SYSCTL_THRESHOLD_ACLK));
+                             (2ULL << sysctl_clock_get_threshold(SYSCTL_THRESHOLD_ACLK));
                     break;
                 default:
                     break;
@@ -1371,14 +1341,14 @@ uint32_t sysctl_clock_get_freq(sysctl_clock_t clock)
             result = source;
             break;
         case SYSCTL_CLOCK_ACLK:
-            switch (sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_ACLK))
+            switch(sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_ACLK))
             {
                 case 0:
                     source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
                     break;
                 case 1:
                     source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_PLL0) /
-                        (2ULL << sysctl_clock_get_threshold(SYSCTL_THRESHOLD_ACLK));
+                             (2ULL << sysctl_clock_get_threshold(SYSCTL_THRESHOLD_ACLK));
                     break;
                 default:
                     break;
@@ -1386,14 +1356,14 @@ uint32_t sysctl_clock_get_freq(sysctl_clock_t clock)
             result = source;
             break;
         case SYSCTL_CLOCK_HCLK:
-            switch (sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_ACLK))
+            switch(sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_ACLK))
             {
                 case 0:
                     source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
                     break;
                 case 1:
                     source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_PLL0) /
-                        (2ULL << sysctl_clock_get_threshold(SYSCTL_THRESHOLD_ACLK));
+                             (2ULL << sysctl_clock_get_threshold(SYSCTL_THRESHOLD_ACLK));
                     break;
                 default:
                     break;
@@ -1512,7 +1482,7 @@ uint32_t sysctl_clock_get_freq(sysctl_clock_t clock)
          * They are using even divider.
          */
         case SYSCTL_CLOCK_SPI3:
-            switch (sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_SPI3))
+            switch(sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_SPI3))
             {
                 case 0:
                     source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
@@ -1527,7 +1497,7 @@ uint32_t sysctl_clock_get_freq(sysctl_clock_t clock)
             result = source / ((sysctl_clock_get_threshold(SYSCTL_THRESHOLD_SPI3) + 1) * 2);
             break;
         case SYSCTL_CLOCK_TIMER0:
-            switch (sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_TIMER0))
+            switch(sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_TIMER0))
             {
                 case 0:
                     source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
@@ -1542,7 +1512,7 @@ uint32_t sysctl_clock_get_freq(sysctl_clock_t clock)
             result = source / ((sysctl_clock_get_threshold(SYSCTL_THRESHOLD_TIMER0) + 1) * 2);
             break;
         case SYSCTL_CLOCK_TIMER1:
-            switch (sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_TIMER1))
+            switch(sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_TIMER1))
             {
                 case 0:
                     source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
@@ -1557,7 +1527,7 @@ uint32_t sysctl_clock_get_freq(sysctl_clock_t clock)
             result = source / ((sysctl_clock_get_threshold(SYSCTL_THRESHOLD_TIMER1) + 1) * 2);
             break;
         case SYSCTL_CLOCK_TIMER2:
-            switch (sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_TIMER2))
+            switch(sysctl_clock_get_clock_select(SYSCTL_CLOCK_SELECT_TIMER2))
             {
                 case 0:
                     source = sysctl_clock_source_get_freq(SYSCTL_SOURCE_IN0);
@@ -1644,7 +1614,7 @@ int sysctl_dma_select(sysctl_dma_channel_t channel, sysctl_dma_select_t select)
     /* Read register from bus */
     dma_sel0 = sysctl->dma_sel0;
     dma_sel1 = sysctl->dma_sel1;
-    switch (channel)
+    switch(channel)
     {
         case SYSCTL_DMA_CHANNEL_0:
             dma_sel0.dma_sel0 = select;
@@ -1699,20 +1669,20 @@ uint32_t sysctl_pll_fast_enable_pll(void)
     /* PLL VCO MAX freq: 1.8GHz */
 
     /* PLL0: 26M reference clk get 793M output clock */
-    pll0.clkr0  = 0;
-    pll0.clkf0  = 60;
+    pll0.clkr0 = 0;
+    pll0.clkf0 = 60;
     pll0.clkod0 = 1;
     pll0.bwadj0 = 60;
 
     /* PLL1: 26M reference clk get 390M output clock */
-    pll1.clkr1  = 0;
-    pll1.clkf1  = 59;
+    pll1.clkr1 = 0;
+    pll1.clkf1 = 59;
     pll1.clkod1 = 3;
     pll1.bwadj1 = 59;
 
     /* PLL2: 26M reference clk get 390M output clock */
-    pll2.clkr2  = 0;
-    pll2.clkf2  = 59;
+    pll2.clkr2 = 0;
+    pll2.clkf2 = 59;
     pll2.clkod2 = 3;
     pll2.bwadj2 = 59;
 
@@ -1725,11 +1695,11 @@ uint32_t sysctl_pll_fast_enable_pll(void)
     sysctl_pll_enable(SYSCTL_PLL1);
     sysctl_pll_enable(SYSCTL_PLL2);
 
-    while (sysctl_pll_is_lock(SYSCTL_PLL0) == 0)
+    while(sysctl_pll_is_lock(SYSCTL_PLL0) == 0)
         sysctl_pll_clear_slip(SYSCTL_PLL0);
-    while (sysctl_pll_is_lock(SYSCTL_PLL1) == 0)
+    while(sysctl_pll_is_lock(SYSCTL_PLL1) == 0)
         sysctl_pll_clear_slip(SYSCTL_PLL1);
-    while (sysctl_pll_is_lock(SYSCTL_PLL2) == 0)
+    while(sysctl_pll_is_lock(SYSCTL_PLL2) == 0)
         sysctl_pll_clear_slip(SYSCTL_PLL2);
 
     sysctl_clock_enable(SYSCTL_CLOCK_PLL0);
@@ -1808,7 +1778,7 @@ uint32_t sysctl_pll_set_freq(sysctl_pll_t pll, uint32_t pll_freq)
     v_pll_t->pll_reset = 0;
 
     /* 7. Get lock status, wait PLL stable */
-    while (sysctl_pll_is_lock(pll) == 0)
+    while(sysctl_pll_is_lock(pll) == 0)
         sysctl_pll_clear_slip(pll);
 
     /* 8. Enable PLL output */
@@ -1816,8 +1786,9 @@ uint32_t sysctl_pll_set_freq(sysctl_pll_t pll, uint32_t pll_freq)
 
     /* 9. Change CPU CLK to PLL */
     if(pll == SYSCTL_PLL0)
+    {
         sysctl_clock_set_clock_select(SYSCTL_CLOCK_SELECT_ACLK, SYSCTL_SOURCE_PLL0);
-
+    }
     return result;
 }
 
@@ -1833,7 +1804,8 @@ uint32_t sysctl_cpu_set_freq(uint32_t freq)
     if(freq == 0)
         return 0;
 
-    return sysctl_pll_set_freq(SYSCTL_PLL0, (sysctl->clk_sel0.aclk_divider_sel + 1) * 2 * freq);
+    cpu_freq = sysctl_pll_set_freq(SYSCTL_PLL0, (sysctl->clk_sel0.aclk_divider_sel + 1) * 2 * freq);
+    return cpu_freq;
 }
 
 void sysctl_enable_irq(void)
@@ -1865,16 +1837,13 @@ sysctl_reset_enum_status_t sysctl_get_reset_status(void)
     if(sysctl->reset_status.wdt0_reset_sts)
     {
         s_reset_status = SYSCTL_RESET_STATUS_WDT0;
-    }
-    else if(sysctl->reset_status.wdt1_reset_sts)
+    } else if(sysctl->reset_status.wdt1_reset_sts)
     {
         s_reset_status = SYSCTL_RESET_STATUS_WDT1;
-    }
-    else if(sysctl->reset_status.soft_reset_sts)
+    } else if(sysctl->reset_status.soft_reset_sts)
     {
         s_reset_status = SYSCTL_RESET_STATUS_SOFT;
-    }
-    else
+    } else
     {
         s_reset_status = SYSCTL_RESET_STATUS_HARD;
     }
@@ -1882,4 +1851,3 @@ sysctl_reset_enum_status_t sysctl_get_reset_status(void)
 
     return s_reset_status;
 }
-
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/sysctl.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_sysctl.h
old mode 100644
new mode 100755
similarity index 97%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/sysctl.h
rename to Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_sysctl.h
index 610de1c71..625a3f3e3
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/sysctl.h
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_sysctl.h
@@ -12,26 +12,35 @@
  * See the License for the specific language governing permissions and
  * limitations under the License.
  */
-
-/**
-* @file sysctl.h
-* @brief kendryte k210 source code
-*                https://github.com/kendryte/kendryte-standalone-sdk.git
-* @version 1.0
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
-
 #ifndef _DRIVER_SYSCTL_H
 #define _DRIVER_SYSCTL_H
 
 #include <stdint.h>
-#include "platform.h"
+#include "encoding.h"
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
+#define K210_SYSCTL_PLL0  (K210_SYSCTL_BASE + 0x08)
+#define K210_SYSCTL_PLL1  (K210_SYSCTL_BASE + 0x0c)
+#define K210_SYSCTL_PLL2  (K210_SYSCTL_BASE + 0x10)
+#define K210_SYSCTL_LOCK  (K210_SYSCTL_BASE + 0x18)
+#define K210_SYSCTL_SEL0  (K210_SYSCTL_BASE + 0x20)
+#define K210_SYSCTL_SEL1  (K210_SYSCTL_BASE + 0x24)
+#define K210_SYSCTL_EN    (K210_SYSCTL_BASE + 0x28)
+
+#define PLL_CLK_R(n)  (n & 0x00000f)
+#define PLL_CLK_F(n)  ((n & 0x0003f0) >> 4)
+#define PLL_CLK_OD(n) ((n & 0x003c00) >> 10)
+
+#define K210_SYSCTL_CLKSEL0  (K210_SYSCTL_BASE + 0x20)
+#define K210_SYSCTL_CLK_EN  (K210_SYSCTL_BASE + 0x2c)
+
+#define CLKSEL0_ACLK_SEL(n) (n & 0x00000001)
+
+#define SYSCTL_BASE_ADDR    (0x50440000U)
+
 /**
  * @brief      System controller register
  *
@@ -668,7 +677,7 @@ typedef struct _sysctl_misc
 {
     uint32_t debug_sel : 6;
     uint32_t reserved0 : 4;
-    uint32_t spi_dvp_data_enable: 1;
+    uint32_t spi_dvp_data_enable : 1;
     uint32_t reserved1 : 21;
 } __attribute__((packed, aligned(4))) sysctl_misc_t;
 
@@ -1036,7 +1045,7 @@ void sysctl_set_power_mode(sysctl_power_bank_t power_bank, sysctl_io_power_mode_
 
 /**
  * @brief       get the frequency of CPU
- * 
+ *
  * @return      The frequency of CPU
  */
 uint32_t sysctl_cpu_get_freq(void);
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_systemreset.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_systemreset.c
new file mode 100644
index 000000000..ce7fe7fe1
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/k210_systemreset.c
@@ -0,0 +1,63 @@
+/*
+* Copyright (c) 2020 AIIT XUOS Lab
+* XiOS is licensed under Mulan PSL v2.
+* You can use this software according to the terms and conditions of the Mulan PSL v2.
+* You may obtain a copy of Mulan PSL v2 at:
+*        http://license.coscl.org.cn/MulanPSL2
+* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+* See the Mulan PSL v2 for more details.
+*/
+
+/**
+ * @file k210_systemreset.c
+ * @briefk210_systemreset.c support reboot
+ * @version 1.0
+ * @author AIIT XUOS Lab
+ * @date 2022.06.27
+ */
+
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+
+#include <nuttx/arch.h>
+#include <nuttx/board.h>
+
+#include "riscv_internal.h"
+#include "hardware/k210_memorymap.h"
+ 
+typedef struct _k210_soft_reset
+{
+  uint32_t soft_reset : 1;
+  uint32_t reserved : 31;
+} __attribute__((packed, aligned(4))) k210_soft_reset_t;
+
+volatile k210_soft_reset_t *const reset = (volatile k210_soft_reset_t *)(K210_SYSCTL_BASE + 0x30);
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_systemreset
+ *
+ * Description:
+ *   Internal reset logic.
+ *
+ ****************************************************************************/
+
+void up_systemreset(void)
+{
+  reset->soft_reset = 1;
+
+  /* Wait for the reset */
+
+  for (; ; );
+}
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/platform.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/platform.h
deleted file mode 100644
index d35153d64..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/platform.h
+++ /dev/null
@@ -1,108 +0,0 @@
-/* Copyright 2018 Canaan Inc.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
-* @file platform.h
-* @brief kendryte k210 source code
-*                https://github.com/kendryte/kendryte-standalone-sdk.git
-* @version 1.0
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
-
-#ifndef _BSP_PLATFORM_H
-#define _BSP_PLATFORM_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* clang-format off */
-/* Register base address */
-
-/* Under Coreplex */
-#define CLINT_BASE_ADDR     (0x02000000U)
-#define PLIC_BASE_ADDR      (0x0C000000U)
-
-/* Under TileLink */
-#define UARTHS_BASE_ADDR    (0x38000000U)
-#define GPIOHS_BASE_ADDR    (0x38001000U)
-
-/* Under AXI 64 bit */
-#define RAM_BASE_ADDR       (0x80000000U)
-//#define RAM_SIZE            (6 * 1024 * 1024U)
-
-#define IO_BASE_ADDR        (0x40000000U)
-#define IO_SIZE             (6 * 1024 * 1024U)
-
-#define AI_RAM_BASE_ADDR    (0x80600000U)
-#define AI_RAM_SIZE         (2 * 1024 * 1024U)
-
-#define AI_IO_BASE_ADDR     (0x40600000U)
-#define AI_IO_SIZE          (2 * 1024 * 1024U)
-
-#define AI_BASE_ADDR        (0x40800000U)
-#define AI_SIZE             (12 * 1024 * 1024U)
-
-#define FFT_BASE_ADDR       (0x42000000U)
-#define FFT_SIZE            (4 * 1024 * 1024U)
-
-#define ROM_BASE_ADDR       (0x88000000U)
-#define ROM_SIZE            (128 * 1024U)
-
-/* Under AHB 32 bit */
-#define DMAC_BASE_ADDR      (0x50000000U)
-
-/* Under APB1 32 bit */
-#define GPIO_BASE_ADDR      (0x50200000U)
-#define UART1_BASE_ADDR     (0x50210000U)
-#define UART2_BASE_ADDR     (0x50220000U)
-#define UART3_BASE_ADDR     (0x50230000U)
-#define SPI_SLAVE_BASE_ADDR (0x50240000U)
-#define I2S0_BASE_ADDR      (0x50250000U)
-#define I2S1_BASE_ADDR      (0x50260000U)
-#define I2S2_BASE_ADDR      (0x50270000U)
-#define I2C0_BASE_ADDR      (0x50280000U)
-#define I2C1_BASE_ADDR      (0x50290000U)
-#define I2C2_BASE_ADDR      (0x502A0000U)
-#define FPIOA_BASE_ADDR     (0x502B0000U)
-#define SHA256_BASE_ADDR    (0x502C0000U)
-#define TIMER0_BASE_ADDR    (0x502D0000U)
-#define TIMER1_BASE_ADDR    (0x502E0000U)
-#define TIMER2_BASE_ADDR    (0x502F0000U)
-
-/* Under APB2 32 bit */
-#define WDT0_BASE_ADDR      (0x50400000U)
-#define WDT1_BASE_ADDR      (0x50410000U)
-#define OTP_BASE_ADDR       (0x50420000U)
-#define DVP_BASE_ADDR       (0x50430000U)
-#define SYSCTL_BASE_ADDR    (0x50440000U)
-#define AES_BASE_ADDR       (0x50450000U)
-#define RTC_BASE_ADDR       (0x50460000U)
-
-
-/* Under APB3 32 bit */
-#define SPI0_BASE_ADDR      (0x52000000U)
-#define SPI1_BASE_ADDR      (0x53000000U)
-#define SPI3_BASE_ADDR      (0x54000000U)
-
-/* clang-format on */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* _BSP_PLATFORM_H */
-
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/plic.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/plic.c
deleted file mode 100644
index 8df30c737..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/plic.c
+++ /dev/null
@@ -1,219 +0,0 @@
-/* Copyright 2018 Canaan Inc.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
-* @file plic.c
-* @brief kendryte k210 source code
-*                https://github.com/kendryte/kendryte-standalone-sdk.git
-* @version 1.0
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
-
-#include <stddef.h>
-#include <stdint.h>
-#include "encoding.h"
-#include "plic.h"
-#include "syscalls.h"
-#include "syslog.h"
-
-volatile plic_t* const plic = (volatile plic_t*)PLIC_BASE_ADDR;
-
-static plic_instance_t plic_instance[PLIC_NUM_CORES][IRQN_MAX];
-
-void plic_init(void)
-{
-    int i = 0;
-
-    /* Get current core id */
-    unsigned long core_id = current_coreid();
-
-    /* Disable all interrupts for the current core. */
-    for (i = 0; i < ((PLIC_NUM_SOURCES + 32u) / 32u); i++)
-        plic->target_enables.target[core_id].enable[i] = 0;
-
-    static uint8_t s_plic_priorities_init_flag = 0;
-    /* Set priorities to zero. */
-    if(s_plic_priorities_init_flag == 0)
-    {
-        for (i = 0; i < PLIC_NUM_SOURCES; i++)
-            plic->source_priorities.priority[i] = 0;
-        s_plic_priorities_init_flag = 1;
-    }
-
-    /* Set the threshold to zero. */
-    plic->targets.target[core_id].priority_threshold = 0;
-
-    /* Clear PLIC instance for every cores */
-    for (i = 0; i < IRQN_MAX; i++)
-    {
-        /* clang-format off */
-        plic_instance[core_id][i] = (const plic_instance_t){
-            .callback = NULL,
-            .ctx      = NULL,
-        };
-        /* clang-format on */
-    }
-
-    /*
-     * A successful claim will also atomically clear the corresponding
-     * pending bit on the interrupt source. A target can perform a claim
-     * at any time, even if the EIP is not set.
-     */
-    i = 0;
-    while (plic->targets.target[core_id].claim_complete > 0 && i < 100)
-    {
-        /* This loop will clear pending bit on the interrupt source */
-        i++;
-    }
-
-    /* Enable machine external interrupts. */
-    set_csr(mie, MIP_MEIP);
-}
-
-int plic_irq_enable(plic_irq_t irq_number)
-{
-    /* Check parameters */
-    if (PLIC_NUM_SOURCES < irq_number || 0 > irq_number)
-        return -1;
-    unsigned long core_id = current_coreid();
-    /* Get current enable bit array by IRQ number */
-    uint32_t current = plic->target_enables.target[core_id].enable[irq_number / 32];
-    /* Set enable bit in enable bit array */
-    current |= (uint32_t)1 << (irq_number % 32);
-    /* Write back the enable bit array */
-    plic->target_enables.target[core_id].enable[irq_number / 32] = current;
-    return 0;
-}
-
-int plic_irq_disable(plic_irq_t irq_number)
-{
-    /* Check parameters */
-    if (PLIC_NUM_SOURCES < irq_number || 0 > irq_number)
-        return -1;
-    unsigned long core_id = current_coreid();
-    /* Get current enable bit array by IRQ number */
-    uint32_t current = plic->target_enables.target[core_id].enable[irq_number / 32];
-    /* Clear enable bit in enable bit array */
-    current &= ~((uint32_t)1 << (irq_number % 32));
-    /* Write back the enable bit array */
-    plic->target_enables.target[core_id].enable[irq_number / 32] = current;
-    return 0;
-}
-
-int plic_set_priority(plic_irq_t irq_number, uint32_t priority)
-{
-    /* Check parameters */
-    if (PLIC_NUM_SOURCES < irq_number || 0 > irq_number)
-        return -1;
-    /* Set interrupt priority by IRQ number */
-    plic->source_priorities.priority[irq_number] = priority;
-    return 0;
-}
-
-uint32_t plic_get_priority(plic_irq_t irq_number)
-{
-    /* Check parameters */
-    if (PLIC_NUM_SOURCES < irq_number || 0 > irq_number)
-        return 0;
-    /* Get interrupt priority by IRQ number */
-    return plic->source_priorities.priority[irq_number];
-}
-
-uint32_t plic_irq_claim(void)
-{
-    unsigned long core_id = current_coreid();
-    /* Perform IRQ claim */
-    return plic->targets.target[core_id].claim_complete;
-}
-
-int plic_irq_complete(uint32_t source)
-{
-    unsigned long core_id = current_coreid();
-    /* Perform IRQ complete */
-    plic->targets.target[core_id].claim_complete = source;
-    return 0;
-}
-
-void plic_irq_register(plic_irq_t irq, plic_irq_callback_t callback, void *ctx)
-{
-    /* Read core id */
-    unsigned long core_id = current_coreid();
-    /* Set user callback function */
-    plic_instance[core_id][irq].callback = callback;
-    /* Assign user context */
-    plic_instance[core_id][irq].ctx = ctx;
-}
-
-void plic_irq_unregister(plic_irq_t irq)
-{
-    /* Just assign NULL to user callback function and context */
-    plic_irq_register(irq, NULL, NULL);
-}
-
-void __attribute__((weak, alias("plic_irq_unregister"))) plic_irq_deregister(plic_irq_t irq);
-
-plic_instance_t (*plic_get_instance(void))[IRQN_MAX]
-{
-    return plic_instance;
-}
-
-/*Entry Point for PLIC Interrupt Handler*/
-uintptr_t __attribute__((weak))
-handle_irq_m_ext(uintptr_t cause, uintptr_t epc)
-{
-    /*
-     * After the highest-priority pending interrupt is claimed by a target
-     * and the corresponding IP bit is cleared, other lower-priority
-     * pending interrupts might then become visible to the target, and so
-     * the PLIC EIP bit might not be cleared after a claim. The interrupt
-     * handler can check the local meip/heip/seip/ueip bits before exiting
-     * the handler, to allow more efficient service of other interrupts
-     * without first restoring the interrupted context and taking another
-     * interrupt trap.
-     */
-    if (read_csr(mip) & MIP_MEIP)
-    {
-        /* Get current core id */
-        uint64_t core_id = current_coreid();
-        /* Get primitive interrupt enable flag */
-        uint64_t ie_flag = read_csr(mie);
-        /* Get current IRQ num */
-        uint32_t int_num = plic->targets.target[core_id].claim_complete;
-        /* Get primitive IRQ threshold */
-        uint32_t int_threshold = plic->targets.target[core_id].priority_threshold;
-        /* Set new IRQ threshold = current IRQ threshold */
-        plic->targets.target[core_id].priority_threshold = plic->source_priorities.priority[int_num];
-        /* Disable software interrupt and timer interrupt */
-        clear_csr(mie, MIP_MTIP | MIP_MSIP);
-        /* Enable global interrupt */
-        set_csr(mstatus, MSTATUS_MIE);
-        if (plic_instance[core_id][int_num].callback)
-            plic_instance[core_id][int_num].callback(
-                plic_instance[core_id][int_num].ctx);
-        /* Perform IRQ complete */
-        plic->targets.target[core_id].claim_complete = int_num;
-        /* Disable global interrupt */
-        clear_csr(mstatus, MSTATUS_MIE);
-        /* Set MPIE and MPP flag used to MRET instructions restore MIE flag */
-        set_csr(mstatus, MSTATUS_MPIE | MSTATUS_MPP);
-        /* Restore primitive interrupt enable flag */
-        write_csr(mie, ie_flag);
-        /* Restore primitive IRQ threshold */
-        plic->targets.target[core_id].priority_threshold = int_threshold;
-    }
-
-    return epc;
-}
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/plic.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/plic.h
deleted file mode 100644
index 924b6812a..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/plic.h
+++ /dev/null
@@ -1,508 +0,0 @@
-/* Copyright 2018 Canaan Inc.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-/**
- * @file
- * @brief      The PLIC complies with the RISC-V Privileged Architecture
- *             specification, and can support a maximum of 1023 external
- *             interrupt sources targeting up to 15,872 core contexts.
- *
- * @note       PLIC RAM Layout
- *
- * | Address   | Description                     |
- * |-----------|---------------------------------|
- * |0x0C000000 | Reserved                        |
- * |0x0C000004 | source 1 priority               |
- * |0x0C000008 | source 2 priority               |
- * |...        | ...                             |
- * |0x0C000FFC | source 1023 priority            |
- * |           |                                 |
- * |0x0C001000 | Start of pending array          |
- * |...        | (read-only)                     |
- * |0x0C00107C | End of pending array            |
- * |0x0C001080 | Reserved                        |
- * |...        | ...                             |
- * |0x0C001FFF | Reserved                        |
- * |           |                                 |
- * |0x0C002000 | target 0 enables                |
- * |0x0C002080 | target 1 enables                |
- * |...        | ...                             |
- * |0x0C1F1F80 | target 15871 enables            |
- * |0x0C1F2000 | Reserved                        |
- * |...        | ...                             |
- * |0x0C1FFFFC | Reserved                        |
- * |           |                                 |
- * |0x0C200000 | target 0 priority threshold     |
- * |0x0C200004 | target 0 claim/complete         |
- * |...        | ...                             |
- * |0x0C201000 | target 1 priority threshold     |
- * |0x0C201004 | target 1 claim/complete         |
- * |...        | ...                             |
- * |0x0FFFF000 | target 15871 priority threshold |
- * |0x0FFFF004 | target 15871 claim/complete     |
- *
- */
-
-/**
-* @file plic.h
-* @brief kendryte k210 source code
-*                https://github.com/kendryte/kendryte-standalone-sdk.git
-* @version 1.0
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
-
-#ifndef _DRIVER_PLIC_H
-#define _DRIVER_PLIC_H
-
-#include <stdint.h>
-#include "encoding.h"
-#include "platform.h"
-
-/* For c++ compatibility */
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* clang-format off */
-/* IRQ number settings */
-#define PLIC_NUM_SOURCES    (IRQN_MAX - 1)
-#define PLIC_NUM_PRIORITIES (7)
-
-/* Real number of cores */
-#define PLIC_NUM_CORES      (2)
-/* clang-format on */
-
-/**
- * @brief       PLIC External Interrupt Numbers
- *
- * @note        PLIC interrupt sources
- *
- * | Source | Name                     | Description                        |
- * |--------|--------------------------|------------------------------------|
- * | 0      | IRQN_NO_INTERRUPT        | The non-existent interrupt         |
- * | 1      | IRQN_SPI0_INTERRUPT      | SPI0 interrupt                     |
- * | 2      | IRQN_SPI1_INTERRUPT      | SPI1 interrupt                     |
- * | 3      | IRQN_SPI_SLAVE_INTERRUPT | SPI_SLAVE interrupt                |
- * | 4      | IRQN_SPI3_INTERRUPT      | SPI3 interrupt                     |
- * | 5      | IRQN_I2S0_INTERRUPT      | I2S0 interrupt                     |
- * | 6      | IRQN_I2S1_INTERRUPT      | I2S1 interrupt                     |
- * | 7      | IRQN_I2S2_INTERRUPT      | I2S2 interrupt                     |
- * | 8      | IRQN_I2C0_INTERRUPT      | I2C0 interrupt                     |
- * | 9      | IRQN_I2C1_INTERRUPT      | I2C1 interrupt                     |
- * | 10     | IRQN_I2C2_INTERRUPT      | I2C2 interrupt                     |
- * | 11     | IRQN_UART1_INTERRUPT     | UART1 interrupt                    |
- * | 12     | IRQN_UART2_INTERRUPT     | UART2 interrupt                    |
- * | 13     | IRQN_UART3_INTERRUPT     | UART3 interrupt                    |
- * | 14     | IRQN_TIMER0A_INTERRUPT   | TIMER0 channel 0 or 1 interrupt    |
- * | 15     | IRQN_TIMER0B_INTERRUPT   | TIMER0 channel 2 or 3 interrupt    |
- * | 16     | IRQN_TIMER1A_INTERRUPT   | TIMER1 channel 0 or 1 interrupt    |
- * | 17     | IRQN_TIMER1B_INTERRUPT   | TIMER1 channel 2 or 3 interrupt    |
- * | 18     | IRQN_TIMER2A_INTERRUPT   | TIMER2 channel 0 or 1 interrupt    |
- * | 19     | IRQN_TIMER2B_INTERRUPT   | TIMER2 channel 2 or 3 interrupt    |
- * | 20     | IRQN_RTC_INTERRUPT       | RTC tick and alarm interrupt       |
- * | 21     | IRQN_WDT0_INTERRUPT      | Watching dog timer0 interrupt      |
- * | 22     | IRQN_WDT1_INTERRUPT      | Watching dog timer1 interrupt      |
- * | 23     | IRQN_APB_GPIO_INTERRUPT  | APB GPIO interrupt                 |
- * | 24     | IRQN_DVP_INTERRUPT       | Digital video port interrupt       |
- * | 25     | IRQN_AI_INTERRUPT        | AI accelerator interrupt           |
- * | 26     | IRQN_FFT_INTERRUPT       | FFT accelerator interrupt          |
- * | 27     | IRQN_DMA0_INTERRUPT      | DMA channel0 interrupt             |
- * | 28     | IRQN_DMA1_INTERRUPT      | DMA channel1 interrupt             |
- * | 29     | IRQN_DMA2_INTERRUPT      | DMA channel2 interrupt             |
- * | 30     | IRQN_DMA3_INTERRUPT      | DMA channel3 interrupt             |
- * | 31     | IRQN_DMA4_INTERRUPT      | DMA channel4 interrupt             |
- * | 32     | IRQN_DMA5_INTERRUPT      | DMA channel5 interrupt             |
- * | 33     | IRQN_UARTHS_INTERRUPT    | Hi-speed UART0 interrupt           |
- * | 34     | IRQN_GPIOHS0_INTERRUPT   | Hi-speed GPIO0 interrupt           |
- * | 35     | IRQN_GPIOHS1_INTERRUPT   | Hi-speed GPIO1 interrupt           |
- * | 36     | IRQN_GPIOHS2_INTERRUPT   | Hi-speed GPIO2 interrupt           |
- * | 37     | IRQN_GPIOHS3_INTERRUPT   | Hi-speed GPIO3 interrupt           |
- * | 38     | IRQN_GPIOHS4_INTERRUPT   | Hi-speed GPIO4 interrupt           |
- * | 39     | IRQN_GPIOHS5_INTERRUPT   | Hi-speed GPIO5 interrupt           |
- * | 40     | IRQN_GPIOHS6_INTERRUPT   | Hi-speed GPIO6 interrupt           |
- * | 41     | IRQN_GPIOHS7_INTERRUPT   | Hi-speed GPIO7 interrupt           |
- * | 42     | IRQN_GPIOHS8_INTERRUPT   | Hi-speed GPIO8 interrupt           |
- * | 43     | IRQN_GPIOHS9_INTERRUPT   | Hi-speed GPIO9 interrupt           |
- * | 44     | IRQN_GPIOHS10_INTERRUPT  | Hi-speed GPIO10 interrupt          |
- * | 45     | IRQN_GPIOHS11_INTERRUPT  | Hi-speed GPIO11 interrupt          |
- * | 46     | IRQN_GPIOHS12_INTERRUPT  | Hi-speed GPIO12 interrupt          |
- * | 47     | IRQN_GPIOHS13_INTERRUPT  | Hi-speed GPIO13 interrupt          |
- * | 48     | IRQN_GPIOHS14_INTERRUPT  | Hi-speed GPIO14 interrupt          |
- * | 49     | IRQN_GPIOHS15_INTERRUPT  | Hi-speed GPIO15 interrupt          |
- * | 50     | IRQN_GPIOHS16_INTERRUPT  | Hi-speed GPIO16 interrupt          |
- * | 51     | IRQN_GPIOHS17_INTERRUPT  | Hi-speed GPIO17 interrupt          |
- * | 52     | IRQN_GPIOHS18_INTERRUPT  | Hi-speed GPIO18 interrupt          |
- * | 53     | IRQN_GPIOHS19_INTERRUPT  | Hi-speed GPIO19 interrupt          |
- * | 54     | IRQN_GPIOHS20_INTERRUPT  | Hi-speed GPIO20 interrupt          |
- * | 55     | IRQN_GPIOHS21_INTERRUPT  | Hi-speed GPIO21 interrupt          |
- * | 56     | IRQN_GPIOHS22_INTERRUPT  | Hi-speed GPIO22 interrupt          |
- * | 57     | IRQN_GPIOHS23_INTERRUPT  | Hi-speed GPIO23 interrupt          |
- * | 58     | IRQN_GPIOHS24_INTERRUPT  | Hi-speed GPIO24 interrupt          |
- * | 59     | IRQN_GPIOHS25_INTERRUPT  | Hi-speed GPIO25 interrupt          |
- * | 60     | IRQN_GPIOHS26_INTERRUPT  | Hi-speed GPIO26 interrupt          |
- * | 61     | IRQN_GPIOHS27_INTERRUPT  | Hi-speed GPIO27 interrupt          |
- * | 62     | IRQN_GPIOHS28_INTERRUPT  | Hi-speed GPIO28 interrupt          |
- * | 63     | IRQN_GPIOHS29_INTERRUPT  | Hi-speed GPIO29 interrupt          |
- * | 64     | IRQN_GPIOHS30_INTERRUPT  | Hi-speed GPIO30 interrupt          |
- * | 65     | IRQN_GPIOHS31_INTERRUPT  | Hi-speed GPIO31 interrupt          |
- *
- */
-/* clang-format off */
-typedef enum _plic_irq
-{
-    IRQN_NO_INTERRUPT        = 0, /*!< The non-existent interrupt */
-    IRQN_SPI0_INTERRUPT      = 1, /*!< SPI0 interrupt */
-    IRQN_SPI1_INTERRUPT      = 2, /*!< SPI1 interrupt */
-    IRQN_SPI_SLAVE_INTERRUPT = 3, /*!< SPI_SLAVE interrupt */
-    IRQN_SPI3_INTERRUPT      = 4, /*!< SPI3 interrupt */
-    IRQN_I2S0_INTERRUPT      = 5, /*!< I2S0 interrupt */
-    IRQN_I2S1_INTERRUPT      = 6, /*!< I2S1 interrupt */
-    IRQN_I2S2_INTERRUPT      = 7, /*!< I2S2 interrupt */
-    IRQN_I2C0_INTERRUPT      = 8, /*!< I2C0 interrupt */
-    IRQN_I2C1_INTERRUPT      = 9, /*!< I2C1 interrupt */
-    IRQN_I2C2_INTERRUPT      = 10, /*!< I2C2 interrupt */
-    IRQN_UART1_INTERRUPT     = 11, /*!< UART1 interrupt */
-    IRQN_UART2_INTERRUPT     = 12, /*!< UART2 interrupt */
-    IRQN_UART3_INTERRUPT     = 13, /*!< UART3 interrupt */
-    IRQN_TIMER0A_INTERRUPT   = 14, /*!< TIMER0 channel 0 or 1 interrupt */
-    IRQN_TIMER0B_INTERRUPT   = 15, /*!< TIMER0 channel 2 or 3 interrupt */
-    IRQN_TIMER1A_INTERRUPT   = 16, /*!< TIMER1 channel 0 or 1 interrupt */
-    IRQN_TIMER1B_INTERRUPT   = 17, /*!< TIMER1 channel 2 or 3 interrupt */
-    IRQN_TIMER2A_INTERRUPT   = 18, /*!< TIMER2 channel 0 or 1 interrupt */
-    IRQN_TIMER2B_INTERRUPT   = 19, /*!< TIMER2 channel 2 or 3 interrupt */
-    IRQN_RTC_INTERRUPT       = 20, /*!< RTC tick and alarm interrupt */
-    IRQN_WDT0_INTERRUPT      = 21, /*!< Watching dog timer0 interrupt */
-    IRQN_WDT1_INTERRUPT      = 22, /*!< Watching dog timer1 interrupt */
-    IRQN_APB_GPIO_INTERRUPT  = 23, /*!< APB GPIO interrupt */
-    IRQN_DVP_INTERRUPT       = 24, /*!< Digital video port interrupt */
-    IRQN_AI_INTERRUPT        = 25, /*!< AI accelerator interrupt */
-    IRQN_FFT_INTERRUPT       = 26, /*!< FFT accelerator interrupt */
-    IRQN_DMA0_INTERRUPT      = 27, /*!< DMA channel0 interrupt */
-    IRQN_DMA1_INTERRUPT      = 28, /*!< DMA channel1 interrupt */
-    IRQN_DMA2_INTERRUPT      = 29, /*!< DMA channel2 interrupt */
-    IRQN_DMA3_INTERRUPT      = 30, /*!< DMA channel3 interrupt */
-    IRQN_DMA4_INTERRUPT      = 31, /*!< DMA channel4 interrupt */
-    IRQN_DMA5_INTERRUPT      = 32, /*!< DMA channel5 interrupt */
-    IRQN_UARTHS_INTERRUPT    = 33, /*!< Hi-speed UART0 interrupt */
-    IRQN_GPIOHS0_INTERRUPT   = 34, /*!< Hi-speed GPIO0 interrupt */
-    IRQN_GPIOHS1_INTERRUPT   = 35, /*!< Hi-speed GPIO1 interrupt */
-    IRQN_GPIOHS2_INTERRUPT   = 36, /*!< Hi-speed GPIO2 interrupt */
-    IRQN_GPIOHS3_INTERRUPT   = 37, /*!< Hi-speed GPIO3 interrupt */
-    IRQN_GPIOHS4_INTERRUPT   = 38, /*!< Hi-speed GPIO4 interrupt */
-    IRQN_GPIOHS5_INTERRUPT   = 39, /*!< Hi-speed GPIO5 interrupt */
-    IRQN_GPIOHS6_INTERRUPT   = 40, /*!< Hi-speed GPIO6 interrupt */
-    IRQN_GPIOHS7_INTERRUPT   = 41, /*!< Hi-speed GPIO7 interrupt */
-    IRQN_GPIOHS8_INTERRUPT   = 42, /*!< Hi-speed GPIO8 interrupt */
-    IRQN_GPIOHS9_INTERRUPT   = 43, /*!< Hi-speed GPIO9 interrupt */
-    IRQN_GPIOHS10_INTERRUPT  = 44, /*!< Hi-speed GPIO10 interrupt */
-    IRQN_GPIOHS11_INTERRUPT  = 45, /*!< Hi-speed GPIO11 interrupt */
-    IRQN_GPIOHS12_INTERRUPT  = 46, /*!< Hi-speed GPIO12 interrupt */
-    IRQN_GPIOHS13_INTERRUPT  = 47, /*!< Hi-speed GPIO13 interrupt */
-    IRQN_GPIOHS14_INTERRUPT  = 48, /*!< Hi-speed GPIO14 interrupt */
-    IRQN_GPIOHS15_INTERRUPT  = 49, /*!< Hi-speed GPIO15 interrupt */
-    IRQN_GPIOHS16_INTERRUPT  = 50, /*!< Hi-speed GPIO16 interrupt */
-    IRQN_GPIOHS17_INTERRUPT  = 51, /*!< Hi-speed GPIO17 interrupt */
-    IRQN_GPIOHS18_INTERRUPT  = 52, /*!< Hi-speed GPIO18 interrupt */
-    IRQN_GPIOHS19_INTERRUPT  = 53, /*!< Hi-speed GPIO19 interrupt */
-    IRQN_GPIOHS20_INTERRUPT  = 54, /*!< Hi-speed GPIO20 interrupt */
-    IRQN_GPIOHS21_INTERRUPT  = 55, /*!< Hi-speed GPIO21 interrupt */
-    IRQN_GPIOHS22_INTERRUPT  = 56, /*!< Hi-speed GPIO22 interrupt */
-    IRQN_GPIOHS23_INTERRUPT  = 57, /*!< Hi-speed GPIO23 interrupt */
-    IRQN_GPIOHS24_INTERRUPT  = 58, /*!< Hi-speed GPIO24 interrupt */
-    IRQN_GPIOHS25_INTERRUPT  = 59, /*!< Hi-speed GPIO25 interrupt */
-    IRQN_GPIOHS26_INTERRUPT  = 60, /*!< Hi-speed GPIO26 interrupt */
-    IRQN_GPIOHS27_INTERRUPT  = 61, /*!< Hi-speed GPIO27 interrupt */
-    IRQN_GPIOHS28_INTERRUPT  = 62, /*!< Hi-speed GPIO28 interrupt */
-    IRQN_GPIOHS29_INTERRUPT  = 63, /*!< Hi-speed GPIO29 interrupt */
-    IRQN_GPIOHS30_INTERRUPT  = 64, /*!< Hi-speed GPIO30 interrupt */
-    IRQN_GPIOHS31_INTERRUPT  = 65, /*!< Hi-speed GPIO31 interrupt */
-    IRQN_MAX
-} plic_irq_t;
-/* clang-format on */
-
-/**
- * @brief      Interrupt Source Priorities
- *
- *             Each external interrupt source can be assigned a priority by
- *             writing to its 32-bit memory-mapped priority register. The
- *             number and value of supported priority levels can vary by
- *             implementa- tion, with the simplest implementations having all
- *             devices hardwired at priority 1, in which case, interrupts with
- *             the lowest ID have the highest effective priority. The priority
- *             registers are all WARL.
- */
-typedef struct _plic_source_priorities
-{
-    /* 0x0C000000: Reserved, 0x0C000004-0x0C000FFC: 1-1023 priorities */
-    uint32_t priority[1024];
-} __attribute__((packed, aligned(4))) plic_source_priorities_t;
-
-/**
- * @brief       Interrupt Pending Bits
- *
- *              The current status of the interrupt source pending bits in the
- *              PLIC core can be read from the pending array, organized as 32
- *              words of 32 bits. The pending bit for interrupt ID N is stored
- *              in bit (N mod 32) of word (N/32). Bit 0 of word 0, which
- *              represents the non-existent interrupt source 0, is always
- *              hardwired to zero. The pending bits are read-only. A pending
- *              bit in the PLIC core can be cleared by setting enable bits to
- *              only enable the desired interrupt, then performing a claim. A
- *              pending bit can be set by instructing the associated gateway to
- *              send an interrupt service request.
- */
-typedef struct _plic_pending_bits
-{
-    /* 0x0C001000-0x0C00107C: Bit 0 is zero, Bits 1-1023 is pending bits */
-    uint32_t u32[32];
-    /* 0x0C001080-0x0C001FFF: Reserved */
-    uint8_t resv[0xF80];
-} __attribute__((packed, aligned(4))) plic_pending_bits_t;
-
-/**
- * @brief       Target Interrupt Enables
- *
- *              For each interrupt target, each device鈥檚 interrupt can be
- *              enabled by setting the corresponding bit in that target鈥檚
- *              enables registers. The enables for a target are accessed as a
- *              contiguous array of 32脳32-bit words, packed the same way as the
- *              pending bits. For each target, bit 0 of enable word 0
- *              represents the non-existent interrupt ID 0 and is hardwired to
- *              0. Unused interrupt IDs are also hardwired to zero. The enables
- *              arrays for different targets are packed contiguously in the
- *              address space. Only 32-bit word accesses are supported by the
- *              enables array in RV32 systems. Implementations can trap on
- *              accesses to enables for non-existent targets, but must allow
- *              access to the full enables array for any extant target,
- *              treating all non-existent interrupt source鈥檚 enables as
- *              hardwired to zero.
- */
-typedef struct _plic_target_enables
-{
-    /* 0x0C002000-0x0C1F1F80: target 0-15871 enables */
-    struct
-    {
-        uint32_t enable[32 * 2];/* Offset 0x00-0x7C: Bit 0 is zero, Bits 1-1023 is bits*/
-    } target[15872 / 2];
-
-    /* 0x0C1F2000-0x0C1FFFFC: Reserved, size 0xE000 */
-    uint8_t resv[0xE000];
-} __attribute__((packed, aligned(4))) plic_target_enables_t;
-
-/**
- * @brief       PLIC Targets
- *
- *              Target Priority Thresholds The threshold for a pending
- *              interrupt priority that can interrupt each target can be set in
- *              the target鈥檚 threshold register. The threshold is a WARL field,
- *              where different implementations can support different numbers
- *              of thresholds. The simplest implementation has a threshold
- *              hardwired to zero.
- *
- *              Target Claim Each target can perform a claim by reading the
- *              claim/complete register, which returns the ID of the highest
- *              priority pending interrupt or zero if there is no pending
- *              interrupt for the target. A successful claim will also
- *              atomically clear the corresponding pending bit on the interrupt
- *              source. A target can perform a claim at any time, even if the
- *              EIP is not set. The claim operation is not affected by the
- *              setting of the target鈥檚 priority threshold register.
- *
- *              Target Completion A target signals it has completed running a
- *              handler by writing the interrupt ID it received from the claim
- *              to the claim/complete register. This is routed to the
- *              corresponding interrupt gateway, which can now send another
- *              interrupt request to the PLIC. The PLIC does not check whether
- *              the completion ID is the same as the last claim ID for that
- *              target. If the completion ID does not match an interrupt source
- *              that is currently enabled for the target, the completion is
- *              silently ignored.
- */
-typedef struct _plic_target
-{
-    /* 0x0C200000-0x0FFFF004: target 0-15871 */
-    struct {
-        uint32_t priority_threshold;/* Offset 0x000 */
-        uint32_t claim_complete;    /* Offset 0x004 */
-        uint8_t resv[0x1FF8];        /* Offset 0x008, Size 0xFF8 */
-    } target[15872 / 2];
-} __attribute__((packed, aligned(4))) plic_target_t;
-
-/**
- * @brief       Platform-Level Interrupt Controller
- *
- *              PLIC is Platform-Level Interrupt Controller. The PLIC complies
- *              with the RISC-V Privileged Architecture specification, and can
- *              support a maximum of 1023 external interrupt sources targeting
- *              up to 15,872 core contexts.
- */
-typedef struct _plic
-{
-    /* 0x0C000000-0x0C000FFC */
-    plic_source_priorities_t source_priorities;
-    /* 0x0C001000-0x0C001FFF */
-    const plic_pending_bits_t pending_bits;
-    /* 0x0C002000-0x0C1FFFFC */
-    plic_target_enables_t target_enables;
-    /* 0x0C200000-0x0FFFF004 */
-    plic_target_t targets;
-} __attribute__((packed, aligned(4))) plic_t;
-
-extern volatile plic_t *const plic;
-
-/**
- * @brief       Definitions for the interrupt callbacks
- */
-typedef int (*plic_irq_callback_t)(void *ctx);
-
-/**
- * @brief       Definitions for IRQ table instance
- */
-typedef struct _plic_instance_t
-{
-    plic_irq_callback_t callback;
-    void *ctx;
-} plic_instance_t;
-
-typedef struct _plic_callback_t
-{
-    plic_irq_callback_t callback;
-    void *ctx;
-    uint32_t priority;
-} plic_interrupt_t;
-
-/**
- * @brief       Initialize PLIC external interrupt
- *
- * @note        This function will set MIP_MEIP. The MSTATUS_MIE must set by user.
- *
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-void plic_init(void);
-
-/**
- * @brief       Enable PLIC external interrupt
- *
- * @param[in]   irq_number      external interrupt number
- *
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-
-int plic_irq_enable(plic_irq_t irq_number);
-
-/**
- * @brief       Disable PLIC external interrupt
- *
- * @param[in]   irq_number  The external interrupt number
- *
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-int plic_irq_disable(plic_irq_t irq_number);
-
-/**
- * @brief       Set IRQ priority
- *
- * @param[in]   irq_number      The external interrupt number
- * @param[in]   priority        The priority of external interrupt number
- *
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-int plic_set_priority(plic_irq_t irq_number, uint32_t priority);
-
-/**
- * @brief       Get IRQ priority
- *
- * @param[in]   irq_number          The external interrupt number
- *
- * @return      The priority of external interrupt number
- */
-uint32_t plic_get_priority(plic_irq_t irq_number);
-
-/**
- * @brief       Claim an IRQ
- *
- * @return      The current IRQ number
- */
-uint32_t plic_irq_claim(void);
-
-/**
- * @brief       Complete an IRQ
- *
- * @param[in]   source      The source IRQ number to complete
- *
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-int plic_irq_complete(uint32_t source);
-
-/**
- * @brief       Register user callback function by IRQ number
- *
- * @param[in]   irq             The irq
- * @param[in]   callback        The callback
- * @param       ctx             The context
- *
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-void plic_irq_register(plic_irq_t irq, plic_irq_callback_t callback, void *ctx);
-
-/**
- * @brief       Deegister user callback function by IRQ number
- *
- * @param[in]   irq     The irq
- *
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-void plic_irq_deregister(plic_irq_t irq);
-
-/**
- * @brief       Deegister user callback function by IRQ number
- *
- * @param[in]   irq     The irq
- *
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-void plic_irq_unregister(plic_irq_t irq);
-
-/**
- * @brief       Get IRQ table, Usage:
- *              plic_instance_t (*plic_instance)[IRQN_MAX] = plic_get_instance();
- *              ... plic_instance[x][y] ...;
- *
- * @return      the point of IRQ table
- */
-plic_instance_t (*plic_get_instance(void))[IRQN_MAX];
-
-/* For c++ compatibility */
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* _DRIVER_PLIC_H */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/syscalls.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/syscalls.c
deleted file mode 100644
index a42d3a495..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/syscalls.c
+++ /dev/null
@@ -1,390 +0,0 @@
-/* Copyright 2018 Canaan Inc.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
-* @file syscall.c
-* @brief kendryte k210 source code
-*                https://github.com/kendryte/kendryte-standalone-sdk.git
-* @version 1.0
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
-
-/* Enable kernel-mode log API */
-#include <nuttx/config.h>
-
-#include <assert.h>
-
-#include <nuttx/irq.h>
-#include <nuttx/arch.h>
-#include <nuttx/board.h>
-#include <arch/board/board.h>
-
-#include "riscv_arch.h"
-#include "riscv_internal.h"
-
-#include "group/group.h"
-
-
-#include <sys/stat.h>
-#include <sys/time.h>
-#include <machine/syscall.h>
-#include <stdbool.h>
-#include <errno.h>
-#include <limits.h>
-#include <stdarg.h>
-#include <stdint.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <debug.h>
-#include "syscalls.h"
-#include "clint.h"
-#include "interrupt.h"
-#include "sysctl.h"
-#include "syslog.h"
-#include "encoding.h"
-
-
-/**
- * @note       System call list
- *
- * See also riscv-newlib/libgloss/riscv/syscalls.c
- *
- * | System call      | Number |
- * |------------------|--------|
- * | SYS_exit         | 93     |
- * | SYS_exit_group   | 94     |
- * | SYS_getpid       | 172    |
- * | SYS_kill         | 129    |
- * | SYS_read         | 63     |
- * | SYS_write        | 64     |
- * | SYS_open         | 1024   |
- * | SYS_openat       | 56     |
- * | SYS_close        | 57     |
- * | SYS_lseek        | 62     |
- * | SYS_brk          | 214    |
- * | SYS_link         | 1025   |
- * | SYS_unlink       | 1026   |
- * | SYS_mkdir        | 1030   |
- * | SYS_chdir        | 49     |
- * | SYS_getcwd       | 17     |
- * | SYS_stat         | 1038   |
- * | SYS_fstat        | 80     |
- * | SYS_lstat        | 1039   |
- * | SYS_fstatat      | 79     |
- * | SYS_access       | 1033   |
- * | SYS_faccessat    | 48     |
- * | SYS_pread        | 67     |
- * | SYS_pwrite       | 68     |
- * | SYS_uname        | 160    |
- * | SYS_getuid       | 174    |
- * | SYS_geteuid      | 175    |
- * | SYS_getgid       | 176    |
- * | SYS_getegid      | 177    |
- * | SYS_mmap         | 222    |
- * | SYS_munmap       | 215    |
- * | SYS_mremap       | 216    |
- * | SYS_time         | 1062   |
- * | SYS_getmainvars  | 2011   |
- * | SYS_rt_sigaction | 134    |
- * | SYS_writev       | 66     |
- * | SYS_gettimeofday | 169    |
- * | SYS_times        | 153    |
- * | SYS_fcntl        | 25     |
- * | SYS_getdents     | 61     |
- * | SYS_dup          | 23     |
- *
- */
-
-#ifndef UNUSED
-#define UNUSED(x) (void)(x)
-#endif
-
-void __attribute__((noreturn)) sys_exit(int code)
-{
-    /* Read core id */
-    unsigned long core_id = current_coreid();
-    /* First print some diagnostic information. */
-    syslog(LOG_WARNING, "SYSCALL sys_exit called by core %ld with 0x%lx\n", core_id, (uint64_t)code);
-    while (1)
-        continue;
-}
-
-static int sys_nosys(long a0, long a1, long a2, long a3, long a4, long a5, unsigned long n)
-{
-    UNUSED(a3);
-    UNUSED(a4);
-    UNUSED(a5);
-
-    syslog(LOG_ERR, "SYSCALL Unsupported syscall %ld: a0=%lx, a1=%lx, a2=%lx!\n", n, a0, a1, a2);
-    while (1)
-        continue;
-    return -ENOSYS;
-}
-
-static int sys_success(void)
-{
-    return 0;
-}
-
-
-uintptr_t __attribute__((weak))
-handle_ecall_u(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintptr_t fregs[32])
-{
-    return epc;
-}
-
-uintptr_t __attribute__((weak))
-handle_ecall_h(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintptr_t fregs[32])
-{
-    return epc;
-}
-uintptr_t __attribute__((weak))
-handle_ecall_s(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintptr_t fregs[32])
-{
-    return epc;
-}
-
-uintptr_t __attribute__((weak)) 
-handle_ecall_m(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintptr_t fregs[32])
-{
-    uint64_t* ptr = (uint64_t*)regs;
-    CURRENT_REGS = (uint64_t*)regs;
-    ptr[0] = epc+4;
-    ptr[2] = ptr[2] + 0x200 ;
-    irq_dispatch(K210_IRQ_MSOFT, ptr);
-    void* tmp = g_current_regs;
-    epc = ((uint64_t*)tmp)[0];
-    
-    CURRENT_REGS = NULL;
-    return epc;
-}
-uintptr_t __attribute__((weak))
-handle_misaligned_fetch(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintptr_t fregs[32])
-{
-    //dump_core("misaligned fetch", cause, epc, regs, fregs);
-    sys_exit(1337);
-    return epc;
-}
-
-uintptr_t __attribute__((weak))
-handle_fault_fetch(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintptr_t fregs[32])
-{
-    //dump_core("fault fetch", cause, epc, regs, fregs);
-    sys_exit(1337);
-    return epc;
-}
-
-uintptr_t __attribute__((weak))
-handle_illegal_instruction(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintptr_t fregs[32])
-{
-    //dump_core("illegal instruction", cause, epc, regs, fregs);
-    sys_exit(1337);
-    return epc;
-}
-
-uintptr_t __attribute__((weak))
-handle_breakpoint(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintptr_t fregs[32])
-{
-    //dump_core("breakpoint", cause, epc, regs, fregs);
-    sys_exit(1337);
-    return epc;
-}
-
-uintptr_t __attribute__((weak))
-handle_misaligned_load(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintptr_t fregs[32])
-{
-    /* notice this function only support 16bit or 32bit instruction */
-
-    bool compressed = (*(unsigned short *)epc & 3) != 3;
-    bool fpu = 0;          /* load to fpu ? */
-    uintptr_t addr = 0;    /* src addr */
-    uint8_t src = 0;       /* src register */
-    uint8_t dst = 0;       /* dst register */
-    uint8_t len = 0;       /* data length */
-    int offset = 0;        /* addr offset to addr in reg */
-    bool unsigned_ = 0;    /* unsigned */
-    uint64_t data_load = 0;/* real data load */
-
-    if (compressed)
-    {
-        /* compressed instruction should not get this fault. */
-        goto on_error;
-    }
-    else
-    {
-        uint32_t instruct = *(uint32_t *)epc;
-        uint8_t opcode = instruct&0x7F;
-
-        dst = (instruct >> 7)&0x1F;
-        len = (instruct >> 12)&3;
-        unsigned_ = (instruct >> 14)&1;
-        src = (instruct >> 15)&0x1F;
-        offset = (instruct >> 20);
-        len = 1 << len;
-        switch (opcode)
-        {
-            case 3:/* load */
-                break;
-            case 7:/* fpu load */
-                fpu = 1;
-                break;
-            default:
-                goto on_error;
-        }
-    }
-
-    if (offset >> 11)
-        offset = -((offset & 0x3FF) + 1);
-
-    addr = (uint64_t)((uint64_t)regs[src] + offset);
-
-    for (int i = 0; i < len; ++i)
-        data_load |= ((uint64_t)*((uint8_t *)addr + i)) << (8 * i);
-
-
-    if (!unsigned_ & !fpu)
-    {
-        /* adjust sign */
-        switch (len)
-        {
-            case 1:
-                data_load = (uint64_t)(int64_t)((int8_t)data_load);
-                break;
-            case 2:
-                data_load = (uint64_t)(int64_t)((int16_t)data_load);
-                break;
-            case 4:
-                data_load = (uint64_t)(int64_t)((int32_t)data_load);
-                break;
-            default:
-                break;
-        }
-    }
-
-    if (fpu)
-        fregs[dst] = data_load;
-    else
-        regs[dst] = data_load;
-
-    syslog(LOG_DEBUG, "misaligned load recovered at %08lx. len:%02d,addr:%08lx,reg:%02d,data:%016lx,signed:%1d,float:%1d", (uint64_t)epc, len, (uint64_t)addr, dst, data_load, !unsigned_, fpu);
-
-    return epc + (compressed ? 2 : 4);
-on_error:
-    //dump_core("misaligned load", cause, epc, regs, fregs);
-    sys_exit(1337);
-    return epc;
-}
-
-uintptr_t __attribute__((weak))
-handle_fault_load(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintptr_t fregs[32])
-{
-    //dump_core("fault load", cause, epc, regs, fregs);
-    sys_exit(1337);
-    return epc;
-}
-
-uintptr_t __attribute__((weak))
-handle_misaligned_store(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintptr_t fregs[32])
-{
-    /* notice this function only support 16bit or 32bit instruction */
-
-    bool compressed = (*(unsigned short *)epc & 3) != 3;
-    bool fpu = 0;           /* store to fpu*/
-    uintptr_t addr = 0;     /* src addr*/
-    uint8_t src = 0;        /* src register*/
-    uint8_t dst = 0;        /* dst register*/
-    uint8_t len = 0;        /* data length*/
-    int offset = 0;         /* addr offset to addr in reg*/
-    uint64_t data_store = 0;/* real data store*/
-
-    if (compressed)
-    {
-        /* compressed instruction should not get this fault. */
-        goto on_error;
-    }
-    else
-    {
-        uint32_t instruct = *(uint32_t *)epc;
-        uint8_t opcode = instruct&0x7F;
-
-        len = (instruct >> 12)&7;
-        dst = (instruct >> 15)&0x1F;
-        src = (instruct >> 20)&0x1F;
-        offset = ((instruct >> 7)&0x1F) | ((instruct >> 20)&0xFE0);
-        len = 1 << len;
-        switch (opcode)
-        {
-            case 0x23:/* store */
-                break;
-            case 0x27:/* fpu store */
-                fpu = 1;
-                break;
-            default:
-                goto on_error;
-        }
-    }
-
-    if (offset >> 11)
-        offset = -((offset & 0x3FF) + 1);
-
-    addr = (uint64_t)((uint64_t)regs[dst] + offset);
-
-
-    if (fpu)
-        data_store = fregs[src];
-    else
-        data_store = regs[src];
-
-    for (int i = 0; i < len; ++i)
-        *((uint8_t *)addr + i) = (data_store >> (i*8)) & 0xFF;
-
-    syslog(LOG_DEBUG, "misaligned store recovered at %08lx. len:%02d,addr:%08lx,reg:%02d,data:%016lx,float:%1d", (uint64_t)epc, len, (uint64_t)addr, src, data_store, fpu);
-
-    return epc + (compressed ? 2 : 4);
-on_error:
-    //dump_core("misaligned store", cause, epc, regs, fregs);
-    sys_exit(1337);
-    return epc;
-}
-
-uintptr_t __attribute__((weak))
-handle_fault_store(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintptr_t fregs[32])
-{
-    //dump_core("fault store", cause, epc, regs, fregs);
-    sys_exit(1337);
-    return epc;
-}
-
-uintptr_t handle_syscall(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintptr_t fregs[32])
-{
-    static uintptr_t (* const cause_table[])(uintptr_t cause, uintptr_t epc, uintptr_t regs[32], uintptr_t fregs[32]) =
-    {
-        [CAUSE_MISALIGNED_FETCH]      = handle_misaligned_fetch,
-        [CAUSE_FAULT_FETCH]           = handle_fault_fetch,
-        [CAUSE_ILLEGAL_INSTRUCTION]   = handle_illegal_instruction,
-        [CAUSE_BREAKPOINT]            = handle_breakpoint,
-        [CAUSE_MISALIGNED_LOAD]       = handle_misaligned_load,
-        [CAUSE_FAULT_LOAD]            = handle_fault_load,
-        [CAUSE_MISALIGNED_STORE]      = handle_misaligned_store,
-        [CAUSE_FAULT_STORE]           = handle_fault_store,
-        [CAUSE_USER_ECALL]            = handle_ecall_u,
-        [CAUSE_SUPERVISOR_ECALL]      = handle_ecall_h,
-        [CAUSE_HYPERVISOR_ECALL]      = handle_ecall_s,
-        [CAUSE_MACHINE_ECALL]         = handle_ecall_m,
-    };
-    return cause_table[cause](cause, epc, regs, fregs);
-}
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/syscalls.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/syscalls.h
deleted file mode 100644
index 15f2f2c71..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/syscalls.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/* Copyright 2018 Canaan Inc.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
-* @file syscall.h
-* @brief kendryte k210 source code
-*                https://github.com/kendryte/kendryte-standalone-sdk.git
-* @version 1.0
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
-
-#ifndef _BSP_SYSCALLS_H
-#define _BSP_SYSCALLS_H
-
-#include <machine/syscall.h>
-#include <stddef.h>
-#include <stdint.h>
-#include <stdio.h>
-#include <string.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-void __attribute__((noreturn)) sys_exit(int code);
-
-void setStats(int enable);
-
-#undef putchar
-int putchar(int ch);
-void printstr(const char *s);
-
-void printhex(uint64_t x);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* _BSP_SYSCALLS_H */
-
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/uarths.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/uarths.c
deleted file mode 100644
index 532678979..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/uarths.c
+++ /dev/null
@@ -1,191 +0,0 @@
-/* Copyright 2018 Canaan Inc.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
-* @file uarths.c
-* @brief kendryte k210 source code
-*                https://github.com/kendryte/kendryte-standalone-sdk.git
-* @version 1.0
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
-
-#include <stdint.h>
-#include <stdio.h>
-#include "uarths.h"
-#include "sysctl.h"
-#include "encoding.h"
-#include <nuttx/arch.h>
-#include <arch/irq.h>
-
-volatile uarths_t *const uarths = (volatile uarths_t *)UARTHS_BASE_ADDR;
-
-typedef struct _uarths_instance
-{
-    plic_irq_callback_t callback;
-    void *ctx;
-    uarths_interrupt_mode_t uarths_interrupt_mode;
-} uarths_instance_t;
-
-uarths_instance_t g_uarths_instance;
-
-uarths_interrupt_mode_t uarths_get_interrupt_mode(void)
-{
-    uint32_t v_rx_interrupt = uarths->ip.rxwm;
-    uint32_t v_tx_interrupt = uarths->ip.txwm;
-    return (v_rx_interrupt << 1) | v_tx_interrupt;
-}
-
-int uarths_irq_callback(int irq, void *ctx, void *arg)
-{
-    uarths_instance_t *uart_context = (uarths_instance_t *)ctx;
-
-    if(uart_context->callback)
-        uart_context->callback(uart_context->ctx);
-    return 0;
-}
-
-void uarths_set_interrupt_cnt(uarths_interrupt_mode_t interrupt_mode, uint8_t cnt)
-{
-    switch(interrupt_mode)
-    {
-        case UARTHS_SEND:
-            uarths->txctrl.txcnt = cnt;
-            break;
-        case UARTHS_RECEIVE:
-            uarths->rxctrl.rxcnt = cnt;
-            break;
-        case UARTHS_SEND_RECEIVE:
-        default:
-            uarths->txctrl.txcnt = cnt;
-            uarths->rxctrl.rxcnt = cnt;
-            break;
-    }
-}
-
-void uarths_set_irq(uarths_interrupt_mode_t interrupt_mode, plic_irq_callback_t uarths_callback, void *ctx, uint32_t priority)
-{
-    int ret;
-    g_uarths_instance.callback = uarths_callback;
-    g_uarths_instance.ctx = ctx;
-
-    switch(interrupt_mode)
-    {
-        case UARTHS_SEND:
-            uarths->ie.txwm = 1;
-            uarths->ie.rxwm = 0;
-            break;
-        case UARTHS_RECEIVE:
-            uarths->ie.txwm = 0;
-            uarths->ie.rxwm = 1;
-            break;
-        default:
-            uarths->ie.txwm = 1;
-            uarths->ie.rxwm = 1;
-            break;
-    }
-    g_uarths_instance.uarths_interrupt_mode = interrupt_mode;
-
-    plic_set_priority(IRQN_UARTHS_INTERRUPT, priority);
-    ret = irq_attach(IRQN_UARTHS_INTERRUPT, uarths_irq_callback, &g_uarths_instance);
-    if (ret == OK)
-    {
-      up_enable_irq(IRQN_UARTHS_INTERRUPT);
-    }
-}
-
-static inline int uarths_putc(char c)
-{
-    while (uarths->txdata.full)
-        continue;
-    uarths->txdata.data = (uint8_t)c;
-
-    return 0;
-}
-
-size_t uarths_receive_data(uint8_t *buf, size_t buf_len)
-{
-    size_t i;
-    for(i = 0; i < buf_len; i++)
-    {
-        uarths_rxdata_t recv = uarths->rxdata;
-        if(recv.empty)
-            break;
-        else
-            buf[i] = (recv.data & 0xFF);
-    }
-    return i;
-}
-
-size_t uarths_send_data(const uint8_t *buf, size_t buf_len)
-{
-    size_t write = 0;
-    while (write < buf_len)
-    {
-        uarths_putc(*buf++);
-        write++;
-    }
-    return write;
-}
-
-int uarths_getc(void)
-{
-    /* while not empty */
-    uarths_rxdata_t recv = uarths->rxdata;
-
-    if (recv.empty)
-        return EOF;
-    else
-        return recv.data;
-}
-
-int uarths_putchar(char c)
-{
-    return uarths_putc(c);
-}
-
-int uarths_puts(const char *s)
-{
-    while (*s)
-        if (uarths_putc(*s++) != 0)
-            return -1;
-    return 0;
-}
-
-void uarths_init(void)
-{
-    uint32_t freq = sysctl_clock_get_freq(SYSCTL_CLOCK_CPU);
-    uint16_t div = freq / 115200 - 1;
-
-    /* Set UART registers */
-    uarths->div.div = div;
-    uarths->txctrl.txen = 1;
-    uarths->rxctrl.rxen = 1;
-    uarths->txctrl.txcnt = 0;
-    uarths->rxctrl.rxcnt = 0;
-    uarths->ip.txwm = 1;
-    uarths->ip.rxwm = 1;
-    uarths->ie.txwm = 0;
-    uarths->ie.rxwm = 1;
-}
-
-void uarths_config(uint32_t baud_rate, uarths_stopbit_t stopbit)
-{
-    uint32_t freq = sysctl_clock_get_freq(SYSCTL_CLOCK_CPU);
-    uint16_t div = freq / baud_rate - 1;
-    uarths->div.div = div;
-    uarths->txctrl.nstop = stopbit;
-}
-
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/uarths.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/uarths.h
deleted file mode 100644
index 3fecaa187..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/uarths.h
+++ /dev/null
@@ -1,302 +0,0 @@
-/* Copyright 2018 Canaan Inc.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file
- * @brief       Universal Asynchronous Receiver/Transmitter (UART)
- *
- *              The UART peripheral supports the following features:
- *
- *              - 8-N-1 and 8-N-2 formats: 8 data bits, no parity bit, 1 start
- *                bit, 1 or 2 stop bits
- *
- *               - 8-entry transmit and receive FIFO buffers with programmable
- *                watermark interrupts
- *
- *              - 16脳 Rx oversampling with 2/3 majority voting per bit
- *
- *              The UART peripheral does not support hardware flow control or
- *              other modem control signals, or synchronous serial data
- *              tranfesrs.
- *
- * @note        UART RAM Layout
- *
- * | Address   | Name     | Description                     |
- * |-----------|----------|---------------------------------|
- * | 0x000     | txdata   | Transmit data register          |
- * | 0x004     | rxdata   | Receive data register           |
- * | 0x008     | txctrl   | Transmit control register       |
- * | 0x00C     | rxctrl   | Receive control register        |
- * | 0x010     | ie       | UART interrupt enable           |
- * | 0x014     | ip       | UART Interrupt pending          |
- * | 0x018     | div      | Baud rate divisor               |
- *
- */
-
-/**
-* @file uarths.h
-* @brief kendryte k210 source code
-*                https://github.com/kendryte/kendryte-standalone-sdk.git
-* @version 1.0
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
-
-#ifndef _DRIVER_UARTHS_H
-#define _DRIVER_UARTHS_H
-
-#include <stddef.h>
-#include <stdint.h>
-#include "platform.h"
-#include "plic.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* clang-format off */
-/* Register address offsets */
-#define UARTHS_REG_TXFIFO (0x00)
-#define UARTHS_REG_RXFIFO (0x04)
-#define UARTHS_REG_TXCTRL (0x08)
-#define UARTHS_REG_RXCTRL (0x0c)
-#define UARTHS_REG_IE     (0x10)
-#define UARTHS_REG_IP     (0x14)
-#define UARTHS_REG_DIV    (0x18)
-
-/* TXCTRL register */
-#define UARTHS_TXEN       (0x01)
-#define UARTHS_TXWM(x)    (((x) & 0xffff) << 16)
-
-/* RXCTRL register */
-#define UARTHS_RXEN       (0x01)
-#define UARTHS_RXWM(x)    (((x) & 0xffff) << 16)
-
-/* IP register */
-#define UARTHS_IP_TXWM    (0x01)
-#define UARTHS_IP_RXWM    (0x02)
-/* clang-format on */
-
-typedef struct _uarths_txdata
-{
-    /* Bits [7:0] is data */
-    uint32_t data : 8;
-    /* Bits [30:8] is 0 */
-    uint32_t zero : 23;
-    /* Bit 31 is full status */
-    uint32_t full : 1;
-} __attribute__((packed, aligned(4))) uarths_txdata_t;
-
-typedef struct _uarths_rxdata
-{
-    /* Bits [7:0] is data */
-    uint32_t data : 8;
-    /* Bits [30:8] is 0 */
-    uint32_t zero : 23;
-    /* Bit 31 is empty status */
-    uint32_t empty : 1;
-} __attribute__((packed, aligned(4))) uarths_rxdata_t;
-
-typedef struct _uarths_txctrl
-{
-    /* Bit 0 is txen, controls whether the Tx channel is active. */
-    uint32_t txen : 1;
-    /* Bit 1 is nstop, 0 for one stop bit and 1 for two stop bits */
-    uint32_t nstop : 1;
-    /* Bits [15:2] is reserved */
-    uint32_t resv0 : 14;
-    /* Bits [18:16] is threshold of interrupt triggers */
-    uint32_t txcnt : 3;
-    /* Bits [31:19] is reserved */
-    uint32_t resv1 : 13;
-} __attribute__((packed, aligned(4))) uarths_txctrl_t;
-
-typedef struct _uarths_rxctrl
-{
-    /* Bit 0 is txen, controls whether the Tx channel is active. */
-    uint32_t rxen : 1;
-    /* Bits [15:1] is reserved */
-    uint32_t resv0 : 15;
-    /* Bits [18:16] is threshold of interrupt triggers */
-    uint32_t rxcnt : 3;
-    /* Bits [31:19] is reserved */
-    uint32_t resv1 : 13;
-} __attribute__((packed, aligned(4))) uarths_rxctrl_t;
-
-typedef struct _uarths_ip
-{
-    /* Bit 0 is txwm, raised less than txcnt */
-    uint32_t txwm : 1;
-    /* Bit 1 is txwm, raised greater than rxcnt */
-    uint32_t rxwm : 1;
-    /* Bits [31:2] is 0 */
-    uint32_t zero : 30;
-} __attribute__((packed, aligned(4))) uarths_ip_t;
-
-typedef struct _uarths_ie
-{
-    /* Bit 0 is txwm, raised less than txcnt */
-    uint32_t txwm : 1;
-    /* Bit 1 is txwm, raised greater than rxcnt */
-    uint32_t rxwm : 1;
-    /* Bits [31:2] is 0 */
-    uint32_t zero : 30;
-} __attribute__((packed, aligned(4))) uarths_ie_t;
-
-typedef struct _uarths_div
-{
-    /* Bits [31:2] is baud rate divisor register */
-    uint32_t div : 16;
-    /* Bits [31:16] is 0 */
-    uint32_t zero : 16;
-} __attribute__((packed, aligned(4))) uarths_div_t;
-
-typedef struct _uarths
-{
-    /* Address offset 0x00 */
-    uarths_txdata_t txdata;
-    /* Address offset 0x04 */
-    uarths_rxdata_t rxdata;
-    /* Address offset 0x08 */
-    uarths_txctrl_t txctrl;
-    /* Address offset 0x0c */
-    uarths_rxctrl_t rxctrl;
-    /* Address offset 0x10 */
-    uarths_ie_t ie;
-    /* Address offset 0x14 */
-    uarths_ip_t ip;
-    /* Address offset 0x18 */
-    uarths_div_t div;
-} __attribute__((packed, aligned(4))) uarths_t;
-
-typedef enum _uarths_interrupt_mode
-{
-    UARTHS_SEND = 1,
-    UARTHS_RECEIVE = 2,
-    UARTHS_SEND_RECEIVE = 3,
-} uarths_interrupt_mode_t;
-
-typedef enum _uarths_stopbit
-{
-    UARTHS_STOP_1,
-    UARTHS_STOP_2
-} uarths_stopbit_t;
-
-extern volatile uarths_t *const uarths;
-
-/**
- * @brief       Initialization Core UART
- *
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-void uarths_init(void);
-
-/**
- * @brief       Put a char to UART
- *
- * @param[in]   c       The char to put
- *
- * @note        If c is '\n', a '\r' will be appended automatically
- *
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-int uarths_putchar(char c);
-
-/**
- * @brief       Send a string to UART
- *
- * @param[in]   s       The string to send
- *
- * @note        The string must ending with '\0'
- *
- * @return      result
- *     - 0      Success
- *     - Other  Fail
- */
-int uarths_puts(const char *s);
-
-
-/**
- * @brief       Get a byte from UART
- *
- * @return      byte as int type from UART
- */
-int uarths_getc(void);
-
-/**
- * @brief       Set uarths interrupt callback
- *
- * @param[in]    interrupt_mode       Interrupt mode recevice or send
- * @param[in]    uarths_callback      Interrupt callback
- * @param[in]    ctx                  Param of callback
- * @param[in]    priority             Interrupt priority
- *
- */
-void uarths_set_irq(uarths_interrupt_mode_t interrupt_mode, plic_irq_callback_t uarths_callback, void *ctx, uint32_t priority);
-
-/**
- * @brief       Uarths receive data
- *
- * @param[in]    buf          The data received
- * @param[in]    buf_len      The length of data
- *
- * @return      Number of received data
- */
-size_t uarths_receive_data(uint8_t *buf, size_t buf_len);
-
-/**
- * @brief       Uarths receive data
- *
- * @param[in]    buf          The data sended
- * @param[in]    buf_len      The length of data
- *
- * @return      Number of sended data
- */
-size_t uarths_send_data(const uint8_t *buf, size_t buf_len);
-
-/**
- * @brief       Get interrupt mode
- *
- * @return      Mode of interrupt
- */
-uarths_interrupt_mode_t uarths_get_interrupt_mode(void);
-
-/**
- * @brief       Set uarths baud rate and stopbit
- *
- * @param[in]    baud_rate        The baud rate
- * @param[in]    stopbit          The stopbit of data
- *
- */
-void uarths_config(uint32_t baud_rate, uarths_stopbit_t stopbit);
-
-/**
- * @brief       Set uart interrupt condition
- *
- * @param[in]    interrupt_mode         The interrupt mode
- * @param[in]    cnt                    The count of tigger
- *
- */
-void uarths_set_interrupt_cnt(uarths_interrupt_mode_t interrupt_mode, uint8_t cnt);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* _DRIVER_UARTHS_H */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/utils.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/utils.c
deleted file mode 100644
index 746c22496..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/utils.c
+++ /dev/null
@@ -1,54 +0,0 @@
-/* Copyright 2018 Canaan Inc.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
-* @file utils.c
-* @brief kendryte k210 source code
-*                https://github.com/kendryte/kendryte-standalone-sdk.git
-* @version 1.0
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
-
-#include <stddef.h>
-#include "encoding.h"
-#include "utils.h"
-
-void set_bit(volatile uint32_t *bits, uint32_t mask, uint32_t value)
-{
-    uint32_t org = (*bits) & ~mask;
-    *bits = org | (value & mask);
-}
-
-void set_bit_offset(volatile uint32_t *bits, uint32_t mask, size_t offset, uint32_t value)
-{
-    set_bit(bits, mask << offset, value << offset);
-}
-
-void set_gpio_bit(volatile uint32_t *bits, size_t offset, uint32_t value)
-{
-    set_bit_offset(bits, 1, offset, value);
-}
-
-uint32_t get_bit(volatile uint32_t *bits, uint32_t mask, size_t offset)
-{
-    return ((*bits) & (mask << offset)) >> offset;
-}
-
-uint32_t get_gpio_bit(volatile uint32_t *bits, size_t offset)
-{
-    return get_bit(bits, 1, offset);
-}
-
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/utils.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/utils.h
deleted file mode 100644
index 34df06b25..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/k210/utils.h
+++ /dev/null
@@ -1,350 +0,0 @@
-/* Copyright 2018 Canaan Inc.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
-* @file utils.h
-* @brief kendryte k210 source code
-*                https://github.com/kendryte/kendryte-standalone-sdk.git
-* @version 1.0
-* @author AIIT XUOS Lab
-* @date 2022-03-17
-*/
-
-#ifndef _DRIVER_UTILS_H
-#define _DRIVER_UTILS_H
-#include "uarths.h"
-
-#ifdef __cplusplus
-#include <cstdbool>
-#include <cstddef>
-#include <cstdint>
-#else /* __cplusplus */
-#include <stdbool.h>
-#include <stddef.h>
-#include <stdint.h>
-#include <stdio.h>
-#endif /* __cplusplus */
-
-#ifdef __cplusplus
-extern "C" {
-#endif /* __cplusplus */
-
-#define KENDRYTE_MIN(a, b) ((a) > (b) ? (b) : (a))
-#define KENDRYTE_MAX(a, b) ((a) > (b) ? (a) : (b))
-
-#ifdef __ASSEMBLY__
-#define KENDRYTE_CAST(type, ptr) ptr
-#else /* __ASSEMBLY__ */
-/**
- * @brief       Cast the pointer to specified pointer type.
- *
- * @param[in]   type        The pointer type to cast to
- * @param[in]   ptr         The pointer to apply the type cast to
- */
-#define KENDRYTE_CAST(type, ptr) ((type)(ptr))
-#endif /* __ASSEMBLY__ */
-
-/**
- * @addtogroup      UTIL_RW_FUNC Memory Read/Write Utilities
- *
- * This section implements read and write functionality for various
- * memory untis. The memory unit terms used for these functions are
- * consistent with those used in the ARM Architecture Reference Manual
- * ARMv7-A and ARMv7-R edition manual. The terms used for units of memory are:
- *
- *  Unit of Memory | Abbreviation | Size in Bits
- * :---------------|:-------------|:------------:
- *  Byte           | byte         |       8
- *  Half Word      | hword        |      16
- *  Word           | word         |      32
- *  Double Word    | dword        |      64
- *
- */
-
-/**
- * @brief       Write the 8 bit byte to the destination address in device memory.
- *
- * @param[in]   dest        Write destination pointer address
- * @param[in]   src         8 bit data byte to write to memory
- */
-#define kendryte_write_byte(dest, src) \
-    (*KENDRYTE_CAST(volatile uint8_t*, (dest)) = (src))
-
-/**
- * @brief       Read and return the 8 bit byte from the source address in device memory.
- *
- * @param[in]   src     Read source pointer address
- *
- * @return      8 bit data byte value
- */
-#define kendryte_read_byte(src) (*KENDRYTE_CAST(volatile uint8_t*, (src)))
-
-/**
- * @brief       Write the 16 bit half word to the destination address in device memory.
- *
- * @param[in]   dest        Write destination pointer address
- * @param[in]   src         16 bit data half word to write to memory
- */
-#define kendryte_write_hword(dest, src) \
-    (*KENDRYTE_CAST(volatile uint16_t*, (dest)) = (src))
-
-/**
- * @brief       Read and return the 16 bit half word from the source address in device
- *
- * @param[in]   src     Read source pointer address
- *
- * @return      16 bit data half word value
- */
-#define kendryte_read_hword(src) (*KENDRYTE_CAST(volatile uint16_t*, (src)))
-
-/**
- * @brief       Write the 32 bit word to the destination address in device memory.
- *
- * @param[in]   dest        Write destination pointer address
- * @param[in]   src         32 bit data word to write to memory
- */
-#define kendryte_write_word(dest, src) \
-    (*KENDRYTE_CAST(volatile uint32_t*, (dest)) = (src))
-
-/**
- * @brief       Read and return the 32 bit word from the source address in device memory.
- *
- * @param[in]   src     Read source pointer address
- *
- * @return      32 bit data half word value
- */
-#define kendryte_read_word(src) (*KENDRYTE_CAST(volatile uint32_t*, (src)))
-
-/**
- * @brief       Write the 64 bit double word to the destination address in device memory.
- *
- * @param[in]   dest        Write destination pointer address
- * @param[in]   src         64 bit data word to write to memory
- */
-#define kendryte_write_dword(dest, src) \
-    (*KENDRYTE_CAST(volatile uint64_t*, (dest)) = (src))
-
-/**
- * @brief       Read and return the 64 bit double word from the source address in device
- *
- * @param[in]   src     Read source pointer address
- *
- * @return      64 bit data half word value
- */
-#define kendryte_read_dword(src) (*KENDRYTE_CAST(volatile uint64_t*, (src)))
-
-/**
- * @brief       Set selected bits in the 8 bit byte at the destination address in device
- *
- * @param[in]   dest        Destination pointer address
- * @param[in]   bits        Bits to set in destination byte
- */
-#define kendryte_setbits_byte(dest, bits) \
-    (kendryte_write_byte(dest, kendryte_read_byte(dest) | (bits)))
-
-/**
- * @brief       Clear selected bits in the 8 bit byte at the destination address in device
- *
- * @param[in]   dest        Destination pointer address
- * @param[in]   bits        Bits to clear in destination byte
- */
-#define kendryte_clrbits_byte(dest, bits) \
-    (kendryte_write_byte(dest, kendryte_read_byte(dest) & ~(bits)))
-
-/**
- * @brief       Change or toggle selected bits in the 8 bit byte at the destination address
- *
- * @param[in]   dest        Destination pointer address
- * @param[in]   bits        Bits to change in destination byte
- */
-#define kendryte_xorbits_byte(dest, bits) \
-    (kendryte_write_byte(dest, kendryte_read_byte(dest) ^ (bits)))
-
-/**
- * @brief       Replace selected bits in the 8 bit byte at the destination address in device
- *
- * @param[in]   dest        Destination pointer address
- * @param[in]   msk         Bits to replace in destination byte
- * @param[in]   src         Source bits to write to cleared bits in destination byte
- */
-#define kendryte_replbits_byte(dest, msk, src) \
-    (kendryte_write_byte(dest, (kendryte_read_byte(dest) & ~(msk)) | ((src) & (msk))))
-
-/**
- * @brief       Set selected bits in the 16 bit halfword at the destination address in
- *
- * @param[in]   dest        Destination pointer address
- * @param[in]   bits        Bits to set in destination halfword
- */
-#define kendryte_setbits_hword(dest, bits) \
-    (kendryte_write_hword(dest, kendryte_read_hword(dest) | (bits)))
-
-/**
- * @brief       Clear selected bits in the 16 bit halfword at the destination address in
- *
- * @param[in]   dest        Destination pointer address
- * @param[in]   bits        Bits to clear in destination halfword
- */
-#define kendryte_clrbits_hword(dest, bits) \
-    (kendryte_write_hword(dest, kendryte_read_hword(dest) & ~(bits)))
-
-/**
- * @brief       Change or toggle selected bits in the 16 bit halfword at the destination
- *
- * @param[in]   dest        Destination pointer address
- * @param[in]   bits        Bits to change in destination halfword
- */
-#define kendryte_xorbits_hword(dest, bits) \
-    (kendryte_write_hword(dest, kendryte_read_hword(dest) ^ (bits)))
-
-/**
- * @brief       Replace selected bits in the 16 bit halfword at the destination address in
- *
- * @param[in]   dest        Destination pointer address
- * @param[in]   msk         Bits to replace in destination byte
- * @param[in]   src         Source bits to write to cleared bits in destination halfword
- */
-#define kendryte_replbits_hword(dest, msk, src) \
-    (kendryte_write_hword(dest, (kendryte_read_hword(dest) & ~(msk)) | ((src) & (msk))))
-
-/**
- * @brief       Set selected bits in the 32 bit word at the destination address in device
- *
- * @param[in]   dest        Destination pointer address
- * @param[in]   bits        Bits to set in destination word
- */
-#define kendryte_setbits_word(dest, bits) \
-    (kendryte_write_word(dest, kendryte_read_word(dest) | (bits)))
-
-/**
- * @brief       Clear selected bits in the 32 bit word at the destination address in device
- *
- * @param[in]   dest        Destination pointer address
- * @param[in]   bits        Bits to clear in destination word
- */
-#define kendryte_clrbits_word(dest, bits) \
-    (kendryte_write_word(dest, kendryte_read_word(dest) & ~(bits)))
-
-/**
- * @brief       Change or toggle selected bits in the 32 bit word at the destination address
- *
- * @param[in]   dest        Destination pointer address
- * @param[in]   bits        Bits to change in destination word
- */
-#define kendryte_xorbits_word(dest, bits) \
-    (kendryte_write_word(dest, kendryte_read_word(dest) ^ (bits)))
-
-/**
- * @brief       Replace selected bits in the 32 bit word at the destination address in
- *
- * @param[in]   dest        Destination pointer address
- * @param[in]   msk         Bits to replace in destination word
- * @param[in]   src         Source bits to write to cleared bits in destination word
- */
-#define kendryte_replbits_word(dest, msk, src) \
-    (kendryte_write_word(dest, (kendryte_read_word(dest) & ~(msk)) | ((src) & (msk))))
-
-/**
- * @brief      Set selected bits in the 64 bit doubleword at the destination address in
- *
- * @param[in]   dest     Destination pointer address
- * @param[in]   bits     Bits to set in destination doubleword
- */
-#define kendryte_setbits_dword(dest, bits) \
-    (kendryte_write_dword(dest, kendryte_read_dword(dest) | (bits)))
-
-/**
- * @brief       Clear selected bits in the 64 bit doubleword at the destination address in
- *
- * @param[in]   dest        Destination pointer address
- * @param[in]   bits        Bits to clear in destination doubleword
- */
-#define kendryte_clrbits_dword(dest, bits) \
-    (kendryte_write_dword(dest, kendryte_read_dword(dest) & ~(bits)))
-
-/**
- * @brief       Change or toggle selected bits in the 64 bit doubleword at the destination
- *
- * @param[in]   dest        Destination pointer address
- * @param[in]   bits        Bits to change in destination doubleword
- */
-#define kendryte_xorbits_dword(dest, bits) \
-    (kendryte_write_dword(dest, kendryte_read_dword(dest) ^ (bits)))
-
-/**
- * @brief       Replace selected bits in the 64 bit doubleword at the destination address in
- *
- * @param[in]   dest        Destination pointer address
- * @param[in]   msk         its to replace in destination doubleword
- * @param[in]   src         Source bits to write to cleared bits in destination word
- */
-#define kendryte_replbits_dword(dest, msk, src) \
-    (kendryte_write_dword(dest, (kendryte_read_dword(dest) & ~(msk)) | ((src) & (msk))))
-
-/**
- * @brief       Set value by mask
- *
- * @param[in]   bits        The one be set
- * @param[in]   mask        mask value
- * @param[in]   value       The value to set
- */
-void set_bit(volatile uint32_t *bits, uint32_t mask, uint32_t value);
-
-/**
- * @brief       Set value by mask
- *
- * @param[in]   bits        The one be set
- * @param[in]   mask        Mask value
- * @param[in]   offset      Mask's offset
- * @param[in]   value       The value to set
- */
-void set_bit_offset(volatile uint32_t *bits, uint32_t mask, size_t offset, uint32_t value);
-
-/**
- * @brief       Set bit for gpio, only set one bit
- *
- * @param[in]   bits        The one be set
- * @param[in]   idx         Offset value
- * @param[in]   value       The value to set
- */
-void set_gpio_bit(volatile uint32_t *bits, size_t idx, uint32_t value);
-
-/**
- * @brief      Get bits value of mask
- *
- * @param[in]   bits        The source data
- * @param[in]   mask        Mask value
- * @param[in]   offset      Mask's offset
- *
- * @return      The bits value of mask
- */
-uint32_t get_bit(volatile uint32_t *bits, uint32_t mask, size_t offset);
-
-/**
- * @brief       Get a bit value by offset
- *
- * @param[in]   bits        The source data
- * @param[in]   offset      Bit's offset
- *
- *
- * @return      The bit value
- */
-uint32_t get_gpio_bit(volatile uint32_t *bits, size_t offset);
-
-#ifdef __cplusplus
-}
-#endif /* __cplusplus */
-#endif /* _DRIVER_COMMON_H */
-
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/rv64gc/riscv_syscall.S b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/rv64gc/riscv_syscall.S
deleted file mode 100644
index 533c6f1fe..000000000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/arch/risc-v/src/rv64gc/riscv_syscall.S
+++ /dev/null
@@ -1,123 +0,0 @@
-/****************************************************************************
- * arch/riscv/src/rv32im/up_syscall.S
- *
- *   Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt <gnutt@nuttx.org>
- *
- *   Modified for RISC-V:
- *
- *   Copyright (C) 2016 Ken Pettit. All rights reserved.
- *   Author: Ken Pettit <pettitkd@gmail.com>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include <nuttx/config.h>
-
-/****************************************************************************
- * Public Symbols
- ****************************************************************************/
-
-	.file	"up_syscall0.S"
-	.global sys_call0
-	.global sys_call1
-	.global sys_call2
-	.global sys_call3
-	.global sys_call4
-	.global sys_call5
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: up_syscall0, up_syscall1, up_syscall2, up_syscall3
- *
- * Description:
- *   up_syscall0 - System call SYS_ argument and no additional parameters.
- *   up_syscall1 - System call SYS_ argument and one additional parameter.
- *   up_syscall2 - System call SYS_ argument and two additional parameters.
- *   up_syscall3 - System call SYS_ argument and three additional parameters.
- *   up_syscall4 - System call SYS_ argument and four additional parameters.
- *   up_syscall5 - System call SYS_ argument and five additional parameters.
- *
- * Assumption:
- *   All interrupts are disabled except for the software interrupts.
- *
- ****************************************************************************/
-
-	.text
-
-sys_call0:	/* a0 holds the syscall number */
-sys_call1:	/* a0 holds the syscall number, argument in a1 */
-sys_call2:	/* a0 holds the syscall number, arguments in a1 and a2 */
-sys_call3:	/* a0 holds the syscall number, arguments in a1, a2, and a3 */
-sys_call4:	/* a0 holds the syscall number, arguments in a1, a2, a3 and a4 */
-sys_call5:	/* a0 holds the syscall number, arguments in a1, a2, a3, a4 and a5 */
-
-	/* Issue the ECALL opcode to perform a SW interrupt to the OS */
-
-   ecall
-
-	/* The actual interrupt may not a occur for a few more cycles.  Let's
-	 * put a few nop's here in hope that the SW interrupt occurs during
-	 * the sequence of nops.
-	 */
-
-	nop
-	nop
-	nop
-	nop
-	nop
-	nop
-	nop
-	nop
-	nop
-	nop
-	nop
-	nop
-	nop
-
-	/* Then return with the result of the software interrupt in v0 */
-	
-	ret
-	nop
-
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/boards/Kconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/boards/Kconfig
index 5311f8b96..6c27803a6 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/boards/Kconfig
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/boards/Kconfig
@@ -279,6 +279,17 @@ config ARCH_BOARD_ESP32S2_SAOLA_1
 	---help---
 		This is the ESP32-S2-Saola-1 board
 
+config ARCH_BOARD_ESP32S3_DEVKIT
+	bool "Espressif ESP32-S3 DevKit"
+	depends on ARCH_CHIP_ESP32S3WROOM1 || ARCH_CHIP_ESP32S3MINI1
+	select ARCH_HAVE_LEDS
+	---help---
+		The ESP32-S3 DevKit features the ESP32-S3 CPU with dual Xtensa LX7 cores.
+		It comes in two flavors, the ESP32-S3-DevKitM-1 and the ESP32-S3-DevKitC-1.
+		The ESP32-C3-DevKitM-1 version contains the ESP32-S3-MINI-1/1U module and the
+		ESP32-S3-DevKitC-1 version may be based either on ESP32-S3-WROOM-1/1U or
+		ESP32-S3-WROOM-2/2U.
+
 config ARCH_BOARD_ET_STM32_STAMP
 	bool "Futurlec: ET-STM32 Stamp"
 	depends on ARCH_CHIP_STM32F103RE
@@ -319,15 +330,15 @@ config ARCH_BOARD_FIRE_STM32
 		tested.
 
 config ARCH_BOARD_CHIPKIT_WIFIRE
-    bool "chipKIT Wi-FIRE"
-    depends on ARCH_CHIP_PIC32MZ2048EFG
-    select ARCH_HAVE_LEDS
-    select ARCH_HAVE_BUTTONS
-    select ARCH_HAVE_IRQBUTTONS
-    ---help---
-        This options selects the chipKIT Wi-FIRE board. This
-        board is a chipKIT Arduino-compatible board. This board
-        features the Microchip PIC32MZ2048EFG100 MCU running at 200 MHz.
+	bool "chipKIT Wi-FIRE"
+	depends on ARCH_CHIP_PIC32MZ2048EFG
+	select ARCH_HAVE_LEDS
+	select ARCH_HAVE_BUTTONS
+	select ARCH_HAVE_IRQBUTTONS
+	---help---
+		This options selects the chipKIT Wi-FIRE board. This
+		board is a chipKIT Arduino-compatible board. This board
+		features the Microchip PIC32MZ2048EFG100 MCU running at 200 MHz.
 
 config ARCH_BOARD_FLIPNCLICK_PIC32MZ
 	bool "Mikroe Flip&Click PIC32MZ"
@@ -445,15 +456,15 @@ config ARCH_BOARD_IMXRT1050_EVK
 		This is the board configuration for the port of NuttX to the NXP i.MXRT
 		evaluation kit, MIMXRT1050-EVKB.  This board features the MIMXRT1052DVL6A MCU.
 
-config ARCH_BOARD_XIDATONG
-	bool "NXP i.MX RT 1052 XIDATONG"
+config ARCH_BOARD_XIDATONG_ARM32
+	bool "NXP i.MX RT 1052 XIDATONG_ARM32"
 	depends on ARCH_CHIP_MIMXRT1052CVL5B
 	select ARCH_HAVE_LEDS
 	select ARCH_HAVE_BUTTONS
 	select ARCH_HAVE_IRQBUTTONS
 	---help---
 		This is the board configuration for the port of NuttX to the NXP i.MXRT
-		evaluation kit, MIMXRT1052-XIDATONG.  This board features the MIMXRT1052CVL5B MCU.
+		evaluation kit, MIMXRT1052-XIDATONG_ARM32.  This board features the MIMXRT1052CVL5B MCU.
 
 config ARCH_BOARD_IMXRT1060_EVK
 	bool "NXP i.MX RT 1060 EVK"
@@ -683,6 +694,14 @@ config ARCH_BOARD_AIIT_RISCV64
 		This is the board configuration for the port of NuttX to the
 		aiit-riscv64 board. This board features the RISC-V K210
 
+config ARCH_BOARD_XIDATONG_RISCV64
+	bool "xidatong riscv64  board"
+	depends on ARCH_CHIP_K210
+	select ARCH_HAVE_LEDS if !K210_WITH_QEMU
+	---help---
+		This is the board configuration for the port of NuttX to the
+		xidatong-riscv64 board. This board features the RISC-V K210
+
 config ARCH_BOARD_SMARTL_C906
 	bool "smartl evaluation board for C906"
 	depends on ARCH_CHIP_C906
@@ -692,12 +711,20 @@ config ARCH_BOARD_SMARTL_C906
 		THEAD smartl-c906 board. This board features the RISC-V C906.
 
 config ARCH_BOARD_ICICLE_MPFS
-        bool "Polarfire Icicle evaluation board for MPFS"
-        depends on ARCH_CHIP_MPFS
-        select ARCH_HAVE_LEDS if !MPFS_WITH_QEMU
-        ---help---
-                This is the board configuration for the port of NuttX to the
-                MicroChip icicle-mpfs board. This board features the RISC-V MPFS.
+	bool "Polarfire Icicle evaluation board for MPFS"
+	depends on ARCH_CHIP_MPFS
+	select ARCH_HAVE_LEDS if !MPFS_WITH_QEMU
+	---help---
+		This is the board configuration for the port of NuttX to the
+		MicroChip icicle-mpfs board. This board features the RISC-V MPFS.
+
+config ARCH_BOARD_M100PFSEVP_MPFS
+	bool "Aries M100PFSEVP evaluation platform for MPFS"
+	depends on ARCH_CHIP_MPFS
+	select MPFS_EMMCSD_MUX_GPIO if !MPFS_WITH_QEMU
+	---help---
+			This is the board configuration for the port of NuttX to the
+			MicroChip m100pfsevp-mpfs board. This board features the RISC-V MPFS.
 
 config ARCH_BOARD_MAX32660_EVSYS
 	bool "Maxim Integrated MAX32660-EVSYS"
@@ -1408,6 +1435,14 @@ config ARCH_BOARD_RASPBERRYPI_PICO
 	---help---
 		This is a port to the Raspberry Pi Pico board.
 
+config ARCH_BOARD_PIMORONI_TINY2040
+	bool "Pimoroni Tiny2040 board"
+	depends on ARCH_CHIP_RP2040
+	---help---
+		This is a port to the Pimoroni Tiny2040 board.
+		Support is derived from Raspberry Pi Pico support.
+		STATUS:  Work has just began on this port.
+
 config ARCH_BOARD_RX65N
 	bool "RX65N renesas board"
 	depends on ARCH_CHIP_R5F565NEDDFC
@@ -1453,6 +1488,13 @@ config ARCH_BOARD_RV32M1_VEGA
 		This is the board configuration for the port of NuttX to the
 		RV32M1 VEGA board. This board features the RV32M1 RISC-V Core(s).
 
+config ARCH_BOARD_QEMU_RV_VIRT
+	bool "QEMU RV Virt"
+	depends on ARCH_CHIP_QEMU_RV
+	---help---
+		This is the board configuration for the port of NuttX to the
+		QEMU RV32 Virt board. This board features the QEMU RV32 CPU.
+
 config ARCH_BOARD_S32K118EVB
 	bool "NXP S32K118EVB"
 	depends on ARCH_CHIP_S32K118
@@ -1514,22 +1556,22 @@ config ARCH_BOARD_SABRE_6QUAD
 		board featuring the iMX 6Quad CPU.
 
 config ARCH_BOARD_SAMA5D2_XULT
-    bool "Atmel SAMA5D2 Xplained Ultra development board"
-    depends on ARCH_CHIP_ATSAMA5D27
-    select ARCH_HAVE_LEDS
-    select ARCH_HAVE_BUTTONS
-    select ARCH_HAVE_IRQBUTTONS
-    ---help---
-        The port of NuttX to the Atmel SAMA5D2-XULT development board
+	bool "Atmel SAMA5D2 Xplained Ultra development board"
+	depends on ARCH_CHIP_ATSAMA5D27
+	select ARCH_HAVE_LEDS
+	select ARCH_HAVE_BUTTONS
+	select ARCH_HAVE_IRQBUTTONS
+	---help---
+		The port of NuttX to the Atmel SAMA5D2-XULT development board
 
 config ARCH_BOARD_GIANT_BOARD
 	bool "Groboards Giant Board (SAMA5D27C-D1G)"
 	depends on ARCH_CHIP_ATSAMA5D27
-    select SAMA5D27_GIANT_BOARD_492MHZ
+	select SAMA5D27_GIANT_BOARD_492MHZ
 	select ARCH_HAVE_LEDS
 	---help---
-	    This options selects support for NuttX on the Groboards Giant Board,
-	    featuring the SAMA5D27C-D1G SIP with 128MB DDR2 RAM.
+		This options selects support for NuttX on the Groboards Giant Board,
+		featuring the SAMA5D27C-D1G SIP with 128MB DDR2 RAM.
 
 config ARCH_BOARD_SAMA5D3X_EK
 	bool "Atmel SAMA5D3x-EK development board"
@@ -1656,6 +1698,15 @@ config ARCH_BOARD_SAM4S_XPLAINED_PRO
 	---help---
 		The port of NuttX to the Atmel SAM4S-Xplained Pro development board.
 
+config ARCH_BOARD_SAME70_QMTECH
+	bool "Atmel SAME70 evaluation board from QMTECH"
+	depends on ARCH_CHIP_SAME70N19
+	select ARCH_HAVE_LEDS
+	select ARCH_HAVE_BUTTONS
+	select ARCH_HAVE_IRQBUTTONS
+	---help---
+		The port of NuttX to the Atmel SAME70 evaluation board from QMTECH.
+
 config ARCH_BOARD_SAME70_XPLAINED
 	bool "Atmel SAME70 Xplained evaluation board"
 	depends on ARCH_CHIP_SAME70Q21
@@ -1951,7 +2002,7 @@ config ARCH_BOARD_B_L072Z_LRWAN1
 		STMicro STM32L0 Discovery kit with LoRa/SigFox based on STM32L072CZ MCU.
 
 config ARCH_BOARD_B_L475E_IOT01A
-	bool "STMicro IoT Discovery kit"
+	bool "STMicro IoT Discovery kit (B-L475E-IOT01A)"
 	depends on ARCH_CHIP_STM32L475VG
 	select ARCH_HAVE_LEDS
 	---help---
@@ -1959,6 +2010,14 @@ config ARCH_BOARD_B_L475E_IOT01A
 		MCU. The STM32L475VG is a Cortex-M4 optimised for low-power operation
 		at up to 80MHz operation with 1024Kb Flash memory and 96+32Kb SRAM.
 
+config ARCH_BOARD_B_U585I_IOT02A
+	bool "STMicro IoT Discovery kit (B-U585-IOT02A)"
+	depends on ARCH_CHIP_STM32U585AI
+	---help---
+		STMicro IoT development board featuring the STM32U585AI
+		MCU. The STM32U585AI is a Cortex-M33 optimised for low-power operation
+		at up to 160MHz operation with 2048Kb Flash memory and 768Kb SRAM.
+
 config ARCH_BOARD_STM32L476VG_DISCO
 	bool "STMicro STM32L476VG -Discovery board"
 	depends on ARCH_CHIP_STM32L476RG
@@ -2068,7 +2127,7 @@ config ARCH_BOARD_TEENSY_3X
 
 		This board configuration can also be used with the older Teensy-3.0.  The
 		Teensy-3.0 has the same schematic (although some pins are not used on the
-		Teensy-3.0).  the primary difference is that the Teensy 3.0 has a
+		Teensy-3.0).  The primary difference is that the Teensy 3.0 has a
 		MK20DX128VLH5 with slightly less capability.
 
 config ARCH_BOARD_TEENSY_4X
@@ -2087,7 +2146,7 @@ config ARCH_BOARD_TEENSY_LC
 	select ARCH_HAVE_LEDS
 	---help---
 		This is the configuration for the Teensy LC board.
-		See https://www.pjrc.com/teensy/teensyLC.html.	The
+		See https://www.pjrc.com/teensy/teensyLC.html.  The
 		Teensy LC is based on the Freescale KL25Z.
 
 config ARCH_BOARD_TM4C123G_LAUNCHPAD
@@ -2269,6 +2328,26 @@ config ARCH_BOARD_SPRESENSE
 	---help---
 		none
 
+config ARCH_BOARD_PHY6222
+	bool "Phyplus PHY6222 EVB Board"
+	depends on ARCH_CHIP_PHY62XX
+	---help---
+		none
+
+config ARCH_BOARD_XX3803
+	bool "Sparc Bm3803 XX3803 Board"
+	depends on ARCH_CHIP_BM3803
+	select ARCH_HAVE_LEDS
+	---help---
+		none
+
+config ARCH_BOARD_XX3823
+	bool "Sparc Bm3823 XX3823 Board"
+	depends on ARCH_CHIP_BM3823
+	select ARCH_HAVE_LEDS
+	---help---
+		none
+
 config ARCH_BOARD_SIM
 	bool "User mode simulation"
 	select ARCH_HAVE_BUTTONS
@@ -2376,6 +2455,7 @@ config ARCH_BOARD
 	default "esp32-wrover-kit"         if ARCH_BOARD_ESP32_WROVERKIT
 	default "esp32c3-devkit"           if ARCH_BOARD_ESP32C3_DEVKIT
 	default "esp32s2-saola-1"          if ARCH_BOARD_ESP32S2_SAOLA_1
+	default "esp32s3-devkit"           if ARCH_BOARD_ESP32S3_DEVKIT
 	default "et-stm32-stamp"           if ARCH_BOARD_ET_STM32_STAMP
 	default "ez80f910200kitg"          if ARCH_BOARD_EZ80F910200KITG
 	default "ez80f910200zco"           if ARCH_BOARD_EZ80F910200ZCO
@@ -2392,7 +2472,7 @@ config ARCH_BOARD
 	default "hymini-stm32v"            if ARCH_BOARD_HYMINI_STM32V
 	default "imxrt1020-evk"            if ARCH_BOARD_IMXRT1020_EVK
 	default "imxrt1050-evk"            if ARCH_BOARD_IMXRT1050_EVK
-	default "xidatong"                 if ARCH_BOARD_XIDATONG
+	default "xidatong-arm32"                 if ARCH_BOARD_XIDATONG_ARM32
 	default "imxrt1060-evk"            if ARCH_BOARD_IMXRT1060_EVK
 	default "imxrt1064-evk"            if ARCH_BOARD_IMXRT1064_EVK
 	default "kwikstik-k40"             if ARCH_BOARD_KWIKSTIK_K40
@@ -2416,8 +2496,10 @@ config ARCH_BOARD
 	default "lx_cpu"                   if ARCH_BOARD_LX_CPU
 	default "maix-bit"                 if ARCH_BOARD_MAIX_BIT
 	default "aiit-riscv64-board"       if ARCH_BOARD_AIIT_RISCV64
+	default "xidatong-riscv64"         if ARCH_BOARD_XIDATONG_RISCV64
 	default "smartl-c906"              if ARCH_BOARD_SMARTL_C906
 	default "icicle"                   if ARCH_BOARD_ICICLE_MPFS
+	default "m100pfsevp"               if ARCH_BOARD_M100PFSEVP_MPFS
 	default "maple"                    if ARCH_BOARD_MAPLE
 	default "makerlisp"                if ARCH_BOARD_MAKERLISP
 	default "max32660-evsys"           if ARCH_BOARD_MAX32660_EVSYS
@@ -2487,6 +2569,7 @@ config ARCH_BOARD
 	default "qemu-i486"                if ARCH_BOARD_QEMU_I486
 	default "intel64-qemu"             if ARCH_BOARD_INTEL64_QEMU
 	default "raspberrypi-pico"         if ARCH_BOARD_RASPBERRYPI_PICO
+	default "pimoroni-tiny2040"        if ARCH_BOARD_PIMORONI_TINY2040
 	default "rx65n"                    if ARCH_BOARD_RX65N
 	default "rx65n-rsk1mb"             if ARCH_BOARD_RX65N_RSK1MB
 	default "rx65n-rsk2mb"             if ARCH_BOARD_RX65N_RSK2MB
@@ -2495,6 +2578,7 @@ config ARCH_BOARD
 	default "s32k144evb"               if ARCH_BOARD_S32K144EVB
 	default "ucans32k146"              if ARCH_BOARD_UCANS32K146
 	default "rv32m1-vega"              if ARCH_BOARD_RV32M1_VEGA
+	default "rv-virt"                  if ARCH_BOARD_QEMU_RV_VIRT
 	default "s32k146evb"               if ARCH_BOARD_S32K146EVB
 	default "s32k148evb"               if ARCH_BOARD_S32K148EVB
 	default "sabre-6quad"              if ARCH_BOARD_SABRE_6QUAD
@@ -2513,6 +2597,7 @@ config ARCH_BOARD
 	default "sam4l-xplained"           if ARCH_BOARD_SAM4L_XPLAINED
 	default "sam4s-xplained"           if ARCH_BOARD_SAM4S_XPLAINED
 	default "sam4s-xplained-pro"       if ARCH_BOARD_SAM4S_XPLAINED_PRO
+	default "same70-qmtech"            if ARCH_BOARD_SAME70_QMTECH
 	default "same70-xplained"          if ARCH_BOARD_SAME70_XPLAINED
 	default "samv71-xult"              if ARCH_BOARD_SAMV71_XULT
 	default "shenzhou"                 if ARCH_BOARD_SHENZHOU
@@ -2544,6 +2629,7 @@ config ARCH_BOARD
 	default "nucleo-g431rb"            if ARCH_BOARD_NUCLEO_G431RB
 	default "b-l072z-lrwan1"           if ARCH_BOARD_B_L072Z_LRWAN1
 	default "b-l475e-iot01a"           if ARCH_BOARD_B_L475E_IOT01A
+	default "b-u585i-iot02a"           if ARCH_BOARD_B_U585I_IOT02A
 	default "stm32l476vg-disco"        if ARCH_BOARD_STM32L476VG_DISCO
 	default "stm32l476-mdk"            if ARCH_BOARD_STM32L476_MDK
 	default "stm32l4r9ai-disco"        if ARCH_BOARD_STM32L4R9AI_DISCO
@@ -2575,9 +2661,12 @@ config ARCH_BOARD
 	default "z8f64200100kit"           if ARCH_BOARD_Z8F64200100KIT
 	default "zp214xpa"                 if ARCH_BOARD_ZP214XPA
 	default "zkit-arm-1769"            if ARCH_BOARD_ZKITARM
+	default "phy6222"                  if ARCH_BOARD_PHY6222
 	default "sim"                      if ARCH_BOARD_SIM
 	default "moxa"                     if ARCH_BOARD_MOXA
 	default "spresense"                if ARCH_BOARD_SPRESENSE
+	default "xx3803"                   if ARCH_BOARD_XX3803
+	default "xx3823"                   if ARCH_BOARD_XX3823
 
 comment "Common Board Options"
 
@@ -2622,7 +2711,6 @@ config ARCH_IRQBUTTONS
 
 comment "Board-Specific Options"
 
-
 if ARCH_BOARD_PCDUINO_A10
 source "boards/arm/a1x/pcduino-a10/Kconfig"
 endif
@@ -2671,8 +2759,8 @@ endif
 if ARCH_BOARD_IMXRT1050_EVK
 source "boards/arm/imxrt/imxrt1050-evk/Kconfig"
 endif
-if ARCH_BOARD_XIDATONG
-source "boards/arm/imxrt/xidatong/Kconfig"
+if ARCH_BOARD_XIDATONG_ARM32
+source "boards/arm/imxrt/xidatong-arm32/Kconfig"
 endif
 if ARCH_BOARD_IMXRT1060_EVK
 source "boards/arm/imxrt/imxrt1060-evk/Kconfig"
@@ -2815,6 +2903,9 @@ endif
 if ARCH_BOARD_RASPBERRYPI_PICO
 source "boards/arm/rp2040/raspberrypi-pico/Kconfig"
 endif
+if ARCH_BOARD_PIMORONI_TINY2040
+source "boards/arm/rp2040/pimoroni-tiny2040/Kconfig"
+endif
 if ARCH_BOARD_ARDUINO_DUE
 source "boards/arm/sam34/arduino-due/Kconfig"
 endif
@@ -2875,6 +2966,9 @@ endif
 if ARCH_BOARD_METRO_M4
 source "boards/arm/samd5e5/metro-m4/Kconfig"
 endif
+if ARCH_BOARD_SAME70_QMTECH
+source "boards/arm/samv7/same70-qmtech/Kconfig"
+endif
 if ARCH_BOARD_SAME70_XPLAINED
 source "boards/arm/samv7/same70-xplained/Kconfig"
 endif
@@ -2932,9 +3026,6 @@ endif
 if ARCH_BOARD_STM32H747I_DISCO
 source "boards/arm/stm32h7/stm32h747i-disco/Kconfig"
 endif
-if ARCH_BOARD_STM32F4_AIIT
-source "boards/arm/stm32/aiit-arm32-board/Kconfig"
-endif
 if ARCH_BOARD_NUCLEO_H743ZI
 source "boards/arm/stm32h7/nucleo-h743zi/Kconfig"
 endif
@@ -2944,6 +3035,9 @@ endif
 if ARCH_BOARD_B_L475E_IOT01A
 source "boards/arm/stm32l4/b-l475e-iot01a/Kconfig"
 endif
+if ARCH_BOARD_B_U585I_IOT02A
+source "boards/arm/stm32u5/b-u585i-iot02a/Kconfig"
+endif
 if ARCH_BOARD_NUCLEO_L432KC
 source "boards/arm/stm32l4/nucleo-l432kc/Kconfig"
 endif
@@ -3100,6 +3194,9 @@ endif
 if ARCH_BOARD_STM32F4_DISCOVERY
 source "boards/arm/stm32/stm32f4discovery/Kconfig"
 endif
+if ARCH_BOARD_STM32F4_AIIT
+source "boards/arm/stm32/aiit-arm32-board/Kconfig"
+endif
 if ARCH_BOARD_STM32L_DISCOVERY
 source "boards/arm/stm32/stm32ldiscovery/Kconfig"
 endif
@@ -3232,24 +3329,33 @@ endif
 if ARCH_BOARD_AIIT_RISCV64
 source "boards/risc-v/k210/aiit-riscv64-board/Kconfig"
 endif
+if ARCH_BOARD_XIDATONG_RISCV64
+source "boards/risc-v/k210/xidatong-riscv64/Kconfig"
+endif
 if ARCH_BOARD_SMARTL_C906
 source "boards/risc-v/c906/smartl-c906/Kconfig"
 endif
 if ARCH_BOARD_ICICLE_MPFS
 source "boards/risc-v/mpfs/icicle/Kconfig"
 endif
+if ARCH_BOARD_M100PFSEVP_MPFS
+source "boards/risc-v/mpfs/m100pfsevp/Kconfig"
+endif
 if ARCH_BOARD_RV32M1_VEGA
 source "boards/risc-v/rv32m1/rv32m1-vega/Kconfig"
 endif
+if ARCH_BOARD_QEMU_RV_VIRT
+source "boards/risc-v/qemu-rv/rv-virt/Kconfig"
+endif
 if ARCH_BOARD_ESP32C3_DEVKIT
 source "boards/risc-v/esp32c3/esp32c3-devkit/Kconfig"
 endif
-if ARCH_CHIP_ESP32S2 && !ARCH_BOARD_CUSTOM
-source "boards/xtensa/esp32s2/common/Kconfig"
-endif
 if ARCH_BOARD_ESP32S2_SAOLA_1
 source "boards/xtensa/esp32s2/esp32s2-saola-1/Kconfig"
 endif
+if ARCH_BOARD_ESP32S3_DEVKIT
+source "boards/xtensa/esp32s3/esp32s3-devkit/Kconfig"
+endif
 if ARCH_BOARD_SIM
 source "boards/sim/sim/sim/Kconfig"
 endif
@@ -3271,9 +3377,6 @@ endif
 if ARCH_BOARD_RX65N_GRROSE
 source "boards/renesas/rx65n/rx65n-grrose/Kconfig"
 endif
-if ARCH_CHIP_ESP32 && !ARCH_BOARD_CUSTOM
-source "boards/xtensa/esp32/common/Kconfig"
-endif
 if ARCH_BOARD_ESP32_DEVKITC
 source "boards/xtensa/esp32/esp32-devkitc/Kconfig"
 endif
@@ -3316,12 +3419,41 @@ endif
 if ARCH_BOARD_BL602EVB
 source "boards/risc-v/bl602/bl602evb/Kconfig"
 endif
+if ARCH_BOARD_PHY6222
+source "boards/arm/phy62xx/phy6222/Kconfig"
+endif
+if ARCH_BOARD_XX3803
+source "boards/sparc/bm3803/xx3803/Kconfig"
+endif
+if ARCH_BOARD_XX3823
+source "boards/sparc/bm3823/xx3823/Kconfig"
+endif
 
 comment "Board-Common Options"
 
+config ARCH_BOARD_COMMON
+	bool "Board common logic"
+	default n
+	---help---
+		 Board common logic located in each board/common folder.
+
+if ARCH_BOARD_COMMON
+if ARCH_CHIP_ESP32
+source "boards/xtensa/esp32/common/Kconfig"
+endif
+if ARCH_CHIP_ESP32S2
+source "boards/xtensa/esp32s2/common/Kconfig"
+endif
+if ARCH_CHIP_ESP32S3
+source "boards/xtensa/esp32s3/common/Kconfig"
+endif
+if ARCH_CHIP_SAMV7
+source "boards/arm/samv7/common/Kconfig"
+endif
 if ARCH_CHIP_STM32
 source "boards/arm/stm32/common/Kconfig"
 endif
+endif
 
 config BOARD_CRASHDUMP
 	bool "Enable Board level logging of crash dumps"
@@ -3408,7 +3540,7 @@ config BOARD_RESET_ON_ASSERT
 
 config BOARD_ASSERT_RESET_VALUE
 	int "Board reset argument"
-	default 0
+	default 1
 	depends on BOARDCTL_RESET
 	---help---
 		Parameter that will be passed to board_reset() by when an
@@ -3519,3 +3651,7 @@ config BOARDCTL_IOCTL
 		Architecture specific logic must provide board_ioctl() interface.
 
 endif # BOARDCTL
+
+config BOARD_USBDEV_SERIALSTR
+	bool
+	default n
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/boards/arm/stm32/common/include/stm32_hs300x.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/boards/arm/stm32/common/include/stm32_hs300x.h
index 4e2822251..d7109b0cb 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/boards/arm/stm32/common/include/stm32_hs300x.h
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/boards/arm/stm32/common/include/stm32_hs300x.h
@@ -1,22 +1,22 @@
-/****************************************************************************
- * boards/arm/stm32/common/include/stm32_hs300x.h
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements.  See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership.  The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License.  You may obtain a copy of the License at
- *
- *   http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
+/*
+* Copyright (c) 2020 AIIT XUOS Lab
+* XiOS is licensed under Mulan PSL v2.
+* You can use this software according to the terms and conditions of the Mulan PSL v2.
+* You may obtain a copy of Mulan PSL v2 at:
+*        http://license.coscl.org.cn/MulanPSL2
+* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+* See the Mulan PSL v2 for more details.
+*/
+
+/**
+ * @file stm32_hs300x.h
+ * @brief stm32 hs300x
+ * @version 1.0
+ * @author AIIT XUOS Lab
+ * @date 2022.04.12
+ */
 
 #ifndef __STM32_HS300X_H
 #define __STM32_HS300X_H
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/boards/arm/stm32/common/src/Make.defs b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/boards/arm/stm32/common/src/Make.defs
index c0b9095b2..329e2561b 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/boards/arm/stm32/common/src/Make.defs
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/boards/arm/stm32/common/src/Make.defs
@@ -18,10 +18,16 @@
 #
 #############################################################################
 
+ifeq ($(CONFIG_ARCH_BOARD_COMMON),y)
+
 ifeq ($(CONFIG_SENSORS_BMP180),y)
   CSRCS += stm32_bmp180.c
 endif
 
+ifeq ($(CONFIG_SENSORS_MS5611),y)
+  CSRCS += stm32_ms5611.c
+endif
+
 ifeq ($(CONFIG_LEDS_APA102),y)
   CSRCS += stm32_apa102.c
 endif
@@ -137,3 +143,5 @@ endif
 DEPPATH += --dep-path src
 VPATH += :src
 CFLAGS += $(shell $(INCDIR) "$(CC)" $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)src)
+
+endif
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/boards/arm/stm32/common/src/stm32_hs300x.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/boards/arm/stm32/common/src/stm32_hs300x.c
index 5d69ea01a..3ad9efca4 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/boards/arm/stm32/common/src/stm32_hs300x.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/boards/arm/stm32/common/src/stm32_hs300x.c
@@ -1,22 +1,23 @@
-/****************************************************************************
- * boards/arm/stm32/common/src/stm32_hs300x.c
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements.  See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership.  The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License.  You may obtain a copy of the License at
- *
- *   http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
+/*
+* Copyright (c) 2020 AIIT XUOS Lab
+* XiOS is licensed under Mulan PSL v2.
+* You can use this software according to the terms and conditions of the Mulan PSL v2.
+* You may obtain a copy of Mulan PSL v2 at:
+*        http://license.coscl.org.cn/MulanPSL2
+* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+* See the Mulan PSL v2 for more details.
+*/
+
+/**
+ * @file stm32_hs300x.c
+ * @brief stm32 hs300x
+ * @version 1.0
+ * @author AIIT XUOS Lab
+ * @date 2022.04.12
+ */
+
 
 /****************************************************************************
  * Included Files
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/boards/arm/stm32/stm32f4discovery/scripts/Make.defs b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/boards/arm/stm32/stm32f4discovery/scripts/Make.defs
index 9f91a74d4..06f263dab 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/boards/arm/stm32/stm32f4discovery/scripts/Make.defs
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/boards/arm/stm32/stm32f4discovery/scripts/Make.defs
@@ -24,22 +24,22 @@ include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs
 
 LDSCRIPT = ld.script
 
-ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
-  ARCHSCRIPT = -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}"
-else
-  ARCHSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
-endif
+ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
 
 ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
   ARCHOPTIMIZATION = -g
 endif
 
 ifneq ($(CONFIG_DEBUG_NOOPT),y)
-  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fomit-frame-pointer
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing
+endif
+
+ARCHCFLAGS = -fno-common -ffunction-sections -fdata-sections
+ARCHCXXFLAGS = -fno-common -ffunction-sections -fdata-sections
+ifneq ($(CONFIG_CXX_EXCEPTION),y)
+  ARCHCXXFLAGS = -fno-exceptions -fcheck-new
 endif
 
-ARCHCFLAGS = -fno-builtin
-ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
 ARCHWARNINGSXX = -Wall -Wshadow -Wundef
 ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
@@ -50,9 +50,6 @@ ifeq ($(CONFIG_ARMV7M_TOOLCHAIN_CLANGL),y)
 else
   ARCHCFLAGS += -funwind-tables
   ARCHCXXFLAGS += -fno-rtti -funwind-tables
-  ifneq ($(CONFIG_DEBUG_NOOPT),y)
-    ARCHOPTIMIZATION += -fno-strength-reduce
-  endif
 
 endif
 
@@ -67,16 +64,14 @@ NXFLATLDFLAGS1 = -r -d -warn-common
 NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
 LDNXFLATFLAGS = -e main -s 2048
 
+LDFLAGS += --gc-sections
+
 # Loadable module definitions
 
 CMODULEFLAGS = $(CFLAGS) -mlong-calls # --target1-abs
 
 LDMODULEFLAGS = -r -e module_initialize
-ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
-  LDMODULEFLAGS += -T "${shell cygpath -w $(TOPDIR)/libs/libc/modlib/gnu-elf.ld}"
-else
-  LDMODULEFLAGS += -T $(TOPDIR)/libs/libc/modlib/gnu-elf.ld
-endif
+LDMODULEFLAGS += -T $(call CONVERT_PATH,$(TOPDIR)/libs/libc/modlib/gnu-elf.ld)
 
 # ELF module definitions
 
@@ -84,11 +79,7 @@ CELFFLAGS = $(CFLAGS) -mlong-calls # --target1-abs
 CXXELFFLAGS = $(CXXFLAGS) -mlong-calls # --target1-abs
 
 LDELFFLAGS = -r -e main
-ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
-  LDELFFLAGS += -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)gnu-elf.ld}"
-else
-  LDELFFLAGS += -T $(BOARD_DIR)$(DELIM)scripts$(DELIM)gnu-elf.ld
-endif
+LDELFFLAGS += -T $(call CONVERT_PATH,$(BOARD_DIR)$(DELIM)scripts$(DELIM)gnu-elf.ld)
 
 ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
   LDFLAGS += -g
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/boards/arm/stm32/stm32f4discovery/src/stm32_bringup.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/boards/arm/stm32/stm32f4discovery/src/stm32_bringup.c
index ca1126182..eb1435cd9 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/boards/arm/stm32/stm32f4discovery/src/stm32_bringup.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/boards/arm/stm32/stm32f4discovery/src/stm32_bringup.c
@@ -22,7 +22,7 @@
 * @file stm32_bringup.c
 * @brief nuttx source code
 *                https://github.com/apache/incubator-nuttx.git
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
@@ -81,6 +81,10 @@
 #include "stm32_bmp180.h"
 #endif
 
+#ifdef CONFIG_SENSORS_MS5611
+#include "stm32_ms5611.h"
+#endif
+
 #ifdef CONFIG_SENSORS_MAX6675
 #include "stm32_max6675.h"
 #endif
@@ -222,6 +226,17 @@ int stm32_bringup(void)
     }
 #endif
 
+#ifdef CONFIG_SENSORS_MS5611
+  /* Initialize the MS5611 pressure sensor. */
+
+  ret = board_ms5611_initialize(0, 1);
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "Failed to initialize MS5611, error %d\n", ret);
+      return ret;
+    }
+#endif
+
 #ifdef CONFIG_SENSORS_BH1750FVI
   ret = board_bh1750_initialize(0, 1);
   if (ret < 0)
@@ -345,7 +360,7 @@ int stm32_bringup(void)
     }
 #endif
 
-#ifdef CONFIG_CAN
+#ifdef CONFIG_STM32_CAN_CHARDRIVER
   /* Initialize CAN and register the CAN driver. */
 
   ret = stm32_can_setup();
@@ -531,7 +546,7 @@ int stm32_bringup(void)
   ret = stm32_gs2200m_initialize("/dev/gs2200m", 3);
   if (ret < 0)
     {
-      serr("ERROR: Failed to initialize GS2200M: %d \n", ret);
+      serr("ERROR: Failed to initialize GS2200M: %d\n", ret);
     }
 #endif
 
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/input/Kconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/input/Kconfig
index 68504001c..48a9ccdb5 100755
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/input/Kconfig
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/input/Kconfig
@@ -14,7 +14,7 @@ menuconfig INPUT
 if INPUT
 
 config INPUT_MOUSE
-	bool "Enable mouse support"
+	bool
 	default n
 	---help---
 		Enable support for mouse devices.
@@ -32,8 +32,26 @@ endif # INPUT_MOUSE
 
 config INPUT_TOUCHSCREEN
 	bool
+	select MM_CIRCBUF
 	default n
 
+if INPUT_TOUCHSCREEN
+
+config INPUT_TOUCHSCREEN_NPOLLWAITERS
+	int "Number touchscreen poll waiters"
+	default 4
+	---help---
+		Maximum number of threads that can be waiting on poll()
+
+endif # INPUT_TOUCHSCREEN
+
+config INPUT_UINPUT
+	bool "Enable uinput"
+	select INPUT_TOUCHSCREEN
+	default n
+	---help---
+		Enable support virtual input device driver
+
 config INPUT_MAX11802
 	bool "MAX11802 touchscreen controller"
 	default n
@@ -549,7 +567,7 @@ config INPUT_SPQ10KBD
 if INPUT_SPQ10KBD
 
 config SPQ10KBD_DJOY
-    bool "Joystick Interface for Buttons"
+	bool "Joystick Interface for Buttons"
 	select INPUT_DJOYSTICK
 	default n
 
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/input/Make.defs b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/input/Make.defs
index 605f6ae3b..bf911e15b 100755
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/input/Make.defs
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/input/Make.defs
@@ -24,10 +24,18 @@ ifeq ($(CONFIG_INPUT),y)
 
 # Include the selected touchscreen drivers
 
+ifeq ($(CONFIG_INPUT_TOUCHSCREEN),y)
+CSRCS += touchscreen_upper.c
+endif
+
 ifeq ($(CONFIG_INPUT_TSC2007),y)
   CSRCS += tsc2007.c
 endif
 
+ifeq ($(CONFIG_INPUT_UINPUT),y)
+  CSRCS += uinput.c
+endif
+
 ifeq ($(CONFIG_INPUT_FT5X06),y)
   CSRCS += ft5x06.c
 endif
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/lcd/Kconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/lcd/Kconfig
new file mode 100755
index 000000000..3db813e68
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/lcd/Kconfig
@@ -0,0 +1,1630 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+menu "LCD Driver Support"
+
+menuconfig LCD
+	bool "Graphic LCD Driver Support"
+	default n
+	---help---
+		Drivers for parallel and serial LCD and OLED type devices.  These
+		drivers support interfaces as defined in include/nuttx/lcd/lcd.h
+
+		This selection is necessary to enable support for LCD drivers in
+		drivers/lcd as well as for board-specific LCD drivers in the boards/
+		subdirectories.
+
+if LCD
+
+config LCD_PACKEDMSFIRST
+	bool
+	default n
+
+comment "Common Graphic LCD Settings"
+
+config LCD_DEV
+	bool "LCD character device"
+	default n
+	---help---
+		This option enables support for a character driver which exposes
+		LCD operations to userspace via ioctl() commands. This is useful when
+		not using NXGraphics but an alternative graphics library such as LVGL.
+
+config LCD_FRAMEBUFFER
+	bool "LCD framebuffer front end"
+	default n
+	select FB_UPDATE
+	---help---
+		Enable a "front end" that converts an sequential LCD driver into a
+		standard, NuttX frame buffer driver.
+
+		NOTE: Some LCD drivers implement an internal framebuffer for
+		efficiency reasons but do not export a framebuffer interface.  So
+		those LCD cannot be used as framebuffer drivers.  If the option is
+		available, then such internal framebuffer support should be
+		disabled because this external common framebuffer interface will
+		provide the necessary buffering.
+
+config LCD_EXTERNINIT
+	bool "External LCD Initialization"
+	default n
+	depends on LCD_FRAMEBUFFER
+	---help---
+		Define to support external LCD initialization by platform-specific
+		code.  If this option is defined, then the LCD framebuffer
+		emulation will call board_graphics_setup() to initialize the
+		graphics device.  This option is necessary if display is used that
+		cannot be initialized using the standard LCD interfaces.
+
+menu "LCD driver selection"
+
+config LCD_NOGETRUN
+	bool "Write-only LCD"
+	default n
+	---help---
+		Many LCD hardware interfaces provide only minimal graphics capability.  In
+		particularly, many simple LCD interfaces are write only.  That is we, can
+		write graphics data to the LCD device memory, but we cannot read it back.
+		If the LCD hardware does not support reading the graphics memory, then
+		this option should be defined so that the NX layer can taking alternative
+		measures when the LCD is not readable.  For example, if the LCD is not
+		readable, then NX will not attempt to support transparency.
+
+		See also NX_WRITEONLY in the graphics support menu.
+
+config LCD_MAXCONTRAST
+	int "LCD maximum contrast"
+	default 31 if AQM_1248A
+	default 63 if LCD_SHARP_MEMLCD
+	default 255 if LCD_P14201 || LCD_LCD1602
+	default 63
+	range 1 255
+	---help---
+		must be 63 with the Epson controller and 127 with
+		the Phillips controller.
+
+config LCD_MAXPOWER
+	int "LCD maximum power"
+	default 255 if LCD_LCD1602
+	default 1
+	range 1 255
+	---help---
+		Maximum value of LCD power setting.  This normally equates to brightness:
+		The brighter the screen, the high the power usage.
+
+		On LCDs that have a backlight, this value corresponds directly to that
+		backlight setting.  Board-specific logic may place restrictions on this
+		value.
+
+comment "Graphic LCD Devices"
+
+config LCD_P14201
+	bool "Rit P1402 series display"
+	default n
+	---help---
+		p14201.c.  Driver for RiT P14201 series display with SD1329 IC
+		controller.  This OLED is used with older versions of the
+		TI/Luminary LM3S8962 Evaluation Kit.
+
+if LCD_P14201
+config P14201_NINTERFACES
+	int "Number of physical P14201 devices"
+	default 1
+	range 1 1
+	---help---
+		Specifies the number of physical P14201
+		devices that will be supported.
+
+config P14201_SPIMODE
+	int "SPI mode"
+	default 2
+	range 0 3
+	---help---
+		Controls the SPI mode
+
+config P14201_FREQUENCY
+	int "SPI frequency"
+	default 1000000
+	---help---
+		Define to use a different bus frequency,FIXME DEFAULT VALUE OK?
+
+config P14201_FRAMEBUFFER
+	bool "Enable P14201 GDDRAM cache"
+	default y
+	---help---
+		If defined, accesses will be performed
+		using an in-memory copy of the OLEDs GDDRAM.  This cost of this
+		buffer is 128 * 96 / 2 = 6Kb.  If this is defined, then the driver
+		will be fully functional. If not, then it will have the following
+		limitations:
+
+		Reading graphics memory cannot be supported, and
+
+		All pixel writes must be aligned to byte boundaries.
+		The latter limitation effectively reduces the 128x96 display to 64x96.
+
+		NOTE: This option should not be used if CONFIG_LCD_FRAMBEBUFFER is
+		enabled.  That options provides for a more generalized, external
+		LCD framebuffer.  This internal framebuffer support should not be
+		enabled with CONFIG_LCD_FRAMBEBUFFER because this external common
+		framebuffer interface will provide the necessary buffering.
+endif
+
+config LCD_MAX7219
+	bool "Matrix of 8x8 LEDs controlled by MAX7219"
+	default n
+	---help---
+		Matrix of LEDs (8x8) controlled by MAX7219.
+		You can use cluster of 8x8 chained together.
+
+if LCD_MAX7219
+
+config MAX7219_NHORIZONTALBLKS
+	int "Number of 8x8 LEDs matrices in the horizontal (width)!"
+	default 1
+	---help---
+		Specifies the number of physical 8x8 LED matrices that are
+		connected together in the horizontal. In fact we have only
+		a single strip, but it can be arranged in blocks creating
+		physically horizontal/vertical columns/rows.
+
+config MAX7219_NVERTICALBLKS
+	int "Number of 8x8 LEDs matrices in the vertical (height)!"
+	default 1
+	---help---
+		Specifies the number of physical 8x8 LED matrices that are
+		connected together in the vertical. In fact we have only
+		a single strip, but it can be arranged in blocks creating
+		physically horizontal/vertical columns/rows.
+
+config MAX7219_INTENSITY
+	int "Default LED Matrix bright intensity"
+	default 10
+	range 0 15
+	---help---
+		Specifies the default LEDs bright intensity to use.
+
+endif # LCD_MAX7219
+
+config LCD_MIO283QT2
+	bool "MIO283QT-2 TFT LCD Display Module"
+	default n
+	---help---
+		OLED Display Module, MIO283QT-2, Multi-Inno Technology, Co.
+		based on the Himax HX8347-D LCD controller.
+
+config LCD_MIO283QT9A
+	bool "MIO283QT-9A TFT LCD Display Module"
+	default n
+	---help---
+		Selects the driver for the MI0283QT-9A LCD from Multi-Inno
+		Technology Co., Ltd.  This LCD is based on the Ilitek ILI9341
+		LCD controller.
+
+config LCD_UG9664HSWAG01
+	bool "UG-9664HSWAG01 OLED Display Module"
+	default n
+	depends on SPI
+	---help---
+		OLED Display Module, UG-9664HSWAG01, Univision Technology Inc.  Used
+		with the LPCXpresso and Embedded Artists base board.
+
+		Required LCD driver settings:
+		LCD_MAXCONTRAST should be 255, but any value >0 and <=255 will be accepted.
+		LCD_MAXPOWER should be 1:  0=off, 1=on
+
+		Required SPI driver settings:
+		SPI_CMDDATA - Include support for cmd/data selection.
+
+if LCD_UG9664HSWAG01
+
+config UG9664HSWAG01_SPIMODE
+	int "UG-9664HSWAG01 SPI Mode"
+	default 0
+	range 0 3
+	---help---
+		Controls the SPI mode
+
+config UG9664HSWAG01_FREQUENCY
+	int "UG-9664HSWAG01 SPI Frequency"
+	default 3500000
+	---help---
+		Define to use a different bus frequency
+
+config UG9664HSWAG01_NINTERFACES
+	int "Number of UG-9664HSWAG01 Devices"
+	default 1
+	---help---
+		Specifies the number of physical UG-9664HSWAG01 devices that will be
+		supported.  NOTE:  At present, this must be undefined or defined to be 1.
+
+config UG9664HSWAG01_POWER
+	bool "Power control"
+	default n
+	---help---
+		If the hardware supports a controllable OLED a power supply, this
+		configuration should be defined.  In this case the system must
+		provide an interface ug_power().
+
+endif
+
+config LCD_SH1106_OLED_132
+	bool "Generic 0.96'' OLED Display Module (SH1106/SSD1306)"
+	default n
+	select LCD_SSD1306
+	---help---
+		0.96'' OLED Display Module, featuring an SH1106, typically advertised as
+		SSD1306. Mostly similar to "UG2864HSWEG01" although it uses the full
+		132x28 pixels.
+
+		Required LCD driver settings:
+		LCD_MAXCONTRAST should be 255, but any value >0 and <=255 will be accepted.
+		LCD_MAXPOWER should be 1:  0=off, 1=on
+
+config LCD_UG2864HSWEG01
+	bool "UG-2864HSWEG01 OLED Display Module (SSD1306)"
+	default n
+	select LCD_SSD1306
+	---help---
+		OLED Display Module, UG-2864HSWEG01, Univision Technology Inc based
+		on the Solomon Tech SSD1306 LCD controller.
+
+		Required LCD driver settings:
+		LCD_MAXCONTRAST should be 255, but any value >0 and <=255 will be accepted.
+		LCD_MAXPOWER should be 1:  0=off, 1=on
+
+		Required SPI driver settings:
+		SPI_CMDDATA - Include support for cmd/data selection.
+
+config LCD_UG2832HSWEG04
+	bool "UG-2832HSWEG04 OLED Display Module (SSD1306)"
+	default n
+	select LCD_SSD1306
+	---help---
+		OLED Display Module, UG-UG2832HSWEG04, Univision Technology Inc
+		based on the Solomon Tech SSD1306 LCD controller.  Used with the
+		Atmel SAM4L Xplained Pro board on the OLED1 module.
+
+		Required LCD driver settings:
+		LCD_MAXCONTRAST should be 255, but any value >0 and <=255 will be accepted.
+		LCD_MAXPOWER should be 1:  0=off, 1=on
+
+		Required SPI driver settings:
+		SPI_CMDDATA - Include support for cmd/data selection.
+
+config LCD_DD12864WO4A
+	bool "DD-12864WO-4A OLED Display Module"
+	default n
+	select LCD_SSD1306
+	select SPI_CMDDATA
+	---help---
+		OLED Display Module, DD-12864WO-4A, Densitron Technologies
+		based on the Solomon Tech SSD1309 LCD controller.  Used with the
+		ThingseeOne board.
+
+		Required LCD driver settings:
+		LCD_MAXCONTRAST should be 255, but any value >0 and <=255 will be accepted.
+		LCD_MAXPOWER should be 1:  0=off, 1=on
+
+		Required SPI driver settings:
+		SPI_CMDDATA - Include support for cmd/data selection.
+
+config LCD_HILETGO
+	bool "HiletGO 128x64 OLED"
+	default n
+	select LCD_SSD1306
+	select SPI_CMDDATA
+	---help---
+		HiletGo 129x64 OLED Display Module, featuring an SSD1306.
+
+		Required LCD driver settings:
+		LCD_MAXCONTRAST should be 255, but any value >0 and <=255 will be accepted.
+		LCD_MAXPOWER should be 1:  0=off, 1=on
+
+config LCD_SSD1306
+	bool
+
+if LCD_SSD1306
+
+choice
+	prompt "SSD1306 Interface"
+	default LCD_SSD1306_SPI
+
+config LCD_SSD1306_SPI
+	bool "SSD1306 on SPI Interface"
+	select SPI
+	---help---
+		Enables support for the SPI interface.
+
+config LCD_SSD1306_I2C
+	bool "SSD1306 on I2C Interface"
+	select I2C
+	---help---
+		Enables support for the I2C interface
+
+endchoice # SSD1306 Interface
+endif # LCD_SSD1306
+
+if LCD_SSD1306_SPI
+
+config SSD1306_SPIMODE
+	int "SSD1306 SPI Mode"
+	default 0 if !LCD_DD12864WO4A
+	default 3 if LCD_DD12864WO4A
+	range 0 3
+	---help---
+		Selects the SPI mode used with the SSD1306 device
+
+config SSD1306_FREQUENCY
+	int "SSD1306 SPI Frequency"
+	default 3500000 if !LCD_DD12864WO4A
+	default 10000000 if LCD_DD12864WO4A
+	---help---
+		Selects the SPI bus frequency used with the SSD1306 device
+
+endif # LCD_SSD1306_SPI
+
+if LCD_SSD1306_I2C
+
+config SSD1306_I2CADDR
+	int "SSD1306 I2C Address"
+	default 60
+	---help---
+		7-bit I2C Address of SSD1306.  Typical addresses are 0x3c (60) or
+		0x3d (61).  NOTE that these correspond to the 8-bit addresses
+		0x78 or 0x7a that you may see in documentation.
+
+config SSD1306_I2CFREQ
+	int "SSD1306 I2C Frequency"
+	default 400000
+	---help---
+		I2C Frequency to communicate with SSD1306
+
+endif # LCD_SSD1306_I2C
+
+config LCD_SSD1351
+	bool "SSD1351 OLED Display Module"
+	default n
+	---help---
+		OLED Display Module, SSD1351, Solomon Systech.
+
+if LCD_SSD1351
+
+choice
+	prompt "Interface"
+	default SSD1351_SPI4WIRE
+
+config SSD1351_PARALLEL8BIT
+	bool "8-bit Parallel Interface"
+	---help---
+		Enables support for the 8-bit parallel interface.
+
+config SSD1351_SPI3WIRE
+	bool "3-wire SPI Interface"
+	select SPI
+	---help---
+		Enables support for the 3-wire SPI interface.
+
+config SSD1351_SPI4WIRE
+	bool "4-wire SPI Interface"
+	select SPI
+	select SPI_CMDDATA
+	---help---
+		Enables support for the 4-wire SPI interface.
+
+endchoice
+
+if SSD1351_SPI3WIRE || SSD1351_SPI4WIRE
+
+config SSD1351_SPIMODE
+	int "SPI Mode"
+	default 0
+	range 0 3
+	---help---
+		Specifies the SPI mode.
+
+config SSD1351_SPIFREQ
+	int "SPI Frequency"
+	default 1000000
+	---help---
+		Specifies the SPI frequency.
+
+endif
+
+config SSD1351_NINTERFACES
+	int "Number of SSD1351 Devices"
+	default 1
+	range 1 1
+	---help---
+		Specifies the number of physical SSD1351 devices that will
+		be supported.
+
+config SSD1351_XRES
+	int "X Resolution"
+	default 128
+	range 1 128
+	---help---
+		Specifies the X resolution of the display.
+
+config SSD1351_YRES
+	int "Y Resolution"
+	default 128
+	range 1 128
+	---help---
+		Specifies the Y resolution of the display.
+
+config SSD1351_MIRRORX
+	bool "Mirror X"
+	default n
+	---help---
+		Mirrors the display along the X axis.
+
+config SSD1351_MIRRORY
+	bool "Mirror Y"
+	default n
+	---help---
+		Mirrors the display along the Y axis.
+
+config SSD1351_INVERT
+	bool "Invert Display"
+	default n
+	---help---
+		Inverts the display.
+
+config SSD1351_VDDEXT
+	bool "External VDD"
+	default n
+	---help---
+		Specifies that VDD is external.
+
+config SSD1351_TRST
+	int "Reset Period"
+	default 5
+	range 5 31
+	---help---
+		Specifies the reset period in DCLKs.
+
+config SSD1351_TPRECHG1
+	int "First Pre-charge Period"
+	default 8
+	range 3 15
+	---help---
+		Specifies the first pre-charge period in DCLKs.
+
+config SSD1351_PERFENHANCE
+	bool "Enhance Display Performance"
+	default n
+	---help---
+		Enhances the display performance.
+
+config SSD1351_CLKDIV
+	int "Clock Divider"
+	default 0
+	range 0 10
+	---help---
+		Specifies the clock divider.
+
+config SSD1351_OSCFREQ
+	int "Oscillator Frequency"
+	default 15
+	range 0 15
+	---help---
+		Specifies the oscillator frequency.
+
+config SSD1351_TPRECHG2
+	int "Second Pre-charge Period"
+	default 8
+	range 1 15
+	---help---
+		Specifies the second pre-charge period in DCLKs.
+
+config SSD1351_VPRECHG
+	int "Voltage Pre-charge Level"
+	default 50
+	range 20 60
+	---help---
+		Specifies the pre-charge voltage level as a percentage of VCC.
+
+config SSD1351_VCOMH
+	int "COM Deselect Voltage Level"
+	default 82
+	range 72 86
+	---help---
+		Specifies the COM deselect voltage level as a percentage of VCC.
+
+config SSD1351_CONTRASTA
+	int "Color A Contrast"
+	default 138
+	range 0 255
+	---help---
+		Specifies the contrast of color A.
+
+config SSD1351_CONTRASTB
+	int "Color B Contrast"
+	default 81
+	range 0 255
+	---help---
+		Specifies the contrast of color B.
+
+config SSD1351_CONTRASTC
+	int "Color C Contrast"
+	default 138
+	range 0 255
+	---help---
+		Specifies the contrast of color C.
+
+config SSD1351_MSTRCONTRAST
+	int "Master Contrast Ratio"
+	default 16
+	range 1 16
+	---help---
+		Specifies the master contrast ratio in sixteenths.
+
+endif
+
+config LCD_ST7735
+	bool "Sitronix ST7735 TFT Controller"
+	default n
+
+if LCD_ST7735
+	choice
+		prompt "LCD Preset Resolutions"
+		optional
+
+		config LCD_ST7735_GM11
+			bool "128x160"
+
+		config LCD_ST7735_GM00
+			bool "132x162"
+
+		config LCD_ST7735_GM01
+			bool "132x132"
+
+	endchoice
+
+if  !LCD_ST7735_GM00 && !LCD_ST7735_GM01 && !LCD_ST7735_GM11
+
+	config LCD_ST7735_XRES
+	int "ST7735 X Resolution"
+	default 128
+	---help---
+		Specifies the X resolution of the LCD.
+
+	config LCD_ST7735_YRES
+	int "ST7735 Y Resolution"
+	default 160
+	---help---
+		Specifies the Y resolution of the LCD.
+
+	config LCD_ST7735_XOFFSET
+	int "ST7735 X Offset"
+	default 0
+	---help---
+		Specifies the X offset of the LCD.
+
+	config LCD_ST7735_YOFFSET
+	int "ST7735 Y Offset"
+	default 0
+	---help---
+		Specifies the Y offset of the LCD.
+
+endif
+
+	config LCD_ST7735_BGR
+		bool "Swap R & B channel"
+		default n
+
+	config LCD_ST7735_BPP
+		int "Bit Per Pixel (12, 16 or 18)"
+		default 16
+
+	config LCD_ST7735_SPIMODE
+		int "SPI Mode"
+		default 0
+
+	config LCD_ST7735_FREQUENCY
+		int "SPI Frequency"
+		default 3000000
+
+endif # LCD_ST7735
+
+config LCD_ST7789
+	bool "Sitronix ST7789 TFT Controller"
+	default n
+
+if LCD_ST7789
+	config LCD_ST7789_XRES
+		int "ST7789 X Resolution"
+		default 240
+		---help---
+			Specifies the X resolution of the LCD.
+
+	config LCD_ST7789_YRES
+		int "ST7789 Y Resolution"
+		default 320
+		---help---
+			Specifies the Y resolution of the LCD.
+
+	config LCD_ST7789_XOFFSET
+		int "ST7789 X Offset"
+		default 0
+		---help---
+			Specifies the X offset of the LCD.
+
+	config LCD_ST7789_YOFFSET
+		int "ST7789 Y Offset"
+		default 0
+		---help---
+			Specifies the Y offset of the LCD.
+
+	config LCD_ST7789_BPP
+		int "Bit Per Pixel (12 or 16)"
+		default 16
+
+	config LCD_ST7789_SPIMODE
+		int "SPI Mode"
+		default 0
+
+	config LCD_ST7789_FREQUENCY
+		int "SPI Frequency"
+		default 1000000
+
+endif # LCD_ST7789
+
+config LCD_GC9A01
+	bool "Galaxycore GC9A01 TFT Controller"
+	default n
+
+if LCD_GC9A01
+	config LCD_GC9A01_XRES
+		int "GC9A01 X Resolution"
+		default 240
+		---help---
+			Specifies the X resolution of the LCD.
+
+	config LCD_GC9A01_YRES
+		int "GC9A01 Y Resolution"
+		default 240
+		---help---
+			Specifies the Y resolution of the LCD.
+
+	config LCD_GC9A01_XOFFSET
+		int "GC9A01 X Offset"
+		default 0
+		---help---
+			Specifies the X offset of the LCD.
+
+	config LCD_GC9A01_YOFFSET
+		int "GC9A01 Y Offset"
+		default 0
+		---help---
+			Specifies the Y offset of the LCD.
+
+	config LCD_GC9A01_BGR
+		bool "Swap R & B channel"
+		default n
+
+	config LCD_GC9A01_BPP
+		int "Bit Per Pixel (12 or 16)"
+		default 16
+
+	config LCD_GC9A01_SPIMODE
+		int "SPI Mode"
+		default 0
+
+	config LCD_GC9A01_FREQUENCY
+		int "SPI Frequency"
+		default 1000000
+
+endif # LCD_GC9A01
+
+config LCD_PCD8544
+	bool "Nokia 5110 LCD Display (Philips PCD8544)"
+	default n
+	---help---
+		LCD Display Module, PCD8544, Philips
+
+		Required LCD driver settings:
+		LCD_MAXCONTRAST should be 255, but any value >0 and <=255 will be accepted.
+
+if LCD_PCD8544
+
+config PCD8544_NINTERFACES
+	int "Number of PCD8544 Devices"
+	default 1
+	---help---
+		Specifies the number of physical PCD8544 devices that will be
+		supported.  NOTE:  At present, this must be undefined or defined to be 1.
+
+config PCD8544_XRES
+	int "PCD8544 X Resolution"
+	default 84
+	---help---
+		Specifies the X resolution of the LCD.
+
+config PCD8544_YRES
+	int "PCD8544 Y Resolution"
+	default 48
+	---help---
+		Specifies the Y resolution of the LCD.
+
+config PCD8544_INVERSE_VIDEO
+	bool "PCD8544 Inverse video"
+	default n
+	---help---
+		Inverse video on LCD.
+
+endif # LCD_PCD8544
+
+config LCD_ST7565
+	bool "ST7565 LCD Display Module"
+	default n
+	---help---
+		LCD Display Module, ST7565, Univision Technology Inc.
+
+		Required LCD driver settings:
+		LCD_MAXCONTRAST should be 255, but any value >0 and <=255 will be accepted.
+
+if LCD_ST7565
+
+choice
+	prompt "LCD Display Module initialization sequence"
+	default NHD_C12864KGZ
+
+config NHD_C12864KGZ
+	bool "like NHD C12864KGZ"
+
+config ERC_12864_3
+	bool "like ERC12864-3"
+
+config AQM_1248A
+	bool "like AQM1248A"
+
+endchoice
+
+config ST7565_NINTERFACES
+	int "Number of ST7565 Devices"
+	default 1
+	---help---
+		Specifies the number of physical ST7565 devices that will be
+		supported.  NOTE:  At present, this must be undefined or defined to be 1.
+
+config ST7565_XRES
+	int "ST7565 X Resolution"
+	default 128
+	---help---
+		Specifies the X resolution of the LCD.
+
+config ST7565_YRES
+	int "ST7565 Y Resolution"
+	default 48 if AQM_1248A
+	default 64
+	---help---
+		Specifies the Y resolution of the LCD.
+
+config ST7565_MIRROR_X
+	bool "ST7565 apply mirror on X"
+	default n
+	---help---
+		Mirror X on LCD.
+
+config ST7565_MIRROR_Y
+	bool "ST7565 apply mirror on Y"
+	default y if AQM_1248A
+	default n
+	---help---
+		Mirror Y on LCD.
+
+config ST7565_INVERSE_VIDEO
+	bool "ST7565 Inverse video"
+	default n
+	---help---
+		Inverse video on LCD.
+
+endif # LCD_ST7565
+
+config LCD_ST7567
+	bool "ST7567 LCD Display Module"
+	default n
+	---help---
+		LCD Display Module, ST7567, Univision Technology Inc.  Used
+		with the LPCXpresso and Embedded Artists base board.
+
+		Required LCD driver settings:
+		LCD_MAXCONTRAST should be 255, but any value >0 and <=255 will be accepted.
+		LCD_MAXPOWER should be 1:  0=off, 1=on
+
+		Required SPI driver settings:
+		SPI_CMDDATA - Include support for cmd/data selection.
+
+if LCD_ST7567
+
+config ST7567_SPIMODE
+	int "ST7567 SPI Mode"
+	default 0
+	range 0 3
+	---help---
+		Controls the SPI mode
+
+config ST7567_FREQUENCY
+	int "ST7567 SPI Frequency"
+	default 3500000
+	---help---
+		Define to use a different bus frequency
+
+config ST7567_NINTERFACES
+	int "Number of ST7567 Devices"
+	default 1
+	---help---
+		Specifies the number of physical ST7567 devices that will be
+		supported.  NOTE:  At present, this must be undefined or defined to be 1.
+
+config ST7567_POWER
+	bool "Power control"
+	default n
+	---help---
+		If the hardware supports a controllable LCD a power supply, this
+		configuration should be defined.  In this case the system must
+		provide an interface ug_power().
+
+config ST7567_XRES
+	int "ST7567 X Resolution"
+	default 128
+	---help---
+		Specifies the X resolution of the LCD.
+
+config ST7567_YRES
+	int "ST7567 Y Resolution"
+	default 64
+	---help---
+		Specifies the Y resolution of the LCD.
+
+endif # LCD_ST7567
+
+config LCD_UG2864AMBAG01
+	bool "UG-2864AMBAG01 OLED Display Module"
+	default n
+	---help---
+		OLED Display Module, UG-2864AMBAG01, Univision Technology Inc.
+
+		Required LCD driver settings:
+		LCD_MAXCONTRAST should be 255, but any value >0 and <=255 will be accepted.
+		LCD_MAXPOWER should be 1:  0=off, 1=on
+
+		Required SPI driver settings:
+		SPI_CMDDATA - Include support for cmd/data selection.
+
+if LCD_UG2864AMBAG01
+
+config UG2864AMBAG01_SPIMODE
+	int "UG-2864AMBAG01 SPI Mode"
+	default 3
+	range 0 3
+	---help---
+		Controls the SPI mode
+
+config UG2864AMBAG01_FREQUENCY
+	int "UG-2864AMBAG01 SPI Frequency"
+	default 3500000
+	---help---
+		Define to use a different bus frequency
+
+config UG2864AMBAG01_NINTERFACES
+	int "Number of UG-2864AMBAG01 Devices"
+	default 1
+	---help---
+		Specifies the number of physical UG-9664HSWAG01 devices that will be
+		supported.  NOTE:  At present, this must be undefined or defined to be 1.
+
+endif
+
+config LCD_SSD1289
+	bool "LCD Based on SSD1289 Controller"
+	default n
+	---help---
+		Enables generic support for any LCD based on the Solomon Systech,
+		Ltd, SSD1289 Controller.  Use of this driver will usually require so
+		detailed customization of the LCD initialization code as necessary
+		for the specific LCD driven by the SSD1289 controller.
+
+if LCD_SSD1289
+
+choice
+	prompt "SSD1289 Initialization Profile"
+	default SSD1289_PROFILE1
+
+config SSD1289_PROFILE1
+	bool "Profile 1"
+
+config SSD1289_PROFILE2
+	bool "Profile 2"
+
+config SSD1289_PROFILE3
+	bool "Profile 3"
+
+endchoice
+endif
+
+config LCD_SHARP_MEMLCD
+	bool "Sharp Memory LCD Suite"
+	default n
+	---help---
+		memlcd.c. Driver for Sharp Memory LCD Suite.
+
+if LCD_SHARP_MEMLCD
+
+choice
+	prompt "Memory LCD Model"
+	default MEMLCD_LS013B7DH03
+
+config MEMLCD_LS013B7DH01
+	bool "LS013B7DH01"
+	---help---
+		Selects the LS013B7DH01 model
+
+config MEMLCD_LS013B7DH03
+	bool "LS013B7DH03"
+	---help---
+		Selects the LS013B7DH03 model
+
+endchoice
+
+config MEMLCD_NINTERFACES
+	int "Number of physical Memory LCD devices"
+	default 1
+	range 1 1
+	---help---
+		Specifies the number of physical Memory LCD devices that will
+		be supported.
+
+config MEMLCD_EXTCOMIN_MODE_HW
+	bool "Use hardware mode for EXTCOMIN"
+	default n
+	---help---
+		If use hardware mode to toggle VCOM, we need to send specific
+		command at a constant frequency to trigger the LCD internal
+		hardware logic.  While use software mode, we set up a timer to
+		toggle EXTCOMIN connected IO, basically, it is a hardware
+		timer to ensure a constant frequency.
+
+config MEMLCD_SPI_FREQUENCY
+	int "SPI frequency"
+	default 3500000
+	---help---
+		Define to use a different bus frequency, FIXME DEFAULT VALUE OK?
+
+endif
+
+choice
+	prompt "LCD Orientation"
+	default LCD_LANDSCAPE
+	depends on LCD
+	---help---
+		Some LCD drivers may support displays in different orientations.
+		If the LCD driver supports this capability, than these are configuration
+		options to select that display orientation.
+
+config LCD_LANDSCAPE
+	bool "Landscape orientation"
+	---help---
+		Define for "landscape" orientation support.  Landscape mode refers one
+		of two orientations where the display is wider than it is tall
+		(LCD_RLANDSCAPE is the other).  This is the default orientation.
+
+config LCD_PORTRAIT
+	bool "Portrait orientation"
+	---help---
+		Define for "portrait" orientation support.  Portrait mode refers one
+		of two orientations where the display is taller than it is wide
+		(LCD_RPORTAIT is the other).
+
+config LCD_RPORTRAIT
+	bool "Reverse portrait display"
+	---help---
+		Define for "reverse portrait" orientation support.  Reverse portrait mode
+		refers one of two orientations where the display is taller than it is
+		wide (LCD_PORTAIT is the other).
+
+config LCD_RLANDSCAPE
+	bool "Reverse landscape orientation"
+	---help---
+		Define for "reverse landscape" orientation support.  Reverse landscape mode
+		refers one of two orientations where the display is wider than it is
+		tall (LCD_LANDSCAPE is the other).
+
+endchoice
+
+config LCD_LPM013M091A
+	bool "JDI LPM013M091A LCD Driver"
+	default n
+	---help---
+		JDI LPM013M091A LCD Driver.
+		This driver doesn't support reading data.
+		Recommended to use DMA to transfer data or displayed image would be
+		broken.
+
+config LCD_ILI9225
+	bool "ILI9225 LCD Single Chip Driver"
+	default n
+	---help---
+		LCD Single Chip Driver, ILI9225, ILI Technology Corp.
+
+if LCD_ILI9225
+	config LCD_ILI9225_XRES
+		int "ILI9225 X Resolution"
+		default 176
+		---help---
+			Specifies the X resolution of the LCD.
+
+	config LCD_ILI9225_YRES
+		int "ILI9225 Y Resolution"
+		default 220
+		---help---
+			Specifies the Y resolution of the LCD.
+
+	config LCD_ILI9225_BPP
+		int "Bit Per Pixel (16)"
+		default 16
+
+	config LCD_ILI9225_SPIMODE
+		int "SPI Mode"
+		default 0
+
+	config LCD_ILI9225_FREQUENCY
+		int "SPI Frequency"
+		default 1000000
+
+endif # LCD_ILI9225
+
+config LCD_ILI9340
+	bool "ILI9340 LCD Single Chip Driver"
+	default n
+	---help---
+		LCD Single Chip Driver, ILI9340, ILI Technology Corp.
+
+		Required LCD driver settings:
+		LCD_MAXCONTRAST should be 255, but any value >0 and <=255 will be accepted.
+		LCD_MAXPOWER should be 1:  0=off, 1=on
+
+config LCD_ILI9340_NINTERFACES
+	int "Number of supported display driver"
+	range 1 2
+	default 1
+	depends on LCD_ILI9340
+	---help---
+		Define the number of supported  displays driven by a ili9340 LCD Single
+		Chip Driver.
+
+config LCD_ILI9340_IFACE0
+	bool "(1) LCD Display"
+	depends on LCD_ILI9340_NINTERFACES = 1 || LCD_ILI9340_NINTERFACES = 2
+	---help---
+		Configure first LCD Display.
+
+if LCD_ILI9340_IFACE0
+choice
+	prompt "LCD Orientation"
+	default LCD_ILI9340_IFACE0_LANDSCAPE
+	---help---
+		Configure display orientation.
+
+config LCD_ILI9340_IFACE0_LANDSCAPE
+	bool "Landscape orientation"
+	---help---
+		Define for "landscape" orientation support.
+
+config LCD_ILI9340_IFACE0_PORTRAIT
+	bool "Portrait orientation"
+	---help---
+		Define for "portrait" orientation support.
+
+config LCD_ILI9340_IFACE0_RLANDSCAPE
+	bool "Reverse landscape orientation"
+	---help---
+		Define for "reverse landscape" orientation support.
+
+config LCD_ILI9340_IFACE0_RPORTRAIT
+	bool "Reverse portrait display"
+	---help---
+		Define for "reverse portrait" orientation support.
+
+endchoice
+
+choice
+	prompt "Color format"
+	default LCD_ILI9340_IFACE0_RGB565
+	---help---
+		LCD color format.
+
+config LCD_ILI9340_IFACE0_RGB565
+	bool "16 bpp RGB565 color format"
+	---help---
+	16 bpp RGB565 color format
+
+endchoice
+endif
+
+config LCD_ILI9340_IFACE1
+	bool "(2) LCD Display"
+	depends on LCD_ILI9340_NINTERFACES = 2
+	---help---
+		Configure second LCD Display.
+
+if LCD_ILI9340_IFACE1
+choice
+	prompt "LCD Orientation"
+	default LCD_ILI9340_IFACE1_LANDSCAPE
+	---help---
+		Configure display orientation.
+
+config LCD_ILI9340_IFACE1_LANDSCAPE
+	bool "Landscape orientation"
+	---help---
+		Define for "landscape" orientation support.
+
+config LCD_ILI9340_IFACE1_PORTRAIT
+	bool "Portrait orientation"
+	---help---
+		Define for "portrait" orientation support.
+
+config LCD_ILI9340_IFACE1_RLANDSCAPE
+	bool "Reverse landscape orientation"
+	---help---
+		Define for "reverse landscape" orientation support.
+
+config LCD_ILI9340_IFACE1_RPORTRAIT
+	bool "Reverse portrait display"
+	---help---
+		Define for "reverse portrait" orientation support.
+
+endchoice
+
+choice
+	prompt "Color format"
+	default LCD_ILI9340_IFACE1_RGB565
+	---help---
+		LCD color format.
+
+config LCD_ILI9340_IFACE1_RGB565
+	bool "16 bpp RGB565 color format"
+	---help---
+		16 bpp RGB565 color format
+
+endchoice
+endif
+
+config LCD_ILI9341
+	bool "ILI9341 LCD Single Chip Driver"
+	default n
+	---help---
+		LCD Single Chip Driver, ILI9341, ILI Technology Corp. Used
+		with the STM32F429i Discovery Board.
+
+		Required LCD driver settings:
+		LCD_MAXCONTRAST should be 255, but any value >0 and <=255 will be accepted.
+		LCD_MAXPOWER should be 1:  0=off, 1=on
+
+config LCD_ILI9341_NINTERFACES
+	int "Number of supported display driver"
+	range 1 2
+	default 1
+	depends on LCD_ILI9341
+	---help---
+		Define the number of supported  displays driven by a ili9341 LCD Single
+		Chip Driver.
+
+config LCD_ILI9341_IFACE0
+	bool "(1) LCD Display"
+	depends on LCD_ILI9341_NINTERFACES = 1 || LCD_ILI9341_NINTERFACES = 2
+	---help---
+		Configure first LCD Display.
+
+if LCD_ILI9341_IFACE0
+choice
+	prompt "LCD Orientation"
+	default LCD_ILI9341_IFACE0_LANDSCAPE
+	---help---
+		Configure display orientation.
+
+config LCD_ILI9341_IFACE0_LANDSCAPE
+	bool "Landscape orientation"
+	---help---
+		Define for "landscape" orientation support.
+
+config LCD_ILI9341_IFACE0_PORTRAIT
+	bool "Portrait orientation"
+	---help---
+		Define for "portrait" orientation support.
+
+config LCD_ILI9341_IFACE0_RLANDSCAPE
+	bool "Reverse landscape orientation"
+	---help---
+		Define for "reverse landscape" orientation support.
+
+config LCD_ILI9341_IFACE0_RPORTRAIT
+	bool "Reverse portrait display"
+	---help---
+		Define for "reverse portrait" orientation support.
+
+endchoice
+
+choice
+	prompt "Color format"
+	default LCD_ILI9341_IFACE0_RGB565
+	---help---
+		LCD color format.
+
+config LCD_ILI9341_IFACE0_RGB565
+	bool "16 bpp RGB565 color format"
+	---help---
+		16 bpp RGB565 color format
+
+endchoice
+endif
+
+config LCD_ILI9341_IFACE1
+	bool "(2) LCD Display"
+	depends on LCD_ILI9341_NINTERFACES = 2
+	---help---
+		Configure second LCD Display.
+
+if LCD_ILI9341_IFACE1
+choice
+	prompt "LCD Orientation"
+	default LCD_ILI9341_IFACE1_LANDSCAPE
+	---help---
+		Configure display orientation.
+
+config LCD_ILI9341_IFACE1_LANDSCAPE
+	bool "Landscape orientation"
+	---help---
+		Define for "landscape" orientation support.
+
+config LCD_ILI9341_IFACE1_PORTRAIT
+	bool "Portrait orientation"
+	---help---
+		Define for "portrait" orientation support.
+
+config LCD_ILI9341_IFACE1_RLANDSCAPE
+	bool "Reverse landscape orientation"
+	---help---
+		Define for "reverse landscape" orientation support.
+
+config LCD_ILI9341_IFACE1_RPORTRAIT
+	bool "Reverse portrait display"
+	---help---
+		Define for "reverse portrait" orientation support.
+
+endchoice
+
+choice
+	prompt "Color format"
+	default LCD_ILI9341_IFACE1_RGB565
+	---help---
+		LCD color format.
+
+config LCD_ILI9341_IFACE1_RGB565
+	bool "16 bpp RGB565 color format"
+	---help---
+		16 bpp RGB565 color format
+
+endchoice
+endif
+
+config LCD_LCDDRV_SPIIF
+	bool "Generic SPI Interface Driver (for ILI9341 or others)"
+	default n
+#	depends on LCD_ILI9341
+	---help---
+		SPI Interface shim to allow LCD and ePaper to be bound to
+		a normal SPI port.
+
+config LCD_LCDDRV_SPEED
+        int "Generic SPI Interface speed"
+	default 10000000
+	depends on LCD_LCDDRV_SPIIF
+	---help---
+		SPI Interface speed. According to the specification this is generally
+		quite limited, but people have had success with much faster
+		speeds than the spec sheets say. YMMV.
+
+config LCD_RA8875
+	bool "RA8875 LCD Display Controller"
+	default n
+	depends on ALLOW_BSD_COMPONENTS
+	---help---
+		LCD controller driver for RA8875 by RAiO Technologies Inc.
+
+if LCD_RA8875
+
+choice
+	prompt "MCU Interface width"
+	default LCD_RA8875_8BIT
+	---help---
+		Bit-width of MCU interface (8 or 16)
+
+config LCD_RA8875_8BIT
+	bool "8 bit"
+
+config LCD_RA8875_16BIT
+	bool "16 bit"
+
+endchoice # MCU Interface width
+
+choice
+	prompt "Colors"
+	default LCD_RA8875_65K
+	---help---
+		Number of colors/color depth
+
+config LCD_RA8875_256
+	bool "256 / 8 bit"
+
+config LCD_RA8875_65K
+	bool "65k / 16 bit"
+
+endchoice # Colors
+
+config LCD_RA8875_EXTENDED
+	bool "Extended drawing interfaces"
+	default n
+	depends on BUILD_FLAT
+	---help---
+		Build in some non-standard, custom drawing interfaces for the RA8875
+		including the following: ra8875_drawrectangle(), ra8875_drawline(),
+		ra8875_drawtriangle(), and ra8875_drawcircle().  NOTE that these
+		will not be accessible by applications in protected or kernel build
+		configurations.
+
+		NOTE: The non-standard ra8875_clear(), ra8875_drawrectangle(),
+		ra8875_drawline() interfaces are always built and available for use
+		because within the OS because these are used internally by the
+		driver anyway.
+
+endif # LCD_RA8875
+
+config LCD_LT768
+	bool "LT768 LCD Single Chip Driver"
+	default n
+	---help---
+		LCD Single Chip Driver, LT768, Levetop Electronics. Used
+		with the Xidatong-riscv64 Board.
+
+if LCD_LT768
+
+choice
+	prompt "LCD LT768 part"
+	default LCD_LT768
+
+endchoice # LCD LT768 part
+
+choice
+	prompt "LT768 Interface"
+	default LCD_LT768_SPI
+
+config LCD_LT768_SPI
+	bool "SPI"
+	select SPI
+
+endchoice # LT768 Interface
+
+choice
+	prompt "Display size"
+	default LCD_LT768_WQVGA
+
+config LCD_FT80X_WQVGA
+	bool "WQVGA 480x272"
+
+endchoice # Display size
+
+endif # LCD_LT768
+
+config LCD_FT80X
+	bool "FTDI FT80x GUI Controller"
+	default n
+	select SCHED_HPWORK
+	---help---
+		Integrated LCD, Audio, Touchscreen controller driver for the FTDI
+		FT80x "EVE" series.
+
+if LCD_FT80X
+
+choice
+	prompt "FTDI FT80x part"
+	default LCD_FT800
+
+config LCD_FT800
+	bool "FT800"
+
+config LCD_FT801
+	bool "FT801"
+
+endchoice # FTDI FT80x part
+
+choice
+	prompt "FTDI FT80x Interface"
+	default LCD_FT80X_SPI
+
+config LCD_FT80X_SPI
+	bool "SPI"
+	select SPI
+
+config LCD_FT80X_I2C
+	bool "I2C"
+	select I2C
+
+endchoice # FTDI FT80x Interface
+
+config LCD_FT801_MULTITOUCH
+	bool "FT801 Multi-touch"
+	default n
+	depends on LCD_FT801
+
+choice
+	prompt "Display size"
+	default LCD_FT80X_WQVGA
+
+config LCD_FT80X_WQVGA
+	bool "WQVGA 480x272"
+
+config LCD_FT80X_QVGA
+	bool "QVGA 320x240"
+
+endchoice # Display size
+
+choice
+	prompt "Audio Shutdown Options"
+	default LCD_FT80X_AUDIO_NOSHUTDOWN
+
+config LCD_FT80X_AUDIO_NOSHUTDOWN
+	bool "No amplifier shutdown control"
+	---help---
+		There is no audio amplifier or the audio amplifier is not under
+		software control.
+
+config LCD_FT80X_AUDIO_MCUSHUTDOWN
+	bool "MCU controls audio shutdown"
+	---help---
+		The audio amplifier is controlled via an MCU GPIO output pin.
+
+config LCD_FT80X_AUDIO_GPIOSHUTDOWN
+	bool "FT80X controls audio shutdown"
+	---help---
+		The audio amplifier is controlled via an FT80x GPIO output pin.
+
+endchoice # Audio Shutdown Option
+
+config LCD_FT80X_AUDIO_GPIO
+	int "FT80x audio shutdown GPIO"
+	default 0
+	range 0 1
+	depends on LCD_FT80X_AUDIO_GPIOSHUTDOWN
+	---help---
+		Identifies the GPIO pin used to control the amplifier shutdown
+		output.
+
+endif # LCD_FT80X
+
+endmenu # LCD Driver selection
+endif # LCD
+
+comment "Character/Segment LCD Devices"
+
+menuconfig SLCD
+	bool "Alphanumeric/Segment LCD Devices"
+	default n
+	---help---
+		Drivers for Alphanumeric and Segment LCDs (SLCDs).  These
+		drivers support interfaces as defined in include/nuttx/lcd/slcd_ioctl.h
+		amd slcd_codec.h
+
+		This selection is necessary to enable support for SLCD drivers in
+		drivers/lcd as well as for board-specific LCD drivers in the boards/
+		subdirectories.
+
+if SLCD
+
+config SLCD_CONSOLE
+	bool "SLCD console output"
+	default n
+	---help---
+		It is possible to use an SLCD to provide console output.  This option
+		enables that possibility.
+
+		At present, only one architecture supports this option (M16C).
+		However, this feature could be provided by other architectures in
+		the future.
+
+config LCD_LCD1602
+	bool "LCD 1602"
+	default n
+	---help---
+		Enable support for LCD1602 devices.  LCD1602 is based on the Hitachi
+		HD44780U LCD controller.  See also include/nuttx/lcd/hd4478ou.h.
+
+		NOTE:  There is no common implementation of the LCD1602 driver.
+		Rather, there are board-by-board implementations.
+
+config LCD_BACKPACK
+	bool "PCF8574 LCD Backpack"
+	default n
+	depends on I2C
+	select LIBC_SLCDCODEC
+	---help---
+		Enable support for PCF8574 LCD Backpack driver. This driver supports
+		an interface board that is based on the PCF8574 io expander and
+		supports the HD44780-based (or compatible) LCD modules.  There are
+		a myriad of different vendors of such, but they are principally the
+		same, save wiring and minor features like jumpers for I2C addresses.
+		This driver supports known and unknown variants.
+
+		See pcf8574_lcd_backpack_readme.txt
+
+config LCD_ST7032
+	bool "ST7032 over I2C (i.e. JLX1602G-390)"
+	default n
+	depends on I2C
+	---help---
+		Enable support for ST7032i on I2C. This driver was tested with
+		JLX1602G-390 that has 10 pins: CAP1N, CAP1P, VOUT, VCC, SHLS,
+		SHLC, GND, SDA, SCL, XRESET. The XRESET pin is connected to a
+		pull-up resistor, then the module automatically executes power-on
+		reset when power is supplied to the module. The pin SHLS is also
+		connected to a pull-up resistor and the pin SHLC is connected to
+		the ground. So only I2C pins SDA and SCL are used by NuttX.
+
+config LCD_HT16K33
+	bool "Holtek HT16K33 4 Digits 14-Segment Display"
+	default n
+	depends on I2C
+	---help---
+		Enable support for Holtek HT16K33 (and Vinka VK16K33) 4 Digits
+		14-Segment module: 0.54" 14-segment LED HT16K33 Backpack.
+
+if LCD_HT16K33
+config LCD_HT16K33_MULT_MODULE
+	bool "Enable support to multiple modules as a single display"
+	default n
+	depends on I2C
+	---help---
+		It is possible to connect many HT16K33 modules with sequential
+		I2C addresses to work as a single display to support length
+		text strings. The device at the I2C address 0x70 will display the
+		4 more significant characters, the device 0x71 will display the
+		previous 4 more significant characters and so on.
+
+config LCD_HT16K33_NUMBER_MODULES
+	int "Quantity of HT16K33 modules to be used as a single display"
+	range 1 8
+	depends on LCD_HT16K33_MULT_MODULE
+	---help---
+		Quantity of sequential modules to be used to create a single
+		display. We can have up to 8 to I2C Addresses: 0x70 - 0x77.
+
+endif # LCD_HT16K33
+
+endif # SLCD
+
+comment "Other LCD-related Devices"
+
+config LCD_OTHER
+	bool
+	default n
+
+config LCD_TDA19988
+	bool "TDA19988 HDMI Encoder"
+	default n
+	select LCD_OTHER
+	depends on I2C && EXPERIMENTAL
+	---help---
+		Enable support for the TI TDA19988 HDMI Encoder.  The TDA19988 is a
+		very low power and very small size High-Definition Multimedia
+		Interface (HDMI) 1.4a transmitter.  This device is primarily
+		intended for mobile applications like Digital Video Camera (DVC),
+		Digital Still Camera (DSC), Portable Multimedia Player (PMP), Mobile
+		Phone and Ultra-Mobile Personal Computer (UM PC), new PC tablet and
+		MID where size and power are key for battery autonomy.
+
+endmenu # LCD Driver Support
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/lcd/Make.defs b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/lcd/Make.defs
new file mode 100755
index 000000000..392c7894d
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/lcd/Make.defs
@@ -0,0 +1,183 @@
+############################################################################
+# drivers/lcd/Make.defs
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more
+# contributor license agreements.  See the NOTICE file distributed with
+# this work for additional information regarding copyright ownership.  The
+# ASF licenses this file to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance with the
+# License.  You may obtain a copy of the License at
+#
+#   http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations
+# under the License.
+#
+############################################################################
+
+ifeq ($(CONFIG_LCD),y)
+
+# Support for the generic LCD framebuffer front-end
+
+ifeq ($(CONFIG_LCD_FRAMEBUFFER),y)
+  CSRCS += lcd_framebuffer.c
+endif
+
+ifeq ($(CONFIG_LCD_DEV),y)
+  CSRCS += lcd_dev.c
+endif
+
+# Include support for Graphics LCD drivers
+
+ifeq ($(CONFIG_LCD_FT80X),y)
+  CSRCS += ft80x.c
+ifeq ($(CONFIG_LCD_FT80X_SPI),y)
+  CSRCS += ft80x_spi.c
+else ifeq ($(CONFIG_LCD_FT80X_I2C),y)
+  CSRCS += ft80x_i2c.c
+endif
+endif
+
+ifeq ($(CONFIG_LCD_LPM013M091A),y)
+  CSRCS += lpm013m091a.c
+endif
+
+ifeq ($(CONFIG_LCD_P14201),y)
+  CSRCS += p14201.c
+endif
+
+ifeq ($(CONFIG_LCD_UG2864AMBAG01),y)
+  CSRCS += ug-2864ambag01.c
+endif
+
+ifeq ($(CONFIG_LCD_UG9664HSWAG01),y)
+  CSRCS += ug-9664hswag01.c
+endif
+
+ifeq ($(CONFIG_LCD_SSD1306),y)
+  CSRCS += ssd1306_base.c
+endif
+
+ifeq ($(CONFIG_LCD_SSD1306_SPI),y)
+  CSRCS += ssd1306_spi.c
+endif
+
+ifeq ($(CONFIG_LCD_SSD1306_I2C),y)
+  CSRCS += ssd1306_i2c.c
+endif
+
+ifeq ($(CONFIG_LCD_SSD1289),y)
+  CSRCS += ssd1289.c
+endif
+
+ifeq ($(CONFIG_LCD_SSD1351),y)
+  CSRCS += ssd1351.c
+endif
+
+ifeq ($(CONFIG_LCD_MIO283QT2),y)
+  CSRCS += mio283qt2.c
+endif
+
+ifeq ($(CONFIG_LCD_MAX7219),y)
+  CSRCS += max7219.c
+endif
+
+ifeq ($(CONFIG_LCD_MIO283QT9A),y)
+  CSRCS += mio283qt9a.c
+endif
+
+ifeq ($(CONFIG_LCD_PCD8544),y)
+  CSRCS += pcd8544.c
+endif
+
+ifeq ($(CONFIG_LCD_ST7565),y)
+  CSRCS += st7565.c
+endif
+
+ifeq ($(CONFIG_LCD_ST7567),y)
+  CSRCS += st7567.c
+endif
+
+ifeq ($(CONFIG_LCD_SHARP_MEMLCD),y)
+  CSRCS += memlcd.c
+endif
+
+ifeq ($(CONFIG_LCD_ILI9225),y)
+  CSRCS += ili9225.c
+endif
+
+ifeq ($(CONFIG_LCD_ILI9340),y)
+  CSRCS += ili9340.c
+endif
+
+ifeq ($(CONFIG_LCD_ILI9341),y)
+  CSRCS += ili9341.c
+endif
+
+ifeq ($(CONFIG_LCD_LT768),y)
+  CSRCS += lt768.c lt768_lib.c
+endif
+
+ifeq ($(CONFIG_LCD_LCDDRV_SPIIF),y)
+  CSRCS += lcddrv_spiif.c
+endif
+
+ifeq ($(CONFIG_LCD_RA8875),y)
+  CSRCS += ra8875.c
+endif
+
+ifeq ($(CONFIG_LCD_ST7735),y)
+  CSRCS += st7735.c
+endif
+
+ifeq ($(CONFIG_LCD_ST7789),y)
+  CSRCS += st7789.c
+endif
+
+ifeq ($(CONFIG_LCD_GC9A01),y)
+  CSRCS += gc9a01.c
+endif
+
+endif # CONFIG_LCD
+
+ifeq ($(CONFIG_SLCD),y)
+
+# Include support for Alphanumeric/Segment LCD drivers
+
+ifeq ($(CONFIG_LCD_BACKPACK),y)
+  CSRCS += pcf8574_lcd_backpack.c
+endif
+
+ifeq ($(CONFIG_LCD_ST7032),y)
+  CSRCS += st7032.c
+endif
+
+ifeq ($(CONFIG_LCD_HT16K33),y)
+  CSRCS += ht16k33_14seg.c
+endif
+endif # CONFIG_SLCD
+
+# Other LCD-related devices
+
+ifeq ($(CONFIG_LCD_TDA19988),y)
+  CSRCS += tda19988.c
+endif
+
+# Include LCD driver build support (the nested if-then-else implements an OR)
+
+ifeq ($(CONFIG_LCD),y)
+  DEPPATH += --dep-path lcd
+  VPATH += :lcd
+  CFLAGS += ${shell $(INCDIR) "$(CC)" $(TOPDIR)$(DELIM)drivers$(DELIM)lcd}
+else ifeq ($(CONFIG_SLCD),y)
+  DEPPATH += --dep-path lcd
+  VPATH += :lcd
+  CFLAGS += ${shell $(INCDIR) "$(CC)" $(TOPDIR)$(DELIM)drivers$(DELIM)lcd}
+else ifeq ($(CONFIG_LCD_OTHER),y)
+  DEPPATH += --dep-path lcd
+  VPATH += :lcd
+  CFLAGS += ${shell $(INCDIR) "$(CC)" $(TOPDIR)$(DELIM)drivers$(DELIM)lcd}
+endif
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/lcd/lt768.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/lcd/lt768.c
new file mode 100755
index 000000000..2d5d1bfdc
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/lcd/lt768.c
@@ -0,0 +1,6371 @@
+/********************* COPYRIGHT  ***********************
+* File Name       : LT768.c
+* Author          : Levetop Electronics
+* Version         : V1.0
+* Date            : 2017-8-25
+* Description     : 操作LT768的寄存器函数
+                    具体操作哪个寄存器请看LT768.h文件
+*********************************************************/
+
+#include <syslog.h>
+#include "nuttx/arch.h"
+#include "nuttx/lcd/lt768.h"
+#include "nuttx/lcd/k210_lcd.h"
+
+//==============================================================================
+void LCD_RegisterWrite(unsigned char Cmd,unsigned char Data)
+{
+    LCD_CmdWrite(Cmd);
+    LCD_DataWrite(Data);
+}
+
+unsigned char LCD_RegisterRead(unsigned char Cmd)
+{
+    unsigned char temp;
+    LCD_CmdWrite(Cmd);
+    temp=LCD_DataRead();
+    return temp;
+}
+
+/******************************************************************************/
+/*Sub program area                                                            */
+/******************************************************************************/
+void Check_Mem_WR_FIFO_not_Full(void)
+{
+    /*    0: Memory Write FIFO is not full.
+        1: Memory Write FIFO is full.        */
+    do
+    {
+    }
+    while(LCD_StatusRead()&0x80);
+}
+void Check_Mem_WR_FIFO_Empty(void)
+{
+    /*    0: Memory Write FIFO is not empty.
+        1: Memory Write FIFO is empty.        */
+    do
+    {
+    }
+    while((LCD_StatusRead()&0x40) == 0x00);
+}
+void Check_Mem_RD_FIFO_not_Full(void)
+{
+    /*    0: Memory Read FIFO is not full.
+        1: Memory Read FIFO is full.        */
+    do
+    {
+    }
+    while(LCD_StatusRead()&0x20);
+}
+void Check_Mem_RD_FIFO_not_Empty(void)
+{
+    /*    0: Memory Read FIFO is not empty.
+        1: Memory Read FIFO is empty.
+            */
+    do
+    {
+    }
+    while(LCD_StatusRead()&0x10);
+}
+void Check_2D_Busy(void)
+{
+    do
+    {
+    }
+    while(LCD_StatusRead()&0x08);
+}
+void Check_SDRAM_Ready(void)
+{
+    /*    0: SDRAM is not ready for access
+        1: SDRAM is ready for access        */
+    unsigned char temp;
+
+    do
+    {
+        temp=LCD_StatusRead();
+    }
+    while((temp&0x04) == 0x00);
+}
+
+unsigned char Power_Saving_Status(void)
+{
+    unsigned char temp;
+
+    if((LCD_StatusRead()&0x02)==0x02)
+    {
+        temp = 1;
+    }
+    else
+    {
+        temp = 0;
+    }
+
+    return temp;
+}
+
+void Check_Power_is_Normal(void)
+{
+    /*    0: Normal operation state
+        1: Power saving state        */
+    do
+    {
+    }
+    while(LCD_StatusRead()&0x02);
+}
+void Check_Power_is_Saving(void)
+{
+    /*    0: Normal operation state
+        1: Power saving state        */
+    do
+    {
+    }
+    while((LCD_StatusRead()&0x02) == 0x00);
+}
+void Check_NO_Interrupt(void)
+{
+    /*    0: without interrupt event
+        1: interrupt event occur
+            */
+    do
+    {
+    }
+    while(LCD_StatusRead()&0x01);
+}
+void Check_Interrupt_Occur(void)
+{
+    /*    0: without interrupt event
+        1: interrupt event occur
+            */
+    do
+    {
+    }
+    while((LCD_StatusRead()&0x01) == 0x00);
+}
+
+void Check_Busy_Draw(void)
+{
+    unsigned char temp;
+
+    do
+    {
+        temp=LCD_StatusRead();
+    }
+    while(temp&0x08);
+}
+
+//[00h]=========================================================================
+
+void LT768_SW_Reset(void)//IC Reset
+{
+    unsigned char temp;
+    LCD_CmdWrite(0x00);
+    temp = LCD_DataRead();
+    temp |= 0x01;
+    LCD_DataWrite(temp);
+
+    do
+    {
+        temp = LCD_DataRead();
+    }
+    while(temp&0x01);
+}
+
+//[01h][01h][01h][01h][01h][01h][01h][01h][01h][01h][01h][01h][01h][01h][01h][01h]
+void Enable_PLL(void)
+{
+    /*  0: PLL disable; allow change PLL parameter.
+        1: PLL enable; cannot change PLL parameter.*/
+    unsigned char temp;
+    LCD_CmdWrite(0x01);
+    temp = LCD_DataRead();
+    temp |= cSetb7;
+    LCD_DataWrite(temp);
+    up_udelay(1);//PLL
+}
+void LT768_Sleep(void)
+{
+    /*  0: Normal mode.
+        1: Sleep mode.*/
+    unsigned char temp;
+    LCD_CmdWrite(0x01);
+    temp = LCD_DataRead();
+    temp |= cSetb6;
+    LCD_DataWrite(temp);
+}
+void LT768_WakeUp(void)
+{
+    /*  0: Normal mode.
+        1: Sleep mode.*/
+    unsigned char temp;
+    LCD_CmdWrite(0x01);
+    temp = LCD_DataRead();
+    temp &= cClrb6;
+    LCD_DataWrite(temp);
+}
+void Key_Scan_Enable(void)
+{
+    /*  0: Disable.
+        1: Enable.*/
+    unsigned char temp;
+    LCD_CmdWrite(0x01);
+    temp = LCD_DataRead();
+    temp |= cSetb5;
+    LCD_DataWrite(temp);
+}
+void Key_Scan_Disable(void)
+{
+    /*  0: Disable.
+        1: Enable.*/
+    unsigned char temp;
+    LCD_CmdWrite(0x01);
+    temp = LCD_DataRead();
+    temp &= cClrb5;
+    LCD_DataWrite(temp);
+}
+void TFT_24bit(void)
+{
+    /*  00b: 24-bits output.
+        01b: 18-bits output, unused pins are set as GPIO.
+        10b: 16-bits output, unused pins are set as GPIO.
+        11b: LVDS, all 24-bits unused output pins are set as GPIO.*/
+    unsigned char temp;
+    LCD_CmdWrite(0x01);
+    temp = LCD_DataRead();
+    temp &= cClrb4;
+    temp &= cClrb3;
+    LCD_DataWrite(temp);
+}
+void TFT_18bit(void)
+{
+    /*  00b: 24-bits output.
+        01b: 18-bits output, unused pins are set as GPIO.
+        10b: 16-bits output, unused pins are set as GPIO.
+        11b: LVDS, all 24-bits unused output pins are set as GPIO.*/
+    unsigned char temp;
+    LCD_CmdWrite(0x01);
+    temp = LCD_DataRead();
+    temp &= cClrb4;
+    temp |= cSetb3;
+    LCD_DataWrite(temp);
+}
+void TFT_16bit(void)
+{
+    /*  00b: 24-bits output.
+        01b: 18-bits output, unused pins are set as GPIO.
+        10b: 16-bits output, unused pins are set as GPIO.
+        11b: LVDS, all 24-bits unused output pins are set as GPIO.*/
+    unsigned char temp;
+    LCD_CmdWrite(0x01);
+    temp = LCD_DataRead();
+    temp |= cSetb4;
+    temp &= cClrb3;
+    LCD_DataWrite(temp);
+}
+void TFT_LVDS(void)
+{
+    /*  00b: 24-bits output.
+        01b: 18-bits output, unused pins are set as GPIO.
+        10b: 16-bits output, unused pins are set as GPIO.
+        11b: LVDS, all 24-bits unused output pins are set as GPIO.*/
+    unsigned char temp;
+    LCD_CmdWrite(0x01);
+    temp = LCD_DataRead();
+    temp |= cSetb4;
+    temp |= cSetb3;
+    LCD_DataWrite(temp);
+}
+
+void LT768_I2CM_Enable(void)
+{
+    /*  I2C master Interface Enable/Disable
+        0: Disable
+        1: Enable*/
+    unsigned char temp;
+    LCD_CmdWrite(0x01);
+    temp = LCD_DataRead();
+    temp |= cSetb2;
+    LCD_DataWrite(temp);
+}
+
+void LT768_I2CM_Disable(void)
+{
+    /*  I2C master Interface Enable/Disable
+        0: Disable
+        1: Enable*/
+    unsigned char temp;
+    LCD_CmdWrite(0x01);
+    temp = LCD_DataRead();
+    temp &= cClrb2;
+    LCD_DataWrite(temp);
+}
+
+void Enable_SFlash_SPI(void)
+{
+    /*  Serial Flash SPI Interface Enable/Disable
+        0: Disable
+        1: Enable*/
+    unsigned char temp;
+    LCD_CmdWrite(0x01);
+    temp = LCD_DataRead();
+    temp |= cSetb1;
+    LCD_DataWrite(temp);
+}
+
+void Disable_SFlash_SPI(void)
+{
+    /*  Serial Flash SPI Interface Enable/Disable
+        0: Disable
+        1: Enable*/
+    unsigned char temp;
+    LCD_CmdWrite(0x01);
+    temp = LCD_DataRead();
+    temp &= cClrb1;
+    LCD_DataWrite(temp);
+}
+void Host_Bus_8bit(void)
+{
+    /*  Parallel Host Data Bus Width Selection
+        0: 8-bit Parallel Host Data Bus.
+        1: 16-bit Parallel Host Data Bus.*/
+    unsigned char temp;
+    LCD_CmdWrite(0x01);
+    temp = LCD_DataRead();
+    temp &= cClrb0;
+    LCD_DataWrite(temp);
+}
+void Host_Bus_16bit(void)
+{
+    /*  Parallel Host Data Bus Width Selection
+        0: 8-bit Parallel Host Data Bus.
+        1: 16-bit Parallel Host Data Bus.*/
+    unsigned char temp;
+    LCD_CmdWrite(0x01);
+    temp = LCD_DataRead();
+    temp |= cSetb0;
+    LCD_DataWrite(temp);
+}
+
+//[02h][02h][02h][02h][02h][02h][02h][02h][02h][02h][02h][02h][02h][02h][02h][02h]
+
+void RGB_8b_8bpp(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0x02);
+    temp = LCD_DataRead();
+    temp &= cClrb7;
+    temp &= cClrb6;
+    LCD_DataWrite(temp);
+}
+void RGB_8b_16bpp(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0x02);
+    temp = LCD_DataRead();
+    temp &= cClrb7;
+    temp |= cSetb6;
+    LCD_DataWrite(temp);
+}
+void RGB_8b_24bpp(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0x02);
+    temp = LCD_DataRead();
+    temp &= cClrb7;
+    temp &= cClrb6;
+    LCD_DataWrite(temp);
+}
+
+void RGB_16b_8bpp(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0x02);
+    temp = LCD_DataRead();
+    temp |= cSetb7;
+    temp &= cClrb6;
+    LCD_DataWrite(temp);
+}
+void RGB_16b_16bpp(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0x02);
+    temp = LCD_DataRead();
+    temp &= cClrb7;
+    temp |= cSetb6;
+    LCD_DataWrite(temp);
+}
+void RGB_16b_24bpp_mode1(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0x02);
+    temp = LCD_DataRead();
+    temp &= cClrb7;
+    temp &= cClrb6;
+    LCD_DataWrite(temp);
+}
+void RGB_16b_24bpp_mode2(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0x02);
+    temp = LCD_DataRead();
+    temp |= cSetb7;
+    temp |= cSetb6;
+    LCD_DataWrite(temp);
+}
+
+void MemRead_Left_Right_Top_Down(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0x02);
+    temp = LCD_DataRead();
+    temp &= cClrb5;
+    temp &= cClrb4;
+    LCD_DataWrite(temp);
+}
+void MemRead_Right_Left_Top_Down(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0x02);
+    temp = LCD_DataRead();
+    temp &= cClrb5;
+    temp |= cSetb4;
+    LCD_DataWrite(temp);
+}
+void MemRead_Top_Down_Left_Right(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0x02);
+    temp = LCD_DataRead();
+    temp |= cSetb5;
+    temp &= cClrb4;
+    LCD_DataWrite(temp);
+}
+void MemRead_Down_Top_Left_Right(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0x02);
+    temp = LCD_DataRead();
+    temp |= cSetb5;
+    temp |= cSetb4;
+    LCD_DataWrite(temp);
+}
+void MemWrite_Left_Right_Top_Down(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0x02);
+    temp = LCD_DataRead();
+    temp &= cClrb2;
+    temp &= cClrb1;
+    LCD_DataWrite(temp);
+}
+void MemWrite_Right_Left_Top_Down(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0x02);
+    temp = LCD_DataRead();
+    temp &= cClrb2;
+    temp |= cSetb1;
+    LCD_DataWrite(temp);
+}
+void MemWrite_Top_Down_Left_Right(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0x02);
+    temp = LCD_DataRead();
+    temp |= cSetb2;
+    temp &= cClrb1;
+    LCD_DataWrite(temp);
+}
+void MemWrite_Down_Top_Left_Right(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0x02);
+    temp = LCD_DataRead();
+    temp |= cSetb2;
+    temp |= cSetb1;
+    LCD_DataWrite(temp);
+}
+//[03h][03h][03h][03h][03h][03h][03h][03h][03h][03h][03h][03h][03h][03h][03h][03h]
+void Interrupt_Active_Low(void)
+{
+    /*  MPU Interrupt active level
+        0 : active low.
+        1 : active high.*/
+    unsigned char temp;
+    LCD_CmdWrite(0x03);
+    temp = LCD_DataRead();
+    temp &= cClrb7;
+    LCD_DataWrite(temp);
+}
+void Interrupt_Active_High(void)
+{
+    /*  MPU Interrupt active level
+        0 : active low.
+        1 : active high.*/
+    unsigned char temp;
+    LCD_CmdWrite(0x03);
+    temp = LCD_DataRead();
+    temp |= cSetb7;
+    LCD_DataWrite(temp);
+}
+void ExtInterrupt_Debounce(void)
+{
+    /*  External interrupt de-bounce
+        0 : without de-bounce
+        1 : enable de-bounce (1024 OSC clock)*/
+    unsigned char temp;
+    LCD_CmdWrite(0x03);
+    temp = LCD_DataRead();
+    temp |= cSetb6;
+    LCD_DataWrite(temp);
+}
+void ExtInterrupt_Nodebounce(void)
+{
+    /*  External interrupt de-bounce
+        0 : without de-bounce
+        1 : enable de-bounce (1024 OSC clock)*/
+    unsigned char temp;
+    LCD_CmdWrite(0x03);
+    temp = LCD_DataRead();
+    temp &= cClrb6;
+    LCD_DataWrite(temp);
+}
+void ExtInterrupt_Input_Low_Level_Trigger(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0x03);
+    temp = LCD_DataRead();
+    temp &= cClrb5;
+    temp &= cClrb4;
+    LCD_DataWrite(temp);
+}
+void ExtInterrupt_Input_High_Level_Trigger(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0x03);
+    temp = LCD_DataRead();
+    temp |= cSetb5;
+    temp &= cClrb4;
+    LCD_DataWrite(temp);
+}
+void ExtInterrupt_Input_Falling_Edge_Trigger(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0x03);
+    temp = LCD_DataRead();
+    temp &= cClrb5;
+    temp |= cSetb4;
+    LCD_DataWrite(temp);
+}
+void ExtInterrupt_Input_Rising_Edge_Trigger(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0x03);
+    temp = LCD_DataRead();
+    temp |= cSetb5;
+    temp |= cSetb4;
+    LCD_DataWrite(temp);
+}
+void LVDS_Format1(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0x03);
+    temp = LCD_DataRead();
+    temp &= cClrb3;
+    LCD_DataWrite(temp);
+}
+void LVDS_Format2(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0x03);
+    temp = LCD_DataRead();
+    temp |= cSetb3;
+    LCD_DataWrite(temp);
+}
+void Graphic_Mode(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0x03);
+    temp = LCD_DataRead();
+    temp &= cClrb2;
+    LCD_DataWrite(temp);
+}
+void Text_Mode(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0x03);
+    temp = LCD_DataRead();
+    temp |= cSetb2;
+    LCD_DataWrite(temp);
+}
+void Memory_Select_SDRAM(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0x03);
+    temp = LCD_DataRead();
+    temp &= cClrb1;
+    temp &= cClrb0;    // B
+    LCD_DataWrite(temp);
+}
+void Memory_Select_Graphic_Cursor_RAM(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0x03);
+    temp = LCD_DataRead();
+    temp |= cSetb1;
+    temp &= cClrb0;
+    LCD_DataWrite(temp);
+}
+void Memory_Select_Color_Palette_RAM(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0x03);
+    temp = LCD_DataRead();
+    temp |= cSetb1;
+    temp |= cSetb0;
+    LCD_DataWrite(temp);
+}
+
+//[05h]=========================================================================
+//[06h]=========================================================================
+//[07h]=========================================================================
+//[08h]=========================================================================
+//[09h]=========================================================================
+//[0Ah]=========================================================================
+//[0Bh]=========================================================================
+
+void Enable_Resume_Interrupt(void)
+{
+    /*
+    Resume Interrupt Enable
+    0: Disable.
+    1: Enable.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0B);
+    temp = LCD_DataRead();
+    temp |= cSetb7;
+    LCD_DataWrite(temp);
+}
+void Disable_Resume_Interrupt(void)
+{
+    /*
+    Resume Interrupt Enable
+    0: Disable.
+    1: Enable.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0B);
+    temp = LCD_DataRead();
+    temp &= cClrb7;
+    LCD_DataWrite(temp);
+}
+void Enable_ExtInterrupt_Input(void)
+{
+    /*
+    External Interrupt (PS[0] pin) Enable
+    0: Disable.
+    1: Enable.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0B);
+    temp = LCD_DataRead();
+    temp |= cSetb6;
+    LCD_DataWrite(temp);
+}
+void Disable_ExtInterrupt_Input(void)
+{
+    /*
+    External Interrupt (PS[0] pin) Enable
+    0: Disable.
+    1: Enable.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0B);
+    temp = LCD_DataRead();
+    temp &= cClrb6;
+    LCD_DataWrite(temp);
+}
+void Enable_I2CM_Interrupt(void)
+{
+    /*
+    I2C Master Interrupt Enable
+    0: Disable.
+    1: Enable.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0B);
+    temp = LCD_DataRead();
+    temp |= cSetb5;
+    LCD_DataWrite(temp);
+}
+void Disable_I2CM_Interrupt(void)
+{
+    /*
+    I2C Master Interrupt Enable
+    0: Disable.
+    1: Enable.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0B);
+    temp = LCD_DataRead();
+    temp &= cClrb5;
+    LCD_DataWrite(temp);
+}
+void Enable_Vsync_Interrupt(void)
+{
+    /*
+    Vsync time base interrupt Enable Bit
+    0: Disable Interrupt.
+    1: Enable Interrupt.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0B);
+    temp = LCD_DataRead();
+    temp |= cSetb4;
+    LCD_DataWrite(temp);
+}
+void Disable_Vsync_Interrupt(void)
+{
+    /*
+    Vsync time base interrupt Enable Bit
+    0: Disable Interrupt.
+    1: Enable Interrupt.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0B);
+    temp = LCD_DataRead();
+    temp &= cClrb4;
+    LCD_DataWrite(temp);
+}
+void Enable_KeyScan_Interrupt(void)
+{
+    /*
+    Key Scan Interrupt Enable Bit
+    0: Disable Key scan interrupt.
+    1: Enable Key scan interrupt.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0B);
+    temp = LCD_DataRead();
+    temp |= cSetb3;
+    LCD_DataWrite(temp);
+}
+void Disable_KeyScan_Interrupt(void)
+{
+    /*
+    Key Scan Interrupt Enable Bit
+    0: Disable Key scan interrupt.
+    1: Enable Key scan interrupt.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0B);
+    temp = LCD_DataRead();
+    temp &= cClrb3;
+    LCD_DataWrite(temp);
+}
+void Enable_DMA_Draw_BTE_Interrupt(void)
+{
+    /*
+    Serial flash DMA Complete | Draw task finished | BTE Process
+    Complete etc. Interrupt Enable
+    0: Disable Interrupt.
+    1: Enable Interrupt.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0B);
+    temp = LCD_DataRead();
+    temp |= cSetb2;
+    LCD_DataWrite(temp);
+}
+void Disable_DMA_Draw_BTE_Interrupt(void)
+{
+    /*
+    Serial flash DMA Complete | Draw task finished | BTE Process
+    Complete etc. Interrupt Enable
+    0: Disable Interrupt.
+    1: Enable Interrupt.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0B);
+    temp = LCD_DataRead();
+    temp &= cClrb2;
+    LCD_DataWrite(temp);
+}
+void Enable_PWM1_Interrupt(void)
+{
+    /*
+    PWM timer 1 Interrupt Enable Bit
+    0: Disable Interrupt.
+    1: Enable Interrupt.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0B);
+    temp = LCD_DataRead();
+    temp |= cSetb1;
+    LCD_DataWrite(temp);
+}
+void Disable_PWM1_Interrupt(void)
+{
+    /*
+    PWM timer 1 Interrupt Enable Bit
+    0: Disable Interrupt.
+    1: Enable Interrupt.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0B);
+    temp = LCD_DataRead();
+    temp &= cClrb1;
+    LCD_DataWrite(temp);
+}
+void Enable_PWM0_Interrupt(void)
+{
+    /*
+    PWM timer 0 Interrupt Enable Bit
+    0: Disable Interrupt.
+    1: Enable Interrupt.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0B);
+    temp = LCD_DataRead();
+    temp |= cSetb0;
+    LCD_DataWrite(temp);
+}
+void Disable_PWM0_Interrupt(void)
+{
+    /*
+    PWM timer 0 Interrupt Enable Bit
+    0: Disable Interrupt.
+    1: Enable Interrupt.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0B);
+    temp = LCD_DataRead();
+    temp &= cClrb0;
+    LCD_DataWrite(temp);
+}
+
+//[0Ch]=========================================================================
+unsigned char Read_Interrupt_status(void)
+{
+    /*
+    [Bit7]Read Function ..Resume Interrupt Status
+    0: No Resume interrupt happens.
+    1: Resume interrupt happens.
+    [Bit6]Read Function .. PS[0] pin Interrupt Status
+    0: No PS[0] pin interrupt happens.
+    1: PS[0] pin interrupt happens.
+    [Bit5]Read Function .. I2C master Interrupt Status
+    0: No I2C master interrupt happens.
+    1: I2C master interrupt happens.
+    [Bit4]Read Function .. Vsync Interrupt Status
+    0: No interrupt happens.
+    1: interrupt happens.
+    [Bit3]Read Function ..Key Scan Interrupt Status
+    0: No Key Scan interrupt happens.
+    1: Key Scan interrupt happens.
+    [Bit2]Read Function..Interrupt Status
+    0: No interrupt happens.
+    1: interrupt happens.
+    [Bit1]Read Function..Interrupt Status
+    0: No interrupt happens.
+    1: interrupt happens.
+    [Bit0]Read Function..Interrupt Status
+    0: No interrupt happens.
+    1: interrupt happens.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0C);
+    temp = LCD_DataRead();
+    return temp;
+}
+void Clear_Resume_Interrupt_Flag(void)
+{
+    /*
+    Resume Interrupt flag
+    Write Function .. Resume Interrupt Clear Bit
+    0: No operation.
+    1: Clear Resume interrupt.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0C);
+    temp = LCD_DataRead();
+    temp |= cSetb7;
+    LCD_DataWrite(temp);
+}
+void Clear_ExtInterrupt_Input_Flag(void)
+{
+    /*
+    External Interrupt (PS[0] pin) flag
+    Write Function .. PS[0] pin edge Interrupt Clear Bit
+    0: No operation.
+    1: Clear the PS[0] pin edge interrupt.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0C);
+    temp = LCD_DataRead();
+    temp |= cSetb6;
+    LCD_DataWrite(temp);
+}
+void Clear_I2CM_Interrupt_Flag(void)
+{
+    /*
+    I2C master Interrupt flag
+    Write Function.. I2C master Interrupt Clear Bit
+    0: No operation.
+    1: Clear the I2C master interrupt.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0C);
+    temp = LCD_DataRead();
+    temp |= cSetb5;
+    LCD_DataWrite(temp);
+}
+void Clear_Vsync_Interrupt_Flag(void)
+{
+    /*
+    Vsync Time base interrupt flag
+    Write Function ..Vsync Interrupt Clear Bit
+    0: No operation.
+    1: Clear the interrupt.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0C);
+    temp = LCD_DataRead();
+    temp |= cSetb4;
+    LCD_DataWrite(temp);
+}
+void Clear_KeyScan_Interrupt_Flag(void)
+{
+    /*
+    Key Scan Interrupt flag
+    Write Function..Key Scan Interrupt Clear Bit
+    0: No operation.
+    1: Clear the Key Scan interrupt.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0C);
+    temp = LCD_DataRead();
+    temp |= cSetb3;
+    LCD_DataWrite(temp);
+}
+void Clear_DMA_Draw_BTE_Interrupt_Flag(void)
+{
+    /*
+    Serial flash DMA Complete | Draw task finished | BTE
+    Process Complete etc. Interrupt flag
+    Write Function.. Interrupt Clear Bit
+    0: No operation.
+    1: Clear interrupt.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0C);
+    temp = LCD_DataRead();
+    temp |= cSetb2;
+    LCD_DataWrite(temp);
+}
+void Clear_PWM1_Interrupt_Flag(void)
+{
+    /*
+    PWM 1 timer Interrupt flag
+    Write Function..Interrupt Clear Bit
+    0: No operation.
+    1: Clear interrupt.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0C);
+    temp = LCD_DataRead();
+    temp |= cSetb1;
+    LCD_DataWrite(temp);
+}
+void Clear_PWM0_Interrupt_Flag(void)
+{
+    /*
+    PWM 0 timer Interrupt flag
+    Write Function..Interrupt Clear Bit
+    0: No operation.
+    1: Clear interrupt.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0C);
+    temp = LCD_DataRead();
+    temp |= cSetb0;
+    LCD_DataWrite(temp);
+}
+//[0Dh]=========================================================================
+void Mask_Resume_Interrupt_Flag(void)
+{
+    /*
+    Mask Resume Interrupt Flag
+    0: Enable.
+    1: Mask.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0D);
+    temp = LCD_DataRead();
+    temp |= cSetb7;
+    LCD_DataWrite(temp);
+}
+void Mask_ExtInterrupt_Input_Flag(void)
+{
+    /*
+    Mask External Interrupt (PS[0] pin) Flag
+    0: Enable.
+    1: Mask.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0D);
+    temp = LCD_DataRead();
+    temp |= cSetb6;
+    LCD_DataWrite(temp);
+}
+void Mask_I2CM_Interrupt_Flag(void)
+{
+    /*
+    Mask I2C Master Interrupt Flag
+    0: Enable.
+    1: Mask.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0D);
+    temp = LCD_DataRead();
+    temp |= cSetb5;
+    LCD_DataWrite(temp);
+}
+void Mask_Vsync_Interrupt_Flag(void)
+{
+    /*
+    Mask Vsync time base interrupt Flag
+    0: Enable.
+    1: Mask.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0D);
+    temp = LCD_DataRead();
+    temp |= cSetb4;
+    LCD_DataWrite(temp);
+}
+void Mask_KeyScan_Interrupt_Flag(void)
+{
+    /*
+    Mask Key Scan Interrupt Flag
+    0: Enable.
+    1: Mask.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0D);
+    temp = LCD_DataRead();
+    temp |= cSetb3;
+    LCD_DataWrite(temp);
+}
+void Mask_DMA_Draw_BTE_Interrupt_Flag(void)
+{
+    /*
+    Mask Serial flash DMA Complete | Draw task finished | BTE
+    Process Complete etc. Interrupt Flag
+    0: Enable.
+    1: Mask.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0D);
+    temp = LCD_DataRead();
+    temp |= cSetb2;
+    LCD_DataWrite(temp);
+}
+void Mask_PWM1_Interrupt_Flag(void)
+{
+    /*
+    Mask PWM timer 1 Interrupt Flag
+    0: Enable.
+    1: Mask.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0D);
+    temp = LCD_DataRead();
+    temp |= cSetb1;
+    LCD_DataWrite(temp);
+}
+void Mask_PWM0_Interrupt_Flag(void)
+{
+    /*
+    Mask PWM timer 0 Interrupt Flag
+    0: Enable.
+    1: Mask.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0D);
+    temp = LCD_DataRead();
+    temp |= cSetb0;
+    LCD_DataWrite(temp);
+}
+
+void Enable_Resume_Interrupt_Flag(void)
+{
+    /*
+    Mask Resume Interrupt Flag
+    0: Enable.
+    1: Mask.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0D);
+    temp = LCD_DataRead();
+    temp &= cClrb7;
+    LCD_DataWrite(temp);
+}
+void Enable_ExtInterrupt_Inpur_Flag(void)
+{
+    /*
+    Mask External Interrupt (PS[0] pin) Flag
+    0: Enable.
+    1: Mask.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0D);
+    temp = LCD_DataRead();
+    temp &= cClrb6;
+    LCD_DataWrite(temp);
+}
+void Enable_I2CM_Interrupt_Flag(void)
+{
+    /*
+    Mask I2C Master Interrupt Flag
+    0: Enable.
+    1: Mask.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0D);
+    temp = LCD_DataRead();
+    temp &= cClrb5;
+    LCD_DataWrite(temp);
+}
+void Enable_Vsync_Interrupt_Flag(void)
+{
+    /*
+    Mask Vsync time base interrupt Flag
+    0: Enable.
+    1: Mask.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0D);
+    temp = LCD_DataRead();
+    temp &= cClrb4;
+    LCD_DataWrite(temp);
+}
+void Enable_KeyScan_Interrupt_Flag(void)
+{
+    /*
+    Mask Key Scan Interrupt Flag
+    0: Enable.
+    1: Mask.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0D);
+    temp = LCD_DataRead();
+    temp &= cClrb3;
+    LCD_DataWrite(temp);
+}
+void Enable_DMA_Draw_BTE_Interrupt_Flag(void)
+{
+    /*
+    Mask Serial flash DMA Complete | Draw task finished | BTE
+    Process Complete etc. Interrupt Flag
+    0: Enable.
+    1: Mask.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0D);
+    temp = LCD_DataRead();
+    temp &= cClrb2;
+    LCD_DataWrite(temp);
+}
+void Enable_PWM1_Interrupt_Flag(void)
+{
+    /*
+    Mask PWM timer 1 Interrupt Flag
+    0: Enable.
+    1: Mask.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0D);
+    temp = LCD_DataRead();
+    temp &= cClrb1;
+    LCD_DataWrite(temp);
+}
+void Enable_PWM0_Interrupt_Flag(void)
+{
+    /*
+    Mask PWM timer 0 Interrupt Flag
+    0: Enable.
+    1: Mask.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0D);
+    temp = LCD_DataRead();
+    temp &= cClrb0;
+    LCD_DataWrite(temp);
+}
+
+//[0Eh]=========================================================================
+void Enable_GPIOF_PullUp(void)
+{
+    /*
+    GPIO_F[7:0] Pull-Up Enable (XPDAT[23:19, 15:13])
+    0: Pull-Up Disable
+    1: Pull-Up Enable
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0E);
+    temp = LCD_DataRead();
+    temp |= cSetb5;
+    LCD_DataWrite(temp);
+}
+void Enable_GPIOE_PullUp(void)
+{
+    /*
+    GPIO_E[7:0] Pull-Up Enable (XPDAT[12:10, 7:3])
+    0: Pull-Up Disable
+    1: Pull-Up Enable
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0E);
+    temp = LCD_DataRead();
+    temp |= cSetb4;
+    LCD_DataWrite(temp);
+}
+void Enable_GPIOD_PullUp(void)
+{
+    /*
+    GPIO_D[7:0] Pull-Up Enable (XPDAT[18, 2, 17, 16, 9, 8, 1,0])
+    0: Pull-Up Disable
+    1: Pull-Up Enable
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0E);
+    temp = LCD_DataRead();
+    temp |= cSetb3;
+    LCD_DataWrite(temp);
+}
+void Enable_GPIOC_PullUp(void)
+{
+    /*
+    GPIO_C[6:0] Pull-Up Enable (XSDA, XSCL, XnSFCS1,
+    XnSFCS0, XMISO, XMOSI , XSCK)
+    0: Pull-Up Disable
+    1: Pull-Up Enable
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0E);
+    temp = LCD_DataRead();
+    temp |= cSetb2;
+    LCD_DataWrite(temp);
+}
+void Enable_XDB15_8_PullUp(void)
+{
+    /*
+    XDB[15:8] Pull-Up Enable
+    0: Pull-Up Disable
+    1: Pull-Up Enable
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0E);
+    temp = LCD_DataRead();
+    temp |= cSetb1;
+    LCD_DataWrite(temp);
+}
+void Enable_XDB7_0_PullUp(void)
+{
+    /*
+    XDB[7:0] Pull-Up Enable
+    0: Pull-Up Disable
+    1: Pull-Up Enable
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0E);
+    temp = LCD_DataRead();
+    temp |= cSetb0;
+    LCD_DataWrite(temp);
+}
+void Disable_GPIOF_PullUp(void)
+{
+    /*
+    GPIO_F[7:0] Pull-Up Enable (XPDAT[23:19, 15:13])
+    0: Pull-Up Disable
+    1: Pull-Up Enable
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0E);
+    temp = LCD_DataRead();
+    temp &= cClrb5;
+    LCD_DataWrite(temp);
+}
+void Disable_GPIOE_PullUp(void)
+{
+    /*
+    GPIO_E[7:0] Pull-Up Enable (XPDAT[12:10, 7:3])
+    0: Pull-Up Disable
+    1: Pull-Up Enable
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0E);
+    temp = LCD_DataRead();
+    temp &= cClrb4;
+    LCD_DataWrite(temp);
+}
+void Disable_GPIOD_PullUp(void)
+{
+    /*
+    GPIO_D[7:0] Pull-Up Enable (XPDAT[18, 2, 17, 16, 9, 8, 1,0])
+    0: Pull-Up Disable
+    1: Pull-Up Enable
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0E);
+    temp = LCD_DataRead();
+    temp &= cClrb3;
+    LCD_DataWrite(temp);
+}
+void Disable_GPIOC_PullUp(void)
+{
+    /*
+    GPIO_C[6:0] Pull-Up Enable (XSDA, XSCL, XnSFCS1,
+    XnSFCS0, XMISO, XMOSI , XSCK)
+    0: Pull-Up Disable
+    1: Pull-Up Enable
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0E);
+    temp = LCD_DataRead();
+    temp &= cClrb2;
+    LCD_DataWrite(temp);
+}
+void Disable_XDB15_8_PullUp(void)
+{
+    /*
+    XDB[15:8] Pull-Up Enable
+    0: Pull-Up Disable
+    1: Pull-Up Enable
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0E);
+    temp = LCD_DataRead();
+    temp &= cClrb1;
+    LCD_DataWrite(temp);
+}
+void Disable_XDB7_0_PullUp(void)
+{
+    /*
+    XDB[7:0] Pull-Up Enable
+    0: Pull-Up Disable
+    1: Pull-Up Enable
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0E);
+    temp = LCD_DataRead();
+    temp &= cClrb0;
+    LCD_DataWrite(temp);
+}
+//[0Fh]=========================================================================
+void XPDAT18_Set_GPIO_D7(void)
+{
+    /*
+    XPDAT[18]  not scan function select
+    0: GPIO-D7
+    1: KOUT[4]
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0F);
+    temp = LCD_DataRead();
+    temp &= cClrb7;
+    LCD_DataWrite(temp);
+}
+void XPDAT18_Set_KOUT4(void)
+{
+    /*
+    XPDAT[18]  not scan function select
+    0: GPIO-D7
+    1: KOUT[4]
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0F);
+    temp = LCD_DataRead();
+    temp |= cSetb7;
+    LCD_DataWrite(temp);
+}
+void XPDAT17_Set_GPIO_D5(void)
+{
+    /*
+    XPDAT[17]  not scan function select
+    0: GPIO-D5
+    1: KOUT[2]
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0F);
+    temp = LCD_DataRead();
+    temp &= cClrb6;
+    LCD_DataWrite(temp);
+}
+void XPDAT17_Set_KOUT2(void)
+{
+    /*
+    XPDAT[17]  not scan function select
+    0: GPIO-D5
+    1: KOUT[2]
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0F);
+    temp = LCD_DataRead();
+    temp |= cSetb6;
+    LCD_DataWrite(temp);
+}
+void XPDAT16_Set_GPIO_D4(void)
+{
+    /*
+    XPDAT[16]  not scan function select
+    0: GPIO-D4
+    1: KOUT[1]
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0F);
+    temp = LCD_DataRead();
+    temp &= cClrb5;
+    LCD_DataWrite(temp);
+}
+void XPDAT16_Set_KOUT1(void)
+{
+    /*
+    XPDAT[16]  not scan function select
+    0: GPIO-D4
+    1: KOUT[1]
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0F);
+    temp = LCD_DataRead();
+    temp |= cSetb5;
+    LCD_DataWrite(temp);
+}
+void XPDAT9_Set_GPIO_D3(void)
+{
+    /*
+    XPDAT[9]  not scan function select
+    0: GPIO-D3
+    1: KOUT[3]
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0F);
+    temp = LCD_DataRead();
+    temp &= cClrb4;
+    LCD_DataWrite(temp);
+}
+void XPDAT9_Set_KOUT3(void)
+{
+    /*
+    XPDAT[9]  not scan function select
+    0: GPIO-D3
+    1: KOUT[3]
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0F);
+    temp = LCD_DataRead();
+    temp |= cSetb4;
+    LCD_DataWrite(temp);
+}
+void XPDAT8_Set_GPIO_D2(void)
+{
+    /*
+    XPDAT[8]  not scan function select
+    0: GPIO-D2
+    1: KIN[3]
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0F);
+    temp = LCD_DataRead();
+    temp &= cClrb3;
+    LCD_DataWrite(temp);
+}
+void XPDAT8_Set_KIN3(void)
+{
+    /*
+    XPDAT[8]  not scan function select
+    0: GPIO-D2
+    1: KIN[3]
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0F);
+    temp = LCD_DataRead();
+    temp |= cSetb3;
+    LCD_DataWrite(temp);
+}
+void XPDAT2_Set_GPIO_D6(void)
+{
+    /*
+    XPDAT[2]  not scan function select
+    0: GPIO-D6
+    1: KIN[4]
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0F);
+    temp = LCD_DataRead();
+    temp &= cClrb2;
+    LCD_DataWrite(temp);
+}
+void XPDAT2_Set_KIN4(void)
+{
+    /*
+    XPDAT[2]  not scan function select
+    0: GPIO-D6
+    1: KIN[4]
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0F);
+    temp = LCD_DataRead();
+    temp |= cSetb2;
+    LCD_DataWrite(temp);
+}
+void XPDAT1_Set_GPIO_D1(void)
+{
+    /*
+    XPDAT[1]  not scan function select
+    0: GPIO-D1
+    1: KIN[2]
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0F);
+    temp = LCD_DataRead();
+    temp &= cClrb1;
+    LCD_DataWrite(temp);
+}
+void XPDAT1_Set_KIN2(void)
+{
+    /*
+    XPDAT[1]  not scan function select
+    0: GPIO-D1
+    1: KIN[2]
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0F);
+    temp = LCD_DataRead();
+    temp |= cSetb1;
+    LCD_DataWrite(temp);
+}
+void XPDAT0_Set_GPIO_D0(void)
+{
+    /*
+    XPDAT[0]  not scan function select
+    0: GPIO-D0
+    1: KIN[1]
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0F);
+    temp = LCD_DataRead();
+    temp &= cClrb0;
+    LCD_DataWrite(temp);
+}
+void XPDAT0_Set_KIN1(void)
+{
+    /*
+    XPDAT[0]  not scan function select
+    0: GPIO-D0
+    1: KIN[1]
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x0F);
+    temp = LCD_DataRead();
+    temp |= cSetb0;
+    LCD_DataWrite(temp);
+}
+
+//[10h]=========================================================================
+void Enable_PIP1(void)
+{
+    /*
+    PIP 1 window Enable/Disable
+    0 : PIP 1 window disable.
+    1 : PIP 1 window enable
+    PIP 1 window always on top of PIP 2 window.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x10);
+    temp = LCD_DataRead();
+    temp |= cSetb7;
+    LCD_DataWrite(temp);
+}
+void Disable_PIP1(void)
+{
+    /*
+    PIP 1 window Enable/Disable
+    0 : PIP 1 window disable.
+    1 : PIP 1 window enable
+    PIP 1 window always on top of PIP 2 window.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x10);
+    temp = LCD_DataRead();
+    temp &= cClrb7;
+    LCD_DataWrite(temp);
+}
+void Enable_PIP2(void)
+{
+    /*
+    PIP 2 window Enable/Disable
+    0 : PIP 2 window disable.
+    1 : PIP 2 window enable
+    PIP 1 window always on top of PIP 2 window.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x10);
+    temp = LCD_DataRead();
+    temp |= cSetb6;
+    LCD_DataWrite(temp);
+}
+void Disable_PIP2(void)
+{
+    /*
+    PIP 2 window Enable/Disable
+    0 : PIP 2 window disable.
+    1 : PIP 2 window enable
+    PIP 1 window always on top of PIP 2 window.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x10);
+    temp = LCD_DataRead();
+    temp &= cClrb6;
+    LCD_DataWrite(temp);
+}
+void Select_PIP1_Parameter(void)
+{
+    /*
+    0: To configure PIP 1ˇs parameters.
+    1: To configure PIP 2ˇs parameters..
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x10);
+    temp = LCD_DataRead();
+    temp &= cClrb4;
+    LCD_DataWrite(temp);
+}
+void Select_PIP2_Parameter(void)
+{
+    /*
+    0: To configure PIP 1ˇs parameters.
+    1: To configure PIP 2ˇs parameters..
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x10);
+    temp = LCD_DataRead();
+    temp |= cSetb4;
+    LCD_DataWrite(temp);
+}
+void Select_Main_Window_8bpp(void)
+{
+    /*
+    Main Window Color Depth Setting
+    00b: 8-bpp generic TFT, i.e. 256 colors.
+    01b: 16-bpp generic TFT, i.e. 65K colors.
+    1xb: 24-bpp generic TFT, i.e. 1.67M colors.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x10);
+    temp = LCD_DataRead();
+    temp &= cClrb3;
+    temp &= cClrb2;
+    LCD_DataWrite(temp);
+}
+void Select_Main_Window_16bpp(void)
+{
+    /*
+    Main Window Color Depth Setting
+    00b: 8-bpp generic TFT, i.e. 256 colors.
+    01b: 16-bpp generic TFT, i.e. 65K colors.
+    1xb: 24-bpp generic TFT, i.e. 1.67M colors.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x10);
+    temp = LCD_DataRead();
+    temp &= cClrb3;
+    temp |= cSetb2;
+    LCD_DataWrite(temp);
+}
+void Select_Main_Window_24bpp(void)
+{
+    /*
+    Main Window Color Depth Setting
+    00b: 8-bpp generic TFT, i.e. 256 colors.
+    01b: 16-bpp generic TFT, i.e. 65K colors.
+    1xb: 24-bpp generic TFT, i.e. 1.67M colors.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x10);
+    temp = LCD_DataRead();
+    temp |= cSetb3;
+    //temp |= cSetb2;
+    LCD_DataWrite(temp);
+}
+//[11h]=========================================================================
+void Select_PIP2_Window_8bpp(void)
+{
+    /*
+    PIP 1 Window Color Depth Setting
+    00b: 8-bpp generic TFT, i.e. 256 colors.
+    01b: 16-bpp generic TFT, i.e. 65K colors.
+    1xb: 24-bpp generic TFT, i.e. 1.67M colors.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x11);
+    temp = LCD_DataRead();
+    temp &= cClrb1;
+    temp &= cClrb0;
+    LCD_DataWrite(temp);
+}
+void Select_PIP2_Window_16bpp(void)
+{
+    /*
+    PIP 1 Window Color Depth Setting
+    00b: 8-bpp generic TFT, i.e. 256 colors.
+    01b: 16-bpp generic TFT, i.e. 65K colors.
+    1xb: 24-bpp generic TFT, i.e. 1.67M colors.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x11);
+    temp = LCD_DataRead();
+    temp &= cClrb1;
+    temp |= cSetb0;
+    LCD_DataWrite(temp);
+}
+void Select_PIP2_Window_24bpp(void)
+{
+    /*
+    PIP 1 Window Color Depth Setting
+    00b: 8-bpp generic TFT, i.e. 256 colors.
+    01b: 16-bpp generic TFT, i.e. 65K colors.
+    1xb: 24-bpp generic TFT, i.e. 1.67M colors.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x11);
+    temp = LCD_DataRead();
+    temp |= cSetb1;
+    temp &= cClrb0;
+    LCD_DataWrite(temp);
+}
+void Select_PIP1_Window_8bpp(void)
+{
+    /*
+    PIP 2 Window Color Depth Setting
+    00b: 8-bpp generic TFT, i.e. 256 colors.
+    01b: 16-bpp generic TFT, i.e. 65K colors.
+    1xb: 24-bpp generic TFT, i.e. 1.67M colors.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x11);
+    temp = LCD_DataRead();
+    temp &= cClrb3;
+    temp &= cClrb2;
+    LCD_DataWrite(temp);
+}
+void Select_PIP1_Window_16bpp(void)
+{
+    /*
+    PIP 2 Window Color Depth Setting
+    00b: 8-bpp generic TFT, i.e. 256 colors.
+    01b: 16-bpp generic TFT, i.e. 65K colors.
+    1xb: 24-bpp generic TFT, i.e. 1.67M colors.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x11);
+    temp = LCD_DataRead();
+    temp &= cClrb3;
+    temp |= cSetb2;
+    LCD_DataWrite(temp);
+}
+void Select_PIP1_Window_24bpp(void)
+{
+    /*
+    PIP 2 Window Color Depth Setting
+    00b: 8-bpp generic TFT, i.e. 256 colors.
+    01b: 16-bpp generic TFT, i.e. 65K colors.
+    1xb: 24-bpp generic TFT, i.e. 1.67M colors.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x11);
+    temp = LCD_DataRead();
+    temp |= cSetb3;
+    temp &= cClrb2;
+    LCD_DataWrite(temp);
+}
+
+//[12h]=========================================================================
+void PCLK_Rising(void)
+{
+    /*
+    PCLK Inversion
+    0: PDAT, DE, HSYNC etc. Drive(/ change) at PCLK falling edge.
+    1: PDAT, DE, HSYNC etc. Drive(/ change) at PCLK rising edge.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x12);
+    temp = LCD_DataRead();
+    temp &= cClrb7;
+    LCD_DataWrite(temp);
+}
+void PCLK_Falling(void)
+{
+    /*
+    PCLK Inversion
+    0: PDAT, DE, HSYNC etc. Drive(/ change) at PCLK falling edge.
+    1: PDAT, DE, HSYNC etc. Drive(/ change) at PCLK rising edge.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x12);
+    temp = LCD_DataRead();
+    temp |= cSetb7;
+    LCD_DataWrite(temp);
+}
+void Display_ON(void)
+{
+    /*
+    Display ON/OFF
+    0b: Display Off.
+    1b: Display On.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x12);
+    temp = LCD_DataRead();
+    syslog(LOG_NOTICE, "Display_ON.pre_read=%02x\n", temp);
+    temp |= cSetb6;
+    LCD_DataWrite(temp);
+    temp = LCD_DataRead();
+    syslog(LOG_NOTICE, "Display_ON.write_read=%02x\n", temp);
+}
+
+void Display_OFF(void)
+{
+    /*
+    Display ON/OFF
+    0b: Display Off.
+    1b: Display On.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x12);
+    temp = LCD_DataRead();
+    temp &= cClrb6;
+    LCD_DataWrite(temp);
+}
+void Color_Bar_ON(void)
+{
+    /*
+    Display Test Color Bar
+    0b: Disable.
+    1b: Enable.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x12);
+    temp = LCD_DataRead();
+    temp |= cSetb5;
+    LCD_DataWrite(temp);
+}
+void Color_Bar_OFF(void)
+{
+    /*
+    Display Test Color Bar
+    0b: Disable.
+    1b: Enable.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x12);
+    temp = LCD_DataRead();
+    temp &= cClrb5;
+    LCD_DataWrite(temp);
+}
+void HSCAN_L_to_R(void)
+{
+    /*
+    Horizontal Scan Direction
+    0 : From Left to Right
+    1 : From Right to Left
+    PIP window will be disabled when HDIR set as 1.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x12);
+    temp = LCD_DataRead();
+    temp &= cClrb4;
+    LCD_DataWrite(temp);
+}
+void HSCAN_R_to_L(void)
+{
+    /*
+    Horizontal Scan Direction
+    0 : From Left to Right
+    1 : From Right to Left
+    PIP window will be disabled when HDIR set as 1.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x12);
+    temp = LCD_DataRead();
+    temp |= cSetb4;
+    LCD_DataWrite(temp);
+}
+void VSCAN_T_to_B(void)
+{
+    /*
+    Vertical Scan direction
+    0 : From Top to Bottom
+    1 : From bottom to Top
+    PIP window will be disabled when VDIR set as 1.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x12);
+    temp = LCD_DataRead();
+    temp &= cClrb3;
+    LCD_DataWrite(temp);
+}
+void VSCAN_B_to_T(void)
+{
+    /*
+    Vertical Scan direction
+    0 : From Top to Bottom
+    1 : From bottom to Top
+    PIP window will be disabled when VDIR set as 1.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x12);
+    temp = LCD_DataRead();
+    temp |= cSetb3;
+    LCD_DataWrite(temp);
+}
+void PDATA_Set_RGB(void)
+{
+    /*
+    parallel PDATA[23:0] Output Sequence
+    000b : RGB.
+    001b : RBG.
+    010b : GRB.
+    011b : GBR.
+    100b : BRG.
+    101b : BGR.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x12);
+    temp = LCD_DataRead();
+    temp &=0xf8;
+    LCD_DataWrite(temp);
+}
+void PDATA_Set_RBG(void)
+{
+    /*
+    parallel PDATA[23:0] Output Sequence
+    000b : RGB.
+    001b : RBG.
+    010b : GRB.
+    011b : GBR.
+    100b : BRG.
+    101b : BGR.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x12);
+    temp = LCD_DataRead();
+    temp &=0xf8;
+    temp |= cSetb0;
+    LCD_DataWrite(temp);
+}
+void PDATA_Set_GRB(void)
+{
+    /*
+    parallel PDATA[23:0] Output Sequence
+    000b : RGB.
+    001b : RBG.
+    010b : GRB.
+    011b : GBR.
+    100b : BRG.
+    101b : BGR.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x12);
+    temp = LCD_DataRead();
+    temp &=0xf8;
+    temp |= cSetb1;
+    LCD_DataWrite(temp);
+}
+void PDATA_Set_GBR(void)
+{
+    /*
+    parallel PDATA[23:0] Output Sequence
+    000b : RGB.
+    001b : RBG.
+    010b : GRB.
+    011b : GBR.
+    100b : BRG.
+    101b : BGR.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x12);
+    temp = LCD_DataRead();
+    temp &=0xf8;
+    temp |= cSetb1;
+    temp |= cSetb0;
+    LCD_DataWrite(temp);
+}
+void PDATA_Set_BRG(void)
+{
+    /*
+    parallel PDATA[23:0] Output Sequence
+    000b : RGB.
+    001b : RBG.
+    010b : GRB.
+    011b : GBR.
+    100b : BRG.
+    101b : BGR.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x12);
+    temp = LCD_DataRead();
+    temp &=0xf8;
+    temp |= cSetb2;
+    LCD_DataWrite(temp);
+}
+void PDATA_Set_BGR(void)
+{
+    /*
+    parallel PDATA[23:0] Output Sequence
+    000b : RGB.
+    001b : RBG.
+    010b : GRB.
+    011b : GBR.
+    100b : BRG.
+    101b : BGR.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x12);
+    temp = LCD_DataRead();
+    temp &=0xf8;
+    temp |= cSetb2;
+    temp |= cSetb0;
+    LCD_DataWrite(temp);
+}
+
+void PDATA_IDLE_STATE(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0x12);
+    temp = LCD_DataRead();
+    temp |=0x07;
+    LCD_DataWrite(temp);
+}
+
+
+//[13h]=========================================================================
+void HSYNC_Low_Active(void)
+{
+    /*
+    HSYNC Polarity
+    0 : Low active.
+    1 : High active.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x13);
+    temp = LCD_DataRead();
+    temp &= cClrb7;
+    LCD_DataWrite(temp);
+}
+void HSYNC_High_Active(void)
+{
+    /*
+    HSYNC Polarity
+    0 : Low active.
+    1 : High active.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x13);
+    temp = LCD_DataRead();
+    temp |= cSetb7;
+    LCD_DataWrite(temp);
+}
+void VSYNC_Low_Active(void)
+{
+    /*
+    VSYNC Polarity
+    0 : Low active.
+    1 : High active.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x13);
+    temp = LCD_DataRead();
+    temp &= cClrb6;
+    LCD_DataWrite(temp);
+}
+void VSYNC_High_Active(void)
+{
+    /*
+    VSYNC Polarity
+    0 : Low active.
+    1 : High active.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x13);
+    temp = LCD_DataRead();
+    temp |= cSetb6;
+    LCD_DataWrite(temp);
+}
+void DE_Low_Active(void)
+{
+    /*
+    DE Polarity
+    0 : High active.
+    1 : Low active.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x13);
+    temp = LCD_DataRead();
+    temp |= cSetb5;
+    LCD_DataWrite(temp);
+}
+void DE_High_Active(void)
+{
+    /*
+    DE Polarity
+    0 : High active.
+    1 : Low active.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x13);
+    temp = LCD_DataRead();
+    temp &= cClrb5;
+    LCD_DataWrite(temp);
+}
+void Idle_DE_Low(void)
+{
+    /*
+    DE IDLE STATE(When STANDBY or DISPLAY OFF )
+    0 : Pin ¨DE〃 output is low.
+    1 : Pin ¨DE〃 output is high.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x13);
+    temp = LCD_DataRead();
+    temp &= cClrb4;
+    LCD_DataWrite(temp);
+}
+void Idle_DE_High(void)
+{
+    /*
+    DE IDLE STATE(When STANDBY or DISPLAY OFF )
+    0 : Pin ¨DE〃 output is low.
+    1 : Pin ¨DE〃 output is high.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x13);
+    temp = LCD_DataRead();
+    temp |= cSetb4;
+    LCD_DataWrite(temp);
+}
+void Idle_PCLK_Low(void)
+{
+    /*
+    PCLK IDLE STATE(When STANDBY or DISPLAY OFF )
+    0 : Pin ¨PCLK〃 output is low.
+    1 : Pin ¨PCLK〃 output is high.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x13);
+    temp = LCD_DataRead();
+    temp &= cClrb3;
+    LCD_DataWrite(temp);
+}
+void Idle_PCLK_High(void)
+{
+    /*
+    PCLK IDLE STATE(When STANDBY or DISPLAY OFF )
+    0 : Pin ¨PCLK〃 output is low.
+    1 : Pin ¨PCLK〃 output is high.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x13);
+    temp = LCD_DataRead();
+    temp |= cSetb3;
+    LCD_DataWrite(temp);
+}
+void Idle_PDAT_Low(void)
+{
+    /*
+    PDAT IDLE STATE(When STANDBY or DISPLAY OFF )
+    0 : Pins ¨PDAT[23:0]〃 output is low.
+    1 : Pins ¨PCLK[23:0]〃 output is high.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x13);
+    temp = LCD_DataRead();
+    temp &= cClrb2;
+    LCD_DataWrite(temp);
+}
+void Idle_PDAT_High(void)
+{
+    /*
+    PDAT IDLE STATE(When STANDBY or DISPLAY OFF )
+    0 : Pins ¨PDAT[23:0]〃 output is low.
+    1 : Pins ¨PCLK[23:0]〃 output is high.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x13);
+    temp = LCD_DataRead();
+    temp |= cSetb2;
+    LCD_DataWrite(temp);
+}
+void Idle_HSYNC_Low(void)
+{
+    /*
+    HSYNC IDLE STATE(When STANDBY or DISPLAY OFF )
+    0 : Pin ¨HSYNC〃 output is low.
+    1 : Pin ¨HSYNC〃 output is high.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x13);
+    temp = LCD_DataRead();
+    temp &= cClrb1;
+    LCD_DataWrite(temp);
+}
+void Idle_HSYNC_High(void)
+{
+    /*
+    HSYNC IDLE STATE(When STANDBY or DISPLAY OFF )
+    0 : Pin ¨HSYNC〃 output is low.
+    1 : Pin ¨HSYNC〃 output is high.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x13);
+    temp = LCD_DataRead();
+    temp |= cSetb1;
+    LCD_DataWrite(temp);
+}
+void Idle_VSYNC_Low(void)
+{
+    /*
+    VSYNC IDLE STATE(When STANDBY or DISPLAY OFF )
+    0 : Pin ¨VSYNC〃 output is low.
+    1 : Pin ¨VSYNC〃 output is high.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x13);
+    temp = LCD_DataRead();
+    temp &= cClrb0;
+    LCD_DataWrite(temp);
+}
+void Idle_VSYNC_High(void)
+{
+    /*
+    VSYNC IDLE STATE(When STANDBY or DISPLAY OFF )
+    0 : Pin ¨VSYNC〃 output is low.
+    1 : Pin ¨VSYNC〃 output is high.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x13);
+    temp = LCD_DataRead();
+    temp |= cSetb0;
+    LCD_DataWrite(temp);
+}
+
+//[14h][15h][1Ah][1Bh]=========================================================================
+
+void LCD_HorizontalWidth_VerticalHeight(unsigned short WX,unsigned short HY)
+{
+    /*
+    [14h] Horizontal Display Width Setting Bit[7:0]
+    [15h] Horizontal Display Width Fine Tuning (HDWFT) [3:0]
+    The register specifies the LCD panel horizontal display width in
+    the unit of 8 pixels resolution.
+    Horizontal display width(pixels) = (HDWR + 1) * 8 + HDWFTR
+
+    [1Ah] Vertical Display Height Bit[7:0]
+    Vertical Display Height(Line) = VDHR + 1
+    [1Bh] Vertical Display Height Bit[10:8]
+    Vertical Display Height(Line) = VDHR + 1
+    */
+    unsigned char temp;
+
+    if(WX<8)
+    {
+        LCD_CmdWrite(0x14);
+        LCD_DataWrite(0x00);
+        LCD_CmdWrite(0x15);
+        LCD_DataWrite(WX);
+        temp=HY-1;
+        LCD_CmdWrite(0x1A);
+        LCD_DataWrite(temp);
+        temp=(HY-1)>>8;
+        LCD_CmdWrite(0x1B);
+        LCD_DataWrite(temp);
+    }
+    else
+    {
+        temp=(WX/8)-1;
+        LCD_CmdWrite(0x14);
+        LCD_DataWrite(temp);
+        temp=WX%8;
+        LCD_CmdWrite(0x15);
+        LCD_DataWrite(temp);
+        temp=HY-1;
+        LCD_CmdWrite(0x1A);
+        LCD_DataWrite(temp);
+        temp=(HY-1)>>8;
+        LCD_CmdWrite(0x1B);
+        LCD_DataWrite(temp);
+    }
+}
+//[16h][17h]=========================================================================
+void LCD_Horizontal_Non_Display(unsigned short WX)
+{
+    /*
+    [16h] Horizontal Non-Display Period(HNDR) Bit[4:0]
+    This register specifies the horizontal non-display period. Also
+    called back porch.
+    Horizontal non-display period(pixels) = (HNDR + 1) * 8 + HNDFTR
+
+    [17h] Horizontal Non-Display Period Fine Tuning(HNDFT) [3:0]
+    This register specifies the fine tuning for horizontal non-display
+    period; it is used to support the SYNC mode panel. Each level of
+    this modulation is 1-pixel.
+    Horizontal non-display period(pixels) = (HNDR + 1) * 8 + HNDFTR
+    */
+    unsigned char temp;
+
+    if(WX<8)
+    {
+        LCD_CmdWrite(0x16);
+        LCD_DataWrite(0x00);
+        LCD_CmdWrite(0x17);
+        LCD_DataWrite(WX);
+    }
+    else
+    {
+        temp=(WX/8)-1;
+        LCD_CmdWrite(0x16);
+        LCD_DataWrite(temp);
+        temp=WX%8;
+        LCD_CmdWrite(0x17);
+        LCD_DataWrite(temp);
+    }
+}
+//[18h]=========================================================================
+void LCD_HSYNC_Start_Position(unsigned short WX)
+{
+    /*
+    [18h] HSYNC Start Position[4:0]
+    The starting position from the end of display area to the
+    beginning of HSYNC. Each level of this modulation is 8-pixel.
+    Also called front porch.
+    HSYNC Start Position(pixels) = (HSTR + 1)x8
+    */
+    unsigned char temp;
+
+    if(WX<8)
+    {
+        LCD_CmdWrite(0x18);
+        LCD_DataWrite(0x00);
+    }
+    else
+    {
+        temp=(WX/8)-1;
+        LCD_CmdWrite(0x18);
+        LCD_DataWrite(temp);
+    }
+}
+//[19h]=========================================================================
+void LCD_HSYNC_Pulse_Width(unsigned short WX)
+{
+    /*
+    [19h] HSYNC Pulse Width(HPW) [4:0]
+    The period width of HSYNC.
+    HSYNC Pulse Width(pixels) = (HPW + 1)x8
+    */
+    unsigned char temp;
+
+    if(WX<8)
+    {
+        LCD_CmdWrite(0x19);
+        LCD_DataWrite(0x00);
+    }
+    else
+    {
+        temp=(WX/8)-1;
+        LCD_CmdWrite(0x19);
+        LCD_DataWrite(temp);
+    }
+}
+//[1Ch][1Dh]=========================================================================
+void LCD_Vertical_Non_Display(unsigned short HY)
+{
+    /*
+    [1Ch] Vertical Non-Display Period Bit[7:0]
+    Vertical Non-Display Period(Line) = (VNDR + 1)
+
+    [1Dh] Vertical Non-Display Period Bit[9:8]
+    Vertical Non-Display Period(Line) = (VNDR + 1)
+    */
+    unsigned char temp;
+    temp=HY-1;
+    LCD_CmdWrite(0x1C);
+    LCD_DataWrite(temp);
+    LCD_CmdWrite(0x1D);
+    LCD_DataWrite(temp>>8);
+}
+//[1Eh]=========================================================================
+void LCD_VSYNC_Start_Position(unsigned short HY)
+{
+    /*
+    [1Eh] VSYNC Start Position[7:0]
+    The starting position from the end of display area to the beginning of VSYNC.
+    VSYNC Start Position(Line) = (VSTR + 1)
+    */
+    unsigned char temp;
+    temp=HY-1;
+    LCD_CmdWrite(0x1E);
+    LCD_DataWrite(temp);
+}
+//[1Fh]=========================================================================
+void LCD_VSYNC_Pulse_Width(unsigned short HY)
+{
+    /*
+    [1Fh] VSYNC Pulse Width[5:0]
+    The pulse width of VSYNC in lines.
+    VSYNC Pulse Width(Line) = (VPWR + 1)
+    */
+    unsigned char temp;
+    temp=HY-1;
+    LCD_CmdWrite(0x1F);
+    LCD_DataWrite(temp);
+}
+//[20h][21h][22h][23h]=========================================================================
+void Main_Image_Start_Address(unsigned long Addr)
+{
+    /*
+    [20h] Main Image Start Address[7:2]
+    [21h] Main Image Start Address[15:8]
+    [22h] Main Image Start Address [23:16]
+    [23h] Main Image Start Address [31:24]
+    */
+    LCD_RegisterWrite(0x20,Addr);
+    LCD_RegisterWrite(0x21,Addr>>8);
+    LCD_RegisterWrite(0x22,Addr>>16);
+    LCD_RegisterWrite(0x23,Addr>>24);
+}
+//[24h][25h]=========================================================================
+void Main_Image_Width(unsigned short WX)
+{
+    /*
+    [24h] Main Image Width [7:0]
+    [25h] Main Image Width [12:8]
+    Unit: Pixel.
+    It must be divisible by 4. MIW Bit [1:0] tie to ¨0〃 internally.
+    The value is physical pixel number. Maximum value is 8188 pixels
+    */
+    LCD_RegisterWrite(0x24,WX);
+    LCD_RegisterWrite(0x25,WX>>8);
+}
+//[26h][27h][28h][29h]=========================================================================
+void Main_Window_Start_XY(unsigned short WX,unsigned short HY)
+{
+    /*
+    [26h] Main Window Upper-Left corner X-coordination [7:0]
+    [27h] Main Window Upper-Left corner X-coordination [12:8]
+    Reference Main Image coordination.
+    Unit: Pixel
+    It must be divisible by 4. MWULX Bit [1:0] tie to ¨0〃 internally.
+    X-axis coordination plus Horizontal display width cannot large than 8188.
+
+    [28h] Main Window Upper-Left corner Y-coordination [7:0]
+    [29h] Main Window Upper-Left corner Y-coordination [12:8]
+    Reference Main Image coordination.
+    Unit: Pixel
+    Range is between 0 and 8191.
+    */
+    LCD_RegisterWrite(0x26,WX);
+    LCD_RegisterWrite(0x27,WX>>8);
+    LCD_RegisterWrite(0x28,HY);
+    LCD_RegisterWrite(0x29,HY>>8);
+}
+//[2Ah][2Bh][2Ch][2Dh]=========================================================================
+void PIP_Display_Start_XY(unsigned short WX,unsigned short HY)
+{
+    /*
+    [2Ah] PIP Window Display Upper-Left corner X-coordination [7:0]
+    [2Bh] PIP Window Display Upper-Left corner X-coordination [12:8]
+    Reference Main Window coordination.
+    Unit: Pixel
+    It must be divisible by 4. PWDULX Bit [1:0] tie to ¨0〃 internally.
+    X-axis coordination should less than horizontal display width.
+    According to bit of Select Configure PIP 1 or 2 Windowˇs parameters.
+    Function bit will be configured for relative PIP window.
+
+    [2Ch] PIP Window Display Upper-Left corner Y-coordination [7:0]
+    [2Dh] PIP Window Display Upper-Left corner Y-coordination [12:8]
+    Reference Main Window coordination.
+    Unit: Pixel
+    Y-axis coordination should less than vertical display height.
+    According to bit of Select Configure PIP 1 or 2 Windowˇs parameters.
+    Function bit will be configured for relative PIP window.
+    */
+    LCD_RegisterWrite(0x2A,WX);
+    LCD_RegisterWrite(0x2B,WX>>8);
+    LCD_RegisterWrite(0x2C,HY);
+    LCD_RegisterWrite(0x2D,HY>>8);
+}
+//[2Eh][2Fh][30h][31h]=========================================================================
+void PIP_Image_Start_Address(unsigned long Addr)
+{
+    /*
+    [2Eh] PIP Image Start Address[7:2]
+    [2Fh] PIP Image Start Address[15:8]
+    [30h] PIP Image Start Address [23:16]
+    [31h] PIP Image Start Address [31:24]
+    */
+    LCD_RegisterWrite(0x2E,Addr);
+    LCD_RegisterWrite(0x2F,Addr>>8);
+    LCD_RegisterWrite(0x30,Addr>>16);
+    LCD_RegisterWrite(0x31,Addr>>24);
+}
+//[32h][33h]=========================================================================
+void PIP_Image_Width(unsigned short WX)
+{
+    /*
+    [32h] PIP Image Width [7:0]
+    [33h] PIP Image Width [12:8]
+    Unit: Pixel.
+    It must be divisible by 4. PIW Bit [1:0] tie to ¨0〃 internally.
+    The value is physical pixel number.
+    This width should less than horizontal display width.
+    According to bit of Select Configure PIP 1 or 2 Windowˇs parameters.
+    Function bit will be configured for relative PIP window.
+    */
+    LCD_RegisterWrite(0x32,WX);
+    LCD_RegisterWrite(0x33,WX>>8);
+}
+//[34h][35h][36h][37h]=========================================================================
+void PIP_Window_Image_Start_XY(unsigned short WX,unsigned short HY)
+{
+    /*
+    [34h] PIP 1 or 2 Window Image Upper-Left corner X-coordination [7:0]
+    [35h] PIP Window Image Upper-Left corner X-coordination [12:8]
+    Reference PIP Image coordination.
+    Unit: Pixel
+    It must be divisible by 4. PWIULX Bit [1:0] tie to ¨0〃 internally.
+    X-axis coordination plus PIP image width cannot large than 8188.
+    According to bit of Select Configure PIP 1 or 2 Windowˇs parameters.
+    Function bit will be configured for relative PIP window.
+
+    [36h] PIP Windows Display Upper-Left corner Y-coordination [7:0]
+    [37h] PIP Windows Image Upper-Left corner Y-coordination [12:8]
+    Reference PIP Image coordination.
+    Unit: Pixel
+    Y-axis coordination plus PIP window height should less than 8191.
+    According to bit of Select Configure PIP 1 or 2 Windowˇs parameters.
+    Function bit will be configured for relative PIP window.
+    */
+    LCD_RegisterWrite(0x34,WX);
+    LCD_RegisterWrite(0x35,WX>>8);
+    LCD_RegisterWrite(0x36,HY);
+    LCD_RegisterWrite(0x37,HY>>8);
+}
+//[38h][39h][3Ah][3Bh]=========================================================================
+void PIP_Window_Width_Height(unsigned short WX,unsigned short HY)
+{
+    /*
+    [38h] PIP Window Width [7:0]
+    [39h] PIP Window Width [10:8]
+    Unit: Pixel.
+    It must be divisible by 4. The value is physical pixel number.
+    Maximum value is 8188 pixels.
+    According to bit of Select Configure PIP 1 or 2 Windowˇs parameters.
+    Function bit will be configured for relative PIP window.
+
+    [3Ah] PIP Window Height [7:0]
+    [3Bh] PIP Window Height [10:8]
+    Unit: Pixel
+    The value is physical pixel number. Maximum value is 8191 pixels.
+    According to bit of Select Configure PIP 1 or 2 Windowˇs parameters.
+    Function bit will be configured for relative PIP window.
+    */
+    LCD_RegisterWrite(0x38,WX);
+    LCD_RegisterWrite(0x39,WX>>8);
+    LCD_RegisterWrite(0x3A,HY);
+    LCD_RegisterWrite(0x3B,HY>>8);
+}
+
+//[3Ch]=========================================================================
+void Enable_Graphic_Cursor(void)
+{
+    /*
+    Graphic Cursor Enable
+    0 : Graphic Cursor disable.
+    1 : Graphic Cursor enable.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x3C);
+    temp = LCD_DataRead();
+    temp |= cSetb4;
+    LCD_DataWrite(temp);
+}
+void Disable_Graphic_Cursor(void)
+{
+    /*
+    Graphic Cursor Enable
+    0 : Graphic Cursor disable.
+    1 : Graphic Cursor enable.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x3C);
+    temp = LCD_DataRead();
+    temp &= cClrb4;
+    LCD_DataWrite(temp);
+}
+//
+void Select_Graphic_Cursor_1(void)
+{
+    /*
+    Graphic Cursor Selection Bit
+    Select one from four graphic cursor types. (00b to 11b)
+    00b : Graphic Cursor Set 1.
+    01b : Graphic Cursor Set 2.
+    10b : Graphic Cursor Set 3.
+    11b : Graphic Cursor Set 4.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x3C);
+    temp = LCD_DataRead();
+    temp &= cClrb3;
+    temp &= cClrb2;
+    LCD_DataWrite(temp);
+}
+void Select_Graphic_Cursor_2(void)
+{
+    /*
+    Graphic Cursor Selection Bit
+    Select one from four graphic cursor types. (00b to 11b)
+    00b : Graphic Cursor Set 1.
+    01b : Graphic Cursor Set 2.
+    10b : Graphic Cursor Set 3.
+    11b : Graphic Cursor Set 4.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x3C);
+    temp = LCD_DataRead();
+    temp &= cClrb3;
+    temp |= cSetb2;
+    LCD_DataWrite(temp);
+}
+void Select_Graphic_Cursor_3(void)
+{
+    /*
+    Graphic Cursor Selection Bit
+    Select one from four graphic cursor types. (00b to 11b)
+    00b : Graphic Cursor Set 1.
+    01b : Graphic Cursor Set 2.
+    10b : Graphic Cursor Set 3.
+    11b : Graphic Cursor Set 4.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x3C);
+    temp = LCD_DataRead();
+    temp |= cSetb3;
+    temp &= cClrb2;
+    LCD_DataWrite(temp);
+}
+void Select_Graphic_Cursor_4(void)
+{
+    /*
+    Graphic Cursor Selection Bit
+    Select one from four graphic cursor types. (00b to 11b)
+    00b : Graphic Cursor Set 1.
+    01b : Graphic Cursor Set 2.
+    10b : Graphic Cursor Set 3.
+    11b : Graphic Cursor Set 4.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x3C);
+    temp = LCD_DataRead();
+    temp |= cSetb3;
+    temp |= cSetb2;
+    LCD_DataWrite(temp);
+}
+//
+void Enable_Text_Cursor(void)
+{
+    /*
+    Text Cursor Enable
+    0 : Disable.
+    1 : Enable.
+    Text cursor & Graphic cursor cannot enable simultaneously.
+    Graphic cursor has higher priority then Text cursor if enabled simultaneously.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x3C);
+    temp = LCD_DataRead();
+    temp |= cSetb1;
+    LCD_DataWrite(temp);
+}
+void Disable_Text_Cursor(void)
+{
+    /*
+    Text Cursor Enable
+    0 : Disable.
+    1 : Enable.
+    Text cursor & Graphic cursor cannot enable simultaneously.
+    Graphic cursor has higher priority then Text cursor if enabled simultaneously.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x3C);
+    temp = LCD_DataRead();
+    temp &= cClrb1;
+    LCD_DataWrite(temp);
+}
+//
+void Enable_Text_Cursor_Blinking(void)
+{
+    /*
+    Text Cursor Blinking Enable
+    0 : Disable.
+    1 : Enable.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x3C);
+    temp = LCD_DataRead();
+    temp |= cSetb0;
+    LCD_DataWrite(temp);
+}
+void Disable_Text_Cursor_Blinking(void)
+{
+    /*
+    Text Cursor Blinking Enable
+    0 : Disable.
+    1 : Enable.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x3C);
+    temp = LCD_DataRead();
+    temp &= cClrb0;
+    LCD_DataWrite(temp);
+}
+//[3Dh]=========================================================================
+void Blinking_Time_Frames(unsigned char temp)
+{
+    /*
+    Text Cursor Blink Time Setting (Unit: Frame)
+    00h : 1 frame time.
+    01h : 2 frames time.
+    02h : 3 frames time.
+    :
+    FFh : 256 frames time.
+    */
+    LCD_CmdWrite(0x3D);
+    LCD_DataWrite(temp);
+}
+//[3Eh]=========================================================================
+void Text_Cursor_H_V(unsigned short WX,unsigned short HY)
+{
+    /*
+    [3Eh]
+    Text Cursor Horizontal Size Setting[4:0]
+    Unit : Pixel
+    Zero-based number. Value ¨0〃 means 1 pixel.
+    Note : When font is enlarged, the cursor setting will multiply the
+    same times as the font enlargement.
+    [3Fh]
+    Text Cursor Vertical Size Setting[4:0]
+    Unit : Pixel
+    Zero-based number. Value ¨0〃 means 1 pixel.
+    Note : When font is enlarged, the cursor setting will multiply the
+    same times as the font enlargement.
+    */
+    LCD_CmdWrite(0x3E);
+    LCD_DataWrite(WX);
+    LCD_CmdWrite(0x3F);
+    LCD_DataWrite(HY);
+}
+//[40h][41h][42h][43h]=========================================================================
+void Graphic_Cursor_XY(unsigned short WX,unsigned short HY)
+{
+    /*
+    [40h] Graphic Cursor Horizontal Location[7:0]
+    [41h] Graphic Cursor Horizontal Location[12:8]
+    [42h] Graphic Cursor Vertical Location[7:0]
+    [43h] Graphic Cursor Vertical Location[12:8]
+    Reference main Window coordination.
+    */
+    LCD_RegisterWrite(0x40,WX);
+    LCD_RegisterWrite(0x41,WX>>8);
+    LCD_RegisterWrite(0x42,HY);
+    LCD_RegisterWrite(0x43,HY>>8);
+}
+//[44h]=========================================================================
+void Set_Graphic_Cursor_Color_1(unsigned char temp)
+{
+    /*
+    [44h] Graphic Cursor Color 0 with 256 Colors
+    RGB Format [7:0] = RRRGGGBB.
+    */
+    LCD_RegisterWrite(0x44,temp);
+}
+//[45h]=========================================================================
+void Set_Graphic_Cursor_Color_2(unsigned char temp)
+{
+    /*
+    [45h] Graphic Cursor Color 1 with 256 Colors
+    RGB Format [7:0] = RRRGGGBB.
+    */
+    LCD_RegisterWrite(0x45,temp);
+}
+//[50h][51h][52h][53h]=========================================================================
+void Canvas_Image_Start_address(unsigned long Addr)
+{
+    /*
+    [50h] Start address of Canvas [7:0]
+    [51h] Start address of Canvas [15:8]
+    [52h] Start address of Canvas [23:16]
+    [53h] Start address of Canvas [31:24]
+    */
+    LCD_RegisterWrite(0x50,Addr);
+    LCD_RegisterWrite(0x51,Addr>>8);
+    LCD_RegisterWrite(0x52,Addr>>16);
+    LCD_RegisterWrite(0x53,Addr>>24);
+}
+//[54h][55h]=========================================================================
+void Canvas_image_width(unsigned short WX)
+{
+    /*
+    [54h] Canvas image width [7:2]
+    [55h] Canvas image width [12:8]
+    */
+    LCD_RegisterWrite(0x54,WX);
+    LCD_RegisterWrite(0x55,WX>>8);
+}
+//[56h][57h][58h][59h]=========================================================================
+void Active_Window_XY(unsigned short WX,unsigned short HY)
+{
+    /*
+    [56h] Active Window Upper-Left corner X-coordination [7:0]
+    [57h] Active Window Upper-Left corner X-coordination [12:8]
+    [58h] Active Window Upper-Left corner Y-coordination [7:0]
+    [59h] Active Window Upper-Left corner Y-coordination [12:8]
+    */
+    LCD_RegisterWrite(0x56,WX);
+    LCD_RegisterWrite(0x57,WX>>8);
+    LCD_RegisterWrite(0x58,HY);
+    LCD_RegisterWrite(0x59,HY>>8);
+}
+//[5Ah][5Bh][5Ch][5Dh]=========================================================================
+void Active_Window_WH(unsigned short WX,unsigned short HY)
+{
+    /*
+    [5Ah] Width of Active Window [7:0]
+    [5Bh] Width of Active Window [12:8]
+    [5Ch] Height of Active Window [7:0]
+    [5Dh] Height of Active Window [12:8]
+    */
+    LCD_RegisterWrite(0x5A,WX);
+    LCD_RegisterWrite(0x5B,WX>>8);
+    LCD_RegisterWrite(0x5C,HY);
+    LCD_RegisterWrite(0x5D,HY>>8);
+}
+//[5Eh]=========================================================================
+void Select_Write_Data_Position(void)
+{
+    /*
+    Select to read back Graphic Read/Write position
+    0: read back Graphic Write position
+    1: read back Graphic Read position
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x5E);
+    temp = LCD_DataRead();
+    temp &= cClrb3;
+    LCD_DataWrite(temp);
+}
+void Select_Read_Data_Position(void)
+{
+    /*
+    Select to read back Graphic Read/Write position
+    0: read back Graphic Write position
+    1: read back Graphic Read position
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x5E);
+    temp = LCD_DataRead();
+    temp |= cSetb3;
+    LCD_DataWrite(temp);
+}
+void Memory_XY_Mode(void)
+{
+    /*
+    Canvas addressing mode
+    0: Block mode (X-Y coordination addressing)
+    1: linear mode
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x5E);
+    temp = LCD_DataRead();
+    temp &= cClrb2;
+    LCD_DataWrite(temp);
+}
+void Memory_Linear_Mode(void)
+{
+    /*
+    Canvas addressing mode
+    0: Block mode (X-Y coordination addressing)
+    1: linear mode
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x5E);
+    temp = LCD_DataRead();
+    temp |= cSetb2;
+    LCD_DataWrite(temp);
+}
+void Memory_8bpp_Mode(void)
+{
+    /*
+    Canvas imageˇs color depth & memory R/W data width
+    In Block Mode:
+    00: 8bpp
+    01: 16bpp
+    1x: 24bpp
+    In Linear Mode:
+    X0: 8-bits memory data read/write.
+    X1: 16-bits memory data read/write
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x5E);
+    temp = LCD_DataRead();
+    temp &= cClrb1;
+    temp &= cClrb0;
+    LCD_DataWrite(temp);
+}
+void Memory_16bpp_Mode(void)
+{
+    /*
+    Canvas imageˇs color depth & memory R/W data width
+    In Block Mode:
+    00: 8bpp
+    01: 16bpp
+    1x: 24bpp
+    In Linear Mode:
+    X0: 8-bits memory data read/write.
+    X1: 16-bits memory data read/write
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x5E);
+    temp = LCD_DataRead();
+    temp &= cClrb1;
+    temp |= cSetb0;
+    LCD_DataWrite(temp);
+}
+void Memory_24bpp_Mode(void)
+{
+    /*
+    Canvas imageˇs color depth & memory R/W data width
+    In Block Mode:
+    00: 8bpp
+    01: 16bpp
+    1x: 24bpp
+    In Linear Mode:
+    X0: 8-bits memory data read/write.
+    X1: 16-bits memory data read/write
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x5E);
+    temp = LCD_DataRead();
+    temp |= cSetb1;
+    temp |= cSetb0;
+    LCD_DataWrite(temp);
+}
+
+//[5Fh][60h][61h][62h]=========================================================================
+void Goto_Pixel_XY(unsigned short WX,unsigned short HY)
+{
+    /*
+    [Write]: Set Graphic Read/Write position
+    [Read]: Current Graphic Read/Write position
+    Read back is Read position or Write position depends on
+    REG[5Eh] bit3, Select to read back Graphic Read/Write position.
+    When DPRAM Linear mode:Graphic Read/Write Position [31:24][23:16][15:8][7:0]
+    When DPRAM Active window mode:Graphic Read/Write
+    Horizontal Position [12:8][7:0],
+    Vertical Position [12:8][7:0].
+    Reference Canvas image coordination. Unit: Pixel
+    */
+    LCD_RegisterWrite(0x5F,WX);
+    LCD_RegisterWrite(0x60,WX>>8);
+    LCD_RegisterWrite(0x61,HY);
+    LCD_RegisterWrite(0x62,HY>>8);
+}
+void Goto_Linear_Addr(unsigned long Addr)
+{
+    LCD_RegisterWrite(0x5F,Addr);
+    LCD_RegisterWrite(0x60,Addr>>8);
+    LCD_RegisterWrite(0x61,Addr>>16);
+    LCD_RegisterWrite(0x62,Addr>>24);
+}
+
+
+//[63h][64h][65h][66h]=========================================================================
+void Goto_Text_XY(unsigned short WX,unsigned short HY)
+{
+    /*
+    Write: Set Text Write position
+    Read: Current Text Write position
+    Text Write X-coordination [12:8][7:0]
+    Text Write Y-coordination [12:8][7:0]
+    Reference Canvas image coordination.
+    Unit: Pixel
+    */
+    LCD_RegisterWrite(0x63,WX);
+    LCD_RegisterWrite(0x64,WX>>8);
+    LCD_RegisterWrite(0x65,HY);
+    LCD_RegisterWrite(0x66,HY>>8);
+}
+//[67h]=========================================================================
+/*
+[bit7]Draw Line / Triangle Start Signal
+Write Function
+0 : Stop the drawing function.
+1 : Start the drawing function.
+Read Function
+0 : Drawing function complete.
+1 : Drawing function is processing.
+[bit5]Fill function for Triangle Signal
+0 : Non fill.
+1 : Fill.
+[bit1]Draw Triangle or Line Select Signal
+0 : Draw Line
+1 : Draw Triangle
+*/
+void Start_Line(void)
+{
+    LCD_CmdWrite(0x67);
+    LCD_DataWrite(0x80);
+    Check_Busy_Draw();
+}
+void Start_Triangle(void)
+{
+    LCD_CmdWrite(0x67);
+    LCD_DataWrite(0x82);//B1000_0010
+    Check_Busy_Draw();
+}
+void Start_Triangle_Fill(void)
+{
+    LCD_CmdWrite(0x67);
+    LCD_DataWrite(0xA2);//B1010_0010
+    Check_Busy_Draw();
+}
+//[68h][69h][6Ah][6Bh]=========================================================================
+//线起点
+void Line_Start_XY(unsigned short WX,unsigned short HY)
+{
+    /*
+    [68h] Draw Line/Square/Triangle Start X-coordination [7:0]
+    [69h] Draw Line/Square/Triangle Start X-coordination [12:8]
+    [6Ah] Draw Line/Square/Triangle Start Y-coordination [7:0]
+    [6Bh] Draw Line/Square/Triangle Start Y-coordination [12:8]
+    */
+    LCD_CmdWrite(0x68);
+    LCD_DataWrite(WX);
+    LCD_CmdWrite(0x69);
+    LCD_DataWrite(WX>>8);
+    LCD_CmdWrite(0x6A);
+    LCD_DataWrite(HY);
+    LCD_CmdWrite(0x6B);
+    LCD_DataWrite(HY>>8);
+}
+//[6Ch][6Dh][6Eh][6Fh]=========================================================================
+//线终点
+void Line_End_XY(unsigned short WX,unsigned short HY)
+{
+    /*
+    [6Ch] Draw Line/Square/Triangle End X-coordination [7:0]
+    [6Dh] Draw Line/Square/Triangle End X-coordination [12:8]
+    [6Eh] Draw Line/Square/Triangle End Y-coordination [7:0]
+    [6Fh] Draw Line/Square/Triangle End Y-coordination [12:8]
+    */
+    LCD_CmdWrite(0x6C);
+    LCD_DataWrite(WX);
+    LCD_CmdWrite(0x6D);
+    LCD_DataWrite(WX>>8);
+    LCD_CmdWrite(0x6E);
+    LCD_DataWrite(HY);
+    LCD_CmdWrite(0x6F);
+    LCD_DataWrite(HY>>8);
+}
+//[68h]~[73h]=========================================================================
+//à-翴1
+void Triangle_Point1_XY(unsigned short WX,unsigned short HY)
+{
+    /*
+    [68h] Draw Line/Square/Triangle Start X-coordination [7:0]
+    [69h] Draw Line/Square/Triangle Start X-coordination [12:8]
+    [6Ah] Draw Line/Square/Triangle Start Y-coordination [7:0]
+    [6Bh] Draw Line/Square/Triangle Start Y-coordination [12:8]
+    */
+    LCD_CmdWrite(0x68);
+    LCD_DataWrite(WX);
+    LCD_CmdWrite(0x69);
+    LCD_DataWrite(WX>>8);
+    LCD_CmdWrite(0x6A);
+    LCD_DataWrite(HY);
+    LCD_CmdWrite(0x6B);
+    LCD_DataWrite(HY>>8);
+}
+//à-翴2
+void Triangle_Point2_XY(unsigned short WX,unsigned short HY)
+{
+    /*
+    [6Ch] Draw Line/Square/Triangle End X-coordination [7:0]
+    [6Dh] Draw Line/Square/Triangle End X-coordination [12:8]
+    [6Eh] Draw Line/Square/Triangle End Y-coordination [7:0]
+    [6Fh] Draw Line/Square/Triangle End Y-coordination [12:8]
+    */
+    LCD_CmdWrite(0x6C);
+    LCD_DataWrite(WX);
+    LCD_CmdWrite(0x6D);
+    LCD_DataWrite(WX>>8);
+    LCD_CmdWrite(0x6E);
+    LCD_DataWrite(HY);
+    LCD_CmdWrite(0x6F);
+    LCD_DataWrite(HY>>8);
+}
+//à-翴3
+void Triangle_Point3_XY(unsigned short WX,unsigned short HY)
+{
+    /*
+    [70h] Draw Triangle Point 3 X-coordination [7:0]
+    [71h] Draw Triangle Point 3 X-coordination [12:8]
+    [72h] Draw Triangle Point 3 Y-coordination [7:0]
+    [73h] Draw Triangle Point 3 Y-coordination [12:8]
+    */
+    LCD_CmdWrite(0x70);
+    LCD_DataWrite(WX);
+    LCD_CmdWrite(0x71);
+    LCD_DataWrite(WX>>8);
+    LCD_CmdWrite(0x72);
+    LCD_DataWrite(HY);
+    LCD_CmdWrite(0x73);
+    LCD_DataWrite(HY>>8);
+}
+//よ癬翴
+void Square_Start_XY(unsigned short WX,unsigned short HY)
+{
+    /*
+    [68h] Draw Line/Square/Triangle Start X-coordination [7:0]
+    [69h] Draw Line/Square/Triangle Start X-coordination [12:8]
+    [6Ah] Draw Line/Square/Triangle Start Y-coordination [7:0]
+    [6Bh] Draw Line/Square/Triangle Start Y-coordination [12:8]
+    */
+    LCD_CmdWrite(0x68);
+    LCD_DataWrite(WX);
+    LCD_CmdWrite(0x69);
+    LCD_DataWrite(WX>>8);
+    LCD_CmdWrite(0x6A);
+    LCD_DataWrite(HY);
+    LCD_CmdWrite(0x6B);
+    LCD_DataWrite(HY>>8);
+}
+//よ沧翴
+void Square_End_XY(unsigned short WX,unsigned short HY)
+{
+    /*
+    [6Ch] Draw Line/Square/Triangle End X-coordination [7:0]
+    [6Dh] Draw Line/Square/Triangle End X-coordination [12:8]
+    [6Eh] Draw Line/Square/Triangle End Y-coordination [7:0]
+    [6Fh] Draw Line/Square/Triangle End Y-coordination [12:8]
+    */
+    LCD_CmdWrite(0x6C);
+    LCD_DataWrite(WX);
+    LCD_CmdWrite(0x6D);
+    LCD_DataWrite(WX>>8);
+    LCD_CmdWrite(0x6E);
+    LCD_DataWrite(HY);
+    LCD_CmdWrite(0x6F);
+    LCD_DataWrite(HY>>8);
+}
+//[76h]=========================================================================
+/*
+[bit7]
+Draw Circle / Ellipse / Square /Circle Square Start Signal
+Write Function
+0 : Stop the drawing function.
+1 : Start the drawing function.
+Read Function
+0 : Drawing function complete.
+1 : Drawing function is processing.
+[bit6]
+Fill the Circle / Ellipse / Square / Circle Square Signal
+0 : Non fill.
+1 : fill.
+[bit5 bit4]
+Draw Circle / Ellipse / Square / Ellipse Curve / Circle Square Select
+00 : Draw Circle / Ellipse
+01 : Draw Circle / Ellipse Curve
+10 : Draw Square.
+11 : Draw Circle Square.
+[bit1 bit0]
+Draw Circle / Ellipse Curve Part Select
+00 :
+01 :
+10 :
+11 :
+*/
+void Start_Circle_or_Ellipse(void)
+{
+    LCD_CmdWrite(0x76);
+    LCD_DataWrite(0x80);//B1000_XXXX
+    Check_Busy_Draw();
+}
+void Start_Circle_or_Ellipse_Fill(void)
+{
+    LCD_CmdWrite(0x76);
+    LCD_DataWrite(0xC0);//B1100_XXXX
+    Check_Busy_Draw();
+}
+//
+void Start_Left_Down_Curve(void)
+{
+    LCD_CmdWrite(0x76);
+    LCD_DataWrite(0x90);//B1001_XX00
+    Check_Busy_Draw();
+}
+void Start_Left_Up_Curve(void)
+{
+    LCD_CmdWrite(0x76);
+    LCD_DataWrite(0x91);//B1001_XX01
+    Check_Busy_Draw();
+}
+void Start_Right_Up_Curve(void)
+{
+    LCD_CmdWrite(0x76);
+    LCD_DataWrite(0x92);//B1001_XX10
+    Check_Busy_Draw();
+}
+void Start_Right_Down_Curve(void)
+{
+    LCD_CmdWrite(0x76);
+    LCD_DataWrite(0x93);//B1001_XX11
+    Check_Busy_Draw();
+}
+//
+void Start_Left_Down_Curve_Fill(void)
+{
+    LCD_CmdWrite(0x76);
+    LCD_DataWrite(0xD0);//B1101_XX00
+    Check_Busy_Draw();
+}
+void Start_Left_Up_Curve_Fill(void)
+{
+    LCD_CmdWrite(0x76);
+    LCD_DataWrite(0xD1);//B1101_XX01
+    Check_Busy_Draw();
+}
+void Start_Right_Up_Curve_Fill(void)
+{
+    LCD_CmdWrite(0x76);
+    LCD_DataWrite(0xD2);//B1101_XX10
+    Check_Busy_Draw();
+}
+void Start_Right_Down_Curve_Fill(void)
+{
+    LCD_CmdWrite(0x76);
+    LCD_DataWrite(0xD3);//B1101_XX11
+    Check_Busy_Draw();
+}
+//
+void Start_Square(void)
+{
+    LCD_CmdWrite(0x76);
+    LCD_DataWrite(0xA0);//B1010_XXXX
+    Check_Busy_Draw();
+}
+void Start_Square_Fill(void)
+{
+    LCD_CmdWrite(0x76);
+    LCD_DataWrite(0xE0);//B1110_XXXX
+    Check_Busy_Draw();
+}
+void Start_Circle_Square(void)
+{
+    LCD_CmdWrite(0x76);
+    LCD_DataWrite(0xB0);//B1011_XXXX
+    Check_Busy_Draw();
+}
+void Start_Circle_Square_Fill(void)
+{
+    LCD_CmdWrite(0x76);
+    LCD_DataWrite(0xF0);//B1111_XXXX
+    Check_Busy_Draw();
+}
+//[77h]~[7Eh]=========================================================================
+//蛾いみ
+void Circle_Center_XY(unsigned short WX,unsigned short HY)
+{
+    /*
+    [7Bh] Draw Circle/Ellipse/Circle Square Center X-coordination [7:0]
+    [7Ch] Draw Circle/Ellipse/Circle Square Center X-coordination [12:8]
+    [7Dh] Draw Circle/Ellipse/Circle Square Center Y-coordination [7:0]
+    [7Eh] Draw Circle/Ellipse/Circle Square Center Y-coordination [12:8]
+    */
+    LCD_CmdWrite(0x7B);
+    LCD_DataWrite(WX);
+    LCD_CmdWrite(0x7C);
+    LCD_DataWrite(WX>>8);
+    LCD_CmdWrite(0x7D);
+    LCD_DataWrite(HY);
+    LCD_CmdWrite(0x7E);
+    LCD_DataWrite(HY>>8);
+}
+//掘蛾いみ
+void Ellipse_Center_XY(unsigned short WX,unsigned short HY)
+{
+    /*
+    [7Bh] Draw Circle/Ellipse/Circle Square Center X-coordination [7:0]
+    [7Ch] Draw Circle/Ellipse/Circle Square Center X-coordination [12:8]
+    [7Dh] Draw Circle/Ellipse/Circle Square Center Y-coordination [7:0]
+    [7Eh] Draw Circle/Ellipse/Circle Square Center Y-coordination [12:8]
+    */
+    LCD_CmdWrite(0x7B);
+    LCD_DataWrite(WX);
+    LCD_CmdWrite(0x7C);
+    LCD_DataWrite(WX>>8);
+    LCD_CmdWrite(0x7D);
+    LCD_DataWrite(HY);
+    LCD_CmdWrite(0x7E);
+    LCD_DataWrite(HY>>8);
+}
+//蛾畖
+void Circle_Radius_R(unsigned short WX)
+{
+    /*
+    [77h] Draw Circle/Ellipse/Circle Square Major radius [7:0]
+    [78h] Draw Circle/Ellipse/Circle Square Major radius [12:8]
+    [79h] Draw Circle/Ellipse/Circle Square Minor radius [7:0]
+    [7Ah] Draw Circle/Ellipse/Circle Square Minor radius [12:8]
+    */
+    LCD_CmdWrite(0x77);
+    LCD_DataWrite(WX);
+    LCD_CmdWrite(0x78);
+    LCD_DataWrite(WX>>8);
+    LCD_CmdWrite(0x79);
+    LCD_DataWrite(WX);
+    LCD_CmdWrite(0x7A);
+    LCD_DataWrite(WX>>8);
+}
+
+//掘蛾畖
+void Ellipse_Radius_RxRy(unsigned short WX,unsigned short HY)
+{
+    /*
+    [77h] Draw Circle/Ellipse/Circle Square Major radius [7:0]
+    [78h] Draw Circle/Ellipse/Circle Square Major radius [12:8]
+    [79h] Draw Circle/Ellipse/Circle Square Minor radius [7:0]
+    [7Ah] Draw Circle/Ellipse/Circle Square Minor radius [12:8]
+    */
+    LCD_CmdWrite(0x77);
+    LCD_DataWrite(WX);
+    LCD_CmdWrite(0x78);
+    LCD_DataWrite(WX>>8);
+    LCD_CmdWrite(0x79);
+    LCD_DataWrite(HY);
+    LCD_CmdWrite(0x7A);
+    LCD_DataWrite(HY>>8);
+}
+
+//よ锣à畖
+void Circle_Square_Radius_RxRy(unsigned short WX,unsigned short HY)
+{
+    /*
+    [77h] Draw Circle/Ellipse/Circle Square Major radius [7:0]
+    [78h] Draw Circle/Ellipse/Circle Square Major radius [12:8]
+    [79h] Draw Circle/Ellipse/Circle Square Minor radius [7:0]
+    [7Ah] Draw Circle/Ellipse/Circle Square Minor radius [12:8]
+    */
+    LCD_CmdWrite(0x77);
+    LCD_DataWrite(WX);
+    LCD_CmdWrite(0x78);
+    LCD_DataWrite(WX>>8);
+    LCD_CmdWrite(0x79);
+    LCD_DataWrite(HY);
+    LCD_CmdWrite(0x7A);
+    LCD_DataWrite(HY>>8);
+}
+
+//[84h]=========================================================================
+void Set_PWM_Prescaler_1_to_256(unsigned short WX)
+{
+    /*
+    PWM Prescaler Register
+    These 8 bits determine prescaler value for Timer 0 and 1.
+    Time base is ¨Core_Freq / (Prescaler + 1)〃
+    */
+    WX=WX-1;
+    LCD_CmdWrite(0x84);
+    LCD_DataWrite(WX);
+}
+//[85h]=========================================================================
+void Select_PWM1_Clock_Divided_By_1(void)
+{
+    /*
+    Select MUX input for PWM Timer 1.
+    00 = 1; 01 = 1/2; 10 = 1/4 ; 11 = 1/8;
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x85);
+    temp = LCD_DataRead();
+    temp &= cClrb7;
+    temp &= cClrb6;
+    LCD_DataWrite(temp);
+}
+void Select_PWM1_Clock_Divided_By_2(void)
+{
+    /*
+    Select MUX input for PWM Timer 1.
+    00 = 1; 01 = 1/2; 10 = 1/4 ; 11 = 1/8;
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x85);
+    temp = LCD_DataRead();
+    temp &= cClrb7;
+    temp |= cSetb6;
+    LCD_DataWrite(temp);
+}
+void Select_PWM1_Clock_Divided_By_4(void)
+{
+    /*
+    Select MUX input for PWM Timer 1.
+    00 = 1; 01 = 1/2; 10 = 1/4 ; 11 = 1/8;
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x85);
+    temp = LCD_DataRead();
+    temp |= cSetb7;
+    temp &= cClrb6;
+    LCD_DataWrite(temp);
+}
+void Select_PWM1_Clock_Divided_By_8(void)
+{
+    /*
+    Select MUX input for PWM Timer 1.
+    00 = 1; 01 = 1/2; 10 = 1/4 ; 11 = 1/8;
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x85);
+    temp = LCD_DataRead();
+    temp |= cSetb7;
+    temp |= cSetb6;
+    LCD_DataWrite(temp);
+}
+void Select_PWM0_Clock_Divided_By_1(void)
+{
+    /*
+    Select MUX input for PWM Timer 0.
+    00 = 1; 01 = 1/2; 10 = 1/4 ; 11 = 1/8;
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x85);
+    temp = LCD_DataRead();
+    temp &= cClrb5;
+    temp &= cClrb4;
+    LCD_DataWrite(temp);
+}
+void Select_PWM0_Clock_Divided_By_2(void)
+{
+    /*
+    Select MUX input for PWM Timer 0.
+    00 = 1; 01 = 1/2; 10 = 1/4 ; 11 = 1/8;
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x85);
+    temp = LCD_DataRead();
+    temp &= cClrb5;
+    temp |= cSetb4;
+    LCD_DataWrite(temp);
+}
+void Select_PWM0_Clock_Divided_By_4(void)
+{
+    /*
+    Select MUX input for PWM Timer 0.
+    00 = 1; 01 = 1/2; 10 = 1/4 ; 11 = 1/8;
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x85);
+    temp = LCD_DataRead();
+    temp |= cSetb5;
+    temp &= cClrb4;
+    LCD_DataWrite(temp);
+}
+void Select_PWM0_Clock_Divided_By_8(void)
+{
+    /*
+    Select MUX input for PWM Timer 0.
+    00 = 1; 01 = 1/2; 10 = 1/4 ; 11 = 1/8;
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x85);
+    temp = LCD_DataRead();
+    temp |= cSetb5;
+    temp |= cSetb4;
+    LCD_DataWrite(temp);
+}
+//[85h].[bit3][bit2]=========================================================================
+/*
+XPWM[1] pin function control
+0X:    XPWM[1] output system error flag (REG[00h] bit[1:0], Scan bandwidth insufficient + Memory access out of range)
+10:    XPWM[1] enabled and controlled by PWM timer 1
+11:    XPWM[1] output oscillator clock
+//If XTEST[0] set high, then XPWM[1] will become panel scan clock input.
+*/
+void Select_PWM1_is_ErrorFlag(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0x85);
+    temp = LCD_DataRead();
+    temp &= cClrb3;
+    LCD_DataWrite(temp);
+}
+void Select_PWM1(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0x85);
+    temp = LCD_DataRead();
+    temp |= cSetb3;
+    temp &= cClrb2;
+    LCD_DataWrite(temp);
+}
+void Select_PWM1_is_Osc_Clock(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0x85);
+    temp = LCD_DataRead();
+    temp |= cSetb3;
+    temp |= cSetb2;
+    LCD_DataWrite(temp);
+}
+//[85h].[bit1][bit0]=========================================================================
+/*
+XPWM[0] pin function control
+0X: XPWM[0] becomes GPIO-C[7]
+10: XPWM[0] enabled and controlled by PWM timer 0
+11: XPWM[0] output core clock
+*/
+void Select_PWM0_is_GPIO_C7(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0x85);
+    temp = LCD_DataRead();
+    temp &= cClrb1;
+    LCD_DataWrite(temp);
+}
+void Select_PWM0(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0x85);
+    temp = LCD_DataRead();
+    temp |= cSetb1;
+    temp &= cClrb0;
+    LCD_DataWrite(temp);
+}
+void Select_PWM0_is_Core_Clock(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0x85);
+    temp = LCD_DataRead();
+    temp |= cSetb1;
+    temp |= cSetb0;
+    LCD_DataWrite(temp);
+}
+//[86h]=========================================================================
+//[86h]PWM1
+void Enable_PWM1_Inverter(void)
+{
+    /*
+    PWM Timer 1 output inverter on/off.
+    Determine the output inverter on/off for Timer 1.
+    0 = Inverter off
+    1 = Inverter on for PWM1
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x86);
+    temp = LCD_DataRead();
+    temp |= cSetb6;
+    LCD_DataWrite(temp);
+}
+void Disable_PWM1_Inverter(void)
+{
+    /*
+    PWM Timer 1 output inverter on/off.
+    Determine the output inverter on/off for Timer 1.
+    0 = Inverter off
+    1 = Inverter on for PWM1
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x86);
+    temp = LCD_DataRead();
+    temp &= cClrb6;
+    LCD_DataWrite(temp);
+}
+void Auto_Reload_PWM1(void)
+{
+    /*
+    PWM Timer 1 auto reload on/off
+    Determine auto reload on/off for Timer 1.
+    0 = One-shot
+    1 = Interval mode(auto reload)
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x86);
+    temp = LCD_DataRead();
+    temp |= cSetb5;
+    LCD_DataWrite(temp);
+}
+void One_Shot_PWM1(void)
+{
+    /*
+    PWM Timer 1 auto reload on/off
+    Determine auto reload on/off for Timer 1.
+    0 = One-shot
+    1 = Interval mode(auto reload)
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x86);
+    temp = LCD_DataRead();
+    temp &= cClrb5;
+    LCD_DataWrite(temp);
+}
+void Start_PWM1(void)
+{
+    /*
+    PWM Timer 1 start/stop
+    Determine start/stop for Timer 1.
+    0 = Stop
+    1 = Start for Timer 1
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x86);
+    temp = LCD_DataRead();
+    temp |= cSetb4;
+    LCD_DataWrite(temp);
+}
+void Stop_PWM1(void)
+{
+    /*
+    PWM Timer 1 start/stop
+    Determine start/stop for Timer 1.
+    0 = Stop
+    1 = Start for Timer 1
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x86);
+    temp = LCD_DataRead();
+    temp &= cClrb4;
+    LCD_DataWrite(temp);
+}
+//[86h]PWM0
+void Enable_PWM0_Dead_Zone(void)
+{
+    /*
+    PWM Timer 0 Dead zone enable
+    Determine the dead zone operation. 0 = Disable. 1 = Enable.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x86);
+    temp = LCD_DataRead();
+    temp |= cSetb3;
+    LCD_DataWrite(temp);
+}
+void Disable_PWM0_Dead_Zone(void)
+{
+    /*
+    PWM Timer 0 Dead zone enable
+    Determine the dead zone operation. 0 = Disable. 1 = Enable.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x86);
+    temp = LCD_DataRead();
+    temp &= cClrb3;
+    LCD_DataWrite(temp);
+}
+void Enable_PWM0_Inverter(void)
+{
+    /*
+    PWM Timer 0 output inverter on/off
+    Determine the output inverter on/off for Timer 0.
+    0 = Inverter off
+    1 = Inverter on for PWM0
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x86);
+    temp = LCD_DataRead();
+    temp |= cSetb2;
+    LCD_DataWrite(temp);
+}
+void Disable_PWM0_Inverter(void)
+{
+    /*
+    PWM Timer 0 output inverter on/off
+    Determine the output inverter on/off for Timer 0.
+    0 = Inverter off
+    1 = Inverter on for PWM0
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x86);
+    temp = LCD_DataRead();
+    temp &= cClrb2;
+    LCD_DataWrite(temp);
+}
+void Auto_Reload_PWM0(void)
+{
+    /*
+    PWM Timer 0 auto reload on/off
+    Determine auto reload on/off for Timer 0.
+    0 = One-shot
+    1 = Interval mode(auto reload)
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x86);
+    temp = LCD_DataRead();
+    temp |= cSetb1;
+    LCD_DataWrite(temp);
+}
+void One_Shot_PWM0(void)
+{
+    /*
+    PWM Timer 1 auto reload on/off
+    Determine auto reload on/off for Timer 1.
+    0 = One-shot
+    1 = Interval mode(auto reload)
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x86);
+    temp = LCD_DataRead();
+    temp &= cClrb1;
+    LCD_DataWrite(temp);
+}
+void Start_PWM0(void)
+{
+    /*
+    PWM Timer 0 start/stop
+    Determine start/stop for Timer 0.
+    0 = Stop
+    1 = Start for Timer 0
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x86);
+    temp = LCD_DataRead();
+    temp |= cSetb0;
+    LCD_DataWrite(temp);
+}
+void Stop_PWM0(void)
+{
+    /*
+    PWM Timer 0 start/stop
+    Determine start/stop for Timer 0.
+    0 = Stop
+    1 = Start for Timer 0
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x86);
+    temp = LCD_DataRead();
+    temp &= cClrb0;
+    LCD_DataWrite(temp);
+}
+//[87h]=========================================================================
+void Set_Timer0_Dead_Zone_Length(unsigned char temp)
+{
+    /*
+    Timer 0 Dead zone length register
+    These 8 bits determine the dead zone length. The 1 unit time of
+    the dead zone length is equal to that of timer 0.
+    */
+    LCD_CmdWrite(0x87);
+    LCD_DataWrite(temp);
+}
+//[88h][89h]=========================================================================
+void Set_Timer0_Compare_Buffer(unsigned short WX)
+{
+    /*
+    Timer 0 compare buffer register
+    Compare buffer register total has 16 bits.
+    When timer counter equal or less than compare buffer register will cause PWM out
+    high level if inv_on bit is off.
+    */
+    LCD_CmdWrite(0x88);
+    LCD_DataWrite(WX);
+    LCD_CmdWrite(0x89);
+    LCD_DataWrite(WX>>8);
+}
+//[8Ah][8Bh]=========================================================================
+void Set_Timer0_Count_Buffer(unsigned short WX)
+{
+    /*
+    Timer 0 count buffer register
+    Count buffer register total has 16 bits.
+    When timer counter equal to 0 will cause PWM timer reload Count buffer register if reload_en bit set as enable.
+    It may read back timer counterˇs real time value when PWM timer start.
+    */
+    LCD_CmdWrite(0x8A);
+    LCD_DataWrite(WX);
+    LCD_CmdWrite(0x8B);
+    LCD_DataWrite(WX>>8);
+}
+//[8Ch][8Dh]=========================================================================
+void Set_Timer1_Compare_Buffer(unsigned short WX)
+{
+    /*
+    Timer 0 compare buffer register
+    Compare buffer register total has 16 bits.
+    When timer counter equal or less than compare buffer register will cause PWM out
+    high level if inv_on bit is off.
+    */
+    LCD_CmdWrite(0x8C);
+    LCD_DataWrite(WX);
+    LCD_CmdWrite(0x8D);
+    LCD_DataWrite(WX>>8);
+}
+//[8Eh][8Fh]=========================================================================
+void Set_Timer1_Count_Buffer(unsigned short WX)
+{
+    /*
+    Timer 0 count buffer register
+    Count buffer register total has 16 bits.
+    When timer counter equal to 0 will cause PWM timer reload Count buffer register if reload_en bit set as enable.
+    It may read back timer counterˇs real time value when PWM timer start.
+    */
+    LCD_CmdWrite(0x8E);
+    LCD_DataWrite(WX);
+    LCD_CmdWrite(0x8F);
+    LCD_DataWrite(WX>>8);
+}
+
+
+//[90h]~[B5h]=========================================================================
+
+//[90h]=========================================================================
+void BTE_Enable(void)
+{
+    /*
+    BTE Function Enable
+    0 : BTE Function disable.
+    1 : BTE Function enable.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x90);
+    temp = LCD_DataRead();
+    temp |= cSetb4 ;
+    LCD_DataWrite(temp);
+}
+
+//[90h]=========================================================================
+void BTE_Disable(void)
+{
+    /*
+    BTE Function Enable
+    0 : BTE Function disable.
+    1 : BTE Function enable.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x90);
+    temp = LCD_DataRead();
+    temp &= cClrb4 ;
+    LCD_DataWrite(temp);
+}
+
+//[90h]=========================================================================
+void Check_BTE_Busy(void)
+{
+    /*
+    BTE Function Status
+    0 : BTE Function is idle.
+    1 : BTE Function is busy.
+    */
+    unsigned char temp;
+
+    do
+    {
+        temp=LCD_StatusRead();
+    }
+    while(temp&0x08);
+}
+//[90h]=========================================================================
+void Pattern_Format_8X8(void)
+{
+    /*
+    Pattern Format
+    0 : 8X8
+    1 : 16X16
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x90);
+    temp = LCD_DataRead();
+    temp &= cClrb0 ;
+    LCD_DataWrite(temp);
+}
+//[90h]=========================================================================
+void Pattern_Format_16X16(void)
+{
+    /*
+    Pattern Format
+    0 : 8X8
+    1 : 16X16
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x90);
+    temp = LCD_DataRead();
+    temp |= cSetb0 ;
+    LCD_DataWrite(temp);
+}
+
+//[91h]=========================================================================
+void BTE_ROP_Code(unsigned char setx)
+{
+    /*
+    BTE ROP Code[Bit7:4]
+
+    0000 : 0(Blackness)
+    0001 : ~S0.~S1 or ~ ( S0+S1 )
+    0010 : ~S0.S1
+    0011 : ~S0
+    0100 : S0.~S1
+    0101 : ~S1
+    0110 : S0^S1
+    0111 : ~S0+~S1 or ~ ( S0.S1 )
+    1000 : S0.S1
+    1001 : ~ ( S0^S1 )
+    1010 : S1
+    1011 : ~S0+S1
+    1100 : S0
+    1101 : S0+~S1
+    1110 : S0+S1
+    1111 : 1 ( Whiteness )
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x91);
+    temp = LCD_DataRead();
+    temp &= 0x0f ;
+    temp |= (setx<<4);
+    LCD_DataWrite(temp);
+}
+
+//[91h]=========================================================================
+void BTE_Operation_Code(unsigned char setx)
+{
+    /*
+    BTE Operation Code[Bit3:0]
+
+    0000 : MPU Write BTE with ROP.
+    0001 : MPU Read BTE w/o ROP.
+    0010 : Memory copy (move) BTE in positive direction with ROP.
+    0011 : Memory copy (move) BTE in negative direction with ROP.
+    0100 : MPU Transparent Write BTE. (w/o ROP.)
+    0101 : Transparent Memory copy (move) BTE in positive direction (w/o ROP.)
+    0110 : Pattern Fill with ROP.
+    0111 : Pattern Fill with key-chroma
+    1000 : Color Expansion
+    1001 : Color Expansion with transparency
+    1010 : Move BTE in positive direction with Alpha blending
+    1011 : MPU Write BTE with Alpha blending
+    1100 : Solid Fill
+    1101 : Reserved
+    1110 : Reserved
+    1111 : Reserved
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x91);
+    temp = LCD_DataRead();
+    temp &= 0xf0 ;
+    temp |= setx ;
+    LCD_DataWrite(temp);
+}
+//[92h]=========================================================================
+void BTE_S0_Color_8bpp(void)
+{
+    /*
+    S0 Color Depth
+    00 : 256 Color
+    01 : 64k Color
+    1x : 16M Color
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x92);
+    temp = LCD_DataRead();
+    temp &= cClrb6 ;
+    temp &= cClrb5 ;
+    LCD_DataWrite(temp);
+}
+//[92h]=========================================================================
+void BTE_S0_Color_16bpp(void)
+{
+    /*
+    S0 Color Depth
+    00 : 256 Color
+    01 : 64k Color
+    1x : 16M Color
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x92);
+    temp = LCD_DataRead();
+    temp &= cClrb6 ;
+    temp |= cSetb5 ;
+    LCD_DataWrite(temp);
+}
+//[92h]=========================================================================
+void BTE_S0_Color_24bpp(void)
+{
+    /*
+    S0 Color Depth
+    00 : 256 Color
+    01 : 64k Color
+    1x : 16M Color
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x92);
+    temp = LCD_DataRead();
+    temp |= cSetb6 ;
+    //temp |= cSetb5 ;
+    LCD_DataWrite(temp);
+}
+//[92h]=========================================================================
+void BTE_S1_Color_8bpp(void)
+{
+    /*
+    S1 Color Depth
+    000 : 256 Color
+    001 : 64k Color
+    010 : 16M Color
+    011 : Constant Color
+    100 : 8 bit pixel alpha blending
+    101 : 16 bit pixel alpha blending
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x92);
+    temp = LCD_DataRead();
+    temp &= cClrb4 ;
+    temp &= cClrb3 ;
+    temp &= cClrb2 ;
+    LCD_DataWrite(temp);
+}
+//[92h]=========================================================================
+void BTE_S1_Color_16bpp(void)
+{
+    /*
+    S1 Color Depth
+    000 : 256 Color
+    001 : 64k Color
+    010 : 16M Color
+    011 : Constant Color
+    100 : 8 bit pixel alpha blending
+    101 : 16 bit pixel alpha blending
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x92);
+    temp = LCD_DataRead();
+    temp &= cClrb4 ;
+    temp &= cClrb3 ;
+    temp |= cSetb2 ;
+    LCD_DataWrite(temp);
+}
+//[92h]=========================================================================
+void BTE_S1_Color_24bpp(void)
+{
+    /*
+    S1 Color Depth
+    000 : 256 Color
+    001 : 64k Color
+    010 : 16M Color
+    011 : Constant Color
+    100 : 8 bit pixel alpha blending
+    101 : 16 bit pixel alpha blending
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x92);
+    temp = LCD_DataRead();
+    temp &= cClrb4 ;
+    temp |= cSetb3 ;
+    temp &= cClrb2 ;
+    LCD_DataWrite(temp);
+}
+
+//[92h]=========================================================================
+void BTE_S1_Color_Constant(void)
+{
+    /*
+    S1 Color Depth
+    000 : 256 Color
+    001 : 64k Color
+    010 : 16M Color
+    011 : Constant Color
+    100 : 8 bit pixel alpha blending
+    101 : 16 bit pixel alpha blending
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x92);
+    temp = LCD_DataRead();
+    temp &= cClrb4 ;
+    temp |= cSetb3 ;
+    temp |= cSetb2 ;
+    LCD_DataWrite(temp);
+}
+
+
+
+//[92h]=========================================================================
+void BTE_S1_Color_8bit_Alpha(void)
+{
+    /*
+    S1 Color Depth
+    000 : 256 Color
+    001 : 64k Color
+    010 : 16M Color
+    011 : Constant Color
+    100 : 8 bit pixel alpha blending
+    101 : 16 bit pixel alpha blending
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x92);
+    temp = LCD_DataRead();
+    temp |= cSetb4 ;
+    temp &= cClrb3 ;
+    temp &= cClrb2 ;
+    LCD_DataWrite(temp);
+}
+
+//[92h]=========================================================================
+void BTE_S1_Color_16bit_Alpha(void)
+{
+    /*
+    S1 Color Depth
+    000 : 256 Color
+    001 : 64k Color
+    010 : 16M Color
+    011 : Constant Color
+    100 : 8 bit pixel alpha blending
+    101 : 16 bit pixel alpha blending
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x92);
+    temp = LCD_DataRead();
+    temp |= cSetb4 ;
+    temp &= cClrb3 ;
+    temp |= cSetb2 ;
+    LCD_DataWrite(temp);
+}
+
+//[92h]=========================================================================
+void BTE_Destination_Color_8bpp(void)
+{
+    /*
+    Destination Color Depth
+    00 : 256 Color
+    01 : 64k Color
+    1x : 16M Color
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x92);
+    temp = LCD_DataRead();
+    temp &= cClrb1 ;
+    temp &= cClrb0 ;
+    LCD_DataWrite(temp);
+}
+//[92h]=========================================================================
+void BTE_Destination_Color_16bpp(void)
+{
+    /*
+    Destination Color Depth
+    00 : 256 Color
+    01 : 64k Color
+    1x : 16M Color
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x92);
+    temp = LCD_DataRead();
+    temp &= cClrb1 ;
+    temp |= cSetb0 ;
+    LCD_DataWrite(temp);
+}
+//[92h]=========================================================================
+void BTE_Destination_Color_24bpp(void)
+{
+    /*
+    Destination Color Depth
+    00 : 256 Color
+    10 : 64k Color
+    1x : 16M Color
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0x92);
+    temp = LCD_DataRead();
+    temp |= cSetb1 ;
+    //temp |= cSetb0 ;
+    LCD_DataWrite(temp);
+}
+
+
+//[93h][94h][95h][96h]=========================================================================
+void BTE_S0_Memory_Start_Address(unsigned long Addr)
+{
+    /*
+    [93h] BTE S0 Memory Start Address [7:0]
+    [94h] BTE S0 Memory Start Address [15:8]
+    [95h] BTE S0 Memory Start Address [23:16]
+    [96h] BTE S0 Memory Start Address [31:24]
+    Bit [1:0] tie to ¨0〃 internally.
+    */
+    LCD_RegisterWrite(0x93,Addr);
+    LCD_RegisterWrite(0x94,Addr>>8);
+    LCD_RegisterWrite(0x95,Addr>>16);
+    LCD_RegisterWrite(0x96,Addr>>24);
+}
+
+
+//[97h][98h]=========================================================================
+void BTE_S0_Image_Width(unsigned short WX)
+{
+    /*
+    [97h] BTE S0 Image Width [7:0]
+    [98h] BTE S0 Image Width [12:8]
+    Unit: Pixel.
+    Bit [1:0] tie to ¨0〃 internally.
+    */
+    LCD_RegisterWrite(0x97,WX);
+    LCD_RegisterWrite(0x98,WX>>8);
+}
+
+
+//[99h][9Ah][9Bh][9Ch]=========================================================================
+void BTE_S0_Window_Start_XY(unsigned short WX,unsigned short HY)
+{
+    /*
+    [99h] BTE S0 Window Upper-Left corner X-coordination [7:0]
+    [9Ah] BTE S0 Window Upper-Left corner X-coordination [12:8]
+    [9Bh] BTE S0 Window Upper-Left corner Y-coordination [7:0]
+    [9Ch] BTE S0 Window Upper-Left corner Y-coordination [12:8]
+    */
+    LCD_RegisterWrite(0x99,WX);
+    LCD_RegisterWrite(0x9A,WX>>8);
+    LCD_RegisterWrite(0x9B,HY);
+    LCD_RegisterWrite(0x9C,HY>>8);
+}
+
+
+
+
+//[9Dh][9Eh][9Fh][A0h]=========================================================================
+void BTE_S1_Memory_Start_Address(unsigned long Addr)
+{
+    /*
+    [9Dh] BTE S1 Memory Start Address [7:0]
+    [9Eh] BTE S1 Memory Start Address [15:8]
+    [9Fh] BTE S1 Memory Start Address [23:16]
+    [A0h] BTE S1 Memory Start Address [31:24]
+    Bit [1:0] tie to ¨0〃 internally.
+    */
+    LCD_RegisterWrite(0x9D,Addr);
+    LCD_RegisterWrite(0x9E,Addr>>8);
+    LCD_RegisterWrite(0x9F,Addr>>16);
+    LCD_RegisterWrite(0xA0,Addr>>24);
+}
+
+
+//Input data format:R3G3B2
+void S1_Constant_color_256(unsigned char temp)
+{
+    LCD_CmdWrite(0x9D);
+    LCD_DataWrite(temp);
+    LCD_CmdWrite(0x9E);
+    LCD_DataWrite(temp<<3);
+    LCD_CmdWrite(0x9F);
+    LCD_DataWrite(temp<<6);
+}
+
+//Input data format:R5G6B6
+void S1_Constant_color_65k(unsigned short temp)
+{
+    LCD_CmdWrite(0x9D);
+    LCD_DataWrite(temp>>8);
+    LCD_CmdWrite(0x9E);
+    LCD_DataWrite(temp>>3);
+    LCD_CmdWrite(0x9F);
+    LCD_DataWrite(temp<<3);
+}
+
+//Input data format:R8G8B8
+void S1_Constant_color_16M(unsigned long temp)
+{
+    LCD_CmdWrite(0x9D);
+    LCD_DataWrite(temp>>16);
+    LCD_CmdWrite(0x9E);
+    LCD_DataWrite(temp>>8);
+    LCD_CmdWrite(0x9F);
+    LCD_DataWrite(temp);
+}
+
+
+
+
+//[A1h][A2h]=========================================================================
+void BTE_S1_Image_Width(unsigned short WX)
+{
+    /*
+    [A1h] BTE S1 Image Width [7:0]
+    [A2h] BTE S1 Image Width [12:8]
+    Unit: Pixel.
+    Bit [1:0] tie to ¨0〃 internally.
+    */
+    LCD_RegisterWrite(0xA1,WX);
+    LCD_RegisterWrite(0xA2,WX>>8);
+}
+
+
+//[A3h][A4h][A5h][A6h]=========================================================================
+void BTE_S1_Window_Start_XY(unsigned short WX,unsigned short HY)
+{
+    /*
+    [A3h] BTE S1 Window Upper-Left corner X-coordination [7:0]
+    [A4h] BTE S1 Window Upper-Left corner X-coordination [12:8]
+    [A5h] BTE S1 Window Upper-Left corner Y-coordination [7:0]
+    [A6h] BTE S1 Window Upper-Left corner Y-coordination [12:8]
+    */
+    LCD_RegisterWrite(0xA3,WX);
+    LCD_RegisterWrite(0xA4,WX>>8);
+    LCD_RegisterWrite(0xA5,HY);
+    LCD_RegisterWrite(0xA6,HY>>8);
+}
+
+
+
+
+//[A7h][A8h][A9h][AAh]=========================================================================
+void BTE_Destination_Memory_Start_Address(unsigned long Addr)
+{
+    /*
+    [A7h] BTE Destination Memory Start Address [7:0]
+    [A8h] BTE Destination Memory Start Address [15:8]
+    [A9h] BTE Destination Memory Start Address [23:16]
+    [AAh] BTE Destination Memory Start Address [31:24]
+    Bit [1:0] tie to ¨0〃 internally.
+    */
+    LCD_RegisterWrite(0xA7,Addr);
+    LCD_RegisterWrite(0xA8,Addr>>8);
+    LCD_RegisterWrite(0xA9,Addr>>16);
+    LCD_RegisterWrite(0xAA,Addr>>24);
+}
+
+
+//[ABh][ACh]=========================================================================
+void BTE_Destination_Image_Width(unsigned short WX)
+{
+    /*
+    [ABh] BTE Destination Image Width [7:0]
+    [ACh] BTE Destination Image Width [12:8]
+    Unit: Pixel.
+    Bit [1:0] tie to ¨0〃 internally.
+    */
+    LCD_RegisterWrite(0xAB,WX);
+    LCD_RegisterWrite(0xAC,WX>>8);
+}
+
+
+//[ADh][AEh][AFh][B0h]=========================================================================
+void BTE_Destination_Window_Start_XY(unsigned short WX,unsigned short HY)
+{
+    /*
+    [ADh] BTE Destination Window Upper-Left corner X-coordination [7:0]
+    [AEh] BTE Destination Window Upper-Left corner X-coordination [12:8]
+    [AFh] BTE Destination Window Upper-Left corner Y-coordination [7:0]
+    [B0h] BTE Destination Window Upper-Left corner Y-coordination [12:8]
+    */
+    LCD_RegisterWrite(0xAD,WX);
+    LCD_RegisterWrite(0xAE,WX>>8);
+    LCD_RegisterWrite(0xAF,HY);
+    LCD_RegisterWrite(0xB0,HY>>8);
+}
+
+
+//[B1h][B2h][B3h][B4h]===============================================================
+
+void BTE_Window_Size(unsigned short WX, unsigned short WY)
+
+{
+    /*
+    [B1h] BTE Window Width [7:0]
+    [B2h] BTE Window Width [12:8]
+
+    [B3h] BTE Window Height [7:0]
+    [B4h] BTE Window Height [12:8]
+    */
+    LCD_RegisterWrite(0xB1,WX);
+    LCD_RegisterWrite(0xB2,WX>>8);
+    LCD_RegisterWrite(0xB3,WY);
+    LCD_RegisterWrite(0xB4,WY>>8);
+}
+
+//[B5h]=========================================================================
+void BTE_Alpha_Blending_Effect(unsigned char temp)
+{
+    /*
+    Window Alpha Blending effect for S0 & S1
+    The value of alpha in the color code ranges from 0.0 to 1.0,
+    where 0.0 represents a fully transparent color, and 1.0
+    represents a fully opaque color.
+    00h: 0
+    01h: 1/32
+    02h: 2/32
+    :
+    1Eh: 30/32
+    1Fh: 31/32
+    2Xh: 1
+    Output Effect = (S0 image x (1 - alpha setting value)) + (S1 image x alpha setting value)
+    */
+    LCD_CmdWrite(0xB5);
+    LCD_DataWrite(temp);
+}
+
+
+//[B6h]=========================================================================
+void Start_SFI_DMA(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0xB6);
+    temp = LCD_DataRead();
+    temp |= cSetb0;
+    LCD_DataWrite(temp);
+}
+
+void Check_Busy_SFI_DMA(void)
+{
+    LCD_CmdWrite(0xB6);
+
+    do
+    {
+    }
+    while((LCD_DataRead()&0x01)==0x01);
+}
+
+
+//[B7h]=========================================================================
+void Select_SFI_0(void)
+{
+    /*[bit7]
+    Serial Flash/ROM I/F # Select
+    0: Serial Flash/ROM 0 I/F is selected.
+    1: Serial Flash/ROM 1 I/F is selected.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xB7);
+    temp = LCD_DataRead();
+    temp &= cClrb7;
+    LCD_DataWrite(temp);
+}
+void Select_SFI_1(void)
+{
+    /*[bit7]
+    Serial Flash/ROM I/F # Select
+    0: Serial Flash/ROM 0 I/F is selected.
+    1: Serial Flash/ROM 1 I/F is selected.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xB7);
+    temp = LCD_DataRead();
+    temp |= cSetb7;
+    LCD_DataWrite(temp);
+}
+void Select_SFI_Font_Mode(void)
+{
+    /*[bit6]
+    Serial Flash /ROM Access Mode
+    0: Font mode  for external cgrom
+    1: DMA mode  for cgram , pattern , bootstart image or osd
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xB7);
+    temp = LCD_DataRead();
+    temp &= cClrb6;
+    LCD_DataWrite(temp);
+}
+void Select_SFI_DMA_Mode(void)
+{
+    /*[bit6]
+    Serial Flash /ROM Access Mode
+    0: Font mode  for external cgrom
+    1: DMA mode  for cgram , pattern , bootstart image or osd
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xB7);
+    temp = LCD_DataRead();
+    temp |= cSetb6;
+    LCD_DataWrite(temp);
+}
+void Select_SFI_24bit_Address(void)
+{
+    /*[bit5]
+    Serial Flash/ROM Address Mode
+    0: 24 bits address mode
+    1: 32 bits address mode
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xB7);
+    temp = LCD_DataRead();
+    temp &= cClrb5;
+    LCD_DataWrite(temp);
+}
+void Select_SFI_32bit_Address(void)
+{
+    /*[bit5]
+    Serial Flash/ROM Address Mode
+    0: 24 bits address mode
+    1: 32 bits address mode
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xB7);
+    temp = LCD_DataRead();
+    temp |= cSetb5;
+    LCD_DataWrite(temp);
+}
+void Select_SFI_Waveform_Mode_0(void)
+{
+    /*[bit4]
+    Serial Flash/ROM Waveform Mode
+    Mode 0.
+    Mode 3.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xB7);
+    temp = LCD_DataRead();
+    temp &= cClrb4;
+    LCD_DataWrite(temp);
+}
+void Select_SFI_Waveform_Mode_3(void)
+{
+    /*[bit4]
+    Serial Flash/ROM Waveform Mode
+    Mode 0.
+    Mode 3.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xB7);
+    temp = LCD_DataRead();
+    temp |= cSetb4;
+    LCD_DataWrite(temp);
+}
+void Select_SFI_0_DummyRead(void)
+{
+    /*[bit3][bit2]
+    Serial Flash /ROM Read Cycle 0 RW
+    00b: no dummy cycle mode
+    01b: 1 dummy cycle mode
+    10b: 2 dummy cycle mode
+    11b: 4 dummy cycle mode
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xB7);
+    temp = LCD_DataRead();
+    temp &= 0xF3;
+    LCD_DataWrite(temp);
+}
+void Select_SFI_8_DummyRead(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0xB7);
+    temp = LCD_DataRead();
+    temp &= 0xF3;
+    temp |= cSetb2;
+    LCD_DataWrite(temp);
+}
+void Select_SFI_16_DummyRead(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0xB7);
+    temp = LCD_DataRead();
+    temp &= 0xF3;
+    temp |= cSetb3;
+    LCD_DataWrite(temp);
+}
+void Select_SFI_24_DummyRead(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0xB7);
+    temp = LCD_DataRead();
+    temp |= 0x0c;
+    LCD_DataWrite(temp);
+}
+void Select_SFI_Single_Mode(void)
+{
+    /*[bit1][bit0]
+    Serial Flash /ROM I/F Data Latch Mode Select
+    0Xb: Single Mode
+    10b: Dual Mode 0.
+    11b: Dual Mode 1.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xB7);
+    temp = LCD_DataRead();
+    temp &= 0xFC;
+    LCD_DataWrite(temp);
+}
+void Select_SFI_Dual_Mode0(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0xB7);
+    temp = LCD_DataRead();
+    temp &= 0xFC;
+    temp |= cSetb1;
+    LCD_DataWrite(temp);
+}
+void Select_SFI_Dual_Mode1(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0xB7);
+    temp = LCD_DataRead();
+    temp |= 0x03;
+    LCD_DataWrite(temp);
+}
+
+//REG[B8h] SPI master Tx /Rx FIFO Data Register (SPIDR)
+unsigned char SPI_Master_FIFO_Data_Put(unsigned char Data)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0xB8);
+    LCD_DataWrite(Data);
+
+    while(Tx_FIFO_Empty_Flag()==0);
+
+    temp = SPI_Master_FIFO_Data_Get();
+    return temp;
+}
+
+unsigned char SPI_Master_FIFO_Data_Get(void)
+{
+    unsigned char temp;
+
+    while(Rx_FIFO_Empty_Flag()==1);
+
+    LCD_CmdWrite(0xB8);
+    temp=LCD_DataRead();
+    //while(Rx_FIFO_full_flag());
+    return temp;
+}
+
+//REG[B9h] SPI master Control Register (SPIMCR2)
+void Mask_SPI_Master_Interrupt_Flag(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0xB9);
+    temp = LCD_DataRead();
+    temp |= cSetb6;
+    LCD_DataWrite(temp);
+}
+
+void Select_nSS_drive_on_xnsfcs0(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0xB9);
+    temp = LCD_DataRead();
+    temp &= cClrb5;
+    LCD_DataWrite(temp);
+}
+
+void Select_nSS_drive_on_xnsfcs1(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0xB9);
+    temp = LCD_DataRead();
+    temp |= cSetb5;
+    LCD_DataWrite(temp);
+}
+
+//0: inactive (nSS port will goes high)
+void nSS_Inactive(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0xB9);
+    temp = LCD_DataRead();
+    temp &= cClrb4;
+    LCD_DataWrite(temp);
+}
+//1: active (nSS port will goes low)
+void nSS_Active(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0xB9);
+    temp = LCD_DataRead();
+    temp |= cSetb4;
+    LCD_DataWrite(temp);
+}
+
+//Interrupt enable for FIFO overflow error [OVFIRQEN]
+void OVFIRQEN_Enable(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0xB9);
+    temp = LCD_DataRead();
+    temp |= cSetb3;
+    LCD_DataWrite(temp);
+}
+//Interrupt enable for while Tx FIFO empty & SPI engine/FSM idle
+void EMTIRQEN_Enable(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0xB9);
+    temp = LCD_DataRead();
+    temp |= cSetb2;
+    LCD_DataWrite(temp);
+}
+
+
+//At CPOL=0 the base value of the clock is zero
+//o  For CPHA=0, data are read on the clock's rising edge (low->high transition) and
+//data are changed on a falling edge (high->low clock transition).
+//o  For CPHA=1, data are read on the clock's falling edge and data are changed on a
+//rising edge.
+
+//At CPOL=1 the base value of the clock is one (inversion of CPOL=0)
+//o  For CPHA=0, data are read on clock's falling edge and data are changed on a
+//rising edge.
+//o  For CPHA=1, data are read on clock's rising edge and data are changed on a
+//falling edge.
+
+void Reset_CPOL(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0xB9);
+    temp = LCD_DataRead();
+    temp &= cClrb1;
+    LCD_DataWrite(temp);
+}
+
+void Set_CPOL(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0xB9);
+    temp = LCD_DataRead();
+    temp |= cSetb1;
+    LCD_DataWrite(temp);
+}
+
+
+void Reset_CPHA(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0xB9);
+    temp = LCD_DataRead();
+    temp &= cClrb0;
+    LCD_DataWrite(temp);
+}
+
+void Set_CPHA(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0xB9);
+    temp = LCD_DataRead();
+    temp |= cSetb0;
+    LCD_DataWrite(temp);
+}
+
+
+//REG[BAh] SPI master Status Register (SPIMSR)
+unsigned char Tx_FIFO_Empty_Flag(void)
+{
+    LCD_CmdWrite(0xBA);
+
+    if((LCD_DataRead()&0x80)==0x80)
+    {
+        return 1;
+    }
+    else
+    {
+        return 0;
+    }
+}
+
+unsigned char Tx_FIFO_Full_Flag(void)
+{
+    LCD_CmdWrite(0xBA);
+
+    if((LCD_DataRead()&0x40)==0x40)
+    {
+        return 1;
+    }
+    else
+    {
+        return 0;
+    }
+}
+
+unsigned char Rx_FIFO_Empty_Flag(void)
+{
+    LCD_CmdWrite(0xBA);
+
+    if((LCD_DataRead()&0x20)==0x20)
+    {
+        return 1;
+    }
+    else
+    {
+        return 0;
+    }
+}
+
+unsigned char Rx_FIFO_full_flag(void)
+{
+    LCD_CmdWrite(0xBA);
+
+    if((LCD_DataRead()&0x10)==0x10)
+    {
+        return 1;
+    }
+    else
+    {
+        return 0;
+    }
+}
+
+unsigned char OVFI_Flag(void)
+{
+    LCD_CmdWrite(0xBA);
+
+    if((LCD_DataRead()&0x08)==0x08)
+    {
+        return 1;
+    }
+    else
+    {
+        return 0;
+    }
+}
+
+void Clear_OVFI_Flag(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0xBA);
+    temp = LCD_DataRead();
+    temp |= cSetb3;
+    LCD_DataWrite(temp);
+}
+
+unsigned char EMTI_Flag(void)
+{
+    LCD_CmdWrite(0xBA);
+
+    if((LCD_DataRead()&0x04)==0x04)
+    {
+        return 1;
+    }
+    else
+    {
+        return 0;
+    }
+}
+
+void Clear_EMTI_Flag(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0xBA);
+    temp = LCD_DataRead();
+    temp |= cSetb2;
+    LCD_DataWrite(temp);
+}
+
+
+//REG[BB] SPI Clock period (SPIDIV)
+void SPI_Clock_Period(unsigned char temp)
+{
+    LCD_CmdWrite(0xBB);
+    LCD_DataWrite(temp);
+}
+
+//[BCh][BDh][BEh][BFh]=========================================================================
+void SFI_DMA_Source_Start_Address(unsigned long Addr)
+{
+    /*
+    DMA Source START ADDRESS
+    This bits index serial flash address [7:0][15:8][23:16][31:24]
+    */
+    LCD_CmdWrite(0xBC);
+    LCD_DataWrite(Addr);
+    LCD_CmdWrite(0xBD);
+    LCD_DataWrite(Addr>>8);
+    LCD_CmdWrite(0xBE);
+    LCD_DataWrite(Addr>>16);
+    LCD_CmdWrite(0xBF);
+    LCD_DataWrite(Addr>>24);
+}
+//[C0h][C1h][C2h][C3h]=========================================================================
+void SFI_DMA_Destination_Start_Address(unsigned long Addr)
+{
+    /*
+    DMA Destination START ADDRESS
+    [1:0]Fix at 0
+    This bits index SDRAM address [7:0][15:8][23:16][31:24]
+    */
+    LCD_CmdWrite(0xC0);
+    LCD_DataWrite(Addr);
+    LCD_CmdWrite(0xC1);
+    LCD_DataWrite(Addr>>8);
+    LCD_CmdWrite(0xC2);
+    LCD_DataWrite(Addr>>16);
+    LCD_CmdWrite(0xC3);
+    LCD_DataWrite(Addr>>24);
+}
+//[C0h][C1h][C2h][C3h]=========================================================================
+void SFI_DMA_Destination_Upper_Left_Corner(unsigned short WX,unsigned short HY)
+{
+    /*
+    C0h
+    This register defines DMA Destination Window Upper-Left corner
+    X-coordination [7:0] on Canvas area.
+    When REG DMACR bit 1 = 1 (Block Mode)
+    This register defines Destination address [7:2] in SDRAM.
+    C1h
+    When REG DMACR bit 1 = 0 (Linear Mode)
+    This register defines DMA Destination Window Upper-Left corner
+    X-coordination [12:8] on Canvas area.
+    When REG DMACR bit 1 = 1 (Block Mode)
+    This register defines Destination address [15:8] in SDRAM.
+    C2h
+    When REG DMACR bit 1 = 0 (Linear Mode)
+    This register defines DMA Destination Window Upper-Left corner
+    Y-coordination [7:0] on Canvas area.
+    When REG DMACR bit 1 = 1 (Block Mode)
+    This register defines Destination address [23:16] in SDRAM.
+    C3h
+    When REG DMACR bit 1 = 0 (Linear Mode)
+    This register defines DMA Destination Window Upper-Left corner
+    Y-coordination [12:8] on Canvas area.
+    When REG DMACR bit 1 = 1 (Block Mode)
+    This register defines Destination address [31:24] in SDRAM.
+    */
+    LCD_CmdWrite(0xC0);
+    LCD_DataWrite(WX);
+    LCD_CmdWrite(0xC1);
+    LCD_DataWrite(WX>>8);
+    LCD_CmdWrite(0xC2);
+    LCD_DataWrite(HY);
+    LCD_CmdWrite(0xC3);
+    LCD_DataWrite(HY>>8);
+}
+
+
+
+//[C6h][C7h][C8h][C9h]=========================================================================
+void SFI_DMA_Transfer_Number(unsigned long Addr)
+{
+    /*
+    Unit : Pixel
+    When REG DMACR bit 1 = 0 (Linear Mode)
+    DMA Transfer Number [7:0][15:8][23:16][31:24]
+
+    When REG DMACR bit 1 = 1 (Block Mode)
+    DMA Block Width [7:0][15:8]
+    DMA Block HIGH[7:0][15:8]
+    */
+    LCD_CmdWrite(0xC6);
+    LCD_DataWrite(Addr);
+    LCD_CmdWrite(0xC7);
+    LCD_DataWrite(Addr>>8);
+    LCD_CmdWrite(0xC8);
+    LCD_DataWrite(Addr>>16);
+    LCD_CmdWrite(0xC9);
+    LCD_DataWrite(Addr>>24);
+}
+void SFI_DMA_Transfer_Width_Height(unsigned short WX,unsigned short HY)
+{
+    /*
+    When REG DMACR bit 1 = 0 (Linear Mode)
+    DMA Transfer Number [7:0][15:8][23:16][31:24]
+
+    When REG DMACR bit 1 = 1 (Block Mode)
+    DMA Block Width [7:0][15:8]
+    DMA Block HIGH[7:0][15:8]
+    */
+    LCD_CmdWrite(0xC6);
+    LCD_DataWrite(WX);
+    LCD_CmdWrite(0xC7);
+    LCD_DataWrite(WX>>8);
+    LCD_CmdWrite(0xC8);
+    LCD_DataWrite(HY);
+    LCD_CmdWrite(0xC9);
+    LCD_DataWrite(HY>>8);
+}
+//[CAh][CBh]=========================================================================
+void SFI_DMA_Source_Width(unsigned short WX)
+{
+    /*
+    DMA Source Picture Width [7:0][12:8]
+    Unit: pixel
+    */
+    LCD_CmdWrite(0xCA);
+    LCD_DataWrite(WX);
+    LCD_CmdWrite(0xCB);
+    LCD_DataWrite(WX>>8);
+}
+
+//[CCh]=========================================================================
+
+void Font_Select_UserDefine_Mode(void)
+{
+    /*[bit7-6]
+    User-defined Font /CGROM Font Selection Bit in Text Mode
+    00 : Internal CGROM
+    01 : Genitop serial flash
+    10 : User-defined Font
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xCC);
+    temp = LCD_DataRead();
+    temp |= cSetb7;
+    temp &= cClrb6;
+    LCD_DataWrite(temp);
+}
+void CGROM_Select_Internal_CGROM(void)
+{
+    /*[bit7-6]
+    User-defined Font /CGROM Font Selection Bit in Text Mode
+    00 : Internal CGROM
+    01 : Genitop serial flash
+    10 : User-defined Font
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xCC);
+    temp = LCD_DataRead();
+    temp &= cClrb7;
+    temp &= cClrb6;
+    LCD_DataWrite(temp);
+}
+void CGROM_Select_Genitop_FontROM(void)
+{
+    /*[bit7-6]
+    User-defined Font /CGROM Font Selection Bit in Text Mode
+    00 : Internal CGROM
+    01 : Genitop serial flash
+    10 : User-defined Font
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xCC);
+    temp = LCD_DataRead();
+    temp &= cClrb7;
+    temp |= cSetb6;
+    LCD_DataWrite(temp);
+}
+void Font_Select_8x16_16x16(void)
+{
+    /*[bit5-4]
+    Font Height Setting
+    00b : 8x16 / 16x16.
+    01b : 12x24 / 24x24.
+    10b : 16x32 / 32x32.
+    *** User-defined Font width is decided by font code. Genitop
+    serial flashˇs font width is decided by font code or GT Font ROM
+    control register.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xCC);
+    temp = LCD_DataRead();
+    temp &= cClrb5;
+    temp &= cClrb4;
+    LCD_DataWrite(temp);
+}
+void Font_Select_12x24_24x24(void)
+{
+    /*[bit5-4]
+    Font Height Setting
+    00b : 8x16 / 16x16.
+    01b : 12x24 / 24x24.
+    10b : 16x32 / 32x32.
+    *** User-defined Font width is decided by font code. Genitop
+    serial flashˇs font width is decided by font code or GT Font ROM
+    control register.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xCC);
+    temp = LCD_DataRead();
+    temp &= cClrb5;
+    temp |= cSetb4;
+    LCD_DataWrite(temp);
+}
+void Font_Select_16x32_32x32(void)
+{
+    /*[bit5-4]
+    Font Height Setting
+    00b : 8x16 / 16x16.
+    01b : 12x24 / 24x24.
+    10b : 16x32 / 32x32.
+    *** User-defined Font width is decided by font code. Genitop
+    serial flashˇs font width is decided by font code or GT Font ROM
+    control register.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xCC);
+    temp = LCD_DataRead();
+    temp |= cSetb5;
+    temp &= cClrb4;
+    LCD_DataWrite(temp);
+}
+void Internal_CGROM_Select_ISOIEC8859_1(void)
+{
+    /*
+    Font Selection for internal CGROM
+    When FNCR0 B7 = 0 and B5 = 0, Internal CGROM supports the
+    8x16 character sets with the standard coding of ISO/IEC 8859-1~4,
+    which supports English and most of European country languages.
+    00b : ISO/IEC 8859-1.
+    01b : ISO/IEC 8859-2.
+    10b : ISO/IEC 8859-3.
+    11b : ISO/IEC 8859-4.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xCC);
+    temp = LCD_DataRead();
+    temp &= cClrb1;
+    temp &= cClrb0;
+    LCD_DataWrite(temp);
+}
+void Internal_CGROM_Select_ISOIEC8859_2(void)
+{
+    /*
+    Font Selection for internal CGROM
+    When FNCR0 B7 = 0 and B5 = 0, Internal CGROM supports the
+    8x16 character sets with the standard coding of ISO/IEC 8859-1~4,
+    which supports English and most of European country languages.
+    00b : ISO/IEC 8859-1.
+    01b : ISO/IEC 8859-2.
+    10b : ISO/IEC 8859-3.
+    11b : ISO/IEC 8859-4.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xCC);
+    temp = LCD_DataRead();
+    temp &= cClrb1;
+    temp |= cSetb0;
+    LCD_DataWrite(temp);
+}
+void Internal_CGROM_Select_ISOIEC8859_3(void)
+{
+    /*
+    Font Selection for internal CGROM
+    When FNCR0 B7 = 0 and B5 = 0, Internal CGROM supports the
+    8x16 character sets with the standard coding of ISO/IEC 8859-1~4,
+    which supports English and most of European country languages.
+    00b : ISO/IEC 8859-1.
+    01b : ISO/IEC 8859-2.
+    10b : ISO/IEC 8859-3.
+    11b : ISO/IEC 8859-4.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xCC);
+    temp = LCD_DataRead();
+    temp |= cSetb1;
+    temp &= cClrb0;
+    LCD_DataWrite(temp);
+}
+void Internal_CGROM_Select_ISOIEC8859_4(void)
+{
+    /*
+    Font Selection for internal CGROM
+    When FNCR0 B7 = 0 and B5 = 0, Internal CGROM supports the
+    8x16 character sets with the standard coding of ISO/IEC 8859-1~4,
+    which supports English and most of European country languages.
+    00b : ISO/IEC 8859-1.
+    01b : ISO/IEC 8859-2.
+    10b : ISO/IEC 8859-3.
+    11b : ISO/IEC 8859-4.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xCC);
+    temp = LCD_DataRead();
+    temp |= cSetb1;
+    temp |= cSetb0;
+    LCD_DataWrite(temp);
+}
+//[CDh]=========================================================================
+void Enable_Font_Alignment(void)
+{
+    /*
+    Full Alignment Selection Bit
+    0 : Full alignment disable.
+    1 : Full alignment enable.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xCD);
+    temp = LCD_DataRead();
+    temp |= cSetb7;
+    LCD_DataWrite(temp);
+}
+void Disable_Font_Alignment(void)
+{
+    /*
+    Full Alignment Selection Bit
+    0 : Full alignment disable.
+    1 : Full alignment enable.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xCD);
+    temp = LCD_DataRead();
+    temp &= cClrb7;
+    LCD_DataWrite(temp);
+}
+void Font_Background_select_Transparency(void)
+{
+    /*
+    Font Transparency
+    0 : Font with background color.
+    1 : Font with background transparency.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xCD);
+    temp = LCD_DataRead();
+    temp |= cSetb6;
+    LCD_DataWrite(temp);
+}
+void Font_Background_select_Color(void)
+{
+    /*
+    Font Transparency
+    0 : Font with background color.
+    1 : Font with background transparency.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xCD);
+    temp = LCD_DataRead();
+    temp &= cClrb6;
+    LCD_DataWrite(temp);
+}
+void Font_0_degree(void)
+{
+    /*
+    Font Rotation
+    0 : Normal
+    Text direction from left to right then from top to bottom
+    1 : Counterclockwise 90 degree & horizontal flip
+    Text direction from top to bottom then from left to right
+    (it should accommodate with set VDIR as 1)
+    This attribute can be changed only when previous font write
+    finished (core_busy = 0)
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xCD);
+    temp = LCD_DataRead();
+    temp &= cClrb4;
+    LCD_DataWrite(temp);
+}
+void Font_90_degree(void)
+{
+    /*
+    Font Rotation
+    0 : Normal
+    Text direction from left to right then from top to bottom
+    1 : Counterclockwise 90 degree & horizontal flip
+    Text direction from top to bottom then from left to right
+    (it should accommodate with set VDIR as 1)
+    This attribute can be changed only when previous font write
+    finished (core_busy = 0)
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xCD);
+    temp = LCD_DataRead();
+    temp |= cSetb4;
+    LCD_DataWrite(temp);
+}
+void Font_Width_X1(void)
+{
+    /*
+    Horizontal Font Enlargement
+    00b : X1.
+    01b : X2.
+    10b : X3.
+    11b : X4.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xCD);
+    temp = LCD_DataRead();
+    temp &= cClrb3;
+    temp &= cClrb2;
+    LCD_DataWrite(temp);
+}
+void Font_Width_X2(void)
+{
+    /*
+    Horizontal Font Enlargement
+    00b : X1.
+    01b : X2.
+    10b : X3.
+    11b : X4.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xCD);
+    temp = LCD_DataRead();
+    temp &= cClrb3;
+    temp |= cSetb2;
+    LCD_DataWrite(temp);
+}
+void Font_Width_X3(void)
+{
+    /*
+    Horizontal Font Enlargement
+    00b : X1.
+    01b : X2.
+    10b : X3.
+    11b : X4.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xCD);
+    temp = LCD_DataRead();
+    temp |= cSetb3;
+    temp &= cClrb2;
+    LCD_DataWrite(temp);
+}
+void Font_Width_X4(void)
+{
+    /*
+    Horizontal Font Enlargement
+    00b : X1.
+    01b : X2.
+    10b : X3.
+    11b : X4.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xCD);
+    temp = LCD_DataRead();
+    temp |= cSetb3;
+    temp |= cSetb2;
+    LCD_DataWrite(temp);
+}
+void Font_Height_X1(void)
+{
+    /*
+    Vertical Font Enlargement
+    00b : X1.
+    01b : X2.
+    10b : X3.
+    11b : X4.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xCD);
+    temp = LCD_DataRead();
+    temp &= cClrb1;
+    temp &= cClrb0;
+    LCD_DataWrite(temp);
+}
+void Font_Height_X2(void)
+{
+    /*
+    Vertical Font Enlargement
+    00b : X1.
+    01b : X2.
+    10b : X3.
+    11b : X4.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xCD);
+    temp = LCD_DataRead();
+    temp &= cClrb1;
+    temp |= cSetb0;
+    LCD_DataWrite(temp);
+}
+void Font_Height_X3(void)
+{
+    /*
+    Vertical Font Enlargement
+    00b : X1.
+    01b : X2.
+    10b : X3.
+    11b : X4.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xCD);
+    temp = LCD_DataRead();
+    temp |= cSetb1;
+    temp &= cClrb0;
+    LCD_DataWrite(temp);
+}
+void Font_Height_X4(void)
+{
+    /*
+    Vertical Font Enlargement
+    00b : X1.
+    01b : X2.
+    10b : X3.
+    11b : X4.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xCD);
+    temp = LCD_DataRead();
+    temp |= cSetb1;
+    temp |= cSetb0;
+    LCD_DataWrite(temp);
+}
+
+//[CEh]=========================================================================
+void GTFont_Select_GT21L16TW_GT21H16T1W(void)
+{
+    /*
+    GT Serial Font ROM Select
+    000b: GT21L16TW / GT21H16T1W
+    001b: GT23L16U2W
+    010b: GT23L24T3Y / GT23H24T3Y
+    011b: GT23L24M1Z
+    100b: GT23L32S4W / GT23H32S4W
+    101b: GT20L24F6Y
+    110b: GT21L24S1W
+    111b: GT22L16A1Y
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xCE);
+    temp = LCD_DataRead();
+    temp &= cClrb7;
+    temp &= cClrb6;
+    temp &= cClrb5;
+    LCD_DataWrite(temp);
+}
+void GTFont_Select_GT23L16U2W(void)
+{
+    /*
+    GT Serial Font ROM Select
+    000b: GT21L16TW / GT21H16T1W
+    001b: GT23L16U2W
+    010b: GT23L24T3Y / GT23H24T3Y
+    011b: GT23L24M1Z
+    100b: GT23L32S4W / GT23H32S4W
+    101b: GT20L24F6Y
+    110b: GT21L24S1W
+    111b: GT22L16A1Y
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xCE);
+    temp = LCD_DataRead();
+    temp &= cClrb7;
+    temp &= cClrb6;
+    temp |= cSetb5;
+    LCD_DataWrite(temp);
+}
+void GTFont_Select_GT23L24T3Y_GT23H24T3Y(void)
+{
+    /*
+    GT Serial Font ROM Select
+    000b: GT21L16TW / GT21H16T1W
+    001b: GT23L16U2W
+    010b: GT23L24T3Y / GT23H24T3Y
+    011b: GT23L24M1Z
+    100b: GT23L32S4W / GT23H32S4W
+    101b: GT20L24F6Y
+    110b: GT21L24S1W
+    111b: GT22L16A1Y
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xCE);
+    temp = LCD_DataRead();
+    temp &= cClrb7;
+    temp |= cSetb6;
+    temp &= cClrb5;
+    LCD_DataWrite(temp);
+}
+void GTFont_Select_GT23L24M1Z(void)
+{
+    /*
+    GT Serial Font ROM Select
+    000b: GT21L16TW / GT21H16T1W
+    001b: GT23L16U2W
+    010b: GT23L24T3Y / GT23H24T3Y
+    011b: GT23L24M1Z
+    100b: GT23L32S4W / GT23H32S4W
+    101b: GT20L24F6Y
+    110b: GT21L24S1W
+    111b: GT22L16A1Y
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xCE);
+    temp = LCD_DataRead();
+    temp &= cClrb7;
+    temp |= cSetb6;
+    temp |= cSetb5;
+    LCD_DataWrite(temp);
+}
+void GTFont_Select_GT23L32S4W_GT23H32S4W(void)
+{
+    /*
+    GT Serial Font ROM Select
+    000b: GT21L16TW / GT21H16T1W
+    001b: GT23L16U2W
+    010b: GT23L24T3Y / GT23H24T3Y
+    011b: GT23L24M1Z
+    100b: GT23L32S4W / GT23H32S4W
+    101b: GT20L24F6Y
+    110b: GT21L24S1W
+    111b: GT22L16A1Y
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xCE);
+    temp = LCD_DataRead();
+    temp |= cSetb7;
+    temp &= cClrb6;
+    temp &= cClrb5;
+    LCD_DataWrite(temp);
+}
+void GTFont_Select_GT20L24F6Y(void)
+{
+    /*
+    GT Serial Font ROM Select
+    000b: GT21L16TW / GT21H16T1W
+    001b: GT23L16U2W
+    010b: GT23L24T3Y / GT23H24T3Y
+    011b: GT23L24M1Z
+    100b: GT23L32S4W / GT23H32S4W
+    101b: GT20L24F6Y
+    110b: GT21L24S1W
+    111b: GT22L16A1Y
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xCE);
+    temp = LCD_DataRead();
+    temp |= cSetb7;
+    temp &= cClrb6;
+    temp |= cSetb5;
+    LCD_DataWrite(temp);
+}
+void GTFont_Select_GT21L24S1W(void)
+{
+    /*
+    GT Serial Font ROM Select
+    000b: GT21L16TW / GT21H16T1W
+    001b: GT23L16U2W
+    010b: GT23L24T3Y / GT23H24T3Y
+    011b: GT23L24M1Z
+    100b: GT23L32S4W / GT23H32S4W
+    101b: GT20L24F6Y
+    110b: GT21L24S1W
+    111b: GT22L16A1Y
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xCE);
+    temp = LCD_DataRead();
+    temp |= cSetb7;
+    temp |= cSetb6;
+    temp &= cClrb5;
+    LCD_DataWrite(temp);
+}
+void GTFont_Select_GT22L16A1Y(void)
+{
+    /*
+    GT Serial Font ROM Select
+    000b: GT21L16TW / GT21H16T1W
+    001b: GT23L16U2W
+    010b: GT23L24T3Y / GT23H24T3Y
+    011b: GT23L24M1Z
+    100b: GT23L32S4W / GT23H32S4W
+    101b: GT20L24F6Y
+    110b: GT21L24S1W
+    111b: GT22L16A1Y
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xCE);
+    temp = LCD_DataRead();
+    temp |= cSetb7;
+    temp |= cSetb6;
+    temp |= cSetb5;
+    LCD_DataWrite(temp);
+}
+
+//[CFh]=========================================================================
+void Set_GTFont_Decoder(unsigned char temp)
+{
+    /*
+    [bit7-3]
+    FONT ROM Coding Setting
+    For specific GT serial Font ROM, the coding method must be set for decoding.
+    00000b: GB2312
+    00001b: GB12345/GB18030
+    00010b: BIG5
+    00011b: UNICODE
+    00100b: ASCII
+    00101b: UNI-Japanese
+    00110b: JIS0208
+    00111b: Latin/Greek/ Cyrillic / Arabic/Thai/Hebrew
+    01000b: Korea
+    10001b: ISO-8859-1
+    10010b: ISO-8859-2
+    10011b: ISO-8859-3
+    10100b: ISO-8859-4
+    10101b: ISO-8859-5
+    10110b: ISO-8859-6
+    10111b: ISO-8859-7
+    11000b: ISO-8859-8
+    11001b: ISO-8859-9
+    11010b: ISO-8859-10
+    11011b: ISO-8859-11
+    11100b: ISO-8859-12
+    11101b: ISO-8859-13
+    11110b: ISO-8859-14
+    11111b: ISO-8859-15
+
+    [bit1-0]
+    ASCII / Latin/Greek/ Cyrillic / Arabic
+            (ASCII)        (Latin/Greek/Cyrillic)    (Arabic)
+    00b        Normal            Normal                     NA
+    01b        Arial         Variable Width             Presentation Forms-A
+    10b        Roman             NA                     Presentation Forms-B
+    11b        Bold            NA                         NA
+    */
+    LCD_CmdWrite(0xCF);
+    LCD_DataWrite(temp);
+}
+//[D0h]=========================================================================
+void Font_Line_Distance(unsigned char temp)
+{
+    /*[bit4-0]
+    Font Line Distance Setting
+    Setting the font character line distance when setting memory font
+    write cursor auto move. (Unit: pixel)
+    */
+    LCD_CmdWrite(0xD0);
+    LCD_DataWrite(temp);
+}
+//[D1h]=========================================================================
+void Set_Font_to_Font_Width(unsigned char temp)
+{
+    /*[bit5-0]
+    Font to Font Width Setting (Unit: pixel)
+    */
+    LCD_CmdWrite(0xD1);
+    LCD_DataWrite(temp);
+}
+//[D2h]~[D4h]=========================================================================
+void Foreground_RGB(unsigned char RED,unsigned char GREEN,unsigned char BLUE)
+{
+    /*
+    [D2h] Foreground Color - Red, for draw, text or color expansion
+    [D3h] Foreground Color - Green, for draw, text or color expansion
+    [D4h] Foreground Color - Blue, for draw, text or color expansion
+    */
+    LCD_CmdWrite(0xD2);
+    LCD_DataWrite(RED);
+    LCD_CmdWrite(0xD3);
+    LCD_DataWrite(GREEN);
+    LCD_CmdWrite(0xD4);
+    LCD_DataWrite(BLUE);
+}
+
+//Input data format:R3G3B2
+void Foreground_color_256(unsigned char temp)
+{
+    LCD_CmdWrite(0xD2);
+    LCD_DataWrite(temp);
+    LCD_CmdWrite(0xD3);
+    LCD_DataWrite(temp<<3);
+    LCD_CmdWrite(0xD4);
+    LCD_DataWrite(temp<<6);
+}
+
+//Input data format:R5G6B5
+void Foreground_color_65k(unsigned short temp)
+{
+    LCD_CmdWrite(0xD2);
+    LCD_DataWrite(temp>>8);
+    LCD_CmdWrite(0xD3);
+    LCD_DataWrite(temp>>3);
+    LCD_CmdWrite(0xD4);
+    LCD_DataWrite(temp<<3);
+}
+
+//Input data format:R8G8B8
+void Foreground_color_16M(unsigned long temp)
+{
+    LCD_CmdWrite(0xD2);
+    LCD_DataWrite(temp>>16);
+    LCD_CmdWrite(0xD3);
+    LCD_DataWrite(temp>>8);
+    LCD_CmdWrite(0xD4);
+    LCD_DataWrite(temp);
+}
+
+
+
+//[D5h]~[D7h]=========================================================================
+/*
+[D5h] Background Color - Red, for Text or color expansion
+[D6h] Background Color - Green, for Text or color expansion
+[D7h] Background Color - Blue, for Text or color expansion
+*/
+void Background_RGB(unsigned char RED,unsigned char GREEN,unsigned char BLUE)
+{
+    LCD_CmdWrite(0xD5);
+    LCD_DataWrite(RED);
+    LCD_CmdWrite(0xD6);
+    LCD_DataWrite(GREEN);
+    LCD_CmdWrite(0xD7);
+    LCD_DataWrite(BLUE);
+}
+
+//Input data format:R3G3B2
+void Background_color_256(unsigned char temp)
+{
+    LCD_CmdWrite(0xD5);
+    LCD_DataWrite(temp);
+    LCD_CmdWrite(0xD6);
+    LCD_DataWrite(temp<<3);
+    LCD_CmdWrite(0xD7);
+    LCD_DataWrite(temp<<6);
+}
+
+//Input data format:R5G6B6
+void Background_color_65k(unsigned short temp)
+{
+    LCD_CmdWrite(0xD5);
+    LCD_DataWrite(temp>>8);
+    LCD_CmdWrite(0xD6);
+    LCD_DataWrite(temp>>3);
+    LCD_CmdWrite(0xD7);
+    LCD_DataWrite(temp<<3);
+}
+
+//Input data format:R8G8B8
+void Background_color_16M(unsigned long temp)
+{
+    LCD_CmdWrite(0xD5);
+    LCD_DataWrite(temp>>16);
+    LCD_CmdWrite(0xD6);
+    LCD_DataWrite(temp>>8);
+    LCD_CmdWrite(0xD7);
+    LCD_DataWrite(temp);
+}
+
+//[DBh]~[DEh]=========================================================================
+void CGRAM_Start_address(unsigned long Addr)
+{
+    /*
+    CGRAM START ADDRESS [31:0]
+    */
+    LCD_CmdWrite(0xDB);
+    LCD_DataWrite(Addr);
+    LCD_CmdWrite(0xDC);
+    LCD_DataWrite(Addr>>8);
+    LCD_CmdWrite(0xDD);
+    LCD_DataWrite(Addr>>16);
+    LCD_CmdWrite(0xDE);
+    LCD_DataWrite(Addr>>24);
+}
+
+//[DFh]=========================================================================
+/*
+[bit7] Enter Power saving state
+0: Normal state.
+1: Enter power saving state.
+[bit1][bit0] Power saving Mode definition
+00: NA
+01: Standby Mode
+10: Suspend Mode
+11: Sleep Mode
+*/
+void Power_Normal_Mode(void)
+{
+    LCD_CmdWrite(0xDF);
+    LCD_DataWrite(0x00);
+}
+void Power_Saving_Standby_Mode(void)
+{
+    LCD_CmdWrite(0xDF);
+    LCD_DataWrite(0x01);
+    LCD_CmdWrite(0xDF);
+    LCD_DataWrite(0x81);
+}
+void Power_Saving_Suspend_Mode(void)
+{
+    LCD_CmdWrite(0xDF);
+//    LCD_DataWrite(0x02);
+//    LCD_CmdWrite(0xDF);
+    LCD_DataWrite(0x82);
+}
+void Power_Saving_Sleep_Mode(void)
+{
+    LCD_CmdWrite(0xDF);
+//    LCD_DataWrite(0x03);
+//    LCD_CmdWrite(0xDF);
+    LCD_DataWrite(0x83);
+}
+
+
+//[E5h]~[E6h]=========================================================================
+void LT768_I2CM_Clock_Prescale(unsigned short WX)
+{
+    /*
+    I2C Master Clock Pre-scale [7:0]
+    I2C Master Clock Pre-scale [15:8]
+    */
+    LCD_CmdWrite(0xE5);
+    LCD_DataWrite(WX);
+    LCD_CmdWrite(0xE6);
+    LCD_DataWrite(WX>>8);
+}
+//[E7h]=========================================================================
+void LT768_I2CM_Transmit_Data(unsigned char temp)
+{
+    /*
+    I2C Master Transmit[7:0]
+    */
+    LCD_CmdWrite(0xE7);
+    LCD_DataWrite(temp);
+}
+//[E8h]=========================================================================
+unsigned char LT768_I2CM_Receiver_Data(void)
+{
+    /*
+    I2C Master Receiver [7:0]
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xE8);
+    temp=LCD_DataRead();
+    return temp;
+}
+//[E9h]=========================================================================
+/*
+[bit7] START
+Generate (repeated) start condition and be cleared by hardware automatically
+Note : This bit is always read as 0.
+[bit6] STOP
+Generate stop condition and be cleared by hardware automatically
+Note : This bit is always read as 0.
+[bit5]
+READ(READ and WRITE canˇt be used simultaneously)
+Read form slave and be cleared by hardware automatically
+Note : This bit is always read as 0.
+[bit4]
+WRITE(READ and WRITE canˇt be used simultaneously)
+Write to slave and be cleared by hardware automatically
+Note : This bit is always read as 0.
+[bit3] ACKNOWLEDGE
+When as a I2C master receiver
+0 : Sent ACK.
+1 : Sent NACK.
+Note : This bit is always read as 0.
+[bit0] Noise Filter
+0 : Enable.
+1 : Disable.
+*/
+
+#define Disable_I2CM_Noise_Filter
+
+void LT768_I2CM_Stop(void)
+{
+    LCD_CmdWrite(0xE9);
+#ifdef Disable_I2CM_Noise_Filter
+    LCD_DataWrite(0x40);
+#endif
+#ifdef Enable_I2CM_Noise_Filter
+    LCD_DataWrite(0x41);
+#endif
+}
+void LT768_I2CM_Read_With_Ack(void)
+{
+    LCD_CmdWrite(0xE9);
+#ifdef Disable_I2CM_Noise_Filter
+    LCD_DataWrite(0x20);
+#endif
+#ifdef Enable_I2CM_Noise_Filter
+    LCD_DataWrite(0x21);
+#endif
+}
+
+void LT768_I2CM_Read_With_Nack(void)
+{
+    LCD_CmdWrite(0xE9);
+#ifdef Disable_I2CM_Noise_Filter
+    LCD_DataWrite(0x68);
+#endif
+#ifdef Enable_I2CM_Noise_Filter
+    LCD_DataWrite(0x69);
+#endif
+}
+
+void LT768_I2CM_Write_With_Start(void)
+{
+    LCD_CmdWrite(0xE9);
+#ifdef Disable_I2CM_Noise_Filter
+    LCD_DataWrite(0x90);
+#endif
+#ifdef Enable_I2CM_Noise_Filter
+    LCD_DataWrite(0x91);
+#endif
+}
+
+void LT768_I2CM_Write(void)
+{
+    LCD_CmdWrite(0xE9);
+#ifdef Disable_I2CM_Noise_Filter
+    LCD_DataWrite(0x10);
+#endif
+#ifdef Enable_I2CM_Noise_Filter
+    LCD_DataWrite(0x11);
+#endif
+}
+
+
+
+//[EAh]=========================================================================
+/*
+ 0=Ack
+ 1=Nack
+*/
+unsigned char LT768_I2CM_Check_Slave_ACK(void)
+{
+    unsigned char temp;
+    /*[bit7]
+    Received acknowledge from slave
+    0 : Acknowledge received.
+    1 : No Acknowledge received.
+    */
+    LCD_CmdWrite(0xEA);
+    temp=LCD_DataRead();
+
+    if((temp&0x80)==0x80)
+    {
+        return 1;
+    }
+    else
+    {
+        return 0;
+    }
+}
+
+
+/*
+ 0=Idle
+ 1=Busy
+*/
+unsigned char LT768_I2CM_Bus_Busy(void)
+{
+    unsigned char temp;
+    /*[bit6]
+    I2C Bus is Busy
+    0 : Idle.
+    1 : Busy.
+    */
+    LCD_CmdWrite(0xEA);
+    temp=LCD_DataRead();
+
+    if((temp&0x40)==0x40)
+    {
+        return 1;
+    }
+    else
+    {
+        return 0;
+    }
+}
+
+/*
+ 0=Complete
+ 1=Transferring
+*/
+unsigned char LT768_I2CM_transmit_Progress(void)
+{
+    unsigned char temp;
+    /*[bit6]
+     0=Complete
+     1=Transferring
+    */
+    LCD_CmdWrite(0xEA);
+    temp=LCD_DataRead();
+
+    if((temp&0x02)==0x02)
+    {
+        return 1;
+    }
+    else
+    {
+        return 0;
+    }
+}
+
+/*
+0= Arbitration win
+1= Arbitration lost
+*/
+unsigned char LT768_I2CM_Arbitration(void)
+{
+    unsigned char temp;
+    /*[bit6]
+    I2C Bus is Busy
+    0 : Idle.
+    1 : Busy.
+    */
+    LCD_CmdWrite(0xEA);
+    temp=LCD_DataRead();
+    temp&=0x01;
+    return temp;
+}
+
+
+//[F0h]=========================================================================
+void Set_GPIO_A_In_Out(unsigned char temp)
+{
+    /*
+    GPO-A_dir[7:0] : General Purpose I/O direction control.
+    0: Output
+    1: Input
+    */
+    LCD_CmdWrite(0xF0);
+    LCD_DataWrite(temp);
+}
+//[F1h]=========================================================================
+void Write_GPIO_A_7_0(unsigned char temp)
+{
+    /*
+    GPI-A[7:0] : General Purpose Input, share with DB[15:8]
+    GPO-A[7:0] : General Purpose Output, share with DB[15:8]
+    */
+    LCD_CmdWrite(0xF1);
+    LCD_DataWrite(temp);
+}
+unsigned char Read_GPIO_A_7_0(void)
+{
+    /*
+    GPI-A[7:0] : General Purpose Input, share with DB[15:8]
+    GPO-A[7:0] : General Purpose Output, share with DB[15:8]
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xF1);
+    temp=LCD_DataRead();
+    return temp;
+}
+//[F2h]=========================================================================
+void Write_GPIO_B_7_4(unsigned char temp)
+{
+    /*
+    GPI-B[7:0] : General Purpose Input ; share with {XKIN[3:0], XA0, XnWR, XnRD, XnCS}
+    GPO-B[7:4] : General Purpose Output ; share with XKOUT[3:0] ;
+    */
+    LCD_CmdWrite(0xF2);
+    LCD_DataWrite(temp);
+}
+unsigned char Read_GPIO_B_7_0(void)
+{
+    /*
+    GPI-B[7:0] : General Purpose Input ; share with {XKIN[3:0], XA0, XnWR, XnRD, XnCS}
+    GPO-B[7:4] : General Purpose Output ; share with XKOUT[3:0] ;
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xF2);
+    temp=LCD_DataRead();
+    return temp;
+}
+
+//[F3h]=========================================================================
+void Set_GPIO_C_In_Out(unsigned char temp)
+{
+    /*
+    GPIO-C_dir[7:0] : General Purpose I/O direction control.
+    0: Output
+    1: Input
+    */
+    LCD_CmdWrite(0xF3);
+    LCD_DataWrite(temp);
+}
+//[F4h]=========================================================================
+void Write_GPIO_C_7_0(unsigned char temp)
+{
+    /*
+    GPIO-C[7:0] : General Purpose Input / Output
+    share with {XPWM0, XI2CSDA, XI2CSCL, XnSFCS1, XnSFCS0,XMISO, XMOSI, XSCLK}
+    */
+    LCD_CmdWrite(0xF4);
+    LCD_DataWrite(temp);
+}
+unsigned char Read_GPIO_C_7_0(void)
+{
+    /*
+    GPIO-C[7:0] : General Purpose Input / Output
+    share with {XPWM0, XI2CSDA, XI2CSCL, XnSFCS1, XnSFCS0,XMISO, XMOSI, XSCLK}
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xF4);
+    temp=LCD_DataRead();
+    return temp;
+}
+//[F5h]=========================================================================
+void Set_GPIO_D_In_Out(unsigned char temp)
+{
+    /*
+    GPIO-D_dir[7:0] : General Purpose I/O direction control.
+    0: Output
+    1: Input
+    */
+    LCD_CmdWrite(0xF5);
+    LCD_DataWrite(temp);
+}
+//[F6h]=========================================================================
+void Write_GPIO_D_7_0(unsigned char temp)
+{
+    /*
+    GPIO-D[7:0] : General Purpose Input/Output
+    */
+    LCD_CmdWrite(0xF6);
+    LCD_DataWrite(temp);
+}
+unsigned char Read_GPIO_D_7_0(void)
+{
+    /*
+    GPIO-D[7:0] : General Purpose Input/Output
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xF6);
+    temp=LCD_DataRead();
+    return temp;
+}
+//[F7h]=========================================================================
+void Set_GPIO_E_In_Out(unsigned char temp)
+{
+    /*
+    GPIO-E_dir[7:0] : General Purpose I/O direction control.
+    0: Output
+    1: Input
+    */
+    LCD_CmdWrite(0xF7);
+    LCD_DataWrite(temp);
+}
+//[F8h]=========================================================================
+void Write_GPIO_E_7_0(unsigned char temp)
+{
+    /*
+    GPIO-E[7:0] : General Purpose Input/Output.
+    share with {PDAT[23:19], PDAT[15:13]}
+    */
+    LCD_CmdWrite(0xF8);
+    LCD_DataWrite(temp);
+}
+unsigned char Read_GPIO_E_7_0(void)
+{
+    /*
+    GPIO-E[7:0] : General Purpose Input/Output.
+    share with {PDAT[23:19], PDAT[15:13]}
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xF8);
+    temp=LCD_DataRead();
+    return temp;
+}
+//[F9h]=========================================================================
+void Set_GPIO_F_In_Out(unsigned char temp)
+{
+    /*
+    GPIO-F_dir[7:0] : General Purpose I/O direction control.
+    0: Output
+    1: Input
+    */
+    LCD_CmdWrite(0xF9);
+    LCD_DataWrite(temp);
+}
+//[FAh]=========================================================================
+void Write_GPIO_F_7_0(unsigned char temp)
+{
+    /*
+    GPIO-F[7:0] : General Purpose Input/Output.
+    share with {XPDAT[12:10], XPDAT[7:3]}
+    */
+    LCD_CmdWrite(0xFA);
+    LCD_DataWrite(temp);
+}
+unsigned char Read_GPIO_F_7_0(void)
+{
+    /*
+    GPIO-F[7:0] : General Purpose Input/Output.
+    share with {XPDAT[12:10], XPDAT[7:3]}
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xFA);
+    temp=LCD_DataRead();
+    return temp;
+}
+
+//[FBh]=========================================================================
+
+
+void Long_Key_enable(void)
+{
+    /*
+    Key-Scan Control Register 1
+    [bit6]        LongKey Enable Bit
+    1 : Enable. Long key period is set by KSCR2 bit4-2.
+    0 : Disable.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xFB);
+    temp=LCD_DataRead();
+    temp |= cSetb6;
+    LCD_DataWrite(temp);
+}
+
+
+void Key_Scan_Freg(unsigned char setx)
+{
+    /*KF2-0: Key-Scan Frequency */
+    unsigned char temp;
+    LCD_CmdWrite(0xFB);
+    temp = LCD_DataRead();
+    temp &= 0xf0;
+    temp|= (setx&0x07);
+    LCD_DataWrite(temp);
+}
+
+
+//[FCh]=========================================================================
+
+void Key_Scan_Wakeup_Function_Enable(void)
+{
+    /*
+    Key-Scan Controller Register 2
+    [bit7]
+    Key-Scan Wakeup Function Enable Bit
+    0: Key-Scan Wakeup function is disabled.
+    1: Key-Scan Wakeup function is enabled.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xFC);
+    temp=LCD_DataRead();
+    temp |= cSetb7;
+    LCD_DataWrite(temp);
+}
+
+
+void Long_Key_Timing_Adjustment(unsigned char setx)
+{
+    /*Long Key Timing Adjustment*/
+    unsigned char temp,temp1;
+    temp = setx & 0x1c;
+    LCD_CmdWrite(0xFC);
+    temp1 = LCD_DataRead();
+    temp1|=temp;
+    LCD_DataWrite(temp1);
+}
+
+unsigned char Numbers_of_Key_Hit(void)
+{
+    unsigned char temp;
+    LCD_CmdWrite(0xFC);
+    temp = LCD_DataRead();   //read key touch number
+    temp = temp & 0x03;     //
+    return temp;
+}
+
+//[FDh][FEh][FFh]=========================================================================
+unsigned char Read_Key_Strobe_Data_0(void)
+{
+    /*
+    Key Strobe Data 0
+    The corresponding key code 0 that is pressed.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xFD);
+    temp=LCD_DataRead();
+    return temp;
+}
+unsigned char Read_Key_Strobe_Data_1(void)
+{
+    /*
+    Key Strobe Data 1
+    The corresponding key code 1 that is pressed.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xFE);
+    temp=LCD_DataRead();
+    return temp;
+}
+unsigned char Read_Key_Strobe_Data_2(void)
+{
+    /*
+    Key Strobe Data 2
+    The corresponding key code 2 that is pressed.
+    */
+    unsigned char temp;
+    LCD_CmdWrite(0xFF);
+    temp=LCD_DataRead();
+    return temp;
+}
+
+void Show_String(char *str)
+{
+    Text_Mode();       //文本模式
+    LCD_CmdWrite(0x04);
+
+    while(*str != '\0')
+    {
+        LCD_DataWrite(*str);
+        Check_Mem_WR_FIFO_not_Full();
+        ++str;
+    }
+
+    Check_2D_Busy();
+    Graphic_Mode(); //back to graphic mode;图形模式
+}
+
+
+void Show_picture(unsigned long numbers,const unsigned short *datap)
+{
+    unsigned long i;
+    LCD_CmdWrite(0x04);
+
+    for(i=0; i<numbers; i++)
+    {
+        LCD_DataWrite(datap[i]);
+        Check_Mem_WR_FIFO_not_Full();
+    }
+}
+
+/*0Bh bit1*/
+void PWM0_ON(void)
+{
+    //Graphic_cursor_initial(); //initaial and enable graphic cursor
+    Set_PWM_Prescaler_1_to_256(200); //Time base is "Core_Freq / (Prescaler + 1)";
+    //Select_PWM0_Clock_Divided_By_1();
+    //Select_PWM0_Clock_Divided_By_2();
+    //Select_PWM0_Clock_Divided_By_4();
+    Select_PWM0_Clock_Divided_By_8();
+    //Select_PWM0_is_GPIO_C7();
+    //Select_PWM0_is_Core_Clock();
+    Select_PWM0();
+    //Select_PWM1();  //enable dead zone function needs set
+    //Set_Timer0_Dead_Zone_Length(50);
+    //Enable_PWM0_Dead_Zone();
+    //Disable_PWM0_Dead_Zone();
+    //Enable_PWM0_Inverter();
+    //Disable_PWM0_Inverter();
+    //Auto_Reload_PWM0(); //一般PWM输出设定,后续改为default 20120504
+    //One_Shot_PWM0();  //Buzzerノ砞﹚
+    Set_Timer0_Count_Buffer(256);  //设定阶数
+    Set_Timer0_Compare_Buffer(230);    //DUTY
+    Start_PWM0();
+    //delay_seconds(3);
+    //Stop_PWM0();
+    /*
+    Set_Timer0_Count_Buffer(65535);
+    while(1)
+    {
+    for(i=0;i<65536;i++)
+    {
+    //delay_seconds(1);
+    Set_Timer0_Compare_Buffer(i);
+    delay_ms(1);
+    }
+    } */
+}
+
+void Enable_SPI_Flash_DMA(unsigned char val)
+{
+    if(val == 0)
+    {
+        Select_SFI_0();
+    }
+    else
+    {
+        Select_SFI_1();
+    }
+
+    Select_SFI_DMA_Mode();      // 选择DMA模式
+    Select_SFI_24bit_Address(); // 选择24位地址
+    // 根据外挂不同的FLASH选用不通的通讯方式
+    //Select_SFI_Waveform_Mode_0();
+    Select_SFI_Waveform_Mode_3();
+    //Select_SFI_0_DummyRead();    //normal read mode
+    Select_SFI_8_DummyRead(); //1byte dummy cycle
+    //Select_SFI_16_DummyRead();
+    //Select_SFI_24_DummyRead();
+    Select_SFI_Single_Mode();
+    //Select_SFI_Dual_Mode0();
+    //Select_SFI_Dual_Mode1();
+    Enable_SFlash_SPI();    // 使能
+}
+
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/lcd/lt768_lib.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/lcd/lt768_lib.c
new file mode 100755
index 000000000..7c574bf4a
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/lcd/lt768_lib.c
@@ -0,0 +1,3767 @@
+/********************* COPYRIGHT  **********************
+* File Name        : LT768_Lib.c
+* Author           : Levetop Electronics
+* Version          : V1.3
+* Date             : 2019-5-14
+* Description      : LT768x所有功能函数
+********************************************************/
+
+#include "nuttx/arch.h"
+#include "nuttx/lcd/k210_lcd.h"
+#include "nuttx/lcd/lt768_lib.h"
+
+uint8_t lt768_cclk;    // LT768的内核时钟频率
+uint8_t lt768_mclk;    // SDRAM的时钟频率
+uint8_t lt768_sclk;    // LCD的扫描时钟频率
+
+/*----------------------------------------------------------------------------*/
+
+// lt768 reset
+void lt768_hw_reset(void)
+{
+    lcd_set_pin(FPIOA_LCD_NRST, GPIO_PV_LOW);
+    up_mdelay(200);
+    lcd_set_pin(FPIOA_LCD_NRST, GPIO_PV_HIGH);
+}
+
+// check lt768 reset status
+void lt768_sys_check(void)
+{
+    uint8_t val = 0;
+
+    while(1)
+    {
+        if((LCD_StatusRead() & 0x02) == 0x00)
+        {
+            up_mdelay(1);                  //若MCU 速度太快，必要時使用
+            LCD_CmdWrite(0x01);
+            up_mdelay(1);                  //若MCU 速度太快，必要時使用
+            val = LCD_DataRead();
+            syslog(LOG_NOTICE, "LCD mdelay 1 [%x]\r\n", val);
+
+            if((val & 0x80) == 0x80)       //检测CCR寄存器PLL是否准备好
+            {
+                break;
+            }
+            else
+            {
+                syslog(LOG_NOTICE, "LCD mdelay 2 [%x]\r\n", val);
+                up_mdelay(2); //若MCU 速度太快，必要時使用
+                LCD_CmdWrite(0x01);
+                up_mdelay(1); //若MCU 速度太快，必要時使用
+                LCD_DataWrite(0x80);
+            }
+        }
+    }
+}
+
+void lt768_pll_init(void)
+{
+    uint32_t temp = 0;
+    uint32_t temp1;
+    uint16_t lpllOD_sclk, lpllOD_cclk, lpllOD_mclk;
+    uint16_t lpllR_sclk, lpllR_cclk, lpllR_mclk;
+    uint16_t lpllN_sclk, lpllN_cclk, lpllN_mclk;
+    temp = (LCD_HBPD + LCD_HFPD + LCD_HSPW + LCD_XSIZE_TFT) * (LCD_VBPD + LCD_VFPD + LCD_VSPW+LCD_YSIZE_TFT) * 60;
+    temp1 = (temp%1000000)/100000;
+
+    if(temp1>5)
+    {
+        temp = temp / 1000000 + 1;
+    }
+    else
+    {
+        temp = temp / 1000000;
+    }
+
+    lt768_sclk = temp;
+    temp = temp * 3;
+    lt768_mclk = temp;
+    lt768_cclk = temp;
+
+    if(lt768_cclk > 100)
+    {
+        lt768_cclk = 100;
+    }
+
+    if(lt768_mclk > 100)
+    {
+        lt768_mclk = 100;
+    }
+
+    if(lt768_sclk > 65)
+    {
+        lt768_sclk = 65;
+    }
+
+#if XI_4M
+    lpllOD_sclk = 3;
+    lpllOD_cclk = 2;
+    lpllOD_mclk = 2;
+    lpllR_sclk  = 2;
+    lpllR_cclk  = 2;
+    lpllR_mclk  = 2;
+    lpllN_mclk  = lt768_mclk;
+    lpllN_cclk  = lt768_cclk;
+    lpllN_sclk  = 2*lt768_sclk;
+#endif
+#if XI_8M
+    lpllOD_sclk = 3;
+    lpllOD_cclk = 2;
+    lpllOD_mclk = 2;
+    lpllR_sclk  = 2;
+    lpllR_cclk  = 4;
+    lpllR_mclk  = 4;
+    lpllN_mclk  = lt768_mclk;
+    lpllN_cclk  = lt768_cclk;
+    lpllN_sclk  = lt768_sclk;
+#endif
+#if XI_10M
+    lpllOD_sclk = 3;
+    lpllOD_cclk = 2;
+    lpllOD_mclk = 2;
+    lpllR_sclk  = 5;
+    lpllR_cclk  = 5;
+    lpllR_mclk  = 5;
+    lpllN_mclk  = lt768_mclk;
+    lpllN_cclk  = lt768_cclk;
+    lpllN_sclk  = 2*lt768_sclk;
+#endif
+#if XI_12M
+    lpllOD_sclk = 3;
+    lpllOD_cclk = 2;
+    lpllOD_mclk = 2;
+    lpllR_sclk  = 3;
+    lpllR_cclk  = 6;
+    lpllR_mclk  = 6;
+    lpllN_mclk  = lt768_mclk;
+    lpllN_cclk  = lt768_cclk;
+    lpllN_sclk  = lt768_sclk;
+#endif
+    LCD_CmdWrite(0x05);
+    LCD_DataWrite((lpllOD_sclk<<6) | (lpllR_sclk<<1) | ((lpllN_sclk>>8)&0x1));
+    LCD_CmdWrite(0x07);
+    LCD_DataWrite((lpllOD_mclk<<6) | (lpllR_mclk<<1) | ((lpllN_mclk>>8)&0x1));
+    LCD_CmdWrite(0x09);
+    LCD_DataWrite((lpllOD_cclk<<6) | (lpllR_cclk<<1) | ((lpllN_cclk>>8)&0x1));
+    LCD_CmdWrite(0x06);
+    LCD_DataWrite(lpllN_sclk);
+    LCD_CmdWrite(0x08);
+    LCD_DataWrite(lpllN_mclk);
+    LCD_CmdWrite(0x0a);
+    LCD_DataWrite(lpllN_cclk);
+    LCD_CmdWrite(0x00);
+    up_udelay(1);
+    LCD_DataWrite(0x80);
+    up_mdelay(1);
+}
+
+void lt768_sdram_init(uint8_t mclk)
+{
+    uint16_t sdram_itv;
+    LCD_RegisterWrite(0xe0,0x29);
+    LCD_RegisterWrite(0xe1,0x03);  //CAS:2=0x02?CAS:3=0x03
+    sdram_itv = (64000000 / 8192) / (1000 / mclk) ;
+    sdram_itv-=2;
+    LCD_RegisterWrite(0xe2,sdram_itv);
+    LCD_RegisterWrite(0xe3,sdram_itv >>8);
+    LCD_RegisterWrite(0xe4,0x01);
+//  Check_SDRAM_Ready();
+    up_mdelay(1);
+}
+
+void lt768_set_panel(void)
+{
+    //**[01h]**//
+    TFT_16bit();
+    //TFT_18bit();
+    //TFT_24bit();
+#if STM32_FSMC_8
+    Host_Bus_8bit();   //主机总线8bit
+#else
+    Host_Bus_16bit();  //主机总线16bit
+#endif
+    //**[02h]**//
+    RGB_16b_16bpp();
+    //RGB_16b_24bpp_mode1();
+    MemWrite_Left_Right_Top_Down();
+    //MemWrite_Down_Top_Left_Right();
+    //**[03h]**//
+    Graphic_Mode();
+    Memory_Select_SDRAM();
+//  PCLK_Falling();           //REG[12h]:下降沿
+    PCLK_Rising();
+    VSCAN_T_to_B();          //REG[12h]:从上到下
+    //VSCAN_B_to_T();        //从下到上
+    PDATA_Set_RGB();        //REG[12h]:Select RGB output
+    //PDATA_Set_RBG();
+    //PDATA_Set_GRB();
+    //PDATA_Set_GBR();
+    //PDATA_Set_BRG();
+    //PDATA_Set_BGR();
+    HSYNC_Low_Active();     //REG[13h]:
+    //HSYNC_High_Active();
+    VSYNC_Low_Active();     //REG[13h]:
+    //VSYNC_High_Active();
+    DE_High_Active();       //REG[13h]:
+    //DE_Low_Active();
+    LCD_HorizontalWidth_VerticalHeight(LCD_XSIZE_TFT,LCD_YSIZE_TFT);
+    LCD_Horizontal_Non_Display(LCD_HBPD);
+    LCD_HSYNC_Start_Position(LCD_HFPD);
+    LCD_HSYNC_Pulse_Width(LCD_HSPW);
+    LCD_Vertical_Non_Display(LCD_VBPD);
+    LCD_VSYNC_Start_Position(LCD_VFPD);
+    LCD_VSYNC_Pulse_Width(LCD_VSPW);
+    Memory_XY_Mode();  //Block mode (X-Y coordination addressing);块模式
+    Memory_16bpp_Mode();
+}
+
+void lt768_init(void)
+{
+    lt768_hw_reset();
+    //delay for LT768 power on
+    up_mdelay(100);
+
+    // check reset ok?
+    lt768_sys_check();
+
+    //Initial_Display_test and set SW2 pin2 = 1
+    while(LCD_StatusRead() & 0x02);
+
+    lt768_pll_init();
+    lt768_sdram_init(lt768_mclk);
+    lt768_set_panel();
+}
+
+/*----------------------------------------------------------------------------*/
+
+void MPU8_8bpp_Memory_Write
+(
+    uint16_t x           // x坐标
+    ,uint16_t y           // y坐标
+    ,uint16_t w           // 宽度
+    ,uint16_t h           // 高度
+    ,const uint8_t *data  // 数据首地址
+)
+{
+    uint16_t i,j;
+    Graphic_Mode();
+    Active_Window_XY(x,y);
+    Active_Window_WH(w,h);
+    Goto_Pixel_XY(x,y);
+    LCD_CmdWrite(0x04);
+
+    for(i=0; i< h; i++)
+    {
+        for(j=0; j< w; j++)
+        {
+            Check_Mem_WR_FIFO_not_Full();
+            LCD_DataWrite(*data);
+            data++;
+        }
+    }
+
+    Check_Mem_WR_FIFO_Empty();
+}
+
+
+void MPU8_16bpp_Memory_Write
+(
+    uint16_t x           // x坐标
+    ,uint16_t y           // y坐标
+    ,uint16_t w           // 宽度
+    ,uint16_t h           // 高度
+    ,const uint8_t *data  // 数据首地址
+)
+{
+    uint16_t i,j;
+    Graphic_Mode();
+    Active_Window_XY(x,y);
+    Active_Window_WH(w,h);
+    Goto_Pixel_XY(x,y);
+    LCD_CmdWrite(0x04);
+
+    for(i=0; i< h; i++)
+    {
+        for(j=0; j< w; j++)
+        {
+            Check_Mem_WR_FIFO_not_Full();
+            LCD_DataWrite(*data);
+            data++;
+            Check_Mem_WR_FIFO_not_Full();
+            LCD_DataWrite(*data);
+            data++;
+        }
+    }
+
+    Check_Mem_WR_FIFO_Empty();
+}
+
+
+void MPU8_24bpp_Memory_Write
+(
+    uint16_t x           // x坐标
+    ,uint16_t y           // y坐标
+    ,uint16_t w           // 宽度
+    ,uint16_t h           // 高度
+    ,const uint8_t *data  // 数据首地址
+)
+{
+    uint16_t i,j;
+    Graphic_Mode();
+    Active_Window_XY(x,y);
+    Active_Window_WH(w,h);
+    Goto_Pixel_XY(x,y);
+    LCD_CmdWrite(0x04);
+
+    for(i=0; i< h; i++)
+    {
+        for(j=0; j< w; j++)
+        {
+            Check_Mem_WR_FIFO_not_Full();
+            LCD_DataWrite(*data);
+            data++;
+            Check_Mem_WR_FIFO_not_Full();
+            LCD_DataWrite(*data);
+            data++;
+            Check_Mem_WR_FIFO_not_Full();
+            LCD_DataWrite(*data);
+            data++;
+        }
+    }
+
+    Check_Mem_WR_FIFO_Empty();
+}
+
+
+
+void MPuint16_t_16bpp_Memory_Write
+(
+    uint16_t x            // x坐标
+    ,uint16_t y            // y坐标
+    ,uint16_t w            // 宽度
+    ,uint16_t h            // 高度
+    ,const uint16_t *data  // 数据首地址
+)
+{
+    uint16_t i,j;
+    Graphic_Mode();
+    Active_Window_XY(x,y);
+    Active_Window_WH(w,h);
+    Goto_Pixel_XY(x,y);
+    LCD_CmdWrite(0x04);
+
+    for(i=0; i< h; i++)
+    {
+        for(j=0; j< w; j++)
+        {
+            Check_Mem_WR_FIFO_not_Full();
+            LCD_DataWrite_Pixel(*data);
+            data++;
+        }
+    }
+
+    Check_Mem_WR_FIFO_Empty();
+}
+
+void MPuint16_t_24bpp_Mode1_Memory_Write
+(
+    uint16_t x            // x坐标
+    ,uint16_t y            // y坐标
+    ,uint16_t w            // 宽度
+    ,uint16_t h            // 高度
+    ,const uint16_t *data  // 数据首地址
+)
+{
+    uint16_t i,j;
+    Graphic_Mode();
+    Active_Window_XY(x,y);
+    Active_Window_WH(w,h);
+    Goto_Pixel_XY(x,y);
+    LCD_CmdWrite(0x04);
+
+    for(i=0; i< h; i++)
+    {
+        for(j=0; j< w/2; j++)
+        {
+            LCD_DataWrite_Pixel(*data);
+            Check_Mem_WR_FIFO_not_Full();
+            data++;
+            LCD_DataWrite_Pixel(*data);
+            Check_Mem_WR_FIFO_not_Full();
+            data++;
+            LCD_DataWrite_Pixel(*data);
+            Check_Mem_WR_FIFO_not_Full();
+            data++;
+        }
+    }
+
+    Check_Mem_WR_FIFO_Empty();
+}
+
+
+void MPuint16_t_24bpp_Mode2_Memory_Write
+(
+    uint16_t x            // x坐标
+    ,uint16_t y            // y坐标
+    ,uint16_t w            // 宽度
+    ,uint16_t h            // 高度
+    ,const uint16_t *data  // 数据首地址
+)
+{
+    uint16_t i,j;
+    Graphic_Mode();
+    Active_Window_XY(x,y);
+    Active_Window_WH(w,h);
+    Goto_Pixel_XY(x,y);
+    LCD_CmdWrite(0x04);
+
+    for(i=0; i< h; i++)
+    {
+        for(j=0; j< w; j++)
+        {
+            Check_Mem_WR_FIFO_not_Full();
+            LCD_DataWrite_Pixel(*data);
+            data++;
+            Check_Mem_WR_FIFO_not_Full();
+            LCD_DataWrite_Pixel(*data);
+            data++;
+        }
+    }
+
+    Check_Mem_WR_FIFO_Empty();
+}
+/*----------------------------------------------------------------------------*/
+
+//------------------------------------- 线段 -----------------------------------------
+void LT768_DrawLine
+(
+    uint16_t X1        // X1坐标
+    ,uint16_t Y1        // Y1坐标
+    ,uint16_t X2        // X2坐标
+    ,uint16_t Y2        // Y2坐标
+    ,unsigned long  LineColor // 线段颜色
+)
+{
+    Foreground_color_65k(LineColor);
+    Line_Start_XY(X1,Y1);
+    Line_End_XY(X2,Y2);
+    Start_Line();
+    Check_2D_Busy();
+}
+
+void LT768_DrawLine_Width
+(
+    uint16_t X1        // X1坐标
+    ,uint16_t Y1        // Y1坐标
+    ,uint16_t X2        // X2坐标
+    ,uint16_t Y2        // Y2坐标
+    ,unsigned long  LineColor // 线段颜色
+    ,uint16_t Width     // 线段宽度
+)
+{
+    uint16_t  i = 0;
+    signed  short x = 0, y = 0;
+    double temp = 0;
+    x = X2 - X1;
+    y = Y2 - Y1;
+
+    if(x == 0)
+    {
+        temp = 2;
+    }
+    else
+    {
+        temp = -((double)y/(double)x);
+    }
+
+    if(temp>=-1&&temp<=1)
+    {
+        while(Width--)
+        {
+            LT768_DrawLine(X1,Y1+i,X2,Y2+i,LineColor);
+            i++;
+        }
+    }
+    else
+    {
+        while(Width--)
+        {
+            LT768_DrawLine(X1+i,Y1,X2+i,Y2,LineColor);
+            i++;
+        }
+    }
+}
+
+//------------------------------------- 圆 -----------------------------------------
+void LT768_DrawCircle
+(
+    uint16_t XCenter           // 圆心X位置
+    ,uint16_t YCenter           // 圆心Y位置
+    ,uint16_t R                 // 半径
+    ,unsigned long CircleColor        // 画线颜色
+)
+{
+    Foreground_color_65k(CircleColor);
+    Circle_Center_XY(XCenter,YCenter);
+    Circle_Radius_R(R);
+    Start_Circle_or_Ellipse();
+    Check_2D_Busy();
+}
+
+void LT768_DrawCircle_Fill
+(
+    uint16_t XCenter           // 圆心X位置
+    ,uint16_t YCenter           // 圆心Y位置
+    ,uint16_t R                 // 半径
+    ,unsigned long ForegroundColor    // 背景颜色
+)
+{
+    Foreground_color_65k(ForegroundColor);
+    Circle_Center_XY(XCenter,YCenter);
+    Circle_Radius_R(R);
+    Start_Circle_or_Ellipse_Fill();
+    Check_2D_Busy();
+}
+
+void LT768_DrawCircle_Width
+(
+    uint16_t XCenter          // 圆心X位置
+    ,uint16_t YCenter          // 圆心Y位置
+    ,uint16_t R                // 半径
+    ,unsigned long CircleColor       // 画线颜色
+    ,unsigned long ForegroundColor   // 背景颜色
+    ,uint16_t Width            // 线宽
+)
+{
+    LT768_DrawCircle_Fill(XCenter,YCenter,R+Width,CircleColor);
+    LT768_DrawCircle_Fill(XCenter,YCenter,R,ForegroundColor);
+}
+
+//------------------------------------- 椭圆 -----------------------------------------
+void LT768_DrawEllipse
+(
+    uint16_t XCenter          // 椭圆心X位置
+    ,uint16_t YCenter          // 椭圆心Y位置
+    ,uint16_t X_R              // 宽半径
+    ,uint16_t Y_R              // 长半径
+    ,unsigned long EllipseColor      // 画线颜色
+)
+{
+    Foreground_color_65k(EllipseColor);
+    Ellipse_Center_XY(XCenter,YCenter);
+    Ellipse_Radius_RxRy(X_R,Y_R);
+    Start_Circle_or_Ellipse();
+    Check_2D_Busy();
+}
+
+void LT768_DrawEllipse_Fill
+(
+    uint16_t XCenter           // 椭圆心X位置
+    ,uint16_t YCenter           // 椭圆心Y位置
+    ,uint16_t X_R               // 宽半径
+    ,uint16_t Y_R               // 长半径
+    ,unsigned long ForegroundColor    // 背景颜色
+)
+{
+    Foreground_color_65k(ForegroundColor);
+    Ellipse_Center_XY(XCenter,YCenter);
+    Ellipse_Radius_RxRy(X_R,Y_R);
+    Start_Circle_or_Ellipse_Fill();
+    Check_2D_Busy();
+}
+
+void LT768_DrawEllipse_Width
+(
+    uint16_t XCenter           // 椭圆心X位置
+    ,uint16_t YCenter           // 椭圆心Y位置
+    ,uint16_t X_R               // 宽半径
+    ,uint16_t Y_R               // 长半径
+    ,unsigned long EllipseColor       // 画线颜色
+    ,unsigned long ForegroundColor    // 背景颜色
+    ,uint16_t Width             // 线宽
+)
+{
+    LT768_DrawEllipse_Fill(XCenter,YCenter,X_R+Width,Y_R+Width,EllipseColor);
+    LT768_DrawEllipse_Fill(XCenter,YCenter,X_R,Y_R,ForegroundColor);
+}
+
+//------------------------------------- 矩形 -----------------------------------------
+void LT768_DrawSquare
+(
+    uint16_t X1                // X1位置
+    ,uint16_t Y1                // Y1位置
+    ,uint16_t X2                // X2位置
+    ,uint16_t Y2                // Y2位置
+    ,unsigned long SquareColor        // 画线颜色
+)
+{
+    Foreground_color_65k(SquareColor);
+    Square_Start_XY(X1,Y1);
+    Square_End_XY(X2,Y2);
+    Start_Square();
+    Check_2D_Busy();
+}
+
+void LT768_DrawSquare_Fill
+(
+    uint16_t X1                // X1位置
+    ,uint16_t Y1                // Y1位置
+    ,uint16_t X2                // X2位置
+    ,uint16_t Y2                // Y2位置
+    ,unsigned long ForegroundColor    // 背景颜色
+)
+{
+    Foreground_color_65k(ForegroundColor);
+    Square_Start_XY(X1,Y1);
+    Square_End_XY(X2,Y2);
+    Start_Square_Fill();
+    Check_2D_Busy();
+}
+
+void LT768_DrawSquare_Width
+(
+    uint16_t X1                // X1位置
+    ,uint16_t Y1                // Y1位置
+    ,uint16_t X2                // X2位置
+    ,uint16_t Y2                // Y2位置
+    ,unsigned long SquareColor        // 画线颜色
+    ,unsigned long ForegroundColor    // 背景颜色
+    ,uint16_t Width             // 线宽
+)
+{
+    LT768_DrawSquare_Fill(X1-Width,Y1-Width,X2+Width,Y2+Width,SquareColor);
+    LT768_DrawSquare_Fill(X1,Y1,X2,Y2,ForegroundColor);
+}
+
+//------------------------------------- 圆角矩形 -----------------------------------------
+void LT768_DrawCircleSquare
+(
+    uint16_t X1                // X1位置
+    ,uint16_t Y1                // Y1位置
+    ,uint16_t X2                // X2位置
+    ,uint16_t Y2                // Y2位置
+    ,uint16_t X_R               // 宽半径
+    ,uint16_t Y_R               // 长半径
+    ,unsigned long CircleSquareColor  // 画线颜色
+)
+{
+    Foreground_color_65k(CircleSquareColor);
+    Square_Start_XY(X1,Y1);
+    Square_End_XY(X2,Y2);
+    Circle_Square_Radius_RxRy(X_R,Y_R);
+    Start_Circle_Square();
+    Check_2D_Busy();
+}
+
+void LT768_DrawCircleSquare_Fill
+(
+    uint16_t X1                // X1位置
+    ,uint16_t Y1                // Y1位置
+    ,uint16_t X2                // X2位置
+    ,uint16_t Y2                // Y2位置
+    ,uint16_t X_R               // 宽半径
+    ,uint16_t Y_R               // 长半径
+    ,unsigned long ForegroundColor  // 画线颜色
+)
+{
+    Foreground_color_65k(ForegroundColor);
+    Square_Start_XY(X1,Y1);
+    Square_End_XY(X2,Y2);
+    Circle_Square_Radius_RxRy(X_R,Y_R);
+    Start_Circle_Square_Fill();
+    Check_2D_Busy();
+}
+
+void LT768_DrawCircleSquare_Width
+(
+    uint16_t X1                // X1位置
+    ,uint16_t Y1                // Y1位置
+    ,uint16_t X2                // X2位置
+    ,uint16_t Y2                // Y2位置
+    ,uint16_t X_R               // 宽半径
+    ,uint16_t Y_R               // 长半径
+    ,unsigned long CircleSquareColor  // 画线颜色
+    ,unsigned long ForegroundColor    // 画线颜色
+    ,uint16_t Width             // 宽度
+)
+{
+    LT768_DrawCircleSquare_Fill(X1-Width,Y1-Width,X2+Width,Y2+Width,X_R,Y_R,CircleSquareColor);
+    LT768_DrawCircleSquare_Fill(X1,Y1,X2,Y2,X_R,Y_R,ForegroundColor);
+}
+
+//------------------------------------- 三角形 -----------------------------------------
+void LT768_DrawTriangle
+(
+    uint16_t X1              // X1位置
+    ,uint16_t Y1              // Y1位置
+    ,uint16_t X2              // X2位置
+    ,uint16_t Y2              // Y2位置
+    ,uint16_t X3              // X3位置
+    ,uint16_t Y3              // Y3位置
+    ,unsigned long TriangleColor    // 画线颜色
+)
+{
+    Foreground_color_65k(TriangleColor);
+    Triangle_Point1_XY(X1,Y1);
+    Triangle_Point2_XY(X2,Y2);
+    Triangle_Point3_XY(X3,Y3);
+    Start_Triangle();
+    Check_2D_Busy();
+}
+
+
+
+void LT768_DrawTriangle_Fill
+(
+    uint16_t X1              // X1位置
+    ,uint16_t Y1              // Y1位置
+    ,uint16_t X2              // X2位置
+    ,uint16_t Y2              // Y2位置
+    ,uint16_t X3              // X3位置
+    ,uint16_t Y3              // Y3位置
+    ,unsigned long ForegroundColor  // 画线颜色
+)
+{
+    Foreground_color_65k(ForegroundColor);
+    Triangle_Point1_XY(X1,Y1);
+    Triangle_Point2_XY(X2,Y2);
+    Triangle_Point3_XY(X3,Y3);
+    Start_Triangle_Fill();
+    Check_2D_Busy();
+}
+
+void LT768_DrawTriangle_Frame
+(
+    uint16_t X1              // X1位置
+    ,uint16_t Y1              // Y1位置
+    ,uint16_t X2              // X2位置
+    ,uint16_t Y2              // Y2位置
+    ,uint16_t X3              // X3位置
+    ,uint16_t Y3              // Y3位置
+    ,unsigned long TriangleColor    // 画线颜色
+    ,unsigned long ForegroundColor  // 背景颜色
+)
+{
+    LT768_DrawTriangle_Fill(X1,Y1,X2,Y2,X3,Y3,ForegroundColor);
+    LT768_DrawTriangle(X1,Y1,X2,Y2,X3,Y3,TriangleColor);
+}
+
+
+
+//------------------------------------- 曲线 -----------------------------------------
+void LT768_DrawLeftUpCurve
+(
+    uint16_t XCenter           // 曲心X位置
+    ,uint16_t YCenter           // 曲心Y位置
+    ,uint16_t X_R               // 宽半径
+    ,uint16_t Y_R               // 长半径
+    ,unsigned long CurveColor         // 画线颜色
+)
+{
+    Foreground_color_65k(CurveColor);
+    Ellipse_Center_XY(XCenter,YCenter);
+    Ellipse_Radius_RxRy(X_R,Y_R);
+    Start_Left_Up_Curve();
+    Check_2D_Busy();
+}
+
+
+void LT768_DrawLeftDownCurve
+(
+    uint16_t XCenter           // 曲心X位置
+    ,uint16_t YCenter           // 曲心Y位置
+    ,uint16_t X_R               // 宽半径
+    ,uint16_t Y_R               // 长半径
+    ,unsigned long CurveColor         // 画线颜色
+)
+{
+    Foreground_color_65k(CurveColor);
+    Ellipse_Center_XY(XCenter,YCenter);
+    Ellipse_Radius_RxRy(X_R,Y_R);
+    Start_Left_Down_Curve();
+    Check_2D_Busy();
+}
+
+
+void LT768_DrawRightUpCurve
+(
+    uint16_t XCenter           // 曲心X位置
+    ,uint16_t YCenter           // 曲心Y位置
+    ,uint16_t X_R               // 宽半径
+    ,uint16_t Y_R               // 长半径
+    ,unsigned long CurveColor         // 画线颜色
+)
+{
+    Foreground_color_65k(CurveColor);
+    Ellipse_Center_XY(XCenter,YCenter);
+    Ellipse_Radius_RxRy(X_R,Y_R);
+    Start_Right_Up_Curve();
+    Check_2D_Busy();
+}
+
+
+void LT768_DrawRightDownCurve
+(
+    uint16_t XCenter           // 曲心X位置
+    ,uint16_t YCenter           // 曲心Y位置
+    ,uint16_t X_R               // 宽半径
+    ,uint16_t Y_R               // 长半径
+    ,unsigned long CurveColor         // 画线颜色
+)
+{
+    Foreground_color_65k(CurveColor);
+    Ellipse_Center_XY(XCenter,YCenter);
+    Ellipse_Radius_RxRy(X_R,Y_R);
+    Start_Right_Down_Curve();
+    Check_2D_Busy();
+}
+
+
+void LT768_SelectDrawCurve
+(
+    uint16_t XCenter           // 曲心X位置
+    ,uint16_t YCenter           // 曲心Y位置
+    ,uint16_t X_R               // 宽半径
+    ,uint16_t Y_R               // 长半径
+    ,unsigned long CurveColor         // 画线颜色
+    ,uint16_t  Dir              // 方向
+)
+{
+    switch(Dir)
+    {
+        case 0:
+            LT768_DrawLeftDownCurve(XCenter,YCenter,X_R,Y_R,CurveColor);
+            break;
+
+        case 1:
+            LT768_DrawLeftUpCurve(XCenter,YCenter,X_R,Y_R,CurveColor);
+            break;
+
+        case 2:
+            LT768_DrawRightUpCurve(XCenter,YCenter,X_R,Y_R,CurveColor);
+            break;
+
+        case 3:
+            LT768_DrawRightDownCurve(XCenter,YCenter,X_R,Y_R,CurveColor);
+            break;
+
+        default:
+            break;
+    }
+}
+
+
+//------------------------------------- 1/4实心椭圆 -----------------------------------------
+void LT768_DrawLeftUpCurve_Fill
+(
+    uint16_t XCenter           // 曲心X位置
+    ,uint16_t YCenter           // 曲心Y位置
+    ,uint16_t X_R               // 宽半径
+    ,uint16_t Y_R               // 长半径
+    ,unsigned long ForegroundColor    // 背景颜色
+)
+{
+    Foreground_color_65k(ForegroundColor);
+    Ellipse_Center_XY(XCenter,YCenter);
+    Ellipse_Radius_RxRy(X_R,Y_R);
+    Start_Left_Up_Curve_Fill();
+    Check_2D_Busy();
+}
+
+
+void LT768_DrawLeftDownCurve_Fill
+(
+    uint16_t XCenter           // 曲心X位置
+    ,uint16_t YCenter           // 曲心Y位置
+    ,uint16_t X_R               // 宽半径
+    ,uint16_t Y_R               // 长半径
+    ,unsigned long ForegroundColor    // 背景颜色
+)
+{
+    Foreground_color_65k(ForegroundColor);
+    Ellipse_Center_XY(XCenter,YCenter);
+    Ellipse_Radius_RxRy(X_R,Y_R);
+    Start_Left_Down_Curve_Fill();
+    Check_2D_Busy();
+}
+
+
+void LT768_DrawRightUpCurve_Fill
+(
+    uint16_t XCenter           // 曲心X位置
+    ,uint16_t YCenter           // 曲心Y位置
+    ,uint16_t X_R               // 宽半径
+    ,uint16_t Y_R               // 长半径
+    ,unsigned long ForegroundColor    // 背景颜色
+)
+{
+    Foreground_color_65k(ForegroundColor);
+    Ellipse_Center_XY(XCenter,YCenter);
+    Ellipse_Radius_RxRy(X_R,Y_R);
+    Start_Right_Up_Curve_Fill();
+    Check_2D_Busy();
+}
+
+
+void LT768_DrawRightDownCurve_Fill
+(
+    uint16_t XCenter           // 曲心X位置
+    ,uint16_t YCenter           // 曲心Y位置
+    ,uint16_t X_R               // 宽半径
+    ,uint16_t Y_R               // 长半径
+    ,unsigned long ForegroundColor    // 背景颜色
+)
+{
+    Foreground_color_65k(ForegroundColor);
+    Ellipse_Center_XY(XCenter,YCenter);
+    Ellipse_Radius_RxRy(X_R,Y_R);
+    Start_Right_Down_Curve_Fill();
+    Check_2D_Busy();
+}
+
+
+void LT768_SelectDrawCurve_Fill
+(
+    uint16_t XCenter           // 曲心X位置
+    ,uint16_t YCenter           // 曲心Y位置
+    ,uint16_t X_R               // 宽半径
+    ,uint16_t Y_R               // 长半径
+    ,unsigned long CurveColor         // 画线颜色
+    ,uint16_t  Dir              // 方向
+)
+{
+    switch(Dir)
+    {
+        case 0:
+            LT768_DrawLeftDownCurve_Fill(XCenter,YCenter,X_R,Y_R,CurveColor);
+            break;
+
+        case 1:
+            LT768_DrawLeftUpCurve_Fill(XCenter,YCenter,X_R,Y_R,CurveColor);
+            break;
+
+        case 2:
+            LT768_DrawRightUpCurve_Fill(XCenter,YCenter,X_R,Y_R,CurveColor);
+            break;
+
+        case 3:
+            LT768_DrawRightDownCurve_Fill(XCenter,YCenter,X_R,Y_R,CurveColor);
+            break;
+
+        default:
+            break;
+    }
+}
+
+
+
+//------------------------------------- 四边形 -----------------------------------------
+
+void LT768_DrawQuadrilateral
+(
+    uint16_t X1              // X1位置
+    ,uint16_t Y1              // Y1位置
+    ,uint16_t X2              // X2位置
+    ,uint16_t Y2              // Y2位置
+    ,uint16_t X3              // X3位置
+    ,uint16_t Y3              // Y3位置
+    ,uint16_t X4              // X4位置
+    ,uint16_t Y4              // Y4位置
+    ,unsigned long ForegroundColor  // 画线颜色
+)
+{
+    Foreground_color_65k(ForegroundColor);
+    Triangle_Point1_XY(X1,Y1);
+    Triangle_Point2_XY(X2,Y2);
+    Triangle_Point3_XY(X3,Y3);
+    Ellipse_Radius_RxRy(X4,Y4);
+    LCD_CmdWrite(0x67);
+    LCD_DataWrite(0x8d);
+    Check_Busy_Draw();
+    Check_2D_Busy();
+}
+
+
+void LT768_DrawQuadrilateral_Fill
+(
+    uint16_t X1              // X1位置
+    ,uint16_t Y1              // Y1位置
+    ,uint16_t X2              // X2位置
+    ,uint16_t Y2              // Y2位置
+    ,uint16_t X3              // X3位置
+    ,uint16_t Y3              // Y3位置
+    ,uint16_t X4              // X4位置
+    ,uint16_t Y4              // Y4位置
+    ,unsigned long ForegroundColor  // 画线颜色
+)
+{
+    Foreground_color_65k(ForegroundColor);
+    Triangle_Point1_XY(X1,Y1);
+    Triangle_Point2_XY(X2,Y2);
+    Triangle_Point3_XY(X3,Y3);
+    Ellipse_Radius_RxRy(X4,Y4);
+    LCD_CmdWrite(0x67);
+    LCD_DataWrite(0xa7);
+    Check_Busy_Draw();
+    Check_2D_Busy();
+}
+
+
+
+//------------------------------------- 五边形 -----------------------------------------
+
+void LT768_DrawPentagon
+(
+    uint16_t X1              // X1位置
+    ,uint16_t Y1              // Y1位置
+    ,uint16_t X2              // X2位置
+    ,uint16_t Y2              // Y2位置
+    ,uint16_t X3              // X3位置
+    ,uint16_t Y3              // Y3位置
+    ,uint16_t X4              // X4位置
+    ,uint16_t Y4              // Y4位置
+    ,uint16_t X5              // X5位置
+    ,uint16_t Y5              // Y5位置
+    ,unsigned long ForegroundColor  // 画线颜色
+)
+{
+    Foreground_color_65k(ForegroundColor);
+    Triangle_Point1_XY(X1,Y1);
+    Triangle_Point2_XY(X2,Y2);
+    Triangle_Point3_XY(X3,Y3);
+    Ellipse_Radius_RxRy(X4,Y4);
+    Ellipse_Center_XY(X5,Y5);
+    LCD_CmdWrite(0x67);
+    LCD_DataWrite(0x8F);
+    Check_Busy_Draw();
+    Check_2D_Busy();
+}
+
+
+void LT768_DrawPentagon_Fill
+(
+    uint16_t X1              // X1位置
+    ,uint16_t Y1              // Y1位置
+    ,uint16_t X2              // X2位置
+    ,uint16_t Y2              // Y2位置
+    ,uint16_t X3              // X3位置
+    ,uint16_t Y3              // Y3位置
+    ,uint16_t X4              // X4位置
+    ,uint16_t Y4              // Y4位置
+    ,uint16_t X5              // X5位置
+    ,uint16_t Y5              // Y5位置
+    ,unsigned long ForegroundColor  // 画线颜色
+)
+{
+    Foreground_color_65k(ForegroundColor);
+    Triangle_Point1_XY(X1,Y1);
+    Triangle_Point2_XY(X2,Y2);
+    Triangle_Point3_XY(X3,Y3);
+    Ellipse_Radius_RxRy(X4,Y4);
+    Ellipse_Center_XY(X5,Y5);
+    LCD_CmdWrite(0x67);
+    LCD_DataWrite(0xa9);
+    Check_Busy_Draw();
+    Check_2D_Busy();
+}
+
+
+//------------------------------------- 圆柱 -----------------------------------------
+uint8_t LT768_DrawCylinder
+(
+    uint16_t XCenter           // 椭圆心X位置
+    ,uint16_t YCenter           // 椭圆心Y位置
+    ,uint16_t X_R               // 宽半径
+    ,uint16_t Y_R               // 长半径
+    ,uint16_t H                 // 高度
+    ,unsigned long CylinderColor      // 画线颜色
+    ,unsigned long ForegroundColor    // 背景颜色
+)
+{
+    if(YCenter < H)
+    {
+        return 1;
+    }
+
+    //底面椭圆
+    LT768_DrawEllipse_Fill(XCenter,YCenter,X_R,Y_R,ForegroundColor);
+    LT768_DrawEllipse(XCenter,YCenter,X_R,Y_R,CylinderColor);
+    //中间矩形
+    LT768_DrawSquare_Fill(XCenter-X_R,YCenter-H,XCenter+X_R,YCenter,ForegroundColor);
+    //顶面椭圆
+    LT768_DrawEllipse_Fill(XCenter,YCenter-H,X_R,Y_R,ForegroundColor);
+    LT768_DrawEllipse(XCenter,YCenter-H,X_R,Y_R,CylinderColor);
+    LT768_DrawLine(XCenter-X_R,YCenter,XCenter-X_R,YCenter-H,CylinderColor);
+    LT768_DrawLine(XCenter+X_R,YCenter,XCenter+X_R,YCenter-H,CylinderColor);
+    return 0;
+}
+
+
+//------------------------------------- 四棱柱 -----------------------------------------
+void LT768_DrawQuadrangular
+(
+    uint16_t X1
+    ,uint16_t Y1
+    ,uint16_t X2
+    ,uint16_t Y2
+    ,uint16_t X3
+    ,uint16_t Y3
+    ,uint16_t X4
+    ,uint16_t Y4
+    ,uint16_t X5
+    ,uint16_t Y5
+    ,uint16_t X6
+    ,uint16_t Y6
+    ,unsigned long QuadrangularColor   // 画线颜色
+    ,unsigned long ForegroundColor     // 背景颜色
+)
+{
+    LT768_DrawSquare_Fill(X1,Y1,X5,Y5,ForegroundColor);
+    LT768_DrawSquare(X1,Y1,X5,Y5,QuadrangularColor);
+    LT768_DrawQuadrilateral_Fill(X1,Y1,X2,Y2,X3,Y3,X4,Y4,ForegroundColor);
+    LT768_DrawQuadrilateral(X1,Y1,X2,Y2,X3,Y3,X4,Y4,QuadrangularColor);
+    LT768_DrawQuadrilateral_Fill(X3,Y3,X4,Y4,X5,Y5,X6,Y6,ForegroundColor);
+    LT768_DrawQuadrilateral(X3,Y3,X4,Y4,X5,Y5,X6,Y6,QuadrangularColor);
+}
+
+
+//--------------------------------------表格------------------------------------
+void LT768_MakeTable
+(
+    uint16_t X1,                  // 起始位置X1
+    uint16_t Y1,                  // 起始位置X2
+    uint16_t W,                   // 宽度
+    uint16_t H,                   // 高度
+    uint16_t Line,                // 行数
+    uint16_t Row,                 // 列数
+    unsigned long  TableColor,          // 线框颜色C1
+    unsigned long  ItemColor,            // 项目拦背景色C2
+    unsigned long  ForegroundColor,     // 内部窗口背景色C3
+    uint16_t width1,              // 内框宽度
+    uint16_t width2,              // 外框宽度
+    uint8_t  mode                 // 0：项目栏纵向   1：项目栏横向
+)
+{
+    uint16_t i = 0;
+    uint16_t x2,y2;
+    x2 = X1 + W * Row;
+    y2 = Y1 + H * Line;
+    LT768_DrawSquare_Width(X1,Y1,x2,y2,TableColor,ForegroundColor,width2);
+
+    if(mode == 0)
+    {
+        LT768_DrawSquare_Fill(X1,Y1,X1+W,y2,ItemColor);
+    }
+    else if(mode == 1)
+    {
+        LT768_DrawSquare_Fill(X1,Y1,x2,Y1+H,ItemColor);
+    }
+
+    for(i = 0 ; i < Line ; i++)
+    {
+        LT768_DrawLine_Width(X1,Y1+i*H,x2,Y1+i*H,TableColor,width1);
+    }
+
+    for(i = 0 ; i < Row ; i++)
+    {
+        LT768_DrawLine_Width(X1+i*W,Y1,X1+i*W,y2,TableColor,width1);
+    }
+}
+
+/*----------------------------------------------------------------------------*/
+
+void LT768_Color_Bar_ON(void)
+{
+    Color_Bar_ON();
+}
+
+void LT768_Color_Bar_OFF(void)
+{
+    Color_Bar_OFF();
+}
+
+/*----------------------------------------------------------------------------*/
+
+/*--Flash-->DMA-->SDRAM--*/
+/*address：24bit or 32bit*/
+
+void LT768_DMA_24bit_Linear
+(
+    uint8_t SCS              // 选择外挂的SPI   : SCS：0       SCS：1
+    ,uint8_t Clk              // SPI时钟分频参数 : SPI Clock = System Clock /{(Clk+1)*2}
+    ,unsigned long flash_addr       // 要从flash读取数据的起始地址
+    ,unsigned long memory_addr      // 数据要传输到SDRAM的起始地址
+    ,unsigned long data_num         // 传输的数据量
+)
+{
+    Enable_SFlash_SPI();                               // 使能SPI功能
+
+    if(SCS == 0)
+    {
+        Select_SFI_0();    // 选择外挂的SPI0
+    }
+
+    if(SCS == 1)
+    {
+        Select_SFI_1();    // 选择外挂的SPI1
+    }
+
+    Memory_Linear_Mode();
+    Select_SFI_DMA_Mode();                             // 设置SPI的DMA模式
+    SPI_Clock_Period(Clk);                             // SPI速率
+    SFI_DMA_Destination_Start_Address(memory_addr);     // 指定的内存的开始地址
+    SFI_DMA_Transfer_Number(data_num);                 // DMA传输的数量
+    SFI_DMA_Source_Start_Address(flash_addr);          // flash地址
+    Check_Busy_SFI_DMA();
+    Start_SFI_DMA();
+    Check_Busy_SFI_DMA();
+    Memory_XY_Mode();
+}
+
+void LT768_DMA_32bit_Linear
+(
+    uint8_t SCS              // 选择外挂的SPI   : SCS：0       SCS：1
+    ,uint8_t Clk              // SPI时钟分频参数 : SPI Clock = System Clock /{(Clk+1)*2}
+    ,unsigned long flash_addr       // 要从flash读取数据的起始地址
+    ,unsigned long memory_addr      // 数据要传输到SDRAM的起始地址
+    ,unsigned long data_num         // 传输的数据量
+)
+{
+    Enable_SFlash_SPI();                               // 使能SPI功能
+
+    if(SCS == 0)
+    {
+        Select_SFI_0();    // 选择外挂的SPI0
+    }
+
+    if(SCS == 1)
+    {
+        Select_SFI_1();    // 选择外挂的SPI1
+    }
+
+    Memory_Linear_Mode();
+    Select_SFI_DMA_Mode();                            // 设置SPI的DMA模式
+    Select_SFI_32bit_Address();
+    SPI_Clock_Period(Clk);                             // SPI速率
+    SFI_DMA_Destination_Start_Address(memory_addr);     // 指定的内存的开始地址
+    SFI_DMA_Transfer_Number(data_num);                 // DMA传输的数量
+    SFI_DMA_Source_Start_Address(flash_addr);          // flash地址
+    Check_Busy_SFI_DMA();
+    Start_SFI_DMA();
+    Check_Busy_SFI_DMA();
+    Memory_XY_Mode();
+}
+
+void LT768_DMA_24bit_Block
+(
+    uint8_t SCS         // 选择外挂的SPI   : SCS：0       SCS：1
+    ,uint8_t Clk         // SPI时钟分频参数 : SPI Clock = System Clock /{(Clk+1)*2}
+    ,uint16_t X1         // 传输到内存X1的位置
+    ,uint16_t Y1         // 传输到内存Y1的位置
+    ,uint16_t X_W        // DMA传输数据的宽度
+    ,uint16_t Y_H        // DMA传输数据的高度
+    ,uint16_t P_W        // 图片的宽度
+    ,unsigned long Addr        // Flash的地址
+)
+{
+    Enable_SFlash_SPI();                            // 使能SPI功能
+
+    if(SCS == 0)
+    {
+        Select_SFI_0();    // 选择外挂的SPI0
+    }
+
+    if(SCS == 1)
+    {
+        Select_SFI_1();    // 选择外挂的SPI1
+    }
+
+    Select_SFI_DMA_Mode();                          // 设置SPI的DMA模式
+    SPI_Clock_Period(Clk);                          // 设置SPI的分频系数
+    Goto_Pixel_XY(X1,Y1);                            // 在图形模式中设置内存的位置
+    SFI_DMA_Destination_Upper_Left_Corner(X1,Y1);    // DMA传输的目的地（内存的位置）
+    SFI_DMA_Transfer_Width_Height(X_W,Y_H);          // 设置块数据的宽度和高度
+    SFI_DMA_Source_Width(P_W);                      // 设置源数据的宽度
+    SFI_DMA_Source_Start_Address(Addr);             // 设置源数据在Flash的地址
+    Start_SFI_DMA();                                // 开始DMA传输
+    Check_Busy_SFI_DMA();                            // 检测DMA是否传输完成
+}
+
+
+
+void LT768_DMA_32bit_Block
+(
+    uint8_t SCS         // 选择外挂的SPI   : SCS：0       SCS：1
+    ,uint8_t Clk         // SPI时钟分频参数 : SPI Clock = System Clock /{(Clk+1)*2}
+    ,uint16_t X1         // 内存X1的位置
+    ,uint16_t Y1         // 内存Y1的位置
+    ,uint16_t X_W        // DMA传输数据的宽度
+    ,uint16_t Y_H        // DMA传输数据的高度
+    ,uint16_t P_W        // 图片的宽度
+    ,unsigned long Addr        // Flash的地址
+)
+{
+    Enable_SFlash_SPI();
+
+    if(SCS == 0)
+    {
+        Select_SFI_0();
+    }
+
+    if(SCS == 1)
+    {
+        Select_SFI_1();
+    }
+
+    Select_SFI_DMA_Mode();
+    SPI_Clock_Period(Clk);
+    Select_SFI_32bit_Address();
+    Goto_Pixel_XY(X1,Y1);
+    SFI_DMA_Destination_Upper_Left_Corner(X1,Y1);
+    SFI_DMA_Transfer_Width_Height(X_W,Y_H);
+    SFI_DMA_Source_Width(P_W);
+    SFI_DMA_Source_Start_Address(Addr);
+    Start_SFI_DMA();
+    Check_Busy_SFI_DMA();
+    Select_SFI_24bit_Address();
+}
+
+/*----------------------------------------------------------------------------*/
+/* 选择内部集成字库初始化 */
+void LT768_Select_Internal_Font_Init
+(
+    uint8_t Size         // 设置字体大小  16：16*16     24:24*24    32:32*32
+    ,uint8_t XxN          // 字体的宽度放大倍数：1~4
+    ,uint8_t YxN          // 字体的高度放大倍数：1~4
+    ,uint8_t ChromaKey    // 0：字体背景色透明    1：可以设置字体的背景色
+    ,uint8_t Alignment    // 0：不字体不对齐      1：字体对齐
+)
+{
+    if(Size==16)
+    {
+        Font_Select_8x16_16x16();
+    }
+
+    if(Size==24)
+    {
+        Font_Select_12x24_24x24();
+    }
+
+    if(Size==32)
+    {
+        Font_Select_16x32_32x32();
+    }
+
+    //(*)
+    if(XxN==1)
+    {
+        Font_Width_X1();
+    }
+
+    if(XxN==2)
+    {
+        Font_Width_X2();
+    }
+
+    if(XxN==3)
+    {
+        Font_Width_X3();
+    }
+
+    if(XxN==4)
+    {
+        Font_Width_X4();
+    }
+
+    //(*)
+    if(YxN==1)
+    {
+        Font_Height_X1();
+    }
+
+    if(YxN==2)
+    {
+        Font_Height_X2();
+    }
+
+    if(YxN==3)
+    {
+        Font_Height_X3();
+    }
+
+    if(YxN==4)
+    {
+        Font_Height_X4();
+    }
+
+    //(*)
+    if(ChromaKey==0)
+    {
+        Font_Background_select_Color();
+    }
+
+    if(ChromaKey==1)
+    {
+        Font_Background_select_Transparency();
+    }
+
+    //(*)
+    if(Alignment==0)
+    {
+        Disable_Font_Alignment();
+    }
+
+    if(Alignment==1)
+    {
+        Enable_Font_Alignment();
+    }
+}
+
+
+/* 显示内部集成字体 */
+void LT768_Print_Internal_Font_String
+(
+    uint16_t x               // 字体开始显示的x位置
+    ,uint16_t y               // 字体开始显示的y位置
+    ,unsigned long FontColor        // 字体的颜色
+    ,unsigned long BackGroundColor  // 字体的背景色（注意：当字体背景初始化成透明时，设置该值无效）
+    ,char *c                        // 数据缓冲的首地址
+)
+{
+    Text_Mode();
+    CGROM_Select_Internal_CGROM();
+    Foreground_color_65k(FontColor);
+    Background_color_65k(BackGroundColor);
+    Goto_Text_XY(x,y);
+    Show_String(c);
+}
+
+
+/* 选择外部集成字库初始化 */
+void LT768_Select_Outside_Font_Init
+(
+    uint8_t SCS           // 选择外挂的SPI   : SCS：0       SCS：1
+    ,uint8_t Clk           // SPI时钟分频参数 : SPI Clock = System Clock /{(Clk+1)*2}
+    ,unsigned long FlashAddr     // 源地址(Flash)
+    ,unsigned long MemoryAddr    // 目的地址(SDRAM)
+    ,unsigned long Num           // 字库的数据量大小
+    ,uint8_t Size          // 设置字体大小  16：16*16     24:24*24    32:32*32
+    ,uint8_t XxN           // 字体的宽度放大倍数：1~4
+    ,uint8_t YxN           // 字体的高度放大倍数：1~4
+    ,uint8_t ChromaKey     // 0：字体背景色透明    1：可以设置字体的背景色
+    ,uint8_t Alignment     // 0：不字体不对齐      1：字体对齐
+)
+{
+    if(Size==16)
+    {
+        Font_Select_8x16_16x16();
+    }
+
+    if(Size==24)
+    {
+        Font_Select_12x24_24x24();
+    }
+
+    if(Size==32)
+    {
+        Font_Select_16x32_32x32();
+    }
+
+    //(*)
+    if(XxN==1)
+    {
+        Font_Width_X1();
+    }
+
+    if(XxN==2)
+    {
+        Font_Width_X2();
+    }
+
+    if(XxN==3)
+    {
+        Font_Width_X3();
+    }
+
+    if(XxN==4)
+    {
+        Font_Width_X4();
+    }
+
+    //(*)
+    if(YxN==1)
+    {
+        Font_Height_X1();
+    }
+
+    if(YxN==2)
+    {
+        Font_Height_X2();
+    }
+
+    if(YxN==3)
+    {
+        Font_Height_X3();
+    }
+
+    if(YxN==4)
+    {
+        Font_Height_X4();
+    }
+
+    //(*)
+    if(ChromaKey==0)
+    {
+        Font_Background_select_Color();
+    }
+
+    if(ChromaKey==1)
+    {
+        Font_Background_select_Transparency();
+    }
+
+    //(*)
+    if(Alignment==0)
+    {
+        Disable_Font_Alignment();
+    }
+
+    if(Alignment==1)
+    {
+        Enable_Font_Alignment();
+    }
+
+    LT768_DMA_24bit_Linear(SCS,Clk,FlashAddr,MemoryAddr,Num);
+    CGRAM_Start_address(MemoryAddr);
+}
+
+/* 显示外部及内部集成字体 */
+void LT768_Print_Outside_Font_String
+(
+    uint16_t x               // 字体开始显示的x位置
+    ,uint16_t y               // 字体开始显示的y位置
+    ,unsigned long FontColor        // 字体的颜色
+    ,unsigned long BackGroundColor  // 字体的背景色（注意：当字体背景初始化成透明时，设置该值无效）
+    ,uint8_t *c               // 数据缓冲的首地址
+)
+{
+    uint16_t temp_H = 0;
+    uint16_t temp_L = 0;
+    uint16_t temp = 0;
+    unsigned long i = 0;
+    Text_Mode();
+    Font_Select_UserDefine_Mode();
+    Foreground_color_65k(FontColor);
+    Background_color_65k(BackGroundColor);
+    Goto_Text_XY(x,y);
+
+    while(c[i] != '\0')
+    {
+        if(c[i] < 0xa1)
+        {
+            CGROM_Select_Internal_CGROM();   // 内部CGROM为字符来源
+            LCD_CmdWrite(0x04);
+            LCD_DataWrite(c[i]);
+            Check_Mem_WR_FIFO_not_Full();
+            i += 1;
+        }
+        else
+        {
+            Font_Select_UserDefine_Mode();   // 自定义字库
+            LCD_CmdWrite(0x04);
+            temp_H = ((c[i] - 0xa1) & 0x00ff) * 94;
+            temp_L = c[i+1] - 0xa1;
+            temp = temp_H + temp_L + 0x8000;
+            LCD_DataWrite((temp>>8)&0xff);
+            Check_Mem_WR_FIFO_not_Full();
+            LCD_DataWrite(temp&0xff);
+            Check_Mem_WR_FIFO_not_Full();
+            i += 2;
+        }
+    }
+
+    Check_2D_Busy();
+    Graphic_Mode(); //back to graphic mode;图形模式
+}
+
+/* 显示外部GBK及内部集成字体 */
+void LT768_Print_Outside_Font_GBK_String
+(
+    uint16_t x               // 字体开始显示的x位置
+    ,uint16_t y               // 字体开始显示的y位置
+    ,unsigned long FontColor        // 字体的颜色
+    ,unsigned long BackGroundColor  // 字体的背景色（注意：当字体背景初始化成透明时，设置该值无效）
+    ,uint8_t *c               // 数据缓冲的首地址
+)
+{
+    uint16_t temp_H = 0;
+    uint16_t temp_L = 0;
+    uint16_t temp = 0;
+    unsigned long i = 0;
+    Text_Mode();
+    Font_Select_UserDefine_Mode();
+    Foreground_color_65k(FontColor);
+    Background_color_65k(BackGroundColor);
+    Goto_Text_XY(x,y);
+
+    while(c[i] != '\0')
+    {
+        if(c[i] < 0x81)
+        {
+            CGROM_Select_Internal_CGROM();   // 内部CGROM为字符来源
+            LCD_CmdWrite(0x04);
+            LCD_DataWrite(c[i]);
+            Check_Mem_WR_FIFO_not_Full();
+            i += 1;
+        }
+        else
+        {
+            Font_Select_UserDefine_Mode();   // 自定义字库
+            LCD_CmdWrite(0x04);
+            temp_H = ((c[i] - 0x81) & 0x00ff) * 191;
+            temp_L = c[i+1] - 0x40;
+            temp = temp_H + temp_L + 0x8000;
+            LCD_DataWrite((temp>>8)&0xff);
+            Check_Mem_WR_FIFO_not_Full();
+            LCD_DataWrite(temp&0xff);
+            Check_Mem_WR_FIFO_not_Full();
+            i += 2;
+        }
+    }
+
+    Check_2D_Busy();
+    Graphic_Mode(); //back to graphic mode;图形模式
+}
+
+/*显示48*48、72*72字库*/
+void LT768_BTE_Memory_Copy_ColorExpansion_8
+(
+    unsigned long S0_Addr             // SO图像的内存起始地址
+    ,uint16_t YS0                // S0图像的左上方Y坐标
+    ,unsigned long Des_Addr            // 目的图像的内存起始地址
+    ,uint16_t Des_W              // 目的图像的宽度
+    ,uint16_t XDes               // 目的图像的左上方X坐标(显示窗口的起始x坐标)
+    ,uint16_t YDes               // 目的图像的左上方Y坐标(显示窗口的起始y坐标)
+    ,uint16_t X_W                // 显示窗口的宽度
+    ,uint16_t Y_H                // 显示窗口的长度
+    ,unsigned long Foreground_color
+    ,unsigned long Background_color
+)
+{
+    Foreground_color_256(Foreground_color);
+    Background_color_256(Background_color);
+    BTE_ROP_Code(7);
+    BTE_S0_Color_8bpp();
+    BTE_S0_Memory_Start_Address(S0_Addr);
+    BTE_S0_Image_Width(Des_W);
+    BTE_S0_Window_Start_XY(YS0,0);
+    BTE_Destination_Color_16bpp();
+    BTE_Destination_Memory_Start_Address(Des_Addr);
+    BTE_Destination_Image_Width(Des_W);
+    BTE_Destination_Window_Start_XY(XDes,YDes);
+    BTE_Operation_Code(0x0e);  //BTE Operation: Memory copy (move) with chroma keying (w/o ROP)
+    BTE_Window_Size(X_W,Y_H);
+    BTE_Enable();
+    Check_BTE_Busy();
+}
+
+void LT768_BTE_Memory_Copy_ColorExpansion_Chroma_key_8
+(
+    unsigned long S0_Addr             // SO图像的内存起始地址
+    ,uint16_t YS0                // S0图像的左上方Y坐标
+    ,unsigned long Des_Addr            // 目的图像的内存起始地址
+    ,uint16_t Des_W              // 目的图像的宽度
+    ,uint16_t XDes               // 目的图像的左上方X坐标(显示窗口的起始x坐标)
+    ,uint16_t YDes               // 目的图像的左上方Y坐标(显示窗口的起始y坐标)
+    ,uint16_t X_W                // 显示窗口的宽度
+    ,uint16_t Y_H                // 显示窗口的长度
+    ,unsigned long Foreground_color
+)
+{
+    Foreground_color_256(Foreground_color);
+    BTE_ROP_Code(7);
+    BTE_S0_Color_8bpp();
+    BTE_S0_Memory_Start_Address(S0_Addr);
+    BTE_S0_Image_Width(Des_W);
+    BTE_S0_Window_Start_XY(YS0,0);
+    BTE_Destination_Color_16bpp();
+    BTE_Destination_Memory_Start_Address(Des_Addr);
+    BTE_Destination_Image_Width(Des_W);
+    BTE_Destination_Window_Start_XY(XDes,YDes);
+    BTE_Operation_Code(0x0f);  //BTE Operation: Memory copy (move) with chroma keying (w/o ROP)
+    BTE_Window_Size(X_W,Y_H);
+    BTE_Enable();
+    Check_BTE_Busy();
+}
+
+void LT768_Print_Outside_Font_GB2312_48_72
+(
+    uint8_t SCS               // 选择外挂的SPI   : SCS：0       SCS：1
+    ,uint8_t Clk               // SPI时钟分频参数 : SPI Clock = System Clock /{(Clk+1)*2}
+    ,unsigned long FlashAddr         // 字库源地址(Flash)
+    ,unsigned long MemoryAddr        // 目的地址(SDRAM)
+    ,unsigned long ShowAddr             // 显示层的地址
+    ,uint16_t width               // 显示层的宽度
+    ,uint8_t Size              // 设置字体大小  48：48*48     72:72*72
+    ,uint8_t ChromaKey         // 0：字体背景色透明    1：可以设置字体的背景色
+    ,uint16_t x                   // 字体开始显示的x位置
+    ,uint16_t y                   // 字体开始显示的y位置
+    ,unsigned long FontColor            // 字体的颜色
+    ,unsigned long BackGroundColor      // 字体的背景色（注意：当字体背景初始化成透明时，设置该值无效）
+    ,uint16_t w          // 字体粗细：0：不加粗  1：加粗1级  2：加粗2级
+    ,uint16_t s                   // 行距
+    ,uint8_t *c                   // 数据缓冲的首地址
+)
+{
+    uint16_t temp_H = 0;
+    uint16_t temp_L = 0;
+    uint16_t temp = 0;
+    unsigned long i = 0;
+    uint16_t j = 0;
+    uint16_t k = 0;
+    uint16_t h = 0;
+    uint16_t n = 0;
+    uint16_t m = 0;
+    uint16_t g = 0;
+    uint16_t f = 0;
+    h = x;
+    k = y;
+    Memory_8bpp_Mode();//使用8位色深来存储图片
+    Canvas_Image_Start_address(MemoryAddr);
+    Canvas_image_width(width);
+
+    while(c[i] != '\0')
+    {
+        temp_H = (c[i] - 0xa1) * 94;
+        temp_L = c[i+1] - 0xa1;
+        temp = temp_H + temp_L;
+        LT768_DMA_24bit_Block(SCS,Clk,Size*j/8,0,Size/8,Size,Size/8,FlashAddr+temp*((Size*Size)/8));
+        i+=2;
+        j++;
+    }
+
+    Memory_16bpp_Mode();
+    Canvas_Image_Start_address(ShowAddr);
+    Canvas_image_width(width);
+    j = 0;
+    i = 0;
+
+    if(w>2)
+    {
+        w = 2;
+    }
+
+    for(g=0; g<w+1; g++)
+    {
+        while(c[i] != '\0')
+        {
+            if((f == m)&&((x+Size*j+Size)>(width*(n+1))))
+            {
+                m++;
+                n++;
+                y=y+Size-1+s;
+                x = x+((width*n)-(x+Size*j))+g;
+                f=n;
+            }
+
+            if(ChromaKey==1)
+            {
+                LT768_BTE_Memory_Copy_ColorExpansion_8(MemoryAddr,Size*j/8,
+                                                       ShowAddr,width,x+Size*j,y,
+                                                       Size,Size,FontColor,BackGroundColor
+                                                      );
+            }
+
+            if(ChromaKey==0)
+            {
+                LT768_BTE_Memory_Copy_ColorExpansion_Chroma_key_8(MemoryAddr,Size*j/8,
+                                                                  ShowAddr,width,x+Size*j,y,
+                                                                  Size,Size,FontColor
+                                                                 );
+            }
+
+            i+=2;
+            j++;
+        }
+
+        ChromaKey=0;
+        i=0;
+        j=0;
+        m=0;
+        n=0;
+        f=0;
+        x=h+g+1;
+        y=k+g+1;
+    }
+}
+
+
+void LT768_Print_Outside_Font_BIG5_48_72
+(
+    uint8_t SCS                   // 选择外挂的SPI   : SCS：0       SCS：1
+    ,uint8_t Clk                   // SPI时钟分频参数 : SPI Clock = System Clock /{(Clk+1)*2}
+    ,unsigned long FlashAddr             // 字库源地址(Flash)
+    ,unsigned long MemoryAddr            // 目的地址(SDRAM)
+    ,unsigned long ShowAddr             // 显示层的地址
+    ,uint16_t width               // 显示层的宽度
+    ,uint8_t Size                  // 设置字体大小  48：48*48     72:72*72
+    ,uint8_t ChromaKey             // 0：字体背景色透明    1：可以设置字体的背景色
+    ,uint16_t x                   // 字体开始显示的x位置
+    ,uint16_t y                   // 字体开始显示的y位置
+    ,unsigned long FontColor            // 字体的颜色
+    ,unsigned long BackGroundColor      // 字体的背景色（注意：当字体背景初始化成透明时，设置该值无效）
+    ,uint16_t w                    // 字体粗细：0：不加粗  1：加粗1级  2：加粗2级
+    ,uint16_t s                   // 行距
+    ,uint8_t *c                   // 数据缓冲的首地址
+)
+{
+    uint16_t temp_H = 0;
+    uint16_t temp_L = 0;
+    uint16_t temp = 0;
+    unsigned long i = 0;
+    uint16_t j = 0;
+    uint16_t k = 0;
+    uint16_t h = 0;
+    uint16_t n = 0;
+    uint16_t m = 0;
+    uint16_t g = 0;
+    uint16_t f = 0;
+    h = x;
+    k = y;
+    Memory_8bpp_Mode();//使用8位色深来存储图片
+    Canvas_Image_Start_address(MemoryAddr);
+    Canvas_image_width(width);
+
+    while(c[i] != '\0')
+    {
+        temp_H = (c[i] - 0xa1) * 160;
+
+        if(c[i+1]<0x7f)
+        {
+            temp_L = c[i+1] - 0x40;
+        }
+        else
+        {
+            temp_L = c[i+1] - 0xa0 + 0x40;
+        }
+
+        temp = temp_H + temp_L;
+        LT768_DMA_24bit_Block(SCS,Clk,Size*j/8,0,Size/8,Size,Size/8,FlashAddr+temp*((Size*Size)/8));
+        i+=2;
+        j++;
+    }
+
+    Memory_16bpp_Mode();   // 因为显示是16位的色深，所以需要转为16位色深
+    Canvas_Image_Start_address(ShowAddr);
+    Canvas_image_width(width);
+    j = 0;
+    i = 0;
+
+    for(g=0; g<w; g++)
+    {
+        while(c[i] != '\0')
+        {
+            if((f == m)&&((x+Size*j+Size)>(1024*(n+1))))
+            {
+                m++;
+                n++;
+                y=y+Size-1+s;
+                x = x+((1024*n)-(x+Size*j))+g;
+                f=n;
+            }
+
+            if(ChromaKey==1)
+            {
+                LT768_BTE_Memory_Copy_ColorExpansion_8(MemoryAddr,Size*j/8,
+                                                       ShowAddr,LCD_XSIZE_TFT,x+Size*j,y,
+                                                       Size,Size,FontColor,BackGroundColor
+                                                      );
+            }
+
+            if(ChromaKey==0)
+            {
+                LT768_BTE_Memory_Copy_ColorExpansion_Chroma_key_8(MemoryAddr,Size*j/8,
+                                                                  ShowAddr,LCD_XSIZE_TFT,x+Size*j,y,
+                                                                  Size,Size,FontColor
+                                                                 );
+            }
+
+            i+=2;
+            j++;
+        }
+
+        ChromaKey=0;
+        i=0;
+        j=0;
+        m=0;
+        n=0;
+        f=0;
+        x=h+g+1;
+        y=k+g+1;
+    }
+}
+
+void LT768_Print_Outside_Font_GBK_48_72
+(
+    uint8_t SCS               // 选择外挂的SPI   : SCS：0       SCS：1
+    ,uint8_t Clk               // SPI时钟分频参数 : SPI Clock = System Clock /{(Clk+1)*2}
+    ,unsigned long FlashAddr         // 字库源地址(Flash)
+    ,unsigned long MemoryAddr        // 目的地址(SDRAM)
+    ,unsigned long ShowAddr             // 显示层的地址
+    ,uint16_t width               // 显示层的宽度
+    ,uint8_t Size              // 设置字体大小  48：48*48     72:72*72
+    ,uint8_t ChromaKey         // 0：字体背景色透明    1：可以设置字体的背景色
+    ,uint16_t x                   // 字体开始显示的x位置
+    ,uint16_t y                   // 字体开始显示的y位置
+    ,unsigned long FontColor            // 字体的颜色
+    ,unsigned long BackGroundColor      // 字体的背景色（注意：当字体背景初始化成透明时，设置该值无效）
+    ,uint16_t w        // 字体粗细：0：不加粗  1：加粗1级  2：加粗2级
+    ,uint16_t s                   // 行距
+    ,uint8_t *c                   // 数据缓冲的首地址
+)
+{
+    uint16_t temp_H = 0;
+    uint16_t temp_L = 0;
+    uint16_t temp = 0;
+    unsigned long i = 0;
+    uint16_t j = 0;
+    uint16_t k = 0;
+    uint16_t h = 0;
+    uint16_t n = 0;
+    uint16_t m = 0;
+    uint16_t g = 0;
+    uint16_t f = 0;
+    h = x;
+    k = y;
+    Memory_8bpp_Mode();//使用8位色深来存储图片
+    Canvas_Image_Start_address(MemoryAddr);
+    Canvas_image_width(width);
+
+    while(c[i] != '\0')
+    {
+        temp_H = (c[i] - 0x81) * 191;
+        temp_L = c[i+1] - 0x40;
+        temp = temp_H + temp_L;
+        LT768_DMA_24bit_Block(SCS,Clk,Size*j/8,0,Size/8,Size,Size/8,FlashAddr+temp*((Size*Size)/8));
+        i+=2;
+        j++;
+    }
+
+    Memory_16bpp_Mode();
+    Canvas_Image_Start_address(ShowAddr);
+    Canvas_image_width(width);
+    j = 0;
+    i = 0;
+
+    if(w>2)
+    {
+        w = 2;
+    }
+
+    for(g=0; g<w+1; g++)
+    {
+        while(c[i] != '\0')
+        {
+            if((f == m)&&((x+Size*j+Size)>(width*(n+1))))
+            {
+                m++;
+                n++;
+                y=y+Size-1+s;
+                x = x+((width*n)-(x+Size*j))+g;
+                f=n;
+            }
+
+            if(ChromaKey==1)
+            {
+                LT768_BTE_Memory_Copy_ColorExpansion_8(MemoryAddr,Size*j/8,
+                                                       ShowAddr,width,x+Size*j,y,
+                                                       Size,Size,FontColor,BackGroundColor
+                                                      );
+            }
+
+            if(ChromaKey==0)
+            {
+                LT768_BTE_Memory_Copy_ColorExpansion_Chroma_key_8(MemoryAddr,Size*j/8,
+                                                                  ShowAddr,width,x+Size*j,y,
+                                                                  Size,Size,FontColor
+                                                                 );
+            }
+
+            i+=2;
+            j++;
+        }
+
+        ChromaKey=0;
+        i=0;
+        j=0;
+        m=0;
+        n=0;
+        f=0;
+        x=h+g+1;
+        y=k+g+1;
+    }
+}
+
+/*自定义字库*/
+//只能输入中文字
+#define Font_size 200//定义字库大小，200：最多200个字
+#define Font_BYTE Font_size*2
+uint8_t Font_1[Font_BYTE];
+
+void clear_Font_1(void)
+{
+    uint16_t i;
+
+    for(i = 0; i < Font_BYTE; i++)
+    {
+        Font_1[i] = 0;
+    }
+}
+
+int Get_User_Font_P(char chH,char chL)
+{
+    int i;
+
+    for(i=0; i<(sizeof(Font_1)/2); i++)
+    {
+        if((chH == Font_1[i*2])&&(chL == Font_1[i*2+1]))
+        {
+            return i;
+        }
+    }
+
+    return -1;
+}
+
+void LT768_Print_Outside_UserDefineFont_GB2312
+(
+    uint8_t SCS               // 选择外挂的SPI   : SCS：0       SCS：1
+    ,uint8_t Clk               // SPI时钟分频参数 : SPI Clock = System Clock /{(Clk+1)*2}
+    ,unsigned long FlashAddr         // 字库源地址(Flash)
+    ,unsigned long MemoryAddr        // 目的地址(SDRAM)
+    ,unsigned long ShowAddr             // 显示层的地址
+    ,uint16_t width               // 显示层的宽度
+    ,uint8_t Size              // 设置字体大小  48：48*48     72:72*72
+    ,uint8_t ChromaKey         // 0：字体背景色透明    1：可以设置字体的背景色
+    ,uint16_t x                   // 字体开始显示的x位置
+    ,uint16_t y                   // 字体开始显示的y位置
+    ,unsigned long FontColor            // 字体的颜色
+    ,unsigned long BackGroundColor      // 字体的背景色（注意：当字体背景初始化成透明时，设置该值无效）
+    ,uint16_t w            // 字体粗细：0：不加粗  1：加粗1级  2：加粗2级
+    ,uint16_t s                   // 行距
+    ,uint8_t *c                   // 数据缓冲的首地址
+)
+{
+    short temp = 0;
+    unsigned long i = 0;
+    uint16_t j = 0;
+    uint16_t k = 0;
+    uint16_t h = 0;
+    uint16_t n = 0;
+    uint16_t m = 0;
+    uint16_t g = 0;
+    uint16_t f = 0;
+    uint8_t temp1[2] = {0};
+    uint32_t fontNum = 0;
+    clear_Font_1();
+    LT768_SPI_Init(SCS,1);
+    LT_W25QXX_Read(temp1,FlashAddr+8,2);
+    fontNum = (temp1[0]<<8)+temp1[1];
+    LT_W25QXX_Read(Font_1,FlashAddr + 0xc,fontNum * 2);
+    h = x;
+    k = y;
+    Memory_8bpp_Mode();//使用8位色深来存储图片
+    Canvas_Image_Start_address(MemoryAddr);
+    Canvas_image_width(width);
+
+    while(c[i] != '\0')
+    {
+        temp = Get_User_Font_P(c[i],c[i+1]);
+
+        if(temp>-1)
+        {
+            LT768_DMA_24bit_Block(SCS,Clk,Size*j/8,0,Size/8,Size,Size/8,FlashAddr+temp*((Size*Size)/8)+0x0c+fontNum*2);
+        }
+
+        i+=2;
+        j++;
+    }
+
+    Memory_16bpp_Mode();
+    Canvas_Image_Start_address(ShowAddr);
+    Canvas_image_width(width);
+    j = 0;
+    i = 0;
+
+    if(w>2)
+    {
+        w = 2;
+    }
+
+    for(g=0; g<w+1; g++)
+    {
+        while(c[i] != '\0')
+        {
+            if((f == m)&&((x+Size*j+Size)>(width*(n+1))))
+            {
+                m++;
+                n++;
+                y=y+Size-1+s;
+                x = x+((width*n)-(x+Size*j))+g;
+                f=n;
+            }
+
+            if(ChromaKey==1)
+            {
+                LT768_BTE_Memory_Copy_ColorExpansion_8(MemoryAddr,Size*j/8,
+                                                       ShowAddr,width,x+Size*j,y,
+                                                       Size,Size,FontColor,BackGroundColor
+                                                      );
+            }
+
+            if(ChromaKey==0)
+            {
+                LT768_BTE_Memory_Copy_ColorExpansion_Chroma_key_8(MemoryAddr,Size*j/8,
+                                                                  ShowAddr,width,x+Size*j,y,
+                                                                  Size,Size,FontColor
+                                                                 );
+            }
+
+            i+=2;
+            j++;
+        }
+
+        ChromaKey=0;
+        i=0;
+        j=0;
+        m=0;
+        n=0;
+        f=0;
+        x=h+g+1;
+        y=k+g+1;
+    }
+}
+
+/*----------------------------------------------------------------------------*/
+
+void LT768_Text_cursor_Init
+(
+    uint8_t On_Off_Blinking         // 0：禁止光标闪烁   1：使能光标闪烁
+    ,uint16_t Blinking_Time          // 设置文字光标闪烁时间
+    ,uint16_t X_W                    // 文字光标水平大小
+    ,uint16_t Y_W                    // 文字光标垂直大小
+)
+{
+    if(On_Off_Blinking == 0)
+    {
+        Disable_Text_Cursor_Blinking();
+    }
+
+    if(On_Off_Blinking == 1)
+    {
+        Enable_Text_Cursor_Blinking();
+    }
+
+    Blinking_Time_Frames(Blinking_Time);
+    //[3E][3Fh]
+    Text_Cursor_H_V(X_W,Y_W);
+    Enable_Text_Cursor();
+}
+
+
+void LT768_Enable_Text_Cursor(void)
+{
+    Enable_Text_Cursor();
+}
+
+
+void LT768_Disable_Text_Cursor(void)
+{
+    Disable_Text_Cursor();
+}
+
+
+void LT768_Graphic_cursor_Init
+(
+    uint8_t Cursor_N                  // 选择光标   1:光标1   2:光标2   3:光标3  4:光标4
+    ,uint8_t Color1                    // 颜色1
+    ,uint8_t Color2                    // 颜色2
+    ,uint16_t X_Pos                    // 显示坐标X
+    ,uint16_t Y_Pos                    // 显示坐标Y
+    ,uint8_t *Cursor_Buf               // 光标数据的缓冲首地址
+)
+{
+    uint32_t i ;
+    Memory_Select_Graphic_Cursor_RAM();
+    Graphic_Mode();
+
+    switch(Cursor_N)
+    {
+        case 1:
+            Select_Graphic_Cursor_1();
+            break;
+
+        case 2:
+            Select_Graphic_Cursor_2();
+            break;
+
+        case 3:
+            Select_Graphic_Cursor_3();
+            break;
+
+        case 4:
+            Select_Graphic_Cursor_4();
+            break;
+
+        default:
+            break;
+    }
+
+    LCD_CmdWrite(0x04);
+
+    for(i=0; i<256; i++)
+    {
+        LCD_DataWrite(Cursor_Buf[i]);
+    }
+
+    Memory_Select_SDRAM();//写完后切回SDRAM
+    Set_Graphic_Cursor_Color_1(Color1);
+    Set_Graphic_Cursor_Color_2(Color2);
+    Graphic_Cursor_XY(X_Pos,Y_Pos);
+    Enable_Graphic_Cursor();
+}
+
+
+void LT768_Set_Graphic_cursor_Pos
+(
+    uint8_t Cursor_N                  // 选择光标   1:光标1   2:光标2   3:光标3  4:光标4
+    ,uint16_t X_Pos                    // 显示坐标X
+    ,uint16_t Y_Pos                    // 显示坐标Y
+)
+{
+    Graphic_Cursor_XY(X_Pos,Y_Pos);
+
+    switch(Cursor_N)
+    {
+        case 1:
+            Select_Graphic_Cursor_1();
+            break;
+
+        case 2:
+            Select_Graphic_Cursor_2();
+            break;
+
+        case 3:
+            Select_Graphic_Cursor_3();
+            break;
+
+        case 4:
+            Select_Graphic_Cursor_4();
+            break;
+
+        default:
+            break;
+    }
+}
+
+
+void LT768_Enable_Graphic_Cursor(void)
+{
+    Enable_Graphic_Cursor();
+}
+
+
+void LT768_Disable_Graphic_Cursor(void)
+{
+    Disable_Graphic_Cursor();
+}
+
+/*----------------------------------------------------------------------------*/
+
+void LT768_PIP_Init
+(
+    uint8_t On_Off         // 0 : 禁止 PIP    1 : 使能 PIP    2 : 保持原来的状态
+    ,uint8_t Select_PIP     // 1 : 使用 PIP1   2 : 使用 PIP2
+    ,unsigned long PAddr          // PIP的开始地址
+    ,uint16_t XP            // PIP窗口的X坐标,必须被4整除
+    ,uint16_t YP            // PIP窗口的Y坐标,必须被4整除
+    ,unsigned long ImageWidth     // 底图的宽度
+    ,uint16_t X_Dis         // 显示窗口的X坐标
+    ,uint16_t Y_Dis         // 显示窗口的Y坐标
+    ,uint16_t X_W           // 显示窗口的宽度，必须被4整除
+    ,uint16_t Y_H           // 显示窗口的长度，必须被4整除
+)
+{
+    if(Select_PIP == 1)
+    {
+        Select_PIP1_Window_16bpp();
+        Select_PIP1_Parameter();
+    }
+
+    if(Select_PIP == 2)
+    {
+        Select_PIP2_Window_16bpp();
+        Select_PIP2_Parameter();
+    }
+
+    PIP_Display_Start_XY(X_Dis,Y_Dis);
+    PIP_Image_Start_Address(PAddr);
+    PIP_Image_Width(ImageWidth);
+    PIP_Window_Image_Start_XY(XP,YP);
+    PIP_Window_Width_Height(X_W,Y_H);
+
+    if(On_Off == 0)
+    {
+        if(Select_PIP == 1)
+        {
+            Disable_PIP1();
+        }
+
+        if(Select_PIP == 2)
+        {
+            Disable_PIP2();
+        }
+    }
+
+    if(On_Off == 1)
+    {
+        if(Select_PIP == 1)
+        {
+            Enable_PIP1();
+        }
+
+        if(Select_PIP == 2)
+        {
+            Enable_PIP2();
+        }
+    }
+}
+
+
+void LT768_Set_DisWindowPos
+(
+    uint8_t On_Off         // 0 : 禁止 PIP, 1 : 使能 PIP, 2 : 保持原来的状态
+    ,uint8_t Select_PIP     // 1 : 使用 PIP1 , 2 : 使用 PIP2
+    ,uint16_t X_Dis         // 显示窗口的X坐标
+    ,uint16_t Y_Dis         // 显示窗口的Y坐标
+)
+{
+    if(Select_PIP == 1)
+    {
+        Select_PIP1_Parameter();
+    }
+
+    if(Select_PIP == 2)
+    {
+        Select_PIP2_Parameter();
+    }
+
+    if(On_Off == 0)
+    {
+        if(Select_PIP == 1)
+        {
+            Disable_PIP1();
+        }
+
+        if(Select_PIP == 2)
+        {
+            Disable_PIP2();
+        }
+    }
+
+    if(On_Off == 1)
+    {
+        if(Select_PIP == 1)
+        {
+            Enable_PIP1();
+        }
+
+        if(Select_PIP == 2)
+        {
+            Enable_PIP2();
+        }
+    }
+
+    PIP_Display_Start_XY(X_Dis,Y_Dis);
+}
+
+/*----------------------------------------------------------------------------*/
+
+void BTE_Solid_Fill
+(
+    unsigned long Des_Addr           // 填充的目的地址
+    ,uint16_t Des_W             // 目的地址图片宽度
+    ,uint16_t XDes              // x坐标
+    ,uint16_t YDes              // y坐标
+    ,uint16_t color             // 填充的颜色
+    ,uint16_t X_W               // 填充的长度
+    ,uint16_t Y_H               // 填充的宽度
+)
+{
+    BTE_Destination_Color_16bpp();
+    BTE_Destination_Memory_Start_Address(Des_Addr);
+    BTE_Destination_Image_Width(Des_W);
+    BTE_Destination_Window_Start_XY(XDes,YDes);
+    BTE_Window_Size(X_W,Y_H);
+    Foreground_color_65k(color);
+    BTE_Operation_Code(0x0c);
+    BTE_Enable();
+    Check_BTE_Busy();
+}
+
+/*  结合光栅操作的BTE内存复制 */
+void LT768_BTE_Memory_Copy
+(
+    unsigned long S0_Addr     // SO图像的内存起始地址
+    ,uint16_t S0_W       // S0图像的宽度
+    ,uint16_t XS0        // S0图像的左上方X坐标
+    ,uint16_t YS0        // S0图像的左上方Y坐标
+    ,unsigned long S1_Addr     // S1图像的内存起始地址
+    ,uint16_t S1_W       // S1图像的宽度
+    ,uint16_t XS1        // S1图像的左上方X坐标
+    ,uint16_t YS1        // S1图像的左上方Y坐标
+    ,unsigned long Des_Addr    // 目的图像的内存起始地址
+    ,uint16_t Des_W      // 目的图像的宽度
+    ,uint16_t XDes       // 目的图像的左上方X坐标
+    ,uint16_t YDes       // 目的图像的左上方Y坐标
+    ,uint32_t ROP_Code     // 光栅操作模式
+    /*ROP_Code :
+       0000b    0(Blackness)
+       0001b    ~S0!E~S1 or ~(S0+S1)
+       0010b    ~S0!ES1
+       0011b    ~S0
+       0100b    S0!E~S1
+       0101b    ~S1
+       0110b    S0^S1
+       0111b    ~S0 + ~S1 or ~(S0 + S1)
+       1000b    S0!ES1
+       1001b    ~(S0^S1)
+       1010b    S1
+       1011b    ~S0+S1
+       1100b    S0
+       1101b    S0+~S1
+       1110b    S0+S1
+       1111b    1(whiteness)*/
+    ,uint16_t X_W       // 活动窗口的宽度
+    ,uint16_t Y_H       // 活动窗口的长度
+)
+{
+    BTE_S0_Color_16bpp();
+    BTE_S0_Memory_Start_Address(S0_Addr);
+    BTE_S0_Image_Width(S0_W);
+    BTE_S0_Window_Start_XY(XS0,YS0);
+    BTE_S1_Color_16bpp();
+    BTE_S1_Memory_Start_Address(S1_Addr);
+    BTE_S1_Image_Width(S1_W);
+    BTE_S1_Window_Start_XY(XS1,YS1);
+    BTE_Destination_Color_16bpp();
+    BTE_Destination_Memory_Start_Address(Des_Addr);
+    BTE_Destination_Image_Width(Des_W);
+    BTE_Destination_Window_Start_XY(XDes,YDes);
+    BTE_ROP_Code(ROP_Code);
+    BTE_Operation_Code(0x02); //BTE Operation: Memory copy (move) with ROP.
+    BTE_Window_Size(X_W,Y_H);
+    BTE_Enable();
+    Check_BTE_Busy();
+}
+
+
+/*  结合 Chroma Key 的内存复制（不含 ROP） */
+void LT768_BTE_Memory_Copy_Chroma_key
+(
+    unsigned long S0_Addr             // SO图像的内存起始地址
+    ,uint16_t S0_W               // S0图像的宽度
+    ,uint16_t XS0                // S0图像的左上方X坐标
+    ,uint16_t YS0                // S0图像的左上方Y坐标
+    ,unsigned long Des_Addr            // 目的图像的内存起始地址
+    ,uint16_t Des_W              // 目的图像的宽度
+    ,uint16_t XDes               // 目的图像的左上方X坐标
+    ,uint16_t YDes               // 目的图像的左上方X坐标
+    ,unsigned long Background_color    // 透明色
+    ,uint16_t X_W                // 活动窗口的宽度
+    ,uint16_t Y_H                // 活动窗口的长度
+)
+{
+    Background_color_65k(Background_color);
+    BTE_S0_Color_16bpp();
+    BTE_S0_Memory_Start_Address(S0_Addr);
+    BTE_S0_Image_Width(S0_W);
+    BTE_S0_Window_Start_XY(XS0,YS0);
+    BTE_Destination_Color_16bpp();
+    BTE_Destination_Memory_Start_Address(Des_Addr);
+    BTE_Destination_Image_Width(Des_W);
+    BTE_Destination_Window_Start_XY(XDes,YDes);
+    BTE_Operation_Code(0x05);  //BTE Operation: Memory copy (move) with chroma keying (w/o ROP)
+    BTE_Window_Size(X_W,Y_H);
+    BTE_Enable();
+    Check_BTE_Busy();
+}
+
+
+void LT768_BTE_Pattern_Fill
+(
+    uint8_t P_8x8_or_16x16      // 0 : use 8x8 Icon , 1 : use 16x16 Icon.
+    ,unsigned long S0_Addr             // SO图像的内存起始地址
+    ,uint16_t S0_W               // S0图像的宽度
+    ,uint16_t XS0                // S0图像的左上方X坐标
+    ,uint16_t YS0                // S0图像的左上方Y坐标
+    ,unsigned long Des_Addr            // 目的图像的内存起始地址
+    ,uint16_t Des_W              // 目的图像的宽度
+    , uint16_t XDes              // 目的图像的左上方X坐标
+    ,uint16_t YDes               // 目的图像的左上方X坐标
+    ,uint32_t ROP_Code             // 光栅操作模式
+    /*ROP_Code :
+       0000b    0(Blackness)
+       0001b    ~S0!E~S1 or ~(S0+S1)
+       0010b    ~S0!ES1
+       0011b    ~S0
+       0100b    S0!E~S1
+       0101b    ~S1
+       0110b    S0^S1
+       0111b    ~S0 + ~S1 or ~(S0 + S1)
+       1000b    S0!ES1
+       1001b    ~(S0^S1)
+       1010b    S1
+       1011b    ~S0+S1
+       1100b    S0
+       1101b    S0+~S1
+       1110b    S0+S1
+       1111b    1(whiteness)*/
+    ,uint16_t X_W                // 活动窗口的宽度
+    ,uint16_t Y_H                // 活动窗口的长度
+)
+{
+    if(P_8x8_or_16x16 == 0)
+    {
+        Pattern_Format_8X8();
+    }
+
+    if(P_8x8_or_16x16 == 1)
+    {
+        Pattern_Format_16X16();
+    }
+
+    BTE_S0_Color_16bpp();
+    BTE_S0_Memory_Start_Address(S0_Addr);
+    BTE_S0_Image_Width(S0_W);
+    BTE_S0_Window_Start_XY(XS0,YS0);
+    BTE_Destination_Color_16bpp();
+    BTE_Destination_Memory_Start_Address(Des_Addr);
+    BTE_Destination_Image_Width(Des_W);
+    BTE_Destination_Window_Start_XY(XDes,YDes);
+    BTE_ROP_Code(ROP_Code);
+    BTE_Operation_Code(0x06); //BTE Operation: Pattern Fill with ROP.
+    BTE_Window_Size(X_W,Y_H);
+    BTE_Enable();
+    Check_BTE_Busy();
+}
+
+
+
+void LT768_BTE_Pattern_Fill_With_Chroma_key
+(
+    uint8_t P_8x8_or_16x16      // 0 : use 8x8 Icon , 1 : use 16x16 Icon.
+    ,unsigned long S0_Addr             // SO图像的内存起始地址
+    ,uint16_t S0_W               // S0图像的宽度
+    ,uint16_t XS0                // S0图像的左上方X坐标
+    ,uint16_t YS0                // S0图像的左上方Y坐标
+    ,unsigned long Des_Addr            // 目的图像的内存起始地址
+    ,uint16_t Des_W              // 目的图像的宽度
+    ,uint16_t XDes               // 目的图像的左上方X坐标
+    ,uint16_t YDes               // 目的图像的左上方Y坐标
+    ,uint32_t ROP_Code             // 光栅操作模式
+    /*ROP_Code :
+       0000b    0(Blackness)
+       0001b    ~S0!E~S1 or ~(S0+S1)
+       0010b    ~S0!ES1
+       0011b    ~S0
+       0100b    S0!E~S1
+       0101b    ~S1
+       0110b    S0^S1
+       0111b    ~S0 + ~S1 or ~(S0 + S1)
+       1000b    S0!ES1
+       1001b    ~(S0^S1)
+       1010b    S1
+       1011b    ~S0+S1
+       1100b    S0
+       1101b    S0+~S1
+       1110b    S0+S1
+       1111b    1(whiteness)*/
+    ,unsigned long Background_color   // 透明色
+    ,uint16_t X_W               // 活动窗口的宽度
+    ,uint16_t Y_H               // 活动窗口的长度
+)
+{
+    Background_color_65k(Background_color);
+
+    if(P_8x8_or_16x16 == 0)
+    {
+        Pattern_Format_8X8();
+    }
+
+    if(P_8x8_or_16x16 == 1)
+    {
+        Pattern_Format_16X16();
+    }
+
+    BTE_S0_Color_16bpp();
+    BTE_S0_Memory_Start_Address(S0_Addr);
+    BTE_S0_Image_Width(S0_W);
+    BTE_S0_Window_Start_XY(XS0,YS0);
+    BTE_Destination_Color_16bpp();
+    BTE_Destination_Memory_Start_Address(Des_Addr);
+    BTE_Destination_Image_Width(Des_W);
+    BTE_Destination_Window_Start_XY(XDes,YDes);
+    BTE_ROP_Code(ROP_Code);
+    BTE_Operation_Code(0x07); //BTE Operation: Pattern Fill with Chroma key.
+    BTE_Window_Size(X_W,Y_H);
+    BTE_Enable();
+    Check_BTE_Busy();
+}
+
+
+
+void LT768_BTE_MCU_Write_MCU_16bit
+(
+    unsigned long S1_Addr              // S1图像的内存起始地址
+    ,uint16_t S1_W                // S1图像的宽度
+    ,uint16_t XS1                 // S1图像的左上方X坐标
+    ,uint16_t YS1                 // S1图像的左上方Y坐标
+    ,unsigned long Des_Addr             // 目的图像的内存起始地址
+    ,uint16_t Des_W               // 目的图像的宽度
+    ,uint16_t XDes                // 目的图像的左上方X坐标
+    ,uint16_t YDes                // 目的图像的左上方Y坐标
+    ,uint32_t ROP_Code              // 光栅操作模式
+    /*ROP_Code :
+       0000b    0(Blackness)
+       0001b    ~S0!E~S1 or ~(S0+S1)
+       0010b    ~S0!ES1
+       0011b    ~S0
+       0100b    S0!E~S1
+       0101b    ~S1
+       0110b    S0^S1
+       0111b    ~S0 + ~S1 or ~(S0 + S1)
+       1000b    S0!ES1
+       1001b    ~(S0^S1)
+       1010b    S1
+       1011b    ~S0+S1
+       1100b    S0
+       1101b    S0+~S1
+       1110b    S0+S1
+       1111b    1(whiteness)*/
+    ,uint16_t X_W                 // 活动窗口的宽度
+    ,uint16_t Y_H                 // 活动窗口的长度
+    ,const uint16_t *data         // S0的数据首地址
+)
+{
+    uint16_t i,j;
+    BTE_S1_Color_16bpp();
+    BTE_S1_Memory_Start_Address(S1_Addr);
+    BTE_S1_Image_Width(S1_W);
+    BTE_S1_Window_Start_XY(XS1,YS1);
+    BTE_Destination_Color_16bpp();
+    BTE_Destination_Memory_Start_Address(Des_Addr);
+    BTE_Destination_Image_Width(Des_W);
+    BTE_Destination_Window_Start_XY(XDes,YDes);
+    BTE_Window_Size(X_W,Y_H);
+    BTE_ROP_Code(ROP_Code);
+    BTE_Operation_Code(0x00);    //BTE Operation: MPU Write with ROP.
+    BTE_Enable();
+    BTE_S0_Color_16bpp();
+    LCD_CmdWrite(0x04);             //Memory Data Read/Write Port
+
+    //MCU_16bit_ColorDepth_16bpp
+    for(i=0; i< Y_H; i++)
+    {
+        for(j=0; j< (X_W); j++)
+        {
+            Check_Mem_WR_FIFO_not_Full();
+            LCD_DataWrite_Pixel((*data));
+            data++;
+        }
+    }
+
+    Check_Mem_WR_FIFO_Empty();
+    Check_BTE_Busy();
+}
+
+
+
+void LT768_BTE_MCU_Write_Chroma_key_MCU_16bit
+(
+    unsigned long Des_Addr                 // 目的图像的内存起始地址
+    ,uint16_t Des_W                   // 目的图像的宽度
+    ,uint16_t XDes                    // 目的图像的左上方X坐标
+    ,uint16_t YDes                    // 目的图像的左上方Y坐标
+    ,unsigned long Background_color         // 透明色
+    ,uint16_t X_W                     // 活动窗口的宽度
+    ,uint16_t Y_H                     // 活动窗口的长度
+    ,const uint16_t *data             // S0的数据收地址
+)
+{
+    uint32_t i,j;
+    Background_color_65k(Background_color);
+    BTE_Destination_Color_16bpp();
+    BTE_Destination_Memory_Start_Address(Des_Addr);
+    BTE_Destination_Image_Width(Des_W);
+    BTE_Destination_Window_Start_XY(XDes,YDes);
+    BTE_Window_Size(X_W,Y_H);
+    BTE_Operation_Code(0x04);    //BTE Operation: MPU Write with chroma keying (w/o ROP)
+    BTE_Enable();
+    BTE_S0_Color_16bpp();
+    LCD_CmdWrite(0x04);      //Memory Data Read/Write Port
+
+    //MCU_16bit_ColorDepth_16bpp
+    for(i=0; i< Y_H; i++)
+    {
+        for(j=0; j< (X_W); j++)
+        {
+            Check_Mem_WR_FIFO_not_Full();
+            LCD_DataWrite_Pixel((*data));
+            data++;
+        }
+    }
+
+    Check_Mem_WR_FIFO_Empty();
+    Check_BTE_Busy();
+}
+
+
+/* 结合扩展色彩的 MPU 寫入 */
+void LT768_BTE_MCU_Write_ColorExpansion_MCU_16bit
+(
+    unsigned long Des_Addr               // 目的图像的内存起始地址
+    ,uint16_t Des_W                 // 目的图像的宽度
+    ,uint16_t XDes                  // 目的图像的左上方X坐标
+    ,uint16_t YDes                  // 目的图像的左上方Y坐标
+    ,uint16_t X_W                   // 活动窗口的宽度
+    ,uint16_t Y_H                   // 活动窗口的长度
+    ,unsigned long Foreground_color       // 前景色
+    /*Foreground_color : The source (1bit map picture) map data 1 translate to Foreground color by color expansion*/
+    ,unsigned long Background_color       // 背景色
+    /*Background_color : The source (1bit map picture) map data 0 translate to Background color by color expansion*/
+    ,const uint16_t *data           // 数据缓存首地址
+)
+{
+    uint16_t i,j;
+    RGB_16b_16bpp();
+    Foreground_color_65k(Foreground_color);
+    Background_color_65k(Background_color);
+    BTE_ROP_Code(15);
+    BTE_Destination_Color_16bpp();
+    BTE_Destination_Memory_Start_Address(Des_Addr);
+    BTE_Destination_Image_Width(Des_W);
+    BTE_Destination_Window_Start_XY(XDes,YDes);
+    BTE_Window_Size(X_W,Y_H);
+    BTE_Operation_Code(0x8);    //BTE Operation: MPU Write with Color Expansion (w/o ROP)
+    BTE_Enable();
+    LCD_CmdWrite(0x04);             //Memory Data Read/Write Port
+
+    for(i=0; i< Y_H; i++)
+    {
+        for(j=0; j< X_W/16; j++)
+        {
+            Check_Mem_WR_FIFO_not_Full();
+            LCD_DataWrite_Pixel(*data);
+            data++;
+        }
+    }
+
+    Check_Mem_WR_FIFO_Empty();
+    Check_BTE_Busy();
+}
+
+/* 结合扩展色彩与 Chroma key 的 MPU 寫入 */
+void LT768_BTE_MCU_Write_ColorExpansion_Chroma_key_MCU_16bit
+(
+    unsigned long Des_Addr            // 目的图像的内存起始地址
+    ,uint16_t Des_W              // 目的图像的宽度
+    ,uint16_t XDes               // 目的图像的左上方X坐标
+    ,uint16_t YDes               // 目的图像的左上方Y坐标
+    ,uint16_t X_W                // 活动窗口的宽度
+    ,uint16_t Y_H                // 活动窗口的长度
+    ,unsigned long Foreground_color    // 前景色
+    /*Foreground_color : The source (1bit map picture) map data 1 translate to Foreground color by color expansion*/
+    ,const uint16_t *data        // 数据缓存首地址
+)
+{
+    uint16_t i,j;
+    RGB_16b_16bpp();
+    Foreground_color_65k(Foreground_color);
+    BTE_ROP_Code(15);
+    BTE_Destination_Color_16bpp();
+    BTE_Destination_Memory_Start_Address(Des_Addr);
+    BTE_Destination_Image_Width(Des_W);
+    BTE_Destination_Window_Start_XY(XDes,YDes);
+    BTE_Window_Size(X_W,Y_H);
+    BTE_Operation_Code(0x9);    //BTE Operation: MPU Write with Color Expansion and chroma keying (w/o ROP)
+    BTE_Enable();
+    LCD_CmdWrite(0x04);             //Memory Data Read/Write Port
+
+    for(i=0; i< Y_H; i++)
+    {
+        for(j=0; j< X_W/16; j++)
+        {
+            Check_Mem_WR_FIFO_not_Full();
+            LCD_DataWrite_Pixel(*data);
+            data++;
+        }
+    }
+
+    Check_Mem_WR_FIFO_Empty();
+    Check_BTE_Busy();
+}
+
+/* 结合透明度的内存复制 */
+void BTE_Alpha_Blending
+(
+    unsigned long S0_Addr         // SO图像的内存起始地址
+    ,uint16_t S0_W          // S0图像的宽度
+    ,uint16_t XS0           // S0图像的左上方X坐标
+    ,uint16_t YS0           // S0图像的左上方Y坐标
+    ,unsigned long S1_Addr        // S1图像的内存起始地址
+    ,uint16_t S1_W          // S1图像的宽度
+    ,uint16_t XS1           // S1图像的左上方X坐标
+    ,uint16_t YS1           // S1图像的左上方Y坐标
+    ,unsigned long Des_Addr       // 目的图像的内存起始地址
+    ,uint16_t Des_W         // 目的图像的宽度
+    ,uint16_t XDes          // 目的图像的左上方X坐标
+    ,uint16_t YDes          // 目的图像的左上方X坐标
+    ,uint16_t X_W           // 活动窗口的宽度
+    ,uint16_t Y_H           // 活动窗口的长度
+    ,uint8_t alpha          // 透明度等级（32等级）
+)
+{
+    BTE_S0_Color_16bpp();
+    BTE_S0_Memory_Start_Address(S0_Addr);
+    BTE_S0_Image_Width(S0_W);
+    BTE_S0_Window_Start_XY(XS0,YS0);
+    BTE_S1_Color_16bpp();
+    BTE_S1_Memory_Start_Address(S1_Addr);
+    BTE_S1_Image_Width(S1_W);
+    BTE_S1_Window_Start_XY(XS1,YS1);
+    BTE_Destination_Color_16bpp();
+    BTE_Destination_Memory_Start_Address(Des_Addr);
+    BTE_Destination_Image_Width(Des_W);
+    BTE_Destination_Window_Start_XY(XDes,YDes);
+    BTE_Window_Size(X_W,Y_H);
+    BTE_Operation_Code(0x0A);    //BTE Operation: Memory write with opacity (w/o ROP)
+    BTE_Alpha_Blending_Effect(alpha);
+    BTE_Enable();
+    Check_BTE_Busy();
+}
+
+void BTE_Pixel_8bpp_Alpha_Blending
+(
+    unsigned long S0_Addr         // SO图像的内存起始地址
+    ,uint16_t S0_W          // S0图像的宽度
+    ,uint16_t XS0           // S0图像的左上方X坐标
+    ,uint16_t YS0           // S0图像的左上方Y坐标
+    ,unsigned long S1_Addr        // S1图像的内存起始地址
+    ,uint16_t S1_W          // S1图像的宽度
+    ,uint16_t XS1           // S1图像的左上方X坐标
+    ,uint16_t YS1           // S1图像的左上方Y坐标
+    ,unsigned long Des_Addr       // 目的图像的内存起始地址
+    ,uint16_t Des_W         // 目的图像的宽度
+    ,uint16_t XDes          // 目的图像的左上方X坐标
+    ,uint16_t YDes          // 目的图像的左上方X坐标
+    ,uint16_t X_W           // 活动窗口的宽度
+    ,uint16_t Y_H           // 活动窗口的长度
+)
+{
+    BTE_S0_Color_8bpp();
+    BTE_S0_Memory_Start_Address(S0_Addr);
+    BTE_S0_Image_Width(S0_W);
+    BTE_S0_Window_Start_XY(XS0,YS0);
+    BTE_S1_Color_8bit_Alpha();
+    BTE_S1_Memory_Start_Address(S1_Addr);
+    BTE_S1_Image_Width(S1_W);
+    BTE_S1_Window_Start_XY(XS1,YS1);
+    BTE_Destination_Color_8bpp();
+    BTE_Destination_Memory_Start_Address(Des_Addr);
+    BTE_Destination_Image_Width(Des_W);
+    BTE_Destination_Window_Start_XY(XDes,YDes);
+    BTE_Window_Size(X_W,Y_H);
+    BTE_Operation_Code(0x0A);    //BTE Operation: Memory write with opacity (w/o ROP)
+    BTE_Enable();
+    Check_BTE_Busy();
+}
+
+void BTE_Pixel_16bpp_Alpha_Blending
+(
+    unsigned long S0_Addr         // SO图像的内存起始地址
+    ,uint16_t S0_W          // S0图像的宽度
+    ,uint16_t XS0           // S0图像的左上方X坐标
+    ,uint16_t YS0           // S0图像的左上方Y坐标
+    ,unsigned long S1_Addr        // S1图像的内存起始地址
+    ,uint16_t S1_W          // S1图像的宽度
+    ,uint16_t XS1           // S1图像的左上方X坐标
+    ,uint16_t YS1           // S1图像的左上方Y坐标
+    ,unsigned long Des_Addr       // 目的图像的内存起始地址
+    ,uint16_t Des_W         // 目的图像的宽度
+    ,uint16_t XDes          // 目的图像的左上方X坐标
+    ,uint16_t YDes          // 目的图像的左上方X坐标
+    ,uint16_t X_W           // 活动窗口的宽度
+    ,uint16_t Y_H           // 活动窗口的长度
+)
+{
+    BTE_S0_Color_16bpp();
+    BTE_S0_Memory_Start_Address(S0_Addr);
+    BTE_S0_Image_Width(S0_W);
+    BTE_S0_Window_Start_XY(XS0,YS0);
+    BTE_S1_Color_16bit_Alpha();
+    BTE_S1_Memory_Start_Address(S1_Addr);
+    BTE_S1_Image_Width(S1_W);
+    BTE_S1_Window_Start_XY(XS1,YS1);
+    BTE_Destination_Color_16bpp();
+    BTE_Destination_Memory_Start_Address(Des_Addr);
+    BTE_Destination_Image_Width(Des_W);
+    BTE_Destination_Window_Start_XY(XDes,YDes);
+    BTE_Window_Size(X_W,Y_H);
+    BTE_Operation_Code(0x0A);    //BTE Operation: Memory write with opacity (w/o ROP)
+    BTE_Enable();
+    Check_BTE_Busy();
+}
+
+/*----------------------------------------------------------------------------*/
+
+void LT768_PWM0_Init
+(
+    uint8_t on_off                       // 0：禁止PWM0    1：使能PWM0
+    ,uint8_t Clock_Divided                // PWM时钟分频  取值范围 0~3(1,1/2,1/4,1/8)
+    ,uint8_t Prescalar                    // 时钟分频     取值范围 1~256
+    ,uint16_t Count_Buffer                // 设置PWM的输出周期
+    ,uint16_t Compare_Buffer              // 设置占空比
+)
+{
+    Select_PWM0();
+    Set_PWM_Prescaler_1_to_256(Prescalar);
+
+    if(Clock_Divided ==0)
+    {
+        Select_PWM0_Clock_Divided_By_1();
+    }
+
+    if(Clock_Divided ==1)
+    {
+        Select_PWM0_Clock_Divided_By_2();
+    }
+
+    if(Clock_Divided ==2)
+    {
+        Select_PWM0_Clock_Divided_By_4();
+    }
+
+    if(Clock_Divided ==3)
+    {
+        Select_PWM0_Clock_Divided_By_8();
+    }
+
+    Set_Timer0_Count_Buffer(Count_Buffer);
+    Set_Timer0_Compare_Buffer(Compare_Buffer);
+
+    if(on_off == 1)
+    {
+        Start_PWM0();
+    }
+
+    if(on_off == 0)
+    {
+        Stop_PWM0();
+    }
+}
+
+
+void LT768_PWM0_Duty(uint16_t Compare_Buffer)
+{
+    Set_Timer0_Compare_Buffer(Compare_Buffer);
+}
+
+void LT768_PWM1_Init
+(
+    uint8_t on_off                       // 0：禁止PWM0    1：使能PWM0
+    ,uint8_t Clock_Divided                // PWM时钟分频  取值范围 0~3(1,1/2,1/4,1/8)
+    ,uint8_t Prescalar                    // 时钟分频     取值范围 1~256
+    ,uint16_t Count_Buffer                // 设置PWM的输出周期
+    ,uint16_t Compare_Buffer              // 设置占空比
+)
+{
+    Select_PWM1();
+    Set_PWM_Prescaler_1_to_256(Prescalar);
+
+    if(Clock_Divided ==0)
+    {
+        Select_PWM1_Clock_Divided_By_1();
+    }
+
+    if(Clock_Divided ==1)
+    {
+        Select_PWM1_Clock_Divided_By_2();
+    }
+
+    if(Clock_Divided ==2)
+    {
+        Select_PWM1_Clock_Divided_By_4();
+    }
+
+    if(Clock_Divided ==3)
+    {
+        Select_PWM1_Clock_Divided_By_8();
+    }
+
+    Set_Timer1_Count_Buffer(Count_Buffer);
+    Set_Timer1_Compare_Buffer(Compare_Buffer);
+
+    if(on_off == 1)
+    {
+        Start_PWM1();
+    }
+
+    if(on_off == 0)
+    {
+        Stop_PWM1();
+    }
+}
+
+
+void LT768_PWM1_Duty(uint16_t Compare_Buffer)
+{
+    Set_Timer1_Compare_Buffer(Compare_Buffer);
+}
+
+/*----------------------------------------------------------------------------*/
+
+// LT768进入待命模式
+void LT768_Standby(void)
+{
+    Power_Saving_Standby_Mode();
+    Check_Power_is_Saving();
+}
+// 从待命模式中唤醒
+void LT768_Wkup_Standby(void)
+{
+    Power_Normal_Mode();
+    Check_Power_is_Normal();
+}
+
+
+// LT768进入暂停模式
+void LT768_Suspend(void)
+{
+    lt768_sdram_init(10);
+    Power_Saving_Suspend_Mode();
+    Check_Power_is_Saving();
+}
+// 从暂停模式中唤醒
+void LT768_Wkup_Suspend(void)
+{
+    Power_Normal_Mode();
+    Check_Power_is_Normal();
+    lt768_sdram_init(lt768_mclk);
+}
+
+
+// LT768进入休眠模式
+void LT768_SleepMode(void)
+{
+    Power_Saving_Sleep_Mode();
+    Check_Power_is_Saving();
+}
+// 从休眠模式中唤醒
+void LT768_Wkup_Sleep(void)
+{
+    Power_Normal_Mode();
+    Check_Power_is_Normal();
+}
+
+/*----------------------------------------------------------------------------*/
+
+void LT768_SPI_Init(uint8_t cs,uint8_t div)
+{
+    if(cs == 0)
+    {
+        Select_SFI_0();
+        Select_nSS_drive_on_xnsfcs0();
+    }
+    else
+    {
+        Select_SFI_1();
+        Select_nSS_drive_on_xnsfcs1();
+    }
+
+    SPI_Clock_Period(div);
+    Enable_SFlash_SPI();
+}
+
+void W25QXX_Enter_4Byte_AddressMode(void)//val:选择外挂的SPI: SCS：0  SCS：1
+{
+    nSS_Active();
+    SPI_Master_FIFO_Data_Put(0xB7);
+    nSS_Inactive();
+}
+
+void LT_W25QXX_Read(uint8_t *pBuffer,uint32_t ReadAddr,uint16_t NumByteToRead)
+{
+    uint16_t i;
+    nSS_Active();
+    SPI_Master_FIFO_Data_Put(0x03);
+    SPI_Master_FIFO_Data_Put((uint8_t)((ReadAddr)>>16));
+    SPI_Master_FIFO_Data_Put((uint8_t)((ReadAddr)>>8));
+    SPI_Master_FIFO_Data_Put((uint8_t)ReadAddr);
+
+    for(i=0; i<NumByteToRead; i++)
+    {
+        pBuffer[i]=SPI_Master_FIFO_Data_Put(0XFF);
+    }
+
+    nSS_Inactive();
+}
+
+/*----------------------------------------------------------------------------*/
+
+uint8_t W25N01GV_ReadSR(uint8_t reg)
+{
+    uint8_t byte = 0;
+    nSS_Active();
+    SPI_Master_FIFO_Data_Put(0x0f);
+    SPI_Master_FIFO_Data_Put(reg);
+    byte = SPI_Master_FIFO_Data_Put(0Xff);
+    nSS_Inactive();
+    return byte;
+}
+
+void W25N01GV_Write_SR(uint8_t reg,uint8_t val)
+{
+    nSS_Active();
+    SPI_Master_FIFO_Data_Put(0x1f);
+    SPI_Master_FIFO_Data_Put(reg);
+    SPI_Master_FIFO_Data_Put(val);
+    nSS_Inactive();
+}
+
+void W25N01GV_Wait_Busy(void)
+{
+    while((W25N01GV_ReadSR(0xC0)&0x01)==0x01);
+}
+
+void W25N01GV_ContinuousRead_Mode(void)
+{
+    uint8_t statut = 0;
+    statut = W25N01GV_ReadSR(0xb0);
+    statut &= cClrb3;
+    statut &= cClrb4;
+    statut |= cSetb4;
+    W25N01GV_Write_SR(0xb0,statut);
+}
+
+void W25N01GV_Write_Page(uint16_t page)
+{
+    nSS_Active();
+    SPI_Master_FIFO_Data_Put(0x13);
+    SPI_Master_FIFO_Data_Put(0x00);
+    SPI_Master_FIFO_Data_Put((uint8_t)(page>>8));
+    SPI_Master_FIFO_Data_Put((uint8_t)page);
+    nSS_Inactive();
+    W25N01GV_Wait_Busy();
+}
+
+void W25N01GV_ReadPageAddr_Data(uint8_t *pBuffer,uint32_t PageNum,uint32_t PageAddr,uint16_t NumByteToRead)
+{
+    uint16_t i;
+    //------从flash读数据到BUFF-----
+    nSS_Active();                                  //使能器件
+    SPI_Master_FIFO_Data_Put(0x13);
+    SPI_Master_FIFO_Data_Put(0x00);
+    SPI_Master_FIFO_Data_Put((uint8_t)((PageNum)>>8));    //发送16bit地址
+    SPI_Master_FIFO_Data_Put((uint8_t)(PageNum));
+    nSS_Inactive();
+    W25N01GV_Wait_Busy();
+    W25N01GV_Write_SR(0xb0,W25N01GV_ReadSR(0xb0) | 0x08);  //设定从BUFF的哪个位置开始读
+    //------再从BUFF读数据到单片机内-----
+    nSS_Active();
+    SPI_Master_FIFO_Data_Put(0x03);
+    SPI_Master_FIFO_Data_Put((PageAddr)>>8);
+    SPI_Master_FIFO_Data_Put(PageAddr);
+    SPI_Master_FIFO_Data_Put(0x00);
+
+    for(i=0; i<NumByteToRead; i++)
+    {
+        pBuffer[i]=SPI_Master_FIFO_Data_Put(0XFF);     //循环读数
+    }
+
+    nSS_Active();
+    W25N01GV_Wait_Busy();
+}
+
+void LT_W25N01GV_Read(uint8_t *pBuffer,uint32_t ReadAddr,uint16_t NumByteToRead)//读2k以内数据，从页0位置开始读
+{
+    uint16_t page,endpage,remainder;
+    remainder = ReadAddr%2048;//图片在一页中的起始位置
+    page = (ReadAddr/2048);//图片起始地址所在的页编号（页地址）
+    endpage = ((ReadAddr+NumByteToRead)/2048);//图片终止地址所在的页编号（页地址）
+    LT768_SPI_Init(1,1);
+
+    if(page == endpage)
+    {
+        W25N01GV_ReadPageAddr_Data(pBuffer,page,remainder,NumByteToRead);
+    }
+    else
+    {
+        W25N01GV_ReadPageAddr_Data(pBuffer,page,remainder,2048 - remainder);
+        W25N01GV_ReadPageAddr_Data(&pBuffer[2048 - remainder],endpage,0,NumByteToRead - (2048 - remainder));
+    }
+}
+
+//参数：X1：   在显示区域里指定显示的起始坐标x
+//      Y1:    在显示区域里指定显示的起始坐标y
+//      X_W:    图片的宽度
+//      Y_H:    图片的高度
+//      Addr: 图片在FLASH的存储起始地址
+//      lay0: 显示区   (用于显示最终处理好的图片)
+//      lay1: 缓存区1  (用于存放最终处理好的图片)
+
+void LT768_Nand_Pic
+(
+    uint8_t SCS
+    ,uint16_t X1
+    ,uint16_t Y1
+    ,uint16_t X_W
+    ,uint16_t Y_H
+    ,unsigned long Addr
+    ,unsigned long lay0
+    ,unsigned long lay1
+)
+{
+    uint16_t page,endpage,remainder,X_W4 = 0;
+    remainder = Addr%2048;//图片在一页中的起始位置
+    page = (Addr/2048);//图片起始地址所在的页编号（页地址）
+
+    if(X_W % 4 != 0)
+    {
+        X_W4 = (X_W / 4) * 4 + 4;
+    }
+    else
+    {
+        X_W4 = X_W;
+    }
+
+    endpage = ((Addr+X_W4 * Y_H * 2)/2048);//图片终止地址所在的页编号（页地址）
+    LT768_SPI_Init(SCS,1);
+    W25N01GV_ContinuousRead_Mode();
+    W25N01GV_Write_Page(page);
+    LT768_DMA_24bit_Linear(1,1,0,lay1 - remainder,((endpage-page+1)*2048));//往图层2传入图片所在的页的所有数据
+    Canvas_Image_Start_address(lay0);
+    Canvas_image_width(LCD_XSIZE_TFT);
+    LT768_BTE_Memory_Copy(lay1,X_W4,0,0,
+                          lay1,X_W4,0,0,
+                          lay0,LCD_XSIZE_TFT,X1,Y1,
+                          0x0c,X_W,Y_H);
+}
+
+void NandFlash_Select_Outside_Font_Init
+(
+    uint8_t SCS           // 选择外挂的SPI   : SCS：0       SCS：1
+    ,uint8_t Clk           // SPI时钟分频参数 : SPI Clock = System Clock /{(Clk+1)*2}
+    ,unsigned long FlashAddr     // 源地址(Flash)
+    ,unsigned long MemoryAddr    // 目的地址(SDRAM)
+    ,unsigned long Num           // 字库的数据量大小
+    ,uint8_t Size          // 设置字体大小  16：16*16     24:24*24    32:32*32
+    ,uint8_t XxN           // 字体的宽度放大倍数：1~4
+    ,uint8_t YxN           // 字体的高度放大倍数：1~4
+    ,uint8_t ChromaKey     // 0：字体背景色透明    1：可以设置字体的背景色
+    ,uint8_t Alignment     // 0：不字体不对齐      1：字体对齐
+)
+{
+    uint16_t page,endpage,remainder;
+    remainder = FlashAddr%2048;//字库在一页中的起始位置
+    page = (FlashAddr/2048);//字库起始地址所在的页编号（页地址）
+    endpage = ((FlashAddr+Num)/2048);//字库终止地址所在的页编号（页地址）
+    LT768_SPI_Init(1,1);
+    W25N01GV_ContinuousRead_Mode();
+    W25N01GV_Write_Page(page);
+
+    if(Size==16)
+    {
+        Font_Select_8x16_16x16();
+    }
+
+    if(Size==24)
+    {
+        Font_Select_12x24_24x24();
+    }
+
+    if(Size==32)
+    {
+        Font_Select_16x32_32x32();
+    }
+
+    //(*)
+    if(XxN==1)
+    {
+        Font_Width_X1();
+    }
+
+    if(XxN==2)
+    {
+        Font_Width_X2();
+    }
+
+    if(XxN==3)
+    {
+        Font_Width_X3();
+    }
+
+    if(XxN==4)
+    {
+        Font_Width_X4();
+    }
+
+    //(*)
+    if(YxN==1)
+    {
+        Font_Height_X1();
+    }
+
+    if(YxN==2)
+    {
+        Font_Height_X2();
+    }
+
+    if(YxN==3)
+    {
+        Font_Height_X3();
+    }
+
+    if(YxN==4)
+    {
+        Font_Height_X4();
+    }
+
+    //(*)
+    if(ChromaKey==0)
+    {
+        Font_Background_select_Color();
+    }
+
+    if(ChromaKey==1)
+    {
+        Font_Background_select_Transparency();
+    }
+
+    //(*)
+    if(Alignment==0)
+    {
+        Disable_Font_Alignment();
+    }
+
+    if(Alignment==1)
+    {
+        Enable_Font_Alignment();
+    }
+
+    LT768_DMA_24bit_Linear(SCS,Clk,FlashAddr,MemoryAddr,(endpage-page+1)*2048);
+    CGRAM_Start_address(MemoryAddr+remainder);
+}
+
+void LT768_BTE_Memory_Copy_8
+(
+    unsigned long S0_Addr    // SO图像的内存起始地址
+    ,uint16_t S0_W    // S0图像的宽度
+    ,uint16_t XS0      // S0图像的左上方X坐标
+    ,uint16_t YS0      // S0图像的左上方Y坐标
+    ,unsigned long S1_Addr    // S1图像的内存起始地址
+    ,uint16_t S1_W    // S1图像的宽度
+    ,uint16_t XS1      // S1图像的左上方X坐标
+    ,uint16_t YS1      // S1图像的左上方Y坐标
+    ,unsigned long Des_Addr    // 目的图像的内存起始地址
+    ,uint16_t Des_W    // 目的图像的宽度
+    ,uint16_t XDes    // 目的图像的左上方X坐标
+    ,uint16_t YDes    // 目的图像的左上方Y坐标
+    ,uint32_t ROP_Code    // 光栅操作模式
+    ,uint16_t X_W      // 活动窗口的宽度
+    ,uint16_t Y_H      // 活动窗口的长度
+)
+{
+    BTE_S0_Color_8bpp();
+    BTE_S0_Memory_Start_Address(S0_Addr);
+    BTE_S0_Image_Width(S0_W);
+    BTE_S0_Window_Start_XY(XS0,YS0);
+    BTE_S1_Color_8bpp();
+    BTE_S1_Memory_Start_Address(S1_Addr);
+    BTE_S1_Image_Width(S1_W);
+    BTE_S1_Window_Start_XY(XS1,YS1);
+    BTE_Destination_Color_8bpp();
+    BTE_Destination_Memory_Start_Address(Des_Addr);
+    BTE_Destination_Image_Width(Des_W);
+    BTE_Destination_Window_Start_XY(XDes,YDes);
+    BTE_ROP_Code(ROP_Code);
+    BTE_Operation_Code(0x02); //BTE Operation: Memory copy (move) with ROP.
+    BTE_Window_Size(X_W,Y_H);
+    BTE_Enable();
+    Check_BTE_Busy();
+}
+
+
+void LT768_Nand_8bpp_font
+(
+    uint8_t SCS         // 选择外挂的SPI   : SCS：0       SCS：1
+    ,uint8_t Clk         // SPI时钟分频参数 : SPI Clock = System Clock /{(Clk+1)*2}
+    ,uint16_t X1          // 传输到内存X1的位置
+    ,uint16_t Y1          // 传输到内存Y1的位置
+    ,uint16_t X_W        // DMA传输数据的宽度
+    ,uint16_t Y_H        // DMA传输数据的高度
+    ,unsigned long Addr        // Flash的地址
+    ,unsigned long lay1        // 缓冲层1的地址
+    ,unsigned long lay2        // 缓冲层2的地址
+)
+{
+    uint16_t i,page,endpage,remainder,x1,y1;
+    remainder = Addr%2048;//图片在一页中的起始位置
+    page = (Addr/2048);//图片起始地址所在的页编号（页地址）
+    endpage = ((Addr+X_W * Y_H)/2048);//图片终止地址所在的页编号（页地址）
+    LT768_SPI_Init(1,1);
+    W25N01GV_ContinuousRead_Mode();
+    W25N01GV_Write_Page(page);
+    LT768_DMA_24bit_Linear(1,1,0,lay1,((endpage-page+1)*2048));//传入图片所在的页的所有数据
+    x1 = (remainder) % LCD_XSIZE_TFT;
+    y1 = (remainder) / LCD_XSIZE_TFT;
+
+    //重组
+    for(i = 0 ; i < Y_H ; i++)
+    {
+        LT768_BTE_Memory_Copy_8(lay1,LCD_XSIZE_TFT,x1,y1,
+                                lay1,LCD_XSIZE_TFT,x1,y1,
+                                lay2,LCD_XSIZE_TFT,X1,i,
+                                0x0c,X_W,1);
+        x1=x1+X_W;
+
+        if(x1>LCD_XSIZE_TFT)
+        {
+            x1 = x1-LCD_XSIZE_TFT;
+            y1++;
+        }
+    }
+}
+
+void LT768_Print_Outside_Font_GB2312_48_72_Nand
+(
+    uint8_t SCS                   // 选择外挂的SPI   : SCS：0       SCS：1
+    ,uint8_t Clk                   // SPI时钟分频参数 : SPI Clock = System Clock /{(Clk+1)*2}
+    ,unsigned long FlashAddr             // 字库源地址(Flash)
+    ,unsigned long MemoryAddr1            // 缓冲层1的地址(SDRAM)
+    ,unsigned long MemoryAddr2            // 缓冲层1的地址(SDRAM)
+    ,unsigned long ShowAddr             // 显示层的地址
+    ,uint16_t width               // 显示层的宽度
+    ,uint8_t Size                  // 设置字体大小  48：48*48     72:72*72
+    ,uint8_t ChromaKey             // 0：字体背景色透明    1：可以设置字体的背景色
+    ,uint16_t x                   // 字体开始显示的x位置
+    ,uint16_t y                   // 字体开始显示的y位置
+    ,unsigned long FontColor            // 字体的颜色
+    ,unsigned long BackGroundColor      // 字体的背景色（注意：当字体背景初始化成透明时，设置该值无效）
+    ,uint16_t w                    // 字体粗细：0：不加粗  1：加粗1级  2：加粗2级
+    ,uint16_t s                   // 行距
+    ,uint8_t *c                   // 数据缓冲的首地址
+)
+{
+    uint16_t temp_H = 0;
+    uint16_t temp_L = 0;
+    uint16_t temp = 0;
+    unsigned long i = 0;
+    uint16_t j = 0;
+    uint16_t k = 0;
+    uint16_t h = 0;
+    uint16_t n = 0;
+    uint16_t m = 0;
+    uint16_t g = 0;
+    uint16_t f = 0;
+    h = x;
+    k = y;
+    Memory_8bpp_Mode();                           //使用8位色深来存储图片
+    Canvas_Image_Start_address(MemoryAddr1);
+    Canvas_image_width(width);
+
+    while((c[i] != '\0')&&(c[i]>=0xa0))  // 遇见不是汉字编码的自动退出
+    {
+        temp_H = (c[i] - 0xa1) * 94;
+        temp_L = c[i+1] - 0xa1;
+        temp = temp_H + temp_L;
+        LT768_Nand_8bpp_font(1,0,Size*j/8,0,Size/8,Size,FlashAddr+temp*((Size*Size)/8),MemoryAddr1,MemoryAddr2);        //2019
+        i+=2;
+        j++;
+    }
+
+    Memory_16bpp_Mode();
+    Canvas_Image_Start_address(ShowAddr);
+    Canvas_image_width(width);
+    j = 0;
+    i = 0;
+
+    if(w>2)
+    {
+        w = 2;
+    }
+
+    for(g=0; g<w+1; g++)
+    {
+        while((c[i] != '\0')&&(c[i]>=0xa0))   // 遇见不是汉字编码的自动退出
+        {
+            if((f == m)&&((x+Size*j+Size)>(width*(n+1))))
+            {
+                m++;
+                n++;
+                y=y+Size-1+s;
+                x = x+((width*n)-(x+Size*j))+g;
+                f=n;
+            }
+
+            if(ChromaKey==0)
+            {
+                LT768_BTE_Memory_Copy_ColorExpansion_8(MemoryAddr2,Size*j/8,
+                                                       ShowAddr,width,x+Size*j,y,
+                                                       Size,Size,FontColor,BackGroundColor
+                                                      );
+            }
+
+            if(ChromaKey==1)
+            {
+                LT768_BTE_Memory_Copy_ColorExpansion_Chroma_key_8(MemoryAddr2,Size*j/8,
+                                                                  ShowAddr,width,x+Size*j,y,
+                                                                  Size,Size,FontColor);
+            }
+
+            i+=2;
+            j++;
+        }
+
+        i=0;
+        j=0;
+        m=0;
+        n=0;
+        f=0;
+        x=h+g+1;
+        y=k+g+1;
+    }
+}
+
+void LT768_Print_Outside_Font_GBK_48_72_Nand
+(
+    uint8_t SCS                   // 选择外挂的SPI   : SCS：0       SCS：1
+    ,uint8_t Clk                   // SPI时钟分频参数 : SPI Clock = System Clock /{(Clk+1)*2}
+    ,unsigned long FlashAddr             // 字库源地址(Flash)
+    ,unsigned long MemoryAddr1            // 缓冲层1的地址(SDRAM)
+    ,unsigned long MemoryAddr2            // 缓冲层1的地址(SDRAM)
+    ,unsigned long ShowAddr             // 显示层的地址
+    ,uint16_t width               // 显示层的宽度
+    ,uint8_t Size                  // 设置字体大小  48：48*48     72:72*72
+    ,uint8_t ChromaKey             // 0：字体背景色透明    1：可以设置字体的背景色
+    ,uint16_t x                   // 字体开始显示的x位置
+    ,uint16_t y                   // 字体开始显示的y位置
+    ,unsigned long FontColor            // 字体的颜色
+    ,unsigned long BackGroundColor      // 字体的背景色（注意：当字体背景初始化成透明时，设置该值无效）
+    ,uint16_t w                    // 字体粗细：0：不加粗  1：加粗1级  2：加粗2级
+    ,uint16_t s                   // 行距
+    ,uint8_t *c                   // 数据缓冲的首地址
+)
+{
+    uint16_t temp_H = 0;
+    uint16_t temp_L = 0;
+    uint16_t temp = 0;
+    unsigned long i = 0;
+    uint16_t j = 0;
+    uint16_t k = 0;
+    uint16_t h = 0;
+    uint16_t n = 0;
+    uint16_t m = 0;
+    uint16_t g = 0;
+    uint16_t f = 0;
+    h = x;
+    k = y;
+    Memory_8bpp_Mode();                           //使用8位色深来存储图片
+    Canvas_Image_Start_address(MemoryAddr1);
+    Canvas_image_width(width);
+
+    while((c[i] != '\0')&&(c[i]>=0xa0))  // 遇见不是汉字编码的自动退出
+    {
+        temp_H = (c[i] - 0x81) * 191;
+        temp_L = c[i+1] - 0x40;
+        temp = temp_H + temp_L;
+        LT768_Nand_8bpp_font(1,0,Size*j/8,0,Size/8,Size,FlashAddr+temp*((Size*Size)/8),MemoryAddr1,MemoryAddr2);        //2019
+        i+=2;
+        j++;
+    }
+
+    Memory_16bpp_Mode();
+    Canvas_Image_Start_address(ShowAddr);
+    Canvas_image_width(width);
+    j = 0;
+    i = 0;
+
+    if(w>2)
+    {
+        w = 2;
+    }
+
+    for(g=0; g<w+1; g++)
+    {
+        while((c[i] != '\0')&&(c[i]>=0xa0))   // 遇见不是汉字编码的自动退出
+        {
+            if((f == m)&&((x+Size*j+Size)>(width*(n+1))))
+            {
+                m++;
+                n++;
+                y=y+Size-1+s;
+                x = x+((width*n)-(x+Size*j))+g;
+                f=n;
+            }
+
+            if(ChromaKey==0)
+            {
+                LT768_BTE_Memory_Copy_ColorExpansion_8(MemoryAddr2,Size*j/8,
+                                                       ShowAddr,width,x+Size*j,y,
+                                                       Size,Size,FontColor,BackGroundColor
+                                                      );
+            }
+
+            if(ChromaKey==1)
+            {
+                LT768_BTE_Memory_Copy_ColorExpansion_Chroma_key_8(MemoryAddr2,Size*j/8,
+                                                                  ShowAddr,width,x+Size*j,y,
+                                                                  Size,Size,FontColor);
+            }
+
+            i+=2;
+            j++;
+        }
+
+        i=0;
+        j=0;
+        m=0;
+        n=0;
+        f=0;
+        x=h+g+1;
+        y=k+g+1;
+    }
+}
+
+void LT768_Print_Outside_UserDefineFont_GB2312_Nand
+(
+    uint8_t SCS               // 选择外挂的SPI   : SCS：0       SCS：1
+    ,uint8_t Clk               // SPI时钟分频参数 : SPI Clock = System Clock /{(Clk+1)*2}
+    ,unsigned long FlashAddr         // 字库源地址(Flash)
+    ,unsigned long MemoryAddr1            // 缓冲层1的地址(SDRAM)
+    ,unsigned long MemoryAddr2            // 缓冲层1的地址(SDRAM)
+    ,unsigned long ShowAddr             // 显示层的地址
+    ,uint16_t width               // 显示层的宽度
+    ,uint8_t Size              // 设置字体大小  48：48*48     72:72*72
+    ,uint8_t ChromaKey         // 0：字体背景色透明    1：可以设置字体的背景色
+    ,uint16_t x                   // 字体开始显示的x位置
+    ,uint16_t y                   // 字体开始显示的y位置
+    ,unsigned long FontColor            // 字体的颜色
+    ,unsigned long BackGroundColor      // 字体的背景色（注意：当字体背景初始化成透明时，设置该值无效）
+    ,uint16_t w            // 字体粗细：0：不加粗  1：加粗1级  2：加粗2级
+    ,uint16_t s                   // 行距
+    ,uint8_t *c                   // 数据缓冲的首地址
+)
+{
+    short temp = 0;
+    unsigned long i = 0;
+    uint16_t j = 0;
+    uint16_t k = 0;
+    uint16_t h = 0;
+    uint16_t n = 0;
+    uint16_t m = 0;
+    uint16_t g = 0;
+    uint16_t f = 0;
+    uint8_t temp1[2] = {0};
+    uint32_t fontNum = 0;
+    clear_Font_1();
+    LT768_SPI_Init(SCS,1);
+    LT_W25N01GV_Read(temp1,FlashAddr+8,2);
+    fontNum = (temp1[0]<<8)+temp1[1];
+    LT_W25N01GV_Read(Font_1,FlashAddr + 0xc,fontNum * 2);
+    h = x;
+    k = y;
+    Memory_8bpp_Mode();//使用8位色深来存储图片
+    Canvas_Image_Start_address(MemoryAddr1);
+    Canvas_image_width(width);
+
+    while(c[i + 1] != '\0')
+    {
+        temp = Get_User_Font_P(c[i],c[i+1]);
+
+        if(temp != -1)
+        {
+            LT768_Nand_8bpp_font(SCS,Clk,Size*j/8,0,Size/8,Size,FlashAddr+temp*((Size*Size)/8)+0x0c+fontNum*2,MemoryAddr1,MemoryAddr2);        //2019
+        }
+        else
+        {
+            break;
+        }
+
+        i+=2;
+        j++;
+    }
+
+    Memory_16bpp_Mode();
+    Canvas_Image_Start_address(ShowAddr);
+    Canvas_image_width(width);
+    j = 0;
+    i = 0;
+
+    if(w>2)
+    {
+        w = 2;
+    }
+
+    for(g=0; g<w+1; g++)
+    {
+        while(c[i + 1] != '\0')
+        {
+            temp = Get_User_Font_P(c[i],c[i+1]);
+
+            if(temp == -1)
+            {
+                break;
+            }
+
+            if((f == m)&&((x+Size*j+Size)>(width*(n+1))))
+            {
+                m++;
+                n++;
+                y=y+Size-1+s;
+                x = x+((width*n)-(x+Size*j))+g;
+                f=n;
+            }
+
+            if(ChromaKey==1)
+            {
+                LT768_BTE_Memory_Copy_ColorExpansion_8(MemoryAddr2,Size*j/8,
+                                                       ShowAddr,width,x+Size*j,y,
+                                                       Size,Size,FontColor,BackGroundColor
+                                                      );
+            }
+
+            if(ChromaKey==0)
+            {
+                LT768_BTE_Memory_Copy_ColorExpansion_Chroma_key_8(MemoryAddr2,Size*j/8,
+                                                                  ShowAddr,width,x+Size*j,y,
+                                                                  Size,Size,FontColor
+                                                                 );
+            }
+
+            i+=2;
+            j++;
+        }
+
+        ChromaKey=0;
+        i=0;
+        j=0;
+        m=0;
+        n=0;
+        f=0;
+        x=h+g+1;
+        y=k+g+1;
+    }
+}
+
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/sensors/Kconfig b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/sensors/Kconfig
index 4ba9ae32e..e9d12be68 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/sensors/Kconfig
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/sensors/Kconfig
@@ -74,6 +74,7 @@ config SENSORS_AS726X
 	bool "AMS AS726X Spetral sensor support"
 	default n
 	select I2C
+	depends on ALLOW_BSD_COMPONENTS
 	---help---
 		Enable driver support for the AS726X Spectral Sensor.
 
@@ -96,7 +97,6 @@ config SENSORS_BMG160
 	---help---
 		Enable driver support for the Bosch BMG160 gyroscope sensor.
 
-
 config SENSORS_BMI160
 	bool "Bosch BMI160 Inertial Measurement Sensor support"
 	default n
@@ -189,7 +189,7 @@ config SENSORS_DS18B20_POLL_INTERVAL
 	int "Polling interval in microseconds, default 1 sec"
 	depends on SENSORS_DS18B20 && SENSORS_DS18B20_POLL
 	default 1000000
-	range 0  4294967295
+	range 0 4294967295
 	---help---
 		The interval until a new sensor measurement will be triggered.
 
@@ -316,7 +316,6 @@ config SENSORS_L3GD20_BUFFER_SIZE
 		The size of the circular buffer used. If the value equal to zero,
 		indicates that the circular buffer is disabled.
 
-
 config SENSOR_KXTJ9
 	bool "Kionix KXTJ9 Accelerometer support"
 	default n
@@ -375,6 +374,7 @@ config LIS3DH
 	bool "STMicro LIS3DH 3-Axis accelerometer support"
 	default n
 	select SPI
+	depends on ALLOW_BSD_COMPONENTS
 	---help---
 		Enable driver support for the STMicro LIS3DH 3-Axis accelerometer.
 
@@ -400,6 +400,7 @@ config SENSORS_LSM303AGR
 	bool "STMicro LSM303AGR support"
 	default n
 	select I2C
+	depends on ALLOW_BSD_COMPONENTS
 	---help---
 		Enable driver support for the STMicro LSM303AGR.
 
@@ -413,6 +414,7 @@ config SENSORS_LSM6DSL
 	bool "STMicro LSM6DSL support"
 	default n
 	select I2C
+	depends on ALLOW_BSD_COMPONENTS
 	---help---
 		Enable driver support for the STMicro LSM6DSL.
 
@@ -561,6 +563,46 @@ config MCP9844_I2C_FREQUENCY
 	range 1 400000
 	depends on SENSORS_MCP9844
 
+config SENSORS_MS5611
+	bool "MS5611 Barometric Pressure Sensor support"
+	default n
+	---help---
+		Enable driver support for MEAS MS5511 barometer.
+
+if SENSORS_MS5611
+
+choice
+	prompt "MS5611 Interface"
+	default MS5611_I2C
+
+config MS5611_I2C
+	bool "MS5611 I2C Interface"
+	select I2C
+	---help---
+		Enables support for the I2C interface
+
+config MS5611_SPI
+	bool "MS5611 SPI Interface"
+	select SPI
+	---help---
+		Enables support for the SPI interface.
+
+endchoice
+
+config MS5611_THREAD_STACKSIZE
+	int "Worker thread stack size"
+	default 1024
+	---help---
+		The stack size for the worker thread
+
+config MS5611_I2C_FREQUENCY
+	int "MS5611 I2C frequency"
+	default 400000
+	range 1 400000
+	depends on MS5611_I2C
+
+endif # SENSORS_MS5611
+
 config SENSORS_MS58XX
 	bool "MEAS MS58XX Altimeter support"
 	default n
@@ -826,11 +868,11 @@ config SGP30_DEBUG
 endif # SENSORS_SGP30
 
 config SENSORS_AHT10
-        bool "ASAIR AHT10 temperature and humidity sensor"
-        default n
-        select I2C
-        ---help---
-                Enable driver support for the ASAIR AHT10 temperature and humidity sensors.
+	bool "ASAIR AHT10 temperature and humidity sensor"
+	default n
+	select I2C
+	---help---
+		Enable driver support for the ASAIR AHT10 temperature and humidity sensors.
 
 if SENSORS_AHT10
 config AHT10_I2C_FREQUENCY
@@ -954,6 +996,7 @@ config SENSORS_VL53L1X
 	bool "ST VL53L1X TOF sensor"
 	default n
 	select I2C
+	depends on ALLOW_BSD_COMPONENTS
 	---help---
 		Enable driver support for the VL53L1X Time Of Flight sensor.
 
@@ -992,12 +1035,12 @@ config SENSORS_HDC1008
 if SENSORS_HDC1008
 
 config HDC1008_I2C_ADDRESS
-  hex "HDC1008 I2C address"
-  default 0x40
-  range 0x40 0x43
-  ---help---
-    The I2C address of the HDC1008 sensor. It can be configured via straps to
-    a value between 0x40 and 0x43.
+	hex "HDC1008 I2C address"
+	default 0x40
+	range 0x40 0x43
+	---help---
+		The I2C address of the HDC1008 sensor. It can be configured via straps to
+		a value between 0x40 and 0x43.
 
 config HDC1008_I2C_FREQUENCY
 	int "HDC1008 I2C frequency"
@@ -1012,7 +1055,6 @@ config HDC1008_DEBUG
 
 endif # SENSORS_HDC1008
 
-
 config HS300X_I2C
 	bool
 	default y if HS300X
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/sensors/Make.defs b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/sensors/Make.defs
index 01350d22d..d17fe3e3d 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/sensors/Make.defs
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/sensors/Make.defs
@@ -164,6 +164,10 @@ ifeq ($(CONFIG_SENSORS_MLX90614),y)
   CSRCS += mlx90614.c
 endif
 
+ifeq ($(CONFIG_SENSORS_MS5611),y)
+  CSRCS += ms5611.c
+endif
+
 ifeq ($(CONFIG_SENSORS_MS58XX),y)
   CSRCS += ms58xx.c
 endif
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/wireless/lpwan/sx127x/sx127x.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/wireless/lpwan/sx127x/sx127x.c
index cdab21327..0b56fa788 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/wireless/lpwan/sx127x/sx127x.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/drivers/wireless/lpwan/sx127x/sx127x.c
@@ -22,7 +22,7 @@
 * @file sx127x.c
 * @brief nuttx source code
 *                 https://github.com/apache/incubator-nuttx-apps
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
 * @date 2022-03-17
 */
@@ -957,7 +957,7 @@ static ssize_t sx127x_write(FAR struct file *filep, FAR const char *buffer,
       return ret;
     }
 
-  wlinfo("buflen=%d \n", buflen);
+  wlinfo("buflen=%d\n", buflen);
 
   /* Change mode to STANDBY */
 
@@ -3795,7 +3795,7 @@ static bool sx127x_channel_scan(FAR struct sx127x_dev_s *dev,
 
   /* Get start time */
 
-  clock_gettime(CLOCK_REALTIME, &tstart);
+  clock_systime_timespec(&tstart);
 
   /* Initialize min/max */
 
@@ -3806,7 +3806,7 @@ static bool sx127x_channel_scan(FAR struct sx127x_dev_s *dev,
     {
       /* Get time now */
 
-      clock_gettime(CLOCK_REALTIME, &tnow);
+      clock_systime_timespec(&tnow);
 
       /* Check RSSI */
 
@@ -4170,7 +4170,7 @@ static int sx127x_calibration(FAR struct sx127x_dev_s *dev, uint32_t freq)
   ret = sx127x_modulation_set(dev, SX127X_MODULATION_FSK);
   if (ret < 0)
     {
-      wlerr("ERROR: can't change modulation to FSK \n");
+      wlerr("ERROR: can't change modulation to FSK\n");
       goto errout;
     }
 
@@ -4277,7 +4277,7 @@ static int sx127x_init(FAR struct sx127x_dev_s *dev)
   ret = sx127x_calibration(dev, SX127X_FREQ_CALIBRATION);
   if (ret < 0)
     {
-      wlerr("ERROR: calibration failed \n");
+      wlerr("ERROR: calibration failed\n");
     }
 
   /* Set default modulation */
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/include/nuttx/lcd/k210_lcd.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/include/nuttx/lcd/k210_lcd.h
new file mode 100755
index 000000000..9265434a4
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/include/nuttx/lcd/k210_lcd.h
@@ -0,0 +1,91 @@
+/****************************************************************************
+ * k210_lcd.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/**
+* @file k210_lcd.h
+* @brief
+* @version 1.0.0
+* @author AIIT XUOS Lab
+* @date 2022-07-21
+*/
+
+#ifndef __K210_LCD_H_
+#define __K210_LCD_H_
+
+#include <stdbool.h>
+
+#include <debug.h>
+#include <syslog.h>
+
+#include "nuttx/lcd/lt768.h"
+#include "nuttx/lcd/lt768_lib.h"
+
+//PIN.define
+#define BSP_LCD_NRST        37
+#define BSP_LCD_SCLK        38
+#define BSP_LCD_MOSI        39
+#define BSP_LCD_MISO        40
+#define BSP_LCD_NCS         41
+#define BSP_LCD_BL_PIN      47
+
+//FPIOA.define
+#define FPIOA_LCD_NRST      0
+#define FPIOA_LCD_BL        9
+#define FPIOA_LCD_SCLK      28
+#define FPIOA_LCD_MOSI      29
+#define FPIOA_LCD_MISO      23 //can't use GPIOHS30
+#define FPIOA_LCD_NCS       31
+
+#define GPIO_PV_HIGH 1 // true
+#define GPIO_PV_LOW 0  // false
+
+#define LCD_START_ADDR 0
+#define STM32_FSMC_8 0
+
+#define lcd_set_pin k210_gpiohs_set_value
+#define lcd_get_pin k210_gpiohs_get_value
+
+void test_delay(void);
+
+#define lcd_delay() up_udelay(20)
+
+#define NCS_H lcd_set_pin(FPIOA_LCD_NCS, GPIO_PV_HIGH); lcd_delay()
+#define NCS_L lcd_set_pin(FPIOA_LCD_NCS, GPIO_PV_LOW); lcd_delay()
+
+#define CLK_H lcd_set_pin(FPIOA_LCD_SCLK, GPIO_PV_HIGH); lcd_delay()
+#define CLK_L lcd_set_pin(FPIOA_LCD_SCLK, GPIO_PV_LOW); lcd_delay()
+
+#define MOSI_H lcd_set_pin(FPIOA_LCD_MOSI, GPIO_PV_HIGH)
+#define MOSI_L lcd_set_pin(FPIOA_LCD_MOSI, GPIO_PV_LOW)
+
+/*----------------------------------------------------------------------------*/
+
+void lcd_backlight_init(bool enable);
+void lcd_drv_init(void);
+
+void LCD_CmdWrite(uint8_t cmd);
+void LCD_DataWrite(uint8_t data);
+uint8_t LCD_DataRead(void);
+uint8_t LCD_StatusRead(void);
+void LCD_DataWrite_Pixel(uint8_t data);
+
+/*----------------------------------------------------------------------------*/
+
+#endif
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/include/nuttx/lcd/lt768.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/include/nuttx/lcd/lt768.h
new file mode 100755
index 000000000..9dd5817ec
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/include/nuttx/lcd/lt768.h
@@ -0,0 +1,685 @@
+/******************** COPYRIGHT  ********************
+* File Name       : LT768.h
+* Author          : Levetop Electronics
+* Version         : V1.0
+* Date            : 2017-8-25
+* Description     : 操作LT768的寄存器函数
+****************************************************/
+
+#ifndef _LT768_h
+#define _LT768_h
+
+#define cSetb0    0x01
+#define cSetb1    0x02
+#define cSetb2    0x04
+#define cSetb3    0x08
+#define cSetb4    0x10
+#define cSetb5    0x20
+#define cSetb6    0x40
+#define cSetb7    0x80
+
+#define cClrb0    0xfe
+#define cClrb1    0xfd
+#define cClrb2    0xfb
+#define cClrb3    0xf7
+#define cClrb4    0xef
+#define cClrb5    0xdf
+#define cClrb6    0xbf
+#define cClrb7    0x7f
+
+
+void LCD_RegisterWrite(unsigned char Cmd,unsigned char Data);
+unsigned char LCD_RegisterRead(unsigned char Cmd);
+
+//**Staus**//
+void Check_Mem_WR_FIFO_not_Full(void);
+void Check_Mem_WR_FIFO_Empty(void);
+void Check_Mem_RD_FIFO_not_Full(void);
+void Check_Mem_RD_FIFO_not_Empty(void);
+void Check_2D_Busy(void);
+void Check_SDRAM_Ready(void);
+unsigned char Power_Saving_Status(void);
+void Check_Power_is_Normal(void);
+void Check_Power_is_Saving(void);
+void Check_NO_Interrupt(void);
+void Check_Interrupt_Occur(void);
+
+void Check_Busy_Draw(void);
+void Check_Busy_SFI_DMA(void);
+
+//**[00h]**//
+void LT768_SW_Reset(void);
+//**[01h]**//
+void Enable_PLL(void);
+void LT768_Sleep(void);
+void LT768_WakeUp(void);
+void TFT_24bit(void);
+void TFT_18bit(void);
+void TFT_16bit(void);
+void TFT_LVDS(void);
+void Key_Scan_Enable(void);
+void Key_Scan_Disable(void);
+void LT768_I2CM_Enable(void);
+void LT768_I2CM_Disable(void);
+void Enable_SFlash_SPI(void);
+void Disable_SFlash_SPI(void);
+void Host_Bus_8bit(void);
+void Host_Bus_16bit(void);
+//**[02h]**//
+
+void RGB_8b_8bpp(void);
+void RGB_8b_16bpp(void);
+void RGB_8b_24bpp(void);
+
+void RGB_16b_8bpp(void);
+void RGB_16b_16bpp(void);
+void RGB_16b_24bpp_mode1(void);
+void RGB_16b_24bpp_mode2(void);
+
+void MemRead_Left_Right_Top_Down(void);
+void MemRead_Right_Left_Top_Down(void);
+void MemRead_Top_Down_Left_Right(void);
+void MemRead_Down_Top_Left_Right(void);
+
+void MemWrite_Left_Right_Top_Down(void);
+void MemWrite_Right_Left_Top_Down(void);
+void MemWrite_Top_Down_Left_Right(void);
+void MemWrite_Down_Top_Left_Right(void);
+//**[03h]**//
+void Interrupt_Active_Low(void);
+void Interrupt_Active_High(void);
+void ExtInterrupt_Debounce(void);
+void ExtInterrupt_Nodebounce(void);
+void ExtInterrupt_Input_Low_Level_Trigger(void);
+void ExtInterrupt_Input_High_Level_Trigger(void);
+void ExtInterrupt_Input_Falling_Edge_Trigger(void);
+void ExtInterrupt_Input_Rising_Edge_Trigger(void);
+void LVDS_Format1(void);
+void LVDS_Format2(void);
+void Graphic_Mode(void);
+void Text_Mode(void);
+void Memory_Select_SDRAM(void);
+void Memory_Select_Graphic_Cursor_RAM(void);
+void Memory_Select_Color_Palette_RAM(void);
+//**[05h]**//
+//**[06h]**//
+//**[07h]**//
+//**[09h]**//
+//**[0Ah]**//
+//**[0Bh]**//
+void Enable_Resume_Interrupt(void);
+void Disable_Resume_Interrupt(void);
+void Enable_ExtInterrupt_Input(void);
+void Disable_ExtInterrupt_Input(void);
+void Enable_I2CM_Interrupt(void);
+void Disable_I2CM_Interrupt(void);
+void Enable_Vsync_Interrupt(void);
+void Disable_Vsync_Interrupt(void);
+void Enable_KeyScan_Interrupt(void);
+void Disable_KeyScan_Interrupt(void);
+void Enable_DMA_Draw_BTE_Interrupt(void);
+void Disable_DMA_Draw_BTE_Interrupt(void);
+void Enable_PWM1_Interrupt(void);
+void Disable_PWM1_Interrupt(void);
+void Enable_PWM0_Interrupt(void);
+void Disable_PWM0_Interrupt(void);
+//**[0Ch]**//
+unsigned char Read_Interrupt_status(void);
+void Clear_Resume_Interrupt_Flag(void);
+void Clear_ExtInterrupt_Input_Flag(void);
+void Clear_I2CM_Interrupt_Flag(void);
+void Clear_Vsync_Interrupt_Flag(void);
+void Clear_KeyScan_Interrupt_Flag(void);
+void Clear_DMA_Draw_BTE_Interrupt_Flag(void);
+void Clear_PWM1_Interrupt_Flag(void);
+void Clear_PWM0_Interrupt_Flag(void);
+//**[0Dh]**//
+void Mask_Resume_Interrupt_Flag(void);
+void Mask_ExtInterrupt_Input_Flag(void);
+void Mask_I2CM_Interrupt_Flag(void);
+void Mask_Vsync_Interrupt_Flag(void);
+void Mask_KeyScan_Interrupt_Flag(void);
+void Mask_DMA_Draw_BTE_Interrupt_Flag(void);
+void Mask_PWM1_Interrupt_Flag(void);
+void Mask_PWM0_Interrupt_Flag(void);
+//
+void Enable_Resume_Interrupt_Flag(void);
+void Enable_ExtInterrupt_Input_Flag(void);
+void Enable_I2CM_Interrupt_Flag(void);
+void Enable_Vsync_Interrupt_Flag(void);
+void Enable_KeyScan_Interrupt_Flag(void);
+void Enable_DMA_Draw_BTE_Interrupt_Flag(void);
+void Enable_PWM1_Interrupt_Flag(void);
+void Enable_PWM0_Interrupt_Flag(void);
+//**[0Eh]**//
+void Enable_GPIOF_PullUp(void);
+void Enable_GPIOE_PullUp(void);
+void Enable_GPIOD_PullUp(void);
+void Enable_GPIOC_PullUp(void);
+void Enable_XDB15_8_PullUp(void);
+void Enable_XDB7_0_PullUp(void);
+void Disable_GPIOF_PullUp(void);
+void Disable_GPIOE_PullUp(void);
+void Disable_GPIOD_PullUp(void);
+void Disable_GPIOC_PullUp(void);
+void Disable_XDB15_8_PullUp(void);
+void Disable_XDB7_0_PullUp(void);
+
+//**[0Fh]**//
+void XPDAT18_Set_GPIO_D7(void);
+void XPDAT18_Set_KOUT4(void);
+void XPDAT17_Set_GPIO_D5(void);
+void XPDAT17_Set_KOUT2(void);
+void XPDAT16_Set_GPIO_D4(void);
+void XPDAT16_Set_KOUT1(void);
+void XPDAT9_Set_GPIO_D3(void);
+void XPDAT9_Set_KOUT3(void);
+void XPDAT8_Set_GPIO_D2(void);
+void XPDAT8_Set_KIN3(void);
+void XPDAT2_Set_GPIO_D6(void);
+void XPDAT2_Set_KIN4(void);
+void XPDAT1_Set_GPIO_D1(void);
+void XPDAT1_Set_KIN2(void);
+void XPDAT0_Set_GPIO_D0(void);
+void XPDAT0_Set_KIN1(void);
+
+//**[10h]**//
+void Enable_PIP1(void);
+void Disable_PIP1(void);
+void Enable_PIP2(void);
+void Disable_PIP2(void);
+void Select_PIP1_Parameter(void);
+void Select_PIP2_Parameter(void);
+void Select_Main_Window_8bpp(void);
+void Select_Main_Window_16bpp(void);
+void Select_Main_Window_24bpp(void);
+//**[11h]**//
+void Select_PIP1_Window_8bpp(void);
+void Select_PIP1_Window_16bpp(void);
+void Select_PIP1_Window_24bpp(void);
+void Select_PIP2_Window_8bpp(void);
+void Select_PIP2_Window_16bpp(void);
+void Select_PIP2_Window_24bpp(void);
+//**[12h]**//
+void PCLK_Rising(void);
+void PCLK_Falling(void);
+void Display_ON(void);
+void Display_OFF(void);
+void Color_Bar_ON(void);
+void Color_Bar_OFF(void);
+void HSCAN_L_to_R(void);
+void HSCAN_R_to_L(void);
+void VSCAN_T_to_B(void);
+void VSCAN_B_to_T(void);
+void PDATA_Set_RGB(void);
+void PDATA_Set_RBG(void);
+void PDATA_Set_GRB(void);
+void PDATA_Set_GBR(void);
+void PDATA_Set_BRG(void);
+void PDATA_Set_BGR(void);
+void PDATA_IDLE_STATE(void);
+
+//**[13h]**//
+void HSYNC_Low_Active(void);
+void HSYNC_High_Active(void);
+void VSYNC_Low_Active(void);
+void VSYNC_High_Active(void);
+void DE_Low_Active(void);
+void DE_High_Active(void);
+void Idle_DE_Low(void);
+void Idle_DE_High(void);
+void Idle_PCLK_Low(void);
+void Idle_PCLK_High(void);
+void Idle_PDAT_Low(void);
+void Idle_PDAT_High(void);
+void Idle_HSYNC_Low(void);
+void Idle_HSYNC_High(void);
+void Idle_VSYNC_Low(void);
+void Idle_VSYNC_High(void);
+//**[14h][15h][1Ah][1Bh]**//
+void LCD_HorizontalWidth_VerticalHeight(unsigned short WX,unsigned short HY);
+//**[16h][17h]**//
+void LCD_Horizontal_Non_Display(unsigned short WX);
+//**[18h]**//
+void LCD_HSYNC_Start_Position(unsigned short WX);
+//**[19h]**//
+void LCD_HSYNC_Pulse_Width(unsigned short WX);
+//**[1Ch][1Dh]**//
+void LCD_Vertical_Non_Display(unsigned short HY);
+//**[1Eh]**//
+void LCD_VSYNC_Start_Position(unsigned short HY);
+//**[1Fh]**//
+void LCD_VSYNC_Pulse_Width(unsigned short HY);
+//**[20h][21h][22h][23h]**//
+void Main_Image_Start_Address(unsigned long Addr);
+//**[24h][25h]**//
+void Main_Image_Width(unsigned short WX);
+//**[26h][27h][28h][29h]**//
+void Main_Window_Start_XY(unsigned short WX,unsigned short HY);
+//**[2Ah][2Bh][2Ch][2Dh]**//
+void PIP_Display_Start_XY(unsigned short WX,unsigned short HY);
+//**[2Eh][2Fh][30h][31h]**//
+void PIP_Image_Start_Address(unsigned long Addr);
+//**[32h][33h]**//
+void PIP_Image_Width(unsigned short WX);
+//**[34h][35h][36h][37h]**//
+void PIP_Window_Image_Start_XY(unsigned short WX,unsigned short HY);
+//**[38h][39h][3Ah][3Bh]**//
+void PIP_Window_Width_Height(unsigned short WX,unsigned short HY);
+//**[3C]**//
+void Enable_Graphic_Cursor(void);
+void Disable_Graphic_Cursor(void);
+void Select_Graphic_Cursor_1(void);
+void Select_Graphic_Cursor_2(void);
+void Select_Graphic_Cursor_3(void);
+void Select_Graphic_Cursor_4(void);
+void Enable_Text_Cursor(void);
+void Disable_Text_Cursor(void);
+void Enable_Text_Cursor_Blinking(void);
+void Disable_Text_Cursor_Blinking(void);
+//**[3D]**//
+void Blinking_Time_Frames(unsigned char temp);
+//**[3E][3Fh]**//
+void Text_Cursor_H_V(unsigned short WX,unsigned short HY);
+//**[40h][41h][42h][43h]**//
+void Graphic_Cursor_XY(unsigned short WX,unsigned short HY);
+//**[44]**//
+void Set_Graphic_Cursor_Color_1(unsigned char temp);
+//**[45]**//
+void Set_Graphic_Cursor_Color_2(unsigned char temp);
+//**[50h][51h][52h][53h]**//
+void Canvas_Image_Start_address(unsigned long Addr);
+//**[54h][55h]**//
+void Canvas_image_width(unsigned short WX);
+//**[56h][57h][58h][59h]**//
+void Active_Window_XY(unsigned short WX,unsigned short HY);
+//**[5Ah][5Bh][5Ch][5Dh]**//
+void Active_Window_WH(unsigned short WX,unsigned short HY);
+//**[5E]**//
+void Select_Write_Data_Position(void);
+void Select_Read_Data_Position(void);
+void Memory_XY_Mode(void);
+void Memory_Linear_Mode(void);
+void Memory_8bpp_Mode(void);
+void Memory_16bpp_Mode(void);
+void Memory_24bpp_Mode(void);
+//**[5Fh][60h][61h][62h]**//
+void Goto_Pixel_XY(unsigned short WX,unsigned short HY);
+void Goto_Linear_Addr(unsigned long Addr);
+//**[63h][64h][65h][66h]**//
+void Goto_Text_XY(unsigned short WX,unsigned short HY);
+
+////////////////////////////////////////////////////////////////////////
+////**** [ Function : Draw ] ****////
+//**[67h]**//
+void Start_Line(void);
+void Start_Triangle(void);
+void Start_Triangle_Fill(void);
+//**[68h]~[73h]**//
+void Line_Start_XY(unsigned short WX,unsigned short HY);
+void Line_End_XY(unsigned short WX,unsigned short HY);
+void Triangle_Point1_XY(unsigned short WX,unsigned short HY);
+void Triangle_Point2_XY(unsigned short WX,unsigned short HY);
+void Triangle_Point3_XY (unsigned short WX,unsigned short HY);
+void Square_Start_XY(unsigned short WX,unsigned short HY);
+void Square_End_XY(unsigned short WX,unsigned short HY);
+//**[76h]**//
+void Start_Circle_or_Ellipse(void);
+void Start_Circle_or_Ellipse_Fill(void);
+void Start_Left_Down_Curve(void);
+void Start_Left_Up_Curve(void);
+void Start_Right_Up_Curve(void);
+void Start_Right_Down_Curve(void);
+void Start_Left_Down_Curve_Fill(void);
+void Start_Left_Up_Curve_Fill(void);
+void Start_Right_Up_Curve_Fill(void);
+void Start_Right_Down_Curve_Fill(void);
+void Start_Square(void);
+void Start_Square_Fill(void);
+void Start_Circle_Square(void);
+void Start_Circle_Square_Fill(void);
+//**[77h]~[7Eh]**//
+void Circle_Center_XY(unsigned short WX,unsigned short HY);
+void Ellipse_Center_XY(unsigned short WX,unsigned short HY);
+void Circle_Radius_R(unsigned short WX);
+void Ellipse_Radius_RxRy(unsigned short WX,unsigned short HY);
+void Circle_Square_Radius_RxRy(unsigned short WX,unsigned short HY);
+
+////////////////////////////////////////////////////////////////////////
+////**** [ Function : PWM ] ****////
+//**[84h]**//
+void Set_PWM_Prescaler_1_to_256(unsigned short WX);
+//**[85h]**//
+void Select_PWM1_Clock_Divided_By_1(void);
+void Select_PWM1_Clock_Divided_By_2(void);
+void Select_PWM1_Clock_Divided_By_4(void);
+void Select_PWM1_Clock_Divided_By_8(void);
+void Select_PWM0_Clock_Divided_By_1(void);
+void Select_PWM0_Clock_Divided_By_2(void);
+void Select_PWM0_Clock_Divided_By_4(void);
+void Select_PWM0_Clock_Divided_By_8(void);
+//[85h].[bit3][bit2]
+void Select_PWM1_is_ErrorFlag(void);
+void Select_PWM1(void);
+void Select_PWM1_is_Osc_Clock(void);
+//[85h].[bit1][bit0]
+void Select_PWM0_is_GPIO_C7(void);
+void Select_PWM0(void);
+void Select_PWM0_is_Core_Clock(void);
+//**[86h]**//
+//[86h]PWM1
+void Enable_PWM1_Inverter(void);
+void Disable_PWM1_Inverter(void);
+void Auto_Reload_PWM1(void);
+void One_Shot_PWM1(void);
+void Start_PWM1(void);
+void Stop_PWM1(void);
+//[86h]PWM0
+void Enable_PWM0_Dead_Zone(void);
+void Disable_PWM0_Dead_Zone(void);
+void Enable_PWM0_Inverter(void);
+void Disable_PWM0_Inverter(void);
+void Auto_Reload_PWM0(void);
+void One_Shot_PWM0(void);
+void Start_PWM0(void);
+void Stop_PWM0(void);
+//**[87h]**//
+void Set_Timer0_Dead_Zone_Length(unsigned char temp);
+//**[88h][89h]**//
+void Set_Timer0_Compare_Buffer(unsigned short WX);
+//**[8Ah][8Bh]**//
+void Set_Timer0_Count_Buffer(unsigned short WX);
+//**[8Ch][8Dh]**//
+void Set_Timer1_Compare_Buffer(unsigned short WX);
+//**[8Eh][8Fh]**//
+void Set_Timer1_Count_Buffer(unsigned short WX);
+
+////////////////////////////////////////////////////////////////////////
+////**** [ Function : BTE ] ****////
+//**[90h]**//
+
+//[90h]=========================================================================
+void BTE_Enable(void);
+void BTE_Disable(void);
+
+void Check_BTE_Busy(void);
+
+void Pattern_Format_8X8(void);
+void Pattern_Format_16X16(void);
+
+//[91h]=========================================================================
+void BTE_ROP_Code(unsigned char setx);
+void BTE_Operation_Code(unsigned char setx);
+
+//[92h]=========================================================================
+void BTE_S0_Color_8bpp(void);
+void BTE_S0_Color_16bpp(void);
+void BTE_S0_Color_24bpp(void);
+
+void BTE_S1_Color_8bpp(void);
+void BTE_S1_Color_16bpp(void);
+void BTE_S1_Color_24bpp(void);
+void BTE_S1_Color_Constant(void);
+void BTE_S1_Color_8bit_Alpha(void);
+void BTE_S1_Color_16bit_Alpha(void);
+
+void BTE_Destination_Color_8bpp(void);
+void BTE_Destination_Color_16bpp(void);
+void BTE_Destination_Color_24bpp(void);
+
+//[93h][94h][95h][96h]=========================================================================
+void BTE_S0_Memory_Start_Address(unsigned long Addr);
+
+//[97h][98h]=========================================================================
+void BTE_S0_Image_Width(unsigned short WX);
+
+//[99h][9Ah][9Bh][9Ch]=========================================================================
+void BTE_S0_Window_Start_XY(unsigned short WX,unsigned short HY);
+
+//[9Dh][9Eh][9Fh][A0h]=========================================================================
+void BTE_S1_Memory_Start_Address(unsigned long Addr);
+void S1_Constant_color_256(unsigned char temp);
+void S1_Constant_color_65k(unsigned short temp);
+void S1_Constant_color_16M(unsigned long temp);
+
+//[A1h][A2h]=========================================================================
+void BTE_S1_Image_Width(unsigned short WX);
+
+//[A3h][A4h][A5h][A6h]=========================================================================
+void BTE_S1_Window_Start_XY(unsigned short WX,unsigned short HY);
+
+//[A7h][A8h][A9h][AAh]=========================================================================
+void BTE_Destination_Memory_Start_Address(unsigned long Addr);
+
+//[ABh][ACh]=========================================================================
+void BTE_Destination_Image_Width(unsigned short WX);
+
+//[ADh][AEh][AFh][B0h]=========================================================================
+void BTE_Destination_Window_Start_XY(unsigned short WX,unsigned short HY);
+
+//[B1h][B2h][B3h][B4h]=========================================================================
+void BTE_Window_Size(unsigned short WX, unsigned short WY);
+
+//[B5h]=========================================================================
+void BTE_Alpha_Blending_Effect(unsigned char temp);
+
+
+//**[B5h]**//
+
+////////////////////////////////////////////////////////////////////////
+////**** [ Function : Serial Flash ] ****////
+
+
+//REG[B6h] Serial flash DMA Controller REG (DMA_CTRL)
+void Start_SFI_DMA(void);
+void Check_Busy_SFI_DMA(void);
+
+//REG[B7h] Serial Flash/ROM Controller Register (SFL_CTRL)
+void Select_SFI_0(void);
+void Select_SFI_1(void);
+void Select_SFI_Font_Mode(void);
+void Select_SFI_DMA_Mode(void);
+void Select_SFI_24bit_Address(void);
+void Select_SFI_32bit_Address(void);
+void Select_SFI_Waveform_Mode_0(void);
+void Select_SFI_Waveform_Mode_3(void);
+void Select_SFI_0_DummyRead(void);
+void Select_SFI_8_DummyRead(void);
+void Select_SFI_16_DummyRead(void);
+void Select_SFI_24_DummyRead(void);
+void Select_SFI_Single_Mode(void);
+void Select_SFI_Dual_Mode0(void);
+void Select_SFI_Dual_Mode1(void);
+
+//REG[B8h] SPI master Tx /Rx FIFO Data Register (SPIDR)
+unsigned char SPI_Master_FIFO_Data_Put(unsigned char Data);
+unsigned char SPI_Master_FIFO_Data_Get(void);
+
+//REG[B9h] SPI master Control Register (SPIMCR2)
+void Mask_SPI_Master_Interrupt_Flag(void);
+void Select_nSS_drive_on_xnsfcs0(void);
+void Select_nSS_drive_on_xnsfcs1(void);
+void nSS_Inactive(void);
+void nSS_Active(void);
+void OVFIRQEN_Enable(void);
+void EMTIRQEN_Enable(void);
+void Reset_CPOL(void);
+void Set_CPOL(void);
+void Reset_CPHA(void);
+void Set_CPHA(void);
+
+//REG[BAh] SPI master Status Register (SPIMSR)
+unsigned char Tx_FIFO_Empty_Flag(void);
+unsigned char Tx_FIFO_Full_Flag(void);
+unsigned char Rx_FIFO_Empty_Flag(void);
+unsigned char Rx_FIFO_full_flag(void);
+unsigned char OVFI_Flag(void);
+void Clear_OVFI_Flag(void);
+unsigned char EMTI_Flag(void);
+void Clear_EMTI_Flag(void);
+
+//REG[BB] SPI Clock period (SPIDIV)
+void SPI_Clock_Period(unsigned char temp);
+
+
+//**[BCh][BDh][BEh][BFh]**//
+void SFI_DMA_Source_Start_Address(unsigned long Addr);
+//**[C0h][C1h][C2h][C3h]**//
+void SFI_DMA_Destination_Start_Address(unsigned long Addr);
+void SFI_DMA_Destination_Upper_Left_Corner(unsigned short WX,unsigned short HY);
+//**[C4h][C5h]**//
+void SFI_DMA_Destination_Width(unsigned short WX);
+//**[C6h][C7h][C8h][C9h]**//
+void SFI_DMA_Transfer_Number(unsigned long Addr);
+void SFI_DMA_Transfer_Width_Height(unsigned short WX,unsigned short HY);
+//**[CAh][CBh]**//
+void SFI_DMA_Source_Width(unsigned short WX);
+
+////////////////////////////////////////////////////////////////////////
+////**** [ Function : Font ] ****////
+//**[CCh]**//
+
+void Font_Select_UserDefine_Mode(void);
+void CGROM_Select_Internal_CGROM(void);
+void CGROM_Select_Genitop_FontROM(void);
+void Font_Select_8x16_16x16(void);
+void Font_Select_12x24_24x24(void);
+void Font_Select_16x32_32x32(void);
+void Internal_CGROM_Select_ISOIEC8859_1(void);
+void Internal_CGROM_Select_ISOIEC8859_2(void);
+void Internal_CGROM_Select_ISOIEC8859_3(void);
+void Internal_CGROM_Select_ISOIEC8859_4(void);
+//**[CDh]**//
+void Enable_Font_Alignment(void);
+void Disable_Font_Alignment(void);
+void Font_Background_select_Transparency(void);
+void Font_Background_select_Color(void);
+void Font_0_degree(void);
+void Font_90_degree(void);
+void Font_Width_X1(void);
+void Font_Width_X2(void);
+void Font_Width_X3(void);
+void Font_Width_X4(void);
+void Font_Height_X1(void);
+void Font_Height_X2(void);
+void Font_Height_X3(void);
+void Font_Height_X4(void);
+//**[CEh]**//
+void GTFont_Select_GT21L16TW_GT21H16T1W(void);
+void GTFont_Select_GT23L16U2W(void);
+void GTFont_Select_GT23L24T3Y_GT23H24T3Y(void);
+void GTFont_Select_GT23L24M1Z(void);
+void GTFont_Select_GT23L32S4W_GT23H32S4W(void);
+void GTFont_Select_GT20L24F6Y(void);
+void GTFont_Select_GT21L24S1W(void);
+void GTFont_Select_GT22L16A1Y(void);
+//**[CFh]**//
+void Set_GTFont_Decoder(unsigned char temp);
+//**[D0h]**//
+void Font_Line_Distance(unsigned char temp);
+//**[D1h]**//
+void Set_Font_to_Font_Width(unsigned char temp);
+//**[D2h]~[D4h]**//
+void Foreground_RGB(unsigned char RED,unsigned char GREEN,unsigned char BLUE);
+void Foreground_color_256(unsigned char temp);
+void Foreground_color_65k(unsigned short temp);
+void Foreground_color_16M(unsigned long temp);
+//**[D5h]~[D7h]**//
+void Background_RGB(unsigned char RED,unsigned char GREEN,unsigned char BLUE);
+void Background_color_256(unsigned char temp);
+void Background_color_65k(unsigned short temp);
+void Background_color_16M(unsigned long temp);
+//**[DBh]~[DEh]**//
+void CGRAM_Start_address(unsigned long Addr);
+//**[DFh]**//
+void Power_Normal_Mode(void);
+void Power_Saving_Standby_Mode(void);
+void Power_Saving_Suspend_Mode(void);
+void Power_Saving_Sleep_Mode(void);
+
+////////////////////////////////////////////////////////////////////////
+////**** [ Function : SDRAM ] ****////
+//**[E0h]~[E4h]**//
+// LT768_Select_SDRAM();
+
+
+////////////////////////////////////////////////////////////////////////
+////**** [ Function : I2C ] ****////
+//**[E5h]~[EAh]**//
+void LT768_I2CM_Clock_Prescale(unsigned short WX);
+//**[E7h]**//
+void LT768_I2CM_Transmit_Data(unsigned char temp);
+//**[E8h]**//
+unsigned char LT768_I2CM_Receiver_Data(void);
+//**[E9h]**//
+
+void LT768_I2CM_Read_With_Ack(void);
+void LT768_I2CM_Read_With_Nack(void);
+void LT768_I2CM_Write_With_Start(void);
+void LT768_I2CM_Write(void);
+void LT768_I2CM_Stop(void);
+
+
+//**[EAh]**//
+unsigned char LT768_I2CM_Check_Slave_ACK(void);
+unsigned char LT768_I2CM_Bus_Busy(void);
+unsigned char LT768_I2CM_transmit_Progress(void);
+unsigned char LT768_I2CM_Arbitration(void);
+
+
+
+////////////////////////////////////////////////////////////////////////
+////**** [ Function : GPIO ] ****////
+//[F0h][F1h]
+void Set_GPIO_A_In_Out(unsigned char temp);
+void Write_GPIO_A_7_0(unsigned char temp);
+unsigned char Read_GPIO_A_7_0(void);
+//[F2h]
+void Write_GPIO_B_7_4(unsigned char temp);
+unsigned char Read_GPIO_B_7_0(void);
+//[F3h][F4h]
+void Set_GPIO_C_In_Out(unsigned char temp);
+void Write_GPIO_C_7_0(unsigned char temp);
+unsigned char Read_GPIO_C_7_0(void);
+//[F5h][F6h]
+void Set_GPIO_D_In_Out(unsigned char temp);
+void Write_GPIO_D_7_0(unsigned char temp);
+unsigned char Read_GPIO_D_7_0(void);
+//[F7h][F8h]
+void Set_GPIO_E_In_Out(unsigned char temp);
+void Write_GPIO_E_7_0(unsigned char temp);
+unsigned char Read_GPIO_E_7_0(void);
+//[F9h][FAh]
+void Set_GPIO_F_In_Out(unsigned char temp);
+void Write_GPIO_F_7_0(unsigned char temp);
+unsigned char Read_GPIO_F_7_0(void);
+
+
+////////////////////////////////////////////////////////////////////////
+////**** [ Function : Key ] ****////
+//**[FBh]~[FFh]**//
+//[FBh]
+void Long_Key_enable(void);
+void Key_Scan_Freg(unsigned char temp);  //set bit2~0
+
+//[FCh]
+void Key_Scan_Wakeup_Function_Enable(void);
+void Long_Key_Timing_Adjustment(unsigned char setx);//set bit5~3
+unsigned char Numbers_of_Key_Hit(void);
+
+//[FDh][FEh][FFh]
+unsigned char Read_Key_Strobe_Data_0(void);
+unsigned char Read_Key_Strobe_Data_1(void);
+unsigned char Read_Key_Strobe_Data_2(void);
+
+void Show_String(char *str);
+void Show_picture(unsigned long numbers,const unsigned short *data);
+
+void PWM0_ON(void);    //开PWM0
+
+void lt768_hw_reset(void);
+void System_Check_Temp(void);
+void Enable_SPI_Flash_DMA(unsigned char val);
+
+#endif
+
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/include/nuttx/lcd/lt768_lib.h b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/include/nuttx/lcd/lt768_lib.h
new file mode 100755
index 000000000..6c6adaf1f
--- /dev/null
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/include/nuttx/lcd/lt768_lib.h
@@ -0,0 +1,306 @@
+/********************* COPYRIGHT  **********************
+* File Name        : lt768_lib.h
+* Author           : Levetop Electronics
+* Version          : V1.3
+* Date             : 2019-5-14
+* Description      : LT768x所有功能函数
+********************************************************/
+
+#ifndef _LT768_Lib_H
+#define _LT768_Lib_H
+#include "lt768.h"
+
+//外部晶振
+#define XI_4M            0
+#define XI_8M            1
+#define XI_10M           0
+#define XI_12M           0
+
+//分辨率
+#define LCD_XSIZE_TFT  480
+#define LCD_YSIZE_TFT  272
+
+//参数
+#define LCD_VBPD    20
+#define LCD_VFPD    12
+#define LCD_VSPW    3
+#define LCD_HBPD    140
+#define LCD_HFPD    160
+#define LCD_HSPW    20
+
+#define color256_black   0x00
+#define color256_white   0xff
+#define color256_red     0xe0
+#define color256_green   0x1c
+#define color256_blue    0x03
+#define color256_yellow  color256_red|color256_green
+#define color256_cyan    color256_green|color256_blue
+#define color256_purple  color256_red|color256_blue
+
+#define color65k_black   0x0000
+#define color65k_white   0xffff
+#define color65k_red     0xf800
+#define color65k_green   0x07e0
+#define color65k_blue    0x001f
+#define color65k_yellow  color65k_red|color65k_green
+#define color65k_cyan    color65k_green|color65k_blue
+#define color65k_purple  color65k_red|color65k_blue
+
+#define color65k_grayscale1    2113
+#define color65k_grayscale2    2113*2
+#define color65k_grayscale3    2113*3
+#define color65k_grayscale4    2113*4
+#define color65k_grayscale5    2113*5
+#define color65k_grayscale6    2113*6
+#define color65k_grayscale7    2113*7
+#define color65k_grayscale8    2113*8
+#define color65k_grayscale9    2113*9
+#define color65k_grayscale10   2113*10
+#define color65k_grayscale11   2113*11
+#define color65k_grayscale12   2113*12
+#define color65k_grayscale13   2113*13
+#define color65k_grayscale14   2113*14
+#define color65k_grayscale15   2113*15
+#define color65k_grayscale16   2113*16
+#define color65k_grayscale17   2113*17
+#define color65k_grayscale18   2113*18
+#define color65k_grayscale19   2113*19
+#define color65k_grayscale20   2113*20
+#define color65k_grayscale21   2113*21
+#define color65k_grayscale22   2113*22
+#define color65k_grayscale23   2113*23
+#define color65k_grayscale24   2113*24
+#define color65k_grayscale25   2113*25
+#define color65k_grayscale26   2113*26
+#define color65k_grayscale27   2113*27
+#define color65k_grayscale28   2113*28
+#define color65k_grayscale29   2113*29
+#define color65k_grayscale30   2113*30
+
+#define color16M_black   0x00000000
+#define color16M_white   0x00ffffff
+#define color16M_red     0x00ff0000
+#define color16M_green   0x0000ff00
+#define color16M_blue    0x000000ff
+#define color16M_yellow  color16M_red|color16M_green
+#define color16M_cyan    color16M_green|color16M_blue
+#define color16M_purple  color16M_red|color16M_blue
+
+/* LCD color */
+#define White          0xFFFF
+#define Black          0x0000
+#define Grey           0xF7DE
+#define Blue           0x001F
+#define Blue2          0x051F
+#define Red            0xF800
+#define Magenta        0xF81F
+#define Green          0x07E0
+#define Cyan           0x7FFF
+#define Yellow         0xFFE0
+
+#define Line0          0
+#define Line1          24
+#define Line2          48
+#define Line3          72
+#define Line4          96
+#define Line5          120
+#define Line6          144
+#define Line7          168
+#define Line8          192
+#define Line9          216
+#define Line10         240
+#define Line11         264
+#define Line12         288
+#define Line13         312
+#define Line14         336
+#define Line15         360
+#define Line16         384
+#define Line17         408
+#define Line18         432
+#define Line19         456
+#define Line20         480
+#define Line21         504
+#define Line22         528
+#define Line23         552
+#define Line24         576
+#define Line25         600
+
+void lt768_init(void);
+
+/* 写数据到内存 */
+void MPuint8_t_8bpp_Memory_Write(unsigned short x,unsigned short y,unsigned short w,unsigned short h,const unsigned char *data);
+void MPuint8_t_16bpp_Memory_Write(unsigned short x,unsigned short y,unsigned short w,unsigned short h,const unsigned char *data);
+void MPuint8_t_24bpp_Memory_Write(unsigned short x,unsigned short y,unsigned short w,unsigned short h,const unsigned char *data);
+void MPuint16_t_16bpp_Memory_Write(unsigned short x,unsigned short y,unsigned short w,unsigned short h,const unsigned short *data);
+void MPuint16_t_24bpp_Mode1_Memory_Write(unsigned short x,unsigned short y,unsigned short w,unsigned short h,const unsigned short *data);
+void MPuint16_t_24bpp_Mode2_Memory_Write(unsigned short x,unsigned short y,unsigned short w,unsigned short h,const unsigned short *data);
+
+/* 硬件画线段 */
+void LT768_DrawLine(unsigned short X1,unsigned short Y1,unsigned short X2,unsigned short Y2,unsigned long LineColor);
+void LT768_DrawLine_Width(unsigned short X1,unsigned short Y1,unsigned short X2,unsigned short Y2,unsigned long LineColor,unsigned short Width);
+
+/* 硬件画圆 */
+void LT768_DrawCircle(unsigned short XCenter,unsigned short YCenter,unsigned short R,unsigned long CircleColor);
+void LT768_DrawCircle_Fill(unsigned short XCenter,unsigned short YCenter,unsigned short R,unsigned long ForegroundColor);
+void LT768_DrawCircle_Width(unsigned short XCenter,unsigned short YCenter,unsigned short R,unsigned long CircleColor,unsigned long ForegroundColor,unsigned short Width);
+
+/* 硬件画椭圆 */
+void LT768_DrawEllipse(unsigned short XCenter,unsigned short YCenter,unsigned short X_R,unsigned short Y_R,unsigned long EllipseColor);
+void LT768_DrawEllipse_Fill(unsigned short XCenter,unsigned short YCenter,unsigned short X_R,unsigned short Y_R,unsigned long ForegroundColor);
+void LT768_DrawEllipse_Width(unsigned short XCenter,unsigned short YCenter,unsigned short X_R,unsigned short Y_R,unsigned long EllipseColor,unsigned long ForegroundColor,unsigned short Width);
+
+/* 硬件画矩形 */
+void LT768_DrawSquare(unsigned short X1,unsigned short Y1,unsigned short X2,unsigned short Y2,unsigned long SquareColor);
+void LT768_DrawSquare_Fill(unsigned short X1,unsigned short Y1,unsigned short X2,unsigned short Y2,unsigned long ForegroundColor);
+void LT768_DrawSquare_Width(unsigned short X1,unsigned short Y1,unsigned short X2,unsigned short Y2,unsigned long SquareColor,unsigned long ForegroundColor,unsigned short Width);
+
+/* 硬件画圆角矩形 */
+void LT768_DrawCircleSquare(unsigned short X1,unsigned short Y1,unsigned short X2,unsigned short Y2,unsigned short X_R,unsigned short Y_R,unsigned long CircleSquareColor);
+void LT768_DrawCircleSquare_Fill(unsigned short X1,unsigned short Y1,unsigned short X2,unsigned short Y2,unsigned short X_R,unsigned short Y_R,unsigned long ForegroundColor);
+void LT768_DrawCircleSquare_Width(unsigned short X1,unsigned short Y1,unsigned short X2,unsigned short Y2,unsigned short X_R,unsigned short Y_R,unsigned long CircleSquareColor,unsigned long ForegroundColor,unsigned short Width);
+
+/* 硬件画三角形 */
+void LT768_DrawTriangle(unsigned short X1,unsigned short Y1,unsigned short X2,unsigned short Y2,unsigned short X3,unsigned short Y3,unsigned long TriangleColor);
+void LT768_DrawTriangle_Fill(unsigned short X1,unsigned short Y1,unsigned short X2,unsigned short Y2,unsigned short X3,unsigned short Y3,unsigned long ForegroundColor);
+void LT768_DrawTriangle_Frame(unsigned short X1,unsigned short Y1,unsigned short X2,unsigned short Y2,unsigned short X3,unsigned short Y3,unsigned long TriangleColor,unsigned long ForegroundColor);
+
+/* 硬件画四边形 */
+void LT768_DrawQuadrilateral(unsigned short X1,unsigned short Y1,unsigned short X2,unsigned short Y2,unsigned short X3,unsigned short Y3,unsigned short X4,unsigned short Y4,unsigned long ForegroundColor);
+void LT768_DrawQuadrilateral_Fill(unsigned short X1,unsigned short Y1,unsigned short X2,unsigned short Y2,unsigned short X3,unsigned short Y3,unsigned short X4,unsigned short Y4,unsigned long ForegroundColor);
+void LT768_DrawTriangle_Frame(unsigned short X1,unsigned short Y1,unsigned short X2,unsigned short Y2,unsigned short X3,unsigned short Y3,unsigned long TriangleColor ,unsigned long ForegroundColor);
+
+/* 硬件画五边形 */
+void LT768_DrawPentagon(unsigned short X1,unsigned short Y1,unsigned short X2,unsigned short Y2,unsigned short X3,unsigned short Y3,unsigned short X4,unsigned short Y4,unsigned short X5,unsigned short Y5,unsigned long ForegroundColor);
+void LT768_DrawPentagon_Fill(unsigned short X1,unsigned short Y1,unsigned short X2,unsigned short Y2,unsigned short X3,unsigned short Y3,unsigned short X4,unsigned short Y4,unsigned short X5,unsigned short Y5,unsigned long ForegroundColor);
+
+/* 硬件画曲线 */
+void LT768_DrawLeftUpCurve(unsigned short XCenter,unsigned short YCenter,unsigned short X_R,unsigned short Y_R,unsigned long CurveColor);
+void LT768_DrawLeftDownCurve(unsigned short XCenter,unsigned short YCenter,unsigned short X_R,unsigned short Y_R,unsigned long CurveColor);
+void LT768_DrawRightUpCurve(unsigned short XCenter,unsigned short YCenter,unsigned short X_R,unsigned short Y_R,unsigned long CurveColor);
+void LT768_DrawRightDownCurve(unsigned short XCenter,unsigned short YCenter,unsigned short X_R,unsigned short Y_R,unsigned long CurveColor);
+void LT768_SelectDrawCurve(unsigned short XCenter ,unsigned short YCenter,unsigned short X_R,unsigned short Y_R,unsigned long CurveColor,unsigned short  Dir);
+
+/* 硬件画1/4椭圆 */
+void LT768_DrawLeftUpCurve_Fill(unsigned short XCenter,unsigned short YCenter,unsigned short X_R,unsigned short Y_R,unsigned long ForegroundColor);
+void LT768_DrawLeftDownCurve_Fill(unsigned short XCenter,unsigned short YCenter,unsigned short X_R,unsigned short Y_R,unsigned long ForegroundColor);
+void LT768_DrawRightUpCurve_Fill(unsigned short XCenter,unsigned short YCenter,unsigned short X_R,unsigned short Y_R,unsigned long ForegroundColor);
+void LT768_DrawRightDownCurve_Fill(unsigned short XCenter,unsigned short YCenter,unsigned short X_R,unsigned short Y_R,unsigned long ForegroundColor);
+void LT768_SelectDrawCurve_Fill(unsigned short XCenter,unsigned short YCenter,unsigned short X_R,unsigned short Y_R,unsigned long CurveColor,unsigned short  Dir);
+
+/* 硬件画圆柱 */
+unsigned char LT768_DrawCylinder(unsigned short XCenter,unsigned short YCenter,unsigned short X_R,unsigned short Y_R,unsigned short H,unsigned long CylinderColor,unsigned long ForegroundColor);
+
+/* 硬件画四棱柱 */
+void LT768_DrawQuadrangular(unsigned short X1,unsigned short Y1,unsigned short X2,unsigned short Y2,unsigned short X3,unsigned short Y3,unsigned short X4,unsigned short Y4,unsigned short X5,unsigned short Y5,unsigned short X6,unsigned short Y6,unsigned long QuadrangularColor,unsigned long ForegroundColor);
+
+/* 表格 */
+void LT768_MakeTable(unsigned short X1,unsigned short Y1,unsigned short W,unsigned short H,unsigned short Line,unsigned short Row,unsigned long  TableColor,unsigned long  ItemColor,unsigned long  ForegroundColor,unsigned short width1,unsigned short width2,unsigned char  mode);
+
+/* 线性模式下DMA传输数据到SDRAM中 */
+void LT768_DMA_24bit_Linear(unsigned char SCS,unsigned char Clk,unsigned long flash_addr,unsigned long memory_ad,unsigned long data_num);
+void LT768_DMA_32bit_Linear(unsigned char SCS,unsigned char Clk,unsigned long flash_addr,unsigned long memory_ad,unsigned long data_num);
+
+/* 区块模式下DMA传输数据到SDRAM中 */
+void LT768_DMA_24bit_Block(unsigned char SCS,unsigned char Clk,unsigned short X1,unsigned short Y1 ,unsigned short X_W,unsigned short Y_H,unsigned short P_W,unsigned long Addr);
+void LT768_DMA_32bit_Block(unsigned char SCS,unsigned char Clk,unsigned short X1,unsigned short Y1 ,unsigned short X_W,unsigned short Y_H,unsigned short P_W,unsigned long Addr);
+
+/* 使用内建字库 */
+void LT768_Select_Internal_Font_Init(unsigned char Size,unsigned char XxN,unsigned char YxN,unsigned char ChromaKey,unsigned char Alignment);
+void LT768_Print_Internal_Font_String(unsigned short x,unsigned short y,unsigned long FontColor,unsigned long BackGroundColor ,char *c);
+
+/* nor flash使用外建字库 */
+/* 16*16 24*24 32*32 */
+void LT768_Select_Outside_Font_Init(unsigned char SCS,unsigned char Clk,unsigned long FlashAddr,unsigned long MemoryAddr,unsigned long Num,unsigned char Size,unsigned char XxN,unsigned char YxN,unsigned char ChromaKey,unsigned char Alignment);
+void LT768_Print_Outside_Font_String(unsigned short x,unsigned short y,unsigned long FontColor,unsigned long BackGroundColor,unsigned char *c);
+void LT768_Print_Outside_Font_GBK_String(unsigned short x,unsigned short y,unsigned long FontColor,unsigned long BackGroundColor,unsigned char *c);
+/* 48*48 72*72全角 */
+void LT768_BTE_Memory_Copy_ColorExpansion_8(unsigned long S0_Addr,unsigned short YS0,unsigned long Des_Addr,unsigned short Des_W,unsigned short XDes,unsigned short YDes,unsigned short X_W,unsigned short Y_H,unsigned long Foreground_color,unsigned long Background_color);
+void LT768_BTE_Memory_Copy_ColorExpansion_Chroma_key_8(unsigned long S0_Addr,unsigned short YS0,unsigned long Des_Addr,unsigned short Des_W,unsigned short XDes,unsigned short YDes,unsigned short X_W,unsigned short Y_H,unsigned long Foreground_color);
+void LT768_Print_Outside_Font_GB2312_48_72(unsigned char SCS,unsigned char Clk,unsigned long FlashAddr,unsigned long MemoryAddr,unsigned long ShowAddr,unsigned short width,unsigned char Size,unsigned char ChromaKey,unsigned short x,unsigned short y,unsigned long FontColor,unsigned long BackGroundColor,unsigned short w,unsigned short s,unsigned char *c);
+void LT768_Print_Outside_Font_BIG5_48_72(unsigned char SCS,unsigned char Clk,unsigned long FlashAddr,unsigned long MemoryAddr,unsigned long ShowAddr,unsigned short width,unsigned char Size,unsigned char ChromaKey,unsigned short x,unsigned short y,unsigned long FontColor,unsigned long BackGroundColor,unsigned short w,unsigned short s,unsigned char *c);
+void LT768_Print_Outside_Font_GBK_48_72(unsigned char SCS,unsigned char Clk,unsigned long FlashAddr,unsigned long MemoryAddr,unsigned long ShowAddr,unsigned short width,unsigned char Size,unsigned char ChromaKey,unsigned short x,unsigned short y,unsigned long FontColor,unsigned long BackGroundColor,unsigned short w,unsigned short s,unsigned char *c);
+
+/* nor flash使用自定义字库 */
+/* 16*16 24*24 32*32 48*48 72*72全角 */
+int Get_User_Font_P(char chH,char chL);
+void LT768_Print_Outside_UserDefineFont_GB2312(unsigned char SCS,unsigned char Clk,unsigned long FlashAddr,unsigned long MemoryAddr,unsigned long ShowAddr,unsigned short width,unsigned char Size,unsigned char ChromaKey,unsigned short x,unsigned short y,unsigned long FontColor,unsigned long BackGroundColor,unsigned short w,unsigned short s,unsigned char *c);
+
+/* 文字光标 */
+void LT768_Text_cursor_Init(unsigned char On_Off_Blinking,unsigned short Blinking_Time,unsigned short X_W,unsigned short Y_W);
+void LT768_Enable_Text_Cursor(void);
+void LT768_Disable_Text_Cursor(void);
+
+/*  图像光标 */
+void LT768_Graphic_cursor_Init(unsigned char Cursor_N,unsigned char Color1,unsigned char Color2,unsigned short X_Pos,unsigned short Y_Pos,unsigned char *Cursor_Buf);
+void LT768_Set_Graphic_cursor_Pos(unsigned char Cursor_N,unsigned short X_Pos,unsigned short Y_Pos);
+void LT768_Enable_Graphic_Cursor(void);
+void LT768_Disable_Graphic_Cursor(void);
+
+/* 区块传输引擎（BitBLT） */
+void BTE_Solid_Fill(unsigned long Des_Addr,unsigned short Des_W,unsigned short XDes,unsigned short YDes,unsigned short color,unsigned short X_W,unsigned short Y_H);
+void LT768_BTE_Memory_Copy(unsigned long S0_Addr,unsigned short S0_W,unsigned short XS0,unsigned short YS0,unsigned long S1_Addr,unsigned short S1_W,unsigned short XS1,unsigned short YS1,unsigned long Des_Addr,unsigned short Des_W,unsigned short XDes,unsigned short YDes,unsigned int ROP_Code,unsigned short X_W,unsigned short Y_H);
+void LT768_BTE_Memory_Copy_Chroma_key(unsigned long S0_Addr,unsigned short S0_W,unsigned short XS0,unsigned short YS0,unsigned long Des_Addr,unsigned short Des_W,unsigned short XDes,unsigned short YDes,unsigned long Background_color,unsigned short X_W,unsigned short Y_H);
+void LT768_BTE_Pattern_Fill(unsigned char P_8x8_or_16x16,unsigned long S0_Addr,unsigned short S0_W,unsigned short XS0,unsigned short YS0,unsigned long Des_Addr,unsigned short Des_W, unsigned short XDes,unsigned short YDes,unsigned int ROP_Code ,unsigned short X_W,unsigned short Y_H);
+void LT768_BTE_Pattern_Fill_With_Chroma_key(unsigned char P_8x8_or_16x16,unsigned long S0_Addr,unsigned short S0_W,unsigned short XS0,unsigned short YS0,unsigned long Des_Addr,unsigned short Des_W,unsigned short XDes,unsigned short YDes,unsigned int ROP_Code,unsigned long Background_color,unsigned short X_W,unsigned short Y_H);
+void LT768_BTE_MCU_Write_MCU_16bit(unsigned long S1_Addr,unsigned short S1_W,unsigned short XS,unsigned short YS1,unsigned long Des_Addr,unsigned short Des_W,unsigned short XDes,unsigned short YDes,unsigned int ROP_Code,unsigned short X_W,unsigned short Y_H ,const unsigned short *data);
+void LT768_BTE_MCU_Write_Chroma_key_MCU_16bit(unsigned long Des_Addr,unsigned short Des_W,unsigned short XDes,unsigned short YDes,unsigned long Background_color,unsigned short X_W,unsigned short Y_H,const unsigned short *data);
+void LT768_BTE_MCU_Write_ColorExpansion_MCU_16bit(unsigned long Des_Addr,unsigned short Des_W,unsigned short XDes,unsigned short YDes,unsigned short X_W,unsigned short Y_H,unsigned long Foreground_color ,unsigned long Background_color ,const unsigned short *data);
+void LT768_BTE_MCU_Write_ColorExpansion_Chroma_key_MCU_16bit(unsigned long Des_Addr,unsigned short Des_W,unsigned short XDes,unsigned short YDes,unsigned short X_W,unsigned short Y_H,unsigned long Foreground_color,const unsigned short *data);
+void BTE_Alpha_Blending(unsigned long S0_Addr,unsigned short S0_W,unsigned short XS0,unsigned short YS0,unsigned long S1_Addr,unsigned short S1_W,unsigned short XS1,unsigned short YS1,unsigned long Des_Addr,unsigned short Des_W,unsigned short XDes,unsigned short YDes,unsigned short X_W,unsigned short Y_H,unsigned char alpha);
+void BTE_Pixel_8bpp_Alpha_Blending(unsigned long S0_Addr,unsigned short S0_W,unsigned short XS0,unsigned short YS0,unsigned long S1_Addr,unsigned short S1_W,unsigned short XS1,unsigned short YS1,unsigned long Des_Addr,unsigned short Des_W,unsigned short XDes,unsigned short YDes,unsigned short X_W,unsigned short Y_H);
+void BTE_Pixel_16bpp_Alpha_Blending(unsigned long S0_Addr,unsigned short S0_W,unsigned short XS0,unsigned short YS0,unsigned long S1_Addr,unsigned short S1_W,unsigned short XS1,unsigned short YS1,unsigned long Des_Addr,unsigned short Des_W,unsigned short XDes,unsigned short YDes,unsigned short X_W,unsigned short Y_H);
+
+/*  PIP */
+void LT768_PIP_Init(unsigned char On_Off,unsigned char Select_PIP,unsigned long PAddr,unsigned short XP,unsigned short YP,unsigned long ImageWidth,unsigned short X_Dis,unsigned short Y_Dis,unsigned short X_W,unsigned short Y_H);
+void LT768_Set_DisWindowPos(unsigned char On_Off,unsigned char Select_PIP,unsigned short X_Dis,unsigned short Y_Dis);
+
+/*  PWM */
+void LT768_PWM0_Init(unsigned char on_off,unsigned char Clock_Divided,unsigned char Prescalar,unsigned short Count_Buffer,unsigned short Compare_Buffer);
+void LT768_PWM1_Init(unsigned char on_off,unsigned char Clock_Divided,unsigned char Prescalar,unsigned short Count_Buffer,unsigned short Compare_Buffer);
+void LT768_PWM0_Duty(unsigned short Compare_Buffer);
+void LT768_PWM1_Duty(unsigned short Compare_Buffer);
+
+/*  Standby Mode */
+void LT768_Standby(void);
+void LT768_Wkup_Standby(void);
+
+/* Suspend Mode */
+void LT768_Suspend(void);
+void LT768_Wkup_Suspend(void);
+
+/* Sleep Mode */
+void LT768_SleepMode(void);
+void LT768_Wkup_Sleep(void);
+
+/* W25QXX */
+void LT768_SPI_Init(uint8_t cs,uint8_t div);
+void W25QXX_Enter_4Byte_AddressMode(void);
+void LT_W25QXX_Read(uint8_t* pBuffer,uint32_t ReadAddr,uint16_t NumByteToRead);
+
+/* nand flash W25N01GV */
+uint8_t W25N01GV_ReadSR(uint8_t reg);
+void W25N01GV_Write_SR(uint8_t reg,uint8_t val);
+void W25N01GV_Wait_Busy(void);
+void W25N01GV_ContinuousRead_Mode(void);
+void W25N01GV_Write_Page(uint16_t page);
+void W25N01GV_ReadPageAddr_Data(uint8_t* pBuffer,uint32_t PageNum,uint32_t PageAddr,uint16_t NumByteToRead);
+void LT_W25N01GV_Read(uint8_t* pBuffer,uint32_t ReadAddr,uint16_t NumByteToRead);
+
+/* nand flash显示图片 */
+void LT768_Nand_Pic(unsigned char SCS,unsigned short X1,unsigned short Y1,unsigned short X_W,unsigned short Y_H,unsigned long Addr,unsigned long lay0,unsigned long lay1);
+
+/* nand flash使用外建字库初始化 */
+/* 16*16 24*24 32*32 */
+void NandFlash_Select_Outside_Font_Init(unsigned char SCS,unsigned char Clk,unsigned long FlashAddr,unsigned long MemoryAddr,unsigned long Num,unsigned char Size,unsigned char XxN,unsigned char YxN,unsigned char ChromaKey,unsigned char Alignment);
+
+/* nand flash使用外建字库 */
+/* 48*48 72*72全角 */
+void LT768_BTE_Memory_Copy_8(unsigned long S0_Addr,unsigned short S0_W,unsigned short XS0,unsigned short YS0,unsigned long S1_Addr,unsigned short S1_W,unsigned short XS1,unsigned short YS1,unsigned long Des_Addr,unsigned short Des_W,unsigned short XDes,unsigned short YDes,unsigned int ROP_Code,unsigned short X_W,unsigned short Y_H);
+void LT768_Nand_8bpp_font(unsigned char SCS,unsigned char Clk,unsigned short X1,unsigned short Y1,unsigned short X_W,unsigned short Y_H,unsigned long Addr,unsigned long lay1,unsigned long lay2);
+void LT768_Print_Outside_Font_GB2312_48_72_Nand(unsigned char SCS,unsigned char Clk,unsigned long FlashAddr,unsigned long MemoryAddr1,unsigned long MemoryAddr2,unsigned long ShowAddr,unsigned short width,unsigned char Size,unsigned char ChromaKey,unsigned short x,unsigned short y,unsigned long FontColor,unsigned long BackGroundColor,unsigned short w,unsigned short s,unsigned char *c);
+void LT768_Print_Outside_Font_GBK_48_72_Nand(unsigned char SCS,unsigned char Clk,unsigned long FlashAddr,unsigned long MemoryAddr1,unsigned long MemoryAddr2,unsigned long ShowAddr,unsigned short width,unsigned char Size,unsigned char ChromaKey,unsigned short x,unsigned short y,unsigned long FontColor,unsigned long BackGroundColor,unsigned short w,unsigned short s,unsigned char *c);
+
+/* nand flash使用自定义字库 */
+/* 16*16 24*24 32*32 48*48 72*72全角 */
+void LT768_Print_Outside_UserDefineFont_GB2312_Nand(unsigned char SCS,unsigned char Clk,unsigned long FlashAddr,unsigned long MemoryAddr1,unsigned long MemoryAddr2,unsigned long ShowAddr,unsigned short width,unsigned char Size,unsigned char ChromaKey,unsigned short x,unsigned short y,unsigned long FontColor,unsigned long BackGroundColor,unsigned short w,unsigned short s,unsigned char *c);
+#endif
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/tools/Makefile.unix b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/tools/Unix.mk
similarity index 79%
rename from Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/tools/Makefile.unix
rename to Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/tools/Unix.mk
index d63883a12..79351fd5e 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/tools/Makefile.unix
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/tools/Unix.mk
@@ -1,5 +1,5 @@
 ############################################################################
-# tools/Makefile.unix
+# tools/Unix.mk
 #
 # Licensed to the Apache Software Foundation (ASF) under one or more
 # contributor license agreements.  See the NOTICE file distributed with
@@ -42,9 +42,12 @@ CONFIG_VERSION_BUILD ?= "0"
 VERSION_ARG = -v $(CONFIG_VERSION_STRING) -b $(CONFIG_VERSION_BUILD)
 else
 
-# Generate .version every time from GIT history
+# Generate .version.tmp every time from GIT history
+# Only update .version if the contents of version.tmp actually changes
+# Note: this is executed before any rule is run
 
-.PHONY: $(TOPDIR)/.version
+$(shell tools/version.sh .version.tmp > /dev/null)
+$(shell $(call TESTANDREPLACEFILE, .version.tmp, .version))
 endif
 
 # Process architecture specific directories
@@ -155,7 +158,7 @@ endif
 BIN = nuttx$(EXEEXT)
 
 all: $(BIN)
-.PHONY: dirlinks context clean_context config oldconfig menuconfig nconfig qconfig gconfig export subdir_clean clean subdir_distclean distclean apps_clean apps_distclean
+.PHONY: context clean_context config oldconfig menuconfig nconfig qconfig gconfig export subdir_clean clean subdir_distclean distclean apps_clean apps_distclean
 .PHONY: pass1 pass1dep
 .PHONY: pass2 pass2dep
 
@@ -182,10 +185,8 @@ NEED_MATH_H = y
 endif
 
 ifeq ($(NEED_MATH_H),y)
-include/math.h: include/nuttx/lib/math.h .clean_context
+include/math.h: include/nuttx/lib/math.h
 	$(Q) cp -f include/nuttx/lib/math.h include/math.h
-else
-include/math.h:
 endif
 
 # The float.h header file defines the properties of your floating point
@@ -195,10 +196,8 @@ endif
 # the settings in this float.h are actually correct for your platform!
 
 ifeq ($(CONFIG_ARCH_FLOAT_H),y)
-include/float.h: include/nuttx/lib/float.h .clean_context
+include/float.h: include/nuttx/lib/float.h
 	$(Q) cp -f include/nuttx/lib/float.h include/float.h
-else
-include/float.h:
 endif
 
 # Target used to copy include/nuttx/lib/stdarg.h.  If CONFIG_ARCH_STDARG_H is
@@ -207,10 +206,8 @@ endif
 # have to copy stdarg.h from include/nuttx/. to include/.
 
 ifeq ($(CONFIG_ARCH_STDARG_H),y)
-include/stdarg.h: include/nuttx/lib/stdarg.h .clean_context
+include/stdarg.h: include/nuttx/lib/stdarg.h
 	$(Q) cp -f include/nuttx/lib/stdarg.h include/stdarg.h
-else
-include/stdarg.h:
 endif
 
 # Target used to copy include/nuttx/lib/setjmp.h.  If CONFIG_ARCH_SETJMP_H is
@@ -219,10 +216,8 @@ endif
 # have to copy setjmp.h from include/nuttx/. to include/.
 
 ifeq ($(CONFIG_ARCH_SETJMP_H),y)
-include/setjmp.h: include/nuttx/lib/setjmp.h .clean_context
+include/setjmp.h: include/nuttx/lib/setjmp.h
 	$(Q) cp -f include/nuttx/lib/setjmp.h include/setjmp.h
-else
-include/setjmp.h:
 endif
 
 # Targets used to build include/nuttx/version.h.  Creation of version.h is
@@ -239,10 +234,9 @@ $(TOPDIR)/.version:
 	$(Q) tools/version.sh $(VERSION_ARG) .version
 	$(Q) chmod 755 .version
 
-include/nuttx/version.h: $(TOPDIR)/.version tools/mkversion$(HOSTEXEEXT) .clean_context
+include/nuttx/version.h: $(TOPDIR)/.version tools/mkversion$(HOSTEXEEXT)
 	$(Q) echo "Create version.h"
-	$(Q) tools/mkversion $(TOPDIR) > $@.tmp
-	$(Q) $(call TESTANDREPLACEFILE, $@.tmp, $@)
+	$(Q) tools/mkversion $(TOPDIR) > $@
 
 # Targets used to build include/nuttx/config.h.  Creation of config.h is
 # part of the overall NuttX configuration sequence. Notice that the
@@ -251,7 +245,7 @@ include/nuttx/version.h: $(TOPDIR)/.version tools/mkversion$(HOSTEXEEXT) .clean_
 tools/mkconfig$(HOSTEXEEXT):
 	$(Q) $(MAKE) -C tools -f Makefile.host mkconfig$(HOSTEXEEXT)
 
-include/nuttx/config.h: $(TOPDIR)/.config tools/mkconfig$(HOSTEXEEXT) .clean_context
+include/nuttx/config.h: $(TOPDIR)/.config tools/mkconfig$(HOSTEXEEXT)
 	$(Q) tools/mkconfig $(TOPDIR) > $@.tmp
 	$(Q) $(call TESTANDREPLACEFILE, $@.tmp, $@)
 
@@ -263,7 +257,7 @@ tools/mkdeps$(HOSTEXEEXT):
 tools/cnvwindeps$(HOSTEXEEXT):
 	$(Q) $(MAKE) -C tools -f Makefile.host cnvwindeps$(HOSTEXEEXT)
 
-# dirlinks, and helpers
+# .dirlinks, and helpers
 #
 # Directories links.  Most of establishing the NuttX configuration involves
 # setting up symbolic links with 'generic' directory names to specific,
@@ -271,72 +265,152 @@ tools/cnvwindeps$(HOSTEXEEXT):
 
 # Link the arch/<arch-name>/include directory to include/arch
 
-include/arch: .clean_context
-	@echo "LN: include/arch to $(ARCH_DIR)/include"
-	$(Q) $(DIRLINK) $(TOPDIR)/$(ARCH_DIR)/include include/arch
-	$(Q) touch $@
+include/arch:
+	@echo "LN: $@ to $(ARCH_DIR)/include"
+	$(Q) $(DIRLINK) $(TOPDIR)/$(ARCH_DIR)/include $@
 
 # Link the boards/<arch>/<chip>/<board>/include directory to include/arch/board
 
-include/arch/board: include/arch
-	@echo "LN: include/arch/board to $(BOARD_DIR)/include"
-	$(Q) $(DIRLINK) $(BOARD_DIR)/include include/arch/board
-	$(Q) touch $@
+include/arch/board: | include/arch
+	@echo "LN: $@ to $(BOARD_DIR)/include"
+	$(Q) $(DIRLINK) $(BOARD_DIR)/include $@
 
-ifneq ($(BOARD_COMMON_DIR),)
 # Link the boards/<arch>/<chip>/common dir to arch/<arch-name>/src/board
 # Link the boards/<arch>/<chip>/<board>/src dir to arch/<arch-name>/src/board/board
 
-$(ARCH_SRC)/board: .clean_context
-	@echo "LN: $(ARCH_SRC)/board to $(BOARD_COMMON_DIR)"
-	$(Q) $(DIRLINK) $(BOARD_COMMON_DIR) $(ARCH_SRC)/board
-	@echo "LN: $(ARCH_SRC)/board/board to $(BOARD_DIR)/src"
-	$(Q) $(DIRLINK) $(BOARD_DIR)/src $(ARCH_SRC)/board/board
-	$(Q) touch $@
+ifneq ($(BOARD_COMMON_DIR),)
+ARCH_SRC_BOARD_SYMLINK=$(BOARD_COMMON_DIR)
+ARCH_SRC_BOARD_BOARD_SYMLINK=$(BOARD_DIR)/src
 else
-# Link the boards/<arch>/<chip>/<board>/src dir to arch/<arch-name>/src/board
+ARCH_SRC_BOARD_SYMLINK=$(BOARD_DIR)/src
+endif
 
-$(ARCH_SRC)/board: .clean_context
-	@echo "LN: $(ARCH_SRC)/board to $(BOARD_DIR)/src"
-	$(Q) $(DIRLINK) $(BOARD_DIR)/src $(ARCH_SRC)/board
-	$(Q) touch $@
+ifneq ($(ARCH_SRC_BOARD_SYMLINK),)
+$(ARCH_SRC)/board:
+	@echo "LN: $@ to $(ARCH_SRC_BOARD_SYMLINK)"
+	$(Q) $(DIRLINK) $(ARCH_SRC_BOARD_SYMLINK) $@
+endif
+
+ifneq ($(ARCH_SRC_BOARD_BOARD_SYMLINK),)
+$(ARCH_SRC)/board/board: | $(ARCH_SRC)/board
+	@echo "LN: $@ to $(ARCH_SRC_BOARD_BOARD_SYMLINK)"
+	$(Q) $(DIRLINK) $(ARCH_SRC_BOARD_BOARD_SYMLINK) $@
 endif
 
 # Link the boards/<arch>/<chip>/drivers dir to drivers/platform
 
-drivers/platform: .clean_context
-	@echo "LN: $(TOPDIR)/drivers/platform to $(BOARD_DRIVERS_DIR)"
-	$(Q) $(DIRLINK) $(BOARD_DRIVERS_DIR) $(TOPDIR)/drivers/platform
-	$(Q) touch $@
+drivers/platform:
+	@echo "LN: $@ to $(BOARD_DRIVERS_DIR)"
+	$(Q) $(DIRLINK) $(BOARD_DRIVERS_DIR) $@
 
 # Link arch/<arch-name>/src/<chip-name> to arch/<arch-name>/src/chip
 
-$(ARCH_SRC)/chip: .clean_context
 ifeq ($(CONFIG_ARCH_CHIP_CUSTOM),y)
-	@echo "LN: $(ARCH_SRC)/chip to $(CHIP_DIR)"
-	$(Q) $(DIRLINK) $(CHIP_DIR) $(ARCH_SRC)/chip
+ARCH_SRC_CHIP_SYMLINK_DIR=$(CHIP_DIR)
 else ifneq ($(CONFIG_ARCH_CHIP),)
-	@echo "LN: $(ARCH_SRC)/chip to $(ARCH_SRC)/$(CONFIG_ARCH_CHIP)"
-	$(Q) $(DIRLINK) $(TOPDIR)/$(ARCH_SRC)/$(CONFIG_ARCH_CHIP) $(ARCH_SRC)/chip
+ARCH_SRC_CHIP_SYMLINK_DIR=$(TOPDIR)/$(ARCH_SRC)/$(CONFIG_ARCH_CHIP)
+endif
+
+ifneq ($(ARCH_SRC_CHIP_SYMLINK_DIR),)
+$(ARCH_SRC)/chip:
+	@echo "LN: $@ to $(ARCH_SRC_CHIP_SYMLINK_DIR)"
+	$(Q) $(DIRLINK) $(ARCH_SRC_CHIP_SYMLINK_DIR) $@
 endif
-	$(Q) cp -f $(CHIP_KCONFIG) $(TOPDIR)/arch/dummy/Kconfig
-	$(Q) touch $@
 
 # Link arch/<arch-name>/include/<chip-name> to include/arch/chip
 
-include/arch/chip: include/arch
 ifeq ($(CONFIG_ARCH_CHIP_CUSTOM),y)
-	@echo "LN: include/arch/chip to $(CHIP_DIR)/include"
-	$(Q) $(DIRLINK) $(CHIP_DIR)/include include/arch/chip
+INCLUDE_ARCH_CHIP_SYMLINK_DIR=$(CHIP_DIR)/include
 else ifneq ($(CONFIG_ARCH_CHIP),)
-	@echo "LN: include/arch/chip to $(ARCH_INC)/$(CONFIG_ARCH_CHIP)"
-	$(Q) $(DIRLINK) $(TOPDIR)/$(ARCH_INC)/$(CONFIG_ARCH_CHIP) include/arch/chip
+INCLUDE_ARCH_CHIP_SYMLINK_DIR=$(TOPDIR)/$(ARCH_INC)/$(CONFIG_ARCH_CHIP)
 endif
+
+ifneq ($(INCLUDE_ARCH_CHIP_SYMLINK_DIR),)
+include/arch/chip: | include/arch
+	@echo "LN: $@ to $(INCLUDE_ARCH_CHIP_SYMLINK_DIR)"
+	$(DIRLINK) $(INCLUDE_ARCH_CHIP_SYMLINK_DIR) $@
+endif
+
+# Copy $(CHIP_KCONFIG) to arch/dummy/Kconfig
+
+arch/dummy/Kconfig:
+	@echo "CP: $@ to $(CHIP_KCONFIG)"
+	$(Q) cp -f $(CHIP_KCONFIG) $@
+
+# Copy $(BOARD_KCONFIG) to boards/dummy/Kconfig
+
+boards/dummy/Kconfig:
+	@echo "CP: $@ to $(BOARD_KCONFIG)"
+	$(Q) cp -f $(BOARD_KCONFIG) $@
+
+DIRLINKS_SYMLINK = \
+  include/arch \
+  include/arch/board \
+  drivers/platform \
+
+DIRLINKS_FILE = \
+  arch/dummy/Kconfig \
+  boards/dummy/Kconfig \
+
+ifneq ($(INCLUDE_ARCH_CHIP_SYMLINK_DIR),)
+DIRLINKS_SYMLINK += include/arch/chip
+endif
+
+ifneq ($(ARCH_SRC_CHIP_SYMLINK_DIR),)
+DIRLINKS_SYMLINK += $(ARCH_SRC)/chip
+endif
+
+ifneq ($(ARCH_SRC_BOARD_SYMLINK),)
+DIRLINKS_SYMLINK += $(ARCH_SRC)/board
+endif
+
+ifneq ($(ARCH_SRC_BOARD_BOARD_SYMLINK),)
+DIRLINKS_SYMLINK += $(ARCH_SRC)/board/board
+endif
+
+ifneq ($(APPDIR),)
+DIRLINKS_EXTERNAL_DIRS += $(APPDIR)
+endif
+
+# Generate a pattern to build $(DIRLINKS_EXTERNAL_DIRS)
+
+DIRLINKS_EXTERNAL_DEP = $(patsubst %,%/.dirlinks,$(DIRLINKS_EXTERNAL_DIRS))
+DIRLINKS_FILE += $(DIRLINKS_EXTERNAL_DEP)
+
+.dirlinks: $(DIRLINKS_FILE) | $(DIRLINKS_SYMLINK)
+	touch $@
+
+# Pattern rule for $(DIRLINKS_EXTERNAL_DEP)
+
+%/.dirlinks:
+	$(Q) $(MAKE) -C $(patsubst %/.dirlinks,%,$@) dirlinks
 	$(Q) touch $@
 
-dirlinks: include/arch include/arch/board include/arch/chip $(ARCH_SRC)/board $(ARCH_SRC)/chip drivers/platform
-	$(Q) $(MAKE) -C boards dirlinks
-	$(Q) $(MAKE) -C $(CONFIG_APPS_DIR) dirlinks
+# clean_dirlinks
+#
+# This is part of the distclean target. It removes all symbolic links created by the dirlink target.
+
+# The symlink subfolders need to be removed before the parent symlinks
+
+.PHONY: clean_dirlinks
+clean_dirlinks:
+	$(Q) $(call DELFILE, $(DIRLINKS_FILE))
+	$(Q) $(call DELFILE, .dirlinks)
+	$(Q) $(DIRUNLINK) drivers/platform
+ifneq ($(INCLUDE_ARCH_CHIP_SYMLINK_DIR),)
+	$(Q) $(DIRUNLINK) include/arch/chip
+endif
+	$(Q) $(DIRUNLINK) include/arch/board
+	$(Q) $(DIRUNLINK) include/arch
+ifneq ($(ARCH_SRC_BOARD_BOARD_SYMLINK),)
+	$(Q) $(DIRUNLINK) $(ARCH_SRC)/board/board
+endif
+ifneq ($(ARCH_SRC_BOARD_SYMLINK),)
+	$(Q) $(DIRUNLINK) $(ARCH_SRC)/board
+endif
+ifneq ($(ARCH_SRC_CHIP_SYMLINK_DIR),)
+	$(Q) $(DIRUNLINK) $(ARCH_SRC)/chip
+endif
 
 # context
 #
@@ -345,18 +419,43 @@ dirlinks: include/arch include/arch/board include/arch/chip $(ARCH_SRC)/board $(
 # the config.h and version.h header files in the include/nuttx directory and
 # the establishment of symbolic links to configured directories.
 
-context: include/nuttx/config.h include/nuttx/version.h include/math.h include/float.h include/stdarg.h include/setjmp.h dirlinks
-	$(Q) mkdir -p staging
-	$(Q) for dir in $(CONTEXTDIRS) ; do \
-		$(MAKE) -C $$dir context || exit; \
-	done
+# Generate a pattern to make Directories.mk context
+
+CONTEXTDIRS_DEPS = $(patsubst %,%/.context,$(CONTEXTDIRS))
+
+context: include/nuttx/config.h include/nuttx/version.h .dirlinks $(CONTEXTDIRS_DEPS) | staging
+
+staging:
+	$(Q) mkdir -p $@
+
+# Pattern rule for $(CONTEXTDIRS_DEPS)
+
+%.context: include/nuttx/config.h .dirlinks
+	$(Q) $(MAKE) -C $(patsubst %.context,%,$@) TOPDIR="$(TOPDIR)" context
+	$(Q) touch $@
+
+ifeq ($(NEED_MATH_H),y)
+context: include/math.h
+endif
+
+ifeq ($(CONFIG_ARCH_FLOAT_H),y)
+context: include/float.h
+endif
+
+ifeq ($(CONFIG_ARCH_STDARG_H),y)
+context: include/stdarg.h
+endif
+
+ifeq ($(CONFIG_ARCH_SETJMP_H),y)
+context: include/setjmp.h
+endif
 
 # clean_context
 #
 # This is part of the distclean target.  It removes all of the header files
 # and symbolic links created by the context target.
 
-clean_context:
+clean_context: clean_dirlinks
 	$(Q) for dir in $(CCLEANDIRS) ; do \
 		if [ -e $$dir/Makefile ]; then \
 			$(MAKE) -C $$dir clean_context ; \
@@ -369,17 +468,7 @@ clean_context:
 	$(call DELFILE, include/stdarg.h)
 	$(call DELFILE, include/setjmp.h)
 	$(call DELFILE, arch/dummy/Kconfig)
-	$(Q) $(DIRUNLINK) include/arch/board
-	$(Q) $(DIRUNLINK) include/arch/chip
-	$(Q) $(DIRUNLINK) include/arch
-	$(Q) $(DIRUNLINK) $(ARCH_SRC)/board/board
-	$(Q) $(DIRUNLINK) $(ARCH_SRC)/board
-	$(Q) $(DIRUNLINK) $(ARCH_SRC)/chip
-	$(Q) $(DIRUNLINK) $(TOPDIR)/drivers/platform
-
-.clean_context: .config
-	+$(Q) $(MAKE) clean_context
-	$(Q) touch $@
+	$(call DELFILE, $(CONTEXTDIRS_DEPS))
 
 # Archive targets.  The target build sequence will first create a series of
 # libraries, one per configured source file directory.  The final NuttX
@@ -458,15 +547,18 @@ ifeq ($(CONFIG_UBOOT_UIMAGE),y)
 endif
 	$(call POSTBUILD, $(TOPDIR))
 
-# download
+# flash (or download : DEPRECATED)
 #
-# This is a helper target that will rebuild NuttX and download it to the target
+# This is a helper target that will rebuild NuttX and flash it to the target
 # system in one step.  The operation of this target depends completely upon
-# implementation of the DOWNLOAD command in the user Make.defs file.  It will
-# generate an error if the DOWNLOAD command is not defined.
+# implementation of the FLASH command in the user Make.defs file.  It will
+# generate an error if the FLASH command is not defined.
+
+flash: $(BIN)
+	$(call FLASH, $<)
 
 download: $(BIN)
-	$(call DOWNLOAD, $<)
+	$(call FLASH, $<)
 
 # bootloader
 #
@@ -508,25 +600,39 @@ pass2dep: context tools/mkdeps$(HOSTEXEEXT) tools/cnvwindeps$(HOSTEXEEXT)
 # location: https://bitbucket.org/nuttx/tools/downloads/.  See README.txt
 # file in the NuttX tools GIT repository for additional information.
 
-config: apps_preconfig
+config:
+	$(Q) $(MAKE) clean_context
+	$(Q) $(MAKE) apps_preconfig
 	$(Q) APPSDIR=${CONFIG_APPS_DIR} EXTERNALDIR=$(EXTERNALDIR) kconfig-conf Kconfig
 
-oldconfig: apps_preconfig
+oldconfig:
+	$(Q) $(MAKE) clean_context
+	$(Q) $(MAKE) apps_preconfig
 	$(Q) APPSDIR=${CONFIG_APPS_DIR} EXTERNALDIR=$(EXTERNALDIR) kconfig-conf --oldconfig Kconfig
 
-olddefconfig: apps_preconfig
+olddefconfig:
+	$(Q) $(MAKE) clean_context
+	$(Q) $(MAKE) apps_preconfig
 	$(Q) APPSDIR=${CONFIG_APPS_DIR} EXTERNALDIR=$(EXTERNALDIR) kconfig-conf --olddefconfig Kconfig
 
-menuconfig: apps_preconfig
+menuconfig:
+	$(Q) $(MAKE) clean_context
+	$(Q) $(MAKE) apps_preconfig
 	$(Q) APPSDIR=${CONFIG_APPS_DIR} EXTERNALDIR=$(EXTERNALDIR) kconfig-mconf Kconfig
 
 nconfig: apps_preconfig
+	$(Q) $(MAKE) clean_context
+	$(Q) $(MAKE) apps_preconfig
 	$(Q) APPSDIR=${CONFIG_APPS_DIR} EXTERNALDIR=$(EXTERNALDIR) kconfig-nconf Kconfig
 
 qconfig: apps_preconfig
+	$(Q) $(MAKE) clean_context
+	$(Q) $(MAKE) apps_preconfig
 	$(Q) APPSDIR=${CONFIG_APPS_DIR} EXTERNALDIR=$(EXTERNALDIR) kconfig-qconf Kconfig
 
 gconfig: apps_preconfig
+	$(Q) $(MAKE) clean_context
+	$(Q) $(MAKE) apps_preconfig
 	$(Q) APPSDIR=${CONFIG_APPS_DIR} EXTERNALDIR=$(EXTERNALDIR) kconfig-gconf Kconfig
 
 savedefconfig: apps_preconfig
@@ -610,7 +716,6 @@ endif
 	$(call DELFILE, .config)
 	$(call DELFILE, .config.old)
 	$(call DELFILE, .gdbinit)
-	$(call DELFILE, .clean_context)
 	$(Q) $(MAKE) -C tools -f Makefile.host clean
 
 # Application housekeeping targets.  The APPDIR variable refers to the user
@@ -627,7 +732,7 @@ endif
 # apps_distclean: Perform the distclean operation only in the user application
 #                 directory.
 
-apps_preconfig: dirlinks
+apps_preconfig: .dirlinks
 ifneq ($(APPDIR),)
 	$(Q) $(MAKE) -C $(APPDIR) preconfig
 endif
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/tools/cfgdefine.c b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/tools/cfgdefine.c
index 78d43ff24..a0089e0bb 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/tools/cfgdefine.c
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/app_match_nuttx/nuttx/tools/cfgdefine.c
@@ -22,9 +22,9 @@
 * @file cfgdefine.c
 * @brief nuttx source code
 *                 https://github.com/apache/incubator-nuttx-apps
-* @version 10.2.0 
+* @version 10.3.0 
 * @author AIIT XUOS Lab
-* @date 2022-03-17
+* @date 2022-06-17
 */
 
 /****************************************************************************
@@ -63,12 +63,14 @@ static const char *dequote_list[] =
   "CONFIG_INIT_ARGS",                     /* Argument list of entry point */
   "CONFIG_INIT_SYMTAB",                   /* Global symbol table */
   "CONFIG_INIT_NEXPORTS",                 /* Global symbol table size */
+  "CONFIG_INIT_ENTRYPOINT",               /* Name of entry point function */
   "CONFIG_MODLIB_SYMTAB_ARRAY",           /* Symbol table array used by modlib functions */
   "CONFIG_MODLIB_NSYMBOLS_VAR",           /* Variable holding number of symbols in the table */
   "CONFIG_PASS1_BUILDIR",                 /* Pass1 build directory */
   "CONFIG_PASS1_TARGET",                  /* Pass1 build target */
   "CONFIG_PASS1_OBJECT",                  /* Pass1 build object */
-  "CONFIG_USER_ENTRYPOINT",               /* Name of entry point function */
+  "CONFIG_TTY_LAUNCH_ENTRYPOINT",         /* Name of entry point from tty launch */
+  "CONFIG_TTY_LAUNCH_ARGS",               /* Argument list of entry point from tty launch */
 
   /* NxWidgets/NxWM */
 
@@ -95,7 +97,7 @@ static const char *dequote_list[] =
 
 static char *skip_space(char *ptr)
 {
-  while (*ptr && isspace((int)*ptr)) ptr++;
+  while (*ptr && isspace(*ptr)) ptr++;
   return ptr;
 }
 
@@ -103,7 +105,7 @@ static char *skip_space(char *ptr)
 
 static char *find_name_end(char *ptr)
 {
-  while (*ptr && (isalnum((int)*ptr) || *ptr == '_')) ptr++;
+  while (*ptr && (isalnum(*ptr) || *ptr == '_')) ptr++;
   return ptr;
 }
 
@@ -111,16 +113,16 @@ static char *find_name_end(char *ptr)
 
 static char *find_value_end(char *ptr)
 {
-  while (*ptr && !isspace((int)*ptr))
+  while (*ptr && !isspace(*ptr))
     {
       if (*ptr == '"')
         {
-          do ptr++; while (*ptr && *ptr != '"');
+          do ptr++; while (*ptr && (*ptr != '"' || *(ptr - 1) == '\\'));
           if (*ptr) ptr++;
         }
       else
         {
-          do ptr++; while (*ptr && !isspace((int)*ptr) && *ptr != '"');
+          do ptr++; while (*ptr && !isspace(*ptr) && *ptr != '"');
         }
     }
 
@@ -157,13 +159,7 @@ static char *read_line(FILE *stream)
 
 static void parse_line(char *ptr, char **varname, char **varval)
 {
-  /* Skip over any leading spaces */
-
-  ptr = skip_space(ptr);
-
-  /* The first no-space is the beginning of the variable name */
-
-  *varname = skip_space(ptr);
+  *varname = ptr;
   *varval = NULL;
 
   /* Parse to the end of the variable name */
@@ -359,7 +355,7 @@ void generate_definitions(FILE *stream)
               else
                 {
                   printf("#define %s %s\n", varname, varval);
-                  printf("#define %s %s\n", &varname[7], varval);                  
+                  printf("#define %s %s\n", &varname[7], varval);
                 }
             }
         }
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/apps b/Ubiquitous/Nuttx_Fusion_XiUOS/apps
index 562239ecb..10c75df01 160000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/apps
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/apps
@@ -1 +1 @@
-Subproject commit 562239ecb2d84dd9de2dd206da41df19602e20cb
+Subproject commit 10c75df01cfb65d3d865313ebc03af6aec8505e5
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/nuttx b/Ubiquitous/Nuttx_Fusion_XiUOS/nuttx
index 3fede4209..3fb573795 160000
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/nuttx
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/nuttx
@@ -1 +1 @@
-Subproject commit 3fede42098e5883f336d846ac30edfe749899494
+Subproject commit 3fb5737958000d6e786a885af1a576e4d7bd5ada
diff --git a/Ubiquitous/Nuttx_Fusion_XiUOS/readme.md b/Ubiquitous/Nuttx_Fusion_XiUOS/readme.md
index 0ff4065c1..d53a2587c 100644
--- a/Ubiquitous/Nuttx_Fusion_XiUOS/readme.md
+++ b/Ubiquitous/Nuttx_Fusion_XiUOS/readme.md
@@ -16,7 +16,7 @@ git submodule update Ubiquitous/Nuttx_Fusion_XiUOS/apps
 git submodule update Ubiquitous/Nuttx_Fusion_XiUOS/nuttx
 ```
 
-鎵ц瀹屾垚鍚庡湪Ubiquitous/Nuttx鐩綍涓嬶紝apps鍜宯uttx鐨勪唬鐮侀兘琚笅杞戒笅鏉ワ紝褰撳墠鐨勭増鏈槸nuttx-10.2.0鐗堟湰銆�
+鎵ц瀹屾垚鍚庡湪Ubiquitous/Nuttx鐩綍涓嬶紝apps鍜宯uttx鐨勪唬鐮侀兘琚笅杞戒笅鏉ワ紝褰撳墠鐨勭増鏈槸nuttx-10.3.0鐗堟湰銆�
 
 ## 2銆佹劅 - 浼犳劅鍣ㄦ鏋舵敮鎸丯uttx
 
@@ -286,7 +286,7 @@ make  menuconfig
 
 ##### 寮�鍚疦uttx Support CLOCK_MONOTONIC
 
-杩涘叆RTOS Features > Clocks and Timers锛屽嬀閫変笂Support CLOCK_MONOTONIC
+濡傛灉鏄疦uttx10.3浠ヤ笅鐨勬搷浣滅郴缁燂紝闇�瑕佽繘鍏TOS Features > Clocks and Timers锛屽嬀閫変笂Support CLOCK_MONOTONIC
 
 ##### 浣跨敤I2C澶栬--浠s300x娓╁害浼犳劅鍣ㄤ负渚嬭鏄庨厤缃繃绋嬶細