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Merge branch 'prepare_for_master' of https://git.trustie.net/xuos/xiuos into develop

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This commit is contained in:
Wang_Weigen
2023-02-28 17:20:51 +08:00
parent 5ae31a37f3 779444f998
commit 179c894840
97 changed files with 5890 additions and 172 deletions
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Ubiquitous/XiZi_IIoT/arch/arm/cortex-m4/hc32f4a0/interrupt.c
+4
View File
@@ -20,6 +20,7 @@
#include <xs_base.h>
#include <xs_isr.h>
#include <hc32f4xx.h>
x_base __attribute__((naked)) DisableLocalInterrupt()
{
@@ -36,6 +37,9 @@ void __attribute__((naked)) EnableLocalInterrupt(x_base level)
int32 ArchEnableHwIrq(uint32 irq_num)
{
NVIC_ClearPendingIRQ(irq_num);
NVIC_SetPriority(irq_num, 0);
NVIC_EnableIRQ(irq_num);
return EOK;
}
Ubiquitous/XiZi_IIoT/arch/arm/cortex-m4/hc32f4a0/interrupt_vector.S
+46 -46
View File
@@ -61,52 +61,52 @@ InterruptVectors:
.long SysTick_Handler /* -1 SysTick Handler */
/* Interrupts */
.long IRQ000_Handler
.long IRQ001_Handler
.long IRQ002_Handler
.long IRQ003_Handler
.long IRQ004_Handler
.long IRQ005_Handler
.long IRQ006_Handler
.long IRQ007_Handler
.long IRQ008_Handler
.long IRQ009_Handler
.long IRQ010_Handler
.long IRQ011_Handler
.long IRQ012_Handler
.long IRQ013_Handler
.long IRQ014_Handler
.long IRQ015_Handler
.long IRQ016_Handler
.long IRQ017_Handler
.long IRQ018_Handler
.long IRQ019_Handler
.long IRQ020_Handler
.long IRQ021_Handler
.long IRQ022_Handler
.long IRQ023_Handler
.long IRQ024_Handler
.long IRQ025_Handler
.long IRQ026_Handler
.long IRQ027_Handler
.long IRQ028_Handler
.long IRQ029_Handler
.long IRQ030_Handler
.long IRQ031_Handler
.long IRQ032_Handler
.long IRQ033_Handler
.long IRQ034_Handler
.long IRQ035_Handler
.long IRQ036_Handler
.long IRQ037_Handler
.long IRQ038_Handler
.long IRQ039_Handler
.long IRQ040_Handler
.long IRQ041_Handler
.long IRQ042_Handler
.long IRQ043_Handler
.long IRQ044_Handler
.long IRQ045_Handler
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IsrEntry
.long IRQ046_Handler
.long IRQ047_Handler
.long IRQ048_Handler
Ubiquitous/XiZi_IIoT/board/edu-riscv64/board.c
+1 -1
View File
@@ -91,7 +91,7 @@ int MountUsb(void) {
}
#endif
#if defined(FS_VFS) && defined(MOUNT_SDCARD)
#if defined(MOUNT_SDCARD)
#include <iot-vfs.h>
#include <sd_spi.h>
extern SpiSdDeviceType SpiSdInit(struct Bus *bus, const char *dev_name,
Ubiquitous/XiZi_IIoT/board/edu-riscv64/third_party_driver/Kconfig
+2 -2
View File
@@ -17,11 +17,11 @@ menuconfig BSP_USING_SPI
endif
menuconfig BSP_USING_SOFT_SPI
bool "Using SOFT_SPI device"
bool "Using TFcard device"
default n
select BSP_USING_SPI
select MOUNT_SDCARD
select FS_VFS
select RESOURCES_SPI_SD
if BSP_USING_SOFT_SPI
source "$BSP_DIR/third_party_driver/soft_spi/Kconfig"
endif
Ubiquitous/XiZi_IIoT/board/edu-riscv64/third_party_driver/ethernet/connect_w5500.c
+49 -23
View File
@@ -6,6 +6,7 @@
#include <drv_io_config.h>
#include <fpioa.h>
#include <string.h>
#include <stdlib.h>
#include <xs_base.h>
#include "gpio_common.h"
@@ -305,34 +306,50 @@ uint32_t wiz_client_op(uint8_t sn, uint8_t *buf, uint32_t buf_size,
}
}
void wiz_client_op_test(char *addr, uint16_t port, char *msg) {
/* argv[1]: ip
* argv[2]: port
* argv[3]: msg
void wiz_client_op_test(int argc, char *argv[]) {
/* argv[1]: ip ip addr
* argv[2]: port port number
* argv[3]: msg send msg
* argv[4]: count test times,if no this parameter,default 10 times
*/
uint8_t client_sock = 2;
uint8_t ip[4] = {192, 168, 31, 127};
uint32_t tmp_ip[4];
KPrintf("wiz client to %s", addr);
sscanf(addr, "%d.%d.%d.%d", &tmp_ip[0], &tmp_ip[1], &tmp_ip[2], &tmp_ip[3]);
for (int i = 0; i < 4; ++i) {
ip[i] = (uint8_t)tmp_ip[i];
if (argc < 4)
{
KPrintf("wiz_client_op_test error\n");
return;
}
uint8_t client_sock = 2;
uint32_t tmp_ip[4];
uint8_t ip[4];
uint64_t pCount = 10;
uint8_t buf[g_wiznet_buf_size];
KPrintf("wiz_server, send to %d.%d.%d.%d %d\n", // tip info
uint16_t port;
sscanf(argv[1], "%d.%d.%d.%d", &tmp_ip[0], &tmp_ip[1], &tmp_ip[2], &tmp_ip[3]);
ip[0] = (uint8_t)tmp_ip[0];
ip[1] = (uint8_t)tmp_ip[1];
ip[2] = (uint8_t)tmp_ip[2];
ip[3] = (uint8_t)tmp_ip[3];
port = atoi(argv[2]);
KPrintf("wiz client to wiz_server, send to %d.%d.%d.%d %d\n", // tip info
ip[0], ip[1], ip[2], ip[3], port);
sscanf(msg, "%s", buf);
wiz_client_op(client_sock, buf, g_wiznet_buf_size, ip, port, SEND_DATA);
MdelayKTask(10);
memset(buf, 0, g_wiznet_buf_size);
// waiting for a responding.
wiz_client_op(client_sock, buf, g_wiznet_buf_size, ip, port, RECV_DATA);
KPrintf("received msg: %s\n", buf);
if (argc >= 5){
pCount = atoi(argv[4]);
}
for(uint64_t i = 0; i < pCount; i++)
{
wiz_client_op(client_sock, argv[3], strlen(argv[3]), ip, port, SEND_DATA);
MdelayKTask(10);
// waiting for a responding.
wiz_client_op(client_sock, buf, g_wiznet_buf_size, ip, port, RECV_DATA);
KPrintf("received msg: %s\n", buf);
memset(buf, 0, g_wiznet_buf_size);
}
}
SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0) | SHELL_CMD_TYPE(SHELL_TYPE_CMD_FUNC) |
SHELL_CMD_PARAM_NUM(3),
wiz_client_op, wiz_client_op_test,
SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0) | SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN),
wiz_client_op, wiz_client_op_test,
wiz_sock_recv or wiz_sock_send data as tcp client);
int32_t wiz_server_op(uint8_t sn, uint8_t *buf, uint32_t buf_size,
@@ -387,11 +404,20 @@ void wiz_server(void *param) {
uint8_t buf[g_wiznet_buf_size];
memset(buf, 0, g_wiznet_buf_size);
int ret = 0;
uint32_t size = 0;
while (1) {
ret = wiz_server_op(0, buf, g_wiznet_buf_size, port, RECV_DATA);
while(buf[size] != 0){
size ++;
}
if (ret > 0) {
KPrintf("received %d bytes: %s\n", size, buf);
wiz_server_op(0, buf, g_wiznet_buf_size, port, SEND_DATA);
};
memset(buf, 0, g_wiznet_buf_size);
}
size = 0;
}
}
Ubiquitous/XiZi_IIoT/board/edu-riscv64/third_party_driver/ethernet/wiz_ping.c
+7 -1
View File
@@ -3,6 +3,7 @@
#include <shell.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <xs_base.h>
#include <xs_ktask.h>
@@ -235,6 +236,8 @@ uint8_t ping_reply(uint8_t sn, uint8_t *addr, uint16_t rlen) {
void wiz_ping_test(int argc, char *argv[]) {
uint32_t tmp_ip[4];
uint8_t target_ip[4];
uint16_t pCount = 5; //默认ping 5次
if (argc >= 2) {
KPrintf("This is a Ping test: %s\n", argv[1]);
sscanf(argv[1], "%d.%d.%d.%d", &tmp_ip[0], &tmp_ip[1], &tmp_ip[2],
@@ -243,7 +246,10 @@ void wiz_ping_test(int argc, char *argv[]) {
target_ip[1] = (uint8_t)tmp_ip[1];
target_ip[2] = (uint8_t)tmp_ip[2];
target_ip[3] = (uint8_t)tmp_ip[3];
ping_count(ping_socket, 5, target_ip);
if (argc >= 3){
pCount = atoi(argv[2]); //如果ip后面跟具体的数字,代表ping的次数
}
ping_count(ping_socket, pCount, target_ip);
}
}
SHELL_EXPORT_CMD(SHELL_CMD_PERMISSION(0) | SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN),
Ubiquitous/XiZi_IIoT/board/hc32f4a0/board.c
+42
View File
@@ -38,6 +38,14 @@ Modification:
#include <connect_gpio.h>
#endif
#ifdef BSP_USING_ADC
#include <connect_adc.h>
#endif
#ifdef BSP_USING_DAC
#include <connect_dac.h>
#endif
#ifdef BSP_USING_SDIO
#include <connect_sdio.h>
#endif
@@ -54,6 +62,22 @@ Modification:
#include <connect_usb.h>
#endif
#ifdef BSP_USING_RTC
#include <connect_rtc.h>
#endif
#ifdef BSP_USING_WDT
#include <connect_wdt.h>
#endif
#ifdef BSP_USING_TIMER
#include <connect_hwtimer.h>
#endif
#ifdef BSP_USING_CAN
#include <connect_can.h>
#endif
extern void entry(void);
extern int HwUsartInit();
@@ -165,8 +189,26 @@ struct InitSequenceDesc _board_init[] =
#ifdef BSP_USING_I2C
{ "i2c", HwI2cInit },
#endif
#ifdef BSP_USING_ADC
{"hw adc init", HwAdcInit},
#endif
#ifdef BSP_USING_DAC
{"hw dac init", HwDacInit},
#endif
#ifdef BSP_USING_USB
{ "usb", HwUsbHostInit },
#endif
#ifdef BSP_USING_RTC
{ "rtc", HwRtcInit },
#endif
#ifdef BSP_USING_WDT
{ "wdt", HwWdtInit },
#endif
#ifdef BSP_USING_TIMER
{ "tmr", HwTimerInit },
#endif
#ifdef BSP_USING_CAN
{ "can", HwCanInit },
#endif
{ " NONE ", NONE },
};
Ubiquitous/XiZi_IIoT/board/hc32f4a0/link.lds
+7
View File
@@ -87,6 +87,13 @@ SECTIONS
_shell_command_end = .;
. = ALIGN(4);
PROVIDE(__ctors_start__ = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
PROVIDE(__ctors_end__ = .);
. = ALIGN(4);
__isrtbl_idx_start = .;
KEEP(*(.isrtbl.idx))
__isrtbl_start = .;
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/Kconfig
+49
View File
@@ -6,6 +6,23 @@ menuconfig BSP_USING_UART
source "$BSP_DIR/third_party_driver/usart/Kconfig"
endif
menuconfig BSP_USING_ADC
bool "Using ADC device"
default n
select RESOURCES_ADC
if BSP_USING_ADC
source "$BSP_DIR/third_party_driver/adc/Kconfig"
endif
menuconfig BSP_USING_DAC
bool "Using DAC device"
default n
select RESOURCES_DAC
if BSP_USING_DAC
source "$BSP_DIR/third_party_driver/dac/Kconfig"
endif
menuconfig BSP_USING_GPIO
bool "Using GPIO device "
default y
@@ -53,3 +70,35 @@ menuconfig BSP_USING_USB
if BSP_USING_USB
source "$BSP_DIR/third_party_driver/usb/Kconfig"
endif
menuconfig BSP_USING_RTC
bool "Using RTC device"
default n
select RESOURCES_RTC
if BSP_USING_RTC
source "$BSP_DIR/third_party_driver/rtc/Kconfig"
endif
menuconfig BSP_USING_WDT
bool "Using WDT device"
default n
select RESOURCES_WDT
if BSP_USING_WDT
source "$BSP_DIR/third_party_driver/watchdog/Kconfig"
endif
menuconfig BSP_USING_TIMER
bool "Using TIMER device"
default n
select RESOURCES_TIMER
if BSP_USING_TIMER
source "$BSP_DIR/third_party_driver/timer/Kconfig"
endif
menuconfig BSP_USING_CAN
bool "Using CAN device"
default n
select RESOURCES_CAN
if BSP_USING_CAN
source "$BSP_DIR/third_party_driver/can/Kconfig"
endif
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/Makefile
+24
View File
@@ -4,6 +4,14 @@ ifeq ($(CONFIG_BSP_USING_UART),y)
SRC_DIR += usart
endif
ifeq ($(CONFIG_BSP_USING_ADC),y)
SRC_DIR += adc
endif
ifeq ($(CONFIG_BSP_USING_DAC),y)
SRC_DIR += dac
endif
ifeq ($(CONFIG_BSP_USING_GPIO),y)
SRC_DIR += gpio
endif
@@ -28,4 +36,20 @@ ifeq ($(CONFIG_BSP_USING_USB),y)
SRC_DIR += usb
endif
ifeq ($(CONFIG_BSP_USING_RTC),y)
SRC_DIR += rtc
endif
ifeq ($(CONFIG_BSP_USING_WDT),y)
SRC_DIR += watchdog
endif
ifeq ($(CONFIG_BSP_USING_TIMER),y)
SRC_DIR += timer
endif
ifeq ($(CONFIG_BSP_USING_CAN),y)
SRC_DIR += can
endif
include $(KERNEL_ROOT)/compiler.mk
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/adc/Kconfig
+74
View File
@@ -0,0 +1,74 @@
menuconfig BSP_USING_ADC1
bool "Enable ADC1"
default y
if BSP_USING_ADC1
config ADC1_BUS_NAME
string "adc 1 bus name"
default "adc1"
config ADC1_DRIVER_NAME
string "adc 1 driver name"
default "adc1_drv"
config ADC1_DEVICE_NAME
string "adc 1 bus device name"
default "adc1_dev"
config ADC1_GPIO_NUM
int "adc 1 gpio pin num"
default "0"
config ADC1_GPIO_DEF
string "adc 1 gpio define type"
default "A"
endif
menuconfig BSP_USING_ADC2
bool "Enable ADC2"
default y
if BSP_USING_ADC2
config ADC2_BUS_NAME
string "adc 2 bus name"
default "adc2"
config ADC2_DRIVER_NAME
string "adc 2 driver name"
default "adc2_drv"
config ADC2_DEVICE_NAME
string "adc 2 bus device name"
default "adc2_dev"
config ADC2_GPIO_NUM
int "adc 2 gpio pin num"
default "6"
config ADC2_GPIO_DEF
string "adc 2 gpio define type"
default "A"
endif
menuconfig BSP_USING_ADC3
bool "Enable ADC3"
default y
if BSP_USING_ADC3
config ADC3_BUS_NAME
string "adc 3 bus name"
default "adc3"
config ADC3_DRIVER_NAME
string "adc 3 driver name"
default "adc3_drv"
config ADC3_DEVICE_NAME
string "adc 3 bus device name"
default "adc3_dev"
config ADC3_GPIO_NUM
int "adc 3 gpio pin num"
default "0"
config ADC3_GPIO_DEF
string "adc 3 gpio define type"
default "A"
endif
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/adc/Makefile
+3
View File
@@ -0,0 +1,3 @@
SRC_FILES := connect_adc.c
include $(KERNEL_ROOT)/compiler.mk
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/adc/connect_adc.c
+289
View File
@@ -0,0 +1,289 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file connect_adc.c
* @brief support to register ADC pointer and function
* @version 1.1
* @author AIIT XUOS Lab
* @date 2023-02-09
*/
#include <connect_adc.h>
#define _ADC_CONS(string1, string2) string1##string2
#define ADC_CONS(string1, string2) _ADC_CONS(string1, string2)
#ifdef BSP_USING_ADC1
#define ADC1_GPIO ADC_CONS(GPIO_Pin_, ADC1_GPIO_NUM)
#endif
#ifdef BSP_USING_ADC2
#define ADC2_GPIO ADC_CONS(GPIO_Pin_, ADC2_GPIO_NUM)
#endif
#ifdef BSP_USING_ADC3
#define ADC3_GPIO ADC_CONS(GPIO_Pin_, ADC3_GPIO_NUM)
#endif
static int AdcUdelay(uint32 us)
{
uint32 ticks;
uint32 told, tnow, tcnt = 0;
uint32 reload = SysTick->LOAD;
ticks = us * reload / (1000000 / TICK_PER_SECOND);
told = SysTick->VAL;
while (1) {
tnow = SysTick->VAL;
if (tnow != told) {
if (tnow < told) {
tcnt += told - tnow;
} else {
tcnt += reload - tnow + told;
}
told = tnow;
if (tcnt >= ticks) {
return 0;
break;
}
}
}
}
static uint16 GetAdcAverageValue(CM_ADC_TypeDef *ADCx, uint8 channel, uint8 times)
{
uint32 temp_val = 0;
int i;
for(i = 0;i < times;i ++) {
temp_val += ADC_GetValue(ADCx, channel) & 0x0FFF;
KPrintf("GetAdcAverageValue val %u\n", ADC_GetValue(ADCx, channel));
AdcUdelay(5000);
}
return temp_val / times;
}
static uint32 AdcOpen(void *dev)
{
x_err_t ret = EOK;
stc_adc_init_t stcAdcInit;
ADC_StructInit(&stcAdcInit);
struct AdcHardwareDevice* adc_dev = (struct AdcHardwareDevice*)dev;
CM_ADC_TypeDef *ADCx= (CM_ADC_TypeDef *)adc_dev->private_data;
ADC_Init((ADCx),&stcAdcInit);
return ret;
}
static uint32 AdcClose(void *dev)
{
// CM_ADC_TypeDef *adc_dev = (CM_ADC_TypeDef*)dev;
struct AdcHardwareDevice* adc_dev = (struct AdcHardwareDevice*)dev;
CM_ADC_TypeDef *ADCx= (CM_ADC_TypeDef *)adc_dev->private_data;
ADC_DeInit(ADCx);
return EOK;
}
static uint32 AdcRead(void *dev, struct BusBlockReadParam *read_param)
{
struct AdcHardwareDevice *adc_dev = (struct AdcHardwareDevice *)dev;
struct HwAdc *adc_cfg = (struct HwAdc *)adc_dev->haldev.private_data;
uint16 adc_average_value = 0;
uint8 times = 20;
adc_average_value = GetAdcAverageValue(adc_cfg->ADCx, adc_cfg->adc_channel, times);
*(uint16 *)read_param->buffer = adc_average_value;
read_param->read_length = 2;
return read_param->read_length;
}
static uint32 AdcDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
{
NULL_PARAM_CHECK(drv);
NULL_PARAM_CHECK(configure_info);
x_err_t ret = EOK;
uint8 adc_channel;
struct AdcDriver *adc_drv = (struct AdcDriver *)drv;
struct AdcHardwareDevice *adc_dev = (struct AdcHardwareDevice *)adc_drv->driver.owner_bus->owner_haldev;
struct HwAdc *adc_cfg = (struct HwAdc *)adc_dev->haldev.private_data;
switch (configure_info->configure_cmd)
{
case OPE_CFG:
adc_cfg->adc_channel = *(uint8 *)configure_info->private_data;
if (adc_cfg->adc_channel > 18) {
KPrintf("AdcDrvConfigure set adc channel(0-18) %u error!", adc_cfg->adc_channel);
adc_cfg->adc_channel = 0;
ret = ERROR;
}
break;
default:
break;
}
return ret;
}
static const struct AdcDevDone dev_done =
{
AdcOpen,
AdcClose,
NONE,
AdcRead,
};
int HwAdcInit(void)
{
x_err_t ret = EOK;
#ifdef BSP_USING_ADC1
static struct AdcBus adc1_bus;
static struct AdcDriver adc1_drv;
static struct AdcHardwareDevice adc1_dev;
static struct HwAdc adc1_cfg;
adc1_drv.configure = AdcDrvConfigure;
ret = AdcBusInit(&adc1_bus, ADC1_BUS_NAME);
if (ret != EOK) {
KPrintf("ADC1 bus init error %d\n", ret);
return ERROR;
}
ret = AdcDriverInit(&adc1_drv, ADC1_DRIVER_NAME);
if (ret != EOK) {
KPrintf("ADC1 driver init error %d\n", ret);
return ERROR;
}
ret = AdcDriverAttachToBus(ADC1_DRIVER_NAME, ADC1_BUS_NAME);
if (ret != EOK) {
KPrintf("ADC1 driver attach error %d\n", ret);
return ERROR;
}
adc1_dev.adc_dev_done = &dev_done;
adc1_cfg.ADCx = CM_ADC1;
adc1_cfg.adc_channel = 0;
ret = AdcDeviceRegister(&adc1_dev, (void *)&adc1_cfg, ADC1_DEVICE_NAME);
if (ret != EOK) {
KPrintf("ADC1 device register error %d\n", ret);
return ERROR;
}
ret = AdcDeviceAttachToBus(ADC1_DEVICE_NAME, ADC1_BUS_NAME);
if (ret != EOK) {
KPrintf("ADC1 device register error %d\n", ret);
return ERROR;
}
#endif
#ifdef BSP_USING_ADC2
static struct AdcBus adc2_bus;
static struct AdcDriver adc2_drv;
static struct AdcHardwareDevice adc2_dev;
static struct HwAdc adc2_cfg;
adc2_drv.configure = AdcDrvConfigure;
ret = AdcBusInit(&adc2_bus, ADC2_BUS_NAME);
if (ret != EOK) {
KPrintf("ADC2 bus init error %d\n", ret);
return ERROR;
}
ret = AdcDriverInit(&adc2_drv, ADC2_DRIVER_NAME);
if (ret != EOK) {
KPrintf("ADC2 driver init error %d\n", ret);
return ERROR;
}
ret = AdcDriverAttachToBus(ADC2_DRIVER_NAME, ADC2_BUS_NAME);
if (ret != EOK) {
KPrintf("ADC2 driver attach error %d\n", ret);
return ERROR;
}
adc2_dev.adc_dev_done = &dev_done;
adc2_cfg.ADCx = CM_ADC2;
adc2_cfg.adc_channel = 0;
ret = AdcDeviceRegister(&adc2_dev, (void *)&adc2_cfg, ADC2_DEVICE_NAME);
if (ret != EOK) {
KPrintf("ADC2 device register error %d\n", ret);
return ERROR;
}
ret = AdcDeviceAttachToBus(ADC2_DEVICE_NAME, ADC2_BUS_NAME);
if (ret != EOK) {
KPrintf("ADC2 device register error %d\n", ret);
return ERROR;
}
#endif
#ifdef BSP_USING_ADC3
static struct AdcBus adc3_bus;
static struct AdcDriver adc3_drv;
static struct AdcHardwareDevice adc3_dev;
static struct HwAdc adc3_cfg;
adc3_drv.configure = AdcDrvConfigure;
ret = AdcBusInit(&adc3_bus, ADC3_BUS_NAME);
if (ret != EOK) {
KPrintf("ADC3 bus init error %d\n", ret);
return ERROR;
}
ret = AdcDriverInit(&adc3_drv, ADC3_DRIVER_NAME);
if (ret != EOK) {
KPrintf("ADC3 driver init error %d\n", ret);
return ERROR;
}
ret = AdcDriverAttachToBus(ADC3_DRIVER_NAME, ADC3_BUS_NAME);
if (ret != EOK) {
KPrintf("ADC3 driver attach error %d\n", ret);
return ERROR;
}
adc3_dev.adc_dev_done = &dev_done;
adc3_cfg.ADCx = CM_ADC3;
adc3_cfg.adc_channel = 0;
ret = AdcDeviceRegister(&adc3_dev, (void *)&adc3_cfg, ADC3_DEVICE_NAME);
if (ret != EOK) {
KPrintf("ADC3 device register error %d\n", ret);
return ERROR;
}
ret = AdcDeviceAttachToBus(ADC3_DEVICE_NAME, ADC3_BUS_NAME);
if (ret != EOK) {
KPrintf("ADC3 device register error %d\n", ret);
return ERROR;
}
#endif
return ret;
}
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/can/Kconfig
+15
View File
@@ -0,0 +1,15 @@
config CAN_BUS_NAME_2
string "can bus name"
default "can2"
config CAN_DRIVER_NAME_2
string "can driver name"
default "can2_drv"
config CAN_2_DEVICE_NAME_1
string "can bus 1 device 1 name"
default "can2_dev1"
config CAN_USING_INTERRUPT
bool "can interrupt open"
default n
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/can/Makefile
+4
View File
@@ -0,0 +1,4 @@
SRC_FILES := connect_can.c
include $(KERNEL_ROOT)/compiler.mk
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/can/connect_can.c
+297
View File
@@ -0,0 +1,297 @@
/*
* Copyright (c) Guangzhou Xingyi Electronic Technology Co., Ltd
*
* Change Logs:
* Date Author Notes
* 2014-7-4 alientek first version
*/
/**
* @file connect_can.c
* @brief support hc32f4a0 can function and register to bus framework
* @version 1.0
* @author AIIT XUOS Lab
* @date 2023-02-20
*/
/*************************************************
File name: connect_can.c
Description: support can configure and spi bus register function for hc32f4a0
Others: connect_can.c for references
*************************************************/
#include "connect_can.h"
#define CAN_X (CM_CAN2)
#define CAN_TX_PORT (GPIO_PORT_D)
#define CAN_TX_PIN (GPIO_PIN_07)
#define CAN_RX_PORT (GPIO_PORT_D)
#define CAN_RX_PIN (GPIO_PIN_06)
#define CAN_TX_PIN_FUNC (GPIO_FUNC_62)
#define CAN_RX_PIN_FUNC (GPIO_FUNC_63)
#define INTSEL_REG ((uint32_t)(&CM_INTC->SEL0))
#define CANX_IRQ_SRC INT_SRC_CAN2_HOST
#define CANX_IRQ_NUM 17
#define IRQ_NUM_OFFSET 16
#define CAN_AF1_ID (0x123UL)
#define CAN_AF1_ID_MSK (0xFFFUL)
#define CAN_AF1_MSK_TYPE CAN_ID_STD
#define CAN_AF2_ID (0x005UL)
#define CAN_AF2_ID_MSK (0x00FUL)
#define CAN_AF2_MSK_TYPE CAN_ID_STD
#define CAN_AF3_ID (0x23UL)
#define CAN_AF3_ID_MSK (0xFFUL)
#define CAN_AF3_MSK_TYPE CAN_ID_STD
#ifdef CAN_USING_INTERRUPT
void CanIrqHandler(int vector, void *param)
{
stc_can_error_info_t err_info;
uint32_t status = CAN_GetStatusValue(CAN_X);
uint32_t error = CAN_GetErrorInfo(CAN_X,&err_info);
KPrintf("Irq entered\n");
CAN_ClearStatus(CAN_X, status);
}
static void CanIrqConfig(void)
{
// register IRQ src in IRQn
__IO uint32_t *INTC_SELx = (__IO uint32_t *)(INTSEL_REG+ 4U * (uint32_t)(CANX_IRQ_NUM));
WRITE_REG32(*INTC_SELx, CANX_IRQ_SRC);
isrManager.done->registerIrq(CANX_IRQ_NUM+IRQ_NUM_OFFSET,CanIrqHandler,NULL);
isrManager.done->enableIrq(CANX_IRQ_NUM);
}
#endif
static void CanInit(struct CanDriverConfigure *can_drv_config)
{
stc_can_init_t stcInit;
stc_can_filter_config_t astcAFCfg[] = { \
{CAN_AF1_ID, CAN_AF1_ID_MSK, CAN_AF1_MSK_TYPE}, \
{CAN_AF2_ID, CAN_AF2_ID_MSK, CAN_AF2_MSK_TYPE}, \
{CAN_AF3_ID, CAN_AF3_ID_MSK, CAN_AF3_MSK_TYPE}, \
};
CLK_SetCANClockSrc(CLK_CAN2,CLK_CANCLK_SYSCLK_DIV4);
/* Set the function of CAN pins. */
GPIO_SetFunc(CAN_TX_PORT, CAN_TX_PIN, CAN_TX_PIN_FUNC);
GPIO_SetFunc(CAN_RX_PORT, CAN_RX_PIN, CAN_RX_PIN_FUNC);
/* Initializes CAN. */
(void)CAN_StructInit(&stcInit);
stcInit.pstcFilter = astcAFCfg;
stcInit.u16FilterSelect = (CAN_FILTER1 | CAN_FILTER2 | CAN_FILTER3);
// Driver's config
stcInit.stcBitCfg.u32SJW = can_drv_config->tsjw;
stcInit.stcBitCfg.u32Prescaler = can_drv_config->brp;
stcInit.stcBitCfg.u32TimeSeg1 = can_drv_config->tbs1;
stcInit.stcBitCfg.u32TimeSeg2 = can_drv_config->tbs2;
stcInit.u8WorkMode = can_drv_config->mode;
#ifdef CAN_USING_FD
stcInit.stcFDCfg.u8TDCSSP = 16U;
stcInit.stcFDCfg.u8CANFDMode = CAN_FD_MODE_ISO_11898;
stcInit.stcFDCfg.stcFBT.u32SEG1 = 16U;
stcInit.stcFDCfg.stcFBT.u32SEG2 = 4U;
stcInit.stcFDCfg.stcFBT.u32SJW = 4U;
stcInit.stcFDCfg.stcFBT.u32Prescaler = 1U;
(void)CAN_FD_Init(APP_CAN_UNIT, &stcInit);
#else
FCG_Fcg1PeriphClockCmd(PWC_FCG1_CAN2, ENABLE);
(void)CAN_Init(CAN_X, &stcInit);
#endif
CAN_ClearStatus(CAN_X, 0xFFFFFFFFU);
#ifdef CAN_USING_INTERRUPT
/* Configures the interrupts if needed. */
CAN_IntCmd(CAN_X, CAN_INT_RX, ENABLE);
CanIrqConfig();
#endif
}
static uint32 CanConfig(void *can_drv_config)
{
x_err_t ret = EOK;
return ret;
}
static uint32 CanDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
{
x_err_t ret = EOK;
NULL_PARAM_CHECK(drv);
NULL_PARAM_CHECK(configure_info);
struct CanDriverConfigure *can_drv_config;
switch (configure_info->configure_cmd)
{
case OPE_INT: // can basic init
can_drv_config = (struct CanDriverConfigure *)configure_info->private_data;
CanInit(can_drv_config);
break;
case OPE_CFG:
CanConfig(configure_info->private_data);
break;
default:
break;
}
return ret;
}
static uint32 CanWriteData(void * dev , struct BusBlockWriteParam *write_param)
{
x_err_t ret=EOK;
NULL_PARAM_CHECK(dev);
NULL_PARAM_CHECK(write_param);
struct CanSendConfigure *p_can_config = (struct CanSendConfigure*)write_param->buffer;
stc_can_tx_frame_t can_frame_obj;
memset(&can_frame_obj,0,sizeof(stc_can_tx_frame_t));
// configure CAN's flag bit
can_frame_obj.IDE = p_can_config->ide;
if(1==p_can_config->ide){
can_frame_obj.u32ID = p_can_config->exdid;
}else{
can_frame_obj.u32ID = p_can_config->stdid;
}
can_frame_obj.RTR = p_can_config->rtr;
memcpy(can_frame_obj.au8Data,p_can_config->data,p_can_config->data_lenth);
can_frame_obj.DLC = p_can_config->data_lenth;
//put frame_buffer in message queue
if(can_frame_obj.DLC){
ret = CAN_FillTxFrame(CAN_X,CAN_TX_BUF_STB,&can_frame_obj);
if(EOK != ret){
KPrintf("CAN fill tx frame failed(CODE:%d)!\n",ret);
return ERROR;
}
CAN_StartTx(CAN_X,CAN_TX_REQ_STB_ONE);
}
return ret;
}
static uint32 CanReadData(void *dev , struct BusBlockReadParam *databuf)
{
NULL_PARAM_CHECK(dev);
NULL_PARAM_CHECK(databuf);
x_err_t ret=EOK;
stc_can_rx_frame_t frame_received;
struct CanSendConfigure *p_can_config = (struct CanSendConfigure*)databuf->buffer;
memset(&frame_received,0,sizeof(stc_can_rx_frame_t));
ret = CAN_GetRxFrame(CAN_X, &frame_received);
if(EOK != ret){
// KPrintf("CAN recv frame failed(CODE:%d)!\n",ret);
p_can_config->data_lenth = 0;
return ERROR;
}
//put message in frame_buffer
p_can_config->ide = frame_received.IDE;
p_can_config->rtr = frame_received.RTR;
if(p_can_config->ide==1){
p_can_config->exdid = frame_received.u32ID ;
}else{
p_can_config->stdid = frame_received.u32ID;
p_can_config->exdid = frame_received.u32ID ;
}
p_can_config->data_lenth = frame_received.DLC;
for(int i=0;i<p_can_config->data_lenth;i++){
p_can_config->data[i] = frame_received.au8Data[i];
}
return frame_received.DLC;
}
static struct CanDevDone can_dev_done =
{
.open = NONE,
.close = NONE,
.write = CanWriteData,
.read = CanReadData
};
static int BoardCanBusInit(struct CanBus *can_bus, struct CanDriver *can_driver)
{
x_err_t ret = EOK;
/*Init the can bus */
ret = CanBusInit(can_bus, CAN_BUS_NAME_2);
if (EOK != ret) {
KPrintf("Board_can_init canBusInit error %d\n", ret);
return ERROR;
}
/*Init the can driver*/
ret = CanDriverInit(can_driver, CAN_DRIVER_NAME_2);
if (EOK != ret) {
KPrintf("Board_can_init canDriverInit error %d\n", ret);
return ERROR;
}
/*Attach the can driver to the can bus*/
ret = CanDriverAttachToBus(CAN_DRIVER_NAME_2, CAN_BUS_NAME_2);
if (EOK != ret) {
KPrintf("Board_can_init CanDriverAttachToBus error %d\n", ret);
return ERROR;
}
return ret;
}
/* Attach the can device to the can bus*/
static int BoardCanDevBend(void)
{
x_err_t ret = EOK;
static struct CanHardwareDevice can_device0;
memset(&can_device0, 0, sizeof(struct CanHardwareDevice));
can_device0.dev_done = &can_dev_done;
ret = CanDeviceRegister(&can_device0, NONE, CAN_2_DEVICE_NAME_1);
if (EOK != ret) {
KPrintf("board_can_init CanDeviceInit device %s error %d\n", CAN_2_DEVICE_NAME_1, ret);
return ERROR;
}
ret = CanDeviceAttachToBus(CAN_2_DEVICE_NAME_1, CAN_BUS_NAME_2);
if (EOK != ret) {
KPrintf("board_can_init CanDeviceAttachToBus device %s error %d\n", CAN_2_DEVICE_NAME_1, ret);
return ERROR;
}
return ret;
}
int HwCanInit(void)
{
x_err_t ret = EOK;
static struct CanBus can_bus;
memset(&can_bus, 0, sizeof(struct CanBus));
static struct CanDriver can_driver;
memset(&can_driver, 0, sizeof(struct CanDriver));
can_driver.configure = &(CanDrvConfigure);
ret = BoardCanBusInit(&can_bus, &can_driver);
if (EOK != ret) {
KPrintf(" can_bus_init %s error ret %u\n", CAN_BUS_NAME_2, ret);
return ERROR;
}
ret = BoardCanDevBend();
if (EOK != ret) {
KPrintf("board_can_init error ret %u\n", ret);
return ERROR;
}
return EOK;
}
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/common/hc32_ll_driver/src/Makefile
+24
View File
@@ -4,6 +4,14 @@ ifeq ($(CONFIG_BSP_USING_UART),y)
SRC_FILES += hc32_ll_usart.c
endif
ifeq ($(CONFIG_BSP_USING_ADC),y)
SRC_FILES += hc32_ll_adc.c
endif
ifeq ($(CONFIG_BSP_USING_DAC),y)
SRC_FILES += hc32_ll_dac.c
endif
ifeq ($(CONFIG_BSP_USING_SDIO),y)
SRC_FILES += hc32_ll_sdioc.c
endif
@@ -12,6 +20,10 @@ ifeq ($(CONFIG_BSP_USING_SPI),y)
SRC_FILES += hc32_ll_spi.c
endif
ifeq ($(CONFIG_BSP_USING_QSPI_FLASH),y)
SRC_FILES += hc32_ll_qspi.c
endif
ifeq ($(CONFIG_BSP_USING_I2C),y)
SRC_FILES += hc32_ll_i2c.c
endif
@@ -24,4 +36,16 @@ ifeq ($(CONFIG_BSP_USING_USB),y)
SRC_FILES += hc32_ll_usb.c
endif
ifeq ($(CONFIG_BSP_USING_RTC),y)
SRC_FILES += hc32_ll_rtc.c
endif
ifeq ($(CONFIG_BSP_USING_WDT),y)
SRC_FILES += hc32_ll_wdt.c
endif
ifeq ($(CONFIG_BSP_USING_CAN),y)
SRC_FILES += hc32_ll_can.c
endif
include $(KERNEL_ROOT)/compiler.mk
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/dac/Kconfig
+17
View File
@@ -0,0 +1,17 @@
if BSP_USING_DAC
config DAC_BUS_NAME
string "dac bus name"
default "dac"
config DAC_DRIVER_NAME
string "dac driver name"
default "dac_drv"
config DAC_DEVICE_NAME
string "dac bus device name"
default "dac_dev"
config DAC_GPIO_NUM
int "dac gpio pin num(only support 4 or 5)"
default "4"
endif
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/dac/Makefile
+3
View File
@@ -0,0 +1,3 @@
SRC_FILES := connect_dac.c
include $(KERNEL_ROOT)/compiler.mk
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/dac/connect_dac.c
+155
View File
@@ -0,0 +1,155 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file connect_dac.c
* @brief support to register DAC pointer and function
* @version 2.0
* @author AIIT XUOS Lab
* @date 2023-02-09
*/
#include <connect_dac.h>
#define _DAC_CONS(string1, string2) string1##string2
#define DAC_CONS(string1, string2) _DAC_CONS(string1, string2)
#ifdef BSP_USING_DAC
#define DAC_GPIO DAC_CONS(GPIO_Pin_, DAC_GPIO_NUM)
#endif
static uint32 DacOpen(void *dev)
{
struct DacHardwareDevice *dac_dev = (struct DacHardwareDevice *)dev;
CM_DAC_TypeDef *DACx = (CM_DAC_TypeDef *)dac_dev->private_data;
stc_dac_init_t pstcDacInit;
DAC_StructInit(&pstcDacInit);
DAC_Init(DACx,DAC_CH1,&pstcDacInit);
return EOK;
}
static uint32 DacClose(void *dev)
{
struct DacHardwareDevice *dac_dev = (struct DacHardwareDevice *)dev;
CM_DAC_TypeDef *DACx = (CM_DAC_TypeDef *)dac_dev->private_data;
DAC_DeInit(DACx);
return EOK;
}
static uint32 DacRead(void *dev, struct BusBlockReadParam *read_param)
{
struct DacHardwareDevice *dac_dev = (struct DacHardwareDevice *)dev;
CM_DAC_TypeDef *DACx = (CM_DAC_TypeDef *)dac_dev->private_data;
uint16 dac_set_value = 0;
dac_set_value = DAC_GetChConvertState(DACx,DAC_CH1);
*(uint16 *)read_param->buffer = dac_set_value;
read_param->read_length = 2;
return read_param->read_length;
return EOK;
}
static uint32 DacDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
{
NULL_PARAM_CHECK(drv);
NULL_PARAM_CHECK(configure_info);
x_err_t ret = EOK;
struct DacDriver *dac_drv = (struct DacDriver *)drv;
struct DacHardwareDevice *dac_dev = (struct DacHardwareDevice *)dac_drv->driver.owner_bus->owner_haldev;
struct HwDac *dac_cfg = (struct HwDac *)dac_dev->haldev.private_data;
switch (configure_info->configure_cmd)
{
case OPE_CFG:
dac_cfg->digital_data = *(uint16 *)configure_info->private_data;
// DAC_SetChannel1Data(DAC_Align_12b_R, dac_cfg->digital_data);//12 bits、R-Align data format, digital data
DAC_SetChData(dac_cfg->DACx,DAC_CH1,dac_cfg->digital_data);
break;
default:
break;
}
return ret;
}
static const struct DacDevDone dev_done =
{
DacOpen,
DacClose,
NONE,
DacRead,
};
int HwDacInit(void)
{
x_err_t ret = EOK;
#ifdef BSP_USING_DAC
static struct DacBus dac_bus;
static struct DacDriver dac_drv;
static struct DacHardwareDevice dac_dev;
static struct HwDac dac_cfg;
dac_drv.configure = DacDrvConfigure;
ret = DacBusInit(&dac_bus, DAC_BUS_NAME);
if (ret != EOK) {
KPrintf("DAC bus init error %d\n", ret);
return ERROR;
}
ret = DacDriverInit(&dac_drv, DAC_DRIVER_NAME);
if (ret != EOK) {
KPrintf("DAC driver init error %d\n", ret);
return ERROR;
}
ret = DacDriverAttachToBus(DAC_DRIVER_NAME, DAC_BUS_NAME);
if (ret != EOK) {
KPrintf("DAC driver attach error %d\n", ret);
return ERROR;
}
dac_dev.dac_dev_done = &dev_done;
dac_cfg.DACx = CM_DAC1;
dac_cfg.digital_data = 0;
ret = DacDeviceRegister(&dac_dev, (void *)&dac_cfg, DAC_DEVICE_NAME);
if (ret != EOK) {
KPrintf("DAC device register error %d\n", ret);
return ERROR;
}
ret = DacDeviceAttachToBus(DAC_DEVICE_NAME, DAC_BUS_NAME);
if (ret != EOK) {
KPrintf("DAC device register error %d\n", ret);
return ERROR;
}
#endif
return ret;
}
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/gpio/connect_gpio.c
+54 -34
View File
@@ -33,9 +33,8 @@ Modification:
#include <connect_gpio.h>
#define GPIO_PIN_INDEX(pin) ((uint8_t)((pin) & 0x0F))
#define ITEM_NUM(items) sizeof(items) / sizeof(items[0])
#define IRQ_INT(callback)
#ifndef HC32_PIN_CONFIG
#define HC32_PIN_CONFIG(pin, callback, config) \
@@ -48,6 +47,9 @@ Modification:
#define __HC32_PIN(index, gpio_port, gpio_pin) { 0, GPIO_PORT_##gpio_port, GPIO_PIN_##gpio_pin}
#define __HC32_PIN_DEFAULT {-1, 0, 0}
#define MAX_PIN_INDEX 15
#define INT_VECTOR_OFFSET 16
#define INTSEL_REG (uint32_t)(&CM_INTC->SEL0)
struct PinIndex
{
@@ -294,6 +296,17 @@ struct PinIrqHdr pin_irq_hdr_tab[] =
{-1, 0, NONE, NONE}
};
static int GpioPinIndex(uint16_t pin){
int ret = 0;
for(;ret<=MAX_PIN_INDEX;ret++){ //ret must be 16-bit
if((0x0001U<<ret)&pin){
KPrintf("the int pin is %d\n",ret);
return ret;
}
};
return -1;
}
static void PinIrqHandler(uint16_t pinbit)
{
int32_t irqindex = -1;
@@ -418,6 +431,7 @@ static int32 GpioConfigMode(int mode, const struct PinIndex* index)
break;
case GPIO_CFG_INPUT:
stcGpioInit.u16PinDir = PIN_DIR_IN;
stcGpioInit.u16ExtInt = PIN_EXTINT_ON;
break;
case GPIO_CFG_INPUT_PULLUP:
stcGpioInit.u16PinDir = PIN_DIR_IN;
@@ -434,8 +448,7 @@ static int32 GpioConfigMode(int mode, const struct PinIndex* index)
default:
break;
}
GPIO_Init(index->pin, index->pin, &stcGpioInit);
GPIO_Init(index->port, index->pin, &stcGpioInit);
}
static int32 GpioIrqRegister(int32 pin, int32 mode, void (*hdr)(void *args), void *args)
@@ -443,7 +456,9 @@ static int32 GpioIrqRegister(int32 pin, int32 mode, void (*hdr)(void *args), voi
const struct PinIndex *index = GetPin(pin);
int32 irqindex = -1;
irqindex = GPIO_PIN_INDEX(index->pin);
stc_extint_init_t stcExtIntInit;
irqindex = GpioPinIndex(index->pin); // start from 0
if (irqindex >= ITEM_NUM(pin_irq_map)) {
return -ENONESYS;
}
@@ -465,8 +480,31 @@ static int32 GpioIrqRegister(int32 pin, int32 mode, void (*hdr)(void *args), voi
pin_irq_hdr_tab[irqindex].hdr = hdr;
pin_irq_hdr_tab[irqindex].mode = mode;
pin_irq_hdr_tab[irqindex].args = args;
/* Extint config */
EXTINT_StructInit(&stcExtIntInit);
switch (mode)
{
case GPIO_IRQ_EDGE_RISING:
stcExtIntInit.u32Edge = EXTINT_TRIG_RISING;
break;
case GPIO_IRQ_EDGE_FALLING:
stcExtIntInit.u32Edge = EXTINT_TRIG_FALLING;
break;
case GPIO_IRQ_EDGE_BOTH:
stcExtIntInit.u32Edge = EXTINT_TRIG_BOTH;
break;
case GPIO_IRQ_LEVEL_LOW:
stcExtIntInit.u32Edge = EXTINT_TRIG_LOW;
break;
}
EXTINT_Init(index->pin, &stcExtIntInit);
__IO uint32_t *INTC_SELx = (__IO uint32_t *)(INTSEL_REG + (4U * (uint32_t)(irqindex)));
WRITE_REG32(*INTC_SELx, irqindex);
isrManager.done->registerIrq(irqindex+INT_VECTOR_OFFSET, (void(*)(int vector,void *))hdr, args);
CriticalAreaUnLock(level);
return EOK;
}
@@ -475,7 +513,7 @@ static uint32 GpioIrqFree(x_base pin)
const struct PinIndex* index = GetPin(pin);
int32 irqindex = -1;
irqindex = GPIO_PIN_INDEX(index->pin);
irqindex = GpioPinIndex(index->pin);
if (irqindex >= ITEM_NUM(pin_irq_map)) {
return -ENONESYS;
}
@@ -485,6 +523,7 @@ static uint32 GpioIrqFree(x_base pin)
CriticalAreaUnLock(level);
return EOK;
}
isrManager.done->freeIrq(pin_irq_hdr_tab[irqindex].pin);
pin_irq_hdr_tab[irqindex].pin = -1;
pin_irq_hdr_tab[irqindex].hdr = NONE;
pin_irq_hdr_tab[irqindex].mode = 0;
@@ -509,9 +548,8 @@ static int32 GpioIrqEnable(x_base pin)
struct Hc32PinIrqMap *irq_map;
const struct PinIndex* index = GetPin(pin);
int32 irqindex = -1;
stc_extint_init_t stcExtIntInit;
irqindex = GPIO_PIN_INDEX(index->pin);
irqindex = GpioPinIndex(index->pin);
if (irqindex >= ITEM_NUM(pin_irq_map)) {
return -ENONESYS;
}
@@ -522,26 +560,8 @@ static int32 GpioIrqEnable(x_base pin)
return -ENONESYS;
}
/* Extint config */
EXTINT_StructInit(&stcExtIntInit);
switch (pin_irq_hdr_tab[irqindex].mode)
{
case GPIO_IRQ_EDGE_RISING:
stcExtIntInit.u32Edge = EXTINT_TRIG_RISING;
break;
case GPIO_IRQ_EDGE_FALLING:
stcExtIntInit.u32Edge = EXTINT_TRIG_FALLING;
break;
case GPIO_IRQ_EDGE_BOTH:
stcExtIntInit.u32Edge = EXTINT_TRIG_BOTH;
break;
case GPIO_IRQ_LEVEL_LOW:
stcExtIntInit.u32Edge = EXTINT_TRIG_LOW;
break;
}
EXTINT_Init(index->pin, &stcExtIntInit);
NVIC_EnableIRQ(irq_map->irq_config.irq_num);
GpioIrqConfig(index->pin, index->pin, PIN_EXTINT_ON);
GpioIrqConfig(index->port, index->pin, PIN_EXTINT_ON);
isrManager.done->enableIrq(GpioPinIndex(index->pin));
CriticalAreaUnLock(level);
return EOK;
@@ -554,8 +574,8 @@ static int32 GpioIrqDisable(x_base pin)
x_base level = CriticalAreaLock();
GpioIrqConfig(index->pin, index->pin, PIN_EXTINT_OFF);
NVIC_DisableIRQ(irq_map->irq_config.irq_num);
GpioIrqConfig(index->port, index->pin, PIN_EXTINT_OFF);
isrManager.done->disableIrq(GpioPinIndex(index->pin));
CriticalAreaUnLock(level);
return EOK;
@@ -637,9 +657,9 @@ uint32 Hc32PinWrite(void *dev, struct BusBlockWriteParam *write_param)
NULL_PARAM_CHECK(index);
if (GPIO_LOW == pinstat->val) {
GPIO_ResetPins(index->pin, index->pin);
GPIO_ResetPins(index->port, index->pin);
} else {
GPIO_SetPins(index->pin, index->pin);
GPIO_SetPins(index->port, index->pin);
}
return EOK;
@@ -653,7 +673,7 @@ uint32 Hc32PinRead(void *dev, struct BusBlockReadParam *read_param)
const struct PinIndex* index = GetPin(pinstat->pin);
NULL_PARAM_CHECK(index);
if(GPIO_ReadInputPins(index->pin, index->pin) == PIN_RESET) {
if(GPIO_ReadInputPins(index->port, index->pin) == PIN_RESET) {
pinstat->val = GPIO_LOW;
} else {
pinstat->val = GPIO_HIGH;
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/include/connect_adc.h
+42
View File
@@ -0,0 +1,42 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file connect_uart.h
* @brief define hc32f4a0-board usart function and struct
* @version 2.0
* @author AIIT XUOS Lab
* @date 2023-02-09
*/
#include <device.h>
#include <hardware_irq.h>
#include <hc32_ll_adc.h>
#ifdef __cplusplus
extern "C" {
#endif
struct HwAdc
{
CM_ADC_TypeDef *ADCx;
uint8 adc_channel;
};
int HwAdcInit(void);
#ifdef __cplusplus
}
#endif
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/include/connect_can.h
+40
View File
@@ -0,0 +1,40 @@
/*
* Copyright (c) 2021 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file connect_can.h
* @brief define hc32f4a0-board can function and struct
* @version 2.0
* @author AIIT XUOS Lab
* @date 2023-02-21
*/
#ifndef CONNECT_CAN_H
#define CONNECT_CAN_H
#include <device.h>
#include <hc32_ll_can.h>
#include <hc32_ll_clk.h>
#include <hc32_ll_gpio.h>
#include <hardware_irq.h>
#ifdef __cplusplus
extern "C" {
#endif
int HwCanInit(void);
#ifdef __cplusplus
}
#endif
#endif
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/include/connect_dac.h
+50
View File
@@ -0,0 +1,50 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file connect_uart.h
* @brief define hc32f4a0-board usart function and struct
* @version 2.0
* @author AIIT XUOS Lab
* @date 2023-02-09
*/
#include <device.h>
#include <hardware_irq.h>
#include <hc32_ll_fcg.h>
#include <hc32_ll_dac.h>
#include <hc32_ll_gpio.h>
#ifdef __cplusplus
extern "C" {
#endif
struct HwDac
{
CM_DAC_TypeDef *DACx;
uint16 digital_data;
};
typedef struct {
CM_DAC_TypeDef *pUnit;
// en_dac_cvt_t enCvtType;
uint16_t u16Ch;
} stc_dac_handle_t;
int HwDacInit(void);
#ifdef __cplusplus
}
#endif
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/include/connect_flash.h
+40
View File
@@ -0,0 +1,40 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file connect_flash.h
* @brief define hc32f4a0-board qspi-flash function and struct
* @version 2.0
* @author AIIT XUOS Lab
* @date 2022-10-17
*/
#ifndef CONNECT_FLASH_H
#define CONNECT_FLASH_H
#include <device.h>
#include <hardware_irq.h>
#include <flash_spi.h>
#include <hc32_ll_qspi.h>
#include <hc32_ll_gpio.h>
#ifdef __cplusplus
extern "C" {
#endif
int FlashW25qxxSpiDeviceInit(void);
#ifdef __cplusplus
}
#endif
#endif
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/include/connect_hwtimer.h
+40
View File
@@ -0,0 +1,40 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file connect_hwtimer.h
* @brief define hc32f4a0-board hwtimer function and struct
* @version 2.0
* @author AIIT XUOS Lab
* @date 2023-02-16
*/
#ifndef CONNECT_HWTIMER_H
#define CONNECT_HWTIMER_H
#include <device.h>
#include <hc32f4a0.h>
#include <hardware_irq.h>
#include <hc32_ll_tmr0.h>
#include <hc32_ll_gpio.h>
#ifdef __cplusplus
extern "C" {
#endif
int HwTimerInit(void);
#ifdef __cplusplus
}
#endif
#endif
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/include/connect_rtc.h
+37
View File
@@ -0,0 +1,37 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file connect_rtc.h
* @brief define hc32f4a0-board rtc function and struct
* @version 3.0
* @author AIIT XUOS Lab
* @date 2023-02-02
*/
#ifndef CONNECT_I2C_H
#define CONNECT_I2C_H
#include <device.h>
#include <hc32_ll_rtc.h>
#ifdef __cplusplus
extern "C" {
#endif
int HwRtcInit(void);
#ifdef __cplusplus
}
#endif
#endif
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/include/connect_wdt.h
+37
View File
@@ -0,0 +1,37 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file connect_wdt.h
* @brief define hc32f4a0-board watchdog function and struct
* @version 3.0
* @author AIIT XUOS Lab
* @date 2023-02-02
*/
#ifndef CONNECT_I2C_H
#define CONNECT_I2C_H
#include <device.h>
#include <hc32_ll_wdt.h>
#ifdef __cplusplus
extern "C" {
#endif
int HwWdtInit(void);
#ifdef __cplusplus
}
#endif
#endif
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/rtc/Kconfig
+11
View File
@@ -0,0 +1,11 @@
if BSP_USING_RTC
config RTC_BUS_NAME
string "rtc bus name"
default "rtc"
config RTC_DRV_NAME
string "rtc bus driver name"
default "rtc_drv"
config RTC_DEVICE_NAME
string "rtc bus device name"
default "rtc_dev"
endif
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/rtc/Makefile
+2
View File
@@ -0,0 +1,2 @@
SRC_FILES := connect_rtc.c
include $(KERNEL_ROOT)/compiler.mk
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/rtc/connect_rtc.c
+185
View File
@@ -0,0 +1,185 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file connect_rtc.c
* @brief support aiit-hc32f4a0-board rtc function and register to bus framework
* @version 1.0
* @author AIIT XUOS Lab
* @date 2023-02-02
*/
#include <connect_rtc.h>
#include <stdint.h>
#include <stdlib.h>
#include <time.h>
static uint32 RtcConfigure(void *drv, struct BusConfigureInfo *configure_info)
{
NULL_PARAM_CHECK(drv);
struct RtcDriver *rtc_drv = (struct RtcDriver *)drv;
struct RtcDrvConfigureParam *drv_param = (struct RtcDrvConfigureParam *)configure_info->private_data;
int cmd = drv_param->rtc_operation_cmd;
time_t *time = drv_param->time;
switch (cmd)
{
case OPER_RTC_GET_TIME:
{
struct tm ct;
stc_rtc_date_t rtc_date;
stc_rtc_time_t rtc_time;
// rtc_timer_get(&year, &month, &day, &hour, &minute, &second);
RTC_GetDate(RTC_DATA_FMT_DEC, &rtc_date);
RTC_GetTime(RTC_DATA_FMT_DEC, &rtc_time);
ct.tm_year = rtc_date.u8Year ;
ct.tm_mon = rtc_date.u8Month ;
ct.tm_mday = rtc_date.u8Day;
ct.tm_wday = rtc_date.u8Weekday;
ct.tm_hour = rtc_time.u8Hour;
ct.tm_min = rtc_time.u8Minute;
ct.tm_sec = rtc_time.u8Second;
*time = mktime(&ct);
}
break;
case OPER_RTC_SET_TIME:
{
struct tm *ct;
stc_rtc_date_t rtc_date;
stc_rtc_time_t rtc_time;
x_base lock;
lock = CriticalAreaLock();
ct = localtime(time);
rtc_date.u8Year = ct->tm_year ;
rtc_date.u8Month = ct->tm_mon ;
rtc_date.u8Day = ct->tm_mday;
rtc_date.u8Weekday = ct->tm_wday;
rtc_time.u8Hour = ct->tm_hour;
rtc_time.u8Minute = ct->tm_min;
rtc_time.u8Second = ct->tm_sec;
CriticalAreaUnLock(lock);
RTC_SetDate(RTC_DATA_FMT_DEC, &rtc_date);
RTC_SetTime(RTC_DATA_FMT_DEC, &rtc_time);
}
break;
}
return EOK;
}
/*manage the rtc device operations*/
static const struct RtcDevDone dev_done =
{
.open = NONE,
.close = NONE,
.write = NONE,
.read = NONE,
};
static int BoardRtcBusInit(struct RtcBus *rtc_bus, struct RtcDriver *rtc_driver)
{
x_err_t ret = EOK;
/*Init the rtc bus */
ret = RtcBusInit(rtc_bus, RTC_BUS_NAME);
if (EOK != ret) {
KPrintf("HwRtcInit RtcBusInit error %d\n", ret);
return ERROR;
}
/*Init the rtc driver*/
ret = RtcDriverInit(rtc_driver, RTC_DRV_NAME);
if (EOK != ret) {
KPrintf("HwRtcInit RtcDriverInit error %d\n", ret);
return ERROR;
}
/*Attach the rtc driver to the rtc bus*/
ret = RtcDriverAttachToBus(RTC_DRV_NAME, RTC_BUS_NAME);
if (EOK != ret) {
KPrintf("HwRtcInit RtcDriverAttachToBus error %d\n", ret);
return ERROR;
}
return ret;
}
/*Attach the rtc device to the rtc bus*/
static int BoardRtcDevBend(void)
{
x_err_t ret = EOK;
static struct RtcHardwareDevice rtc_device;
memset(&rtc_device, 0, sizeof(struct RtcHardwareDevice));
rtc_device.dev_done = &(dev_done);
ret = RtcDeviceRegister(&rtc_device, NONE, RTC_DEVICE_NAME);
if (EOK != ret) {
KPrintf("HwRtcInit RtcDeviceInit device %s error %d\n", RTC_DEVICE_NAME, ret);
return ERROR;
}
ret = RtcDeviceAttachToBus(RTC_DEVICE_NAME, RTC_BUS_NAME);
if (EOK != ret) {
KPrintf("HwRtcInit RtcDeviceAttachToBus device %s error %d\n", RTC_DEVICE_NAME, ret);
return ERROR;
}
return ret;
}
int HwRtcInit(void)
{
x_err_t ret = EOK;
static struct RtcBus rtc_bus;
memset(&rtc_bus, 0, sizeof(struct RtcBus));
static struct RtcDriver rtc_driver;
memset(&rtc_driver, 0, sizeof(struct RtcDriver));
rtc_driver.configure = &(RtcConfigure);
ret = BoardRtcBusInit(&rtc_bus, &rtc_driver);
if (EOK != ret) {
KPrintf("HwRtcInit error ret %u\n", ret);
return ERROR;
}
ret = BoardRtcDevBend();
if (EOK != ret) {
KPrintf("HwRtcInit error ret %u\n", ret);
}
stc_rtc_init_t stcRtcInit;
/* Configure structure initialization */
(void)RTC_StructInit(&stcRtcInit);
/* Configuration RTC structure */
stcRtcInit.u8ClockSrc = RTC_CLK_SRC_XTAL32;
stcRtcInit.u8HourFormat= RTC_HOUR_FMT_24H;
stcRtcInit.u8IntPeriod = RTC_INT_PERIOD_PER_SEC;
(void)RTC_Init(&stcRtcInit);
RTC_Cmd(LL_RTC_ENABLE);
return ret;
}
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/spi/Kconfig
+19
View File
@@ -39,4 +39,23 @@ if BSP_USING_SPI
string "spi bus 6 driver name"
default "spi6_drv"
endif
config BSP_USING_QSPI_FLASH
bool "Using qspi and flash"
default n
if BSP_USING_QSPI_FLASH
config QSPI_BUS_NAME
string "qspi bus name"
default "qspi"
config QSPI_DEVICE_NAME_0
string "qspi bus device 0 name"
default "qspi_dev0"
config QSPI_DRV_NAME
string "qspi bus driver name"
default "qspi_drv"
config QSPI_FLASH_DEV_NAME
string "flash dev name"
default "qspi_W25Q128"
endif
endif
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/spi/Makefile
+4
View File
@@ -5,4 +5,8 @@ ifeq ($(CONFIG_RESOURCES_SPI_LORA),y)
SRC_FILES += connect_lora_spi.c
endif
ifeq ($(CONFIG_BSP_USING_QSPI_FLASH),y)
SRC_FILES += connect_flash.c
endif
include $(KERNEL_ROOT)/compiler.mk
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/spi/connect_flash.c
+260
View File
@@ -0,0 +1,260 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file connect_flash.c
* @brief support hc32f4a0-board qspi-flash function and register to bus framework
* @version 2.0
* @author AIIT XUOS Lab
* @date 2023-02-16
*/
#include <connect_flash.h>
#define QSPI_DEVICE_SLAVE_ID_0 (0)
#define QSPI_UNIT (CM_QSPI)
#define QSPI_CS_PORT (GPIO_PORT_C)
#define QSPI_SCK_PORT (GPIO_PORT_C)
#define QSPI_IO0_PORT (GPIO_PORT_D)
#define QSPI_IO1_PORT (GPIO_PORT_D)
#define QSPI_IO2_PORT (GPIO_PORT_D)
#define QSPI_IO3_PORT (GPIO_PORT_D)
#define QSPI_CS_PIN (GPIO_PIN_07)
#define QSPI_SCK_PIN (GPIO_PIN_06)
#define QSPI_IO0_PIN (GPIO_PIN_08)
#define QSPI_IO1_PIN (GPIO_PIN_09)
#define QSPI_IO2_PIN (GPIO_PIN_10)
#define QSPI_IO3_PIN (GPIO_PIN_11)
#define QSPI_PIN_FUNC (GPIO_FUNC_18)
static uint32 QSpiSdkInit(struct SpiDriver *spi_drv)
{
stc_qspi_init_t stcInit;
FCG_Fcg1PeriphClockCmd(PWC_FCG1_QSPI, ENABLE);
(void)QSPI_StructInit(&stcInit);
stcInit.u32ClockDiv = QSPI_CLK_DIV3;
stcInit.u32SpiMode = QSPI_SPI_MD0;
stcInit.u32ReadMode = QSPI_RD_MD_STD_RD;
stcInit.u32DummyCycle = QSPI_DUMMY_CYCLE8;
stcInit.u32AddrWidth = QSPI_ADDR_WIDTH_24BIT;
return QSPI_Init(&stcInit);
}
static void QspiPinConfig(void)
{
stc_gpio_init_t stcGpioInit;
(void)GPIO_StructInit(&stcGpioInit);
stcGpioInit.u16PinState = PIN_STAT_RST;
stcGpioInit.u16PinDir = PIN_DIR_OUT;
(void)GPIO_Init(QSPI_CS_PORT, QSPI_CS_PIN|QSPI_SCK_PIN, &stcGpioInit);
stcGpioInit.u16PinState = PIN_STAT_SET;
(void)GPIO_Init(QSPI_IO0_PORT, QSPI_IO1_PIN|QSPI_IO2_PIN|QSPI_IO3_PIN, &stcGpioInit);
stcGpioInit.u16PinDir = PIN_DIR_IN;
(void)GPIO_Init(QSPI_IO0_PORT, QSPI_IO0_PIN, &stcGpioInit);
GPIO_ResetPins(QSPI_CS_PORT, QSPI_CS_PIN);
GPIO_SetPins(QSPI_IO0_PORT, QSPI_IO2_PIN|QSPI_IO3_PIN);
GPIO_SetFunc(QSPI_CS_PORT, QSPI_CS_PIN, QSPI_PIN_FUNC);
GPIO_SetFunc(QSPI_SCK_PORT, QSPI_SCK_PIN, QSPI_PIN_FUNC);
GPIO_SetFunc(QSPI_IO0_PORT, QSPI_IO0_PIN, QSPI_PIN_FUNC);
GPIO_SetFunc(QSPI_IO1_PORT, QSPI_IO1_PIN, QSPI_PIN_FUNC);
GPIO_SetFunc(QSPI_IO2_PORT, QSPI_IO2_PIN, QSPI_PIN_FUNC);
GPIO_SetFunc(QSPI_IO3_PORT, QSPI_IO3_PIN, QSPI_PIN_FUNC);
}
static uint32 QSpiWriteData(struct SpiHardwareDevice *spi_dev, struct SpiDataStandard *spi_datacfg)
{
SpiDeviceParam *dev_param = (SpiDeviceParam *)(spi_dev->haldev.private_data);
uint8 cs_gpio_pin = dev_param->spi_slave_param->spi_cs_gpio_pin;
uint8 cs_gpio_port = dev_param->spi_slave_param->spi_cs_gpio_port;
CM_SPI_TypeDef *spi = spi_dev->haldev.owner_bus->private_data;
x_err_t ret = EOK;
if (spi_datacfg->spi_chip_select) {
// GPIO_ResetPins(cs_gpio_port, cs_gpio_pin);
QSPI_EnterDirectCommMode();
}
if(spi_datacfg->length > 0U && spi_datacfg->tx_buff!=NULL){
for(int i=0;i<spi_datacfg->length;i++){
QSPI_WriteDirectCommValue(spi_datacfg->tx_buff[i]);
}
}
if (spi_datacfg->spi_cs_release) {
// GPIO_SetPins(cs_gpio_port, cs_gpio_pin);
QSPI_ExitDirectCommMode();
}
return ret;
}
static uint32 QSpiReadData(struct SpiHardwareDevice *spi_dev, struct SpiDataStandard *spi_datacfg)
{
SpiDeviceParam *dev_param = (SpiDeviceParam *)(spi_dev->haldev.private_data);
uint8 cs_gpio_pin = dev_param->spi_slave_param->spi_cs_gpio_pin;
uint8 cs_gpio_port = dev_param->spi_slave_param->spi_cs_gpio_port;
CM_SPI_TypeDef *spi = spi_dev->haldev.owner_bus->private_data;
x_err_t ret = EOK;
uint8_t *read_buffer = spi_datacfg->rx_buff;
if (spi_datacfg->spi_chip_select) {
// GPIO_ResetPins(cs_gpio_port, cs_gpio_pin);
QSPI_EnterDirectCommMode();
}
if(spi_datacfg->length > 0U && spi_datacfg->rx_buff!=NULL){
for(int i=0;i<spi_datacfg->length;i++){
read_buffer[i] = (uint8_t)QSPI_ReadDirectCommValue();
}
}
if (spi_datacfg->spi_cs_release) {
// GPIO_SetPins(cs_gpio_port, cs_gpio_pin);
QSPI_ExitDirectCommMode();
}
return ret;
}
static uint32 QSpiDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
{
NULL_PARAM_CHECK(drv);
NULL_PARAM_CHECK(configure_info);
x_err_t ret = EOK;
struct SpiDriver *spi_drv = (struct SpiDriver *)drv;
struct SpiMasterParam *spi_param;
switch (configure_info->configure_cmd)
{
case OPE_INT:
QSpiSdkInit(spi_drv);
QspiPinConfig();
break;
case OPE_CFG:
spi_param = (struct SpiMasterParam *)configure_info->private_data;
break;
default:
break;
}
return ret;
}
/*manage the qspi device operations*/
static const struct SpiDevDone qspi_dev_done =
{
.dev_open = NONE,
.dev_close = NONE,
.dev_write = QSpiWriteData,
.dev_read = QSpiReadData,
};
static int BoardQSpiDevBend(void)
{
x_err_t ret = EOK;
static struct SpiHardwareDevice qspi_device0;
memset(&qspi_device0, 0, sizeof(struct SpiHardwareDevice));
static struct SpiSlaveParam qspi_slaveparam0;
memset(&qspi_slaveparam0, 0, sizeof(struct SpiSlaveParam));
qspi_slaveparam0.spi_slave_id = QSPI_DEVICE_SLAVE_ID_0;
qspi_slaveparam0.spi_cs_gpio_pin = QSPI_CS_PIN;
qspi_slaveparam0.spi_cs_gpio_port = QSPI_CS_PORT;
qspi_device0.spi_param.spi_slave_param = &qspi_slaveparam0;
qspi_device0.spi_dev_done = &(qspi_dev_done);
ret = SpiDeviceRegister(&qspi_device0, (void *)(&qspi_device0.spi_param), QSPI_DEVICE_NAME_0);
if (EOK != ret) {
KPrintf("BoardSpiDevBend SpiDeviceRegister device %s error %d\n", QSPI_DEVICE_NAME_0, ret);
return ERROR;
}
ret = SpiDeviceAttachToBus(QSPI_DEVICE_NAME_0, QSPI_BUS_NAME);
if (EOK != ret) {
KPrintf("BoardSpiDevBend SpiDeviceAttachToBus device %s error %d\n", QSPI_DEVICE_NAME_0, ret);
return ERROR;
}
return ret;
}
static int BoardSpiBusInit(struct SpiBus *spi_bus, struct SpiDriver *spi_driver, const char *bus_name, const char *drv_name)
{
x_err_t ret = EOK;
/*Init the spi bus */
ret = SpiBusInit(spi_bus, bus_name);
if (EOK != ret) {
KPrintf("Board_Spi_init SpiBusInit error %d\n", ret);
return ERROR;
}
/*Init the spi driver*/
ret = SpiDriverInit(spi_driver, drv_name);
if (EOK != ret) {
KPrintf("Board_Spi_init SpiDriverInit error %d\n", ret);
return ERROR;
}
/*Attach the spi driver to the spi bus*/
ret = SpiDriverAttachToBus(drv_name, bus_name);
if (EOK != ret) {
KPrintf("Board_Spi_init SpiDriverAttachToBus error %d\n", ret);
return ERROR;
}
return ret;
}
int HwQSpiInit(void)
{
x_err_t ret = EOK;
static struct SpiBus qspi_bus;
memset(&qspi_bus, 0, sizeof(struct SpiBus));
static struct SpiDriver qspi_driver;
memset(&qspi_driver, 0, sizeof(struct SpiDriver));
qspi_bus.private_data = QSPI_UNIT;
qspi_driver.configure = QSpiDrvConfigure;
ret = BoardSpiBusInit(&qspi_bus, &qspi_driver, QSPI_BUS_NAME, QSPI_DRV_NAME);
if (EOK != ret) {
KPrintf("BoardSpiBusInit error ret %u\n", ret);
return ERROR;
}
ret = BoardQSpiDevBend();
if (EOK != ret) {
KPrintf("BoardSpiDevBend error ret %u\n", ret);
return ERROR;
}
return ret;
}
int FlashW25qxxSpiDeviceInit(void)
{
HwQSpiInit();
QSpiSdkInit(NULL);
QspiPinConfig();
if (NONE == SpiFlashInit(QSPI_BUS_NAME, QSPI_DEVICE_NAME_0, QSPI_DRV_NAME, QSPI_FLASH_DEV_NAME)) {
return ERROR;
}
return EOK;
}
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/spi/connect_spi.c
+3 -7
View File
@@ -465,11 +465,6 @@ int HwSpiInit(void)
return ERROR;
}
ret = BoardSpiDevBend();
if (EOK != ret) {
KPrintf("BoardSpiDevBend error ret %u\n", ret);
return ERROR;
}
#endif
#ifdef BSP_USING_SPI6
@@ -488,12 +483,13 @@ int HwSpiInit(void)
return ERROR;
}
#endif
ret = BoardSpiDevBend();
if (EOK != ret) {
KPrintf("BoardSpiDevBend error ret %u\n", ret);
return ERROR;
}
#endif
}
return ret;
}
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/timer/Kconfig
+16
View File
@@ -0,0 +1,16 @@
menuconfig BSP_USING_TIMER_0
bool "Using timer 0"
default n
select RESOURCES_HWTIMER
if BSP_USING_TIMER_0
config HWTIMER_BUS_NAME_0
string "timer 0 bus 0 name"
default "timer0"
config HWTIMER_0_DEVICE_NAME_0
string "timer 0 bus 0 device 0 name"
default "timer0_dev0"
config HWTIMER_DRIVER_NAME_0
string "timer 0 bus 0 driver name"
default "timer0_drv"
endif
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/timer/Makefile
+3
View File
@@ -0,0 +1,3 @@
SRC_FILES := connect_hwtimer.c
include $(KERNEL_ROOT)/compiler.mk
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/timer/connect_hwtimer.c
+189
View File
@@ -0,0 +1,189 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file connect_hwtimer.c
* @brief support aiit-riscv64-board hwtimer function and register to bus framework
* @version 1.0
* @author AIIT XUOS Lab
* @date 2021-04-25
*/
#include <connect_hwtimer.h>
#define TMR0_CMP_VAL 1000
#define TMR0x ((CM_TMR0_TypeDef *)CM_TMR0_1_BASE)
#define TMR0_CH_x (TMR0_CH_A)
#define INTSEL_REG ((uint32_t)(&CM_INTC->SEL0))
#define TIMER0_IRQn (18)
void (*callback_function)(void *) ;
static void Timer0Callback(int vector, void *param)
{
TMR0_SetCountValue(TMR0x, TMR0_CH_x, 0);
if (callback_function) {
callback_function(param);
}
}
static uint32 HwtimerOpen(void *dev)
{
struct HwtimerHardwareDevice *hwtimer_dev = dev;
stc_tmr0_init_t stcTmr0Init;
/* Enable timer0 peripheral clock */
FCG_Fcg2PeriphClockCmd(PWC_FCG2_TMR0_1, ENABLE);
/* TIMER0 basetimer function initialize */
(void)TMR0_StructInit(&stcTmr0Init);
stcTmr0Init.u32ClockDiv = TMR0_CLK_DIV128; /* Config clock division */
stcTmr0Init.u32ClockSrc = TMR0_CLK_SRC_INTERN_CLK; /* Chose clock source */
stcTmr0Init.u32Func = TMR0_FUNC_CMP; /* Timer0 compare mode */
stcTmr0Init.u16CompareValue = TMR0_CMP_VAL; /* Set compare register data */
(void)TMR0_Init(TMR0x, TMR0_CH_x, &stcTmr0Init);
// DelayKTask(1);
// /* Set internal hardware capture source */
// TMR0_SetTriggerSrc(EVT_PORT_EIRQ0);
// DelayKTask(1);
return EOK;
}
static uint32 HwtimerClose(void *dev)
{
/* Timer0 interrupt function Disable */
TMR0_IntCmd(TMR0x, TMR0_INT_CMP_A, DISABLE);
return EOK;
}
/*manage the hwtimer device operations*/
static const struct HwtimerDevDone dev_done =
{
.open = HwtimerOpen,
.close = HwtimerClose,
.write = NONE,
.read = NONE,
};
static uint32 HwtimerDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
{
NULL_PARAM_CHECK(drv);
NULL_PARAM_CHECK(configure_info);
x_err_t ret = EOK;
__IO uint32_t *INTC_SELx;
switch (configure_info->configure_cmd)
{
case OPE_INT:
INTC_SELx = (__IO uint32_t *)(INTSEL_REG+ 4U * (uint32_t)(TIMER0_IRQn));
WRITE_REG32(*INTC_SELx, EVT_SRC_TMR0_1_CMP_A);
callback_function = (void (*)(void *param))configure_info->private_data;
isrManager.done->registerIrq(TIMER0_IRQn+16,Timer0Callback,NULL);
isrManager.done->enableIrq(TIMER0_IRQn);
TMR0_IntCmd(TMR0x, TMR0_INT_CMP_A, ENABLE);
break;
case OPE_CFG:
TMR0_ClearStatus(TMR0x, TMR0_FLAG_CMP_A);
TMR0_SetCompareValue(TMR0x, TMR0_CH_x, *((int *)configure_info->private_data) );
/* Timer0 interrupt function Enable */
TMR0_SetCountValue(TMR0x, TMR0_CH_x, 0x0000);
TMR0_Start(TMR0x, TMR0_CH_x);
break;
default:
break;
}
return ret;
}
/*Init hwtimer bus*/
static int BoardHwtimerBusInit(struct HwtimerBus *hwtimer_bus, struct HwtimerDriver *hwtimer_driver)
{
x_err_t ret = EOK;
/*Init the hwtimer bus */
ret = HwtimerBusInit(hwtimer_bus, HWTIMER_BUS_NAME_0);
if (EOK != ret) {
KPrintf("board_hwtimer_init HwtimerBusInit error %d\n", ret);
return ERROR;
}
/*Init the hwtimer driver*/
hwtimer_driver->configure = &(HwtimerDrvConfigure);
ret = HwtimerDriverInit(hwtimer_driver, HWTIMER_DRIVER_NAME_0);
if (EOK != ret) {
KPrintf("board_hwtimer_init HwtimerDriverInit error %d\n", ret);
return ERROR;
}
/*Attach the hwtimer driver to the hwtimer bus*/
ret = HwtimerDriverAttachToBus(HWTIMER_DRIVER_NAME_0, HWTIMER_BUS_NAME_0);
if (EOK != ret) {
KPrintf("board_hwtimer_init USEDriverAttachToBus error %d\n", ret);
return ERROR;
}
return ret;
}
/*Attach the hwtimer device to the hwtimer bus*/
static int BoardHwtimerDevBend(void)
{
x_err_t ret = EOK;
static struct HwtimerHardwareDevice hwtimer_device_0;
memset(&hwtimer_device_0, 0, sizeof(struct HwtimerHardwareDevice));
hwtimer_device_0.dev_done = &dev_done;
ret = HwtimerDeviceRegister(&hwtimer_device_0, NONE, HWTIMER_0_DEVICE_NAME_0);
if (EOK != ret) {
KPrintf("BoardHwtimerDevBend HwtimerDeviceRegister device %s error %d\n", HWTIMER_0_DEVICE_NAME_0, ret);
return ERROR;
}
ret = HwtimerDeviceAttachToBus(HWTIMER_0_DEVICE_NAME_0, HWTIMER_BUS_NAME_0);
if (EOK != ret) {
KPrintf("BoardHwtimerDevBend HwtimerDeviceAttachToBus device %s error %d\n", HWTIMER_0_DEVICE_NAME_0, ret);
return ERROR;
}
return ret;
}
/*K210 BOARD HWTIMER INIT*/
int HwTimerInit(void)
{
x_err_t ret = EOK;
static struct HwtimerBus hwtimer_bus;
memset(&hwtimer_bus, 0, sizeof(struct HwtimerBus));
static struct HwtimerDriver hwtimer_driver;
memset(&hwtimer_driver, 0, sizeof(struct HwtimerDriver));
ret = BoardHwtimerBusInit(&hwtimer_bus, &hwtimer_driver);
if (EOK != ret) {
KPrintf("board_hwtimer_Init error ret %u\n", ret);
return ERROR;
}
ret = BoardHwtimerDevBend();
if (EOK != ret) {
KPrintf("board_hwtimer_Init error ret %u\n", ret);
return ERROR;
}
return ret;
}
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/watchdog/Kconfig
+15
View File
@@ -0,0 +1,15 @@
if BSP_USING_WDT
config WDT_BUS_NAME_0
string "watchdog bus 0 name"
default "wdt0"
config WDT_DRIVER_NAME_0
string "watchdog driver 0 name"
default "wdt0_drv"
config WDT_0_DEVICE_NAME_0
string "watchdog device 0 name"
default "wdt0_dev0"
endif
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/watchdog/Makefile
+3
View File
@@ -0,0 +1,3 @@
SRC_FILES := connect_wdt.c
include $(KERNEL_ROOT)/compiler.mk
Ubiquitous/XiZi_IIoT/board/hc32f4a0/third_party_driver/watchdog/connect_wdt.c
+145
View File
@@ -0,0 +1,145 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file connect_wdt.c
* @brief support hc32f4a0-board watchdog function and register to bus framework
* @version 1.0
* @author AIIT XUOS Lab
* @date 2023-02-02
*/
#include <connect_wdt.h>
#define WDT_COUNT_CYCLE 65536U
static uint32 WdtOpen(void *dev)
{
NULL_PARAM_CHECK(dev);
stc_wdt_init_t stcWdtInit;
stcWdtInit.u32CountPeriod = WDT_CNT_PERIOD65536;
stcWdtInit.u32ClockDiv = WDT_CLK_DIV1024;
stcWdtInit.u32RefreshRange = WDT_RANGE_0TO25PCT;
stcWdtInit.u32LPMCount = WDT_LPM_CNT_STOP;
stcWdtInit.u32ExceptionType = WDT_EXP_TYPE_RST;
(void)WDT_Init(&stcWdtInit);
return EOK;
}
static uint32 WdtConfigure(void *drv, struct BusConfigureInfo *args)
{
NULL_PARAM_CHECK(drv);
NULL_PARAM_CHECK(args);
stc_wdt_init_t stcWdtInit;
int period_option = *((int*)args->private_data);
if(period_option<=256){
period_option = WDT_CNT_PERIOD256;
}else if(period_option<=4096){
period_option = WDT_CNT_PERIOD4096;
}else if(period_option<=16384){
period_option = WDT_CNT_PERIOD16384;
}else{
period_option = WDT_CNT_PERIOD65536;
}
switch (args->configure_cmd)
{
case OPER_WDT_SET_TIMEOUT:
stcWdtInit.u32CountPeriod = period_option;
stcWdtInit.u32ClockDiv = WDT_CLK_DIV1024;
stcWdtInit.u32RefreshRange = WDT_RANGE_0TO25PCT;
stcWdtInit.u32LPMCount = WDT_LPM_CNT_STOP;
stcWdtInit.u32ExceptionType = WDT_EXP_TYPE_RST;
if (WDT_Init(&stcWdtInit) != 0) {
return ERROR;
}
/* the chip SDK's feature:to start up watchdog counter, feed dog first after initialization*/
WDT_FeedDog();
break;
case OPER_WDT_KEEPALIVE:
/* must wait for count lower than 25%(division by 4) for a feed as RefreshRange is set as 0TO25PCT*/
if (WDT_GetCountValue() < WDT_COUNT_CYCLE/4){
WDT_FeedDog();
}
break;
default:
return ERROR;
}
return EOK;
}
static const struct WdtDevDone dev_done =
{
WdtOpen,
NONE,
NONE,
NONE,
};
/**
* @description: Watchdog function
* @return success: EOK, failure: other
*/
int StartWatchdog(void)
{
//add feed watchdog task function
return EOK;
}
int HwWdtInit(void)
{
x_err_t ret = EOK;
static struct WdtBus wdt0;
ret = WdtBusInit(&wdt0, WDT_BUS_NAME_0);
if (ret != EOK) {
KPrintf("Watchdog bus init error %d\n", ret);
return ERROR;
}
static struct WdtDriver drv0;
drv0.configure = WdtConfigure;
ret = WdtDriverInit(&drv0, WDT_DRIVER_NAME_0);
if (ret != EOK) {
KPrintf("Watchdog driver init error %d\n", ret);
return ERROR;
}
ret = WdtDriverAttachToBus(WDT_DRIVER_NAME_0, WDT_BUS_NAME_0);
if (ret != EOK) {
KPrintf("Watchdog driver attach error %d\n", ret);
return ERROR;
}
static struct WdtHardwareDevice dev0;
dev0.dev_done = &dev_done;
ret = WdtDeviceRegister(&dev0, WDT_0_DEVICE_NAME_0);
if (ret != EOK) {
KPrintf("Watchdog device register error %d\n", ret);
return ERROR;
}
ret = WdtDeviceAttachToBus(WDT_0_DEVICE_NAME_0, WDT_BUS_NAME_0);
if (ret != EOK) {
KPrintf("Watchdog device register error %d\n", ret);
return ERROR;
}
return ret;
}
Ubiquitous/XiZi_IIoT/kernel/kernel_test/test_realtime.c
+52 -26
View File
@@ -26,15 +26,23 @@ extern unsigned int usleep(unsigned int seconds);
static BusType pin;
#ifdef ARCH_ARM
#include <hardware_gpio.h>
// #include <hardware_gpio.h>
#define GPIO_C13 7
#define GPIO_C2 17
#define GPIO_C11 140
#define GPIO_D1 143
void PinIrqIsr(void *args)
void PinIrqIsr(int vector,void *args)
{
*(volatile unsigned int *)0x40020818 = 0x2000;
*(volatile unsigned int *)0x4002081a = 0x2000;
/* 将GPIO D1置为高电平 */
asm volatile("LDR r2, =0x40053838"); // 测试代码
asm volatile("MOV r3, #0x0002"); // 测试代码
asm volatile("STR r3, [r2]"); // 测试代码
/* 将GPIO D1置为低电平 */
asm volatile("LDR r2, =0x4005383A"); // 测试代码
asm volatile("MOV r3, #0x0002"); // 测试代码
asm volatile("STR r3, [r2]"); // 测试代码
}
int RealtimeIrqTest()
@@ -58,23 +66,23 @@ int RealtimeIrqTest()
KPrintf("%s irq test\n",__func__);
/* config test pin 1 as output*/
testpin_1.cmd = GPIO_CONFIG_MODE;
testpin_1.pin = GPIO_C13;
testpin_1.pin = GPIO_D1;
testpin_1.mode = GPIO_CFG_OUTPUT;
ret = BusDrvConfigure(pin->owner_driver, &configure_info_1);
if (ret != EOK) {
KPrintf("config testpin_1 %d failed!\n", GPIO_C13);
KPrintf("config testpin_1 %d failed!\n", GPIO_D1);
return -ERROR;
}
/* set test pin 1 as high*/
testpin_1_stat.pin = GPIO_C13;
testpin_1_stat.pin = GPIO_D1;
testpin_1_stat.val = GPIO_LOW;
BusDevWriteData(pin->owner_haldev, &write_param_1);
/* config test pin 2 as input*/
testpin_2.cmd = GPIO_CONFIG_MODE;
testpin_2.pin = GPIO_C2;
testpin_2.pin = GPIO_C11;
testpin_2.mode = GPIO_CFG_INPUT;
ret = BusDrvConfigure(pin->owner_driver, &configure_info_2);
@@ -84,9 +92,9 @@ int RealtimeIrqTest()
}
testpin_2.cmd = GPIO_IRQ_REGISTER;
testpin_2.pin = GPIO_C2;
testpin_2.pin = GPIO_C11;
testpin_2.irq_set.irq_mode = GPIO_IRQ_EDGE_BOTH;
testpin_2.irq_set.hdr = PinIrqIsr;
testpin_2.irq_set.hdr = (void(*)(void *))PinIrqIsr;
testpin_2.irq_set.args = NONE;
ret = BusDrvConfigure(pin->owner_driver, &configure_info_2);
@@ -96,7 +104,7 @@ int RealtimeIrqTest()
}
testpin_2.cmd = GPIO_IRQ_ENABLE;
testpin_2.pin = GPIO_C2;
testpin_2.pin = GPIO_C11;
ret = BusDrvConfigure(pin->owner_driver, &configure_info_2);
if (ret != EOK) {
@@ -191,14 +199,32 @@ void GpioSpeedTest()
#else
#define GPIO_18 18
#define GPIO_19 19
#define GPIO_34 34
#define GPIO_35 35
void PinIrqIsr(void *args)
{
*(volatile unsigned int *)0x3800100c |= 0x5;
/* 将 GPIO18 置为高电平 */
asm volatile ("lui a5, 0x38001"); // 测试代码
asm volatile ("addi a5, a5, 12"); // 测试代码
asm volatile ("lw a5, 0(a5)"); // 测试代码
asm volatile ("sext.w a4, a5"); // 测试代码
asm volatile ("lui a5, 0x38001"); // 测试代码
asm volatile ("addi a5, a5, 12"); // 测试代码
asm volatile ("ori a4, a4, 5"); // 测试代码
asm volatile ("sext.w a4, a4"); // 测试代码
asm volatile ("sw a4, 0(a5)"); // 测试代码
*(volatile unsigned int *)0x3800100c &= ~0x5;
/* 将GPIO18 置为低电平 */
asm volatile ("lui a5, 0x38001"); // 测试代码
asm volatile ("addi a5, a5, 12"); // 测试代码
asm volatile ("lw a5, 0(a5)"); // 测试代码
asm volatile ("sext.w a4, a5"); // 测试代码
asm volatile ("lui a5, 0x38001"); // 测试代码
asm volatile ("addi a5, a5, 12"); // 测试代码
asm volatile ("andi a4, a4, -6"); // 测试代码
asm volatile ("sext.w a4, a4"); // 测试代码
asm volatile ("sw a4, 0(a5)"); // 测试代码
}
int RealtimeIrqTest()
@@ -221,29 +247,29 @@ int RealtimeIrqTest()
KPrintf("%s irq test\n",__func__);
/* config GPIO18 as output and set as low */
testpin_1.cmd = GPIO_CONFIG_MODE;
testpin_1.pin = GPIO_18;
testpin_1.pin = GPIO_34;
testpin_1.mode = GPIO_CFG_OUTPUT;
BusDrvConfigure(pin->owner_driver, &configure_info_1);
testpin_1_stat.pin = GPIO_18;
testpin_1_stat.pin = GPIO_34;
testpin_1_stat.val = GPIO_LOW;
BusDevWriteData(pin->owner_haldev, &write_param_1);
/* config GPIO18 as input */
testpin_2.cmd = GPIO_CONFIG_MODE;
testpin_2.pin = GPIO_19;
testpin_2.pin = GPIO_35;
testpin_2.mode = GPIO_CFG_INPUT;
BusDrvConfigure(pin->owner_driver, &configure_info_2);
testpin_2.cmd = GPIO_IRQ_REGISTER;
testpin_2.pin = GPIO_19;
testpin_2.pin = GPIO_35;
testpin_2.irq_set.irq_mode = GPIO_IRQ_EDGE_RISING;
testpin_2.irq_set.hdr = PinIrqIsr;
testpin_2.irq_set.args = NONE;
BusDrvConfigure(pin->owner_driver, &configure_info_2);
testpin_2.cmd = GPIO_IRQ_ENABLE;
testpin_2.pin = GPIO_19;
testpin_2.pin = GPIO_35;
BusDrvConfigure(pin->owner_driver, &configure_info_2);
return 0;
@@ -262,16 +288,16 @@ void RealtimeTaskSwitchTest()
write_param_1.buffer = (void *)&testpin_1_stat;
testpin_1.cmd = GPIO_CONFIG_MODE;
testpin_1.pin = GPIO_18;
testpin_1.pin = GPIO_34;
testpin_1.mode = GPIO_CFG_OUTPUT;
BusDrvConfigure(pin->owner_driver, &configure_info_1);
testpin_1_stat.pin = GPIO_18;
testpin_1_stat.pin = GPIO_34;
testpin_1_stat.val = GPIO_LOW;
BusDevWriteData(pin->owner_haldev, &write_param_1);
while (RET_TRUE) {
DelayKTask(10);
DelayKTask(1);
}
}
@@ -288,11 +314,11 @@ void GpioSpeedTest()
write_param_1.buffer = (void *)&testpin_1_stat;
testpin_1.cmd = GPIO_CONFIG_MODE;
testpin_1.pin = GPIO_18;
testpin_1.pin = GPIO_34;
testpin_1.mode = GPIO_CFG_OUTPUT;
BusDrvConfigure(pin->owner_driver, &configure_info_1);
testpin_1_stat.pin = GPIO_18;
testpin_1_stat.pin = GPIO_34;
testpin_1_stat.val = GPIO_LOW;
BusDevWriteData(pin->owner_haldev, &write_param_1);
Ubiquitous/XiZi_IIoT/kernel/thread/init.c
+7
View File
@@ -33,6 +33,11 @@
#endif
#endif
#ifdef BSP_USING_QSPI_FLASH
#include "connect_flash.h"
extern int FlashW25qxxSpiDeviceInit(void);
#endif
#ifdef KERNEL_USER_MAIN
#ifndef MAIN_KTASK_STACK_SIZE
#define MAIN_KTASK_STACK_SIZE 2048
@@ -46,6 +51,8 @@
extern int StartWatchdog(void);
#endif
extern void CreateKServiceKTask(void);
extern int main(void);
void InitBoardHardware(void);
Ubiquitous/XiZi_IIoT/path_kernel.mk
+12
View File
@@ -475,9 +475,21 @@ KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/knowing/tensorflow
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/knowing/tensorflow-lite/tensorflow-lite-for-mcu/source/third_party/gemmlowp #
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/knowing/tensorflow-lite/tensorflow-lite-for-mcu/source/third_party/flatbuffers/include #
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/knowing/tensorflow-lite/tensorflow-lite-for-mcu/source/third_party/ruy #
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/knowing/kpu/k210_yolov2_detect_procedure #
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/knowing/kpu/yolov2 #
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/knowing/kpu/yolov2_json #
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/knowing/nnom/inc #
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/knowing/nnom/inc/layers #
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/knowing/nnom/port #
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/knowing/cmsis_5/Core/Include #
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/knowing/cmsis_5/DSP/Include #
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/knowing/cmsis_5/DSP/Include/dsp #
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Framework/knowing/cmsis_5/NN/Include #
KERNELPATHS += -I$(KERNEL_ROOT)/../../APP_Framework/Applications/knowing_app/cmsis_5_demo/cmsisnn-cifar10/model/m4 #
endif
ifeq ($(CONFIG_LIB_LV),y)
Ubiquitous/XiZi_IIoT/resources/spi/third_party_spi/SFUD/sfud/src/sfud.c
+1 -1
View File
@@ -444,7 +444,7 @@ sfud_err sfud_read(const sfud_flash *flash, uint32_t addr, size_t size, uint8_t
#endif
{
cmd_data[0] = SFUD_CMD_READ_DATA;
make_adress_byte_array(flash, addr, &cmd_data[1]);
make_adress_byte_array(flash, addr, cmd_data+1);
cmd_size = flash->addr_in_4_byte ? 5 : 4;
result = spi->wr(spi, cmd_data, cmd_size, data, size);
}