forked from xuos/xiuos
feat add spi type in transform_layer
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79edaf3d17
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1776223332
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@ -195,6 +195,7 @@ int PrivIoctl(int fd, int cmd, void *args)
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case LCD_TYPE:
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ret = PrivLcdIoctl(fd, cmd, ioctl_cfg->args);
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break;
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case SPI_TYPE:
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case I2C_TYPE:
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case RTC_TYPE:
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case ADC_TYPE:
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@ -94,6 +94,30 @@ extern "C" {
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#define SERIAL_RB_BUFSZ 128
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#endif
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/********************SPI define*******************/
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#define SPI_MAX_CLOCK 40000000
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#define spi_device_max_num 4
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#define SPI_LINE_CPHA (1 << 0)
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#define SPI_LINE_CPOL (1 << 1)
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#define SPI_LSB (0 << 2)
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#define SPI_MSB (1 << 2)
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#define SPI_DEV_MASTER (0 << 3)
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#define SPI_DEV_SLAVE (1 << 3)
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#define SPI_MODE_0 (0 | 0)
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#define SPI_MODE_1 (0 | SPI_LINE_CPHA)
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#define SPI_MODE_2 (SPI_LINE_CPOL | 0)
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#define SPI_MODE_3 (SPI_LINE_CPOL | SPI_LINE_CPHA)
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#define SPI_MODE_MASK (SPI_LINE_CPHA | SPI_LINE_CPOL | SPI_MSB)
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#define SPI_CS_HIGH (1 << 4)
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#define SPI_NO_CS (1 << 5)
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#define SPI_3WIRE (1 << 6)
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#define SPI_READY (1 << 7)
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struct PinDevIrq
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{
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int irq_mode;//< RISING/FALLING/HIGH/LOW
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@ -140,6 +164,15 @@ struct SerialDataCfg
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enum ExtSerialPortConfigure port_configure;
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};
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struct SpiMasterParam
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{
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uint8 spi_work_mode;//CPOL CPHA
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uint8 spi_frame_format;//frame format
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uint8 spi_data_bit_width;//bit width
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uint8 spi_data_endian;//little endian:0,big endian:1
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uint32 spi_maxfrequency;//work frequency
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};
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enum IoctlDriverType
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{
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SERIAL_TYPE = 0,
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