OpenXX/xiuos
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4 Commits

Author SHA1 Message Date
TXuian cb4a9d03e0 fit musl for riscv64 boards. 2022-07-27 05:35:56 -07:00
Liu_Weichao 80e08450fe fix compile error include watchdog and uart configure error 2022-06-08 11:09:50 +08:00
Liu_Weichao 808f00ade1 feat add sem obtain wait_time and modify e220 lora receive len operation 2022-04-26 17:57:32 +08:00
Liu_Weichao 5078ff66cc feat modify XiUOS_Kernel dir from Ubiquitous/XiUOS to Ubiquitous/XiZi 2022-03-01 14:15:01 +08:00