Add camera driver and examples for edu-riscv64 from Wu_zheng
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This commit is contained in:
@@ -47,6 +47,7 @@ Modification:
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#include "connect_uart.h"
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#include "connect_w5500.h"
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#include "connect_wdt.h"
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#include "connect_dvp.h"
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#include "dmac.h"
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#include "encoding.h"
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#include "fpioa.h"
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@@ -217,7 +218,10 @@ struct InitSequenceDesc _board_init[] = {
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#ifdef BSP_USING_W5500
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{"w5500", HwWiznetInit},
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#endif
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{" NONE ", NONE},
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#ifdef BSP_USING_CAMERA
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{"hw_camera", HwDvpInit },
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#endif
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{ " NONE ",NONE },
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};
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void InitBoardHardware(void) {
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@@ -120,3 +120,12 @@ menuconfig BSP_USING_WIZCHIP
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if BSP_USING_WIZCHIP
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source "$BSP_DIR/third_party_driver/ethernet/Kconfig"
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endif
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menuconfig BSP_USING_CAMERA
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bool "Using camera device"
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default y
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select RESOURCES_CAMERA
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if BSP_USING_CAMERA
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source "$BSP_DIR/third_party_driver/dvp/Kconfig"
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endif
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@@ -59,5 +59,9 @@ endif
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ifeq ($(CONFIG_BSP_USING_WIZCHIP),y)
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SRC_DIR += ethernet
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endif
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ifeq ($(CONFIG_BSP_USING_CAMERA),y)
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SRC_DIR += dvp
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endif
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include $(KERNEL_ROOT)/compiler.mk
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@@ -0,0 +1,46 @@
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if BSP_USING_CAMERA
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config DVP_XCLK_RATE
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int "Camera interface clk rate"
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default 24000000
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config IMAGE_WIDTH
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int "Camera photo width"
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default 320
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config IMAGE_HEIGHT
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int "Camera photo height"
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default 240
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config DVP_BURST_ENABLE
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bool "brust mode enable"
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default y
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config DVP_AUTO_ENABLE
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bool "auto recv image mode enable"
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default n
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config DVP_AI_OUTPUT
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bool "ai output enable"
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default n
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config DVP_INTERRUPT_ENABLE
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bool "interrupt enable"
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default y
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config CAMERA_BUS_NAME
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string "camera bus name"
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default "camera"
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config CAMERA_DRV_NAME
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string "camera driver name"
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default "camera_drv"
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config CAMERA_DEVICE_NAME
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string "camera device name"
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default "camera_dev"
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choice
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prompt "set camera framesize and fps"
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default SVGA_25FPS_MODE
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config UXGA_15FPS_MODE
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bool "using uxga in 15fps"
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config SVGA_25FPS_MODE
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bool "using svag in 25fps"
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endchoice
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endif
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@@ -0,0 +1,4 @@
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SRC_FILES := connect_dvp.c dvp.c ov2640.c
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include $(KERNEL_ROOT)/compiler.mk
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@@ -0,0 +1,243 @@
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#include <connect_dvp.h>
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#include <dvp.h>
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#include <board.h>
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#include "sysctl.h"
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#include "bsp.h"
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#include "plic.h"
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#include <ov2640.h>
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#define REG_SCCB_READ 0x12U
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#define REG_SCCB_WRITE 0x13U
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#define SCCB_REG_LENGTH 0x08U
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// irq interrupt function
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static int on_irq_dvp(int irq, void *arg)
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{
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if (dvp_get_interrupt(DVP_STS_FRAME_FINISH))
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{
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dvp_clear_interrupt(DVP_STS_FRAME_FINISH);
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}
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else
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{
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dvp_start_convert();
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dvp_clear_interrupt(DVP_STS_FRAME_START);
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}
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return 0;
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}
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struct DvpRegConfigureInfo
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{
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uint8_t device_addr;
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uint16_t reg_addr;
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uint8_t reg_value;
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};
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static struct CameraCfg sensor_config = {
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.output_h = IMAGE_HEIGHT,//will be resize from window below in ov2640
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.output_w = IMAGE_WIDTH,
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.window_h = 600, //register configure in ov2640.h
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.window_w = 800, //to make window as large as cmos selected size
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.window_xoffset = 0,
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.window_yoffset = 0,
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.gain_manu_enable = 0,
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.gain = 0x00
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};
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static uint32 DvpDrvInit(void)
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{
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x_err_t ret = EOK;
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dvp_init(SCCB_REG_LENGTH);
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dvp_set_xclk_rate(DVP_XCLK_RATE);
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dvp_set_image_format(DVP_CFG_RGB_FORMAT);
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dvp_set_image_size(IMAGE_WIDTH, IMAGE_HEIGHT);
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dvp_set_output_enable(DVP_OUTPUT_DISPLAY, 0);
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dvp_set_output_enable(DVP_OUTPUT_AI, 0);
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ov2640_init();
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SensorConfigure(&sensor_config);
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sysctl_set_spi0_dvp_data(1);
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#ifdef DVP_BURST_ENABLE
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dvp_enable_burst();
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#endif
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#ifdef DVP_AUTO_ENABLE
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dvp_disable_auto();
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#endif
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#ifdef DVP_AI_OUTPUT
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dvp_set_output_enable(DVP_OUTPUT_AI, 1);
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dvp_set_ai_addr((uint32_t)DVP_AI_RED_ADRESS, (uint32_t)DVP_AI_GREEN_ADRESS, (uint32_t)DVP_AI_BLUE_ADRESS);
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#endif
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#ifdef DVP_INTERRUPT_ENABLE
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dvp_config_interrupt(DVP_CFG_START_INT_ENABLE | DVP_CFG_FINISH_INT_ENABLE, 0);
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isrManager.done->registerIrq(IRQN_DVP_INTERRUPT, (IsrHandlerType)on_irq_dvp, NULL);
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isrManager.done->enableIrq(IRQN_DVP_INTERRUPT);
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dvp_clear_interrupt(DVP_STS_FRAME_START | DVP_STS_FRAME_FINISH);
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dvp_config_interrupt(DVP_CFG_START_INT_ENABLE | DVP_CFG_FINISH_INT_ENABLE, 1);
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KPrintf("camera interrupt has open!\n");
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#endif
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return ret;
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}
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static uint32 ReadDvpReg(void *drv, struct DvpRegConfigureInfo *reg_info)
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{
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x_err_t ret = EOK;
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reg_info->reg_value = dvp_sccb_receive_data(reg_info->device_addr, reg_info->reg_addr);
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return ret;
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}
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static uint32 WriteDvpReg(void *drv, struct DvpRegConfigureInfo *reg_info)
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{
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x_err_t ret = EOK;
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dvp_sccb_send_data(reg_info->device_addr, reg_info->reg_addr, reg_info->reg_value);
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return ret;
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}
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static uint32 DvpOpen(void *dev)
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{
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x_err_t ret = EOK;
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DvpDrvInit();
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return ret;
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}
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static uint32 DvpClose(void *dev)
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{
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x_err_t ret = EOK;
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dvp_config_interrupt(DVP_CFG_START_INT_ENABLE | DVP_CFG_FINISH_INT_ENABLE, 0);
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dvp_set_output_enable(DVP_OUTPUT_AI, 0);
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dvp_set_output_enable(DVP_OUTPUT_DISPLAY, 0);
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return ret;
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}
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static uint32 DvpRead(void *dev, struct BusBlockReadParam *read_param)
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{
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x_err_t ret = EOK;
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// change the output buff address by read
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dvp_set_output_enable(DVP_OUTPUT_DISPLAY, 0);
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dvp_set_display_addr((uintptr_t)read_param->buffer);
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dvp_set_output_enable(DVP_OUTPUT_DISPLAY, 1);
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return ret;
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}
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static uint32 DvpDrvConfigure(void *drv, struct BusConfigureInfo *args)
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{
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x_err_t ret = EOK;
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int cmd_type = args->configure_cmd;
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struct CameraCfg* tmp_cfg;
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switch (cmd_type)
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{
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case OPE_INT:
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break;
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case OPE_CFG:
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tmp_cfg = (struct CameraCfg *)args->private_data;
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SensorConfigure(tmp_cfg);
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dvp_set_image_size(tmp_cfg->output_w, tmp_cfg->output_h);
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break;
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case REG_SCCB_READ:
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ReadDvpReg(drv, (struct DvpRegConfigureInfo *)args->private_data);
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break;
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case REG_SCCB_WRITE:
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//for ov2640,write reg 0x04 to Horizontal mirror or Vertical flip
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WriteDvpReg(drv, (struct DvpRegConfigureInfo *)args->private_data);
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break;
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default:
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break;
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}
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return ret;
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}
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/*manage the camera device operations*/
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static const struct CameraDevDone camera_dev_done =
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{
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.dev_open = DvpOpen,
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.dev_close = DvpClose,
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.dev_write = NONE,
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.dev_read = DvpRead,
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};
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/*Init camera bus*/
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static int BoardCameraBusInit(struct CameraBus *camera_bus, struct CameraDriver *camera_driver)
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{
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x_err_t ret = EOK;
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/*Init the camera bus */
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camera_bus->private_data = (void *)&camera_dev_done;
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ret = CameraBusInit(camera_bus, CAMERA_BUS_NAME);
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if (EOK != ret)
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{
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KPrintf("board_camera_init CameraBusInit error %d\n", ret);
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return ERROR;
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}
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/*Init the camera driver*/
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camera_driver->private_data = (void *)&camera_dev_done;
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ret = CameraDriverInit(camera_driver, CAMERA_DRV_NAME);
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if (EOK != ret)
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{
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KPrintf("board_camera_init CameraDriverInit error %d\n", ret);
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return ERROR;
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}
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/*Attach the camera driver to the camera bus*/
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ret = CameraDriverAttachToBus(CAMERA_DRV_NAME, CAMERA_BUS_NAME);
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if (EOK != ret)
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{
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KPrintf("board_camera_init CameraDriverAttachToBus error %d\n", ret);
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return ERROR;
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}
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return ret;
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}
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/*Attach the camera device to the camera bus*/
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static int BoardCameraDevBend(void)
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{
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x_err_t ret = EOK;
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static struct CameraHardwareDevice camera_device;
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memset(&camera_device, 0, sizeof(struct CameraHardwareDevice));
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camera_device.camera_dev_done = &camera_dev_done;
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ret = CameraDeviceRegister(&camera_device, NONE, CAMERA_DEVICE_NAME);
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if (EOK != ret)
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{
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KPrintf("board_camera_init CameraDeviceInit device %s error %d\n", CAMERA_DEVICE_NAME, ret);
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return ERROR;
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}
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ret = CameraDeviceAttachToBus(CAMERA_DEVICE_NAME, CAMERA_BUS_NAME);
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if (EOK != ret)
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{
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KPrintf("board_camera_init CameraDeviceAttachToBus device %s error %d\n", CAMERA_DEVICE_NAME, ret);
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return ERROR;
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}
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return ret;
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}
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int HwDvpInit(void)
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{
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x_err_t ret = EOK;
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static struct CameraBus camera_bus;
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memset(&camera_bus, 0, sizeof(struct CameraBus));
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static struct CameraDriver camera_driver;
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memset(&camera_driver, 0, sizeof(struct CameraDriver));
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camera_driver.configure = DvpDrvConfigure;
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ret = BoardCameraBusInit(&camera_bus, &camera_driver);
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if (EOK != ret)
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{
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KPrintf("board_camera_Init error ret %u\n", ret);
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return ERROR;
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}
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ret = BoardCameraDevBend();
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if (EOK != ret)
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{
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KPrintf("board_camera_Init error ret %u\n", ret);
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return ERROR;
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}
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return ret;
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}
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@@ -0,0 +1,288 @@
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/* Copyright 2018 Canaan Inc.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include <stddef.h>
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#include <stdint.h>
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#include "dvp.h"
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#include "utils.h"
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#include "fpioa.h"
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#include "sysctl.h"
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#include <math.h>
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#include <sleep.h>
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volatile dvp_t* const dvp = (volatile dvp_t*)DVP_BASE_ADDR;
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static uint8_t g_sccb_reg_len = 8;
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static void dvp_sccb_clk_init(void)
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{
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uint32_t tmp;
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tmp = dvp->sccb_cfg & (~(DVP_SCCB_SCL_LCNT_MASK | DVP_SCCB_SCL_HCNT_MASK));
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tmp |= DVP_SCCB_SCL_LCNT(255) | DVP_SCCB_SCL_HCNT(255);
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dvp->sccb_cfg = tmp;
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}
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uint32_t dvp_sccb_set_clk_rate(uint32_t clk_rate)
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{
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uint32_t tmp;
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uint32_t v_sccb_freq = SysctlClockGetFreq(SYSCTL_CLOCK_APB1);
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uint16_t v_period_clk_cnt = round(v_sccb_freq / clk_rate / 2.0);
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if(v_period_clk_cnt > 255)
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{
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return 0;
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}
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tmp = dvp->sccb_cfg & (~(DVP_SCCB_SCL_LCNT_MASK | DVP_SCCB_SCL_HCNT_MASK));
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tmp |= DVP_SCCB_SCL_LCNT(v_period_clk_cnt) | DVP_SCCB_SCL_HCNT(v_period_clk_cnt);
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dvp->sccb_cfg = tmp;
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return SysctlClockGetFreq(SYSCTL_CLOCK_DVP) / (v_period_clk_cnt * 2);
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}
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static void dvp_sccb_start_transfer(void)
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{
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while (dvp->sts & DVP_STS_SCCB_EN)
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;
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dvp->sts = DVP_STS_SCCB_EN | DVP_STS_SCCB_EN_WE;
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while (dvp->sts & DVP_STS_SCCB_EN)
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;
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}
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void dvp_sccb_send_data(uint8_t dev_addr, uint16_t reg_addr, uint8_t reg_data)
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{
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uint32_t tmp;
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tmp = dvp->sccb_cfg & (~DVP_SCCB_BYTE_NUM_MASK);
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(g_sccb_reg_len == 8) ? (tmp |= DVP_SCCB_BYTE_NUM_3) : (tmp |= DVP_SCCB_BYTE_NUM_4);
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dvp->sccb_cfg = tmp;
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if (g_sccb_reg_len == 8)
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{
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dvp->sccb_ctl = DVP_SCCB_WRITE_DATA_ENABLE | DVP_SCCB_DEVICE_ADDRESS(dev_addr) | DVP_SCCB_REG_ADDRESS(reg_addr) | DVP_SCCB_WDATA_BYTE0(reg_data);
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}
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else
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{
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dvp->sccb_ctl = DVP_SCCB_WRITE_DATA_ENABLE | DVP_SCCB_DEVICE_ADDRESS(dev_addr) | DVP_SCCB_REG_ADDRESS(reg_addr >> 8) | DVP_SCCB_WDATA_BYTE0(reg_addr & 0xff) | DVP_SCCB_WDATA_BYTE1(reg_data);
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}
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dvp_sccb_start_transfer();
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}
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uint8_t dvp_sccb_receive_data(uint8_t dev_addr, uint16_t reg_addr)
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{
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uint32_t tmp;
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tmp = dvp->sccb_cfg & (~DVP_SCCB_BYTE_NUM_MASK);
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if (g_sccb_reg_len == 8)
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tmp |= DVP_SCCB_BYTE_NUM_2;
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else
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tmp |= DVP_SCCB_BYTE_NUM_3;
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dvp->sccb_cfg = tmp;
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if (g_sccb_reg_len == 8)
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{
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dvp->sccb_ctl = DVP_SCCB_WRITE_DATA_ENABLE | DVP_SCCB_DEVICE_ADDRESS(dev_addr) | DVP_SCCB_REG_ADDRESS(reg_addr);
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}
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else
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{
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dvp->sccb_ctl = DVP_SCCB_WRITE_DATA_ENABLE | DVP_SCCB_DEVICE_ADDRESS(dev_addr) | DVP_SCCB_REG_ADDRESS(reg_addr >> 8) | DVP_SCCB_WDATA_BYTE0(reg_addr & 0xff);
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}
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dvp_sccb_start_transfer();
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dvp->sccb_ctl = DVP_SCCB_DEVICE_ADDRESS(dev_addr);
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dvp_sccb_start_transfer();
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return (uint8_t) DVP_SCCB_RDATA_BYTE(dvp->sccb_cfg);
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}
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static void dvp_reset(void)
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{
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/* First power down */
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dvp->cmos_cfg |= DVP_CMOS_POWER_DOWN;
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msleep(200);
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dvp->cmos_cfg &= ~DVP_CMOS_POWER_DOWN;
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msleep(200);
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||||
/* Second reset */
|
||||
dvp->cmos_cfg &= ~DVP_CMOS_RESET;
|
||||
msleep(200);
|
||||
dvp->cmos_cfg |= DVP_CMOS_RESET;
|
||||
msleep(200);
|
||||
}
|
||||
|
||||
void dvp_init(uint8_t reg_len)
|
||||
{
|
||||
g_sccb_reg_len = reg_len;
|
||||
sysctl_clock_enable(SYSCTL_CLOCK_DVP);
|
||||
sysctl_reset(SYSCTL_RESET_DVP);
|
||||
dvp->cmos_cfg &= (~DVP_CMOS_CLK_DIV_MASK);
|
||||
dvp->cmos_cfg |= DVP_CMOS_CLK_DIV(3) | DVP_CMOS_CLK_ENABLE;
|
||||
dvp_sccb_clk_init();
|
||||
dvp_reset();
|
||||
}
|
||||
|
||||
uint32_t dvp_set_xclk_rate(uint32_t xclk_rate)
|
||||
{
|
||||
uint32_t v_apb1_clk = SysctlClockGetFreq(SYSCTL_CLOCK_APB1);
|
||||
uint32_t v_period;
|
||||
if(v_apb1_clk > xclk_rate * 2)
|
||||
v_period = round(v_apb1_clk / (xclk_rate * 2.0)) - 1;
|
||||
else
|
||||
v_period = 0;
|
||||
if(v_period > 255)
|
||||
v_period = 255;
|
||||
dvp->cmos_cfg &= (~DVP_CMOS_CLK_DIV_MASK);
|
||||
dvp->cmos_cfg |= DVP_CMOS_CLK_DIV(v_period) | DVP_CMOS_CLK_ENABLE;
|
||||
dvp_reset();
|
||||
return v_apb1_clk / ((v_period + 1) * 2);
|
||||
}
|
||||
|
||||
void dvp_set_image_format(uint32_t format)
|
||||
{
|
||||
uint32_t tmp;
|
||||
|
||||
tmp = dvp->dvp_cfg & (~DVP_CFG_FORMAT_MASK);
|
||||
dvp->dvp_cfg = tmp | format;
|
||||
}
|
||||
|
||||
void dvp_enable_burst(void)
|
||||
{
|
||||
dvp->dvp_cfg |= DVP_CFG_BURST_SIZE_4BEATS;
|
||||
|
||||
dvp->axi &= (~DVP_AXI_GM_MLEN_MASK);
|
||||
dvp->axi |= DVP_AXI_GM_MLEN_4BYTE;
|
||||
}
|
||||
|
||||
void dvp_disable_burst(void)
|
||||
{
|
||||
dvp->dvp_cfg &= (~DVP_CFG_BURST_SIZE_4BEATS);
|
||||
|
||||
dvp->axi &= (~DVP_AXI_GM_MLEN_MASK);
|
||||
dvp->axi |= DVP_AXI_GM_MLEN_1BYTE;
|
||||
}
|
||||
|
||||
void dvp_set_image_size(uint32_t width, uint32_t height)
|
||||
{
|
||||
uint32_t tmp;
|
||||
|
||||
tmp = dvp->dvp_cfg & (~(DVP_CFG_HREF_BURST_NUM_MASK | DVP_CFG_LINE_NUM_MASK));
|
||||
|
||||
tmp |= DVP_CFG_LINE_NUM(height);
|
||||
|
||||
if (dvp->dvp_cfg & DVP_CFG_BURST_SIZE_4BEATS)
|
||||
tmp |= DVP_CFG_HREF_BURST_NUM(width / 8 / 4);
|
||||
else
|
||||
tmp |= DVP_CFG_HREF_BURST_NUM(width / 8 / 1);
|
||||
|
||||
dvp->dvp_cfg = tmp;
|
||||
}
|
||||
|
||||
void dvp_set_ai_addr(uint32_t r_addr, uint32_t g_addr, uint32_t b_addr)
|
||||
{
|
||||
dvp->r_addr = r_addr;
|
||||
dvp->g_addr = g_addr;
|
||||
dvp->b_addr = b_addr;
|
||||
}
|
||||
|
||||
void dvp_set_display_addr(uint32_t addr)
|
||||
{
|
||||
dvp->rgb_addr = addr;
|
||||
}
|
||||
|
||||
void dvp_start_frame(void)
|
||||
{
|
||||
while (!(dvp->sts & DVP_STS_FRAME_START))
|
||||
;
|
||||
dvp->sts = (DVP_STS_FRAME_START | DVP_STS_FRAME_START_WE);
|
||||
}
|
||||
|
||||
void dvp_start_convert(void)
|
||||
{
|
||||
dvp->sts = DVP_STS_DVP_EN | DVP_STS_DVP_EN_WE;
|
||||
}
|
||||
|
||||
void dvp_finish_convert(void)
|
||||
{
|
||||
while (!(dvp->sts & DVP_STS_FRAME_FINISH))
|
||||
;
|
||||
dvp->sts = DVP_STS_FRAME_FINISH | DVP_STS_FRAME_FINISH_WE;
|
||||
}
|
||||
|
||||
void dvp_get_image(void)
|
||||
{
|
||||
while (!(dvp->sts & DVP_STS_FRAME_START))
|
||||
;
|
||||
dvp->sts = DVP_STS_FRAME_START | DVP_STS_FRAME_START_WE;
|
||||
while (!(dvp->sts & DVP_STS_FRAME_START))
|
||||
;
|
||||
dvp->sts = DVP_STS_FRAME_FINISH | DVP_STS_FRAME_FINISH_WE | DVP_STS_FRAME_START | DVP_STS_FRAME_START_WE | DVP_STS_DVP_EN | DVP_STS_DVP_EN_WE;
|
||||
while (!(dvp->sts & DVP_STS_FRAME_FINISH))
|
||||
;
|
||||
}
|
||||
|
||||
void dvp_config_interrupt(uint32_t interrupt, uint8_t enable)
|
||||
{
|
||||
if (enable)
|
||||
dvp->dvp_cfg |= interrupt;
|
||||
else
|
||||
dvp->dvp_cfg &= (~interrupt);
|
||||
}
|
||||
|
||||
int dvp_get_interrupt(uint32_t interrupt)
|
||||
{
|
||||
if (dvp->sts & interrupt)
|
||||
return 1;
|
||||
return 0;
|
||||
}
|
||||
|
||||
void dvp_clear_interrupt(uint32_t interrupt)
|
||||
{
|
||||
interrupt |= (interrupt << 1);
|
||||
dvp->sts |= interrupt;
|
||||
}
|
||||
|
||||
void dvp_enable_auto(void)
|
||||
{
|
||||
dvp->dvp_cfg |= DVP_CFG_AUTO_ENABLE;
|
||||
}
|
||||
|
||||
void dvp_disable_auto(void)
|
||||
{
|
||||
dvp->dvp_cfg &= (~DVP_CFG_AUTO_ENABLE);
|
||||
}
|
||||
|
||||
void dvp_set_output_enable(dvp_output_mode_t index, int enable)
|
||||
{
|
||||
configASSERT(index < 2);
|
||||
|
||||
if (index == 0)
|
||||
{
|
||||
if (enable)
|
||||
dvp->dvp_cfg |= DVP_CFG_AI_OUTPUT_ENABLE;
|
||||
else
|
||||
dvp->dvp_cfg &= ~DVP_CFG_AI_OUTPUT_ENABLE;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (enable)
|
||||
dvp->dvp_cfg |= DVP_CFG_DISPLAY_OUTPUT_ENABLE;
|
||||
else
|
||||
dvp->dvp_cfg &= ~DVP_CFG_DISPLAY_OUTPUT_ENABLE;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -0,0 +1,463 @@
|
||||
/* Copyright 2018 Canaan Inc.
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include <stdio.h>
|
||||
#include "ov2640.h"
|
||||
#include "dvp.h"
|
||||
#include "plic.h"
|
||||
#include "board.h"
|
||||
|
||||
#if defined SVGA_25FPS_MODE
|
||||
const uint8_t ov2640_config[][2]=
|
||||
{
|
||||
{0xff, 0x01},
|
||||
{0x12, 0x80},
|
||||
{0xff, 0x00},
|
||||
{0x2c, 0xff},
|
||||
{0x2e, 0xdf},
|
||||
{0xff, 0x01},
|
||||
{0x3c, 0x32},
|
||||
{0x11, 0x00},
|
||||
{0x09, 0x02},
|
||||
{0x04, 0x28},
|
||||
{0x13, 0xe5},
|
||||
{0x14, 0x48},
|
||||
{0x2c, 0x0c},
|
||||
{0x33, 0x78},
|
||||
{0x3a, 0x33},
|
||||
{0x3b, 0xfb},
|
||||
{0x3e, 0x00},
|
||||
{0x43, 0x11},
|
||||
{0x16, 0x10},
|
||||
{0x39, 0x92},
|
||||
{0x35, 0xda},
|
||||
{0x22, 0x1a},
|
||||
{0x37, 0xc3},
|
||||
{0x23, 0x00},
|
||||
{0x34, 0xc0},
|
||||
{0x36, 0x1a},
|
||||
{0x06, 0x88},
|
||||
{0x07, 0xc0},
|
||||
{0x0d, 0x87},
|
||||
{0x0e, 0x41},
|
||||
{0x4c, 0x00},
|
||||
{0x48, 0x00},
|
||||
{0x5b, 0x00},
|
||||
{0x42, 0x03},
|
||||
{0x4a, 0x81},
|
||||
{0x21, 0x99},
|
||||
{0x24, 0x40},
|
||||
{0x25, 0x38},
|
||||
{0x26, 0x82},
|
||||
{0x5c, 0x00},
|
||||
{0x63, 0x00},
|
||||
{0x46, 0x22},
|
||||
{0x0c, 0x3c},
|
||||
{0x61, 0x70},
|
||||
{0x62, 0x80},
|
||||
{0x7c, 0x05},
|
||||
{0x20, 0x80},
|
||||
{0x28, 0x30},
|
||||
{0x6c, 0x00},
|
||||
{0x6d, 0x80},
|
||||
{0x6e, 0x00},
|
||||
{0x70, 0x02},
|
||||
{0x71, 0x94},
|
||||
{0x73, 0xc1},
|
||||
{0x3d, 0x34},
|
||||
{0x5a, 0x57},
|
||||
{0x12, 0x40},
|
||||
{0x17, 0x11},
|
||||
{0x18, 0x43},
|
||||
{0x19, 0x00},
|
||||
{0x1a, 0x97},
|
||||
{0x32, 0x09},
|
||||
{0x37, 0xc0},
|
||||
{0x4f, 0xca},
|
||||
{0x50, 0xa8},
|
||||
{0x5a, 0x23},
|
||||
{0x6d, 0x00},
|
||||
{0x3d, 0x38},
|
||||
{0xff, 0x00},
|
||||
{0xe5, 0x7f},
|
||||
{0xf9, 0xc0},
|
||||
{0x41, 0x24},
|
||||
{0xe0, 0x14},
|
||||
{0x76, 0xff},
|
||||
{0x33, 0xa0},
|
||||
{0x42, 0x20},
|
||||
{0x43, 0x18},
|
||||
{0x4c, 0x00},
|
||||
{0x87, 0xd5},
|
||||
{0x88, 0x3f},
|
||||
{0xd7, 0x03},
|
||||
{0xd9, 0x10},
|
||||
{0xd3, 0x82},
|
||||
{0xc8, 0x08},
|
||||
{0xc9, 0x80},
|
||||
{0x7c, 0x00},
|
||||
{0x7d, 0x00},
|
||||
{0x7c, 0x03},
|
||||
{0x7d, 0x48},
|
||||
{0x7d, 0x48},
|
||||
{0x7c, 0x08},
|
||||
{0x7d, 0x20},
|
||||
{0x7d, 0x10},
|
||||
{0x7d, 0x0e},
|
||||
{0x90, 0x00},
|
||||
{0x91, 0x0e},
|
||||
{0x91, 0x1a},
|
||||
{0x91, 0x31},
|
||||
{0x91, 0x5a},
|
||||
{0x91, 0x69},
|
||||
{0x91, 0x75},
|
||||
{0x91, 0x7e},
|
||||
{0x91, 0x88},
|
||||
{0x91, 0x8f},
|
||||
{0x91, 0x96},
|
||||
{0x91, 0xa3},
|
||||
{0x91, 0xaf},
|
||||
{0x91, 0xc4},
|
||||
{0x91, 0xd7},
|
||||
{0x91, 0xe8},
|
||||
{0x91, 0x20},
|
||||
{0x92, 0x00},
|
||||
{0x93, 0x06},
|
||||
{0x93, 0xe3},
|
||||
{0x93, 0x05},
|
||||
{0x93, 0x05},
|
||||
{0x93, 0x00},
|
||||
{0x93, 0x04},
|
||||
{0x93, 0x00},
|
||||
{0x93, 0x00},
|
||||
{0x93, 0x00},
|
||||
{0x93, 0x00},
|
||||
{0x93, 0x00},
|
||||
{0x93, 0x00},
|
||||
{0x93, 0x00},
|
||||
{0x96, 0x00},
|
||||
{0x97, 0x08},
|
||||
{0x97, 0x19},
|
||||
{0x97, 0x02},
|
||||
{0x97, 0x0c},
|
||||
{0x97, 0x24},
|
||||
{0x97, 0x30},
|
||||
{0x97, 0x28},
|
||||
{0x97, 0x26},
|
||||
{0x97, 0x02},
|
||||
{0x97, 0x98},
|
||||
{0x97, 0x80},
|
||||
{0x97, 0x00},
|
||||
{0x97, 0x00},
|
||||
{0xc3, 0xed},
|
||||
{0xa4, 0x00},
|
||||
{0xa8, 0x00},
|
||||
{0xc5, 0x11},
|
||||
{0xc6, 0x51},
|
||||
{0xbf, 0x80},
|
||||
{0xc7, 0x10},
|
||||
{0xb6, 0x66},
|
||||
{0xb8, 0xa5},
|
||||
{0xb7, 0x64},
|
||||
{0xb9, 0x7c},
|
||||
{0xb3, 0xaf},
|
||||
{0xb4, 0x97},
|
||||
{0xb5, 0xff},
|
||||
{0xb0, 0xc5},
|
||||
{0xb1, 0x94},
|
||||
{0xb2, 0x0f},
|
||||
{0xc4, 0x5c},
|
||||
{0xc0, 0x64},
|
||||
{0xc1, 0x4b},
|
||||
{0x8c, 0x00},
|
||||
{0x86, 0x3d},
|
||||
{0x50, 0x00},
|
||||
{0x51, 0xc8},
|
||||
{0x52, 0x96},
|
||||
{0x53, 0x00},
|
||||
{0x54, 0x00},
|
||||
{0x55, 0x00},
|
||||
{0x5a, 0xc8},
|
||||
{0x5b, 0x96},
|
||||
{0x5c, 0x00},
|
||||
{0xd3, 0x02},
|
||||
{0xc3, 0xed},
|
||||
{0x7f, 0x00},
|
||||
{0xda, 0x08},
|
||||
{0xe5, 0x1f},
|
||||
{0xe1, 0x67},
|
||||
{0xe0, 0x00},
|
||||
{0xdd, 0x7f},
|
||||
{0x05, 0x00},
|
||||
{0xff, 0x00},
|
||||
{0xe0, 0x04},
|
||||
{0x5a, 0x50},
|
||||
{0x5b, 0x3c},
|
||||
{0x5c, 0x00},
|
||||
{0xe0, 0x00},
|
||||
{0x00, 0x00}
|
||||
};
|
||||
#elif defined UXGA_15FPS_MODE
|
||||
const uint8_t ov2640_config[][2]=
|
||||
{
|
||||
{0xFF, 0x00},
|
||||
{0x2C, 0xFF},
|
||||
{0x2E, 0xDF},
|
||||
{0xFF, 0x01},
|
||||
{0x3C, 0x32},
|
||||
{0x11, 0x00},
|
||||
{0x09, 0x02},
|
||||
{0x04, 0x28},
|
||||
{0x13, 0xE5},
|
||||
{0x14, 0x48},
|
||||
{0x2C, 0x0C},
|
||||
{0x33, 0x78},
|
||||
{0x3A, 0x33},
|
||||
{0x3B, 0xFB},
|
||||
{0x3E, 0x00},
|
||||
{0x43, 0x11},
|
||||
{0x16, 0x10},
|
||||
{0x39, 0x92},
|
||||
{0x35, 0xDA},
|
||||
{0x22, 0x1A},
|
||||
{0x37, 0xC3},
|
||||
{0x23, 0x00},
|
||||
{0x34, 0xC0},
|
||||
{0x36, 0x1A},
|
||||
{0x06, 0x88},
|
||||
{0x07, 0xC0},
|
||||
{0x0D, 0x87},
|
||||
{0x0E, 0x41},
|
||||
{0x4C, 0x00},
|
||||
{0x48, 0x00},
|
||||
{0x5B, 0x00},
|
||||
{0x42, 0x03},
|
||||
{0x4A, 0x81},
|
||||
{0x21, 0x99},
|
||||
{0x24, 0x40},
|
||||
{0x25, 0x38},
|
||||
{0x26, 0x82},
|
||||
{0x5C, 0x00},
|
||||
{0x63, 0x00},
|
||||
{0x46, 0x00},
|
||||
{0x0C, 0x3C},
|
||||
{0x61, 0x70},
|
||||
{0x62, 0x80},
|
||||
{0x7C, 0x05},
|
||||
{0x20, 0x80},
|
||||
{0x28, 0x30},
|
||||
{0x6C, 0x00},
|
||||
{0x6D, 0x80},
|
||||
{0x6E, 0x00},
|
||||
{0x70, 0x02},
|
||||
{0x71, 0x94},
|
||||
{0x73, 0xC1},
|
||||
{0x3D, 0x34},
|
||||
{0x5A, 0x57},
|
||||
{0x12, 0x00},
|
||||
{0x17, 0x11},
|
||||
{0x18, 0x75},
|
||||
{0x19, 0x01},
|
||||
{0x1A, 0x97},
|
||||
{0x32, 0x36},
|
||||
{0x03, 0x0F},
|
||||
{0x37, 0x40},
|
||||
{0x4F, 0xCA},
|
||||
{0x50, 0xA8},
|
||||
{0x5A, 0x23},
|
||||
{0x6D, 0x00},
|
||||
{0x6D, 0x38},
|
||||
{0xFF, 0x00},
|
||||
{0xE5, 0x7F},
|
||||
{0xF9, 0xC0},
|
||||
{0x41, 0x24},
|
||||
{0xE0, 0x14},
|
||||
{0x76, 0xFF},
|
||||
{0x33, 0xA0},
|
||||
{0x42, 0x20},
|
||||
{0x43, 0x18},
|
||||
{0x4C, 0x00},
|
||||
{0x87, 0xD5},
|
||||
{0x88, 0x3F},
|
||||
{0xD7, 0x03},
|
||||
{0xD9, 0x10},
|
||||
{0xD3, 0x82},
|
||||
{0xC8, 0x08},
|
||||
{0xC9, 0x80},
|
||||
{0x7C, 0x00},
|
||||
{0x7D, 0x00},
|
||||
{0x7C, 0x03},
|
||||
{0x7D, 0x48},
|
||||
{0x7D, 0x48},
|
||||
{0x7C, 0x08},
|
||||
{0x7D, 0x20},
|
||||
{0x7D, 0x10},
|
||||
{0x7D, 0x0E},
|
||||
{0x90, 0x00},
|
||||
{0x91, 0x0E},
|
||||
{0x91, 0x1A},
|
||||
{0x91, 0x31},
|
||||
{0x91, 0x5A},
|
||||
{0x91, 0x69},
|
||||
{0x91, 0x75},
|
||||
{0x91, 0x7E},
|
||||
{0x91, 0x88},
|
||||
{0x91, 0x8F},
|
||||
{0x91, 0x96},
|
||||
{0x91, 0xA3},
|
||||
{0x91, 0xAF},
|
||||
{0x91, 0xC4},
|
||||
{0x91, 0xD7},
|
||||
{0x91, 0xE8},
|
||||
{0x91, 0x20},
|
||||
{0x92, 0x00},
|
||||
{0x93, 0x06},
|
||||
{0x93, 0xE3},
|
||||
{0x93, 0x05},
|
||||
{0x93, 0x05},
|
||||
{0x93, 0x00},
|
||||
{0x93, 0x04},
|
||||
{0x93, 0x00},
|
||||
{0x93, 0x00},
|
||||
{0x93, 0x00},
|
||||
{0x93, 0x00},
|
||||
{0x93, 0x00},
|
||||
{0x93, 0x00},
|
||||
{0x93, 0x00},
|
||||
{0x96, 0x00},
|
||||
{0x97, 0x08},
|
||||
{0x97, 0x19},
|
||||
{0x97, 0x02},
|
||||
{0x97, 0x0C},
|
||||
{0x97, 0x24},
|
||||
{0x97, 0x30},
|
||||
{0x97, 0x28},
|
||||
{0x97, 0x26},
|
||||
{0x97, 0x02},
|
||||
{0x97, 0x98},
|
||||
{0x97, 0x80},
|
||||
{0x97, 0x00},
|
||||
{0x97, 0x00},
|
||||
{0xC3, 0xEF},
|
||||
{0xA4, 0x00},
|
||||
{0xA8, 0x00},
|
||||
{0xC5, 0x11},
|
||||
{0xC6, 0x51},
|
||||
{0xBF, 0x80},
|
||||
{0xC7, 0x10},
|
||||
{0xB6, 0x66},
|
||||
{0xB8, 0xA5},
|
||||
{0xB7, 0x64},
|
||||
{0xB9, 0x7C},
|
||||
{0xB3, 0xAF},
|
||||
{0xB4, 0x97},
|
||||
{0xB5, 0xFF},
|
||||
{0xB0, 0xC5},
|
||||
{0xB1, 0x94},
|
||||
{0xB2, 0x0F},
|
||||
{0xC4, 0x5C},
|
||||
{0xC0, 0xC8},
|
||||
{0xC1, 0x96},
|
||||
{0x8C, 0x00},
|
||||
{0x86, 0x3D},
|
||||
{0x50, 0x00},
|
||||
{0x51, 0x90},
|
||||
{0x52, 0x2C},
|
||||
{0x53, 0x00},
|
||||
{0x54, 0x00},
|
||||
{0x55, 0x88},
|
||||
{0x5A, 0x90},
|
||||
{0x5B, 0x2C},
|
||||
{0x5C, 0x05},
|
||||
{0xD3, 0x02},
|
||||
{0xC3, 0xED},
|
||||
{0x7F, 0x00},
|
||||
{0xDA, 0x08},
|
||||
{0xE5, 0x1F},
|
||||
{0xE1, 0x67},
|
||||
{0xE0, 0x00},
|
||||
{0xDD, 0x7F},
|
||||
{0x05, 0x00},
|
||||
{0xe0, 0x04},
|
||||
{0x5a, 0x50},
|
||||
{0x5b, 0x3c},
|
||||
{0x5c, 0x00},
|
||||
{0xe0, 0x00},
|
||||
{0x00, 0x00}
|
||||
};
|
||||
#else
|
||||
const uint8_t ov2640_config[][2]=
|
||||
{
|
||||
{0x00,x00}
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
int ov2640_init(void)
|
||||
{
|
||||
uint16_t v_manuf_id;
|
||||
uint16_t v_device_id;
|
||||
ov2640_read_id(&v_manuf_id, &v_device_id);
|
||||
printf("manuf_id:0x%04x,device_id:0x%04x\n", v_manuf_id, v_device_id);
|
||||
uint16_t index = 0;
|
||||
for (index = 0; ov2640_config[index][0]; index++)
|
||||
dvp_sccb_send_data(OV2640_ADDR, ov2640_config[index][0], ov2640_config[index][1]);
|
||||
return 0;
|
||||
}
|
||||
|
||||
int ov2640_read_id(uint16_t *manuf_id, uint16_t *device_id)
|
||||
{
|
||||
dvp_sccb_send_data(OV2640_ADDR, 0xFF, 0x01);
|
||||
*manuf_id = (dvp_sccb_receive_data(OV2640_ADDR, 0x1C) << 8) | dvp_sccb_receive_data(OV2640_ADDR, 0x1D);
|
||||
*device_id = (dvp_sccb_receive_data(OV2640_ADDR, 0x0A) << 8) | dvp_sccb_receive_data(OV2640_ADDR, 0x0B);
|
||||
return 0;
|
||||
}
|
||||
|
||||
int SensorConfigure(struct CameraCfg *cfg_info)
|
||||
{
|
||||
uint8_t reg_tmp;
|
||||
|
||||
//set reg mode to sensor
|
||||
dvp_sccb_send_data(OV2640_ADDR, 0xFF, 0x00);
|
||||
|
||||
//configure the window size and position
|
||||
dvp_sccb_send_data(OV2640_ADDR, 0x51, cfg_info->window_w>>2);
|
||||
dvp_sccb_send_data(OV2640_ADDR, 0x52, cfg_info->window_h>>2);
|
||||
dvp_sccb_send_data(OV2640_ADDR, 0x53, (uint8_t)(cfg_info->window_xoffset&0xFF));
|
||||
dvp_sccb_send_data(OV2640_ADDR, 0x54, (uint8_t)(cfg_info->window_yoffset&0xFF));
|
||||
dvp_sccb_send_data(OV2640_ADDR, 0x55, (((cfg_info->window_h/4)&0x100)>>1)+
|
||||
((cfg_info->window_yoffset&0x700)>>4)+
|
||||
(((cfg_info->window_w/4)&0x100)>>5)+
|
||||
((cfg_info->window_xoffset&0x700)>>8));
|
||||
dvp_sccb_send_data(OV2640_ADDR, 0x57, ((cfg_info->window_w/4)&0x200)>>2);
|
||||
dvp_sccb_send_data(OV2640_ADDR, 0x5A, cfg_info->output_w>>2);
|
||||
dvp_sccb_send_data(OV2640_ADDR, 0x5B, cfg_info->output_h>>2);
|
||||
|
||||
//set reg mode to dsp
|
||||
dvp_sccb_send_data(OV2640_ADDR, 0xFF, 0x01);
|
||||
|
||||
//configure dsp gain
|
||||
if(cfg_info->gain_manu_enable){
|
||||
reg_tmp = dvp_sccb_receive_data(OV2640_ADDR, 0x13);
|
||||
dvp_sccb_send_data(OV2640_ADDR, 0x13, reg_tmp&0xFB);
|
||||
dvp_sccb_send_data(OV2640_ADDR, 0x00, cfg_info->gain);
|
||||
}else{
|
||||
reg_tmp = dvp_sccb_receive_data(OV2640_ADDR, 0x13);
|
||||
dvp_sccb_send_data(OV2640_ADDR, 0x13, reg_tmp|0x04);
|
||||
}
|
||||
|
||||
|
||||
return 1;
|
||||
}
|
||||
@@ -72,31 +72,15 @@ static struct io_config
|
||||
IOCONFIG(BSP_UART2_RXD_PIN, FUNC_UART2_RX),
|
||||
#endif
|
||||
#ifdef BSP_USING_UART3
|
||||
IOCONFIG(BSP_UART3_TXD_PIN, FUNC_UART3_RX),
|
||||
IOCONFIG(BSP_UART3_RXD_PIN, FUNC_UART3_TX),
|
||||
IOCONFIG(BSP_UART3_TXD_PIN, FUNC_UART3_TX),
|
||||
IOCONFIG(BSP_UART3_RXD_PIN, FUNC_UART3_RX),
|
||||
#endif
|
||||
#ifdef BSP_USING_I2C
|
||||
IOCONFIG(BSP_I2C_SDA, FUNC_GPIO3),
|
||||
IOCONFIG(BSP_I2C_SCL, FUNC_GPIO4),
|
||||
#endif
|
||||
#ifdef BSP_USING_TOUCH
|
||||
// IOCONFIG(BSP_TOUCH_TP_INT, HS_GPIO(FPIOA_TOUCH_TP_INT)),
|
||||
IOCONFIG(BSP_TOUCH_TP_INT, HS_GPIO(FUNC_GPIOHS30)),
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_CH438
|
||||
IOCONFIG(BSP_CH438_ALE_PIN, HS_GPIO(FPIOA_CH438_ALE)),
|
||||
IOCONFIG(BSP_CH438_NWR_PIN, HS_GPIO(FPIOA_CH438_NWR)),
|
||||
IOCONFIG(BSP_CH438_NRD_PIN, HS_GPIO(FPIOA_CH438_NRD)),
|
||||
IOCONFIG(BSP_CH438_INT_PIN, HS_GPIO(FPIOA_CH438_INT)),
|
||||
IOCONFIG(BSP_CH438_D0_PIN, HS_GPIO(FPIOA_CH438_D0)),
|
||||
IOCONFIG(BSP_CH438_D1_PIN, HS_GPIO(FPIOA_CH438_D1)),
|
||||
IOCONFIG(BSP_CH438_D2_PIN, HS_GPIO(FPIOA_CH438_D2)),
|
||||
IOCONFIG(BSP_CH438_D3_PIN, HS_GPIO(FPIOA_CH438_D3)),
|
||||
IOCONFIG(BSP_CH438_D4_PIN, HS_GPIO(FPIOA_CH438_D4)),
|
||||
IOCONFIG(BSP_CH438_D5_PIN, HS_GPIO(FPIOA_CH438_D5)),
|
||||
IOCONFIG(BSP_CH438_D6_PIN, HS_GPIO(FPIOA_CH438_D6)),
|
||||
IOCONFIG(BSP_CH438_D7_PIN, HS_GPIO(FPIOA_CH438_D7)),
|
||||
IOCONFIG(BSP_TOUCH_TP_INT, HS_GPIO(FPIOA_TOUCH_TP_INT)),
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_SOFT_SPI
|
||||
@@ -106,6 +90,17 @@ static struct io_config
|
||||
IOCONFIG(BSP_SOFT_SPI_NCS_PIN, HS_GPIO(FPIOA_SOFT_SPI_NCS)),
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_CAMERA
|
||||
IOCONFIG(BSP_DVP_RST_PIN,FUNC_CMOS_RST),
|
||||
IOCONFIG(BSP_DVP_PWDN_PIN, FUNC_CMOS_PWDN),
|
||||
IOCONFIG(BSP_DVP_XCLK_PIN,FUNC_CMOS_XCLK),
|
||||
IOCONFIG(BSP_DVP_PCLK_PIN,FUNC_CMOS_PCLK),
|
||||
IOCONFIG(BSP_DVP_HSYNC_PIN,FUNC_CMOS_HREF),
|
||||
IOCONFIG(BSP_DVP_VSYNC_PIN,FUNC_CMOS_VSYNC),
|
||||
IOCONFIG(BSP_DVP_SCL_PIN,FUNC_SCCB_SCLK),
|
||||
IOCONFIG(BSP_DVP_SDA_PIN,FUNC_SCCB_SDA),
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_LORA
|
||||
IOCONFIG(BSP_E220_M0_PIN, HS_GPIO(FUNC_GPIOHS10)),
|
||||
IOCONFIG(BSP_E220_M1_PIN, HS_GPIO(FUNC_GPIOHS11)),
|
||||
@@ -159,6 +154,11 @@ int IoConfigInit(void)
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK3, SYSCTL_POWER_V33);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_CAMERA
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK7,SYSCTL_POWER_V18);
|
||||
// sysctl_set_power_mode(SYSCTL_POWER_BANK7,SYSCTL_POWER_V18);
|
||||
#endif
|
||||
|
||||
for(i = 0; i < count; i++)
|
||||
{
|
||||
ret = FpioaSetFunction(io_config[i].io_num, io_config[i].func);
|
||||
|
||||
@@ -0,0 +1,34 @@
|
||||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file connect_dvp.h
|
||||
* @brief define edu-riscv64-board DVP init function
|
||||
* @version 2.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2022-11-21
|
||||
*/
|
||||
#ifndef CONNECT_DVP_H
|
||||
#define CONNECT_DVP_H
|
||||
#include <device.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
int HwDvpInit(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -64,6 +64,10 @@ typedef enum _touch_event
|
||||
#define GTP_REG_CONFIG_DATA 0x8047
|
||||
#define GTP_REG_VERSION 0x8140
|
||||
|
||||
#define LCD_SIZE 320
|
||||
#define TOUCH_WIDTH 1000
|
||||
#define TOUCH_HEIGHT 660
|
||||
|
||||
#define CFG_GROUP_LEN(p_cfg_grp) (sizeof(p_cfg_grp) / sizeof(p_cfg_grp[0]))
|
||||
|
||||
int HwTouchInit(void);
|
||||
|
||||
@@ -30,7 +30,7 @@ Modification: add edu-riscv64-board io configure define
|
||||
#ifndef __DRV_IO_CONFIG_H__
|
||||
#define __DRV_IO_CONFIG_H__
|
||||
|
||||
<<<<<<< HEAD enum HS_GPIO_CONFIG {
|
||||
enum HS_GPIO_CONFIG {
|
||||
#ifdef BSP_USING_LCD
|
||||
LCD_DC_PIN = 0, /* LCD DC PIN */
|
||||
#endif
|
||||
@@ -53,99 +53,35 @@ Modification: add edu-riscv64-board io configure define
|
||||
}
|
||||
;
|
||||
|
||||
#ifdef BSP_USING_CH438
|
||||
#define FPIOA_CH438_ALE 12
|
||||
#define FPIOA_CH438_NWR 13
|
||||
#define FPIOA_CH438_NRD 14
|
||||
#define FPIOA_CH438_D0 15
|
||||
#define FPIOA_CH438_D1 16
|
||||
#define FPIOA_CH438_D2 17
|
||||
#define FPIOA_CH438_D3 18
|
||||
#define FPIOA_CH438_D4 19
|
||||
#define FPIOA_CH438_D5 20
|
||||
#define FPIOA_CH438_D6 21
|
||||
#define FPIOA_CH438_D7 22
|
||||
#define FPIOA_CH438_INT 23
|
||||
|
||||
#define BSP_CH438_ALE_PIN 24
|
||||
#define BSP_CH438_NWR_PIN 25
|
||||
#define BSP_CH438_NRD_PIN 26
|
||||
#define BSP_CH438_D0_PIN 27
|
||||
#define BSP_CH438_D1_PIN 28
|
||||
#define BSP_CH438_D2_PIN 29
|
||||
#define BSP_CH438_D3_PIN 30
|
||||
#define BSP_CH438_D4_PIN 31
|
||||
#define BSP_CH438_D5_PIN 32
|
||||
#define BSP_CH438_D6_PIN 33
|
||||
#define BSP_CH438_D7_PIN 34
|
||||
#define BSP_CH438_INT_PIN 35
|
||||
#ifdef BSP_USING_SOFT_SPI
|
||||
#define FPIOA_SOFT_SPI_SCK 26
|
||||
#define FPIOA_SOFT_SPI_MIOS 25
|
||||
#define FPIOA_SOFT_SPI_MSOI 27
|
||||
#define FPIOA_SOFT_SPI_NCS 28
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef BSP_USING_SOFT_SPI
|
||||
#define FPIOA_SOFT_SPI_SCK 26
|
||||
#define FPIOA_SOFT_SPI_MIOS 25
|
||||
#define FPIOA_SOFT_SPI_MSOI 27
|
||||
#define FPIOA_SOFT_SPI_NCS 28
|
||||
======= enum HS_GPIO_CONFIG {
|
||||
#ifdef BSP_USING_LCD
|
||||
LCD_DC_PIN = 0, /* LCD DC PIN */
|
||||
#endif
|
||||
#ifdef BSP_SPI1_USING_SS0
|
||||
SPI1_CS0_PIN,
|
||||
#endif
|
||||
#ifdef BSP_SPI1_USING_SS1
|
||||
SPI1_CS1_PIN,
|
||||
#endif
|
||||
#ifdef BSP_SPI1_USING_SS2
|
||||
SPI1_CS2_PIN,
|
||||
#endif
|
||||
#ifdef BSP_SPI1_USING_SS3
|
||||
SPI1_CS3_PIN,
|
||||
#endif
|
||||
GPIO_ALLOC_START /* index of gpio driver start */
|
||||
}
|
||||
;
|
||||
|
||||
#ifdef BSP_USING_CH438
|
||||
#define FPIOA_CH438_ALE 12
|
||||
#define FPIOA_CH438_NWR 13
|
||||
#define FPIOA_CH438_NRD 14
|
||||
#define FPIOA_CH438_D0 15
|
||||
#define FPIOA_CH438_D1 16
|
||||
#define FPIOA_CH438_D2 17
|
||||
#define FPIOA_CH438_D3 18
|
||||
#define FPIOA_CH438_D4 19
|
||||
#define FPIOA_CH438_D5 20
|
||||
#define FPIOA_CH438_D6 21
|
||||
#define FPIOA_CH438_D7 22
|
||||
#define FPIOA_CH438_INT 23
|
||||
|
||||
#define BSP_CH438_ALE_PIN 24
|
||||
#define BSP_CH438_NWR_PIN 25
|
||||
#define BSP_CH438_NRD_PIN 26
|
||||
#define BSP_CH438_D0_PIN 27
|
||||
#define BSP_CH438_D1_PIN 28
|
||||
#define BSP_CH438_D2_PIN 29
|
||||
#define BSP_CH438_D3_PIN 30
|
||||
#define BSP_CH438_D4_PIN 31
|
||||
#define BSP_CH438_D5_PIN 32
|
||||
#define BSP_CH438_D6_PIN 33
|
||||
#define BSP_CH438_D7_PIN 34
|
||||
#define BSP_CH438_INT_PIN 35
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_SOFT_SPI
|
||||
#define FPIOA_SOFT_SPI_SCK 26
|
||||
#define FPIOA_SOFT_SPI_MIOS 25
|
||||
#define FPIOA_SOFT_SPI_MSOI 27
|
||||
#define FPIOA_SOFT_SPI_NCS 28
|
||||
>>>>>>> upstream/prepare_for_master
|
||||
|
||||
#define BSP_SOFT_SPI_SCK_PIN 26
|
||||
#define BSP_SOFT_SPI_MIOS_PIN 25
|
||||
#define BSP_SOFT_SPI_MSOI_PIN 27
|
||||
#define BSP_SOFT_SPI_NCS_PIN 28
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_CAMERA
|
||||
#define BSP_DVP_RST_PIN 40
|
||||
#define BSP_DVP_PWDN_PIN 41
|
||||
#define BSP_DVP_XCLK_PIN 42
|
||||
#define BSP_DVP_PCLK_PIN 43
|
||||
#define BSP_DVP_HSYNC_PIN 44
|
||||
#define BSP_DVP_VSYNC_PIN 45
|
||||
#define BSP_DVP_SCL_PIN 46
|
||||
#define BSP_DVP_SDA_PIN 47
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_LED
|
||||
|
||||
@@ -0,0 +1,38 @@
|
||||
/* Copyright 2018 Canaan Inc.
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#ifndef _OV2640_H
|
||||
#define _OV2640_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#define OV2640_ADDR 0x60
|
||||
|
||||
struct CameraCfg
|
||||
{
|
||||
uint16_t window_w;
|
||||
uint16_t window_h;
|
||||
uint16_t window_xoffset;
|
||||
uint16_t window_yoffset;
|
||||
uint16_t output_w;
|
||||
uint16_t output_h;
|
||||
uint8_t gain;
|
||||
uint8_t gain_manu_enable;
|
||||
};
|
||||
|
||||
int ov2640_init(void);
|
||||
int ov2640_read_id(uint16_t *manuf_id, uint16_t *device_id);
|
||||
int SensorConfigure(struct CameraCfg* cfg_info);
|
||||
|
||||
#endif /* _OV2640_H */
|
||||
@@ -342,7 +342,7 @@ static void DrvLcdRectUpdate(uint16_t x1, uint16_t y1, uint16_t width, uint16_t
|
||||
}
|
||||
}
|
||||
|
||||
x_err_t DrvLcdInit(Lcd8080DeviceType dev)
|
||||
static x_err_t DrvLcdInit(Lcd8080DeviceType dev)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
aiit_lcd = (Lcd8080DeviceType)dev;
|
||||
@@ -366,6 +366,8 @@ x_err_t DrvLcdInit(Lcd8080DeviceType dev)
|
||||
data = 0x55;
|
||||
DrvLcdDataByte(&data, 1);
|
||||
|
||||
DrvLcdCmd(INVERSION_DISPALY_ON);
|
||||
|
||||
/* set direction */
|
||||
DrvLcdSetDirection(DIR_YX_RLUD);
|
||||
|
||||
@@ -476,7 +478,6 @@ static uint32 LcdWrite(void *dev, struct BusBlockWriteParam *write_param)
|
||||
}
|
||||
else if(1 == show->type) //output dot
|
||||
{
|
||||
// DrvLcdSetPixel(show->pixel_info.x_pos, show->pixel_info.y_pos, show->pixel_info.pixel_color);
|
||||
DrvLcdSetPixelDot(show->pixel_info.x_startpos,show->pixel_info.y_startpos, show->pixel_info.x_endpos, show->pixel_info.y_endpos,show->pixel_info.pixel_color);
|
||||
return EOK;
|
||||
}
|
||||
@@ -549,7 +550,7 @@ static int BoardLcdDevBend(struct LcdHardwareDevice *lcd_device, void *param, co
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int flag = 1;
|
||||
int HwLcdInit(void)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
@@ -613,7 +614,11 @@ int HwLcdInit(void)
|
||||
|
||||
KPrintf("LCD driver inited ...\r\n");
|
||||
|
||||
DrvLcdInit(lcd_dev);
|
||||
if(flag){
|
||||
DrvLcdInit(lcd_dev);
|
||||
flag = 0;
|
||||
}
|
||||
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
+13
-13
@@ -12,7 +12,7 @@
|
||||
#include <dev_spi.h>
|
||||
#include <bus_spi.h>
|
||||
|
||||
static x_err_t softSPIinit(struct SpiDriver *spi_drv, struct BusConfigureInfo *cfg)
|
||||
static x_err_t SoftSPIinit(struct SpiDriver *spi_drv, struct BusConfigureInfo *cfg)
|
||||
{
|
||||
NULL_PARAM_CHECK(spi_drv);
|
||||
NULL_PARAM_CHECK(cfg);
|
||||
@@ -29,7 +29,7 @@ static x_err_t softSPIinit(struct SpiDriver *spi_drv, struct BusConfigureInfo *c
|
||||
return EOK;
|
||||
}
|
||||
|
||||
static uint32 softSpiDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
|
||||
static uint32 SoftSpiDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
|
||||
{
|
||||
NULL_PARAM_CHECK(drv);
|
||||
NULL_PARAM_CHECK(configure_info);
|
||||
@@ -41,7 +41,7 @@ static uint32 softSpiDrvConfigure(void *drv, struct BusConfigureInfo *configure_
|
||||
switch (configure_info->configure_cmd)
|
||||
{
|
||||
case OPE_INT:
|
||||
softSPIinit(spi_drv, configure_info);
|
||||
SoftSPIinit(spi_drv, configure_info);
|
||||
break;
|
||||
|
||||
case OPE_CFG:
|
||||
@@ -54,7 +54,7 @@ static uint32 softSpiDrvConfigure(void *drv, struct BusConfigureInfo *configure_
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void soft_spi_writebyte(struct SpiHardwareDevice *spi_dev, uint8_t data)
|
||||
static void SoftSpiWriteByte(struct SpiHardwareDevice *spi_dev, uint8_t data)
|
||||
{
|
||||
int8_t i = 0;
|
||||
uint8_t temp = 0;
|
||||
@@ -79,7 +79,7 @@ static void soft_spi_writebyte(struct SpiHardwareDevice *spi_dev, uint8_t data)
|
||||
}
|
||||
|
||||
/* 读一个字节 */
|
||||
static uint8_t soft_spi_readbyte(struct SpiHardwareDevice *spi_dev)
|
||||
static uint8_t SoftSpiReadbyte(struct SpiHardwareDevice *spi_dev)
|
||||
{
|
||||
uint8_t i = 0;
|
||||
uint8_t read_data = 0xFF;
|
||||
@@ -100,7 +100,7 @@ static uint8_t soft_spi_readbyte(struct SpiHardwareDevice *spi_dev)
|
||||
|
||||
/* 读写一个字节 */
|
||||
// this funcition is unverify until now!
|
||||
static uint8_t soft_spi_readwritebyte(struct SpiHardwareDevice *spi_dev, uint8_t data)
|
||||
static uint8_t SoftSpiReadWriteByte(struct SpiHardwareDevice *spi_dev, uint8_t data)
|
||||
{
|
||||
uint8_t i = 0;
|
||||
uint8_t temp = 0;
|
||||
@@ -129,7 +129,7 @@ static uint8_t soft_spi_readwritebyte(struct SpiHardwareDevice *spi_dev, uint8_t
|
||||
return read_data;
|
||||
}
|
||||
|
||||
static uint32 softSpiWriteData(struct SpiHardwareDevice *spi_dev, struct SpiDataStandard *spi_datacfg)
|
||||
static uint32 SoftSpiWriteData(struct SpiHardwareDevice *spi_dev, struct SpiDataStandard *spi_datacfg)
|
||||
{
|
||||
SpiDeviceParam *dev_param = (SpiDeviceParam *)(spi_dev->haldev.private_data);
|
||||
|
||||
@@ -148,7 +148,7 @@ static uint32 softSpiWriteData(struct SpiHardwareDevice *spi_dev, struct SpiData
|
||||
|
||||
for (size_t i = 0; i < data_length; i++)
|
||||
{
|
||||
soft_spi_writebyte(spi_dev, data_buff[i]);
|
||||
SoftSpiWriteByte(spi_dev, data_buff[i]);
|
||||
}
|
||||
|
||||
if (spi_datacfg->spi_cs_release)
|
||||
@@ -160,7 +160,7 @@ static uint32 softSpiWriteData(struct SpiHardwareDevice *spi_dev, struct SpiData
|
||||
return EOK;
|
||||
}
|
||||
|
||||
static uint32 softSpiReadData(struct SpiHardwareDevice *spi_dev, struct SpiDataStandard *spi_datacfg)
|
||||
static uint32 SoftSpiReadData(struct SpiHardwareDevice *spi_dev, struct SpiDataStandard *spi_datacfg)
|
||||
{
|
||||
SpiDeviceParam *dev_param = (SpiDeviceParam *)(spi_dev->haldev.private_data);
|
||||
uint8 cs_gpio_pin = dev_param->spi_slave_param->spi_cs_gpio_pin;
|
||||
@@ -179,7 +179,7 @@ static uint32 softSpiReadData(struct SpiHardwareDevice *spi_dev, struct SpiDataS
|
||||
|
||||
for (size_t i = 0; i < recv_length; i++)
|
||||
{
|
||||
recv_buff[i] = soft_spi_readbyte(spi_dev);
|
||||
recv_buff[i] = SoftSpiReadbyte(spi_dev);
|
||||
}
|
||||
|
||||
if (spi_datacfg->spi_cs_release)
|
||||
@@ -195,8 +195,8 @@ static uint32 softSpiReadData(struct SpiHardwareDevice *spi_dev, struct SpiDataS
|
||||
const struct SpiDevDone soft_spi_dev_done = {
|
||||
.dev_close = NONE,
|
||||
.dev_open = NONE,
|
||||
.dev_read = softSpiReadData,
|
||||
.dev_write = softSpiWriteData};
|
||||
.dev_read = SoftSpiReadData,
|
||||
.dev_write = SoftSpiWriteData};
|
||||
|
||||
static int BoardSoftSpiBusInit(struct SpiBus *spi_bus, struct SpiDriver *spi_driver)
|
||||
{
|
||||
@@ -275,7 +275,7 @@ int HwSoftSPIInit(void)
|
||||
static struct SpiDriver spi_driver;
|
||||
memset(&spi_driver, 0, sizeof(struct SpiDriver));
|
||||
|
||||
spi_driver.configure = &(softSpiDrvConfigure);
|
||||
spi_driver.configure = &(SoftSpiDrvConfigure);
|
||||
|
||||
ret = BoardSoftSpiBusInit(&spi_bus, &spi_driver);
|
||||
if (EOK != ret)
|
||||
|
||||
@@ -38,7 +38,7 @@ struct Touch_event {
|
||||
};
|
||||
|
||||
#define DEFAULT_NUM 0x0D
|
||||
#define TOUCH_ADDRESS 0x44
|
||||
#define TOUCH_ADDRESS 0x40
|
||||
volatile bool SemReleaseFlag = 0;
|
||||
|
||||
static struct Bus* i2c_bus = NONE;
|
||||
@@ -77,7 +77,7 @@ static x_err_t ReadRegs(struct HardwareDev* dev, uint8 len, uint8* buf)
|
||||
// not used in polling mode
|
||||
static void touch_pin_irqhandler(void* arg)
|
||||
{
|
||||
// KPrintf("int hdr working.\n");
|
||||
KPrintf("int hdr working.\n");
|
||||
if (!SemReleaseFlag)
|
||||
{
|
||||
KSemaphoreAbandon(touch_sem);
|
||||
@@ -277,8 +277,8 @@ static uint32 TouchRead(void* dev, struct BusBlockReadParam* read_param)
|
||||
char status_reg = 0x80;
|
||||
|
||||
struct TouchDataStandard* data = (struct TouchDataStandard*)read_param->buffer;
|
||||
read_param->read_length = 0;
|
||||
result = KSemaphoreObtain(touch_sem, 1000);
|
||||
|
||||
result = KSemaphoreObtain(touch_sem, 100);
|
||||
// if (EOK == result)
|
||||
// {
|
||||
memset(TOUCHRECDATA, 0, 24);
|
||||
@@ -292,13 +292,16 @@ static uint32 TouchRead(void* dev, struct BusBlockReadParam* read_param)
|
||||
{
|
||||
ts_event.fingers[i].x = ((((uint32_t)TOUCHRECDATA[(i * 4) + 5]) << 8) | (uint32_t)TOUCHRECDATA[(i * 4) + 4]) & 0x00000FFF; // 12 bits of X coord
|
||||
ts_event.fingers[i].y = ((((uint32_t)TOUCHRECDATA[(i * 4) + 7]) << 8) | (uint32_t)TOUCHRECDATA[(i * 4) + 6]) & 0x00000FFF;
|
||||
uint32_t pos_y = 320 > ts_event.fingers[i].x *LCD_SIZE/TOUCH_WIDTH?320 - ts_event.fingers[i].x *LCD_SIZE/TOUCH_WIDTH:0;
|
||||
ts_event.fingers[i].x = ts_event.fingers[i].y *LCD_SIZE/TOUCH_HEIGHT>6?ts_event.fingers[i].y *LCD_SIZE/TOUCH_HEIGHT-6:0;
|
||||
ts_event.fingers[i].y = pos_y;
|
||||
ts_event.fingers[i].fingerID = (uint32_t)TOUCHRECDATA[(i * 4) + 7] >> 4; // finger that did the touch
|
||||
printf("fingers[%d] x %d y %d id %d\n",i,ts_event.fingers[i].x,ts_event.fingers[i].y,ts_event.fingers[i].fingerID);
|
||||
// printf("fingers[%d] x %d y %d id %d\n",i,ts_event.fingers[i].x,ts_event.fingers[i].y,ts_event.fingers[i].fingerID);
|
||||
}
|
||||
|
||||
data->x = ts_event.fingers[ts_event.NBfingers - 1].x;
|
||||
data->y = ts_event.fingers[ts_event.NBfingers - 1].y;
|
||||
|
||||
read_param->read_length = ts_event.NBfingers;
|
||||
SemReleaseFlag = 0;
|
||||
// }
|
||||
|
||||
|
||||
@@ -359,7 +359,8 @@ static uint32 TouchRead(void *dev, struct BusBlockReadParam *read_param)
|
||||
result = KSemaphoreObtain(touch_sem, 1000);
|
||||
if (EOK == result)
|
||||
{
|
||||
if(GetTouchEvent(&touch_point, &touch_event))
|
||||
ret = GetTouchEvent(&touch_point, &touch_event);
|
||||
if(ret > 0)
|
||||
{
|
||||
data->x = abs(LCD_WIDTH - touch_point.X);
|
||||
data->y = abs(LCD_HEIGHT - touch_point.Y);
|
||||
@@ -369,6 +370,11 @@ static uint32 TouchRead(void *dev, struct BusBlockReadParam *read_param)
|
||||
|
||||
read_param->read_length = read_param->size;
|
||||
ret = EOK;
|
||||
}
|
||||
else
|
||||
{
|
||||
ret = -ERROR;
|
||||
read_param->read_length = -ERROR;
|
||||
}
|
||||
SemReleaseFlag = 0;
|
||||
}
|
||||
|
||||
@@ -107,3 +107,19 @@ select RESOURCES_WDT
|
||||
if BSP_USING_WDT
|
||||
source "$BSP_DIR/third_party_driver/watchdog/Kconfig"
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_WDT
|
||||
bool "Using WATCHDOG device"
|
||||
default n
|
||||
select RESOURCES_WDT
|
||||
if BSP_USING_WDT
|
||||
source "$BSP_DIR/third_party_driver/watchdog/Kconfig"
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_SOFT_SPI
|
||||
bool "Using SOFT_SPI device"
|
||||
default n
|
||||
select RESOURCES_SOFT_SPI
|
||||
if BSP_USING_SOFT_SPI
|
||||
source "$BSP_DIR/third_party_driver/soft_spi/Kconfig"
|
||||
endif
|
||||
|
||||
@@ -56,4 +56,8 @@ ifeq ($(CONFIG_BSP_USING_WDT),y)
|
||||
SRC_DIR += watchdog
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_BSP_USING_SOFT_SPI),y)
|
||||
SRC_DIR += soft_spi
|
||||
endif
|
||||
|
||||
include $(KERNEL_ROOT)/compiler.mk
|
||||
|
||||
+14
@@ -0,0 +1,14 @@
|
||||
#ifndef CONNECT_TF_H
|
||||
#define CONNECT_TF_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
int HwSoftSPIInit(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,43 @@
|
||||
if BSP_USING_SOFT_SPI
|
||||
config SOFT_SPI_BUS_NAME
|
||||
string "soft spi bus 1 name"
|
||||
default "soft_spi1_bus1"
|
||||
|
||||
config SOFT_SPI_DEVICE_NAME
|
||||
string "soft spi dev 1 name"
|
||||
default "soft_spi1_dev1"
|
||||
|
||||
config SOFT_SPI_DRV_NAME
|
||||
string "soft spi drv 1 name"
|
||||
default "soft_spi1_drv1"
|
||||
|
||||
config SOFT_SPI_SCK
|
||||
int "soft spi sck pin"
|
||||
default 26
|
||||
|
||||
config SOFT_SPI_MOSI
|
||||
int "soft spi mosi pin"
|
||||
default 27
|
||||
|
||||
config SOFT_SPI_MISO
|
||||
int "soft spi miso pin"
|
||||
default 25
|
||||
|
||||
config SOFT_SPI_CS0_PIN
|
||||
int "soft spi cs pin"
|
||||
default 28
|
||||
|
||||
config SOFT_SPI_DEVICE_SLAVE_ID
|
||||
int "soft spi slave id"
|
||||
default 0
|
||||
|
||||
config SOFT_SPI_CHIP_SELECT
|
||||
int "soft spi chip selected"
|
||||
default 0
|
||||
|
||||
config SOFT_SPI_CLK_DELAY
|
||||
int "clk in microsecond"
|
||||
default 0
|
||||
|
||||
endif
|
||||
|
||||
@@ -0,0 +1,3 @@
|
||||
SRC_FILES := connect_soft_spi.c
|
||||
|
||||
include $(KERNEL_ROOT)/compiler.mk
|
||||
+295
@@ -0,0 +1,295 @@
|
||||
#include <xizi.h>
|
||||
#include <device.h>
|
||||
#include <fpioa.h>
|
||||
#include <gpiohs.h>
|
||||
#include "drv_io_config.h"
|
||||
#include <plic.h>
|
||||
#include <utils.h>
|
||||
#include <connect_soft_spi.h>
|
||||
#include <sleep.h>
|
||||
|
||||
#include <sd_spi.h>
|
||||
#include <dev_spi.h>
|
||||
#include <bus_spi.h>
|
||||
|
||||
static x_err_t SoftSPIinit(struct SpiDriver *spi_drv, struct BusConfigureInfo *cfg)
|
||||
{
|
||||
NULL_PARAM_CHECK(spi_drv);
|
||||
NULL_PARAM_CHECK(cfg);
|
||||
|
||||
// mode CPOL = 0 CPHA = 0
|
||||
gpiohs_set_drive_mode(SOFT_SPI_CS0_PIN, GPIO_DM_OUTPUT);
|
||||
gpiohs_set_pin(SOFT_SPI_CS0_PIN, GPIO_PV_HIGH); // set the cs gpio high
|
||||
gpiohs_set_drive_mode(SOFT_SPI_SCK, GPIO_DM_OUTPUT);
|
||||
gpiohs_set_drive_mode(SOFT_SPI_MOSI, GPIO_DM_OUTPUT);
|
||||
gpiohs_set_drive_mode(SOFT_SPI_MISO, GPIO_DM_INPUT);
|
||||
gpiohs_set_pin(SOFT_SPI_SCK, GPIO_PV_LOW);
|
||||
KPrintf("%s init done\n", SOFT_SPI_BUS_NAME);
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
static uint32 SoftSpiDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
|
||||
{
|
||||
NULL_PARAM_CHECK(drv);
|
||||
NULL_PARAM_CHECK(configure_info);
|
||||
|
||||
x_err_t ret = EOK;
|
||||
struct SpiDriver *spi_drv = (struct SpiDriver *)drv;
|
||||
struct SpiMasterParam *spi_param;
|
||||
|
||||
switch (configure_info->configure_cmd)
|
||||
{
|
||||
case OPE_INT:
|
||||
SoftSPIinit(spi_drv, configure_info);
|
||||
break;
|
||||
|
||||
case OPE_CFG:
|
||||
break;
|
||||
default:
|
||||
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void SoftSpiWriteByte(struct SpiHardwareDevice *spi_dev, uint8_t data)
|
||||
{
|
||||
int8_t i = 0;
|
||||
uint8_t temp = 0;
|
||||
for (i = 0; i < 8; i++)
|
||||
{
|
||||
temp = ((data & 0x80) == 0x80) ? 1 : 0;
|
||||
data = data << 1;
|
||||
gpiohs_set_pin(SOFT_SPI_SCK, GPIO_PV_LOW);
|
||||
usleep(SOFT_SPI_CLK_DELAY);
|
||||
if (0 == temp)
|
||||
{
|
||||
gpiohs_set_pin(SOFT_SPI_MOSI, GPIO_PV_LOW);
|
||||
}
|
||||
else
|
||||
{
|
||||
gpiohs_set_pin(SOFT_SPI_MOSI, GPIO_PV_HIGH);
|
||||
}
|
||||
gpiohs_set_pin(SOFT_SPI_SCK, GPIO_PV_HIGH);
|
||||
usleep(SOFT_SPI_CLK_DELAY);
|
||||
}
|
||||
gpiohs_set_pin(SOFT_SPI_SCK, GPIO_PV_LOW);
|
||||
}
|
||||
|
||||
/* 读一个字节 */
|
||||
static uint8_t SoftSpiReadByte(struct SpiHardwareDevice *spi_dev)
|
||||
{
|
||||
uint8_t i = 0;
|
||||
uint8_t read_data = 0xFF;
|
||||
for (i = 0; i < 8; i++)
|
||||
{
|
||||
read_data = read_data << 1;
|
||||
gpiohs_set_pin(SOFT_SPI_SCK, GPIO_PV_LOW);
|
||||
usleep(SOFT_SPI_CLK_DELAY);
|
||||
gpiohs_set_pin(SOFT_SPI_SCK, GPIO_PV_HIGH);
|
||||
usleep(SOFT_SPI_CLK_DELAY);
|
||||
if (1 == gpiohs_get_pin(SOFT_SPI_MISO))
|
||||
{
|
||||
read_data = read_data | 0x01;
|
||||
}
|
||||
}
|
||||
return read_data;
|
||||
}
|
||||
|
||||
/* 读写一个字节 */
|
||||
// this funcition is unverify until now!
|
||||
static uint8_t SoftSpiReadWriteByte(struct SpiHardwareDevice *spi_dev, uint8_t data)
|
||||
{
|
||||
uint8_t i = 0;
|
||||
uint8_t temp = 0;
|
||||
uint8_t read_data = 0xFF;
|
||||
for (i = 0; i < 8; i++)
|
||||
{
|
||||
temp = ((data & 0x80) == 0x80) ? 1 : 0;
|
||||
data = data << 1;
|
||||
read_data = read_data << 1;
|
||||
if (temp == 0)
|
||||
{
|
||||
gpiohs_set_pin(SOFT_SPI_MOSI, GPIO_PV_LOW);
|
||||
}
|
||||
else
|
||||
{
|
||||
gpiohs_set_pin(SOFT_SPI_MOSI, GPIO_PV_HIGH);
|
||||
}
|
||||
usleep(SOFT_SPI_CLK_DELAY);
|
||||
gpiohs_set_pin(SOFT_SPI_SCK, GPIO_PV_HIGH);
|
||||
usleep(SOFT_SPI_CLK_DELAY);
|
||||
if (gpiohs_get_pin(SOFT_SPI_MISO) == 1)
|
||||
{
|
||||
read_data = read_data + 1;
|
||||
}
|
||||
}
|
||||
return read_data;
|
||||
}
|
||||
|
||||
static uint32 SoftSpiWriteData(struct SpiHardwareDevice *spi_dev, struct SpiDataStandard *spi_datacfg)
|
||||
{
|
||||
SpiDeviceParam *dev_param = (SpiDeviceParam *)(spi_dev->haldev.private_data);
|
||||
|
||||
uint8 cs_gpio_pin = dev_param->spi_slave_param->spi_cs_gpio_pin;
|
||||
const uint8_t *data_buff = spi_datacfg->tx_buff;
|
||||
int data_length = spi_datacfg->length;
|
||||
if (NONE == spi_datacfg->tx_buff)
|
||||
{
|
||||
data_length = 0;
|
||||
}
|
||||
|
||||
if (spi_datacfg->spi_chip_select)
|
||||
{
|
||||
gpiohs_set_pin(cs_gpio_pin, GPIO_PV_LOW);
|
||||
}
|
||||
|
||||
for (size_t i = 0; i < data_length; i++)
|
||||
{
|
||||
SoftSpiWriteByte(spi_dev, data_buff[i]);
|
||||
}
|
||||
|
||||
if (spi_datacfg->spi_cs_release)
|
||||
{
|
||||
gpiohs_set_pin(cs_gpio_pin, GPIO_PV_HIGH);
|
||||
}
|
||||
spi_datacfg = spi_datacfg->next;
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
static uint32 SoftSpiReadData(struct SpiHardwareDevice *spi_dev, struct SpiDataStandard *spi_datacfg)
|
||||
{
|
||||
SpiDeviceParam *dev_param = (SpiDeviceParam *)(spi_dev->haldev.private_data);
|
||||
uint8 cs_gpio_pin = dev_param->spi_slave_param->spi_cs_gpio_pin;
|
||||
uint8_t *recv_buff = spi_datacfg->rx_buff;
|
||||
int recv_length = spi_datacfg->length;
|
||||
|
||||
if (NONE == spi_datacfg->rx_buff)
|
||||
{
|
||||
recv_length = 0;
|
||||
}
|
||||
|
||||
if (spi_datacfg->spi_chip_select)
|
||||
{
|
||||
gpiohs_set_pin(cs_gpio_pin, GPIO_PV_LOW);
|
||||
}
|
||||
|
||||
for (size_t i = 0; i < recv_length; i++)
|
||||
{
|
||||
recv_buff[i] = SoftSpiReadByte(spi_dev);
|
||||
}
|
||||
|
||||
if (spi_datacfg->spi_cs_release)
|
||||
{
|
||||
gpiohs_set_pin(cs_gpio_pin, GPIO_PV_HIGH);
|
||||
}
|
||||
|
||||
spi_datacfg = spi_datacfg->next;
|
||||
|
||||
return spi_datacfg->length;
|
||||
}
|
||||
|
||||
const struct SpiDevDone soft_spi_dev_done = {
|
||||
.dev_close = NONE,
|
||||
.dev_open = NONE,
|
||||
.dev_read = SoftSpiReadData,
|
||||
.dev_write = SoftSpiWriteData};
|
||||
|
||||
static int BoardSoftSpiBusInit(struct SpiBus *spi_bus, struct SpiDriver *spi_driver)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
|
||||
/*Init the spi bus */
|
||||
ret = SpiBusInit(spi_bus, SOFT_SPI_BUS_NAME);
|
||||
if (EOK != ret)
|
||||
{
|
||||
KPrintf("Board_Spi_init SpiBusInit error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
/*Init the spi driver*/
|
||||
ret = SpiDriverInit(spi_driver, SOFT_SPI_DRV_NAME);
|
||||
if (EOK != ret)
|
||||
{
|
||||
KPrintf("Board_Spi_init SpiDriverInit error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
/*Attach the spi driver to the spi bus*/
|
||||
ret = SpiDriverAttachToBus(SOFT_SPI_DRV_NAME, SOFT_SPI_BUS_NAME);
|
||||
if (EOK != ret)
|
||||
{
|
||||
KPrintf("Board_Spi_init SpiDriverAttachToBus error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int BoardSoftSpiDevBend(void)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
|
||||
static struct SpiHardwareDevice spi_device0;
|
||||
memset(&spi_device0, 0, sizeof(struct SpiHardwareDevice));
|
||||
|
||||
static struct SpiSlaveParam spi_slaveparam0;
|
||||
memset(&spi_slaveparam0, 0, sizeof(struct SpiSlaveParam));
|
||||
|
||||
spi_slaveparam0.spi_slave_id = SOFT_SPI_DEVICE_SLAVE_ID;
|
||||
spi_slaveparam0.spi_cs_gpio_pin = SOFT_SPI_CS0_PIN;
|
||||
spi_slaveparam0.spi_cs_select_id = SOFT_SPI_CHIP_SELECT;
|
||||
|
||||
spi_device0.spi_param.spi_dma_param = NONE;
|
||||
spi_device0.spi_param.spi_slave_param = &spi_slaveparam0;
|
||||
|
||||
spi_device0.spi_dev_done = &(soft_spi_dev_done);
|
||||
|
||||
ret = SpiDeviceRegister(&spi_device0, (void *)(&spi_device0.spi_param), SOFT_SPI_DEVICE_NAME);
|
||||
if (EOK != ret)
|
||||
{
|
||||
KPrintf("Board_Spi_init SpiDeviceInit device %s error %d\n", SOFT_SPI_DEVICE_NAME, ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = SpiDeviceAttachToBus(SOFT_SPI_DEVICE_NAME, SOFT_SPI_BUS_NAME);
|
||||
if (EOK != ret)
|
||||
{
|
||||
KPrintf("Board_Spi_init SpiDeviceAttachToBus device %s error %d\n", SOFT_SPI_DEVICE_NAME, ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
int HwSoftSPIInit(void)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
|
||||
static struct SpiBus spi_bus;
|
||||
memset(&spi_bus, 0, sizeof(struct SpiBus));
|
||||
|
||||
static struct SpiDriver spi_driver;
|
||||
memset(&spi_driver, 0, sizeof(struct SpiDriver));
|
||||
|
||||
spi_driver.configure = &(SoftSpiDrvConfigure);
|
||||
|
||||
ret = BoardSoftSpiBusInit(&spi_bus, &spi_driver);
|
||||
if (EOK != ret)
|
||||
{
|
||||
KPrintf("Board_Spi_Init error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = BoardSoftSpiDevBend();
|
||||
if (EOK != ret)
|
||||
{
|
||||
KPrintf("Board_Spi_Init error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
Reference in New Issue
Block a user