Merge branch 'armv8' of https://gitlink.org.cn/tuyuyang/xiuos into armv8

Ubiquitous/XiZi_AIoT/hardkernel/clock/Makefile

@@ -1,3 +1,3 @@
-SRC_DIR:= arm/armv7-a/cortex-a9/$(BOARD)
+SRC_DIR:= arm
 
 include $(KERNEL_ROOT)/compiler.mk

Ubiquitous/XiZi_AIoT/hardkernel/clock/arm/Makefile

@@ -0,0 +1,9 @@
+ifneq ($(findstring $(BOARD), ok1028a-c), )
+SRC_DIR := armv8-a
+endif
+ifneq ($(findstring $(BOARD), imx6q-sabrelite zynq7000-zc702), )
+SRC_DIR := armv7-a
+endif
+
+
+include $(KERNEL_ROOT)/compiler.mk

Ubiquitous/XiZi_AIoT/hardkernel/clock/arm/armv7-a/Makefile

@@ -0,0 +1,6 @@
+ifneq ($(findstring $(BOARD), imx6q-sabrelite zynq7000-zc702), )
+SRC_DIR := cortex-a9
+endif
+
+
+include $(KERNEL_ROOT)/compiler.mk

Ubiquitous/XiZi_AIoT/hardkernel/clock/arm/armv7-a/cortex-a9/Makefile

@@ -0,0 +1,3 @@
+SRC_DIR := $(BOARD)
+
+include $(KERNEL_ROOT)/compiler.mk

Ubiquitous/XiZi_AIoT/hardkernel/clock/arm/armv8-a/Makefile

@@ -0,0 +1,6 @@
+ifneq ($(findstring $(BOARD), ok1028a-c), )
+SRC_DIR := cortex-a72
+endif
+
+
+include $(KERNEL_ROOT)/compiler.mk

Ubiquitous/XiZi_AIoT/hardkernel/clock/arm/armv8-a/cortex-a72/Makefile

@@ -0,0 +1,3 @@
+SRC_DIR := $(BOARD)
+
+include $(KERNEL_ROOT)/compiler.mk

Ubiquitous/XiZi_AIoT/hardkernel/clock/arm/armv8-a/cortex-a72/ok1028a-c/Makefile

@@ -0,0 +1,4 @@
+SRC_FILES := clock.c 
+
+
+include $(KERNEL_ROOT)/compiler.mk

Ubiquitous/XiZi_AIoT/hardkernel/clock/arm/armv8-a/cortex-a72/ok1028a-c/clock.c

@@ -0,0 +1,119 @@
+#include "actracer.h"
+#include "core.h"
+#include "cortex_a72.h"
+#include "generic_timer.h"
+#include "memlayout.h"
+
+#include "clock_common_op.h"
+
+// armv8 generic timer driver
+
+#define CNTV_CTL_ENABLE (1 << 0)
+#define CNTV_CTL_IMASK (1 << 1)
+#define CNTV_CTL_ISTATUS (1 << 2)
+
+static void enable_timer(void);
+static void disable_timer(void);
+static void reload_timer(void);
+
+static void enable_timer()
+{
+    uint64_t c = r_cntv_ctl_el0();
+    c |= CNTV_CTL_ENABLE;
+    c &= ~CNTV_CTL_IMASK;
+    w_cntv_ctl_el0(c);
+}
+
+static void disable_timer()
+{
+    uint64_t c = r_cntv_ctl_el0();
+    c &= ~CNTV_CTL_ENABLE;
+    c |= CNTV_CTL_IMASK;
+    w_cntv_ctl_el0(c);
+}
+
+static void arch_timer_interrupt_enable()
+{
+    uint64_t c = r_cntv_ctl_el0();
+    if (c &= CNTV_CTL_IMASK) {
+        c |= ~CNTV_CTL_IMASK;
+        w_cntv_ctl_el0(c);
+    }
+}
+
+static void arch_timer_interrupt_disable()
+{
+    uint64_t c = r_cntv_ctl_el0();
+    if (!(c &= CNTV_CTL_IMASK)) {
+        c |= CNTV_CTL_IMASK;
+        w_cntv_ctl_el0(c);
+    }
+}
+
+static void reload_timer()
+{
+    // interval 100ms
+    uint64_t interval = 100000;
+    uint64_t interval_clk = interval * (r_cntfrq_el0() / 1000000);
+
+    w_cntv_tval_el0(interval_clk);
+}
+
+void delay(uint32_t cycles)
+{
+    uint64_t start = r_cntvct_el0();
+
+    while ((r_cntvct_el0() - start) < cycles)
+        __asm__ volatile("yield" ::: "memory");
+}
+
+void _sys_clock_init()
+{
+    arch_timer_interrupt_disable();
+    disable_timer();
+    reload_timer();
+    enable_timer();
+    arch_timer_interrupt_enable();
+}
+
+static uint32_t _get_clock_int()
+{
+    return 0;
+}
+
+static uint64_t _get_tick()
+{
+    return 0;
+}
+
+static uint64_t _get_second()
+{
+    return 0;
+}
+
+static bool _is_timer_expired()
+{
+    return true;
+}
+
+static void _clear_clock_intr()
+{
+    disable_timer();
+    reload_timer();
+    enable_timer();
+}
+
+static struct XiziClockDriver hardkernel_clock_driver = {
+    .sys_clock_init = _sys_clock_init,
+    .get_clock_int = _get_clock_int,
+    .get_tick = _get_tick,
+    .get_second = _get_second,
+    .is_timer_expired = _is_timer_expired,
+    .clear_clock_intr = _clear_clock_intr,
+};
+
+struct XiziClockDriver* hardkernel_clock_init(struct TraceTag* hardkernel_tag)
+{
+    hardkernel_clock_driver.sys_clock_init();
+    return &hardkernel_clock_driver;
+}

Ubiquitous/XiZi_AIoT/hardkernel/clock/arm/armv8-a/cortex-a72/ok1028a-c/include/generic_timer.h

@@ -0,0 +1,44 @@
+// armv8 generic timer
+static inline uint64_t
+r_cntv_ctl_el0()
+{
+    uint64_t x;
+    asm volatile("mrs %0, cntv_ctl_el0" : "=r"(x));
+    return x;
+}
+
+static inline void
+w_cntv_ctl_el0(uint64_t x)
+{
+    asm volatile("msr cntv_ctl_el0, %0" : : "r"(x));
+}
+
+static inline uint64_t
+r_cntv_tval_el0()
+{
+    uint64_t x;
+    asm volatile("mrs %0, cntv_tval_el0" : "=r"(x));
+    return x;
+}
+
+static inline void
+w_cntv_tval_el0(uint64_t x)
+{
+    asm volatile("msr cntv_tval_el0, %0" : : "r"(x));
+}
+
+static inline uint64_t
+r_cntvct_el0()
+{
+    uint64_t x;
+    asm volatile("mrs %0, cntvct_el0" : "=r"(x));
+    return x;
+}
+
+static inline uint64_t
+r_cntfrq_el0()
+{
+    uint64_t x;
+    asm volatile("mrs %0, cntfrq_el0" : "=r"(x));
+    return x;
+}