kernel: add the boot and interrupt code for cortex-m0
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SRC_FILES := boot.c interrupt.c interrupt_vector.S
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include $(KERNEL_ROOT)/compiler.mk
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/*
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* Copyright (c) 2020 AIIT XUOS Lab
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* XiUOS is licensed under Mulan PSL v2.
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* You can use this software according to the terms and conditions of the Mulan PSL v2.
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* You may obtain a copy of Mulan PSL v2 at:
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* http://license.coscl.org.cn/MulanPSL2
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* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
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* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
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* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
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* See the Mulan PSL v2 for more details.
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*/
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#ifndef ARCH_INTERRUPT_H__
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#define ARCH_INTERRUPT_H__
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#include <xs_base.h>
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#define ARCH_MAX_IRQ_NUM (48)
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#define ARCH_IRQ_NUM_OFFSET 0
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#define SYSTICK_IRQN 15
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#define UART1_IRQn 18
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int32 ArchEnableHwIrq(uint32 irq_num);
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int32 ArchDisableHwIrq(uint32 irq_num);
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#endif
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//*****************************************************************************
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//
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// startup_gcc.c - Startup code for use with GNU tools.
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//
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// Copyright (c) 2013 Texas Instruments Incorporated. All rights reserved.
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// Software License Agreement
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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//
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// Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the
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// distribution.
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//
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// Neither the name of Texas Instruments Incorporated nor the names of
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// its contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// This is part of revision 10636 of the Stellaris Firmware Development Package.
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//
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//*****************************************************************************
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/**
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* @file boot.c
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* @brief derived from Stellaris Firmware Development Package
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* @version 1.0
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* @author AIIT XUOS Lab
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* @date 2021-05-13
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*/
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/*************************************************
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File name: boot.c
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Description: Reset and init function
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Others:
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History:
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1. Date: 2021-05-13
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Author: AIIT XUOS Lab
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Modification:
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1. take startup_gcc.c from revision 10636 of the Stellaris Firmware Development Package for XiUOS
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*************************************************/
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extern unsigned _sdata[], _edata[],
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_sbss[], _ebss[], _etext[], _sidata[];
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extern int entry(void);
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void
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Reset_Handler(void)
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{
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unsigned *p, *q;
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p = _sdata; q = _sidata;
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while (p < _edata) *p++ = *q++;
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p = _sbss;
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while (p < _ebss) *p++ = 0;
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entry();
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}
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@ -0,0 +1,83 @@
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/*
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* Copyright (c) 2020 AIIT XUOS Lab
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* XiUOS is licensed under Mulan PSL v2.
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* You can use this software according to the terms and conditions of the Mulan PSL v2.
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* You may obtain a copy of Mulan PSL v2 at:
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* http://license.coscl.org.cn/MulanPSL2
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* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
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* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
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* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
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* See the Mulan PSL v2 for more details.
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*/
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/**
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* @file interrupt.c
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* @brief support arm cortex-m4 interrupt function
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* @version 1.0
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* @author AIIT XUOS Lab
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* @date 2021-04-29
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*/
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#include <xs_base.h>
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#include <xs_isr.h>
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x_base __attribute__((naked)) DisableLocalInterrupt()
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{
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asm volatile ("MRS r0, PRIMASK");
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asm volatile ("CPSID I");
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asm volatile ("BX LR ");
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}
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void __attribute__((naked)) EnableLocalInterrupt(x_base level)
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{
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asm volatile ("MSR PRIMASK, r0");
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asm volatile ("BX LR");
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}
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int32 ArchEnableHwIrq(uint32 irq_num)
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{
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return EOK;
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}
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int32 ArchDisableHwIrq(uint32 irq_num)
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{
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return EOK;
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}
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extern void KTaskOsAssignAfterIrq(void *context);
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void IsrEntry()
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{
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uint32 ipsr;
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__asm__ volatile("MRS %0, IPSR" : "=r"(ipsr));
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isrManager.done->incCounter();
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isrManager.done->handleIrq(ipsr);
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KTaskOsAssignAfterIrq(NONE);
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isrManager.done->decCounter();
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}
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void UsageFault_Handler(int irqn, void *arg)
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{
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/* Go to infinite loop when Usage Fault exception occurs */
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while (1)
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{
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}
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}
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void BusFault_Handler(int irqn, void *arg)
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{
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/* Go to infinite loop when Bus Fault exception occurs */
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while (1)
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{
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}
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}
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void NMI_Handler(int irqn, void *arg)
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{
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while (1)
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{
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}
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}
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//*****************************************************************************
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//
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// startup_gcc.c - Startup code for use with GNU tools.
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//
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// Copyright (c) 2013 Texas Instruments Incorporated. All rights reserved.
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// Software License Agreement
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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//
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// Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the
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// distribution.
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//
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// Neither the name of Texas Instruments Incorporated nor the names of
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// its contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// This is part of revision 10636 of the Stellaris Firmware Development Package.
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//
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//*****************************************************************************
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/**
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* @file interrupt_vector.S
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* @brief derived from Stellaris Firmware Development Package
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* @version 1.0
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* @author AIIT XUOS Lab
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* @date 2021-05-13
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*/
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/*************************************************
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File name: interrupt_vector.S
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Description: vector table for a Cortex M3
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Others:
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History:
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1. Date: 2021-05-13
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Author: AIIT XUOS Lab
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Modification:
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1. take startup_gcc.c from revision 10636 of the Stellaris Firmware Development Package for XiUOS
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*************************************************/
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//*****************************************************************************
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//
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// The vector table. Note that the proper constructs must be placed on this to
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// ensure that it ends up at physical address 0x0000.0000.
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//
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//*****************************************************************************
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.globl InterruptVectors
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/******************************************************************************
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*******************************************************************************/
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.section .isr_vector,"a",%progbits
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.type InterruptVectors, %object
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.size InterruptVectors, .-InterruptVectors
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InterruptVectors:
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.word _sp
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.word Reset_Handler
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.word NMI_Handler // NMI_Handler
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.word HardFaultHandler
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.word MemFaultHandler // MemManage_Handler
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.word BusFault_Handler // BusFault_Handler
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.word UsageFault_Handler // UsageFault_Handler
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.word IsrEntry
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.word IsrEntry
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.word IsrEntry
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.word IsrEntry
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.word IsrEntry // SVC_Handler
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.word IsrEntry // DebugMon_Handler
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.word IsrEntry
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.word PendSV_Handler // PendSV_Handler
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.word IsrEntry // systick
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.word IsrEntry
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.word IsrEntry
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.word IsrEntry // UART
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.word IsrEntry
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.word IsrEntry
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.word IsrEntry
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.word IsrEntry
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.word IsrEntry
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.word IsrEntry
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.word IsrEntry
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.word IsrEntry
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.word IsrEntry
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.word IsrEntry
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.word IsrEntry
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.word IsrEntry
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.word IsrEntry
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.word IsrEntry
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.word IsrEntry
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.word IsrEntry
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.word IsrEntry
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.word IsrEntry
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.word IsrEntry
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.word IsrEntry
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.word IsrEntry
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.word IsrEntry
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.word IsrEntry
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.word IsrEntry
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.word IsrEntry
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.word IsrEntry
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.word IsrEntry
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.word IsrEntry
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