update nuttx 10.1.0 to 10.2.0 from Wang_guozhu

it is OK
This commit is contained in:
xuedongliang
2022-03-02 11:36:27 +08:00
16953 changed files with 18632 additions and 4652955 deletions
File diff suppressed because it is too large Load Diff
@@ -0,0 +1,86 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_FPU is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_CMDPARMS is not set
CONFIG_ADBD_FILE_SERVICE=y
CONFIG_ADBD_SHELL_SERVICE=y
CONFIG_ADBD_USB_SERVER=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="aiit-arm32-board"
CONFIG_ARCH_BOARD_STM32F4_AIIT=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARDCTL_USBDEVCTRL=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_BUILTIN=y
CONFIG_CLOCK_MONOTONIC=y
CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_DEV_FIFO_SIZE=128
CONFIG_DEV_PIPE_MAXSIZE=128
CONFIG_DEV_PIPE_SIZE=128
CONFIG_DEV_URANDOM=y
CONFIG_ELF=y
CONFIG_EXAMPLES_HELLO=m
CONFIG_FAT_LFN=y
CONFIG_FS_FAT=y
CONFIG_FS_FATTIME=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_ENVPATH=y
CONFIG_LIBC_EXECFUNCS=y
CONFIG_LIBUV=y
CONFIG_LIBUV_PIPE=y
CONFIG_LIBUV_STREAM=y
CONFIG_MMCSD=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_FILE_APPS=y
CONFIG_NSH_LINELEN=128
CONFIG_NSH_READLINE=y
CONFIG_PATH_INITIAL="/mnt/sd0/bin"
CONFIG_PIPES=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=114688
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_SCHED_LPWORK=y
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_SENSORS=y
CONFIG_STACK_COLORATION=y
CONFIG_START_DAY=17
CONFIG_START_MONTH=12
CONFIG_START_YEAR=2020
CONFIG_STM32_DMA2=y
CONFIG_STM32_DMACAPABLE=y
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_OTGFS=y
CONFIG_STM32_PWR=y
CONFIG_STM32_SPI2=y
CONFIG_STM32_USART2=y
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_SYSTEM_ADBD=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_NSH_SYMTAB=y
CONFIG_SYSTEM_NSH_SYMTAB_ARRAYNAME="g_symtab"
CONFIG_SYSTEM_NSH_SYMTAB_COUNTNAME="g_nsymbols"
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USBADB=y
CONFIG_USBDEV=y
CONFIG_USERMAIN_STACKSIZE=3072
CONFIG_USER_ENTRYPOINT="nsh_main"
@@ -0,0 +1,78 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_FPU is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_CMDPARMS is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="aiit-arm32-board"
CONFIG_ARCH_BOARD_STM32F4_AIIT=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_AUDIO=y
CONFIG_AUDIO_CS43L22=y
CONFIG_AUDIO_CUSTOM_DEV_PATH=y
CONFIG_AUDIO_EXCLUDE_TONE=y
CONFIG_BOARD_LATE_INITIALIZE=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_BUILTIN=y
CONFIG_DRIVERS_AUDIO=y
CONFIG_FAT_LCNAMES=y
CONFIG_FAT_LFN=y
CONFIG_FS_FAT=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_I2C=y
CONFIG_I2C_DRIVER=y
CONFIG_I2C_POLLED=y
CONFIG_I2C_RESET=y
CONFIG_INTELHEX_BINARY=y
CONFIG_MM_REGIONS=2
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_NXPLAYER_DEFAULT_MEDIADIR="/mnt/music"
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=114688
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_START_DAY=6
CONFIG_START_MONTH=12
CONFIG_START_YEAR=2011
CONFIG_STM32_DMA1=y
CONFIG_STM32_DMACAPABLE=y
CONFIG_STM32_I2C1=y
CONFIG_STM32_I2S3=y
CONFIG_STM32_I2S3_TX=y
CONFIG_STM32_I2S_MCK=y
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_OTGFS=y
CONFIG_STM32_OTGFS_SOFINTR=y
CONFIG_STM32_PWR=y
CONFIG_STM32_SPI1=y
CONFIG_STM32_SPI3=y
CONFIG_STM32_SPI_DMA=y
CONFIG_STM32_USART2=y
CONFIG_STM32_USBHOST=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_NXPLAYER=y
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USBHOST_ISOC_DISABLE=y
CONFIG_USBHOST_MSC=y
CONFIG_USER_ENTRYPOINT="nsh_main"
@@ -0,0 +1,56 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_FPU is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_CMDPARMS is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="aiit-arm32-board"
CONFIG_ARCH_BOARD_STM32F4_AIIT=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_BUILTIN=y
CONFIG_CANUTILS_LIBCANARD=y
CONFIG_CAN_EXTID=y
CONFIG_CLOCK_MONOTONIC=y
CONFIG_EXAMPLES_LIBCANARD=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_INTELHEX_BINARY=y
CONFIG_MM_REGIONS=2
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=114688
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_START_DAY=6
CONFIG_START_MONTH=12
CONFIG_START_YEAR=2011
CONFIG_STM32_CAN1=y
CONFIG_STM32_CAN1_BAUD=500000
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_PWR=y
CONFIG_STM32_SPI1=y
CONFIG_STM32_USART2=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_TIME64=y
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="nsh_main"
@@ -0,0 +1,63 @@
############################################################################
# boards/arm/stm32/aiit-arm32-board/configs/cxxtest/Make.defs
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/.config
include $(TOPDIR)/tools/Config.mk
include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs
LDSCRIPT = ld.script
ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
ARCHSCRIPT = -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}"
else
ARCHSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
endif
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
ARCHOPTIMIZATION = -g
endif
ifneq ($(CONFIG_DEBUG_NOOPT),y)
ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
endif
ARCHCFLAGS = -fno-builtin
ifeq ($(CONFIG_CXX_EXCEPTION),y)
ARCHCPUFLAGSXX = -fno-builtin
else
ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fcheck-new
endif
ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
ARCHWARNINGSXX = -Wall -Wshadow -Wundef
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS := $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
AFLAGS := $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
LDFLAGS += -g
endif
@@ -0,0 +1,44 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_FPU is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="aiit-arm32-board"
CONFIG_ARCH_BOARD_STM32F4_AIIT=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_C99_BOOL8=y
CONFIG_DISABLE_ENVIRON=y
CONFIG_DISABLE_MOUNTPOINT=y
CONFIG_HAVE_CXX=y
CONFIG_HOST_WINDOWS=y
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBM=y
CONFIG_MM_REGIONS=2
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=114688
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_ONEXIT=y
CONFIG_SCHED_ONEXIT_MAX=4
CONFIG_SDCLONE_DISABLE=y
CONFIG_START_DAY=2
CONFIG_START_MONTH=11
CONFIG_START_YEAR=2012
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_USART2=y
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_TESTING_CXXTEST=y
CONFIG_UCLIBCXX=y
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="cxxtest_main"
@@ -0,0 +1,47 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_FPU is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="aiit-arm32-board"
CONFIG_ARCH_BOARD_STM32F4_AIIT=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARMV7M_USEBASEPRI=y
CONFIG_BINFMT_CONSTRUCTORS=y
CONFIG_BOARDCTL=y
CONFIG_BOARDCTL_ROMDISK=y
CONFIG_BOARD_LATE_INITIALIZE=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_CONSOLE_SYSLOG=y
CONFIG_ELF=y
CONFIG_ELF_STACKSIZE=4096
CONFIG_EXAMPLES_ELF=y
CONFIG_FS_ROMFS=y
CONFIG_HAVE_CXX=y
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_ENVPATH=y
CONFIG_MM_REGIONS=2
CONFIG_PATH_INITIAL="/mnt/romfs"
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=114688
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_STARTHOOK=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_START_DAY=26
CONFIG_START_MONTH=10
CONFIG_START_YEAR=2012
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_USART2=y
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USERMAIN_STACKSIZE=4096
CONFIG_USER_ENTRYPOINT="elf_main"
@@ -0,0 +1,92 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_FPU is not set
# CONFIG_MMCSD_MMCSUPPORT is not set
# CONFIG_MMCSD_SPI is not set
# CONFIG_NET_IPv4 is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_CMDPARMS is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="aiit-arm32-board"
CONFIG_ARCH_BOARD_STM32F4_AIIT=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_BUILTIN=y
CONFIG_ETH0_PHY_LAN8720=y
CONFIG_FAT_LCNAMES=y
CONFIG_FAT_LFN=y
CONFIG_FS_FAT=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_HOST_WINDOWS=y
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_HOSTNAME="STM32F4-Discovery"
CONFIG_MMCSD=y
CONFIG_MMCSD_MULTIBLOCK_DISABLE=y
CONFIG_MMCSD_SDIO=y
CONFIG_NET=y
CONFIG_NETINIT_IPv6NETMASK_8=0xff80
CONFIG_NETINIT_NOMAC=y
CONFIG_NET_BROADCAST=y
CONFIG_NET_ICMPv6=y
CONFIG_NET_ICMPv6_NEIGHBOR=y
CONFIG_NET_ICMPv6_SOCKET=y
CONFIG_NET_IPv6=y
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_SOLINGER=y
CONFIG_NET_TCP=y
CONFIG_NET_TCPBACKLOG=y
CONFIG_NET_TCP_WRITE_BUFFERS=y
CONFIG_NET_UDP=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=114688
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_HPWORKPRIORITY=192
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_START_DAY=13
CONFIG_START_MONTH=9
CONFIG_START_YEAR=2014
CONFIG_STM32F4DISBB=y
CONFIG_STM32_DMA2=y
CONFIG_STM32_DMACAPABLE=y
CONFIG_STM32_ETHMAC=y
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_PHYADDR=0
CONFIG_STM32_PHYSR=31
CONFIG_STM32_PHYSR_100FD=0x0018
CONFIG_STM32_PHYSR_100HD=0x0008
CONFIG_STM32_PHYSR_10FD=0x0014
CONFIG_STM32_PHYSR_10HD=0x0004
CONFIG_STM32_PHYSR_ALTCONFIG=y
CONFIG_STM32_PHYSR_ALTMODE=0x001c
CONFIG_STM32_PWR=y
CONFIG_STM32_RMII_EXTCLK=y
CONFIG_STM32_SDIO=y
CONFIG_STM32_SPI1=y
CONFIG_STM32_USART6=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_PING6=y
CONFIG_USART6_RXBUFSIZE=64
CONFIG_USART6_SERIAL_CONSOLE=y
CONFIG_USART6_TXBUFSIZE=64
CONFIG_USER_ENTRYPOINT="nsh_main"
@@ -0,0 +1,48 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_FPU is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="aiit-arm32-board"
CONFIG_ARCH_BOARD_STM32F4_AIIT=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARM_MPU=y
CONFIG_BOARD_LATE_INITIALIZE=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_BUILD_PROTECTED=y
CONFIG_CONSOLE_SYSLOG=y
CONFIG_DISABLE_ENVIRON=y
CONFIG_DISABLE_MOUNTPOINT=y
CONFIG_HOST_WINDOWS=y
CONFIG_INTELHEX_BINARY=y
CONFIG_MM_REGIONS=2
CONFIG_NUTTX_USERSPACE=0x08020000
CONFIG_PASS1_BUILDIR="boards/arm/stm32/aiit-arm32-board/kernel"
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=114688
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_START_DAY=22
CONFIG_START_MONTH=3
CONFIG_START_YEAR=2013
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_USART2=y
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_SYS_RESERVED=9
CONFIG_TESTING_OSTEST=y
CONFIG_TESTING_OSTEST_NBARRIER_THREADS=3
CONFIG_TESTING_OSTEST_STACKSIZE=2048
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="ostest_main"
@@ -0,0 +1,57 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_FPU is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_CMDPARMS is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="aiit-arm32-board"
CONFIG_ARCH_BOARD_STM32F4_AIIT=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARD_LATE_INITIALIZE=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_BUILTIN=y
CONFIG_EXAMPLES_HELLO=y
CONFIG_EXAMPLES_SLCD=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_I2C=y
CONFIG_INTELHEX_BINARY=y
CONFIG_LCD_BACKPACK=y
CONFIG_LCD_LCD1602=y
CONFIG_MM_REGIONS=2
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=114688
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_SLCD=y
CONFIG_START_DAY=6
CONFIG_START_MONTH=12
CONFIG_START_YEAR=2011
CONFIG_STM32_I2C1=y
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_PWR=y
CONFIG_STM32_SPI1=y
CONFIG_STM32_USART2=y
CONFIG_SYSTEM_NSH=y
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="nsh_main"
@@ -0,0 +1,49 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_FPU is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_CMDPARMS is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="aiit-arm32-board"
CONFIG_ARCH_BOARD_STM32F4_AIIT=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARD_LATE_INITIALIZE=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_BUILTIN=y
CONFIG_EXAMPLES_HELLO=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_INTELHEX_BINARY=y
CONFIG_LWL_CONSOLE=y
CONFIG_MM_REGIONS=2
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=114688
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_STANDARD_SERIAL=y
CONFIG_START_DAY=6
CONFIG_START_MONTH=12
CONFIG_START_YEAR=2011
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_PWR=y
CONFIG_STM32_SPI1=y
CONFIG_SYSTEM_NSH=y
CONFIG_USER_ENTRYPOINT="nsh_main"
@@ -0,0 +1,55 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_FPU is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_CMDPARMS is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="aiit-arm32-board"
CONFIG_ARCH_BOARD_STM32F4_AIIT=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARD_LATE_INITIALIZE=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_BUILTIN=y
CONFIG_EXAMPLES_MAX31855=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_HOST_WINDOWS=y
CONFIG_INTELHEX_BINARY=y
CONFIG_MM_REGIONS=2
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=114688
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_SENSORS=y
CONFIG_SENSORS_MAX31855=y
CONFIG_START_DAY=6
CONFIG_START_MONTH=12
CONFIG_START_YEAR=2011
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_PWR=y
CONFIG_STM32_SPI1=y
CONFIG_STM32_SPI2=y
CONFIG_STM32_USART2=y
CONFIG_SYSTEM_NSH=y
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="nsh_main"
@@ -0,0 +1,85 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_FPU is not set
# CONFIG_DISABLE_OS_API is not set
# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
# CONFIG_NSH_DISABLEBG is not set
# CONFIG_NSH_DISABLESCRIPT is not set
# CONFIG_NSH_DISABLE_BASENAME is not set
# CONFIG_NSH_DISABLE_CMP is not set
# CONFIG_NSH_DISABLE_DD is not set
# CONFIG_NSH_DISABLE_DF is not set
# CONFIG_NSH_DISABLE_DIRNAME is not set
# CONFIG_NSH_DISABLE_EXEC is not set
# CONFIG_NSH_DISABLE_EXIT is not set
# CONFIG_NSH_DISABLE_GET is not set
# CONFIG_NSH_DISABLE_HEXDUMP is not set
# CONFIG_NSH_DISABLE_ITEF is not set
# CONFIG_NSH_DISABLE_LOOPS is not set
# CONFIG_NSH_DISABLE_LOSETUP is not set
# CONFIG_NSH_DISABLE_MKRD is not set
# CONFIG_NSH_DISABLE_PUT is not set
# CONFIG_NSH_DISABLE_SEMICOLON is not set
# CONFIG_NSH_DISABLE_TIME is not set
# CONFIG_NSH_DISABLE_UNAME is not set
# CONFIG_NSH_DISABLE_WGET is not set
# CONFIG_NSH_DISABLE_XD is not set
# CONFIG_NX_DISABLE_1BPP is not set
# CONFIG_NX_WRITEONLY is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="aiit-arm32-board"
CONFIG_ARCH_BOARD_STM32F4_AIIT=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_BUILTIN=y
CONFIG_DEFAULT_SMALL=y
CONFIG_EXAMPLES_NXHELLO=y
CONFIG_EXAMPLES_NXHELLO_BPP=1
CONFIG_EXAMPLES_NXHELLO_LISTENER_STACKSIZE=1536
CONFIG_EXAMPLES_NXHELLO_STACKSIZE=1536
CONFIG_FS_PROCFS=y
CONFIG_LCD=y
CONFIG_LCD_FRAMEBUFFER=y
CONFIG_LCD_MAX7219=y
CONFIG_LCD_NOGETRUN=y
CONFIG_LIBC_LONG_LONG=y
CONFIG_MAX7219_NHORIZONTALBLKS=4
CONFIG_MM_REGIONS=2
CONFIG_MQ_MAXMSGSIZE=64
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NX=y
CONFIG_NXFONT_MONO5X8=y
CONFIG_NXSTART_SERVERSTACK=1536
CONFIG_NX_BLOCKING=y
CONFIG_NX_MXCLIENTMSGS=32
CONFIG_PREALLOC_MQ_MSGS=16
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=114688
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_HPWORKPRIORITY=192
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_SERIAL_TERMIOS=y
CONFIG_START_DAY=21
CONFIG_START_MONTH=4
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_PWR=y
CONFIG_STM32_SPI1=y
CONFIG_STM32_USART2=y
CONFIG_SYSTEM_NSH=y
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="nsh_main"
@@ -0,0 +1,73 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_FPU is not set
# CONFIG_MMCSD_HAVE_CARDDETECT is not set
# CONFIG_MMCSD_HAVE_WRITEPROTECT is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_CMDPARMS is not set
# CONFIG_SPI_CALLBACK is not set
# CONFIG_STM32_CCMEXCLUDE is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="aiit-arm32-board"
CONFIG_ARCH_BOARD_STM32F4_AIIT=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_BUILTIN=y
CONFIG_CODECS_HASH_MD5=y
CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_EXAMPLES_HELLO=y
CONFIG_FAT_LFN=y
CONFIG_FS_FAT=y
CONFIG_FS_FATTIME=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_HEAP_COLORATION=y
CONFIG_INTELHEX_BINARY=y
CONFIG_MMCSD=y
CONFIG_MM_REGIONS=2
CONFIG_NETUTILS_CODECS=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=114688
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_READLINE_CMD_HISTORY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_LPWORK=y
CONFIG_SCHED_LPWORKPRIORITY=30
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_SENDFILE_BUFSIZE=1024
CONFIG_STACK_COLORATION=y
CONFIG_START_DAY=17
CONFIG_START_MONTH=10
CONFIG_START_YEAR=2019
CONFIG_STM32_DMA1=y
CONFIG_STM32_DMA2=y
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_PWR=y
CONFIG_STM32_SPI2=y
CONFIG_STM32_USART2=y
CONFIG_SYSTEM_NSH=y
CONFIG_TESTING_OSTEST=y
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="nsh_main"
@@ -0,0 +1,64 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_FPU is not set
# CONFIG_MB_TCP_ENABLED is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_CMDPARMS is not set
# CONFIG_NSH_DISABLE_MB is not set
# CONFIG_NSH_DISABLE_MH is not set
# CONFIG_NSH_DISABLE_MW is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="aiit-arm32-board"
CONFIG_ARCH_BOARD_STM32F4_AIIT=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARD_LATE_INITIALIZE=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_BUILTIN=y
CONFIG_EXAMPLES_HELLO=y
CONFIG_EXAMPLES_MODBUS=y
CONFIG_EXAMPLES_MODBUS_PORT=1
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_INTELHEX_BINARY=y
CONFIG_MM_REGIONS=2
CONFIG_MODBUS=y
CONFIG_MODBUS_SLAVE=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=114688
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_SERIAL_TERMIOS=y
CONFIG_START_DAY=6
CONFIG_START_MONTH=12
CONFIG_START_YEAR=2011
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_PWR=y
CONFIG_STM32_SPI1=y
CONFIG_STM32_USART1=y
CONFIG_STM32_USART2=y
CONFIG_SYSTEM_NSH=y
CONFIG_USART1_BAUD=38400
CONFIG_USART1_PARITY=2
CONFIG_USART1_RS485=y
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="nsh_main"
@@ -0,0 +1,54 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_FPU is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_CMDPARMS is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="aiit-arm32-board"
CONFIG_ARCH_BOARD_STM32F4_AIIT=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARDCTL_ROMDISK=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_BUILTIN=y
CONFIG_EXAMPLES_MODULE=y
CONFIG_FS_PROCFS=y
CONFIG_FS_ROMFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_INTELHEX_BINARY=y
CONFIG_MM_REGIONS=2
CONFIG_MODULE=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=114688
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_START_DAY=6
CONFIG_START_MONTH=12
CONFIG_START_YEAR=2011
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_PWR=y
CONFIG_STM32_SPI1=y
CONFIG_STM32_USART2=y
CONFIG_SYSTEM_NSH=y
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="nsh_main"
@@ -0,0 +1,97 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_FPU is not set
# CONFIG_MMCSD_MMCSUPPORT is not set
# CONFIG_MMCSD_SPI is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_CMDPARMS is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="aiit-arm32-board"
CONFIG_ARCH_BOARD_STM32F4_AIIT=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_BUILTIN=y
CONFIG_ETH0_PHY_LAN8720=y
CONFIG_FAT_LCNAMES=y
CONFIG_FAT_LFN=y
CONFIG_FS_FAT=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_HOST_WINDOWS=y
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_HOSTNAME="STM32F4-Discovery"
CONFIG_MMCSD=y
CONFIG_MMCSD_MULTIBLOCK_DISABLE=y
CONFIG_MMCSD_SDIO=y
CONFIG_NET=y
CONFIG_NETDB_DNSCLIENT=y
CONFIG_NETDB_DNSSERVER_NOADDR=y
CONFIG_NETDEV_PHY_IOCTL=y
CONFIG_NETINIT_NOMAC=y
CONFIG_NETINIT_THREAD=y
CONFIG_NETUTILS_TELNETD=y
CONFIG_NETUTILS_TFTPC=y
CONFIG_NETUTILS_WEBCLIENT=y
CONFIG_NET_ARP_SEND=y
CONFIG_NET_BROADCAST=y
CONFIG_NET_ICMP=y
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_SOLINGER=y
CONFIG_NET_TCP=y
CONFIG_NET_TCPBACKLOG=y
CONFIG_NET_TCP_WRITE_BUFFERS=y
CONFIG_NET_UDP=y
CONFIG_NET_UDP_CHECKSUMS=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=114688
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_HPWORKPRIORITY=192
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_START_DAY=13
CONFIG_START_MONTH=9
CONFIG_START_YEAR=2014
CONFIG_STM32F4DISBB=y
CONFIG_STM32_DMA2=y
CONFIG_STM32_DMACAPABLE=y
CONFIG_STM32_ETHMAC=y
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_PHYADDR=0
CONFIG_STM32_PHYSR=31
CONFIG_STM32_PHYSR_100FD=0x0018
CONFIG_STM32_PHYSR_100HD=0x0008
CONFIG_STM32_PHYSR_10FD=0x0014
CONFIG_STM32_PHYSR_10HD=0x0004
CONFIG_STM32_PHYSR_ALTCONFIG=y
CONFIG_STM32_PHYSR_ALTMODE=0x001c
CONFIG_STM32_PWR=y
CONFIG_STM32_RMII_EXTCLK=y
CONFIG_STM32_SDIO=y
CONFIG_STM32_SPI1=y
CONFIG_STM32_USART6=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_PING=y
CONFIG_USART6_RXBUFSIZE=64
CONFIG_USART6_SERIAL_CONSOLE=y
CONFIG_USART6_TXBUFSIZE=64
CONFIG_USER_ENTRYPOINT="nsh_main"
@@ -0,0 +1,52 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_FPU is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_CMDPARMS is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="aiit-arm32-board"
CONFIG_ARCH_BOARD_STM32F4_AIIT=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARD_LATE_INITIALIZE=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_BUILTIN=y
CONFIG_EXAMPLES_HELLO=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_HOST_WINDOWS=y
CONFIG_INTELHEX_BINARY=y
CONFIG_MM_REGIONS=2
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=114688
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_START_DAY=6
CONFIG_START_MONTH=12
CONFIG_START_YEAR=2011
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_PWR=y
CONFIG_STM32_SPI1=y
CONFIG_STM32_USART2=y
CONFIG_SYSTEM_NSH=y
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="nsh_main"
@@ -0,0 +1,73 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_FPU is not set
# CONFIG_EXAMPLES_NXLINES_DEFAULT_COLORS is not set
# CONFIG_NXFONTS_DISABLE_16BPP is not set
# CONFIG_NXTK_DEFAULT_BORDERCOLORS is not set
# CONFIG_NX_DISABLE_16BPP is not set
# CONFIG_NX_PACKEDMSFIRST is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="aiit-arm32-board"
CONFIG_ARCH_BOARD_STM32F4_AIIT=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_EXAMPLES_NXLINES=y
CONFIG_EXAMPLES_NXLINES_BGCOLOR=0x0320
CONFIG_EXAMPLES_NXLINES_BORDERCOLOR=0xffe0
CONFIG_EXAMPLES_NXLINES_BORDERWIDTH=4
CONFIG_EXAMPLES_NXLINES_BPP=16
CONFIG_EXAMPLES_NXLINES_CIRCLECOLOR=0xf7bb
CONFIG_EXAMPLES_NXLINES_LINECOLOR=0xffe0
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_HOST_WINDOWS=y
CONFIG_INTELHEX_BINARY=y
CONFIG_LCD=y
CONFIG_LCD_MAXCONTRAST=1
CONFIG_LCD_MAXPOWER=255
CONFIG_LCD_SSD1289=y
CONFIG_MM_REGIONS=2
CONFIG_MQ_MAXMSGSIZE=64
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LIBRARY=y
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_NX=y
CONFIG_NXFONT_SANS22X29B=y
CONFIG_NXFONT_SANS23X27=y
CONFIG_NXTK_BORDERCOLOR1=0x5cb7
CONFIG_NXTK_BORDERCOLOR2=0x21c9
CONFIG_NXTK_BORDERCOLOR3=0xffdf
CONFIG_NX_BLOCKING=y
CONFIG_NX_KBD=y
CONFIG_NX_XYINPUT_MOUSE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=114688
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_START_DAY=6
CONFIG_START_MONTH=12
CONFIG_START_YEAR=2011
CONFIG_STM32_FSMC=y
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_PWR=y
CONFIG_STM32_SPI1=y
CONFIG_STM32_USART2=y
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="nxlines_main"
@@ -0,0 +1,56 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_FPU is not set
# CONFIG_ARCH_LEDS is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="aiit-arm32-board"
CONFIG_ARCH_BOARD_STM32F4_AIIT=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_CUSTOM_PMINIT=y
CONFIG_ARCH_IDLE_CUSTOM=y
CONFIG_ARCH_IRQBUTTONS=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_BUILTIN=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_HOST_WINDOWS=y
CONFIG_INTELHEX_BINARY=y
CONFIG_MM_REGIONS=2
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_PM=y
CONFIG_PM_BUTTONS=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=114688
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_RTC_ALARM=y
CONFIG_RTC_DATETIME=y
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_HPWORKPRIORITY=192
CONFIG_SCHED_HPWORKSTACKSIZE=1024
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_PWR=y
CONFIG_STM32_RTC=y
CONFIG_STM32_TIM1=y
CONFIG_STM32_USART2=y
CONFIG_SYSTEM_NSH=y
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="nsh_main"
@@ -0,0 +1,50 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_FPU is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="aiit-arm32-board"
CONFIG_ARCH_BOARD_STM32F4_AIIT=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BINFMT_CONSTRUCTORS=y
CONFIG_BOARDCTL=y
CONFIG_BOARDCTL_APP_SYMTAB=y
CONFIG_BOARDCTL_ROMDISK=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_CONSOLE_SYSLOG=y
CONFIG_ELF=y
CONFIG_EXAMPLES_POSIXSPAWN=y
CONFIG_EXECFUNCS_HAVE_SYMTAB=y
CONFIG_EXECFUNCS_NSYMBOLS_VAR="g_spawn_nexports"
CONFIG_EXECFUNCS_SYMTAB_ARRAY="g_spawn_exports"
CONFIG_FS_ROMFS=y
CONFIG_HAVE_CXX=y
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_ENVPATH=y
CONFIG_LIBC_EXECFUNCS=y
CONFIG_MM_REGIONS=2
CONFIG_PATH_INITIAL="/mnt/romfs"
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=114688
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_STARTHOOK=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_START_DAY=26
CONFIG_START_MONTH=10
CONFIG_START_YEAR=2012
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_USART2=y
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="posix_spawn_main"
@@ -0,0 +1,54 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_FPU is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_CMDPARMS is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="aiit-arm32-board"
CONFIG_ARCH_BOARD_STM32F4_AIIT=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_BUILTIN=y
CONFIG_EXAMPLES_PTYTEST=y
CONFIG_EXAMPLES_PTYTEST_POLL=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_INTELHEX_BINARY=y
CONFIG_MM_REGIONS=2
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_PSEUDOTERM=y
CONFIG_RAM_SIZE=114688
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_SERIAL_TERMIOS=y
CONFIG_START_DAY=6
CONFIG_START_MONTH=12
CONFIG_START_YEAR=2011
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_PWR=y
CONFIG_STM32_SPI1=y
CONFIG_STM32_USART2=y
CONFIG_STM32_USART3=y
CONFIG_SYSTEM_NSH=y
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="nsh_main"
@@ -0,0 +1,64 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_FPU is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_CMDPARMS is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="aiit-arm32-board"
CONFIG_ARCH_BOARD_STM32F4_AIIT=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARD_LATE_INITIALIZE=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_BUILTIN=y
CONFIG_EXAMPLES_RGBLED=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_INTELHEX_BINARY=y
CONFIG_MM_REGIONS=2
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_PWM=y
CONFIG_RAM_SIZE=114688
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RGBLED=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_START_DAY=6
CONFIG_START_MONTH=12
CONFIG_START_YEAR=2011
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_OTGFS=y
CONFIG_STM32_PWR=y
CONFIG_STM32_SPI1=y
CONFIG_STM32_TIM1=y
CONFIG_STM32_TIM1_PWM=y
CONFIG_STM32_TIM2=y
CONFIG_STM32_TIM2_CH2OUT=y
CONFIG_STM32_TIM2_CHANNEL=2
CONFIG_STM32_TIM2_PWM=y
CONFIG_STM32_TIM3=y
CONFIG_STM32_TIM3_CH3OUT=y
CONFIG_STM32_TIM3_CHANNEL=3
CONFIG_STM32_TIM3_PWM=y
CONFIG_STM32_USART2=y
CONFIG_SYSTEM_NSH=y
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="rgbled_main"
@@ -0,0 +1,100 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_FPU is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_CMDPARMS is not set
CONFIG_ALLOW_BSD_COMPONENTS=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="aiit-arm32-board"
CONFIG_ARCH_BOARD_STM32F4_AIIT=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARDCTL_USBDEVCTRL=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_BUILTIN=y
CONFIG_CLOCK_MONOTONIC=y
CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_ELF=y
CONFIG_EXAMPLES_HELLO=m
CONFIG_FAT_LCNAMES=y
CONFIG_FAT_LFN=y
CONFIG_FS_FAT=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_HOST_WINDOWS=y
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_ENVPATH=y
CONFIG_LIBC_EXECFUNCS=y
CONFIG_NET=y
CONFIG_NETDB_DNSCLIENT=y
CONFIG_NETDB_DNSSERVER_IPv4ADDR=0x0
CONFIG_NETDEVICES=y
CONFIG_NETINIT_DHCPC=y
CONFIG_NETINIT_DRIPADDR=0x0
CONFIG_NETINIT_MACADDR_1=0xdeadcafe
CONFIG_NETINIT_NETMASK=0x0
CONFIG_NETINIT_NOMAC=y
CONFIG_NETINIT_THREAD=y
CONFIG_NETUTILS_DHCPC=y
CONFIG_NETUTILS_TELNETD=y
CONFIG_NETUTILS_WEBCLIENT=y
CONFIG_NET_ARP_SEND=y
CONFIG_NET_BROADCAST=y
CONFIG_NET_ICMP=y
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_LOOPBACK=y
CONFIG_NET_STATISTICS=y
CONFIG_NET_TCP=y
CONFIG_NET_TCP_WRITE_BUFFERS=y
CONFIG_NET_UDP=y
CONFIG_NFS=y
CONFIG_NFS_STATISTICS=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_FILE_APPS=y
CONFIG_NSH_LINELEN=128
CONFIG_NSH_READLINE=y
CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=3072
CONFIG_PATH_INITIAL="/mnt/nfs/bin"
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=114688
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RNDIS=y
CONFIG_SCHED_LPWORK=y
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_SENSORS=y
CONFIG_START_DAY=13
CONFIG_START_MONTH=9
CONFIG_START_YEAR=2014
CONFIG_STM32_DMA2=y
CONFIG_STM32_DMACAPABLE=y
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_OTGFS=y
CONFIG_STM32_PWR=y
CONFIG_STM32_SPI1=y
CONFIG_STM32_USART2=y
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_NSH_SYMTAB=y
CONFIG_SYSTEM_NSH_SYMTAB_ARRAYNAME="g_symtab"
CONFIG_SYSTEM_NSH_SYMTAB_COUNTNAME="g_nsymbols"
CONFIG_SYSTEM_PING=y
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USBDEV=y
CONFIG_USERMAIN_STACKSIZE=3072
CONFIG_USER_ENTRYPOINT="nsh_main"
@@ -0,0 +1,52 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_FPU is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_CMDPARMS is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="aiit-arm32-board"
CONFIG_ARCH_BOARD_STM32F4_AIIT=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARD_LATE_INITIALIZE=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_BUILTIN=y
CONFIG_FS_PROCFS=y
CONFIG_HOST_WINDOWS=y
CONFIG_INTELHEX_BINARY=y
CONFIG_MM_REGIONS=2
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=114688
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_SCHED_SPORADIC=y
CONFIG_SCHED_SPORADIC_MAXREPL=5
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_START_DAY=6
CONFIG_START_MONTH=3
CONFIG_START_YEAR=2021
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_PWR=y
CONFIG_STM32_SPI1=y
CONFIG_STM32_USART6=y
CONFIG_SYSTEM_NSH=y
CONFIG_TESTING_OSTEST=y
CONFIG_USART6_RXBUFSIZE=128
CONFIG_USART6_SERIAL_CONSOLE=y
CONFIG_USART6_TXBUFSIZE=128
CONFIG_USEC_PER_TICK=1000
CONFIG_USER_ENTRYPOINT="nsh_main"
@@ -0,0 +1,67 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_FPU is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_CMDPARMS is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="aiit-arm32-board"
CONFIG_ARCH_BOARD_STM32F4_AIIT=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARD_LATE_INITIALIZE=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_BUILTIN=y
CONFIG_DRIVERS_VIDEO=y
CONFIG_EXAMPLES_FB=y
CONFIG_EXAMPLES_HELLO=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_INTELHEX_BINARY=y
CONFIG_LCD=y
CONFIG_LCD_FRAMEBUFFER=y
CONFIG_LCD_NOGETRUN=y
CONFIG_LCD_PORTRAIT=y
CONFIG_LCD_ST7789=y
CONFIG_MM_REGIONS=2
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_NXFONTS_DISABLE_1BPP=y
CONFIG_NXFONTS_DISABLE_24BPP=y
CONFIG_NXFONTS_DISABLE_2BPP=y
CONFIG_NXFONTS_DISABLE_32BPP=y
CONFIG_NXFONTS_DISABLE_4BPP=y
CONFIG_NXFONTS_DISABLE_8BPP=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=114688
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_SPI_CMDDATA=y
CONFIG_START_DAY=6
CONFIG_START_MONTH=12
CONFIG_START_YEAR=2011
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_PWR=y
CONFIG_STM32_SPI1=y
CONFIG_STM32_USART2=y
CONFIG_SYSTEM_NSH=y
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="nsh_main"
CONFIG_VIDEO_FB=y
@@ -0,0 +1,70 @@
############################################################################
# boards/arm/stm32/aiit-arm32-board/configs/testlibcxx/Make.defs
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/.config
include $(TOPDIR)/tools/Config.mk
include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs
LDSCRIPT = ld.script
ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
ARCHSCRIPT = -T "${shell cygpath -w \
$(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}"
else
ARCHSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
endif
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
ARCHOPTIMIZATION = -g
endif
ifneq ($(CONFIG_DEBUG_NOOPT),y)
ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing \
-fno-strength-reduce -fomit-frame-pointer
endif
ARCHCFLAGS = -fno-builtin
ifeq ($(CONFIG_CXX_EXCEPTION),y)
ARCHCPUFLAGSXX = -fno-builtin
else
ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fcheck-new
endif
ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
ARCHWARNINGSXX = -Wall -Wshadow -Wundef
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS := $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) \
$(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \
$(ARCHCPUFLAGS) $(ARCHXXINCLUDES)
CXXFLAGS += $(ARCHDEFINES) $(EXTRAFLAGS) -pipe -std=c++11
CXXFLAGS += -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
CXXFLAGS += -pedantic -D_DEBUG -D_LIBCPP_BUILD_STATIC -D_LIBCPP_NO_EXCEPTIONS
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
AFLAGS := $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
LDFLAGS += -g
endif
@@ -0,0 +1,52 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_FPU is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="aiit-arm32-board"
CONFIG_ARCH_BOARD_STM32F4_AIIT=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_BUILTIN=y
CONFIG_C99_BOOL8=y
CONFIG_DISABLE_MOUNTPOINT=y
CONFIG_EXAMPLES_HELLOXX=y
CONFIG_HAVE_CXX=y
CONFIG_HOST_WINDOWS=y
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBCXX=y
CONFIG_LIBCXXABI=y
CONFIG_LIBC_FLOATINGPOINT=y
CONFIG_LIBC_LOCALTIME=y
CONFIG_LIBM=y
CONFIG_MM_REGIONS=2
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=114688
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_ONEXIT=y
CONFIG_SCHED_ONEXIT_MAX=4
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_START_DAY=2
CONFIG_START_MONTH=11
CONFIG_START_YEAR=2012
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_USART2=y
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_SYSTEM_NSH=y
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="nsh_main"
@@ -0,0 +1,60 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_FPU is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="aiit-arm32-board"
CONFIG_ARCH_BOARD_STM32F4_AIIT=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_BUILTIN=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_FAT_LCNAMES=y
CONFIG_FAT_LFN=y
CONFIG_FS_FAT=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_INTELHEX_BINARY=y
CONFIG_MM_REGIONS=2
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_DISABLE_IFUPDOWN=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=114688
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_HPWORKPRIORITY=192
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_START_DAY=27
CONFIG_START_YEAR=2013
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_OTGFS=y
CONFIG_STM32_PWR=y
CONFIG_STM32_SPI1=y
CONFIG_STM32_USART2=y
CONFIG_SYSLOG_CHAR=y
CONFIG_SYSLOG_DEVPATH="/dev/ttyS0"
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_USBMSC=y
CONFIG_SYSTEM_USBMSC_DEVPATH1="/dev/ram0"
CONFIG_TASK_NAME_SIZE=0
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USBDEV=y
CONFIG_USBMSC=y
CONFIG_USBMSC_REMOVABLE=y
CONFIG_USER_ENTRYPOINT="nsh_main"
@@ -0,0 +1,59 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_FPU is not set
# CONFIG_DEV_CONSOLE is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="aiit-arm32-board"
CONFIG_ARCH_BOARD_STM32F4_AIIT=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARDCTL_USBDEVCTRL=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_BUILTIN=y
CONFIG_CDCACM=y
CONFIG_CDCACM_CONSOLE=y
CONFIG_CDCACM_RXBUFSIZE=256
CONFIG_CDCACM_TXBUFSIZE=256
CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_EXAMPLES_HELLO=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_INTELHEX_BINARY=y
CONFIG_MM_REGIONS=2
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAMLOG=y
CONFIG_RAMLOG_BUFSIZE=4096
CONFIG_RAMLOG_SYSLOG=y
CONFIG_RAM_SIZE=114688
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_STACK_COLORATION=y
CONFIG_START_DAY=27
CONFIG_START_YEAR=2013
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_OTGFS=y
CONFIG_STM32_PWR=y
CONFIG_STM32_SPI1=y
CONFIG_STM32_USART2=y
CONFIG_SYSTEM_NSH=y
CONFIG_USBDEV=y
CONFIG_USER_ENTRYPOINT="nsh_main"
@@ -0,0 +1,111 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_MMCSD_HAVE_CARDDETECT is not set
# CONFIG_MMCSD_HAVE_WRITEPROTECT is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_CMDPARMS is not set
# CONFIG_SPI_CALLBACK is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="aiit-arm32-board"
CONFIG_ARCH_BOARD_STM32F4_AIIT=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARMV7M_LAZYFPU=y
CONFIG_BOARDCTL_RESET=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_BUILTIN=y
CONFIG_CODECS_HASH_MD5=y
CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_HARDFAULT_ALERT=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_DRIVERS_WIRELESS=y
CONFIG_ELF=y
CONFIG_EXAMPLES_HELLO=m
CONFIG_EXAMPLES_WEBSERVER=y
CONFIG_FAT_LFN=y
CONFIG_FS_FAT=y
CONFIG_FS_FATTIME=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_HEAP_COLORATION=y
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_ENVPATH=y
CONFIG_LIBC_EXECFUNCS=y
CONFIG_MMCSD=y
CONFIG_MM_REGIONS=2
CONFIG_NET=y
CONFIG_NETDB_DNSCLIENT=y
CONFIG_NETDEVICES=y
CONFIG_NETINIT_NETLOCAL=y
CONFIG_NETUTILS_CODECS=y
CONFIG_NETUTILS_FTPC=y
CONFIG_NETUTILS_HTTPD_DIRLIST=y
CONFIG_NETUTILS_HTTPD_SENDFILE=y
CONFIG_NETUTILS_TELNETD=y
CONFIG_NETUTILS_WEBCLIENT=y
CONFIG_NETUTILS_WEBSERVER=y
CONFIG_NET_BROADCAST=y
CONFIG_NET_ICMP=y
CONFIG_NET_TCP_NO_STACK=y
CONFIG_NET_UDP_NO_STACK=y
CONFIG_NET_USRSOCK=y
CONFIG_NET_USRSOCK_CONNS=16
CONFIG_NET_USRSOCK_UDP=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_PATH_INITIAL="/mnt/sd0/bin"
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=114688
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_READLINE_CMD_HISTORY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_LPWORKPRIORITY=30
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_SENDFILE_BUFSIZE=1024
CONFIG_STACK_COLORATION=y
CONFIG_START_DAY=22
CONFIG_START_MONTH=10
CONFIG_START_YEAR=2019
CONFIG_STM32_DMA1=y
CONFIG_STM32_DMA2=y
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_PWR=y
CONFIG_STM32_SPI2=y
CONFIG_STM32_SPI2_DMA=y
CONFIG_STM32_SPI3=y
CONFIG_STM32_SPI3_DMA=y
CONFIG_STM32_SPI_DMA=y
CONFIG_STM32_USART2=y
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_SYSTEM_DHCPC_RENEW=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_NSH_SYMTAB=y
CONFIG_SYSTEM_NSH_SYMTAB_ARRAYNAME="g_symtab"
CONFIG_SYSTEM_NSH_SYMTAB_COUNTNAME="g_nsymbols"
CONFIG_SYSTEM_NTPC=y
CONFIG_TESTING_OSTEST=y
CONFIG_TESTING_OSTEST_FPUSIZE=132
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="nsh_main"
CONFIG_WIRELESS_GS2200M=y
CONFIG_WL_GS2200M=y
CONFIG_WL_GS2200M_DISABLE_DHCPC=y
CONFIG_WL_GS2200M_SPI_FREQUENCY=10000000
@@ -0,0 +1,56 @@
############################################################################
# boards/arm/stm32/aiit-arm32-board/configs/winbuild/Make.defs
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)\.config
include $(TOPDIR)\tools\Config.mk
include $(TOPDIR)\arch\arm\src\armv7-m\Toolchain.defs
LDSCRIPT = ld.script
ARCHSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
ARCHOPTIMIZATION = -g
endif
ifneq ($(CONFIG_DEBUG_NOOPT),y)
ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
endif
ARCHCFLAGS = -fno-builtin
ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
ARCHWARNINGSXX = -Wall -Wshadow -Wundef
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS := $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
AFLAGS := $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)\binfmt\libnxflat\gnu-nxflat-pcrel.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
LDFLAGS += -g
endif
@@ -0,0 +1,43 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_FPU is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="aiit-arm32-board"
CONFIG_ARCH_BOARD_STM32F4_AIIT=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_CONSOLE_SYSLOG=y
CONFIG_DISABLE_ENVIRON=y
CONFIG_DISABLE_MOUNTPOINT=y
CONFIG_EXPERIMENTAL=y
CONFIG_HOST_WINDOWS=y
CONFIG_INTELHEX_BINARY=y
CONFIG_MM_REGIONS=2
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=114688
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SDCLONE_DISABLE=y
CONFIG_START_DAY=21
CONFIG_START_MONTH=9
CONFIG_START_YEAR=2009
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_USART2=y
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_TESTING_OSTEST=y
CONFIG_TESTING_OSTEST_NBARRIER_THREADS=3
CONFIG_TESTING_OSTEST_STACKSIZE=2048
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="ostest_main"
CONFIG_WINDOWS_NATIVE=y
@@ -0,0 +1,57 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_FPU is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_CMDPARMS is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="aiit-arm32-board"
CONFIG_ARCH_BOARD_STM32F4_AIIT=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARD_LATE_INITIALIZE=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_BUILTIN=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_INTELHEX_BINARY=y
CONFIG_MM_REGIONS=2
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_PWM=y
CONFIG_RAM_SIZE=114688
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_SENSORS=y
CONFIG_SENSORS_XEN1210=y
CONFIG_START_DAY=17
CONFIG_START_MONTH=8
CONFIG_START_YEAR=2016
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_PWR=y
CONFIG_STM32_SPI1=y
CONFIG_STM32_TIM1=y
CONFIG_STM32_TIM1_CH1OUT=y
CONFIG_STM32_TIM1_PWM=y
CONFIG_STM32_USART2=y
CONFIG_SYSTEM_NSH=y
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="nsh_main"
@@ -0,0 +1,456 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/include/board.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_ARM_STM32_STM32F4AIIT_INCLUDE_BOARD_H
#define __BOARDS_ARM_STM32_STM32F4AIIT_INCLUDE_BOARD_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#ifndef __ASSEMBLY__
# include <stdint.h>
# include <stdbool.h>
#endif
/* Do not include STM32-specific header files here */
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Clocking *****************************************************************/
/* The STM32F4 Discovery board features a single 8MHz crystal.
* Space is provided for a 32kHz RTC backup crystal, but it is not stuffed.
*
* This is the canonical configuration:
* System Clock source : PLL (HSE)
* SYSCLK(Hz) : 168000000 Determined by PLL
* configuration
* HCLK(Hz) : 168000000 (STM32_RCC_CFGR_HPRE)
* AHB Prescaler : 1 (STM32_RCC_CFGR_HPRE)
* APB1 Prescaler : 4 (STM32_RCC_CFGR_PPRE1)
* APB2 Prescaler : 2 (STM32_RCC_CFGR_PPRE2)
* HSE Frequency(Hz) : 8000000 (STM32_BOARD_XTAL)
* PLLM : 8 (STM32_PLLCFG_PLLM)
* PLLN : 336 (STM32_PLLCFG_PLLN)
* PLLP : 2 (STM32_PLLCFG_PLLP)
* PLLQ : 7 (STM32_PLLCFG_PLLQ)
* Main regulator output voltage : Scale1 mode Needed for high speed
* SYSCLK
* Flash Latency(WS) : 5
* Prefetch Buffer : OFF
* Instruction cache : ON
* Data cache : ON
* Require 48MHz for USB OTG FS, : Enabled
* SDIO and RNG clock
*/
/* HSI - 16 MHz RC factory-trimmed
* LSI - 32 KHz RC
* HSE - On-board crystal frequency is 8MHz
* LSE - 32.768 kHz
*/
#define STM32_BOARD_XTAL 8000000ul
#define STM32_HSI_FREQUENCY 16000000ul
#define STM32_LSI_FREQUENCY 32000
#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL
#define STM32_LSE_FREQUENCY 32768
/* Main PLL Configuration.
*
* PLL source is HSE
* PLL_VCO = (STM32_HSE_FREQUENCY / PLLM) * PLLN
* = (8,000,000 / 8) * 336
* = 336,000,000
* SYSCLK = PLL_VCO / PLLP
* = 336,000,000 / 2 = 168,000,000
* USB OTG FS, SDIO and RNG Clock
* = PLL_VCO / PLLQ
* = 48,000,000
*/
#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(8)
#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(336)
#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2
#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(7)
#define STM32_SYSCLK_FREQUENCY 168000000ul
/* AHB clock (HCLK) is SYSCLK (168MHz) */
#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */
#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY
/* APB1 clock (PCLK1) is HCLK/4 (42MHz) */
#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd4 /* PCLK1 = HCLK / 4 */
#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/4)
/* Timers driven from APB1 will be twice PCLK1 */
#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM12_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM13_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM14_CLKIN (2*STM32_PCLK1_FREQUENCY)
/* APB2 clock (PCLK2) is HCLK/2 (84MHz) */
#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLKd2 /* PCLK2 = HCLK / 2 */
#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/2)
/* Timers driven from APB2 will be twice PCLK2 */
#define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY)
#define STM32_APB2_TIM8_CLKIN (2*STM32_PCLK2_FREQUENCY)
#define STM32_APB2_TIM9_CLKIN (2*STM32_PCLK2_FREQUENCY)
#define STM32_APB2_TIM10_CLKIN (2*STM32_PCLK2_FREQUENCY)
#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY)
/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
* otherwise frequency is 2xAPBx.
* Note: TIM1,8 are on APB2, others on APB1
*/
#define BOARD_TIM1_FREQUENCY STM32_HCLK_FREQUENCY
#define BOARD_TIM2_FREQUENCY (STM32_HCLK_FREQUENCY / 2)
#define BOARD_TIM3_FREQUENCY (STM32_HCLK_FREQUENCY / 2)
#define BOARD_TIM4_FREQUENCY (STM32_HCLK_FREQUENCY / 2)
#define BOARD_TIM5_FREQUENCY (STM32_HCLK_FREQUENCY / 2)
#define BOARD_TIM6_FREQUENCY (STM32_HCLK_FREQUENCY / 2)
#define BOARD_TIM7_FREQUENCY (STM32_HCLK_FREQUENCY / 2)
#define BOARD_TIM8_FREQUENCY STM32_HCLK_FREQUENCY
/* SDIO dividers. Note that slower clocking is required when DMA is disabled
* in order to avoid RX overrun/TX underrun errors due to delayed responses
* to service FIFOs in interrupt driven mode. These values have not been
* tuned!!!
*
* SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(118+2)=400 KHz
*/
#define SDIO_INIT_CLKDIV (118 << SDIO_CLKCR_CLKDIV_SHIFT)
/* DMA ON: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz
* DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)=12 MHz
*/
#ifdef CONFIG_SDIO_DMA
# define SDIO_MMCXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT)
#else
# define SDIO_MMCXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT)
#endif
/* DMA ON: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz
* DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)=12 MHz
*/
#ifdef CONFIG_SDIO_DMA
# define SDIO_SDXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT)
#else
# define SDIO_SDXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT)
#endif
/* LED definitions **********************************************************/
/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs
* in any way. The following definitions are used to access individual LEDs.
*/
/* LED index values for use with board_userled() */
#define BOARD_LED1 0
#define BOARD_LED2 1
#define BOARD_LED3 2
#define BOARD_LED4 3
#define BOARD_NLEDS 4
#define BOARD_LED_GREEN BOARD_LED1
#define BOARD_LED_ORANGE BOARD_LED2
#define BOARD_LED_RED BOARD_LED3
#define BOARD_LED_BLUE BOARD_LED4
/* LED bits for use with board_userled_all() */
#define BOARD_LED1_BIT (1 << BOARD_LED1)
#define BOARD_LED2_BIT (1 << BOARD_LED2)
#define BOARD_LED3_BIT (1 << BOARD_LED3)
#define BOARD_LED4_BIT (1 << BOARD_LED4)
/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 4 LEDs on
* board the aiit-arm32-board. The following definitions describe how NuttX
* controls the LEDs:
*/
#define LED_STARTED 0 /* LED1 */
#define LED_HEAPALLOCATE 1 /* LED2 */
#define LED_IRQSENABLED 2 /* LED1 + LED2 */
#define LED_STACKCREATED 3 /* LED3 */
#define LED_INIRQ 4 /* LED1 + LED3 */
#define LED_SIGNAL 5 /* LED2 + LED3 */
#define LED_ASSERTION 6 /* LED1 + LED2 + LED3 */
#define LED_PANIC 7 /* N/C + N/C + N/C + LED4 */
/* Button definitions *******************************************************/
/* The STM32F4 Discovery supports one button: */
#define BUTTON_USER 0
#define NUM_BUTTONS 1
#define BUTTON_USER_BIT (1 << BUTTON_USER)
/* Alternate function pin selections ****************************************/
/* CAN */
#ifndef CONFIG_STM32_FSMC
# define GPIO_CAN1_RX GPIO_CAN1_RX_3
# define GPIO_CAN1_TX GPIO_CAN1_TX_3
#endif
#ifndef CONFIG_STM32_ETHMAC
# define GPIO_CAN2_RX GPIO_CAN2_RX_1
# define GPIO_CAN2_TX GPIO_CAN2_TX_1
#endif
/* USART1 */
# define GPIO_USART1_TX GPIO_USART1_TX_1
# define GPIO_USART1_RX GPIO_USART1_RX_1
#ifdef CONFIG_USART1_RS485
/* Lets use for RS485 on pins: PB6 and PB7 */
# define GPIO_USART1_TX GPIO_USART1_TX_2
# define GPIO_USART1_RX GPIO_USART1_RX_2
/* RS485 DIR pin: PA15 */
# define GPIO_USART1_RS485_DIR (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz |\
GPIO_OUTPUT_CLEAR | GPIO_PORTA | GPIO_PIN15)
#endif
/* USART2:
*
* The STM32F4 Discovery has no on-board serial devices, but the console is
* brought out to PA2 (TX) and PA3 (RX) for connection to an external serial
* device. (See the README.txt file for other options)
*
* These pins selections, however, conflict with pin usage on the
* STM32F4DIS-BB.
*/
#ifndef CONFIG_STM32F4DISBB
# define GPIO_USART2_RX GPIO_USART2_RX_1 /* PA3, P1 pin 13 */
# define GPIO_USART2_TX GPIO_USART2_TX_1 /* PA2, P1 pin 14 */
# define GPIO_USART2_CTS GPIO_USART2_CTS_1 /* PA0, P1 pin 11 */
# define GPIO_USART2_RTS GPIO_USART2_RTS_1 /* PA1, P1 pin 12 (conflict with USER button) */
#endif
/* USART3:
*
* Used in pseudoterm configuration and also with the BT860 HCI UART.
* RTS/CTS Flow control support is needed by the HCI UART.
*
* There are conflicts with the STM32F4DIS-BB Ethernet in this configuration
* when Ethernet is enabled:
*
* PB-11 conflicts with Ethernet TXEN
* PB-13 conflicts with Ethernet TXD1
*
* UART3 TXD and RXD are available on CON4 PD8 and PD8 of the STM32F4DIS-BB,
* respectively, but not CTS or RTS. For now we assume that Ethernet is not
* enabled if USART3 is used in a configuration with the STM32F4DIS-BB.
*/
#define GPIO_USART3_TX GPIO_USART3_TX_1 /* PB10, P1 pin 34 (also MP45DT02 CLK_IN) */
#define GPIO_USART3_RX GPIO_USART3_RX_1 /* PB11, P1 pin 35 */
#define GPIO_USART3_CTS GPIO_USART3_CTS_1 /* PB13, P1 pin 37 */
#define GPIO_USART3_RTS GPIO_USART3_RTS_1 /* PB14, P1 pin 38 */
/* USART6:
*
* The STM32F4DIS-BB base board provides RS-232 drivers and a DB9 connector
* for USART6. This is the preferred serial console for use with the
* STM32F4DIS-BB.
*
* NOTE: CTS and RTS are not brought out to the RS-232 connector on the
* baseboard.
*/
#define GPIO_USART6_RX GPIO_USART6_RX_1 /* PC7 (also I2S3_MCK and P2 pin 48) */
#define GPIO_USART6_TX GPIO_USART6_TX_1 /* PC6 (also P2 pin 47) */
/* PWM
*
* The STM32F4 Discovery has no real on-board PWM devices, but the board
* can be configured to output a pulse train using TIM4 CH2 on PD13.
*/
#define GPIO_TIM4_CH2OUT GPIO_TIM4_CH2OUT_2
/* RGB LED
*
* R = TIM1 CH1 on PE9 | G = TIM2 CH2 on PA1 | B = TIM3 CH3 on PB0
*/
#define GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_2
#define GPIO_TIM2_CH2OUT GPIO_TIM2_CH2OUT_1
#define GPIO_TIM3_CH3OUT GPIO_TIM3_CH3OUT_1
/* SPI - There is a MEMS device on SPI1 using these pins: */
#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1
#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1
#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1
/* SPI DMA -- As used for I2S DMA transfer with the audio configuration */
#define DMACHAN_SPI1_RX DMAMAP_SPI1_RX_1
#define DMACHAN_SPI1_TX DMAMAP_SPI1_TX_1
/* SPI2 - Test MAX31855 on SPI2 PB10 = SCK, PB14 = MISO */
#define GPIO_SPI2_MISO GPIO_SPI2_MISO_2
#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_2
#define GPIO_SPI2_SCK GPIO_SPI2_SCK_2
/* SPI2 DMA -- As used for MMC/SD SPI */
#define DMACHAN_SPI2_RX DMAMAP_SPI2_RX
#define DMACHAN_SPI2_TX DMAMAP_SPI2_TX
/* SPI3 DMA -- As used for I2S DMA transfer with the audio configuration */
#define GPIO_SPI3_MISO GPIO_SPI3_MISO_1
#define GPIO_SPI3_MOSI GPIO_SPI3_MOSI_1
#define GPIO_SPI3_SCK GPIO_SPI3_SCK_1
#define DMACHAN_SPI3_RX DMAMAP_SPI3_RX_1
#define DMACHAN_SPI3_TX DMAMAP_SPI3_TX_1
/* I2S3 - CS43L22 configuration uses I2S3 */
#define GPIO_I2S3_SD GPIO_I2S3_SD_2
#define GPIO_I2S3_CK GPIO_I2S3_CK_2
#define GPIO_I2S3_WS GPIO_I2S3_WS_1
#define DMACHAN_I2S3_RX DMAMAP_SPI3_RX_2
#define DMACHAN_I2S3_TX DMAMAP_SPI3_TX_2
/* I2C. Only I2C1 is available on the aiit-arm32-board. I2C1_SCL and
* I2C1_SDA are available on the following pins:
*
* - PB6 is I2C1_SCL
* - PB9 is I2C1_SDA
*/
#define GPIO_I2C1_SCL GPIO_I2C1_SCL_1
#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2
/* Timer Inputs/Outputs (see the README.txt file for options) */
#define GPIO_TIM2_CH1IN GPIO_TIM2_CH1IN_2
#define GPIO_TIM2_CH2IN GPIO_TIM2_CH2IN_1
#define GPIO_TIM8_CH1IN GPIO_TIM8_CH1IN_1
#define GPIO_TIM8_CH2IN GPIO_TIM8_CH2IN_1
/* Ethernet *****************************************************************/
#if defined(CONFIG_STM32F4AIIT) && defined(CONFIG_STM32_ETHMAC)
/* RMII interface to the LAN8720 PHY */
# ifndef CONFIG_STM32_RMII
# error CONFIG_STM32_RMII must be defined
# endif
/* Clocking is provided by an external 25Mhz XTAL */
# ifndef CONFIG_STM32_RMII_EXTCLK
# error CONFIG_STM32_RMII_EXTCLK must be defined
# endif
/* Pin disambiguation */
# define GPIO_ETH_RMII_TX_EN GPIO_ETH_RMII_TX_EN_1
# define GPIO_ETH_RMII_TXD0 GPIO_ETH_RMII_TXD0_1
# define GPIO_ETH_RMII_TXD1 GPIO_ETH_RMII_TXD1_1
# define GPIO_ETH_PPS_OUT GPIO_ETH_PPS_OUT_1
#endif
#ifdef CONFIG_MMCSD_SPI
#define GPIO_MMCSD_NSS (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | \
GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN12)
#define GPIO_MMCSD_NCD (GPIO_INPUT | GPIO_FLOAT | GPIO_EXTI | \
GPIO_PORTC | GPIO_PIN1)
#endif
/* DMA Channel/Stream Selections ********************************************/
/* Stream selections are arbitrary for now but might become important in the
* future if we set aside more DMA channels/streams.
*
* SDIO DMA
* DMAMAP_SDIO_1 = Channel 4, Stream 3
* DMAMAP_SDIO_2 = Channel 4, Stream 6
*/
#define DMAMAP_SDIO DMAMAP_SDIO_1
/* ZERO CROSS pin definition */
#define BOARD_ZEROCROSS_GPIO \
(GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTD|GPIO_PIN0)
/* LIS3DSH */
#define GPIO_LIS3DSH_EXT0 \
(GPIO_INPUT|GPIO_FLOAT|GPIO_AF0|GPIO_SPEED_50MHz|GPIO_PORTE|GPIO_PIN0)
#define BOARD_LIS3DSH_GPIO_EXT0 GPIO_LIS3DSH_EXT0
/* XEN1210 magnetic sensor */
#define GPIO_XEN1210_INT (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|\
GPIO_OPENDRAIN|GPIO_PORTA|GPIO_PIN5)
#define GPIO_CS_XEN1210 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4)
#define BOARD_XEN1210_GPIO_INT GPIO_XEN1210_INT
/* Define what timer to use as XEN1210 CLK (will use channel 1) */
#define BOARD_XEN1210_PWMTIMER 1
#endif /* __BOARDS_ARM_STM32_STM32F4AIIT_INCLUDE_BOARD_H */
@@ -0,0 +1,103 @@
############################################################################
# boards/arm/stm32/aiit-arm32-board/kernel/Makefile
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/Make.defs
# The entry point name (if none is provided in the .config file)
CONFIG_USER_ENTRYPOINT ?= user_start
ENTRYPT = $(patsubst "%",%,$(CONFIG_USER_ENTRYPOINT))
# Get the paths to the libraries and the links script path in format that
# is appropriate for the host OS
ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
# Windows-native toolchains
USER_LIBPATHS = ${shell for path in $(USERLIBS); do dir=`dirname $(TOPDIR)$(DELIM)$$path`;echo "-L\"`cygpath -w $$dir`\"";done}
USER_LDSCRIPT = -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)memory.ld}"
USER_LDSCRIPT += -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)user-space.ld}"
USER_HEXFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.hex}"
USER_SRECFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.srec}"
USER_BINFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.bin}"
else
# Linux/Cygwin-native toolchain
USER_LIBPATHS = $(addprefix -L$(TOPDIR)$(DELIM),$(dir $(USERLIBS)))
USER_LDSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)memory.ld
USER_LDSCRIPT += -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)user-space.ld
USER_HEXFILE += "$(TOPDIR)$(DELIM)nuttx_user.hex"
USER_SRECFILE += "$(TOPDIR)$(DELIM)nuttx_user.srec"
USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin"
endif
USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT)
USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS))))
USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}"
# Source files
CSRCS = stm32_userspace.c
COBJS = $(CSRCS:.c=$(OBJEXT))
OBJS = $(COBJS)
# Targets:
all: $(TOPDIR)$(DELIM)nuttx_user.elf $(TOPDIR)$(DELIM)User.map
.PHONY: nuttx_user.elf depend clean distclean
$(COBJS): %$(OBJEXT): %.c
$(call COMPILE, $<, $@)
# Create the nuttx_user.elf file containing all of the user-mode code
nuttx_user.elf: $(OBJS)
$(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) $(USER_LIBGCC) --end-group
$(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf
@echo "LD: nuttx_user.elf"
$(Q) cp -a nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.elf
ifeq ($(CONFIG_INTELHEX_BINARY),y)
@echo "CP: nuttx_user.hex"
$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O ihex nuttx_user.elf $(USER_HEXFILE)
endif
ifeq ($(CONFIG_MOTOROLA_SREC),y)
@echo "CP: nuttx_user.srec"
$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O srec nuttx_user.elf $(USER_SRECFILE)
endif
ifeq ($(CONFIG_RAW_BINARY),y)
@echo "CP: nuttx_user.bin"
$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O binary nuttx_user.elf $(USER_BINFILE)
endif
$(TOPDIR)$(DELIM)User.map: nuttx_user.elf
@echo "MK: User.map"
$(Q) $(NM) nuttx_user.elf >$(TOPDIR)$(DELIM)User.map
$(Q) $(CROSSDEV)size nuttx_user.elf
.depend:
depend: .depend
clean:
$(call DELFILE, nuttx_user.elf)
$(call DELFILE, "$(TOPDIR)$(DELIM)nuttx_user.*")
$(call DELFILE, "$(TOPDIR)$(DELIM)User.map")
$(call CLEAN)
distclean: clean
@@ -0,0 +1,114 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/kernel/stm32_userspace.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdlib.h>
#include <nuttx/arch.h>
#include <nuttx/mm/mm.h>
#include <nuttx/wqueue.h>
#include <nuttx/userspace.h>
#if defined(CONFIG_BUILD_PROTECTED) && !defined(__KERNEL__)
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
#ifndef CONFIG_NUTTX_USERSPACE
# error "CONFIG_NUTTX_USERSPACE not defined"
#endif
#if CONFIG_NUTTX_USERSPACE != 0x08020000
# error "CONFIG_NUTTX_USERSPACE must be 0x08020000 to match memory.ld"
#endif
/****************************************************************************
* Public Data
****************************************************************************/
/* These 'addresses' of these values are setup by the linker script. They are
* not actual uint32_t storage locations! They are only used meaningfully in
* the following way:
*
* - The linker script defines, for example, the symbol_sdata.
* - The declaration extern uint32_t _sdata; makes C happy. C will believe
* that the value _sdata is the address of a uint32_t variable _data (it
* is not!).
* - We can recover the linker value then by simply taking the address of
* of _data. like: uint32_t *pdata = &_sdata;
*/
extern uint32_t _stext; /* Start of .text */
extern uint32_t _etext; /* End_1 of .text + .rodata */
extern const uint32_t _eronly; /* End+1 of read only section (.text + .rodata) */
extern uint32_t _sdata; /* Start of .data */
extern uint32_t _edata; /* End+1 of .data */
extern uint32_t _sbss; /* Start of .bss */
extern uint32_t _ebss; /* End+1 of .bss */
/* This is the user space entry point */
int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]);
const struct userspace_s userspace locate_data(".userspace") =
{
/* General memory map */
.us_entrypoint = (main_t)CONFIG_USER_ENTRYPOINT,
.us_textstart = (uintptr_t)&_stext,
.us_textend = (uintptr_t)&_etext,
.us_datasource = (uintptr_t)&_eronly,
.us_datastart = (uintptr_t)&_sdata,
.us_dataend = (uintptr_t)&_edata,
.us_bssstart = (uintptr_t)&_sbss,
.us_bssend = (uintptr_t)&_ebss,
/* Memory manager heap structure */
.us_heap = &g_mmheap,
/* Task/thread startup routines */
.task_startup = nxtask_startup,
/* Signal handler trampoline */
.signal_handler = up_signal_handler,
/* User-space work queue support (declared in include/nuttx/wqueue.h) */
#ifdef CONFIG_LIBC_USRWORK
.work_usrstart = work_usrstart,
#endif
};
/****************************************************************************
* Public Functions
****************************************************************************/
#endif /* CONFIG_BUILD_PROTECTED && !__KERNEL__ */
@@ -0,0 +1,95 @@
############################################################################
# boards/arm/stm32/aiit-arm32-board/scripts/Make.defs
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/.config
include $(TOPDIR)/tools/Config.mk
include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs
LDSCRIPT = ld.script
ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
ARCHSCRIPT = -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}"
else
ARCHSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
endif
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
ARCHOPTIMIZATION = -g
endif
ifneq ($(CONFIG_DEBUG_NOOPT),y)
ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fomit-frame-pointer
endif
ARCHCFLAGS = -fno-builtin
ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new
ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
ARCHWARNINGSXX = -Wall -Wshadow -Wundef
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
ifeq ($(CONFIG_ARMV7M_TOOLCHAIN_CLANGL),y)
ARCHCFLAGS += -nostdlib -ffreestanding
ARCHCXXFLAGS += -nostdlib -ffreestanding
else
ARCHCFLAGS += -funwind-tables
ARCHCXXFLAGS += -fno-rtti -funwind-tables
ifneq ($(CONFIG_DEBUG_NOOPT),y)
ARCHOPTIMIZATION += -fno-strength-reduce
endif
endif
CFLAGS := $(APPPATHS) $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
AFLAGS := $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048
# Loadable module definitions
CMODULEFLAGS = $(CFLAGS) -mlong-calls # --target1-abs
LDMODULEFLAGS = -r -e module_initialize
ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
LDMODULEFLAGS += -T "${shell cygpath -w $(TOPDIR)/libs/libc/modlib/gnu-elf.ld}"
else
LDMODULEFLAGS += -T $(TOPDIR)/libs/libc/modlib/gnu-elf.ld
endif
# ELF module definitions
CELFFLAGS = $(CFLAGS) -mlong-calls # --target1-abs
CXXELFFLAGS = $(CXXFLAGS) -mlong-calls # --target1-abs
LDELFFLAGS = -r -e main
ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
LDELFFLAGS += -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)gnu-elf.ld}"
else
LDELFFLAGS += -T $(BOARD_DIR)$(DELIM)scripts$(DELIM)gnu-elf.ld
endif
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
LDFLAGS += -g
endif
@@ -0,0 +1,126 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/scripts/gnu-elf.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
SECTIONS
{
.text 0x00000000 :
{
_stext = . ;
*(.text)
*(.text.*)
*(.gnu.warning)
*(.stub)
*(.glue_7)
*(.glue_7t)
*(.jcr)
/* C++ support: The .init and .fini sections contain specific logic
* to manage static constructors and destructors.
*/
*(.gnu.linkonce.t.*)
*(.init) /* Old ABI */
*(.fini) /* Old ABI */
_etext = . ;
}
.ARM.extab :
{
*(.ARM.extab*)
}
.ARM.exidx :
{
*(.ARM.exidx*)
}
.rodata :
{
_srodata = . ;
*(.rodata)
*(.rodata1)
*(.rodata.*)
*(.gnu.linkonce.r*)
_erodata = . ;
}
.data :
{
_sdata = . ;
*(.data)
*(.data1)
*(.data.*)
*(.gnu.linkonce.d*)
. = ALIGN(4);
_edata = . ;
}
/* C++ support. For each global and static local C++ object,
* GCC creates a small subroutine to construct the object. Pointers
* to these routines (not the routines themselves) are stored as
* simple, linear arrays in the .ctors section of the object file.
* Similarly, pointers to global/static destructor routines are
* stored in .dtors.
*/
.ctors :
{
_sctors = . ;
*(.ctors) /* Old ABI: Unallocated */
*(.init_array) /* New ABI: Allocated */
_edtors = . ;
}
.dtors :
{
_sdtors = . ;
*(.dtors) /* Old ABI: Unallocated */
*(.fini_array) /* New ABI: Allocated */
_edtors = . ;
}
.bss :
{
_sbss = . ;
*(.bss)
*(.bss.*)
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.b*)
*(COMMON)
. = ALIGN(4);
_ebss = . ;
}
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}
@@ -0,0 +1,96 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/scripts/kernel-space.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* NOTE: This depends on the memory.ld script having been included prior to
* this script.
*/
OUTPUT_ARCH(arm)
ENTRY(_stext)
SECTIONS
{
.text : {
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > kflash
.init_section : {
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > kflash
.ARM.extab : {
*(.ARM.extab*)
} > kflash
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} > kflash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
. = ALIGN(4);
_edata = ABSOLUTE(.);
} > ksram AT > kflash
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
_ebss = ABSOLUTE(.);
} > ksram
/* Stabs debugging sections */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}
@@ -0,0 +1,111 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/scripts/ld.script
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* The STM32F407VG has 1024Kb of FLASH beginning at address 0x0800:0000 and
* 192Kb of SRAM. SRAM is split up into three blocks:
*
* 1) 112Kb of SRAM beginning at address 0x2000:0000
* 2) 16Kb of SRAM beginning at address 0x2001:c000
* 3) 64Kb of CCM SRAM beginning at address 0x1000:0000
*
* When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
* where the code expects to begin execution by jumping to the entry point in
* the 0x0800:0000 address
* range.
*/
MEMORY
{
flash (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
sram (rwx) : ORIGIN = 0x20000000, LENGTH = 112K
}
OUTPUT_ARCH(arm)
ENTRY(_stext)
EXTERN(_vectors)
SECTIONS
{
.text : {
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > flash
.init_section : ALIGN(4) {
_sinit = ABSOLUTE(.);
KEEP(*(.init_array .init_array.*))
_einit = ABSOLUTE(.);
} > flash
.ARM.extab : ALIGN(4) {
*(.ARM.extab*)
} > flash
.ARM.exidx : ALIGN(4) {
__exidx_start = ABSOLUTE(.);
*(.ARM.exidx*)
__exidx_end = ABSOLUTE(.);
} > flash
_eronly = ABSOLUTE(.);
.data : ALIGN(4) {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
. = ALIGN(4);
_edata = ABSOLUTE(.);
} > sram AT > flash
.bss : ALIGN(4) {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
_ebss = ABSOLUTE(.);
} > sram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}
@@ -0,0 +1,85 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/scripts/memory.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* The STM32F407VG has 1024Kb of FLASH beginning at address 0x0800:0000 and
* 192Kb of SRAM. SRAM is split up into three blocks:
*
* 1) 112KB of SRAM beginning at address 0x2000:0000
* 2) 16KB of SRAM beginning at address 0x2001:c000
* 3) 64KB of CCM SRAM beginning at address 0x1000:0000
*
* When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
* where the code expects to begin execution by jumping to the entry point in
* the 0x0800:0000 address range.
*
* For MPU support, the kernel-mode NuttX section is assumed to be 128Kb of
* FLASH and 4Kb of SRAM. That is an excessive amount for the kernel which
* should fit into 64KB and, of course, can be optimized as needed (See
* also boards/arm/stm32/aiit-arm32-board/scripts/kernel-space.ld). Allowing the
* additional does permit addition debug instrumentation to be added to the
* kernel space without overflowing the partition.
*
* Alignment of the user space FLASH partition is also a critical factor:
* The user space FLASH partition will be spanned with a single region of
* size 2**n bytes. The alignment of the user-space region must be the same.
* As a consequence, as the user-space increases in size, the alignment
* requirement also increases.
*
* This alignment requirement means that the largest user space FLASH region
* you can have will be 512KB at it would have to be positioned at
* 0x08800000. If you change this address, don't forget to change the
* CONFIG_NUTTX_USERSPACE configuration setting to match and to modify
* the check in kernel/userspace.c.
*
* For the same reasons, the maximum size of the SRAM mapping is limited to
* 4KB. Both of these alignment limitations could be reduced by using
* multiple regions to map the FLASH/SDRAM range or perhaps with some
* clever use of subregions.
*
* A detailed memory map for the 112KB SRAM region is as follows:
*
* 0x20000 0000: Kernel .data region. Typical size: 0.1KB
* ------- ---- Kernel .bss region. Typical size: 1.8KB
* 0x20000 0800: Kernel IDLE thread stack (approximate). Size is
* determined by CONFIG_IDLETHREAD_STACKSIZE and
* adjustments for alignment. Typical is 1KB.
* ------- ---- Padded to 4KB
* 0x20000 1000: User .data region. Size is variable.
* ------- ---- User .bss region Size is variable.
* 0x20000 2000: Beginning of kernel heap. Size determined by
* CONFIG_MM_KERNEL_HEAPSIZE.
* ------- ---- Beginning of user heap. Can vary with other settings.
* 0x20001 c000: End+1 of CPU RAM
*/
MEMORY
{
/* 1024Kb FLASH */
kflash (rx) : ORIGIN = 0x08000000, LENGTH = 128K
uflash (rx) : ORIGIN = 0x08020000, LENGTH = 128K
xflash (rx) : ORIGIN = 0x08040000, LENGTH = 768K
/* 112Kb of contiguous SRAM */
ksram (rwx) : ORIGIN = 0x20000000, LENGTH = 4K
usram (rwx) : ORIGIN = 0x20001000, LENGTH = 4K
xsram (rwx) : ORIGIN = 0x20002000, LENGTH = 104K
}
@@ -0,0 +1,98 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/scripts/user-space.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* NOTE: This depends on the memory.ld script having been included prior to
* this script.
*/
OUTPUT_ARCH(arm)
SECTIONS
{
.userspace : {
*(.userspace)
} > uflash
.text : {
_stext = ABSOLUTE(.);
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > uflash
.init_section : {
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > uflash
.ARM.extab : {
*(.ARM.extab*)
} > uflash
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} > uflash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
. = ALIGN(4);
_edata = ABSOLUTE(.);
} > usram AT > uflash
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
_ebss = ABSOLUTE(.);
} > usram
/* Stabs debugging sections */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}
@@ -0,0 +1,184 @@
############################################################################
# boards/arm/stm32/aiit-arm32-board/src/Make.defs
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/Make.defs
CSRCS = stm32_boot.c stm32_bringup.c stm32_spi.c
ifeq ($(CONFIG_ARCH_LEDS),y)
CSRCS += stm32_autoleds.c
else
CSRCS += stm32_userleds.c
endif
ifeq ($(CONFIG_SCHED_CRITMONITOR),y)
CSRCS += stm32_critmon.c
endif
ifeq ($(CONFIG_AUDIO_CS43L22),y)
CSRCS += stm32_cs43l22.c
endif
ifeq ($(CONFIG_ARCH_BUTTONS),y)
CSRCS += stm32_buttons.c
endif
ifeq ($(CONFIG_CAN),y)
CSRCS += stm32_can.c
endif
ifeq ($(CONFIG_STM32_OTGFS),y)
CSRCS += stm32_usb.c
endif
ifeq ($(CONFIG_LCD_ST7567),y)
CSRCS += stm32_st7567.c
endif
ifeq ($(CONFIG_ENC28J60),y)
CSRCS += stm32_enc28j60.c
endif
ifeq ($(CONFIG_LPWAN_SX127X),y)
CSRCS += stm32_sx127x.c
endif
ifeq ($(CONFIG_LCD_MAX7219),y)
CSRCS += stm32_max7219.c
endif
ifeq ($(CONFIG_LCD_ST7032),y)
CSRCS += stm32_st7032.c
endif
ifeq ($(CONFIG_PCA9635PW),y)
CSRCS += stm32_pca9635.c
endif
ifeq ($(CONFIG_STM32_SDIO),y)
CSRCS += stm32_sdio.c
endif
ifeq ($(CONFIG_STM32_ETHMAC),y)
CSRCS += stm32_ethernet.c
endif
ifeq ($(CONFIG_LEDS_MAX7219),y)
CSRCS += stm32_max7219_leds.c
endif
ifeq ($(CONFIG_RGBLED),y)
CSRCS += stm32_rgbled.c
endif
ifeq ($(CONFIG_RTC_DS1307),y)
CSRCS += stm32_ds1307.c
endif
ifeq ($(CONFIG_PWM),y)
CSRCS += stm32_pwm.c
endif
ifeq ($(CONFIG_BOARDCTL),y)
CSRCS += stm32_appinit.c
ifeq ($(CONFIG_BOARDCTL_RESET),y)
CSRCS += stm32_reset.c
endif
endif
ifeq ($(CONFIG_ARCH_CUSTOM_PMINIT),y)
CSRCS += stm32_pm.c
endif
ifeq ($(CONFIG_PM_BUTTONS),y)
CSRCS += stm32_pmbuttons.c
endif
ifeq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
CSRCS += stm32_idle.c
endif
ifeq ($(CONFIG_STM32_FSMC),y)
CSRCS += stm32_extmem.c
ifeq ($(CONFIG_LCD_SSD1289),y)
CSRCS += stm32_ssd1289.c
endif
endif
ifeq ($(CONFIG_LCD_SSD1351),y)
CSRCS += stm32_ssd1351.c
endif
ifeq ($(CONFIG_LCD_UG2864AMBAG01),y)
CSRCS += stm32_ug2864ambag01.c
endif
ifeq ($(CONFIG_LCD_UG2864HSWEG01),y)
CSRCS += stm32_ug2864hsweg01.c
endif
ifeq ($(CONFIG_TESTING_OSTEST),y)
CSRCS += stm32_ostest.c
endif
ifeq ($(CONFIG_TIMER),y)
CSRCS += stm32_timer.c
endif
ifeq ($(CONFIG_STM32_HCIUART),y)
ifeq ($(CONFIG_BLUETOOTH_UART),y)
CSRCS += stm32_hciuart.c
endif
endif
ifeq ($(CONFIG_STM32_ROMFS),y)
CSRCS += stm32_romfs_initialize.c
endif
ifeq ($(CONFIG_BOARDCTL_UNIQUEID),y)
CSRCS += stm32_uid.c
endif
ifeq ($(CONFIG_USBMSC),y)
CSRCS += stm32_usbmsc.c
endif
ifneq ($(CONFIG_STM32_ETHMAC),y)
ifeq ($(CONFIG_NETDEVICES),y)
CSRCS += stm32_netinit.c
endif
endif
ifeq ($(CONFIG_MMCSD_SPI),y)
CSRCS += stm32_mmcsd.c
endif
ifeq ($(CONFIG_WL_GS2200M),y)
CSRCS += stm32_gs2200m.c
endif
ifeq ($(CONFIG_LCD_ST7789),y)
CSRCS += stm32_st7789.c
endif
DEPPATH += --dep-path board
VPATH += :board
CFLAGS += $(shell $(INCDIR) "$(CC)" $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)board)
@@ -0,0 +1,861 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/aiit-arm32-board.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_ARM_STM32_STM32F4AIIT_SRC_STM32F4AIIT_H
#define __BOARDS_ARM_STM32_STM32F4AIIT_SRC_STM32F4AIIT_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/compiler.h>
#include <stdint.h>
#include <arch/stm32/chip.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
/* How many SPI modules does this chip support? */
#if STM32_NSPI < 1
# undef CONFIG_STM32_SPI1
# undef CONFIG_STM32_SPI2
# undef CONFIG_STM32_SPI3
#elif STM32_NSPI < 2
# undef CONFIG_STM32_SPI2
# undef CONFIG_STM32_SPI3
#elif STM32_NSPI < 3
# undef CONFIG_STM32_SPI3
#endif
#define PCA9635_I2CBUS 1
#define PCA9635_I2CADDR 0x40
/* Assume that we have everything */
#define HAVE_USBDEV 1
#define HAVE_USBHOST 1
#define HAVE_USBMONITOR 1
#define HAVE_SDIO 1
#define HAVE_CS43L22 1
#define HAVE_RTC_DRIVER 1
#define HAVE_NETMONITOR 1
#define HAVE_HCIUART 1
/* Can't support USB host or device features if USB OTG FS is not enabled */
#ifndef CONFIG_STM32_OTGFS
# undef HAVE_USBDEV
# undef HAVE_USBHOST
#endif
/* Can't support USB device if USB device is not enabled */
#ifndef CONFIG_USBDEV
# undef HAVE_USBDEV
#endif
/* Can't support USB host is USB host is not enabled */
#ifndef CONFIG_USBHOST
# undef HAVE_USBHOST
#endif
/* Check if we should enable the USB monitor before starting NSH */
#ifndef CONFIG_USBMONITOR
# undef HAVE_USBMONITOR
#endif
#ifndef HAVE_USBDEV
# undef CONFIG_USBDEV_TRACE
#endif
#ifndef HAVE_USBHOST
# undef CONFIG_USBHOST_TRACE
#endif
#if !defined(CONFIG_USBDEV_TRACE) && !defined(CONFIG_USBHOST_TRACE)
# undef HAVE_USBMONITOR
#endif
/* Can't support MMC/SD features if mountpoints are disabled or if SDIO
* support is not enabled.
*/
#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_STM32_SDIO)
# undef HAVE_SDIO
#endif
#undef SDIO_MINOR /* Any minor number, default 0 */
#define SDIO_SLOTNO 0 /* Only one slot */
#ifdef HAVE_SDIO
# if !defined(CONFIG_NSH_MMCSDSLOTNO)
# define CONFIG_NSH_MMCSDSLOTNO SDIO_SLOTNO
# elif CONFIG_NSH_MMCSDSLOTNO != 0
# warning "Only one MMC/SD slot, slot 0"
# undef CONFIG_NSH_MMCSDSLOTNO
# define CONFIG_NSH_MMCSDSLOTNO SDIO_SLOTNO
# endif
# if defined(CONFIG_NSH_MMCSDMINOR)
# define SDIO_MINOR CONFIG_NSH_MMCSDMINOR
# else
# define SDIO_MINOR 0
# endif
#endif
/* The CS43L22 depends on the CS43L22 driver, I2C1, and I2S3 support */
#if !defined(CONFIG_AUDIO_CS43L22) || !defined(CONFIG_STM32_I2C1) || \
!defined(CONFIG_STM32_I2S3)
# undef HAVE_CS43L22
#endif
#ifdef HAVE_CS43L22
/* The CS43L22 communicates on I2C1, I2C address 0x1a for control
* operations
*/
# define CS43L22_I2C_BUS 1
# define CS43L22_I2C_ADDRESS (0x94 >> 1)
/* The CS43L22 transfers data on I2S3 */
# define CS43L22_I2S_BUS 3
#endif
/* Check if we can support the RTC driver */
#if !defined(CONFIG_RTC) || !defined(CONFIG_RTC_DRIVER)
# undef HAVE_RTC_DRIVER
#endif
/* NSH Network monitor */
#if !defined(CONFIG_NET) || !defined(CONFIG_STM32_EMACMAC)
# undef HAVE_NETMONITOR
#endif
#if !defined(CONFIG_NSH_NETINIT_THREAD) || !defined(CONFIG_ARCH_PHY_INTERRUPT) || \
!defined(CONFIG_NETDEV_PHY_IOCTL) || !defined(CONFIG_NET_UDP)
# undef HAVE_NETMONITOR
#endif
/* The NSH Network Monitor cannot be used with the STM32F4DIS-BB base board.
* That is because the LAN8720 is configured in REF_CLK OUT mode. In that
* mode, the PHY interrupt is not supported. The NINT pin serves instead as
* REFLCK0.
*/
#ifdef CONFIG_STM32F4DISBB
# undef HAVE_NETMONITOR
#endif
/* procfs File System */
#ifdef CONFIG_FS_PROCFS
# ifdef CONFIG_NSH_PROC_MOUNTPOINT
# define STM32_PROCFS_MOUNTPOINT CONFIG_NSH_PROC_MOUNTPOINT
# else
# define STM32_PROCFS_MOUNTPOINT "/proc"
# endif
#endif
/* Check if we have the prerequisites for an HCI UART */
#if !defined(CONFIG_STM32_HCIUART) || !defined(CONFIG_BLUETOOTH_UART)
# undef HAVE_HCIUART
#elif defined(CONFIG_STM32_USART1_HCIUART)
# define HCIUART_SERDEV HCIUART1
#elif defined(CONFIG_STM32_USART2_HCIUART)
# define HCIUART_SERDEV HCIUART2
#elif defined(CONFIG_STM32_USART3_HCIUART)
# define HCIUART_SERDEV HCIUART3
#elif defined(CONFIG_STM32_USART6_HCIUART)
# define HCIUART_SERDEV HCIUART6
#elif defined(CONFIG_STM32_UART7_HCIUART)
# define HCIUART_SERDEV HCIUART7
#elif defined(CONFIG_STM32_UART8_HCIUART)
# define HCIUART_SERDEV HCIUART8
#else
# error No HCI UART specifified
#endif
/* STM32F4 Discovery GPIOs **************************************************/
/* LEDs */
#define GPIO_LED1 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
GPIO_OUTPUT_CLEAR|GPIO_PORTD|GPIO_PIN12)
#define GPIO_LED2 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
GPIO_OUTPUT_CLEAR|GPIO_PORTD|GPIO_PIN13)
#define GPIO_LED3 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
GPIO_OUTPUT_CLEAR|GPIO_PORTD|GPIO_PIN14)
#define GPIO_LED4 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
GPIO_OUTPUT_CLEAR|GPIO_PORTD|GPIO_PIN15)
/* BUTTONS -- NOTE that all have EXTI interrupts configured */
#define MIN_IRQBUTTON BUTTON_USER
#define MAX_IRQBUTTON BUTTON_USER
#define NUM_IRQBUTTONS 1
#define GPIO_BTN_USER (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTA|GPIO_PIN0)
#define GPIO_CS43L22_RESET (GPIO_OUTPUT|GPIO_SPEED_50MHz|GPIO_PORTD|GPIO_PIN4)
/* LoRa SX127x */
#define GPIO_SX127X_DIO0 (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTD|GPIO_PIN0)
#define GPIO_SX127X_RESET (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_OUTPUT_CLEAR|\
GPIO_SPEED_50MHz|GPIO_PORTD|GPIO_PIN4)
/* PWM
*
* The STM32F4 Discovery has no real on-board PWM devices, but the board can
* be configured to output a pulse train using TIM4 CH2 on PD13.
*/
#define STM32F4AIIT_PWMTIMER 4
#define STM32F4AIIT_PWMCHANNEL 2
/* SPI chip selects */
#define GPIO_CS_MEMS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN3)
#define GPIO_MAX31855_CS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTD|GPIO_PIN8)
#define GPIO_MAX6675_CS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTD|GPIO_PIN8)
#define GPIO_SX127X_CS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN6)
#define GPIO_MAX7219_CS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN3)
#define GPIO_GS2200M_CS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN5)
#define GPIO_ENC28J60_CS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4)
#define GPIO_ENC28J60_RESET (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN1)
#define GPIO_ENC28J60_INTR (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|\
GPIO_OPENDRAIN|GPIO_PORTE|GPIO_PIN4)
/* USB OTG FS
*
* PA9 OTG_FS_VBUS VBUS sensing (also connected to the green LED)
* PC0 OTG_FS_PowerSwitchOn
* PD5 OTG_FS_Overcurrent
*/
#define GPIO_OTGFS_VBUS (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|\
GPIO_OPENDRAIN|GPIO_PORTA|GPIO_PIN9)
#define GPIO_OTGFS_PWRON (GPIO_OUTPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|\
GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN0)
#ifdef CONFIG_USBHOST
# define GPIO_OTGFS_OVER (GPIO_INPUT|GPIO_EXTI|GPIO_FLOAT|\
GPIO_SPEED_100MHz|GPIO_PUSHPULL|\
GPIO_PORTD|GPIO_PIN5)
#else
# define GPIO_OTGFS_OVER (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|\
GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN5)
#endif
/* UG-2864AMBAG01 or UG-2864HSWEG01 OLED Display (SPI 4-wire):
*
* --------------------------+----------------------------------------------
* Connector CON10 J1: | STM32F4Discovery
* --------------+-----------+----------------------------------------------
* CON10 J1: | CON20 J2: | P1/P2:
* --------------+-----------+----------------------------------------------
* 1 3v3 | 3,4 3v3 | P2 3V
* 3 /RESET | 8 /RESET | P2 PB6 (Arbitrary selection)
* 5 /CS | 7 /CS | P2 PB7 (Arbitrary selection)
* 7 A0|D/C | 9 A0|D/C | P2 PB8 (Arbitrary selection)
* 9 LED+ (N/C) | ----- | -----
* 2 5V Vcc | 1,2 Vcc | P2 5V
* 4 DI | 18 D1/SI | P1 PA7 (GPIO_SPI1_MOSI == GPIO_SPI1_MOSI_1(1))
* 6 SCLK | 19 D0/SCL | P1 PA5 (GPIO_SPI1_SCK == GPIO_SPI1_SCK_1(1))
* 8 LED- (N/C) | ----- | ------
* 10 GND | 20 GND | P2 GND
* --------------+-----------+----------------------------------------------
* (1) Required because of on-board MEMS
* -------------------------------------------------------------------------
*/
#if defined(CONFIG_LCD_UG2864AMBAG01) || defined(CONFIG_LCD_UG2864HSWEG01) || \
defined(CONFIG_LCD_SSD1351)
# define GPIO_OLED_RESET (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN6)
# define GPIO_OLED_CS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN7)
# define GPIO_OLED_A0 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN8)
# define GPIO_OLED_DC GPIO_OLED_A0
#endif
/* Display JLX12864G */
#define STM32_LCD_RST (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN6)
#define STM32_LCD_CS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN7)
#define STM32_LCD_RS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN8)
/* STM32F4DIS-BB MicroSD
*
* ---------- ------------- ------------------------------
* PIO SIGNAL Comments
* ---------- ------------- ------------------------------
* PB15 NCD Pulled up externally
* PC9 DAT1 Configured by driver
* PC8 DAT0 " " "" " "
* PC12 CLK " " "" " "
* PD2 CMD " " "" " "
* PC11 CD/DAT3 " " "" " "
* PC10 DAT2 " " "" " "
* ---------- ------------- ------------------------------
*/
#if defined(CONFIG_STM32F4DISBB) && defined(CONFIG_STM32_SDIO)
# define GPIO_SDIO_NCD (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|\
GPIO_PORTB|GPIO_PIN15)
#endif
/* STM32F4DIS-BB LAN8720
*
* ---------- ------------- ------------------------------
* PIO SIGNAL Comments
* ---------- ------------- ------------------------------
* PB11 TXEN Configured by driver
* PB12 TXD0 " " "" " "
* PB13 TXD1 " " "" " "
* PC4 RXD0/MODE0 " " "" " "
* PC5 RXD1/MODE1 " " "" " "
* PA7 CRS_DIV/MODE2 " " "" " "
* PA2 MDIO " " "" " "
* PC1 MDC " " "" " "
* PA1 NINT/REFCLK0 " " "" " "
* PE2 DAT2 " " "" " "
* ---------- ------------- ------------------------------
*/
#if defined(CONFIG_STM32F4DISBB) && defined(CONFIG_STM32_ETHMAC)
# define GPIO_EMAC_NINT (GPIO_INPUT|GPIO_PULLUP|GPIO_EXTI|\
GPIO_PORTA|GPIO_PIN1)
# define GPIO_EMAC_NRST (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN2)
#endif
/****************************************************************************
* Public Types
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: stm32_bringup
*
* Description:
* Perform architecture-specific initialization
*
* CONFIG_BOARD_LATE_INITIALIZE=y :
* Called from board_late_initialize().
*
* CONFIG_BOARD_LATE_INITIALIZE=y && CONFIG_BOARDCTL=y :
* Called from the NSH library
*
****************************************************************************/
int stm32_bringup(void);
/****************************************************************************
* Name: stm32_spidev_initialize
*
* Description:
* Called to configure SPI chip select GPIO pins for the aiit-arm32-board
* board.
*
****************************************************************************/
void weak_function stm32_spidev_initialize(void);
/****************************************************************************
* Name: stm32_i2sdev_initialize
*
* Description:
* Called to configure I2S chip select GPIO pins for the aiit-arm32-board
* board.
*
****************************************************************************/
void weak_function stm32_i2sdev_initialize(void);
/****************************************************************************
* Name: stm32_bh1750initialize
*
* Description:
* Called to configure an I2C and to register BH1750FVI for the
* aiit-arm32-board board.
*
****************************************************************************/
#ifdef CONFIG_SENSORS_BH1750FVI
int stm32_bh1750initialize(FAR const char *devpath);
#endif
/****************************************************************************
* Name: stm32_lpwaninitialize
*
* Description:
* Initialize SX127X LPWAN interaface.
****************************************************************************/
#ifdef CONFIG_LPWAN_SX127X
int stm32_lpwaninitialize(void);
#endif
/****************************************************************************
* Name: stm32_mmcsdinitialize
*
* Description:
* Sets up MMC/SD interface.
*
****************************************************************************/
#ifdef CONFIG_MMCSD_SPI
int stm32_mmcsd_initialize(int port, int minor);
#endif
/****************************************************************************
* Name: nunchuck_initialize
*
* Description:
* Initialize and register the button joystick driver
*
****************************************************************************/
#ifdef CONFIG_INPUT_NUNCHUCK
int nunchuck_initialize(FAR char *devname);
#endif
/****************************************************************************
* Name: stm32_max7219init
*
* Description:
* Initialize and register the max7219 numeric display controller
*
****************************************************************************/
#ifdef CONFIG_LEDS_MAX7219
int stm32_max7219init(FAR const char *devpath);
#endif
/****************************************************************************
* Name: stm32_ds1307_init
*
* Description:
* Initialize and register the DS1307 RTC
*
****************************************************************************/
#ifdef CONFIG_RTC_DS1307
int stm32_ds1307_init(void);
#endif
/****************************************************************************
* Name: stm32_st7032init
*
* Description:
* Initialize and register the Sitronix ST7032i
*
****************************************************************************/
int stm32_st7032init(FAR const char *devpath);
/****************************************************************************
* Name: stm32_usbinitialize
*
* Description:
* Called from stm32_usbinitialize very early in initialization to setup
* USB-related GPIO pins for the STM32F4Discovery board.
*
****************************************************************************/
#ifdef CONFIG_STM32_OTGFS
void weak_function stm32_usbinitialize(void);
#endif
/****************************************************************************
* Name: stm32_usbhost_initialize
*
* Description:
* Called at application startup time to initialize the USB host
* functionality. This function will start a thread that will monitor for
* device connection/disconnection events.
*
****************************************************************************/
#if defined(CONFIG_STM32_OTGFS) && defined(CONFIG_USBHOST)
int stm32_usbhost_initialize(void);
#endif
/****************************************************************************
* Name: stm32_pwm_setup
*
* Description:
* Initialize PWM and register the PWM device.
*
****************************************************************************/
#ifdef CONFIG_PWM
int stm32_pwm_setup(void);
#endif
/****************************************************************************
* Name: stm32_can_setup
*
* Description:
* Initialize CAN and register the CAN device
*
****************************************************************************/
#ifdef CONFIG_CAN
int stm32_can_setup(void);
#endif
/****************************************************************************
* Name: stm32_extmemgpios
*
* Description:
* Initialize GPIOs for external memory usage
*
****************************************************************************/
#ifdef CONFIG_STM32_FSMC
void stm32_extmemgpios(const uint32_t *gpios, int ngpios);
#endif
/****************************************************************************
* Name: stm32_extmemaddr
*
* Description:
* Initialize address line GPIOs for external memory access
*
****************************************************************************/
#ifdef CONFIG_STM32_FSMC
void stm32_extmemaddr(int naddrs);
#endif
/****************************************************************************
* Name: stm32_extmemdata
*
* Description:
* Initialize data line GPIOs for external memory access
*
****************************************************************************/
#ifdef CONFIG_STM32_FSMC
void stm32_extmemdata(int ndata);
#endif
/****************************************************************************
* Name: stm32_led_pminitialize
*
* Description:
* Enable logic to use the LEDs on the STM32F4Discovery to support power
* management testing
*
****************************************************************************/
#ifdef CONFIG_PM
void stm32_led_pminitialize(void);
#endif
/****************************************************************************
* Name: stm32_pm_buttons
*
* Description:
* Configure the user button of the STM32f4discovery board as EXTI,
* so it is able to wakeup the MCU from the PM_STANDBY mode
*
****************************************************************************/
#if defined(CONFIG_PM) && defined(CONFIG_ARCH_IDLE_CUSTOM) && \
defined(CONFIG_PM_BUTTONS)
void stm32_pm_buttons(void);
#endif
/****************************************************************************
* Name: stm32_sdio_initialize
*
* Description:
* Initialize SDIO-based MMC/SD card support
*
****************************************************************************/
#if !defined(CONFIG_DISABLE_MOUNTPOINT) && defined(CONFIG_STM32_SDIO)
int stm32_sdio_initialize(void);
#endif
/****************************************************************************
* Name: stm32_netinitialize
*
* Description:
* Configure board resources to support networking.
*
****************************************************************************/
#ifdef HAVE_NETMONITOR
void weak_function stm32_netinitialize(void);
#endif
/****************************************************************************
* Name: stm32_zerocross_initialize
*
* Description:
* Initialize and register the zero cross driver
*
****************************************************************************/
#ifdef CONFIG_SENSORS_ZEROCROSS
int stm32_zerocross_initialize(void);
#endif
/****************************************************************************
* Name: stm32_max31855initialize
*
* Description:
* Initialize and register the MAX31855 Temperature Sensor driver.
*
* Input Parameters:
* devpath - The full path to the driver to register. E.g., "/dev/temp0"
* bus - Bus number (for hardware that has multiple SPI interfaces)
* devid - ID associated to the device. E.g., 0, 1, 2, etc.
*
* Returned Value:
* Zero (OK) on success; a negated errno value on failure.
*
****************************************************************************/
#ifdef CONFIG_SENSORS_MAX31855
int stm32_max31855initialize(FAR const char *devpath, int bus,
uint16_t devid);
#endif
/****************************************************************************
* Name: stm32_mlx90614init
*
* Description:
* Called to configure an I2C and to register MLX90614 for the
* stm32f103-minimum board.
*
****************************************************************************/
#ifdef CONFIG_SENSORS_MLX90614
int stm32_mlx90614init(FAR const char *devpath);
#endif
/****************************************************************************
* Name: stm32_max6675initialize
*
* Description:
* Initialize and register the max6675 driver
*
****************************************************************************/
#ifdef CONFIG_SENSORS_MAX6675
int stm32_max6675initialize(FAR const char *devpath);
#endif
/****************************************************************************
* Name: stm32_cs43l22_initialize
*
* Description:
* This function is called by platform-specific, setup logic to configure
* and register the CS43L22 device. This function will register the
* driver as /dev/cs43l22[x] where x is determined by the minor device
* number.
*
* Input Parameters:
* minor - The input device minor number
*
* Returned Value:
* Zero is returned on success. Otherwise, a negated errno value is
* returned to indicate the nature of the failure.
*
****************************************************************************/
#ifdef HAVE_CS43L22
int stm32_cs43l22_initialize(int minor);
#endif /* HAVE_CS43L22 */
/****************************************************************************
* Name: stm32_pca9635_initialize
*
* Description:
* This function is called by board initialization logic to configure the
* LED PWM chip. This function will register the driver as /dev/leddrv0.
*
* Input Parameters:
* None
*
* Returned Value:
* Zero is returned on success. Otherwise, a negated errno value is
* returned to indicate the nature of the failure.
*
****************************************************************************/
#ifdef CONFIG_PCA9635PW
int stm32_pca9635_initialize(void);
#endif
/****************************************************************************
* Name: stm32_rgbled_setup
*
* Description:
* This function is called by board initialization logic to configure the
* RGB LED driver. This function will register the driver as /dev/rgbled0.
*
* Input Parameters:
* None
*
* Returned Value:
* Zero is returned on success. Otherwise, a negated errno value is
* returned to indicate the nature of the failure.
*
****************************************************************************/
#ifdef CONFIG_RGBLED
int stm32_rgbled_setup(void);
#endif
/****************************************************************************
* Name: stm32_timer_driver_setup
*
* Description:
* Configure the timer driver.
*
* Input Parameters:
* devpath - The full path to the timer device. This should be of the
* form /dev/timer0
* timer - The timer's number.
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
#ifdef CONFIG_TIMER
int stm32_timer_driver_setup(FAR const char *devpath, int timer);
#endif
/****************************************************************************
* Name: xen1210_archinitialize
*
* Description:
* Each board that supports an xen1210 device must provide this function.
* This function is called by application-specific, setup logic to
* configure the accelerometer device. This function will register the
* driver as /dev/accelN where N is the minor device number.
*
* Input Parameters:
* minor - The input device minor number
*
* Returned Value:
* Zero is returned on success. Otherwise, a negated errno value is
* returned to indicate the nature of the failure.
*
****************************************************************************/
#ifdef CONFIG_SENSORS_XEN1210
int xen1210_archinitialize(int minor);
#endif
/****************************************************************************
* Name: hciuart_dev_initialize
*
* Description:
* This function is called by board initialization logic to configure the
* Bluetooth HCI UART driver
*
* Input Parameters:
* None
*
* Returned Value:
* Zero is returned on success. Otherwise, a negated errno value is
* returned to indicate the nature of the failure.
*
****************************************************************************/
#ifdef HAVE_HCIUART
int hciuart_dev_initialize(void);
#endif
/****************************************************************************
* Name: stm32_gs2200m_initialize
*
* Description:
* Configure the gs2200m driver.
*
* Input Parameters:
* devpath - The full path to the device.
* bus - The SPI bus number
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
#ifdef CONFIG_WL_GS2200M
int stm32_gs2200m_initialize(FAR const char *devpath, int bus);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_ARM_STM32_STM32F4AIIT_SRC_STM32F4AIIT_H */
@@ -0,0 +1,79 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_appinit.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/board.h>
#include "aiit-arm32-board.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef OK
# define OK 0
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_app_initialize
*
* Description:
* Perform application specific initialization. This function is never
* called directly from application code, but only indirectly via the
* (non-standard) boardctl() interface using the command BOARDIOC_INIT.
*
* Input Parameters:
* arg - The boardctl() argument is passed to the board_app_initialize()
* implementation without modification. The argument has no
* meaning to NuttX; the meaning of the argument is a contract
* between the board-specific initialization logic and the
* matching application logic. The value could be such things as a
* mode enumeration value, a set of DIP switch switch settings, a
* pointer to configuration data read from a file or serial FLASH,
* or whatever you would like to do with it. Every implementation
* should accept zero/NULL as a default configuration.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned on
* any failure to indicate the nature of the failure.
*
****************************************************************************/
int board_app_initialize(uintptr_t arg)
{
#ifdef CONFIG_BOARD_LATE_INITIALIZE
/* Board initialization already performed by board_late_initialize() */
return OK;
#else
/* Perform board-specific initialization */
return stm32_bringup();
#endif
}
@@ -0,0 +1,231 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_autoleds.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "chip.h"
#include "arm_arch.h"
#include "arm_internal.h"
#include "stm32.h"
#include "aiit-arm32-board.h"
#ifdef CONFIG_ARCH_LEDS
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* The following definitions map the encoded LED setting to GPIO settings */
#define STM32F4_LED1 (1 << 0)
#define STM32F4_LED2 (1 << 1)
#define STM32F4_LED3 (1 << 2)
#define STM32F4_LED4 (1 << 3)
#define ON_SETBITS_SHIFT (0)
#define ON_CLRBITS_SHIFT (4)
#define OFF_SETBITS_SHIFT (8)
#define OFF_CLRBITS_SHIFT (12)
#define ON_BITS(v) ((v) & 0xff)
#define OFF_BITS(v) (((v) >> 8) & 0x0ff)
#define SETBITS(b) ((b) & 0x0f)
#define CLRBITS(b) (((b) >> 4) & 0x0f)
#define ON_SETBITS(v) (SETBITS(ON_BITS(v))
#define ON_CLRBITS(v) (CLRBITS(ON_BITS(v))
#define OFF_SETBITS(v) (SETBITS(OFF_BITS(v))
#define OFF_CLRBITS(v) (CLRBITS(OFF_BITS(v))
#define LED_STARTED_ON_SETBITS ((STM32F4_LED1) << ON_SETBITS_SHIFT)
#define LED_STARTED_ON_CLRBITS ((STM32F4_LED2|STM32F4_LED3|STM32F4_LED4) << ON_CLRBITS_SHIFT)
#define LED_STARTED_OFF_SETBITS (0 << OFF_SETBITS_SHIFT)
#define LED_STARTED_OFF_CLRBITS ((STM32F4_LED1|STM32F4_LED2|STM32F4_LED3|STM32F4_LED4) << OFF_CLRBITS_SHIFT)
#define LED_HEAPALLOCATE_ON_SETBITS ((STM32F4_LED2) << ON_SETBITS_SHIFT)
#define LED_HEAPALLOCATE_ON_CLRBITS ((STM32F4_LED1|STM32F4_LED3|STM32F4_LED4) << ON_CLRBITS_SHIFT)
#define LED_HEAPALLOCATE_OFF_SETBITS ((STM32F4_LED1) << OFF_SETBITS_SHIFT)
#define LED_HEAPALLOCATE_OFF_CLRBITS ((STM32F4_LED2|STM32F4_LED3|STM32F4_LED4) << OFF_CLRBITS_SHIFT)
#define LED_IRQSENABLED_ON_SETBITS ((STM32F4_LED1|STM32F4_LED2) << ON_SETBITS_SHIFT)
#define LED_IRQSENABLED_ON_CLRBITS ((STM32F4_LED3|STM32F4_LED4) << ON_CLRBITS_SHIFT)
#define LED_IRQSENABLED_OFF_SETBITS ((STM32F4_LED2) << OFF_SETBITS_SHIFT)
#define LED_IRQSENABLED_OFF_CLRBITS ((STM32F4_LED1|STM32F4_LED3|STM32F4_LED4) << OFF_CLRBITS_SHIFT)
#define LED_STACKCREATED_ON_SETBITS ((STM32F4_LED3) << ON_SETBITS_SHIFT)
#define LED_STACKCREATED_ON_CLRBITS ((STM32F4_LED1|STM32F4_LED2|STM32F4_LED4) << ON_CLRBITS_SHIFT)
#define LED_STACKCREATED_OFF_SETBITS ((STM32F4_LED1|STM32F4_LED2) << OFF_SETBITS_SHIFT)
#define LED_STACKCREATED_OFF_CLRBITS ((STM32F4_LED3|STM32F4_LED4) << OFF_CLRBITS_SHIFT)
#define LED_INIRQ_ON_SETBITS ((STM32F4_LED1) << ON_SETBITS_SHIFT)
#define LED_INIRQ_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT)
#define LED_INIRQ_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT)
#define LED_INIRQ_OFF_CLRBITS ((STM32F4_LED1) << OFF_CLRBITS_SHIFT)
#define LED_SIGNAL_ON_SETBITS ((STM32F4_LED2) << ON_SETBITS_SHIFT)
#define LED_SIGNAL_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT)
#define LED_SIGNAL_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT)
#define LED_SIGNAL_OFF_CLRBITS ((STM32F4_LED2) << OFF_CLRBITS_SHIFT)
#define LED_ASSERTION_ON_SETBITS ((STM32F4_LED4) << ON_SETBITS_SHIFT)
#define LED_ASSERTION_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT)
#define LED_ASSERTION_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT)
#define LED_ASSERTION_OFF_CLRBITS ((STM32F4_LED4) << OFF_CLRBITS_SHIFT)
#define LED_PANIC_ON_SETBITS ((STM32F4_LED4) << ON_SETBITS_SHIFT)
#define LED_PANIC_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT)
#define LED_PANIC_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT)
#define LED_PANIC_OFF_CLRBITS ((STM32F4_LED4) << OFF_CLRBITS_SHIFT)
/****************************************************************************
* Private Data
****************************************************************************/
static const uint16_t g_ledbits[8] =
{
(LED_STARTED_ON_SETBITS | LED_STARTED_ON_CLRBITS |
LED_STARTED_OFF_SETBITS | LED_STARTED_OFF_CLRBITS),
(LED_HEAPALLOCATE_ON_SETBITS | LED_HEAPALLOCATE_ON_CLRBITS |
LED_HEAPALLOCATE_OFF_SETBITS | LED_HEAPALLOCATE_OFF_CLRBITS),
(LED_IRQSENABLED_ON_SETBITS | LED_IRQSENABLED_ON_CLRBITS |
LED_IRQSENABLED_OFF_SETBITS | LED_IRQSENABLED_OFF_CLRBITS),
(LED_STACKCREATED_ON_SETBITS | LED_STACKCREATED_ON_CLRBITS |
LED_STACKCREATED_OFF_SETBITS | LED_STACKCREATED_OFF_CLRBITS),
(LED_INIRQ_ON_SETBITS | LED_INIRQ_ON_CLRBITS |
LED_INIRQ_OFF_SETBITS | LED_INIRQ_OFF_CLRBITS),
(LED_SIGNAL_ON_SETBITS | LED_SIGNAL_ON_CLRBITS |
LED_SIGNAL_OFF_SETBITS | LED_SIGNAL_OFF_CLRBITS),
(LED_ASSERTION_ON_SETBITS | LED_ASSERTION_ON_CLRBITS |
LED_ASSERTION_OFF_SETBITS | LED_ASSERTION_OFF_CLRBITS),
(LED_PANIC_ON_SETBITS | LED_PANIC_ON_CLRBITS |
LED_PANIC_OFF_SETBITS | LED_PANIC_OFF_CLRBITS)
};
/****************************************************************************
* Private Functions
****************************************************************************/
static inline void led_clrbits(unsigned int clrbits)
{
if ((clrbits & STM32F4_LED1) != 0)
{
stm32_gpiowrite(GPIO_LED1, false);
}
if ((clrbits & STM32F4_LED2) != 0)
{
stm32_gpiowrite(GPIO_LED2, false);
}
if ((clrbits & STM32F4_LED3) != 0)
{
stm32_gpiowrite(GPIO_LED3, false);
}
if ((clrbits & STM32F4_LED4) != 0)
{
stm32_gpiowrite(GPIO_LED4, false);
}
}
static inline void led_setbits(unsigned int setbits)
{
if ((setbits & STM32F4_LED1) != 0)
{
stm32_gpiowrite(GPIO_LED1, true);
}
if ((setbits & STM32F4_LED2) != 0)
{
stm32_gpiowrite(GPIO_LED2, true);
}
if ((setbits & STM32F4_LED3) != 0)
{
stm32_gpiowrite(GPIO_LED3, true);
}
if ((setbits & STM32F4_LED4) != 0)
{
stm32_gpiowrite(GPIO_LED4, true);
}
}
static void led_setonoff(unsigned int bits)
{
led_clrbits(CLRBITS(bits));
led_setbits(SETBITS(bits));
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_autoled_initialize
****************************************************************************/
void board_autoled_initialize(void)
{
/* Configure LED1-4 GPIOs for output */
stm32_configgpio(GPIO_LED1);
stm32_configgpio(GPIO_LED2);
stm32_configgpio(GPIO_LED3);
stm32_configgpio(GPIO_LED4);
}
/****************************************************************************
* Name: board_autoled_on
****************************************************************************/
void board_autoled_on(int led)
{
led_setonoff(ON_BITS(g_ledbits[led]));
}
/****************************************************************************
* Name: board_autoled_off
****************************************************************************/
void board_autoled_off(int led)
{
led_setonoff(OFF_BITS(g_ledbits[led]));
}
#endif /* CONFIG_ARCH_LEDS */
@@ -0,0 +1,129 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_boot.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "arm_arch.h"
#include "nvic.h"
#include "itm.h"
#include "stm32.h"
#include "aiit-arm32-board.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_boardinitialize
*
* Description:
* All STM32 architectures must provide the following entry point. This
* entry point is called early in the initialization -- after all memory
* has been configured and mapped but before any devices have been
* initialized.
*
****************************************************************************/
void stm32_boardinitialize(void)
{
#ifdef CONFIG_SCHED_CRITMONITOR
/* Enable ITM and DWT resources, if not left enabled by debugger. */
modifyreg32(NVIC_DEMCR, 0, NVIC_DEMCR_TRCENA);
/* Make sure the high speed cycle counter is running. It will be started
* automatically only if a debugger is connected.
*/
putreg32(0xc5acce55, ITM_LAR);
modifyreg32(DWT_CTRL, 0, DWT_CTRL_CYCCNTENA_MASK);
#endif
#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3)
/* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak
* function stm32_spidev_initialize() has been brought into the link.
*/
if (stm32_spidev_initialize)
{
stm32_spidev_initialize();
}
#endif
#ifdef CONFIG_STM32_OTGFS
/* Initialize USB if the 1) OTG FS controller is in the configuration and
* 2) disabled, and 3) the weak function stm32_usbinitialize() has been
* brought into the build. Presumably either CONFIG_USBDEV or
* CONFIG_USBHOST is also selected.
*/
if (stm32_usbinitialize)
{
stm32_usbinitialize();
}
#endif
#ifdef HAVE_NETMONITOR
/* Configure board resources to support networking. */
if (stm32_netinitialize)
{
stm32_netinitialize();
}
#endif
#ifdef CONFIG_ARCH_LEDS
/* Configure on-board LEDs if LED support has been selected. */
board_autoled_initialize();
#endif
}
/****************************************************************************
* Name: board_late_initialize
*
* Description:
* If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
* initialization call will be performed in the boot-up sequence to a
* function called board_late_initialize(). board_late_initialize() will be
* called immediately after up_initialize() is called and just before the
* initial application is started. This additional initialization phase
* may be used, for example, to initialize board-specific device drivers.
*
****************************************************************************/
#ifdef CONFIG_BOARD_LATE_INITIALIZE
void board_late_initialize(void)
{
/* Perform board-specific initialization */
stm32_bringup();
}
#endif
@@ -0,0 +1,551 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_bringup.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include <stdio.h>
#include <debug.h>
#include <errno.h>
#include <nuttx/fs/fs.h>
#ifdef CONFIG_USBMONITOR
# include <nuttx/usb/usbmonitor.h>
#endif
#include "stm32.h"
#include "stm32_romfs.h"
#ifdef CONFIG_STM32_OTGFS
# include "stm32_usbhost.h"
#endif
#ifdef CONFIG_INPUT_BUTTONS
# include <nuttx/input/buttons.h>
#endif
#ifdef CONFIG_USERLED
# include <nuttx/leds/userled.h>
#endif
#ifdef CONFIG_RNDIS
# include <nuttx/usb/rndis.h>
#endif
#include "aiit-arm32-board.h"
/* Conditional logic in aiit-arm32-board.h will determine if certain features
* are supported. Tests for these features need to be made after including
* aiit-arm32-board.h.
*/
#ifdef HAVE_RTC_DRIVER
# include <nuttx/timers/rtc.h>
# include "stm32_rtc.h"
#endif
/* The following are includes from board-common logic */
#ifdef CONFIG_SENSORS_BMP180
#include "stm32_bmp180.h"
#endif
#ifdef CONFIG_SENSORS_MAX6675
#include "stm32_max6675.h"
#endif
#ifdef CONFIG_INPUT_NUNCHUCK
#include "stm32_nunchuck.h"
#endif
#ifdef CONFIG_SENSORS_ZEROCROSS
#include "stm32_zerocross.h"
#endif
#ifdef CONFIG_SENSORS_QENCODER
#include "board_qencoder.h"
#endif
#ifdef CONFIG_SENSORS_BH1750FVI
#include "stm32_bh1750.h"
#endif
#ifdef CONFIG_LIS3DSH
#include "stm32_lis3dsh.h"
#endif
#ifdef CONFIG_LCD_BACKPACK
#include "stm32_lcd_backpack.h"
#endif
#ifdef CONFIG_SENSORS_MAX31855
#include "stm32_max31855.h"
#endif
#ifdef CONFIG_SENSORS_MLX90614
#include "stm32_mlx90614.h"
#endif
#ifdef CONFIG_SENSORS_XEN1210
#include "stm32_xen1210.h"
#endif
#ifdef CONFIG_USBADB
# include <nuttx/usb/adb.h>
#endif
#ifdef CONFIG_SENSORS_HS300X
#include "stm32_hs300x.h"
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_i2c_register
*
* Description:
* Register one I2C drivers for the I2C tool.
*
****************************************************************************/
#if defined(CONFIG_I2C) && defined(CONFIG_SYSTEM_I2CTOOL)
static void stm32_i2c_register(int bus)
{
FAR struct i2c_master_s *i2c;
int ret;
i2c = stm32_i2cbus_initialize(bus);
if (i2c == NULL)
{
syslog(LOG_ERR, "ERROR: Failed to get I2C%d interface\n", bus);
}
else
{
ret = i2c_register(i2c, bus);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to register I2C%d driver: %d\n",
bus, ret);
stm32_i2cbus_uninitialize(i2c);
}
}
}
#endif
/****************************************************************************
* Name: stm32_i2ctool
*
* Description:
* Register I2C drivers for the I2C tool.
*
****************************************************************************/
#if defined(CONFIG_I2C) && defined(CONFIG_SYSTEM_I2CTOOL)
static void stm32_i2ctool(void)
{
stm32_i2c_register(1);
#if 0
stm32_i2c_register(1);
stm32_i2c_register(2);
#endif
}
#else
# define stm32_i2ctool()
#endif
/****************************************************************************
* Name: stm32_bringup
*
* Description:
* Perform architecture-specific initialization
*
* CONFIG_BOARD_LATE_INITIALIZE=y :
* Called from board_late_initialize().
*
* CONFIG_BOARD_LATE_INITIALIZE=n && CONFIG_BOARDCTL=y :
* Called from the NSH library
*
****************************************************************************/
int stm32_bringup(void)
{
#ifdef HAVE_RTC_DRIVER
FAR struct rtc_lowerhalf_s *lower;
#endif
int ret = OK;
#if defined(CONFIG_I2C) && defined(CONFIG_SYSTEM_I2CTOOL)
stm32_i2ctool();
#endif
#ifdef CONFIG_SENSORS_BMP180
/* Initialize the BMP180 pressure sensor. */
ret = board_bmp180_initialize(0, 1);
if (ret < 0)
{
syslog(LOG_ERR, "Failed to initialize BMP180, error %d\n", ret);
return ret;
}
#endif
#ifdef CONFIG_SENSORS_BH1750FVI
ret = board_bh1750_initialize(0, 1);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: stm32_bh1750initialize() failed: %d\n", ret);
}
#endif
#ifdef CONFIG_SENSORS_ZEROCROSS
/* Configure the zero-crossing driver */
board_zerocross_initialize(0);
#endif
#ifdef CONFIG_LEDS_MAX7219
ret = stm32_max7219init("/dev/numdisp0");
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: max7219_leds_register failed: %d\n", ret);
}
#endif
#ifdef CONFIG_LCD_ST7032
ret = stm32_st7032init("/dev/slcd0");
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: st7032_register failed: %d\n", ret);
}
#endif
#ifdef CONFIG_RGBLED
/* Configure the RGB LED driver */
stm32_rgbled_setup();
#endif
#if defined(CONFIG_PCA9635PW)
/* Initialize the PCA9635 chip */
ret = stm32_pca9635_initialize();
if (ret < 0)
{
serr("ERROR: stm32_pca9635_initialize failed: %d\n", ret);
}
#endif
#ifdef CONFIG_VIDEO_FB
/* Initialize and register the framebuffer driver */
ret = fb_register(0, 0);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: fb_register() failed: %d\n", ret);
}
#endif
#ifdef CONFIG_LCD_BACKPACK
/* slcd:0, i2c:1, rows=2, cols=16 */
ret = board_lcd_backpack_init(0, 1, 2, 16);
if (ret < 0)
{
syslog(LOG_ERR, "Failed to initialize PCF8574 LCD, error %d\n", ret);
return ret;
}
#endif
#ifdef HAVE_SDIO
/* Initialize the SDIO block driver */
ret = stm32_sdio_initialize();
if (ret != OK)
{
ferr("ERROR: Failed to initialize MMC/SD driver: %d\n", ret);
return ret;
}
#endif
#ifdef CONFIG_MMCSD_SPI
/* Initialize the MMC/SD SPI driver (SPI2 is used) */
ret = stm32_mmcsd_initialize(2, CONFIG_NSH_MMCSDMINOR);
if (ret < 0)
{
syslog(LOG_ERR, "Failed to initialize SD slot %d: %d\n",
CONFIG_NSH_MMCSDMINOR, ret);
}
#endif
#ifdef HAVE_USBHOST
/* Initialize USB host operation. stm32_usbhost_initialize() starts a
* thread will monitor for USB connection and disconnection events.
*/
ret = stm32_usbhost_initialize();
if (ret != OK)
{
uerr("ERROR: Failed to initialize USB host: %d\n", ret);
return ret;
}
#endif
#ifdef HAVE_USBMONITOR
/* Start the USB Monitor */
ret = usbmonitor_start();
if (ret != OK)
{
uerr("ERROR: Failed to start USB monitor: %d\n", ret);
return ret;
}
#endif
#ifdef CONFIG_PWM
/* Initialize PWM and register the PWM device. */
ret = stm32_pwm_setup();
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: stm32_pwm_setup() failed: %d\n", ret);
}
#endif
#ifdef CONFIG_CAN
/* Initialize CAN and register the CAN driver. */
ret = stm32_can_setup();
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: stm32_can_setup failed: %d\n", ret);
}
#endif
#ifdef CONFIG_INPUT_BUTTONS
/* Register the BUTTON driver */
ret = btn_lower_initialize("/dev/buttons");
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: btn_lower_initialize() failed: %d\n", ret);
}
#endif
#ifdef CONFIG_INPUT_NUNCHUCK
/* Register the Nunchuck driver */
ret = board_nunchuck_initialize(0, 1);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: nunchuck_initialize() failed: %d\n", ret);
}
#endif
#ifdef CONFIG_SENSORS_MLX90614
ret = board_mlx90614_initialize(0, 1);
if (ret < 0)
{
syslog(LOG_ERR, "Failed to initialize MLX90614, error %d\n", ret);
return ret;
}
#endif
#ifdef CONFIG_SENSORS_QENCODER
/* Initialize and register the qencoder driver */
ret = board_qencoder_initialize(0, CONFIG_STM32F4DISCO_QETIMER);
if (ret != OK)
{
syslog(LOG_ERR,
"ERROR: Failed to register the qencoder: %d\n",
ret);
return ret;
}
#endif
#ifdef CONFIG_USERLED
/* Register the LED driver */
ret = userled_lower_initialize("/dev/userleds");
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: userled_lower_initialize() failed: %d\n", ret);
}
#endif
#ifdef CONFIG_RTC_DS1307
ret = stm32_ds1307_init();
if (ret < 0)
{
syslog(LOG_ERR, "Failed to initialize DS1307 RTC driver: %d\n", ret);
return ret;
}
#endif
#ifdef HAVE_RTC_DRIVER
/* Instantiate the STM32 lower-half RTC driver */
lower = stm32_rtc_lowerhalf();
if (!lower)
{
serr("ERROR: Failed to instantiate the RTC lower-half driver\n");
return -ENOMEM;
}
else
{
/* Bind the lower half driver and register the combined RTC driver
* as /dev/rtc0
*/
ret = rtc_initialize(0, lower);
if (ret < 0)
{
serr("ERROR: Failed to bind/register the RTC driver: %d\n", ret);
return ret;
}
}
#endif
#ifdef HAVE_CS43L22
/* Configure CS43L22 audio */
ret = stm32_cs43l22_initialize(1);
if (ret != OK)
{
serr("Failed to initialize CS43L22 audio: %d\n", ret);
}
#endif
#ifdef CONFIG_SENSORS_MAX31855
/* Register device 0 on spi channel 2 */
ret = board_max31855_initialize(0, 2);
if (ret < 0)
{
serr("ERROR: stm32_max31855initialize failed: %d\n", ret);
}
#endif
#ifdef CONFIG_SENSORS_MAX6675
ret = board_max6675_initialize(0, 2);
if (ret < 0)
{
serr("ERROR: stm32_max6675initialize failed: %d\n", ret);
}
#endif
#ifdef CONFIG_FS_PROCFS
/* Mount the procfs file system */
ret = nx_mount(NULL, STM32_PROCFS_MOUNTPOINT, "procfs", 0, NULL);
if (ret < 0)
{
serr("ERROR: Failed to mount procfs at %s: %d\n",
STM32_PROCFS_MOUNTPOINT, ret);
}
#endif
#ifdef CONFIG_STM32_ROMFS
ret = stm32_romfs_initialize();
if (ret < 0)
{
serr("ERROR: Failed to mount romfs at %s: %d\n",
CONFIG_STM32_ROMFS_MOUNTPOINT, ret);
}
#endif
#ifdef CONFIG_SENSORS_XEN1210
ret = board_xen1210_initialize(0, 1);
if (ret < 0)
{
serr("ERROR: xen1210_archinitialize failed: %d\n", ret);
}
#endif
#ifdef CONFIG_LIS3DSH
/* Create a lis3dsh driver instance fitting the chip built into
* aiit-arm32-board
*/
ret = board_lis3dsh_initialize(0, 1);
if (ret < 0)
{
serr("ERROR: Failed to initialize LIS3DSH driver: %d\n", ret);
}
#endif
#ifdef HAVE_HCIUART
ret = hciuart_dev_initialize();
if (ret < 0)
{
serr("ERROR: Failed to initialize HCI UART driver: %d\n", ret);
}
#endif
#if defined(CONFIG_RNDIS)
uint8_t mac[6];
mac[0] = 0xa0; /* TODO */
mac[1] = (CONFIG_NETINIT_MACADDR_2 >> (8 * 0)) & 0xff;
mac[2] = (CONFIG_NETINIT_MACADDR_1 >> (8 * 3)) & 0xff;
mac[3] = (CONFIG_NETINIT_MACADDR_1 >> (8 * 2)) & 0xff;
mac[4] = (CONFIG_NETINIT_MACADDR_1 >> (8 * 1)) & 0xff;
mac[5] = (CONFIG_NETINIT_MACADDR_1 >> (8 * 0)) & 0xff;
usbdev_rndis_initialize(mac);
#endif
#ifdef CONFIG_WL_GS2200M
ret = stm32_gs2200m_initialize("/dev/gs2200m", 3);
if (ret < 0)
{
serr("ERROR: Failed to initialize GS2200M: %d \n", ret);
}
#endif
#ifdef CONFIG_LPWAN_SX127X
ret = stm32_lpwaninitialize();
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to initialize wireless driver:"
" %d\n", ret);
}
#endif /* CONFIG_LPWAN_SX127X */
#ifdef CONFIG_USBADB
usbdev_adb_initialize();
#endif
#ifdef CONFIG_SENSORS_HS300X
ret = board_hs300x_initialize(0, 1);
if (ret < 0)
{
syslog(LOG_ERR, "Failed to initialize HS300x, error %d\n", ret);
}
#endif /* CONFIG_SENSORS_HS300X */
return ret;
}
@@ -0,0 +1,149 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_buttons.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <errno.h>
#include <nuttx/arch.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "stm32.h"
#include "aiit-arm32-board.h"
#ifdef CONFIG_ARCH_BUTTONS
/****************************************************************************
* Private Data
****************************************************************************/
/* Pin configuration for each STM32F4 Discovery button. This array is indexed
* by the BUTTON_* definitions in board.h
*/
static const uint32_t g_buttons[NUM_BUTTONS] =
{
GPIO_BTN_USER
};
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_button_initialize
*
* Description:
* board_button_initialize() must be called to initialize button resources.
* After that, board_buttons() may be called to collect the current state
* of all buttons or board_button_irq() may be called to register button
* interrupt handlers.
*
****************************************************************************/
uint32_t board_button_initialize(void)
{
int i;
/* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are
* configured for all pins.
*/
for (i = 0; i < NUM_BUTTONS; i++)
{
stm32_configgpio(g_buttons[i]);
}
return NUM_BUTTONS;
}
/****************************************************************************
* Name: board_buttons
****************************************************************************/
uint32_t board_buttons(void)
{
uint32_t ret = 0;
int i;
/* Check that state of each key */
for (i = 0; i < NUM_BUTTONS; i++)
{
/* A LOW value means that the key is pressed. */
bool released = stm32_gpioread(g_buttons[i]);
/* Accumulate the set of depressed (not released) keys */
if (!released)
{
ret |= (1 << i);
}
}
return ret;
}
/****************************************************************************
* Button support.
*
* Description:
* board_button_initialize() must be called to initialize button resources.
* After that, board_buttons() may be called to collect the current state
* of all buttons or board_button_irq() may be called to register button
* interrupt handlers.
*
* After board_button_initialize() has been called, board_buttons() may be
* called to collect the state of all buttons. board_buttons() returns an
* 32-bit bit set with each bit associated with a button. See the
* BUTTON_*_BIT definitions in board.h for the meaning of each bit.
*
* board_button_irq() may be called to register an interrupt handler that
* will be called when a button is depressed or released. The ID value is a
* button enumeration value that uniquely identifies a button resource. See
* the BUTTON_* definitions in board.h for the meaning of enumeration
* value.
*
****************************************************************************/
#ifdef CONFIG_ARCH_IRQBUTTONS
int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
{
int ret = -EINVAL;
/* The following should be atomic */
if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON)
{
ret = stm32_gpiosetevent(g_buttons[id], true, true, true,
irqhandler, arg);
}
return ret;
}
#endif
#endif /* CONFIG_ARCH_BUTTONS */
@@ -0,0 +1,101 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_can.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/can/can.h>
#include <arch/board/board.h>
#include "chip.h"
#include "arm_arch.h"
#include "stm32.h"
#include "stm32_can.h"
#include "aiit-arm32-board.h"
#ifdef CONFIG_CAN
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
#if defined(CONFIG_STM32_CAN1) && defined(CONFIG_STM32_CAN2)
# warning "Both CAN1 and CAN2 are enabled. Assuming only CAN1."
# undef CONFIG_STM32_CAN2
#endif
#ifdef CONFIG_STM32_CAN1
# define CAN_PORT 1
#else
# define CAN_PORT 2
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_can_setup
*
* Description:
* Initialize CAN and register the CAN device
*
****************************************************************************/
int stm32_can_setup(void)
{
#if defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2)
struct can_dev_s *can;
int ret;
/* Call stm32_caninitialize() to get an instance of the CAN interface */
can = stm32_caninitialize(CAN_PORT);
if (can == NULL)
{
canerr("ERROR: Failed to get CAN interface\n");
return -ENODEV;
}
/* Register the CAN driver at "/dev/can0" */
ret = can_register("/dev/can0", can);
if (ret < 0)
{
canerr("ERROR: can_register failed: %d\n", ret);
return ret;
}
return OK;
#else
return -ENODEV;
#endif
}
#endif /* CONFIG_CAN */
@@ -0,0 +1,65 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_critmon.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <time.h>
#include <fixedmath.h>
#include "dwt.h"
#include "arm_arch.h"
#include <nuttx/clock.h>
#include <arch/board/board.h>
#ifdef CONFIG_SCHED_CRITMONITOR
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_critmon_gettime
****************************************************************************/
uint32_t up_critmon_gettime(void)
{
return getreg32(DWT_CYCCNT);
}
/****************************************************************************
* Name: up_critmon_gettime
****************************************************************************/
void up_critmon_convert(uint32_t elapsed, FAR struct timespec *ts)
{
b32_t b32elapsed;
b32elapsed = itob32(elapsed) / STM32_SYSCLK_FREQUENCY;
ts->tv_sec = b32toi(b32elapsed);
ts->tv_nsec = NSEC_PER_SEC * b32frac(b32elapsed) / b32ONE;
}
#endif /* CONFIG_SCHED_CRITMONITOR */
@@ -0,0 +1,385 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_cs43l22.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include <stdio.h>
#include <debug.h>
#include <assert.h>
#include <errno.h>
#include <nuttx/irq.h>
#include <nuttx/i2c/i2c_master.h>
#include <nuttx/audio/i2s.h>
#include <nuttx/audio/pcm.h>
#include <nuttx/audio/cs43l22.h>
#include <arch/board/board.h>
#include "stm32.h"
#include "aiit-arm32-board.h"
#ifdef HAVE_CS43L22
/****************************************************************************
* Pre-Processor Definitions
****************************************************************************/
/****************************************************************************
* Private Types
****************************************************************************/
struct stm32_mwinfo_s
{
/* Standard CS43L22 interface */
struct cs43l22_lower_s lower;
/* Extensions for the aiit-arm32-board board */
cs43l22_handler_t handler;
FAR void *arg;
};
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
/* IRQ/PIO access callbacks. These operations all hidden behind
* callbacks to isolate the CS43L22 driver from differences in PIO
* interrupt handling by varying boards and MCUs. If possible,
* interrupts should be configured on both rising and falling edges
* so that contact and loss-of-contact events can be detected.
*
* attach - Attach the CS43L22 interrupt handler to the PIO interrupt
* enable - Enable or disable the PIO interrupt
*/
static int cs43l22_attach(FAR const struct cs43l22_lower_s *lower,
cs43l22_handler_t isr, FAR void *arg);
static bool cs43l22_enable(FAR const struct cs43l22_lower_s *lower,
bool enable);
static void cs43l22_hw_reset(FAR const struct cs43l22_lower_s *lower);
/****************************************************************************
* Private Data
****************************************************************************/
/* A reference to a structure of this type must be passed to the CS43L22
* driver. This structure provides information about the configuration
* of the CS43L22 and provides some board-specific hooks.
*
* Memory for this structure is provided by the caller. It is not copied
* by the driver and is presumed to persist while the driver is active.
*/
#define CONFIG_STM32_CS43L22_I2CFREQUENCY 100000
#define BOARD_MAINCK_FREQUENCY 8000000
static struct stm32_mwinfo_s g_cs43l22info =
{
.lower =
{
.address = CS43L22_I2C_ADDRESS,
.frequency = CONFIG_STM32_CS43L22_I2CFREQUENCY,
#ifdef CONFIG_STM32_CS43L22_SRCSCK
.mclk = BOARD_SLOWCLK_FREQUENCY,
#else
.mclk = BOARD_MAINCK_FREQUENCY,
#endif
.attach = cs43l22_attach,
.enable = cs43l22_enable,
.reset = cs43l22_hw_reset,
},
};
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* IRQ/PIO access callbacks. These operations all hidden behind
* callbacks to isolate the CS43L22 driver from differences in PIO
* interrupt handling by varying boards and MCUs. If possible,
* interrupts should be configured on both rising and falling edges
* so that contact and loss-of-contact events can be detected.
*
* attach - Attach the CS43L22 interrupt handler to the PIO interrupt
* enable - Enable or disable the PIO interrupt
* clear - Acknowledge/clear any pending PIO interrupt
*
****************************************************************************/
static int cs43l22_attach(FAR const struct cs43l22_lower_s *lower,
cs43l22_handler_t isr, FAR void *arg)
{
if (isr)
{
/* Just save the address of the handler and its argument for now. The
* new handler will called via cs43l22_interrupt() when the interrupt
* occurs.
*/
audinfo("Attaching %p\n", isr);
g_cs43l22info.handler = isr;
g_cs43l22info.arg = arg;
}
else
{
audinfo("Detaching %p\n", g_cs43l22info.handler);
cs43l22_enable(lower, false);
g_cs43l22info.handler = NULL;
g_cs43l22info.arg = NULL;
}
return OK;
}
static bool cs43l22_enable(FAR const struct cs43l22_lower_s *lower,
bool enable)
{
static bool enabled;
irqstate_t flags;
bool ret;
/* Has the interrupt state changed */
flags = enter_critical_section();
if (enable != enabled)
{
/* Enable or disable interrupts */
if (enable && g_cs43l22info.handler)
{
audinfo("Enabling\n");
/* TODO: stm32_pioirqenable(IRQ_INT_CS43L22); */
enabled = true;
}
else
{
audinfo("Disabling\n");
/* TODO: stm32_pioirqdisable(IRQ_INT_CS43L22); */
enabled = false;
}
}
ret = enabled;
leave_critical_section(flags);
return ret;
}
#if 0
static int cs43l22_interrupt(int irq, FAR void *context)
{
/* Just forward the interrupt to the CS43L22 driver */
audinfo("handler %p\n", g_cs43l22info.handler);
if (g_cs43l22info.handler)
{
return g_cs43l22info.handler(&g_cs43l22info.lower, g_cs43l22info.arg);
}
/* We got an interrupt with no handler. This should not
* happen.
*/
/* TODO: stm32_pioirqdisable(IRQ_INT_CS43L22); */
return OK;
}
#endif
static void cs43l22_hw_reset(FAR const struct cs43l22_lower_s *lower)
{
int i;
/* Reset the codec */
stm32_gpiowrite(GPIO_CS43L22_RESET, false);
for (i = 0; i < 0x4fff; i++)
{
__asm__ volatile("nop");
}
stm32_gpiowrite(GPIO_CS43L22_RESET, true);
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_cs43l22_initialize
*
* Description:
* This function is called by platform-specific, setup logic to configure
* and register the CS43L22 device. This function will register the driver
* as /dev/audio/pcm[x] where x is determined by the minor device number.
*
* Input Parameters:
* minor - The input device minor number
*
* Returned Value:
* Zero is returned on success. Otherwise, a negated errno value is
* returned to indicate the nature of the failure.
*
****************************************************************************/
int stm32_cs43l22_initialize(int minor)
{
FAR struct audio_lowerhalf_s *cs43l22;
FAR struct audio_lowerhalf_s *pcm;
FAR struct i2c_master_s *i2c;
FAR struct i2s_dev_s *i2s;
static bool initialized = false;
char devname[12];
int ret;
audinfo("minor %d\n", minor);
DEBUGASSERT(minor >= 0 && minor <= 25);
/* Have we already initialized? Since we never uninitialize we must
* prevent multiple initializations. This is necessary, for example,
* when the touchscreen example is used as a built-in application in
* NSH and can be called numerous time. It will attempt to initialize
* each time.
*/
if (!initialized)
{
stm32_configgpio(GPIO_CS43L22_RESET);
/* Configure the CS43L22 interrupt pin */
/* TODO: (void)stm32_configgpio(PIO_INT_CS43L22); */
/* Get an instance of the I2C interface for the CS43L22 chip select */
i2c = stm32_i2cbus_initialize(CS43L22_I2C_BUS);
if (!i2c)
{
auderr("ERROR: Failed to initialize TWI%d\n", CS43L22_I2C_BUS);
ret = -ENODEV;
goto errout;
}
/* Get an instance of the I2S interface for the CS43L22 data channel */
i2s = stm32_i2sbus_initialize(CS43L22_I2S_BUS);
if (!i2s)
{
auderr("ERROR: Failed to initialize I2S%d\n", CS43L22_I2S_BUS);
ret = -ENODEV;
goto errout_with_i2c;
}
/* Configure the DAC master clock. This clock is provided by
* PCK2 (PB10) that is connected to the CS43L22 MCLK.
*/
/* Configure CS43L22 interrupts */
#if 0 /* TODO: */
stm32_pioirq(PIO_INT_CS43L22);
ret = irq_attach(IRQ_INT_CS43L22, cs43l22_interrupt);
if (ret < 0)
{
auderr("ERROR: Failed to attach CS43L22 interrupt: %d\n", ret);
goto errout_with_i2s;
}
#endif
/* Now we can use these I2C and I2S interfaces to initialize the
* CS43L22 which will return an audio interface.
*/
cs43l22 = cs43l22_initialize(i2c, i2s, &g_cs43l22info.lower);
if (!cs43l22)
{
auderr("ERROR: Failed to initialize the CS43L22\n");
ret = -ENODEV;
goto errout_with_irq;
}
/* No we can embed the CS43L22/I2C/I2S conglomerate into a PCM decoder
* instance so that we will have a PCM front end for the the CS43L22
* driver.
*/
pcm = pcm_decode_initialize(cs43l22);
if (!pcm)
{
auderr("ERROR: Failed create the PCM decoder\n");
ret = -ENODEV;
goto errout_with_cs43l22;
}
/* Create a device name */
snprintf(devname, 12, "pcm%d", minor);
/* Finally, we can register the PCM/CS43L22/I2C/I2S audio device.
*
* Is anyone young enough to remember Rube Goldberg?
*/
ret = audio_register(devname, pcm);
if (ret < 0)
{
auderr("ERROR: Failed to register /dev/%s device: %d\n",
devname, ret);
goto errout_with_pcm;
}
/* Now we are initialized */
initialized = true;
}
return OK;
/* Error exits. Unfortunately there is no mechanism in place now to
* recover resources from most errors on initialization failures.
*/
errout_with_pcm:
errout_with_cs43l22:
errout_with_irq:
#if 0
irq_detach(IRQ_INT_CS43L22);
errout_with_i2s:
#endif
errout_with_i2c:
errout:
return ret;
}
#endif /* HAVE_CS43L22 */
@@ -0,0 +1,113 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_ds1307.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/i2c/i2c_master.h>
#include <nuttx/timers/rtc.h>
#include <nuttx/timers/ds3231.h>
#include "stm32.h"
#include "stm32_i2c.h"
#include "aiit-arm32-board.h"
#if defined(CONFIG_I2C) && defined(CONFIG_RTC_DS1307)
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define DS1307_I2C_ADDR 0x6f /* DS1307 I2C Address */
#define DS1307_I2C_BUS 1 /* DS1307 is on I2C1 */
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_ds1307_init
*
* Description:
* Initialize and configure the DS1307 RTC
*
****************************************************************************/
int stm32_ds1307_init(void)
{
FAR struct i2c_master_s *i2c;
static bool initialized = false;
int ret;
/* Have we already initialized? */
if (!initialized)
{
/* No.. Get the I2C bus driver */
rtcinfo("Initialize I2C%d\n", DS1307_I2C_BUS);
i2c = stm32_i2cbus_initialize(DS1307_I2C_BUS);
if (!i2c)
{
rtcerr("ERROR: Failed to initialize I2C%d\n", DS1307_I2C_BUS);
return -ENODEV;
}
/* Now bind the I2C interface to the DS1307 RTC driver */
rtcinfo("Bind the DS1307 RTC driver to I2C%d\n", DS1307_I2C_BUS);
ret = dsxxxx_rtc_initialize(i2c);
if (ret < 0)
{
rtcerr("ERROR: Failed to bind I2C%d to the DS1307 RTC driver\n",
DS1307_I2C_BUS);
return -ENODEV;
}
#ifdef CONFIG_I2C_DRIVER
/* Register the I2C to get the "nsh> i2c bus" command working */
ret = i2c_register(i2c, DS1307_I2C_BUS);
if (ret < 0)
{
rtcerr("ERROR: Failed to register I2C%d driver: %d\n", bus, ret);
return -ENODEV;
}
#endif
/* Synchronize the system time to the RTC time */
clock_synchronize();
/* Now we are initialized */
initialized = true;
}
return OK;
}
#endif /* CONFIG_I2C && CONFIG_RTC_DS1307 */
@@ -0,0 +1,218 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_enc28j60.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* 2MBit SPI FLASH OR ENC28J60
*
* -- ---- ------------ -----------------------------------------------------
* PIN NAME SIGNAL NOTES
* -- ---- ------------ -----------------------------------------------------
*
* 29 PA4 PA4-SPI1-NSS 10Mbit ENC28J60, SPI 2M FLASH
* 30 PA5 PA5-SPI1-SCK 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
* 31 PA6 PA6-SPI1-MISO 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
* 32 PA7 PA7-SPI1-MOSI 2.4" TFT + Touchscreen, 10Mbit ENC28J60, SPI 2M FLASH
*/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdio.h>
#include <assert.h>
#include <debug.h>
#include <nuttx/spi/spi.h>
#include <nuttx/net/enc28j60.h>
#include <arch/board/board.h>
#include "chip.h"
#include "arm_arch.h"
#include "arm_internal.h"
#include "stm32_spi.h"
#include "aiit-arm32-board.h"
#ifdef CONFIG_ENC28J60
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
/* ENC28J60
*
* --- ------ -------------- ------------------------------------------------
* PIN NAME SIGNAL NOTES
* --- ------ -------------- ------------------------------------------------
*
* 29 PA4 PA4-SPI1-NSS 10Mbit ENC28J60, SPI 2M FLASH
* 30 PA5 PA5-SPI1-SCK 2.4" TFT + Touchscreen,
* 10Mbit ENC28J60, SPI 2M FLASH
* 31 PA6 PA6-SPI1-MISO 2.4" TFT + Touchscreen,
* 10Mbit ENC28J60, SPI 2M FLASH
* 32 PA7 PA7-SPI1-MOSI 2.4" TFT + Touchscreen,
* 10Mbit ENC28J60, SPI 2M FLASH
* 98 PE1 PE1-FSMC_NBL1 2.4" TFT + Touchscreen,
* 10Mbit EN28J60 Reset
* 4 PE5 (no name) 10Mbps ENC28J60 Interrupt
*/
/* ENC28J60 is on SPI1 */
#ifndef CONFIG_STM32_SPI1
# error "Need CONFIG_STM32_SPI1 in the configuration"
#endif
/* SPI Assumptions **********************************************************/
#define ENC28J60_SPI_PORTNO 1 /* On SPI1 */
#define ENC28J60_DEVNO 0 /* Only one ENC28J60 */
/****************************************************************************
* Private Types
****************************************************************************/
struct stm32_lower_s
{
const struct enc_lower_s lower; /* Low-level MCU interface */
xcpt_t handler; /* ENC28J60 interrupt handler */
FAR void *arg; /* Argument that accompanies the interrupt */
};
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
static int up_attach(FAR const struct enc_lower_s *lower, xcpt_t handler,
FAR void *arg);
static void up_enable(FAR const struct enc_lower_s *lower);
static void up_disable(FAR const struct enc_lower_s *lower);
/****************************************************************************
* Private Data
****************************************************************************/
/* The ENC28J60 normal provides interrupts to the MCU via a GPIO pin. The
* following structure provides an MCU-independent mechanixm for controlling
* the ENC28J60 GPIO interrupt.
*/
static struct stm32_lower_s g_enclower =
{
.lower =
{
.attach = up_attach,
.enable = up_enable,
.disable = up_disable
},
.handler = NULL,
.arg = NULL
};
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: struct enc_lower_s methods
****************************************************************************/
static int up_attach(FAR const struct enc_lower_s *lower, xcpt_t handler,
FAR void *arg)
{
FAR struct stm32_lower_s *priv = (FAR struct stm32_lower_s *)lower;
/* Just save the handler for use when the interrupt is enabled */
priv->handler = handler;
priv->arg = arg;
return OK;
}
static void up_enable(FAR const struct enc_lower_s *lower)
{
FAR struct stm32_lower_s *priv = (FAR struct stm32_lower_s *)lower;
DEBUGASSERT(priv->handler);
stm32_gpiosetevent(GPIO_ENC28J60_INTR, false, true, true,
priv->handler, priv->arg);
}
/* REVISIT: Since the interrupt is completely torn down, not just disabled,
* in interrupt requests that occurs while the interrupt is disabled will be
* lost.
*/
static void up_disable(FAR const struct enc_lower_s *lower)
{
stm32_gpiosetevent(GPIO_ENC28J60_INTR, false, true, true,
NULL, NULL);
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: arm_netinitialize
****************************************************************************/
void arm_netinitialize(void)
{
FAR struct spi_dev_s *spi;
int ret;
/* Assumptions:
* 1) ENC28J60 pins were configured in up_spi.c early in the boot-up phase.
* 2) Clocking for the SPI1 peripheral was also provided earlier in
* boot-up.
*/
spi = stm32_spibus_initialize(ENC28J60_SPI_PORTNO);
if (!spi)
{
nerr("ERROR: Failed to initialize SPI port %d\n", ENC28J60_SPI_PORTNO);
return;
}
/* Take ENC28J60 out of reset (active low) */
stm32_gpiowrite(GPIO_ENC28J60_RESET, true);
/* Bind the SPI port to the ENC28J60 driver */
ret = enc_initialize(spi, &g_enclower.lower, ENC28J60_DEVNO);
if (ret < 0)
{
nerr("ERROR: Failed to bind SPI port %d ENC28J60 device %d: %d\n",
ENC28J60_SPI_PORTNO, ENC28J60_DEVNO, ret);
return;
}
ninfo("Bound SPI port %d to ENC28J60 device %d\n",
ENC28J60_SPI_PORTNO, ENC28J60_DEVNO);
}
#endif /* CONFIG_ENC28J60 */
@@ -0,0 +1,240 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_ethernet.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/* Force verbose debug on in this file only to support unit-level testing. */
#ifdef CONFIG_NETDEV_PHY_DEBUG
# undef CONFIG_DEBUG_INFO
# define CONFIG_DEBUG_INFO 1
# undef CONFIG_DEBUG_NET
# define CONFIG_DEBUG_NET 1
#endif
#include <string.h>
#include <assert.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/fs/ioctl.h>
#include <nuttx/mtd/mtd.h>
#include "stm32_gpio.h"
#include "stm32_eth.h"
#include "aiit-arm32-board.h"
#if defined(CONFIG_STM32F4DISBB) && defined(CONFIG_STM32_ETHMAC)
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define STM32_ETHMAC_DEVNAME "eth0"
#define AT24XX_MACADDR_OFFSET 0x9a
/* Debug ********************************************************************/
/* Extra, in-depth debug output that is only available if
* CONFIG_NETDEV_PHY_DEBUG us defined.
*/
#ifdef CONFIG_NETDEV_PHY_DEBUG
# define phyerr _err
# define phywarn _warn
# define phyinfo _info
#else
# define phyerr(x...)
# define phywarn(x...)
# define phyinfo(x...)
#endif
/****************************************************************************
* Private Data
****************************************************************************/
#ifdef HAVE_NETMONITOR
static xcpt_t g_ethmac_handler;
static void *g_ethmac_arg;
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_emac0_phy_enable
****************************************************************************/
#ifdef HAVE_NETMONITOR
static void stm32_emac0_phy_enable(bool enable)
{
phyinfo("enable=%d\n", enable);
if (enable && g_ethmac_handler != NULL)
{
/* Attach and enable GPIO interrupt (and event) on the falling edge */
stm32_gpiosetevent(GPIO_EMAC_NINT, false, true, true,
g_ethmac_handler, g_ethmac_arg);
}
else
{
/* Detach and disable GPIO interrupt */
stm32_gpiosetevent(GPIO_EMAC_NINT, false, false, false,
NULL, NULL);
}
}
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_netinitialize
*
* Description:
* Configure board resources to support networking.
*
****************************************************************************/
void weak_function stm32_netinitialize(void)
{
#ifdef HAVE_NETMONITOR
/* Configure the PHY interrupt GPIO */
phyinfo("Configuring %08x\n", GPIO_EMAC_NINT);
stm32_configgpio(GPIO_EMAC_NINT);
#endif
/* Configure PHY /RESET output */
stm32_configgpio(GPIO_EMAC_NRST);
}
/****************************************************************************
* Name: arch_phy_irq
*
* Description:
* This function may be called to register an interrupt handler that will
* be called when a PHY interrupt occurs. This function both attaches
* the interrupt handler and enables the interrupt if 'handler' is non-
* NULL. If handler is NULL, then the interrupt is detached and disabled
* instead.
*
* The PHY interrupt is always disabled upon return. The caller must
* call back through the enable function point to control the state of
* the interrupt.
*
* This interrupt may or may not be available on a given platform depending
* on how the network hardware architecture is implemented. In a typical
* case, the PHY interrupt is provided to board-level logic as a GPIO
* interrupt (in which case this is a board-specific interface and really
* should be called board_phy_irq()); In other cases, the PHY interrupt
* may be cause by the chip's MAC logic (in which case arch_phy_irq()) is
* an appropriate name. Other other boards, there may be no PHY interrupts
* available at all. If client attachable PHY interrupts are available
* from the board or from the chip, then CONFIG_ARCH_PHY_INTERRUPT should
* be defined to indicate that fact.
*
* Typical usage:
* a. OS service logic (not application logic*) attaches to the PHY
* PHY interrupt and enables the PHY interrupt.
* b. When the PHY interrupt occurs: (1) the interrupt should be
* disabled and () work should be scheduled on the worker thread (or
* perhaps a dedicated application thread).
* c. That worker thread should use the SIOCGMIIPHY, SIOCGMIIREG,
* and SIOCSMIIREG ioctl calls** to communicate with the PHY,
* determine what network event took place (Link Up/Down?), and
* take the appropriate actions.
* d. It should then interact the PHY to clear any pending
* interrupts, then re-enable the PHY interrupt.
*
* * This is an OS internal interface and should not be used from
* application space. Rather applications should use the SIOCMIISIG
* ioctl to receive a signal when a PHY event occurs.
* ** This interrupt is really of no use if the Ethernet MAC driver
* does not support these ioctl calls.
*
* Input Parameters:
* intf - Identifies the network interface. For example "eth0". Only
* useful on platforms that support multiple Ethernet interfaces
* and, hence, multiple PHYs and PHY interrupts.
* handler - The client interrupt handler to be invoked when the PHY
* asserts an interrupt. Must reside in OS space, but can
* signal tasks in user space. A value of NULL can be passed
* in order to detach and disable the PHY interrupt.
* arg - The argument that will accompany the interrupt
* enable - A function pointer that be unused to enable or disable the
* PHY interrupt.
*
* Returned Value:
* Zero (OK) returned on success; a negated errno value is returned on
* failure.
*
****************************************************************************/
#ifdef HAVE_NETMONITOR
int arch_phy_irq(FAR const char *intf, xcpt_t handler, void *arg,
phy_enable_t *enable)
{
phy_enable_t enabler;
irqstate_t flags;
ninfo("%s: handler=%p\n", intf, handler);
phyinfo("ETHMAC: devname=%s\n", STM32_ETHMAC_DEVNAME);
DEBUGASSERT(intf);
flags = enter_critical_section();
if (strcmp(intf, STM32_ETHMAC_DEVNAME) == 0)
{
phyinfo("Select ETHMAC\n");
g_ethmac_handler = handler;
g_ethmac_arg = arg;
enabler = stm32_emac0_phy_enable;
}
else
{
nerr("ERROR: Unsupported interface: %s\n", intf);
enabler = NULL;
}
if (enable)
{
*enable = enabler;
}
leave_critical_section(flags);
return OK;
}
#endif
#endif /* CONFIG_STM32F4DISBB && CONFIG_STM32_ETHMAC */
@@ -0,0 +1,139 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_extmem.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <assert.h>
#include <debug.h>
#include <arch/board/board.h>
#include "chip.h"
#include "arm_arch.h"
#include "stm32.h"
#include "aiit-arm32-board.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef CONFIG_STM32_FSMC
# warning "FSMC is not enabled"
#endif
#if STM32_NGPIO_PORTS < 6
# error "Required GPIO ports not enabled"
#endif
#define STM32_FSMC_NADDRCONFIGS 26
#define STM32_FSMC_NDATACONFIGS 16
/****************************************************************************
* Public Data
****************************************************************************/
/* GPIO configurations common to most external memories */
static const uint32_t g_addressconfig[STM32_FSMC_NADDRCONFIGS] =
{
GPIO_FSMC_A0, GPIO_FSMC_A1, GPIO_FSMC_A2,
GPIO_FSMC_A3, GPIO_FSMC_A4, GPIO_FSMC_A5,
GPIO_FSMC_A6, GPIO_FSMC_A7, GPIO_FSMC_A8,
GPIO_FSMC_A9, GPIO_FSMC_A10, GPIO_FSMC_A11,
GPIO_FSMC_A12, GPIO_FSMC_A13, GPIO_FSMC_A14,
GPIO_FSMC_A15, GPIO_FSMC_A16, GPIO_FSMC_A17,
GPIO_FSMC_A18, GPIO_FSMC_A19, GPIO_FSMC_A20,
GPIO_FSMC_A21, GPIO_FSMC_A22, GPIO_FSMC_A23,
GPIO_FSMC_A24, GPIO_FSMC_A25
};
static const uint32_t g_dataconfig[STM32_FSMC_NDATACONFIGS] =
{
GPIO_FSMC_D0, GPIO_FSMC_D1, GPIO_FSMC_D2,
GPIO_FSMC_D3, GPIO_FSMC_D4, GPIO_FSMC_D5,
GPIO_FSMC_D6, GPIO_FSMC_D7, GPIO_FSMC_D8,
GPIO_FSMC_D9, GPIO_FSMC_D10, GPIO_FSMC_D11,
GPIO_FSMC_D12, GPIO_FSMC_D13, GPIO_FSMC_D14,
GPIO_FSMC_D15
};
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_extmemgpios
*
* Description:
* Initialize GPIOs for external memory usage
*
****************************************************************************/
void stm32_extmemgpios(const uint32_t *gpios, int ngpios)
{
int i;
/* Configure GPIOs */
for (i = 0; i < ngpios; i++)
{
stm32_configgpio(gpios[i]);
}
}
/****************************************************************************
* Name: stm32_extmemaddr
*
* Description:
* Initialize address line GPIOs for external memory access
*
****************************************************************************/
void stm32_extmemaddr(int naddrs)
{
stm32_extmemgpios(g_addressconfig, naddrs);
}
/****************************************************************************
* Name: stm32_extmemdata
*
* Description:
* Initialize data line GPIOs for external memory access
*
****************************************************************************/
void stm32_extmemdata(int ndata)
{
stm32_extmemgpios(g_dataconfig, ndata);
}
@@ -0,0 +1,248 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_gs2200m.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <debug.h>
#include <inttypes.h>
#include <nuttx/arch.h>
#include <nuttx/config.h>
#include <nuttx/board.h>
#include <nuttx/spi/spi.h>
#include <nuttx/irq.h>
#include <nuttx/spinlock.h>
#include <nuttx/wireless/gs2200m.h>
#include "arm_arch.h"
#include "chip.h"
#include "stm32.h"
#include <arch/board/board.h>
#include "aiit-arm32-board.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define GPIO_GS2200M_INT (GPIO_INPUT | GPIO_FLOAT | GPIO_EXTI | \
GPIO_OPENDRAIN | GPIO_PORTD | GPIO_PIN2)
#define GPIO_GS2200M_XRST (GPIO_OUTPUT | GPIO_PUSHPULL | \
GPIO_OUTPUT_SET | GPIO_SPEED_50MHz | \
GPIO_PORTE | GPIO_PIN4)
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
static int gs2200m_irq_attach(xcpt_t, FAR void *);
static void gs2200m_irq_enable(void);
static void gs2200m_irq_disable(void);
static uint32_t gs2200m_dready(int *);
static void gs2200m_reset(bool);
/****************************************************************************
* Private Data
****************************************************************************/
static const struct gs2200m_lower_s g_wifi_lower =
{
.attach = gs2200m_irq_attach,
.enable = gs2200m_irq_enable,
.disable = gs2200m_irq_disable,
.dready = gs2200m_dready,
.reset = gs2200m_reset
};
static FAR void *g_devhandle = NULL;
static volatile int32_t _enable_count = 0;
static volatile uint32_t _n_called;
static xcpt_t g_irq_handler = NULL;
static FAR void *g_irq_arg = NULL;
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: gs2200m_irq_attach
****************************************************************************/
static int gs2200m_irq_attach(xcpt_t handler, FAR void *arg)
{
/* NOTE: Just save the handler and arg here */
g_irq_handler = handler;
g_irq_arg = arg;
return 0;
}
/****************************************************************************
* Name: gs2200m_irq_enable
****************************************************************************/
static void gs2200m_irq_enable(void)
{
irqstate_t flags = spin_lock_irqsave(NULL);
uint32_t dready = 0;
wlinfo("== ec:%" PRId32 " called=%" PRId32 " \n",
_enable_count, _n_called++);
if (0 == _enable_count)
{
/* Check if irq has been asserted */
dready = gs2200m_dready(NULL);
/* NOTE: stm32 does not support level-triggered irq */
stm32_gpiosetevent(GPIO_GS2200M_INT, true, false,
true, g_irq_handler, g_irq_arg);
}
_enable_count++;
spin_unlock_irqrestore(NULL, flags);
if (dready)
{
/* Call g_irq_handler directly */
wlinfo("== ** call irq handler ** \n");
g_irq_handler(0, NULL, g_irq_arg);
}
}
/****************************************************************************
* Name: gs2200m_irq_disable
****************************************************************************/
static void gs2200m_irq_disable(void)
{
irqstate_t flags = spin_lock_irqsave(NULL);
wlinfo("== ec:%" PRId32 " called=%" PRId32 " \n",
_enable_count, _n_called++);
_enable_count--;
if (0 == _enable_count)
{
stm32_gpiosetevent(GPIO_GS2200M_INT, false, false,
false, NULL, NULL);
}
spin_unlock_irqrestore(NULL, flags);
}
/****************************************************************************
* Name: gs2200m_dready
****************************************************************************/
static uint32_t gs2200m_dready(int *ec)
{
irqstate_t flags = spin_lock_irqsave(NULL);
uint32_t r = stm32_gpioread(GPIO_GS2200M_INT);
if (ec)
{
/* Copy enable count (just for debug) */
*ec = _enable_count;
}
spin_unlock_irqrestore(NULL, flags);
return r;
}
/****************************************************************************
* Name: gs2200m_reset
****************************************************************************/
static void gs2200m_reset(bool reset)
{
stm32_gpiowrite(GPIO_GS2200M_XRST, !reset);
}
/****************************************************************************
* Name: spi_pincontrol
*
* Description:
* Configure SPI1 pins
*
****************************************************************************/
static void _config_pin(void)
{
stm32_configgpio(GPIO_GS2200M_XRST); /* Assign PD6 as XRST */
stm32_configgpio(GPIO_GS2200M_INT); /* Assign PD2 as IRQ */
stm32_configgpio(GPIO_SPI3_SCK_1); /* Assign PB3 as SPI3_SCK */
stm32_configgpio(GPIO_SPI3_MISO_1); /* Assign PB4 as SPI3_MISO */
stm32_configgpio(GPIO_SPI3_MOSI_1); /* Assign PB5 as SPI3_MOSI */
stm32_configgpio(GPIO_GS2200M_CS); /* Assign PD7 as chip select */
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_gs2200m_initialize
****************************************************************************/
int stm32_gs2200m_initialize(FAR const char *devpath, int bus)
{
FAR struct spi_dev_s *spi;
wlinfo("Initializing GS2200M..\n");
if (!g_devhandle)
{
/* Configure pin */
_config_pin();
/* Initialize spi device */
spi = stm32_spibus_initialize(bus);
if (!spi)
{
wlerr("ERROR: Failed to initialize spi%d.\n", bus);
return -ENODEV;
}
g_devhandle = gs2200m_register(devpath, spi, &g_wifi_lower);
if (!g_devhandle)
{
wlerr("ERROR: Failed to register gs2200m driver.\n");
return -ENODEV;
}
}
return OK;
}
@@ -0,0 +1,82 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_hciuart.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include <stdio.h>
#include <debug.h>
#include <errno.h>
#include <nuttx/wireless/bluetooth/bt_uart.h>
#include "stm32_hciuart.h"
#include "aiit-arm32-board.h"
#include <arch/board/board.h>
#ifdef HAVE_HCIUART
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: hciuart_dev_initialize
*
* Description:
* This function is called by board initialization logic to configure the
* Bluetooth HCI UART driver
*
* Input Parameters:
* None
*
* Returned Value:
* Zero is returned on success. Otherwise, a negated errno value is
* returned to indicate the nature of the failure.
*
****************************************************************************/
int hciuart_dev_initialize(void)
{
int ret;
/* Perform one-time initialization */
hciuart_initialize();
/* Instantiate the HCI UART lower half interface
* Then initialize the HCI UART upper half driver with the bluetooth stack
*/
ret = btuart_register(hciuart_instantiate(HCIUART_SERDEV));
if (ret < 0)
{
wlerr("ERROR: btuart_register() failed: %d\n", ret);
}
return ret;
}
#endif /* HAVE_HCIUART */
@@ -0,0 +1,260 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_idle.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <arch/board/board.h>
#include <nuttx/config.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/board.h>
#include <nuttx/clock.h>
#include <nuttx/power/pm.h>
#include <nuttx/irq.h>
#include "arm_internal.h"
#include "stm32_pm.h"
#include "stm32_rcc.h"
#include "stm32_exti.h"
#include "aiit-arm32-board.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
/* Does the board support an IDLE LED to indicate that the board is in the
* IDLE state?
*/
#if defined(CONFIG_ARCH_LEDS) && defined(LED_IDLE)
# define BEGIN_IDLE() board_autoled_on(LED_IDLE)
# define END_IDLE() board_autoled_off(LED_IDLE)
#else
# define BEGIN_IDLE()
# define END_IDLE()
#endif
/* Values for the RTC Alarm to wake up from the PM_STANDBY mode */
#ifndef CONFIG_PM_ALARM_SEC
# define CONFIG_PM_ALARM_SEC 3
#endif
#ifndef CONFIG_PM_ALARM_NSEC
# define CONFIG_PM_ALARM_NSEC 0
#endif
#define PM_IDLE_DOMAIN 0 /* Revisit */
/****************************************************************************
* Private Data
****************************************************************************/
#if 0 /* Not used */
static void up_alarmcb(void);
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_idlepm
*
* Description:
* Perform IDLE state power management.
*
****************************************************************************/
#ifdef CONFIG_PM
static void stm32_idlepm(void)
{
static enum pm_state_e oldstate = PM_NORMAL;
enum pm_state_e newstate;
irqstate_t flags;
int ret;
/* Decide, which power saving level can be obtained */
newstate = pm_checkstate(PM_IDLE_DOMAIN);
/* Check for state changes */
if (newstate != oldstate)
{
sinfo("newstate= %d oldstate=%d\n", newstate, oldstate);
flags = enter_critical_section();
/* Force the global state change */
ret = pm_changestate(PM_IDLE_DOMAIN, newstate);
if (ret < 0)
{
/* The new state change failed, revert to the preceding state */
pm_changestate(PM_IDLE_DOMAIN, oldstate);
/* No state change... */
goto errout;
}
/* Then perform board-specific, state-dependent logic here */
switch (newstate)
{
case PM_NORMAL:
{
}
break;
case PM_IDLE:
{
}
break;
case PM_STANDBY:
{
#ifdef CONFIG_RTC_ALARM
/* Disable RTC Alarm interrupt */
#warning "missing logic"
/* Configure the RTC alarm to Auto Wake the system */
#warning "missing logic"
/* The tv_nsec value must not exceed 1,000,000,000. That
* would be an invalid time.
*/
#warning "missing logic"
/* Set the alarm */
#warning "missing logic"
#endif
/* Call the STM32 stop mode */
stm32_pmstop(true);
/* We have been re-awakened by some even: A button press?
* An alarm? Cancel any pending alarm and resume the normal
* operation.
*/
#ifdef CONFIG_RTC_ALARM
#warning "missing logic"
#endif
/* Resume normal operation */
pm_changestate(PM_IDLE_DOMAIN, PM_NORMAL);
newstate = PM_NORMAL;
}
break;
case PM_SLEEP:
{
/* We should not return from standby mode. The only way out
* of standby is via the reset path.
*/
stm32_pmstandby();
}
break;
default:
break;
}
/* Save the new state */
oldstate = newstate;
errout:
leave_critical_section(flags);
}
}
#else
# define stm32_idlepm()
#endif
/****************************************************************************
* Name: up_alarmcb
*
* Description:
* RTC alarm service routine
*
****************************************************************************/
#if 0 /* Not used */
static void up_alarmcb(void)
{
/* This alarm occurs because there wasn't any EXTI interrupt during the
* PM_STANDBY period. So just go to sleep.
*/
pm_changestate(PM_IDLE_DOMAIN, PM_SLEEP);
}
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_idle
*
* Description:
* up_idle() is the logic that will be executed when their is no other
* ready-to-run task. This is processor idle time and will continue until
* some interrupt occurs to cause a context switch from the idle task.
*
* Processing in this state may be processor-specific. e.g., this is where
* power management operations might be performed.
*
****************************************************************************/
void up_idle(void)
{
#if defined(CONFIG_SUPPRESS_INTERRUPTS) || defined(CONFIG_SUPPRESS_TIMER_INTS)
/* If the system is idle and there are no timer interrupts, then process
* "fake" timer interrupts. Hopefully, something will wake up.
*/
nxsched_process_timer();
#else
/* Perform IDLE mode power management */
BEGIN_IDLE();
stm32_idlepm();
END_IDLE();
#endif
}
@@ -0,0 +1,112 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_max7219.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdio.h>
#include <stdbool.h>
#include <debug.h>
#include <errno.h>
#include <nuttx/arch.h>
#include <nuttx/board.h>
#include <nuttx/spi/spi.h>
#include <nuttx/lcd/lcd.h>
#include <nuttx/lcd/max7219.h>
#include "stm32_gpio.h"
#include "stm32_spi.h"
#include "aiit-arm32-board.h"
#ifdef CONFIG_NX_LCDDRIVER
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define LCD_SPI_PORTNO 1 /* On SPI1 */
#ifndef CONFIG_LCD_CONTRAST
# define CONFIG_LCD_CONTRAST 60
#endif
/****************************************************************************
* Private Data
****************************************************************************/
FAR struct spi_dev_s *g_spidev;
FAR struct lcd_dev_s *g_lcddev;
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_lcd_initialize
****************************************************************************/
int board_lcd_initialize(void)
{
g_spidev = stm32_spibus_initialize(LCD_SPI_PORTNO);
if (g_spidev == NULL)
{
lcderr("ERROR: Failed to initialize SPI port %d\n", LCD_SPI_PORTNO);
return -ENODEV;
}
return OK;
}
/****************************************************************************
* Name: board_lcd_getdev
****************************************************************************/
FAR struct lcd_dev_s *board_lcd_getdev(int lcddev)
{
g_lcddev = max7219_initialize(g_spidev, lcddev);
if (!g_lcddev)
{
lcderr("ERROR: Failed to bind SPI port 1 to LCD %d\n", lcddev);
}
else
{
lcdinfo("SPI port 1 bound to LCD %d\n", lcddev);
return g_lcddev;
}
return NULL;
}
/****************************************************************************
* Name: board_lcd_uninitialize
****************************************************************************/
void board_lcd_uninitialize(void)
{
/* TO-FIX */
}
#endif /* CONFIG_NX_LCDDRIVER */
@@ -0,0 +1,88 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_max7219_leds.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/spi/spi.h>
#include <nuttx/leds/max7219.h>
#include "stm32.h"
#include "stm32_spi.h"
#include "aiit-arm32-board.h"
#if defined(CONFIG_SPI) && defined(CONFIG_STM32_SPI1) && \
defined(CONFIG_LEDS_MAX7219)
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define MAX7219_SPI_PORTNO 1 /* On SPI1 */
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_max7219init
*
* Description:
* Initialize the max7219 to control 7-segment numeric display
*
* Input Parameters:
* devpath - The full path to the driver to register. E.g., "/dev/numdisp0"
*
* Returned Value:
* Zero (OK) on success; a negated errno value on failure.
*
****************************************************************************/
int stm32_max7219init(FAR const char *devpath)
{
FAR struct spi_dev_s *spi;
int ret;
spi = stm32_spibus_initialize(MAX7219_SPI_PORTNO);
if (spi == NULL)
{
return -ENODEV;
}
/* Register the MAX7219 Driver at the specified location. */
ret = max7219_leds_register(devpath, spi);
if (ret < 0)
{
lederr("ERROR: max7219_leds_register(%s) failed: %d\n",
devpath, ret);
return ret;
}
return OK;
}
#endif /* CONFIG_SPI && CONFIG_LEDS_MAX7219 */
@@ -0,0 +1,105 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_mmcsd.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <debug.h>
#include <nuttx/config.h>
#include <nuttx/mmcsd.h>
#include <nuttx/spi/spi.h>
#include <pthread.h>
#include <sched.h>
#include <time.h>
#include <unistd.h>
#include "arm_arch.h"
#include "chip.h"
#include "stm32.h"
#include <arch/board/board.h>
#include "aiit-arm32-board.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifdef CONFIG_DISABLE_MOUNTPOINT
# error "SD driver requires CONFIG_DISABLE_MOUNTPOINT to be disabled"
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_spi1register
*
* Description:
* Registers media change callback
****************************************************************************/
int stm32_spi2register(struct spi_dev_s *dev, spi_mediachange_t callback,
void *arg)
{
/* TODO: media change callback */
return OK;
}
/****************************************************************************
* Name: stm32_mmcsd_initialize
*
* Description:
* Initialize SPI-based SD card and card detect thread.
****************************************************************************/
int stm32_mmcsd_initialize(int port, int minor)
{
struct spi_dev_s *spi;
int rv;
stm32_configgpio(GPIO_MMCSD_NCD); /* Assign SD_DET */
stm32_configgpio(GPIO_SPI2_SCK_2); /* Assign PB13 as SPI2_SCK */
stm32_configgpio(GPIO_MMCSD_NSS); /* Assign CS */
stm32_gpiowrite(GPIO_MMCSD_NSS, 1); /* Ensure the CS is inactive */
mcinfo("INFO: Initializing mmcsd port %d minor %d \n",
port, minor);
spi = stm32_spibus_initialize(port);
if (spi == NULL)
{
mcerr("ERROR: Failed to initialize SPI port %d\n", port);
return -ENODEV;
}
rv = mmcsd_spislotinitialize(minor, minor, spi);
if (rv < 0)
{
mcerr("ERROR: Failed to bind SPI port %d to SD slot %d\n",
port, minor);
return rv;
}
spiinfo("INFO: mmcsd card has been initialized successfully\n");
return OK;
}
@@ -0,0 +1,39 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_netinit.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: arm_netinitialize
****************************************************************************/
#if defined(CONFIG_NET) && !defined(CONFIG_NETDEV_LATEINIT)
void arm_netinitialize(void)
{
}
#endif
@@ -0,0 +1,95 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_ostest.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <string.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <arch/board/board.h>
#include "arm_arch.h"
#include "arm_internal.h"
#include "aiit-arm32-board.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
#undef HAVE_FPU
#if defined(CONFIG_ARCH_FPU) && !defined(CONFIG_TESTING_OSTEST_FPUTESTDISABLE) && \
defined(CONFIG_TESTING_OSTEST_FPUSIZE) && defined(CONFIG_SCHED_WAITPID)
# define HAVE_FPU 1
#endif
#ifdef HAVE_FPU
#if CONFIG_TESTING_OSTEST_FPUSIZE != (4*SW_FPU_REGS)
# error "CONFIG_TESTING_OSTEST_FPUSIZE has the wrong size"
#endif
/****************************************************************************
* Private Data
****************************************************************************/
static uint32_t g_saveregs[XCPTCONTEXT_REGS];
/****************************************************************************
* Public Functions
****************************************************************************/
/* Given an array of size CONFIG_TESTING_OSTEST_FPUSIZE, this function will
* return the current FPU registers.
*/
void arch_getfpu(FAR uint32_t *fpusave)
{
irqstate_t flags;
/* Take a snapshot of the thread context right now */
flags = enter_critical_section();
arm_saveusercontext(g_saveregs);
/* Return only the floating register values */
memcpy(fpusave, &g_saveregs[REG_S0], (4*SW_FPU_REGS));
leave_critical_section(flags);
}
/* Given two arrays of size CONFIG_TESTING_OSTEST_FPUSIZE this function
* will compare them and return true if they are identical.
*/
bool arch_cmpfpu(FAR const uint32_t *fpusave1, FAR const uint32_t *fpusave2)
{
return memcmp(fpusave1, fpusave2, (4*SW_FPU_REGS)) == 0;
}
#endif /* HAVE_FPU */
@@ -0,0 +1,89 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_pca9635.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include <stdio.h>
#include <debug.h>
#include <errno.h>
#include <nuttx/i2c/i2c_master.h>
#include <nuttx/leds/pca9635pw.h>
#include <arch/irq.h>
#include "stm32_gpio.h"
#include "stm32_i2c.h"
#include "aiit-arm32-board.h"
#ifdef CONFIG_PCA9635PW
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_pca9635_initialize
*
* Description:
* This function is called by board initialization logic to configure the
* LED PWM chip. This function will register the driver as /dev/leddrv0.
*
* Input Parameters:
* None
*
* Returned Value:
* Zero is returned on success. Otherwise, a negated errno value is
* returned to indicate the nature of the failure.
*
****************************************************************************/
int stm32_pca9635_initialize(void)
{
FAR struct i2c_master_s *i2c;
int ret;
/* Get the I2C driver that interfaces with the pca9635
* (PCA9635_I2CBUS)
*/
i2c = stm32_i2cbus_initialize(PCA9635_I2CBUS);
if (!i2c)
{
_err("ERROR: Failed to initialize I2C%d\n", PCA9635_I2CBUS);
return -1;
}
ret = pca9635pw_register("/dev/leddrv0", i2c, PCA9635_I2CADDR);
if (ret < 0)
{
snerr("ERROR: Failed to register PCA9635 driver: %d\n", ret);
return ret;
}
return OK;
}
#endif /* CONFIG_PCA9635PW */
@@ -0,0 +1,75 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_pm.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/board.h>
#include <nuttx/power/pm.h>
#include "arm_internal.h"
#include "stm32_pm.h"
#include "aiit-arm32-board.h"
#ifdef CONFIG_PM
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_pminitialize
*
* Description:
* This function is called by MCU-specific logic at power-on reset in
* order to provide one-time initialization the power management subsystem.
* This function must be called *very* early in the initialization sequence
* *before* any other device drivers are initialized (since they may
* attempt to register with the power management subsystem).
*
* Input Parameters:
* None.
*
* Returned Value:
* None.
*
****************************************************************************/
void arm_pminitialize(void)
{
/* Then initialize the NuttX power management subsystem proper */
pm_initialize();
#if defined(CONFIG_ARCH_IDLE_CUSTOM) && defined(CONFIG_PM_BUTTONS)
/* Initialize the buttons to wake up the system from low power modes */
stm32_pm_buttons();
#endif
/* Initialize the LED PM */
stm32_led_pminitialize();
}
#endif /* CONFIG_PM */
@@ -0,0 +1,122 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_pmbuttons.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <arch/board/board.h>
#include <nuttx/config.h>
#include <stdbool.h>
#include <debug.h>
#include <nuttx/board.h>
#include <nuttx/power/pm.h>
#include <arch/irq.h>
#include "arm_arch.h"
#include "nvic.h"
#include "stm32_pwr.h"
#include "stm32_pm.h"
#include "aiit-arm32-board.h"
#if defined(CONFIG_PM) && defined(CONFIG_ARCH_IDLE_CUSTOM) && defined(CONFIG_PM_BUTTONS)
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
#ifndef CONFIG_ARCH_BUTTONS
# error "CONFIG_ARCH_BUTTONS is not defined in the configuration"
#endif
#ifndef CONFIG_ARCH_IRQBUTTONS
# warning "CONFIG_ARCH_IRQBUTTONS is not defined in the configuration"
#endif
#ifndef CONFIG_PM_BUTTON_ACTIVITY
# define CONFIG_PM_BUTTON_ACTIVITY 10
#endif
#define PM_IDLE_DOMAIN 0 /* Revisit */
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
#ifdef CONFIG_ARCH_IRQBUTTONS
static int button_handler(int irq, FAR void *context, FAR void *arg);
#endif /* CONFIG_ARCH_IRQBUTTONS */
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: button_handler
*
* Description:
* Handle a button wake-up interrupt
*
****************************************************************************/
#ifdef CONFIG_ARCH_IRQBUTTONS
static int button_handler(int irq, FAR void *context, FAR void *arg)
{
/* At this point the MCU should have already awakened. The state
* change will be handled in the IDLE loop when the system is re-awakened
* The button interrupt handler should be totally ignorant of the PM
* activities and should report button activity as if nothing
* special happened.
*/
pm_activity(PM_IDLE_DOMAIN, CONFIG_PM_BUTTON_ACTIVITY);
return OK;
}
#endif /* CONFIG_ARCH_IRQBUTTONS */
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_pm_buttons
*
* Description:
* Configure the user button of the STM32f4discovery board as EXTI,
* so it is able to wakeup the MCU from the PM_STANDBY mode
*
****************************************************************************/
void stm32_pm_buttons(void)
{
/* Initialize the button GPIOs */
board_button_initialize();
#ifdef CONFIG_ARCH_IRQBUTTONS
board_button_irq(0, button_handler, NULL);
#endif
}
#endif /* CONFIG_PM && CONFIG_ARCH_IDLE_CUSTOM && CONFIG_PM_BUTTONS)*/
@@ -0,0 +1,123 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_pwm.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/timers/pwm.h>
#include <arch/board/board.h>
#include "chip.h"
#include "arm_arch.h"
#include "stm32_pwm.h"
#include "aiit-arm32-board.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
/* PWM
*
* The aiit-arm32-board has no real on-board PWM devices, but the board can
* be configured to output a pulse train using TIM4 CH2. This pin is used by
* FSMC is connected to CN5 just for this purpose:
*
* PD13 FSMC_A18 / MC_TIM4_CH2OUT pin 33 (EnB)
*
* FSMC must be disabled in this case!
*/
#define HAVE_PWM 1
#ifndef CONFIG_PWM
# undef HAVE_PWM
#endif
#ifndef CONFIG_STM32_TIM4
# undef HAVE_PWM
#endif
#ifndef CONFIG_STM32_TIM4_PWM
# undef HAVE_PWM
#endif
#if !defined(CONFIG_STM32_TIM4_CHANNEL) || CONFIG_STM32_TIM4_CHANNEL != STM32F4AIIT_PWMCHANNEL
# undef HAVE_PWM
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_pwm_setup
*
* Description:
* Initialize PWM and register the PWM device.
*
****************************************************************************/
int stm32_pwm_setup(void)
{
#ifdef HAVE_PWM
static bool initialized = false;
struct pwm_lowerhalf_s *pwm;
int ret;
/* Have we already initialized? */
if (!initialized)
{
/* Call stm32_pwminitialize() to get an instance of the PWM interface */
pwm = stm32_pwminitialize(STM32F4AIIT_PWMTIMER);
if (!pwm)
{
aerr("ERROR: Failed to get the STM32 PWM lower half\n");
return -ENODEV;
}
/* Register the PWM driver at "/dev/pwm0" */
ret = pwm_register("/dev/pwm0", pwm);
if (ret < 0)
{
aerr("ERROR: pwm_register failed: %d\n", ret);
return ret;
}
/* Now we are initialized */
initialized = true;
}
return OK;
#else
return -ENODEV;
#endif
}
@@ -0,0 +1,62 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_reset.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/arch.h>
#include <nuttx/board.h>
#ifdef CONFIG_BOARDCTL_RESET
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_reset
*
* Description:
* Reset board. Support for this function is required by board-level
* logic if CONFIG_BOARDCTL_RESET is selected.
*
* Input Parameters:
* status - Status information provided with the reset event. This
* meaning of this status information is board-specific. If not
* used by a board, the value zero may be provided in calls to
* board_reset().
*
* Returned Value:
* If this function returns, then it was not possible to power-off the
* board due to some constraints. The return value int this case is a
* board-specific reason for the failure to shutdown.
*
****************************************************************************/
int board_reset(int status)
{
up_systemreset();
return 0;
}
#endif /* CONFIG_BOARDCTL_RESET */
@@ -0,0 +1,169 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_rgbled.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/timers/pwm.h>
#include <nuttx/leds/rgbled.h>
#include <arch/board/board.h>
#include "chip.h"
#include "arm_arch.h"
#include "stm32_pwm.h"
#include "aiit-arm32-board.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
#define HAVE_RGBLED 1
#ifndef CONFIG_PWM
# undef HAVE_RGBLED
#endif
#ifndef CONFIG_STM32_TIM1
# undef HAVE_RGBLED
#endif
#ifndef CONFIG_STM32_TIM2
# undef HAVE_RGBLED
#endif
#ifndef CONFIG_STM32_TIM3
# undef HAVE_RGBLED
#endif
#ifndef CONFIG_STM32_TIM1_PWM
# undef HAVE_RGBLED
#endif
#ifndef CONFIG_STM32_TIM2_PWM
# undef HAVE_RGBLED
#endif
#ifndef CONFIG_STM32_TIM3_PWM
# undef HAVE_RGBLED
#endif
#ifdef HAVE_RGBLED
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_rgbled_setup
*
* Description:
* Configure the RGB LED.
*
****************************************************************************/
int stm32_rgbled_setup(void)
{
static bool initialized = false;
struct pwm_lowerhalf_s *ledr;
struct pwm_lowerhalf_s *ledg;
struct pwm_lowerhalf_s *ledb;
struct pwm_info_s info;
int ret;
/* Have we already initialized? */
if (!initialized)
{
/* Call stm32_pwminitialize() to get an instance of the PWM interface */
ledr = stm32_pwminitialize(1);
if (!ledr)
{
lederr("ERROR: Failed to get the STM32 PWM lower half to LEDR\n");
return -ENODEV;
}
/* Define frequency and duty cycle */
info.frequency = 100;
info.duty = 0;
/* Initialize LED R */
ledr->ops->setup(ledr);
ledr->ops->start(ledr, &info);
/* Call stm32_pwminitialize() to get an instance of the PWM interface */
ledg = stm32_pwminitialize(2);
if (!ledg)
{
lederr("ERROR: Failed to get the STM32 PWM lower half to LEDG\n");
return -ENODEV;
}
/* Initialize LED G */
ledg->ops->setup(ledg);
ledg->ops->start(ledg, &info);
/* Call stm32_pwminitialize() to get an instance of the PWM interface */
ledb = stm32_pwminitialize(3);
if (!ledb)
{
lederr("ERROR: Failed to get the STM32 PWM lower half to LEDB\n");
return -ENODEV;
}
/* Initialize LED B */
ledb->ops->setup(ledb);
ledb->ops->start(ledb, &info);
/* Register the RGB LED diver at "/dev/rgbled0" */
ret = rgbled_register("/dev/rgbled0", ledr, ledg, ledb);
if (ret < 0)
{
lederr("ERROR: rgbled_register failed: %d\n", ret);
return ret;
}
/* Now we are initialized */
initialized = true;
}
return OK;
}
#else
# error "HAVE_RGBLED is undefined"
#endif /* HAVE_RGBLED */
@@ -0,0 +1,76 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_romfs.h
*
* Copyright (C) 2017 Tomasz Wozniak. All rights reserved.
* Author: Tomasz Wozniak <t.wozniak@samsung.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __BOARDS_ARM_STM32_STM32F4AIIT_SRC_STM32_ROMFS_H
#define __BOARDS_ARM_STM32_STM32F4AIIT_SRC_STM32_ROMFS_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#ifdef CONFIG_STM32_ROMFS
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define ROMFS_SECTOR_SIZE 64
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: stm32_romfs_initialize
*
* Description:
* Registers built-in ROMFS image as block device and mounts it.
*
* Returned Value:
* Zero (OK) on success, a negated errno value on error.
*
* Assumptions/Limitations:
* Memory addresses [&romfs_data_begin .. &romfs_data_begin) should contain
* ROMFS volume data, as included in the assembly snippet above (l. 84).
*
****************************************************************************/
int stm32_romfs_initialize(void);
#endif /* CONFIG_STM32_ROMFS */
#endif /* __BOARDS_ARM_STM32_STM32F4AIIT_SRC_STM32_ROMFS_H */
@@ -0,0 +1,158 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_romfs_initialize.c
* This file provides contents of an optional ROMFS volume, mounted at boot.
*
* Copyright (C) 2017 Tomasz Wozniak. All rights reserved.
* Author: Tomasz Wozniak <t.wozniak@samsung.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/mount.h>
#include <sys/types.h>
#include <stdint.h>
#include <debug.h>
#include <errno.h>
#include <nuttx/fs/fs.h>
#include <nuttx/drivers/ramdisk.h>
#include "stm32_romfs.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef CONFIG_STM32_ROMFS
# error "CONFIG_STM32_ROMFS must be defined"
#else
#ifndef CONFIG_STM32_ROMFS_IMAGEFILE
# error "CONFIG_STM32_ROMFS_IMAGEFILE must be defined"
#endif
#ifndef CONFIG_STM32_ROMFS_DEV_MINOR
# error "CONFIG_STM32_ROMFS_DEV_MINOR must be defined"
#endif
#ifndef CONFIG_STM32_ROMFS_MOUNTPOINT
# error "CONFIG_STM32_ROMFS_MOUNTPOINT must be defined"
#endif
#define NSECTORS(size) (((size) + ROMFS_SECTOR_SIZE - 1)/ROMFS_SECTOR_SIZE)
#define STR2(m) #m
#define STR(m) STR2(m)
#define MKMOUNT_DEVNAME(m) "/dev/ram" STR(m)
#define MOUNT_DEVNAME MKMOUNT_DEVNAME(CONFIG_STM32_ROMFS_DEV_MINOR)
/****************************************************************************
* Private Data
****************************************************************************/
__asm__ (
".section .rodata\n"
".balign 16\n"
".globl romfs_data_begin\n"
"romfs_data_begin:\n"
".incbin " STR(CONFIG_STM32_ROMFS_IMAGEFILE) "\n"\
\
".balign " STR(ROMFS_SECTOR_SIZE) "\n"
".globl romfs_data_end\n"
"romfs_data_end:\n"
".globl romfs_data_size\n"
"romfs_data_size:\n"
".word romfs_data_end - romfs_data_begin\n"
".previous\n");
extern const char romfs_data_begin;
extern const char romfs_data_end;
extern const int romfs_data_size;
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_romfs_initialize
*
* Description:
* Registers the aboveincluded binary file as block device.
* Then mounts the block device as ROMFS filesystems.
*
* Returned Value:
* Zero (OK) on success, a negated errno value on error.
*
* Assumptions/Limitations:
* Memory addresses [&romfs_data_begin .. &romfs_data_begin) should contain
* ROMFS volume data, as included in the assembly snippet above (l. 84).
*
****************************************************************************/
int stm32_romfs_initialize(void)
{
uintptr_t romfs_data_len;
int ret;
/* Create a ROM disk for the /etc filesystem */
romfs_data_len = (uintptr_t)&romfs_data_end - (uintptr_t)&romfs_data_begin;
ret = romdisk_register(CONFIG_STM32_ROMFS_DEV_MINOR, &romfs_data_begin,
NSECTORS(romfs_data_len), ROMFS_SECTOR_SIZE);
if (ret < 0)
{
ferr("ERROR: romdisk_register failed: %d\n", -ret);
return ret;
}
/* Mount the file system */
finfo("Mounting ROMFS filesystem at target=%s with source=%s\n",
CONFIG_STM32_ROMFS_MOUNTPOINT, MOUNT_DEVNAME);
ret = nx_mount(MOUNT_DEVNAME, CONFIG_STM32_ROMFS_MOUNTPOINT,
"romfs", MS_RDONLY, NULL);
if (ret < 0)
{
ferr("ERROR: nx_mount(%s,%s,romfs) failed: %d\n",
MOUNT_DEVNAME, CONFIG_STM32_ROMFS_MOUNTPOINT, ret);
return ret;
}
return OK;
}
#endif /* CONFIG_STM32_ROMFS */
@@ -0,0 +1,163 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_sdio.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include <stdio.h>
#include <debug.h>
#include <errno.h>
#include <nuttx/sdio.h>
#include <nuttx/mmcsd.h>
#include "stm32.h"
#include "aiit-arm32-board.h"
#ifdef HAVE_SDIO
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
/* Card detections requires card support and a card detection GPIO */
#define HAVE_NCD 1
#if !defined(HAVE_SDIO) || !defined(GPIO_SDIO_NCD)
# undef HAVE_NCD
#endif
/****************************************************************************
* Private Data
****************************************************************************/
static FAR struct sdio_dev_s *g_sdio_dev;
#ifdef HAVE_NCD
static bool g_sd_inserted = 0xff; /* Impossible value */
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_ncd_interrupt
*
* Description:
* Card detect interrupt handler.
*
****************************************************************************/
#ifdef HAVE_NCD
static int stm32_ncd_interrupt(int irq, FAR void *context, FAR void *arg)
{
bool present;
present = !stm32_gpioread(GPIO_SDIO_NCD);
if (present != g_sd_inserted)
{
sdio_mediachange(g_sdio_dev, present);
g_sd_inserted = present;
}
return OK;
}
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_sdio_initialize
*
* Description:
* Initialize SDIO-based MMC/SD card support
*
****************************************************************************/
int stm32_sdio_initialize(void)
{
int ret;
#ifdef HAVE_NCD
/* Card detect */
bool cd_status;
/* Configure the card detect GPIO */
stm32_configgpio(GPIO_SDIO_NCD);
/* Register an interrupt handler for the card detect pin */
stm32_gpiosetevent(GPIO_SDIO_NCD, true, true, true,
stm32_ncd_interrupt, NULL);
#endif
/* Mount the SDIO-based MMC/SD block driver */
/* First, get an instance of the SDIO interface */
finfo("Initializing SDIO slot %d\n", SDIO_SLOTNO);
g_sdio_dev = sdio_initialize(SDIO_SLOTNO);
if (!g_sdio_dev)
{
ferr("ERROR: Failed to initialize SDIO slot %d\n", SDIO_SLOTNO);
return -ENODEV;
}
/* Now bind the SDIO interface to the MMC/SD driver */
finfo("Bind SDIO to the MMC/SD driver, minor=%d\n", SDIO_MINOR);
ret = mmcsd_slotinitialize(SDIO_MINOR, g_sdio_dev);
if (ret != OK)
{
ferr("ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
return ret;
}
finfo("Successfully bound SDIO to the MMC/SD driver\n");
#ifdef HAVE_NCD
/* Use SD card detect pin to check if a card is g_sd_inserted */
cd_status = !stm32_gpioread(GPIO_SDIO_NCD);
finfo("Card detect : %d\n", cd_status);
sdio_mediachange(g_sdio_dev, cd_status);
#else
/* Assume that the SD card is inserted. What choice do we have? */
sdio_mediachange(g_sdio_dev, true);
#endif
return OK;
}
#endif /* HAVE_SDIO */
@@ -0,0 +1,333 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_spi.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/spi/spi.h>
#include <arch/board/board.h>
#include "arm_arch.h"
#include "chip.h"
#include "stm32.h"
#include "aiit-arm32-board.h"
#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3)
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_spidev_initialize
*
* Description:
* Called to configure SPI chip select GPIO pins for the aiit-arm32-board
* board.
*
****************************************************************************/
void weak_function stm32_spidev_initialize(void)
{
#ifdef CONFIG_ENC28J60
stm32_configgpio(GPIO_ENC28J60_CS);
stm32_configgpio(GPIO_ENC28J60_RESET);
stm32_configgpio(GPIO_ENC28J60_INTR);
#endif
#ifdef CONFIG_STM32_SPI1
stm32_configgpio(GPIO_CS_MEMS); /* MEMS chip select */
#endif
#if defined(CONFIG_STM32_SPI2) && defined(CONFIG_SENSORS_MAX31855)
stm32_configgpio(GPIO_MAX31855_CS); /* MAX31855 chip select */
#endif
#if defined(CONFIG_LCD_MAX7219) || defined(CONFIG_LEDS_MAX7219)
stm32_configgpio(GPIO_MAX7219_CS); /* MAX7219 chip select */
#endif
#ifdef CONFIG_LPWAN_SX127X
stm32_configgpio(GPIO_SX127X_CS); /* SX127x chip select */
#endif
#if defined(CONFIG_LCD_ST7567) || defined(CONFIG_LCD_ST7567)
stm32_configgpio(STM32_LCD_CS); /* ST7567/ST7789 chip select */
#endif
#if defined(CONFIG_STM32_SPI2) && defined(CONFIG_SENSORS_MAX6675)
stm32_configgpio(GPIO_MAX6675_CS); /* MAX6675 chip select */
#endif
#if defined(CONFIG_LCD_UG2864AMBAG01) || defined(CONFIG_LCD_UG2864HSWEG01) || \
defined(CONFIG_LCD_SSD1351)
stm32_configgpio(GPIO_OLED_CS); /* OLED chip select */
# if defined(CONFIG_LCD_UG2864AMBAG01)
stm32_configgpio(GPIO_OLED_A0); /* OLED Command/Data */
# endif
# if defined(CONFIG_LCD_UG2864HSWEG01) || defined(CONFIG_LCD_SSD1351)
stm32_configgpio(GPIO_OLED_DC); /* OLED Command/Data */
# endif
#endif
}
/****************************************************************************
* Name: stm32_spi1/2/3select and stm32_spi1/2/3status
*
* Description:
* The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status
* must be provided by board-specific logic. They are implementations of
* the select and status methods of the SPI interface defined by struct
* spi_ops_s (see include/nuttx/spi/spi.h). All other methods (including
* stm32_spibus_initialize()) are provided by common STM32 logic. To use
* this common SPI logic on your board:
*
* 1. Provide logic in stm32_boardinitialize() to configure SPI chip select
* pins.
* 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions
* in your board-specific logic. These functions will perform chip
* selection and status operations using GPIOs in the way your board
* is configured.
* 3. Add a calls to stm32_spibus_initialize() in your low level
* application initialization logic
* 4. The handle returned by stm32_spibus_initialize() may then be used to
* bind the SPI driver to higher level logic (e.g., calling
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
* the SPI MMC/SD driver).
*
****************************************************************************/
#ifdef CONFIG_STM32_SPI1
void stm32_spi1select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" :
"de-assert");
#ifdef CONFIG_ENC28J60
if (devid == SPIDEV_ETHERNET(0))
{
/* Set the GPIO low to select and high to de-select */
stm32_gpiowrite(GPIO_ENC28J60_CS, !selected);
}
#endif
#if defined(CONFIG_LCD_ST7567) || defined(CONFIG_LCD_ST7789)
if (devid == SPIDEV_DISPLAY(0))
{
stm32_gpiowrite(STM32_LCD_CS, !selected);
}
#endif
#if defined(CONFIG_LCD_MAX7219) || defined(CONFIG_LEDS_MAX7219)
if (devid == SPIDEV_DISPLAY(0))
{
stm32_gpiowrite(GPIO_MAX7219_CS, !selected);
}
#endif
#if defined(CONFIG_LCD_UG2864AMBAG01) || defined(CONFIG_LCD_UG2864HSWEG01) || \
defined(CONFIG_LCD_SSD1351)
if (devid == SPIDEV_DISPLAY(0))
{
stm32_gpiowrite(GPIO_OLED_CS, !selected);
}
else
#endif
{
stm32_gpiowrite(GPIO_CS_MEMS, !selected);
}
}
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
{
uint8_t status = 0;
return status;
}
#endif
#ifdef CONFIG_STM32_SPI2
void stm32_spi2select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" :
"de-assert");
#ifdef CONFIG_LPWAN_SX127X
if (devid == SPIDEV_LPWAN(0))
{
stm32_gpiowrite(GPIO_SX127X_CS, !selected);
}
#endif
#if defined(CONFIG_SENSORS_MAX31855)
if (devid == SPIDEV_TEMPERATURE(0))
{
stm32_gpiowrite(GPIO_MAX31855_CS, !selected);
}
#endif
#if defined(CONFIG_SENSORS_MAX6675)
if (devid == SPIDEV_TEMPERATURE(0))
{
stm32_gpiowrite(GPIO_MAX6675_CS, !selected);
}
#endif
#if defined(CONFIG_MMCSD_SPI)
if (devid == SPIDEV_MMCSD(0))
{
stm32_gpiowrite(GPIO_MMCSD_NSS, !selected);
}
#endif
}
uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
{
uint8_t ret = 0;
#if defined(CONFIG_MMCSD_SPI)
if (devid == SPIDEV_MMCSD(0))
{
/* Note: SD_DET is pulled high when there's no SD card present. */
ret = stm32_gpioread(GPIO_MMCSD_NCD) ? 0 : 1;
}
#endif
#ifdef CONFIG_LPWAN_SX127X
if (devid == SPIDEV_LPWAN(0))
{
ret |= SPI_STATUS_PRESENT;
}
#endif
return ret;
}
#endif
#ifdef CONFIG_STM32_SPI3
void stm32_spi3select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" :
"de-assert");
#if defined(CONFIG_WL_GS2200M)
if (devid == SPIDEV_WIRELESS(0))
{
stm32_gpiowrite(GPIO_GS2200M_CS, !selected);
}
#endif
}
uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
#endif
/****************************************************************************
* Name: stm32_spi1cmddata
*
* Description:
* Set or clear the SH1101A A0 or SD1306 D/C n bit to select data (true)
* or command (false). This function must be provided by platform-specific
* logic. This is an implementation of the cmddata method of the SPI
* interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h).
*
* Input Parameters:
*
* spi - SPI device that controls the bus the device that requires the CMD/
* DATA selection.
* devid - If there are multiple devices on the bus, this selects which one
* to select cmd or data. NOTE: This design restricts, for example,
* one one SPI display per SPI bus.
* cmd - true: select command; false: select data
*
* Returned Value:
* None
*
****************************************************************************/
#ifdef CONFIG_SPI_CMDDATA
#ifdef CONFIG_STM32_SPI1
int stm32_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
#if defined(CONFIG_LCD_ST7567) || defined(CONFIG_LCD_ST7789)
if (devid == SPIDEV_DISPLAY(0))
{
/* This is the Data/Command control pad which determines whether the
* data bits are data or a command.
*/
stm32_gpiowrite(STM32_LCD_RS, !cmd);
return OK;
}
#endif
#if defined(CONFIG_LCD_UG2864AMBAG01) || defined(CONFIG_LCD_UG2864HSWEG01) || \
defined(CONFIG_LCD_SSD1351)
if (devid == SPIDEV_DISPLAY(0))
{
/* "This is the Data/Command control pad which determines whether the
* data bits are data or a command.
*
* A0 = "H": the inputs at D0 to D7 are treated as display data.
* A0 = "L": the inputs at D0 to D7 are transferred to the command
* registers."
*/
# if defined(CONFIG_LCD_UG2864AMBAG01)
stm32_gpiowrite(GPIO_OLED_A0, !cmd);
# endif
# if defined(CONFIG_LCD_UG2864HSWEG01) || defined(CONFIG_LCD_SSD1351)
stm32_gpiowrite(GPIO_OLED_DC, !cmd);
# endif
return OK;
}
#endif
return -ENODEV;
}
#endif
#ifdef CONFIG_STM32_SPI2
int stm32_spi2cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return -ENODEV;
}
#endif
#ifdef CONFIG_STM32_SPI3
int stm32_spi3cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return -ENODEV;
}
#endif
#endif /* CONFIG_SPI_CMDDATA */
#endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI2 */
@@ -0,0 +1,388 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_ssd1289.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <stdint.h>
#include <stdbool.h>
#include <string.h>
#include <assert.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/board.h>
#include <nuttx/spi/spi.h>
#include <nuttx/lcd/lcd.h>
#include <nuttx/lcd/ssd1289.h>
#include <arch/board/board.h>
#include "arm_arch.h"
#include "stm32.h"
#include "aiit-arm32-board.h"
#ifdef CONFIG_LCD_SSD1289
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
#ifndef CONFIG_STM32_FSMC
# error "CONFIG_STM32_FSMC is required to use the LCD"
#endif
/* STM32F4Discovery LCD Hardware Definitions ********************************/
/* LCD /CS is CE1 == NOR/SRAM Bank 1
*
* Bank 1 = 0x60000000 | 0x00000000
* Bank 2 = 0x60000000 | 0x04000000
* Bank 3 = 0x60000000 | 0x08000000
* Bank 4 = 0x60000000 | 0x0c000000
*
* FSMC address bit 16 is used to distinguish command and data.
* FSMC address bits 0-24 correspond to ARM address bits 1-25.
*/
#define STM32_LCDBASE ((uintptr_t)(0x60000000 | 0x00000000))
#define LCD_INDEX (STM32_LCDBASE)
#define LCD_DATA (STM32_LCDBASE + 0x00020000)
/* SRAM pin definitions */
#define LCD_NADDRLINES 1 /* A16 */
#define LCD_NDATALINES 16 /* D0-15 */
/****************************************************************************
* Private Function Protototypes
****************************************************************************/
/* Low Level LCD access */
static void stm32_select(FAR struct ssd1289_lcd_s *dev);
static void stm32_deselect(FAR struct ssd1289_lcd_s *dev);
static void stm32_index(FAR struct ssd1289_lcd_s *dev, uint8_t index);
#ifndef CONFIG_SSD1289_WRONLY
static uint16_t stm32_read(FAR struct ssd1289_lcd_s *dev);
#endif
static void stm32_write(FAR struct ssd1289_lcd_s *dev, uint16_t data);
static void stm32_backlight(FAR struct ssd1289_lcd_s *dev, int power);
/****************************************************************************
* Private Data
****************************************************************************/
/* LCD pin mapping (see boards/arm/stm32/stm324discovery/README.txt
* MAPPING TO STM32 F4:
*
* ---------------- ------------- ----------------------------------
* STM32 FUNCTION LCD PIN STM32F4Discovery PIN
* ---------------- ------------- ----------------------------------
* FSMC_D0 D0 pin 4 PD14 P1 pin 46 Conflict (Note 1)
* FSMC_D1 D1 pin 3 PD15 P1 pin 47 Conflict (Note 2)
* FSMC_D2 D2 pin 6 PD0 P2 pin 36 Free I/O
* FSMC_D3 D3 pin 5 PD1 P2 pin 33 Free I/O
* FSMC_D4 D4 pin 8 PE7 P1 pin 25 Free I/O
* FSMC_D5 D5 pin 7 PE8 P1 pin 26 Free I/O
* FSMC_D6 D6 pin 10 PE9 P1 pin 27 Free I/O
* FSMC_D7 D7 pin 9 PE10 P1 pin 28 Free I/O
* FSMC_D8 D8 pin 12 PE11 P1 pin 29 Free I/O
* FSMC_D9 D9 pin 11 PE12 P1 pin 30 Free I/O
* FSMC_D10 D10 pin 14 PE13 P1 pin 31 Free I/O
* FSMC_D11 D11 pin 13 PE14 P1 pin 32 Free I/O
* FSMC_D12 D12 pin 16 PE15 P1 pin 33 Free I/O
* FSMC_D13 D13 pin 15 PD8 P1 pin 40 Free I/O
* FSMC_D14 D14 pin 18 PD9 P1 pin 41 Free I/O
* FSMC_D15 D15 pin 17 PD10 P1 pin 42 Free I/O
* FSMC_A16 RS pin 19 PD11 P1 pin 27 Free I/O
* FSMC_NE1 ~CS pin 10 PD7 P2 pin 27 Free I/O
* FSMC_NWE ~WR pin 22 PD5 P2 pin 29 Conflict (Note 3)
* FSMC_NOE ~RD pin 21 PD4 P2 pin 32 Conflict (Note 4)
* PC6 RESET pin 24 PC6 P2 pin 47 Free I/O
* ---------------- ------------- ----------------------------------
*
* 1 Used for the RED LED
* 2 Used for the BLUE LED
* 3 Used for the RED LED and for OTG FS Overcurrent. It may be okay to
* use for the parallel interface if PC0 is held high (or floating).
* PC0 enables the STMPS2141STR IC power switch that drives the OTG FS
* host VBUS.
* 4 Also the reset pin for the CS43L22 audio Codec.
*/
#define GPIO_LCD_RESET (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN6)
/* GPIO configurations unique to the LCD */
static const uint32_t g_lcdconfig[] =
{
/* PC6(RESET), FSMC_A16, FSMC_NOE, FSMC_NWE, and FSMC_NE1 */
GPIO_LCD_RESET, GPIO_FSMC_A16, GPIO_FSMC_NOE, GPIO_FSMC_NWE, GPIO_FSMC_NE1
};
#define NLCD_CONFIG (sizeof(g_lcdconfig)/sizeof(uint32_t))
/* This is the driver state structure
* (there is no retained state information)
*/
static struct ssd1289_lcd_s g_ssd1289 =
{
.select = stm32_select,
.deselect = stm32_deselect,
.index = stm32_index,
#ifndef CONFIG_SSD1289_WRONLY
.read = stm32_read,
#endif
.write = stm32_write,
.backlight = stm32_backlight
};
/* The saved instance of the LCD driver */
static FAR struct lcd_dev_s *g_ssd1289drvr;
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_select
*
* Description:
* Select the LCD device
*
****************************************************************************/
static void stm32_select(FAR struct ssd1289_lcd_s *dev)
{
/* Does not apply to this hardware */
}
/****************************************************************************
* Name: stm32_deselect
*
* Description:
* De-select the LCD device
*
****************************************************************************/
static void stm32_deselect(FAR struct ssd1289_lcd_s *dev)
{
/* Does not apply to this hardware */
}
/****************************************************************************
* Name: stm32_deselect
*
* Description:
* Set the index register
*
****************************************************************************/
static void stm32_index(FAR struct ssd1289_lcd_s *dev, uint8_t index)
{
putreg16((uint16_t)index, LCD_INDEX);
}
/****************************************************************************
* Name: stm32_read
*
* Description:
* Read LCD data (GRAM data or register contents)
*
****************************************************************************/
#ifndef CONFIG_SSD1289_WRONLY
static uint16_t stm32_read(FAR struct ssd1289_lcd_s *dev)
{
return getreg16(LCD_DATA);
}
#endif
/****************************************************************************
* Name: stm32_write
*
* Description:
* Write LCD data (GRAM data or register contents)
*
****************************************************************************/
static void stm32_write(FAR struct ssd1289_lcd_s *dev, uint16_t data)
{
putreg16((uint16_t)data, LCD_DATA);
}
/****************************************************************************
* Name: stm32_write
*
* Description:
* Write LCD data (GRAM data or register contents)
*
****************************************************************************/
static void stm32_backlight(FAR struct ssd1289_lcd_s *dev, int power)
{
#warning "Missing logic"
}
/****************************************************************************
* Name: stm32_selectlcd
*
* Description:
* Initialize to the LCD
*
****************************************************************************/
void stm32_selectlcd(void)
{
/* Configure GPIO pins */
stm32_extmemdata(LCD_NDATALINES); /* Common data lines: D0-D15 */
stm32_extmemgpios(g_lcdconfig, NLCD_CONFIG); /* LCD-specific control lines */
/* Enable AHB clocking to the FSMC */
stm32_fsmc_enable();
/* Color LCD configuration (LCD configured as follow):
*
* - Data/Address MUX = Disable "FSMC_BCR_MUXEN" just not enable it.
* - Extended Mode = Disable "FSMC_BCR_EXTMOD"
* - Memory Type = SRAM "FSMC_BCR_SRAM"
* - Data Width = 16bit "FSMC_BCR_MWID16"
* - Write Operation = Enable "FSMC_BCR_WREN"
* - Asynchronous Wait = Disable
*/
/* Bank1 NOR/SRAM control register configuration */
putreg32(FSMC_BCR_SRAM | FSMC_BCR_MWID16 | FSMC_BCR_WREN, STM32_FSMC_BCR1);
/* Bank1 NOR/SRAM timing register configuration */
putreg32(FSMC_BTR_ADDSET(5) | FSMC_BTR_ADDHLD(0) |
FSMC_BTR_DATAST(9) | FSMC_BTR_BUSTURN(0) |
FSMC_BTR_CLKDIV(0) | FSMC_BTR_DATLAT(0) |
FSMC_BTR_ACCMODA, STM32_FSMC_BTR1);
putreg32(0xffffffff, STM32_FSMC_BWTR1);
/* Enable the bank by setting the MBKEN bit */
putreg32(FSMC_BCR_MBKEN | FSMC_BCR_SRAM |
FSMC_BCR_MWID16 | FSMC_BCR_WREN, STM32_FSMC_BCR1);
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_lcd_initialize
*
* Description:
* Initialize the LCD video hardware. The initial state of the LCD is fully
* initialized, display memory cleared, and the LCD ready to use, but with
* the power setting at 0 (full off).
*
****************************************************************************/
int board_lcd_initialize(void)
{
/* Only initialize the driver once */
if (!g_ssd1289drvr)
{
lcdinfo("Initializing\n");
/* Configure GPIO pins and configure the FSMC to support the LCD */
stm32_selectlcd();
/* Reset the LCD (active low) */
stm32_gpiowrite(GPIO_LCD_RESET, false);
up_mdelay(5);
stm32_gpiowrite(GPIO_LCD_RESET, true);
/* Configure and enable the LCD */
up_mdelay(50);
g_ssd1289drvr = ssd1289_lcdinitialize(&g_ssd1289);
if (!g_ssd1289drvr)
{
lcderr("ERROR: ssd1289_lcdinitialize failed\n");
return -ENODEV;
}
}
/* Clear the display (setting it to the color 0=black) */
#if 0 /* Already done in the driver */
ssd1289_clear(g_ssd1289drvr, 0);
#endif
/* Turn the display off */
g_ssd1289drvr->setpower(g_ssd1289drvr, 0);
return OK;
}
/****************************************************************************
* Name: board_lcd_getdev
*
* Description:
* Return a a reference to the LCD object for the specified LCD.
* This allows support for multiple LCD devices.
*
****************************************************************************/
FAR struct lcd_dev_s *board_lcd_getdev(int lcddev)
{
DEBUGASSERT(lcddev == 0);
return g_ssd1289drvr;
}
/****************************************************************************
* Name: board_lcd_uninitialize
*
* Description:
* Uninitialize the LCD support
*
****************************************************************************/
void board_lcd_uninitialize(void)
{
/* Turn the display off */
g_ssd1289drvr->setpower(g_ssd1289drvr, 0);
}
#endif /* CONFIG_LCD_SSD1289 */
@@ -0,0 +1,116 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_ssd1351.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/board.h>
#include <nuttx/spi/spi.h>
#include <nuttx/lcd/lcd.h>
#include <nuttx/lcd/ssd1351.h>
#include "stm32_gpio.h"
#include "stm32_spi.h"
#include "aiit-arm32-board.h"
#ifdef CONFIG_LCD_SSD1351
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
/* The pin configurations here require that SPI1 is selected */
#ifndef CONFIG_STM32_SPI1
# error "The OLED driver requires CONFIG_STM32_SPI1 in the configuration"
#endif
#ifndef CONFIG_SSD1351_SPI4WIRE
# error "The configuration requires the SPI 4-wire interface"
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_graphics_setup
*
* Description:
* Called by NX initialization logic to configure the OLED.
*
****************************************************************************/
FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
{
FAR struct spi_dev_s *spi;
FAR struct lcd_dev_s *dev;
/* Configure the OLED GPIOs. This initial configuration is RESET low,
* putting the OLED into reset state.
*/
stm32_configgpio(GPIO_OLED_RESET);
/* Wait a bit then release the OLED from the reset state */
up_mdelay(20);
stm32_gpiowrite(GPIO_OLED_RESET, true);
/* Get the SPI1 port interface */
spi = stm32_spibus_initialize(1);
if (spi == NULL)
{
lcderr("ERROR: Failed to initialize SPI port 1\n");
}
else
{
/* Bind the SPI port to the OLED */
dev = ssd1351_initialize(spi, devno);
if (dev == NULL)
{
lcderr("ERROR: Failed to bind SPI port 1 to OLED %d\n", devno);
}
else
{
lcdinfo("Bound SPI port 1 to OLED %d\n", devno);
/* And turn the OLED on */
dev->setpower(dev, LCD_FULL_ON);
return dev;
}
}
return NULL;
}
#endif /* CONFIG_LCD_SSD1351 */
@@ -0,0 +1,87 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_st7032.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/i2c/i2c_master.h>
#include <nuttx/lcd/st7032.h>
#include "stm32.h"
#include "aiit-arm32-board.h"
#if defined(CONFIG_I2C) && defined(CONFIG_STM32_I2C1) && \
defined(CONFIG_LCD_ST7032)
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define ST7032_I2C_PORTNO 1 /* On I2C1 */
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_st7032init
*
* Description:
* Initialize the st7032 display
*
* Input Parameters:
* devpath - The full path to the driver to register. E.g., "/dev/disp0"
*
* Returned Value:
* Zero (OK) on success; a negated errno value on failure.
*
****************************************************************************/
int stm32_st7032init(FAR const char *devpath)
{
FAR struct i2c_master_s *i2c;
int ret;
i2c = stm32_i2cbus_initialize(ST7032_I2C_PORTNO);
if (i2c == NULL)
{
return -ENODEV;
}
/* Register the ST7032 Driver at the specified location. */
ret = st7032_register(devpath, i2c);
if (ret < 0)
{
lcderr("ERROR: st7032_register(%s) failed: %d\n",
devpath, ret);
return ret;
}
return OK;
}
#endif /* CONFIG_I2C && CONFIG_LEDS_ST7032 */
@@ -0,0 +1,131 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_st7567.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdio.h>
#include <stdbool.h>
#include <debug.h>
#include <errno.h>
#include <nuttx/arch.h>
#include <nuttx/board.h>
#include <nuttx/spi/spi.h>
#include <nuttx/lcd/lcd.h>
#include <nuttx/lcd/st7567.h>
#include "arm_arch.h"
#include "arm_internal.h"
#include "stm32_gpio.h"
#include "stm32_spi.h"
#include "aiit-arm32-board.h"
#ifdef CONFIG_LCD_ST7567
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define LCD_SPI_PORTNO 1 /* On SPI1 */
#ifndef CONFIG_LCD_CONTRAST
# define CONFIG_LCD_CONTRAST 0x1f
#endif
/****************************************************************************
* Private Data
****************************************************************************/
FAR struct spi_dev_s *g_spidev;
FAR struct lcd_dev_s *g_lcddev;
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_lcd_initialize
****************************************************************************/
int board_lcd_initialize(void)
{
stm32_configgpio(STM32_LCD_RST);
stm32_configgpio(STM32_LCD_RS);
stm32_gpiowrite(STM32_LCD_RST, 1);
stm32_gpiowrite(STM32_LCD_RS, 1);
g_spidev = stm32_spibus_initialize(LCD_SPI_PORTNO);
if (!g_spidev)
{
lcderr("ERROR: Failed to initialize SPI port %d\n", LCD_SPI_PORTNO);
return -ENODEV;
}
stm32_gpiowrite(STM32_LCD_RST, 0);
up_mdelay(1);
stm32_gpiowrite(STM32_LCD_RST, 1);
return OK;
}
/****************************************************************************
* Name: board_lcd_getdev
****************************************************************************/
FAR struct lcd_dev_s *board_lcd_getdev(int lcddev)
{
g_lcddev = st7567_initialize(g_spidev, lcddev);
if (!g_lcddev)
{
lcderr("ERROR: Failed to bind SPI port 1 to LCD %d\n", lcddev);
}
else
{
lcdinfo("SPI port 1 bound to LCD %d\n", lcddev);
/* And turn the LCD on (CONFIG_LCD_MAXPOWER should be 1) */
g_lcddev->setpower(g_lcddev, CONFIG_LCD_MAXPOWER);
/* Set contrast to right value, otherwise background too dark */
g_lcddev->setcontrast(g_lcddev, CONFIG_LCD_CONTRAST);
return g_lcddev;
}
return NULL;
}
/****************************************************************************
* Name: board_lcd_uninitialize
****************************************************************************/
void board_lcd_uninitialize(void)
{
/* TO-FIX */
}
#endif /* CONFIG_LCD_ST7567 */
@@ -0,0 +1,129 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_st7789.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdio.h>
#include <stdbool.h>
#include <debug.h>
#include <errno.h>
#include <nuttx/arch.h>
#include <nuttx/board.h>
#include <nuttx/spi/spi.h>
#include <nuttx/lcd/lcd.h>
#include <nuttx/lcd/st7789.h>
#include "stm32.h"
#include "stm32_gpio.h"
#include "stm32_spi.h"
#include "aiit-arm32-board.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define LCD_SPI_PORTNO 1
/****************************************************************************
* Private Data
****************************************************************************/
static struct spi_dev_s *g_spidev;
static struct lcd_dev_s *g_lcd = NULL;
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_lcd_initialize
*
* Description:
* Initialize the LCD video hardware. The initial state of the LCD is
* fully initialized, display memory cleared, and the LCD ready to use, but
* with the power setting at 0 (full off).
*
****************************************************************************/
int board_lcd_initialize(void)
{
stm32_configgpio(STM32_LCD_RST);
stm32_configgpio(STM32_LCD_RS);
g_spidev = stm32_spibus_initialize(LCD_SPI_PORTNO);
if (!g_spidev)
{
lcderr("ERROR: Failed to initialize SPI port %d\n", LCD_SPI_PORTNO);
return -ENODEV;
}
stm32_gpiowrite(STM32_LCD_RST, 0);
up_mdelay(1);
stm32_gpiowrite(STM32_LCD_RST, 1);
up_mdelay(120);
return OK;
}
/****************************************************************************
* Name: board_lcd_getdev
*
* Description:
* Return a a reference to the LCD object for the specified LCD. This
* allows support for multiple LCD devices.
*
****************************************************************************/
FAR struct lcd_dev_s *board_lcd_getdev(int devno)
{
g_lcd = st7789_lcdinitialize(g_spidev);
if (!g_lcd)
{
lcderr("ERROR: Failed to bind SPI port %d to LCD %d\n", LCD_SPI_PORTNO,
devno);
}
else
{
lcdinfo("SPI port %d bound to LCD %d\n", LCD_SPI_PORTNO, devno);
return g_lcd;
}
return NULL;
}
/****************************************************************************
* Name: board_lcd_uninitialize
*
* Description:
* Uninitialize the LCD support
*
****************************************************************************/
void board_lcd_uninitialize(void)
{
/* Turn the display off */
g_lcd->setpower(g_lcd, 0);
}
@@ -0,0 +1,201 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_sx127x.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdio.h>
#include <stdint.h>
#include <errno.h>
#include <assert.h>
#include <debug.h>
#include <nuttx/board.h>
#include <nuttx/signal.h>
#include <nuttx/wireless/lpwan/sx127x.h>
#include <arch/board/board.h>
#include "stm32_gpio.h"
#include "stm32_exti.h"
#include "stm32_spi.h"
#include "aiit-arm32-board.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* SX127X on SPI1 bus */
#define SX127X_SPI 2
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
static void sx127x_chip_reset(void);
static int sx127x_opmode_change(int opmode);
static int sx127x_freq_select(uint32_t freq);
static int sx127x_pa_select(bool enable);
static int sx127x_irq0_attach(xcpt_t isr, FAR void *arg);
/****************************************************************************
* Private Data
****************************************************************************/
struct sx127x_lower_s lower =
{
.irq0attach = sx127x_irq0_attach,
.reset = sx127x_chip_reset,
.opmode_change = sx127x_opmode_change,
.freq_select = sx127x_freq_select,
.pa_select = sx127x_pa_select,
.pa_force = false
};
static bool g_high_power_output = false;
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: sx127x_irq0_attach
****************************************************************************/
static int sx127x_irq0_attach(xcpt_t isr, FAR void *arg)
{
wlinfo("Attach DIO0 IRQ\n");
/* IRQ on rising edge */
stm32_gpiosetevent(GPIO_SX127X_DIO0, true, false, false, isr, arg);
return OK;
}
/****************************************************************************
* Name: sx127x_chip_reset
****************************************************************************/
static void sx127x_chip_reset(void)
{
wlinfo("SX127X RESET\n");
/* Configure reset as output */
stm32_configgpio(GPIO_SX127X_RESET);
/* Set pin to zero */
stm32_gpiowrite(GPIO_SX127X_RESET, false);
/* Wait 1 ms */
nxsig_usleep(1000);
/* Configure reset as input */
stm32_configgpio(GPIO_SX127X_RESET | GPIO_INPUT | GPIO_FLOAT);
/* Wait 10 ms */
nxsig_usleep(10000);
}
/****************************************************************************
* Name: sx127x_opmode_change
****************************************************************************/
static int sx127x_opmode_change(int opmode)
{
/* Nothing to do */
return OK;
}
/****************************************************************************
* Name: sx127x_freq_select
****************************************************************************/
static int sx127x_freq_select(uint32_t freq)
{
int ret = OK;
/* Only HF supported (BAND3 - 860-930 MHz) */
if (freq < SX127X_HFBAND_THR)
{
ret = -EINVAL;
wlerr("LF band not supported\n");
}
return ret;
}
/****************************************************************************
* Name: sx127x_pa_select
****************************************************************************/
static int sx127x_pa_select(bool enable)
{
g_high_power_output = enable;
return OK;
}
/****************************************************************************
* Public Functions
****************************************************************************/
int stm32_lpwaninitialize(void)
{
FAR struct spi_dev_s *spidev;
int ret = OK;
wlinfo("Register the sx127x module\n");
/* Setup DIO0 */
stm32_configgpio(GPIO_SX127X_DIO0);
/* Init SPI bus */
spidev = stm32_spibus_initialize(SX127X_SPI);
if (!spidev)
{
wlerr("ERROR: Failed to initialize SPI %d bus\n", SX127X_SPI);
ret = -ENODEV;
goto errout;
}
/* Initialize SX127X */
ret = sx127x_register(spidev, &lower);
if (ret < 0)
{
wlerr("ERROR: Failed to register sx127x\n");
goto errout;
}
errout:
return ret;
}
@@ -0,0 +1,65 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_timer.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/timers/timer.h>
#include <debug.h>
#include "stm32_tim.h"
#include "aiit-arm32-board.h"
#ifdef CONFIG_TIMER
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_timer_driver_setup
*
* Description:
* Configure the timer driver.
*
* Input Parameters:
* devpath - The full path to the timer device.
* This should be of the form /dev/timer0
* timer - The timer's number.
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
int stm32_timer_driver_setup(FAR const char *devpath, int timer)
{
return stm32_timer_initialize(devpath, timer);
}
#endif
@@ -0,0 +1,141 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_ug2864ambag01.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <nuttx/board.h>
#include <nuttx/spi/spi.h>
#include <nuttx/lcd/lcd.h>
#include <nuttx/lcd/ug-2864ambag01.h>
#include "stm32_gpio.h"
#include "stm32_spi.h"
#include "aiit-arm32-board.h"
#ifdef CONFIG_LCD_UG2864AMBAG01
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
/* The pin configurations here require that SPI1 is selected */
#ifndef CONFIG_STM32_SPI1
# error "The OLED driver requires CONFIG_STM32_SPI1 in the configuration"
#endif
#ifndef CONFIG_SPI_CMDDATA
# error "The OLED driver requires CONFIG_SPI_CMDDATA in the configuration"
#endif
/* Pin Configuration ********************************************************/
/* UG-2864AMBAG01 OLED Display (SPI 4-wire):
*
* --------------------------+----------------------------------------------
* Connector CON10 J1: | STM32F4Discovery
* --------------+-----------+----------------------------------------------
* CON10 J1: | CON20 J2: | P1/P2:
* --------------+-----------+----------------------------------------------
* 1 3v3 | 3,4 3v3 | P2 3V
* 3 /RESET | 8 /RESET | P2 PB6 (Arbitrary selection)
* 5 /CS | 7 /CS | P2 PB7 (Arbitrary selection)(2)
* 7 A0 | 9 A0 | P2 PB8 (Arbitrary selection)(2)
* 9 LED+ (N/C) | ----- | -----
* 2 5V Vcc | 1,2 Vcc | P2 5V
* 4 DI | 18 D1/SI | P1 PA7 (GPIO_SPI1_MOSI==GPIO_SPI1_MOSI_1 (1))
* 6 SCLK | 19 D0/SCL | P1 PA5 (GPIO_SPI1_SCK==GPIO_SPI1_SCK_1 (2))
* 8 LED- (N/C) | ----- | ------
* 10 GND | 20 GND | P2 GND
* --------------+-----------+----------------------------------------------
* (1) Required because of on-board MEMS
* (2) Note that the OLED CS and A0 are managed in the stm32_spi.c file.
* -------------------------------------------------------------------------
*/
/* Definitions in aiit-arm32-board.h */
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_graphics_setup
*
* Description:
* Called by NX initialization logic to configure the OLED.
*
****************************************************************************/
FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
{
FAR struct spi_dev_s *spi;
FAR struct lcd_dev_s *dev;
/* Configure the OLED GPIOs. This initial configuration is RESET low,
* putting the OLED into reset state.
*/
stm32_configgpio(GPIO_OLED_RESET);
/* Wait a bit then release the OLED from the reset state */
up_mdelay(20);
stm32_gpiowrite(GPIO_OLED_RESET, true);
/* Get the SPI1 port interface */
spi = stm32_spibus_initialize(1);
if (!spi)
{
lcderr("ERROR: Failed to initialize SPI port 1\n");
}
else
{
/* Bind the SPI port to the OLED */
dev = ug2864ambag01_initialize(spi, devno);
if (!dev)
{
lcderr("ERROR: Failed to bind SPI port 1 to OLED %d\n", devno);
}
else
{
lcdinfo("Bound SPI port 1 to OLED %d\n", devno);
/* And turn the OLED on */
dev->setpower(dev, CONFIG_LCD_MAXPOWER);
return dev;
}
}
return NULL;
}
#endif /* CONFIG_LCD_UG2864AMBAG01 */
@@ -0,0 +1,141 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_ug2864hsweg01.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <nuttx/board.h>
#include <nuttx/spi/spi.h>
#include <nuttx/lcd/lcd.h>
#include <nuttx/lcd/ssd1306.h>
#include "stm32_gpio.h"
#include "stm32_spi.h"
#include "aiit-arm32-board.h"
#ifdef CONFIG_LCD_UG2864HSWEG01
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
/* The pin configurations here require that SPI1 is selected */
#ifndef CONFIG_STM32_SPI1
# error "The OLED driver requires CONFIG_STM32_SPI1 in the configuration"
#endif
#ifndef CONFIG_SPI_CMDDATA
# error "The OLED driver requires CONFIG_SPI_CMDDATA in the configuration"
#endif
/* Pin Configuration ********************************************************/
/* UG-2864HSWEG01 OLED Display (SPI 4-wire):
*
* --------------------------+----------------------------------------------
* Connector CON10 J1: | STM32F4Discovery
* --------------+-----------+----------------------------------------------
* CON10 J1: | CON20 J2: | P1/P2:
* --------------+-----------+----------------------------------------------
* 1 3v3 | 3,4 3v3 | P2 3V
* 3 /RESET | 8 /RESET | P2 PB6 (Arbitrary selection)
* 5 /CS | 7 /CS | P2 PB7 (Arbitrary selection)(2)
* 7 D/C | 9 D/C | P2 PB8 (Arbitrary selection)(2)
* 9 LED+ (N/C) | ----- | -----
* 2 5V Vcc | 1,2 Vcc | P2 5V
* 4 DI | 18 D1/SI | P1 PA7 (GPIO_SPI1_MOSI==GPIO_SPI1_MOSI_1 (1))
* 6 SCLK | 19 D0/SCL | P1 PA5 (GPIO_SPI1_SCK==GPIO_SPI1_SCK_1 (2))
* 8 LED- (N/C) | ----- | ------
* 10 GND | 20 GND | P2 GND
* --------------+-----------+----------------------------------------------
* (1) Required because of on-board MEMS
* (2) Note that the OLED CS and D/C are managed in the stm32_spi.c file.
* -------------------------------------------------------------------------
*/
/* Definitions in aiit-arm32-board.h */
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_graphics_setup
*
* Description:
* Called by NX initialization logic to configure the OLED.
*
****************************************************************************/
FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
{
FAR struct spi_dev_s *spi;
FAR struct lcd_dev_s *dev;
/* Configure the OLED GPIOs. This initial configuration is RESET low,
* putting the OLED into reset state.
*/
stm32_configgpio(GPIO_OLED_RESET);
/* Wait a bit then release the OLED from the reset state */
up_mdelay(20);
stm32_gpiowrite(GPIO_OLED_RESET, true);
/* Get the SPI1 port interface */
spi = stm32_spibus_initialize(1);
if (!spi)
{
lcderr("ERROR: Failed to initialize SPI port 1\n");
}
else
{
/* Bind the SPI port to the OLED */
dev = ssd1306_initialize(spi, NULL, devno);
if (!dev)
{
lcderr("ERROR: Failed to bind SPI port 1 to OLED %d\n", devno);
}
else
{
lcdinfo("Bound SPI port 1 to OLED %d\n", devno);
/* And turn the OLED on */
dev->setpower(dev, CONFIG_LCD_MAXPOWER);
return dev;
}
}
return NULL;
}
#endif /* CONFIG_LCD_UG2864AMBAG01 */
@@ -0,0 +1,70 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_uid.c
*
* Copyright (C) 2015 Marawan Ragab. All rights reserved.
* Author: Marawan Ragab <marawan31@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <errno.h>
#include "stm32_uid.h"
#include <nuttx/board.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef OK
# define OK 0
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
#if defined(CONFIG_BOARDCTL_UNIQUEID)
int board_uniqueid(uint8_t *uniqueid)
{
if (uniqueid == 0)
{
return -EINVAL;
}
stm32_get_uniqueid(uniqueid);
return OK;
}
#endif
@@ -0,0 +1,343 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_usb.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <stdint.h>
#include <stdbool.h>
#include <sched.h>
#include <errno.h>
#include <assert.h>
#include <debug.h>
#include <nuttx/kthread.h>
#include <nuttx/usb/usbdev.h>
#include <nuttx/usb/usbhost.h>
#include <nuttx/usb/usbdev_trace.h>
#include "arm_arch.h"
#include "stm32.h"
#include "stm32_otgfs.h"
#include "aiit-arm32-board.h"
#ifdef CONFIG_STM32_OTGFS
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#if defined(CONFIG_USBDEV) || defined(CONFIG_USBHOST)
# define HAVE_USB 1
#else
# warning "CONFIG_STM32_OTGFS is enabled but neither CONFIG_USBDEV nor CONFIG_USBHOST"
# undef HAVE_USB
#endif
#ifndef CONFIG_STM32F4DISCO_USBHOST_PRIO
# define CONFIG_STM32F4DISCO_USBHOST_PRIO 100
#endif
#ifndef CONFIG_STM32F4DISCO_USBHOST_STACKSIZE
# define CONFIG_STM32F4DISCO_USBHOST_STACKSIZE 1024
#endif
/****************************************************************************
* Private Data
****************************************************************************/
#ifdef CONFIG_USBHOST
static struct usbhost_connection_s *g_usbconn;
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: usbhost_waiter
*
* Description:
* Wait for USB devices to be connected.
*
****************************************************************************/
#ifdef CONFIG_USBHOST
static int usbhost_waiter(int argc, char *argv[])
{
struct usbhost_hubport_s *hport;
uinfo("Running\n");
for (; ; )
{
/* Wait for the device to change state */
DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport));
uinfo("%s\n", hport->connected ? "connected" : "disconnected");
/* Did we just become connected? */
if (hport->connected)
{
/* Yes.. enumerate the newly connected device */
CONN_ENUMERATE(g_usbconn, hport);
}
}
/* Keep the compiler from complaining */
return 0;
}
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_usbinitialize
*
* Description:
* Called from stm32_usbinitialize very early in inialization to setup
* USB-related GPIO pins for the STM32F4Discovery board.
*
****************************************************************************/
void stm32_usbinitialize(void)
{
/* The OTG FS has an internal soft pull-up.
* No GPIO configuration is required
*/
/* Configure the OTG FS VBUS sensing GPIO,
* Power On, and Overcurrent GPIOs
*/
#ifdef CONFIG_STM32_OTGFS
stm32_configgpio(GPIO_OTGFS_VBUS);
stm32_configgpio(GPIO_OTGFS_PWRON);
stm32_configgpio(GPIO_OTGFS_OVER);
#endif
}
/****************************************************************************
* Name: stm32_usbhost_initialize
*
* Description:
* Called at application startup time to initialize the USB host
* functionality.
* This function will start a thread that will monitor for device
* connection/disconnection events.
*
****************************************************************************/
#ifdef CONFIG_USBHOST
int stm32_usbhost_initialize(void)
{
int pid;
#if defined(CONFIG_USBHOST_HUB) || defined(CONFIG_USBHOST_MSC) || \
defined(CONFIG_USBHOST_HIDKBD) || defined(CONFIG_USBHOST_HIDMOUSE) || \
defined(CONFIG_USBHOST_XBOXCONTROLLER)
int ret;
#endif
/* First, register all of the class drivers needed to support the drivers
* that we care about:
*/
uinfo("Register class drivers\n");
#ifdef CONFIG_USBHOST_HUB
/* Initialize USB hub class support */
ret = usbhost_hub_initialize();
if (ret < 0)
{
uerr("ERROR: usbhost_hub_initialize failed: %d\n", ret);
}
#endif
#ifdef CONFIG_USBHOST_MSC
/* Register the USB mass storage class class */
ret = usbhost_msc_initialize();
if (ret != OK)
{
uerr("ERROR: Failed to register the mass storage class: %d\n", ret);
}
#endif
#ifdef CONFIG_USBHOST_CDCACM
/* Register the CDC/ACM serial class */
ret = usbhost_cdcacm_initialize();
if (ret != OK)
{
uerr("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
}
#endif
#ifdef CONFIG_USBHOST_HIDKBD
/* Initialize the HID keyboard class */
ret = usbhost_kbdinit();
if (ret != OK)
{
uerr("ERROR: Failed to register the HID keyboard class\n");
}
#endif
#ifdef CONFIG_USBHOST_HIDMOUSE
/* Initialize the HID mouse class */
ret = usbhost_mouse_init();
if (ret != OK)
{
uerr("ERROR: Failed to register the HID mouse class\n");
}
#endif
#ifdef CONFIG_USBHOST_XBOXCONTROLLER
/* Initialize the HID mouse class */
ret = usbhost_xboxcontroller_init();
if (ret != OK)
{
uerr("ERROR: Failed to register the XBox Controller class\n");
}
#endif
/* Then get an instance of the USB host interface */
uinfo("Initialize USB host\n");
g_usbconn = stm32_otgfshost_initialize(0);
if (g_usbconn)
{
/* Start a thread to handle device connection. */
uinfo("Start usbhost_waiter\n");
pid = kthread_create("usbhost", CONFIG_STM32F4DISCO_USBHOST_PRIO,
CONFIG_STM32F4DISCO_USBHOST_STACKSIZE,
(main_t)usbhost_waiter, (FAR char * const *)NULL);
return pid < 0 ? -ENOEXEC : OK;
}
return -ENODEV;
}
#endif
/****************************************************************************
* Name: stm32_usbhost_vbusdrive
*
* Description:
* Enable/disable driving of VBUS 5V output. This function must be
* provided be each platform that implements the STM32 OTG FS host
* interface
*
* "On-chip 5 V VBUS generation is not supported. For this reason, a
* charge pump or, if 5 V are available on the application board, a
* basic power switch, must be added externally to drive the 5 V VBUS
* line. The external charge pump can be driven by any GPIO output.
* When the application decides to power on VBUS using the chosen GPIO,
* it must also set the port power bit in the host port control and
* status register (PPWR bit in OTG_FS_HPRT).
*
* "The application uses this field to control power to this port,
* and the core clears this bit on an overcurrent condition."
*
* Input Parameters:
* iface - For future growth to handle multiple USB host interface.
* Should be zero.
* enable - true: enable VBUS power; false: disable VBUS power
*
* Returned Value:
* None
*
****************************************************************************/
#ifdef CONFIG_USBHOST
void stm32_usbhost_vbusdrive(int iface, bool enable)
{
DEBUGASSERT(iface == 0);
if (enable)
{
/* Enable the Power Switch by driving the enable pin low */
stm32_gpiowrite(GPIO_OTGFS_PWRON, false);
}
else
{
/* Disable the Power Switch by driving the enable pin high */
stm32_gpiowrite(GPIO_OTGFS_PWRON, true);
}
}
#endif
/****************************************************************************
* Name: stm32_setup_overcurrent
*
* Description:
* Setup to receive an interrupt-level callback if an overcurrent
* condition is detected.
*
* Input Parameters:
* handler - New overcurrent interrupt handler
* arg - The argument provided for the interrupt handler
*
* Returned Value:
* Zero (OK) is returned on success. Otherwise, a negated errno value
* is returned to indicate the nature of the failure.
*
****************************************************************************/
#ifdef CONFIG_USBHOST
int stm32_setup_overcurrent(xcpt_t handler, void *arg)
{
return stm32_gpiosetevent(GPIO_OTGFS_OVER, true, true, true, handler, arg);
}
#endif
/****************************************************************************
* Name: stm32_usbsuspend
*
* Description:
* Board logic must provide the stm32_usbsuspend logic if the USBDEV
* driver is used. This function is called whenever the USB enters or
* leaves suspend mode. This is an opportunity for the board logic to
* shutdown clocks, power, etc. while the USB is suspended.
*
****************************************************************************/
#ifdef CONFIG_USBDEV
void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
{
uinfo("resume: %d\n", resume);
}
#endif
#endif /* CONFIG_STM32_OTGFS */
@@ -0,0 +1,70 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_usbmsc.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdio.h>
#include <syslog.h>
#include <errno.h>
#include <nuttx/board.h>
#include "stm32.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
#ifndef CONFIG_SYSTEM_USBMSC_DEVMINOR1
# define CONFIG_SYSTEM_USBMSC_DEVMINOR1 0
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_usbmsc_initialize
*
* Description:
* Perform architecture specific initialization of the USB MSC device.
*
****************************************************************************/
int board_usbmsc_initialize(int port)
{
/* If system/usbmsc is built as an NSH command, then SD slot should
* already have been initialized in board_app_initialize()
* (see stm32_appinit.c).
* In this case, there is nothing further to be done here.
*/
#ifndef CONFIG_NSH_BUILTIN_APPS
return stm32_sdinitialize(CONFIG_SYSTEM_USBMSC_DEVMINOR1);
#else
return OK;
#endif
}
@@ -0,0 +1,216 @@
/****************************************************************************
* boards/arm/stm32/aiit-arm32-board/src/stm32_userleds.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <nuttx/board.h>
#include <nuttx/power/pm.h>
#include <arch/board/board.h>
#include "chip.h"
#include "arm_arch.h"
#include "arm_internal.h"
#include "stm32.h"
#include "aiit-arm32-board.h"
#ifndef CONFIG_ARCH_LEDS
/****************************************************************************
* Private Data
****************************************************************************/
/* This array maps an LED number to GPIO pin configuration */
static uint32_t g_ledcfg[BOARD_NLEDS] =
{
GPIO_LED1, GPIO_LED2, GPIO_LED3, GPIO_LED4
};
/****************************************************************************
* Private Function Protototypes
****************************************************************************/
/* LED Power Management */
#ifdef CONFIG_PM
static void led_pm_notify(struct pm_callback_s *cb, int domain,
enum pm_state_e pmstate);
static int led_pm_prepare(struct pm_callback_s *cb, int domain,
enum pm_state_e pmstate);
#endif
/****************************************************************************
* Private Data
****************************************************************************/
#ifdef CONFIG_PM
static struct pm_callback_s g_ledscb =
{
.notify = led_pm_notify,
.prepare = led_pm_prepare,
};
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: led_pm_notify
*
* Description:
* Notify the driver of new power state. This callback is called after
* all drivers have had the opportunity to prepare for the new power state.
*
****************************************************************************/
#ifdef CONFIG_PM
static void led_pm_notify(struct pm_callback_s *cb, int domain,
enum pm_state_e pmstate)
{
switch (pmstate)
{
case(PM_NORMAL):
{
/* Restore normal LEDs operation */
}
break;
case(PM_IDLE):
{
/* Entering IDLE mode - Turn leds off */
}
break;
case(PM_STANDBY):
{
/* Entering STANDBY mode - Logic for PM_STANDBY goes here */
}
break;
case(PM_SLEEP):
{
/* Entering SLEEP mode - Logic for PM_SLEEP goes here */
}
break;
default:
{
/* Should not get here */
}
break;
}
}
#endif
/****************************************************************************
* Name: led_pm_prepare
*
* Description:
* Request the driver to prepare for a new power state. This is a warning
* that the system is about to enter into a new power state. The driver
* should begin whatever operations that may be required to enter power
* state. The driver may abort the state change mode by returning a
* non-zero value from the callback function.
*
****************************************************************************/
#ifdef CONFIG_PM
static int led_pm_prepare(struct pm_callback_s *cb, int domain,
enum pm_state_e pmstate)
{
/* No preparation to change power modes is required by the LEDs driver.
* We always accept the state change by returning OK.
*/
return OK;
}
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_userled_initialize
****************************************************************************/
uint32_t board_userled_initialize(void)
{
/* Configure LED1-4 GPIOs for output */
stm32_configgpio(GPIO_LED1);
stm32_configgpio(GPIO_LED2);
stm32_configgpio(GPIO_LED3);
stm32_configgpio(GPIO_LED4);
return BOARD_NLEDS;
}
/****************************************************************************
* Name: board_userled
****************************************************************************/
void board_userled(int led, bool ledon)
{
if ((unsigned)led < BOARD_NLEDS)
{
stm32_gpiowrite(g_ledcfg[led], ledon);
}
}
/****************************************************************************
* Name: board_userled_all
****************************************************************************/
void board_userled_all(uint32_t ledset)
{
stm32_gpiowrite(GPIO_LED1, (ledset & BOARD_LED1_BIT) == 0);
stm32_gpiowrite(GPIO_LED2, (ledset & BOARD_LED2_BIT) == 0);
stm32_gpiowrite(GPIO_LED3, (ledset & BOARD_LED3_BIT) == 0);
stm32_gpiowrite(GPIO_LED4, (ledset & BOARD_LED4_BIT) == 0);
}
/****************************************************************************
* Name: stm32_led_pminitialize
****************************************************************************/
#ifdef CONFIG_PM
void stm32_led_pminitialize(void)
{
/* Register to receive power management callbacks */
int ret = pm_register(&g_ledscb);
if (ret != OK)
{
board_autoled_on(LED_ASSERTION);
}
}
#endif /* CONFIG_PM */
#endif /* !CONFIG_ARCH_LEDS */
+12 -29
View File
@@ -1,37 +1,20 @@
############################################################################
# apps/Makefile
#
# Copyright (C) 2011 Uros Platise. All rights reserved.
# Copyright (C) 2011-2014, 2018-2019 Gregory Nutt. All rights reserved.
# Authors: Uros Platise <uros.platise@isotel.eu>
# Gregory Nutt <gnutt@nuttx.org>
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
# http://www.apache.org/licenses/LICENSE-2.0
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
@@ -12,7 +12,7 @@ config NSH_LIBRARY
select NETUTILS_NETLIB if NET
select LIBC_NETDB if NET
select READLINE_HAVE_EXTMATCH
select LIB_BOARDCTL if (!NSH_DISABLE_MKRD && !DISABLE_MOUNTPOINT) || NSH_ARCHINIT || NSH_ROMFSETC
select BOARDCTL if (!NSH_DISABLE_MKRD && !DISABLE_MOUNTPOINT) || NSH_ARCHINIT || NSH_ROMFSETC
select BOARDCTL_MKRD if !NSH_DISABLE_MKRD && !DISABLE_MOUNTPOINT
select BOARDCTL_ROMDISK if NSH_ROMFSETC
---help---
@@ -587,7 +587,6 @@ config NSH_DISABLE_XD
bool "Disable xd"
default y if DEFAULT_SMALL
default n if !DEFAULT_SMALL
config NSH_DISABLE_HCHO_TB600B_WQ_HCHO1OS
bool "Disable the sensor tb600b_wq_hcho1os."
default n
@@ -631,6 +630,22 @@ config NSH_DISABLE_TEMPHS300X
config NSH_DISABLE_HUMIHS300X
bool "Disable the humidity function of the sensor Hs300x."
default n
config NSH_DISABLE_OPENZIGBEE
bool "Disable the open function of the zigebee."
default n
config NSH_DISABLE_SENDZIGBEE
bool "Disable the send function of the zigebee."
default n
config NSH_DISABLE_RECVZIGBEE
bool "Disable the receive function of the zigebee."
default n
config NSH_DISABLE_ADAPTER_LORATEST
bool "Disable sx128 AdapterLoraTest."
default n
endmenu
@@ -960,7 +975,7 @@ config NSH_CONSOLE
config NSH_USBCONSOLE
bool "Use a USB serial console"
default n
depends on LIB_BOARDCTL && NSH_CONSOLE && USBDEV && (CDCACM || PL2303)
depends on BOARDCTL && NSH_CONSOLE && USBDEV && (CDCACM || PL2303)
select BOARDCTL_USBDEVCTRL
---help---
If defined, then the an arbitrary USB serial device may be used
@@ -1147,7 +1162,7 @@ endmenu # USB Device Trace Support
config NSH_ARCHINIT
bool "Have architecture-specific initialization"
default n
select LIB_BOARDCTL
select BOARDCTL
---help---
Set if your board provides architecture specific initialization
via the board-interface function boardctl(). The boardctl()
@@ -1,35 +1,20 @@
############################################################################
# apps/nshlib/Makefile
#
# Copyright (C) 2011-2013, 2016 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
# http://www.apache.org/licenses/LICENSE-2.0
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
@@ -39,7 +24,7 @@ include $(APPDIR)/Make.defs
CSRCS = nsh_init.c nsh_parse.c nsh_console.c nsh_script.c nsh_system.c
CSRCS += nsh_command.c nsh_fscmds.c nsh_ddcmd.c nsh_proccmds.c nsh_mmcmds.c
CSRCS += nsh_timcmds.c nsh_envcmds.c nsh_syscmds.c nsh_dbgcmds.c nsh_Applicationscmd.c
CSRCS += nsh_timcmds.c nsh_envcmds.c nsh_syscmds.c nsh_dbgcmds.c nsh_Applicationscmd.c
ifeq ($(CONFIG_FILE_STREAM),y)
CSRCS += nsh_session.c
@@ -462,8 +462,8 @@
/* Make sure that the home directory is defined */
#ifndef CONFIG_LIB_HOMEDIR
# define CONFIG_LIB_HOMEDIR "/"
#ifndef CONFIG_LIBC_HOMEDIR
# define CONFIG_LIBC_HOMEDIR "/"
#endif
#undef NSH_HAVE_VARS
@@ -799,6 +799,11 @@ extern const char g_fmtsignalrecvd[];
* Public Function Prototypes
****************************************************************************/
#if defined(__cplusplus)
extern "C"
{
#endif
/* Initialization */
#ifdef CONFIG_NSH_ROMFSETC
@@ -830,14 +835,14 @@ int nsh_loginscript(FAR struct nsh_vtbl_s *vtbl);
/* Architecture-specific initialization depends on boardctl(BOARDIOC_INIT) */
#if defined(CONFIG_NSH_ARCHINIT) && !defined(CONFIG_LIB_BOARDCTL)
# warning CONFIG_NSH_ARCHINIT is set, but CONFIG_LIB_BOARDCTL is not
#if defined(CONFIG_NSH_ARCHINIT) && !defined(CONFIG_BOARDCTL)
# warning CONFIG_NSH_ARCHINIT is set, but CONFIG_BOARDCTL is not
# undef CONFIG_NSH_ARCHINIT
#endif
/* The mkrd command depends on boardctl(BOARDIOC_MKRD) */
#if !defined(CONFIG_LIB_BOARDCTL) || !defined(CONFIG_BOARDCTL_MKRD)
#if !defined(CONFIG_BOARDCTL) || !defined(CONFIG_BOARDCTL_MKRD)
# undef CONFIG_NSH_DISABLE_MKRD
# define CONFIG_NSH_DISABLE_MKRD 1
#endif
@@ -1447,4 +1452,25 @@ int nsh_foreach_var(FAR struct nsh_vtbl_s *vtbl, nsh_foreach_var_t cb,
int cmd_HumiHs300x(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv);
#endif
#if defined(CONFIG_CONNECTION_ADAPTER_ZIGBEE) && !defined(CONFIG_NSH_DISABLE_OPENZIGBEE)
int cmd_openzigbee(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv);
#endif
#if defined(CONFIG_CONNECTION_ADAPTER_ZIGBEE) && !defined(CONFIG_NSH_DISABLE_SENDZIGBEE)
int cmd_sendzigbee(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv);
#endif
#if defined(CONFIG_CONNECTION_ADAPTER_ZIGBEE) && !defined(CONFIG_NSH_DISABLE_RECVZIGBEE)
int cmd_recvzigbee(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv);
#endif
#if defined(CONFIG_ADAPTER_SX1278) && !defined(CONFIG_NSH_DISABLE_ADAPTER_LORATEST)
int cmd_AdapterLoraTest(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv);
#endif
#if defined(__cplusplus)
}
#endif
#endif /* __APPS_NSHLIB_NSH_H */
@@ -217,3 +217,53 @@ int cmd_HumiHs300x(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv)
return 0;
}
#endif
/****************************************************************************
* Name: cmd_openzigbee
****************************************************************************/
#if defined(CONFIG_CONNECTION_ADAPTER_ZIGBEE) && !defined(CONFIG_NSH_DISABLE_OPENZIGBEE)
extern int openzigbee(void);
int cmd_openzigbee(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv)
{
printf("Hello, world!\n");
FrameworkInit();
openzigbee();
return 0;
}
#endif
#if defined(CONFIG_CONNECTION_ADAPTER_ZIGBEE) && !defined(CONFIG_NSH_DISABLE_SENDZIGBEE)
extern int sendzigbee(int argc, char *argv[]);
int cmd_sendzigbee(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv)
{
printf("Hello, world!\n");
FrameworkInit();
sendzigbee(argc,argv);
return 0;
}
#endif
#if defined(CONFIG_CONNECTION_ADAPTER_ZIGBEE) && !defined(CONFIG_NSH_DISABLE_RECVZIGBEE)
extern int recvzigbee(void);
int cmd_recvzigbee(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv)
{
printf("Hello, world!\n");
FrameworkInit();
recvzigbee();
return 0;
}
#endif
#if defined(CONFIG_ADAPTER_SX1278) && !defined(CONFIG_NSH_DISABLE_ADAPTER_LORATEST)
extern int AdapterLoraTest(void);
int cmd_AdapterLoraTest(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv)
{
printf("Hello, world!\n");
FrameworkInit();
AdapterLoraTest();
return 0;
}
#endif
@@ -25,6 +25,7 @@
#include <nuttx/config.h>
#include <string.h>
#include <assert.h>
#ifdef CONFIG_NSH_BUILTIN_APPS
# include <nuttx/lib/builtin.h>
@@ -154,7 +155,7 @@ static const struct cmdmap_s g_cmdmap[] =
#endif
#ifndef CONFIG_NSH_DISABLE_DATE
{ "date", cmd_date, 1, 3, "[-s \"MMM DD HH:MM:SS YYYY\"]" },
{ "date", cmd_date, 1, 4, "[-s \"MMM DD HH:MM:SS YYYY\"] [-u]" },
#endif
#ifndef CONFIG_NSH_DISABLE_DD
@@ -260,7 +261,7 @@ static const struct cmdmap_s g_cmdmap[] =
#endif
#ifndef CONFIG_NSH_DISABLE_KILL
{ "kill", cmd_kill, 3, 3, "-<signal> <pid>" },
{ "kill", cmd_kill, 2, 3, "[-<signal>] <pid>" },
#endif
#ifndef CONFIG_DISABLE_MOUNTPOINT
@@ -434,7 +435,7 @@ static const struct cmdmap_s g_cmdmap[] =
#ifdef NSH_HAVE_DIROPTS
# ifndef CONFIG_NSH_DISABLE_RM
{ "rm", cmd_rm, 2, 2, "<file-path>" },
{ "rm", cmd_rm, 2, 3, "[-r] <file-path>" },
# endif
#endif
@@ -578,7 +579,6 @@ static const struct cmdmap_s g_cmdmap[] =
#ifndef CONFIG_NSH_DISABLE_XD
{ "xd", cmd_xd, 3, 3, "<hex-address> <byte-count>" },
#endif
#if defined(CONFIG_APPLICATION_SENSOR_HCHO_TB600B_WQ_HCHO1OS) && !defined(CONFIG_NSH_DISABLE_HCHO_TB600B_WQ_HCHO1OS)
{ "hcho1os", cmd_Hcho1os, 1, 1, "[get the concentration of formaldehyde with sensor tb600b_wq_hcho1os.]" },
@@ -624,6 +624,23 @@ static const struct cmdmap_s g_cmdmap[] =
{ "humi", cmd_HumiHs300x, 1, 1, "[get humidity with sensor HS300x.]" },
#endif
#if defined(CONFIG_CONNECTION_ADAPTER_ZIGBEE) && !defined(CONFIG_NSH_DISABLE_OPENZIGBEE)
{ "openzigbee", cmd_openzigbee, 1, 1, "[open the zigebee device.]" },
#endif
#if defined(CONFIG_CONNECTION_ADAPTER_ZIGBEE) && !defined(CONFIG_NSH_DISABLE_SENDZIGBEE)
{ "sendzigbee", cmd_sendzigbee, 2, 2, "[sendzigbee <message>]" },
#endif
#if defined(CONFIG_CONNECTION_ADAPTER_ZIGBEE) && !defined(CONFIG_NSH_DISABLE_RECVZIGBEE)
{ "recvzigbee", cmd_recvzigbee, 1, 1, "[receive message.]" },
#endif
#if defined(CONFIG_ADAPTER_SX1278) && !defined(CONFIG_NSH_DISABLE_ADAPTER_LORATEST)
{ "AdapterLoraTest", cmd_AdapterLoraTest, 1, 1, "[Lora sx128 test.]" },
#endif
#endif
{ NULL, NULL, 1, 1, NULL }
};
@@ -9,5 +9,6 @@ find $top -name Kconfig -exec dos2unix -q {} \;
cp -rf $current/nuttx $nuttx
cp -rf $current/apps $nuttx
cp -rf $nuttx/aiit-arm32-board $nuttx/nuttx/boards/arm/stm32
cd ../nuttx
+104 -18
View File
@@ -15,6 +15,39 @@ source "$APPSDIR/../../../APP_Framework/Kconfig"
endmenu
menu "License Setup"
config ALLOW_BSD_COMPONENTS
bool "Use components that have BSD licenses"
default n
---help---
When this option is enabled the project will allow the use
of components that have BSD licenses.
NOTE: Please check that the license for each enabled
component matches your project license.
NOTE: If this option is not set the following components
are not included in the setup menu:
Crypto
AES cypher support
FS
NFS client file system
SPIFFS File System
Wireless
Bluetooth LE support
config ALLOW_GPL_COMPONENTS
bool "Use components that have GPL/LGPL licenses"
default n
---help---
When this option is enabled the project will allow the use
of components that have GPL/LGPL licenses.
NOTE: Please check that the license for each enabled
component matches your project license.
endmenu # License Setup
menu "Build Setup"
config EXPERIMENTAL
@@ -1113,7 +1146,7 @@ comment "Driver Debug Options"
config DEBUG_LCD
bool "Low-level LCD Debug Features"
default n
depends on LCD
depends on LCD || SLCD
---help---
Enable LCD driver debug features.
@@ -1716,6 +1749,13 @@ config DEBUG_WATCHDOG_INFO
endif # DEBUG_WATCHDOG
config DEBUG_MOTOR
bool "Motor Debug Features"
default n
depends on MOTOR
---help---
Enable motor debug features.
if DEBUG_MOTOR
config DEBUG_MOTOR_ERROR
@@ -1740,6 +1780,38 @@ config DEBUG_MOTOR_INFO
Enable motor informational output to SYSLOG.
endif # DEBUG_MOTOR
config DEBUG_VIDEO
bool "Video Debug Features"
default n
depends on DRIVERS_VIDEO
---help---
Enable video debug features.
if DEBUG_VIDEO
config DEBUG_VIDEO_ERROR
bool "Video Error Output"
default n
depends on DEBUG_ERROR
---help---
Enable video error output to SYSLOG.
config DEBUG_VIDEO_WARN
bool "Video Warnings Output"
default n
depends on DEBUG_WARN
---help---
Enable video warning output to SYSLOG.
config DEBUG_VIDEO_INFO
bool "Video Informational Output"
default n
depends on DEBUG_INFO
---help---
Enable video informational output to SYSLOG.
endif # DEBUG_VIDEO
endif # DEBUG_FEATURES
config ARCH_HAVE_STACKCHECK
@@ -1757,6 +1829,20 @@ config STACK_COLORATION
Only supported by a few architectures.
config STACK_USAGE_SAFE_PERCENT
int "Stack usage safe percent"
default 0
range 0 100
depends on STACK_COLORATION
---help---
Stack usage percent = up_check_tcbstack() * 100 / tcb->adj_stack_size,
this should be lower than STACK_USAGE_SAFE_PERCENT.
Idle thread will periodically check stack usage when this macro
value > 0.
N.B. This feature should not be used in production code.
config STACK_CANARIES
bool "Compiler stack canaries"
depends on ARCH_HAVE_STACKCHECK
@@ -1839,59 +1925,59 @@ source "boards/Kconfig"
endmenu
menu "RTOS Features"
source sched/Kconfig
source syscall/Kconfig
source "sched/Kconfig"
source "syscall/Kconfig"
endmenu
menu "Device Drivers"
source drivers/Kconfig
source "drivers/Kconfig"
endmenu
menu "Networking Support"
source net/Kconfig
source "net/Kconfig"
endmenu
menu "Crypto API"
source crypto/Kconfig
source "crypto/Kconfig"
endmenu
menu "File Systems"
source fs/Kconfig
source "fs/Kconfig"
endmenu
menu "Graphics Support"
source graphics/Kconfig
source libs/libnx/Kconfig
source "graphics/Kconfig"
source "libs/libnx/Kconfig"
endmenu
menu "Memory Management"
source mm/Kconfig
source "mm/Kconfig"
endmenu
menu "Audio Support"
source audio/Kconfig
source "audio/Kconfig"
endmenu
menu "Video Support"
source video/Kconfig
source "video/Kconfig"
endmenu
menu "Wireless Support"
source wireless/Kconfig
source "wireless/Kconfig"
endmenu
menu "Binary Loader"
source binfmt/Kconfig
source "binfmt/Kconfig"
endmenu
menu "Library Routines"
source libs/libc/Kconfig
source libs/libxx/Kconfig
source libs/libdsp/Kconfig
source "libs/libc/Kconfig"
source "libs/libxx/Kconfig"
source "libs/libdsp/Kconfig"
endmenu
menu "Open Asymmetric Multi Processing"
source openamp/Kconfig
source "openamp/Kconfig"
endmenu
menu "Application Configuration"
@@ -29,6 +29,7 @@
#include <stdbool.h>
#include <unistd.h>
#include <string.h>
#include <assert.h>
#include <errno.h>
#include <debug.h>
@@ -507,7 +508,8 @@ static bool up_rxflowcontrol(struct uart_dev_s *dev, unsigned int nbuffered,
bool upper);
#endif
static void up_send(struct uart_dev_s *dev, int ch);
#if defined(SERIAL_HAVE_RXDMA_OPS) || defined(SERIAL_HAVE_NODMA_OPS)
#if defined(SERIAL_HAVE_RXDMA_OPS) || defined(SERIAL_HAVE_NODMA_OPS) || \
defined(CONFIG_STM32_SERIALBRK_BSDCOMPAT)
static void up_txint(struct uart_dev_s *dev, bool enable);
#endif
static bool up_txready(struct uart_dev_s *dev);
@@ -2918,7 +2920,8 @@ static void up_dma_txint(struct uart_dev_s *dev, bool enable)
*
****************************************************************************/
#if defined(SERIAL_HAVE_RXDMA_OPS) || defined(SERIAL_HAVE_NODMA_OPS)
#if defined(SERIAL_HAVE_RXDMA_OPS) || defined(SERIAL_HAVE_NODMA_OPS) || \
defined(CONFIG_STM32_SERIALBRK_BSDCOMPAT)
static void up_txint(struct uart_dev_s *dev, bool enable)
{
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
@@ -2961,6 +2964,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
up_restoreusartint(priv, ie);
#else
/* Fake a TX interrupt here by just calling uart_xmitchars() with
* interrupts disabled (note this may recurse).
*/
File diff suppressed because it is too large Load Diff
@@ -0,0 +1,980 @@
Board-Specific Configurations
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
This directory contains the board support logic for all boards supported
by NuttX.
The nuttx/boards directory is a part of the internal OS. It should contain
only OS bring-up logic and driver initialization logic. THERE SHOULD BE NO
APPLICATION CALLABLE LOGIC IN THIS DIRECTORY.
If you have board-specific, application callable logic, that logic should not
go here. Please consider using a sub-directory under apps/platform instead.
Table of Contents
^^^^^^^^^^^^^^^^^
o Board-Specific Configurations
o Summary of Files
o Configuration Variables
o Supported Boards
o Configuring NuttX
o Building Symbol Tables
Board-Specific Configurations
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
The NuttX configuration consists of:
o Processor architecture specific files. These are the files contained
in the arch/<arch>/ directory.
o Chip/SoC specific files. Each processor architecture is embedded
in a chip or System-on-a-Chip (SoC) architecture. The full chip
architecture includes the processor architecture plus chip-specific
interrupt logic, general purpose I/O (GIO) logic, and specialized,
internal peripherals (such as UARTs, USB, etc.).
These chip-specific files are contained within chip-specific
sub-directories in the arch/<arch>/ directory and are selected
via the CONFIG_ARCH_name selection
o Board specific files. In order to be usable, the chip must be
contained in a board environment. The board configuration defines
additional properties of the board including such things as
peripheral LEDs, external peripherals (such as network, USB, etc.).
These board-specific configuration files can be found in the
boards/<arch>/<chip>/<board>/ sub-directories and are
discussed in this README. Additional configuration information may be
available in board-specific README files at
boards/<arch>/<chip>/<board>/README.txt files.
The boards/ subdirectory contains configuration data for each board. These
board-specific configurations plus the architecture-specific configurations in
the arch/ subdirectory completely define a customized port of NuttX.
Directory Structure
^^^^^^^^^^^^^^^^^^^
The boards/ directory contains board specific configuration logic. Each
board must provide a subdirectory <board> under boards/ with the
following characteristics:
<board>
|-- README.txt
|-- include/
| `-- (board-specific header files)
|-- src/
| |-- Makefile
| `-- (board-specific source files)
|-- <config1-dir>
| |-- Make.defs
| `-- defconfig
|-- <config2-dir>
| |-- Make.defs
| `-- defconfig
...
Summary of Files
^^^^^^^^^^^^^^^^
README.txt -- This text file provides additional information unique to
each board configuration sub-directory.
include/ -- This directory contains board specific header files. This
directory will be linked as include/arch/board at configuration time and
can be included via '#include <arch/board/header.h>'. These header file
can only be included by files in arch/<arch>include/ and
arch/<arch>/src
src/ -- This directory contains board specific drivers. This
directory will be linked as arch/<arch>/src/board at configuration
time and will be integrated into the build system.
src/Makefile -- This makefile will be invoked to build the board specific
drivers. It must support the following targets: libext$(LIBEXT), clean,
and distclean.
A board may have various different configurations using these common source
files. Each board configuration is described by two files: Make.defs and
defconfig. Typically, each set of configuration files is retained in a
separate configuration sub-directory (<config1-dir>, <config2-dir>, .. in
the above diagram).
Make.defs -- This makefile fragment provides architecture and
tool-specific build options. It will be included by all other
makefiles in the build (once it is installed). This make fragment
should define:
Tools: CC, LD, AR, NM, OBJCOPY, OBJDUMP
Tool options: CFLAGS, LDFLAGS
When this makefile fragment runs, it will be passed TOPDIR which
is the path to the root directory of the build. This makefile
fragment should include:
$(TOPDIR)/.config : NuttX configuration
$(TOPDIR)/tools/Config.mk : Common definitions
Definitions in the Make.defs file probably depend on some of the
settings in the .config file. For example, the CFLAGS will most likely be
different if CONFIG_DEBUG_FEATURES=y.
The included tools/Config.mk file contains additional definitions that may
be overridden in the architecture-specific Make.defs file as necessary:
COMPILE, ASSEMBLE, ARCHIVE, CLEAN, and MKDEP macros
defconfig -- This is a configuration file similar to the Linux
configuration file. In contains variable/value pairs like:
CONFIG_VARIABLE=value
This configuration file will be used at build time:
(1) as a makefile fragment included in other makefiles, and
(2) to generate include/nuttx/config.h which is included by
most C files in the system.
Configuration Variables
^^^^^^^^^^^^^^^^^^^^^^^
At one time, this section provided a list of all NuttX configuration
variables. However, NuttX has since converted to use the kconfig-frontends
tools (See https://bitbucket.org/nuttx/tools/src/master/kconfig-frontends/.)
Now, the NuttX configuration is determined by a self-documenting set of
Kconfig files.
The current NuttX configuration variables are also documented in separate,
auto-generated configuration variable document. That configuration variable
document is generated using the kconfig2html tool that can be found in the
nuttx/tools directory. That tool analyzes the NuttX Kconfig files and
generates an excruciatingly boring HTML document.
The latest boring configuration variable documentation can be regenerated at
any time using that tool or, more appropriately, the wrapper script at
nuttx/tools/mkconfigvars.sh. That script will generate the file
nuttx/Documentation/NuttXConfigVariables.html.
Supported Boards
^^^^^^^^^^^^^^^^
boards/avr/atmega/amber
This is placeholder for the SoC Robotics Amber Web Server that is based
on the Atmel AVR ATMega128 MCU. There is not much there yet and what is
there is untested due to tool-related issues.
boards/arm/sam34/arduino-due
This sub-directory holds board support for the Arduino DUE board featuring
the Atmel ATSAM3X8E MCU running at 84 MHz.
boards/avr/at32uc3/avr32dev1
This is a port of NuttX to the Atmel AVR32DEV1 board. That board is
based on the Atmel AT32UC3B0256 MCU and uses a specially patched
version of the GNU toolchain: The patches provide support for the
AVR32 family. That patched GNU toolchain is available only from the
Atmel website. STATUS: This port is functional but very basic. There
are configurations for NSH and the OS test.
boards/arm/stm32/axoloti
Support for the Axoloti synthesizer board based on the STMicro
STM32F427IGH6 MCU. See: http://www.axoloti.com/
boards/arm/stm32/b-g474e-dpow1
Initial support for booting NuttX to a functional NSH prompt on the
STMicro B-G474E-DPOW1 Discovery kit with STM32G474RE MCU.
boards/arm/stm32/nucleo-g431kb
STMicro Nucleo G431KB board based on the STMicro STM32G431KB MCU.
boards/arm/stm32/nucleo-g431rb
STMicro Nucleo G431RB board based on the STMicro STM32G431RB MCU.
boards/arm/stm32f0l0g0/b-l072z-lrwan1
STMicro STM32L0 Discovery kit with LoRa/SigFox based on STM32L072CZ MCU.
boards/arm/lpc43xx/bambino-200e
Micromint Bambino board. This board is based on the LPC4330FBD144.
boards/arm/c5471/c5471evm
This is a port to the Spectrum Digital C5471 evaluation board. The
TMS320C5471 is a dual core processor from TI with an ARM7TDMI general
purpose processor and a c54 DSP. It is also known as TMS320DA180 or just DA180.
NuttX runs on the ARM core and is built with a GNU arm-nuttx-elf toolchain*.
This port is complete and verified.
boards/arm/tiva/launchxl_cc1310
Port to the TI SimpleLink CC1310 LaunchPad Evaluation Kit (LAUNCHXL-CC1310)
featuring the SimpleLinkCC1310 chip. This board features the CC1310F128
part with 128Kb of FLASH and 20Kb of SRAM.
boards/arm/tiva/launchxl_cc1312r1
Port to the TI SimpleLink CC1312R1 LaunchPad Evaluation Kit (LAUNCHXL-CC1312R1)
featuring the SimpleLinkCC1312R1 chip.
boards/arm/stm32/clicker2-stm32
Mikroe Clicker2 STM32 board based on the STMicro STM32F407VGT6 MCU.
boards/arm/stm32/cloudctrl
Darcy's CloudController board. This is a small network relay development
board. Based on the Shenzhou IV development board design. It is based on
the STM32F107VC MCU.
boards/hc/m9s12/demo9s12ne64
NXP/FreeScale DMO9S12NE64 board based on the MC9S12NE64 hcs12 cpu. This
port uses the m9s12x GCC toolchain. STATUS: (Still) under development; it
is code complete but has not yet been verified.
boards/arm/tiva/dk-tm4c129x
This is the port of NuttX to the Tiva DK-TM4C129x Connected Development Kit. The
Tiva DK-TM4C129x features the TM4C129XNCZAD MCU.
boards/arm/lpc31xx/ea3131
Embedded Artists EA3131 Development board. This board is based on the
an NXP LPC3131 MCU. This OS is built with the arm-nuttx-elf toolchain*.
STATUS: This port is complete and mature.
boards/arm/lpc31xx/ea3152
Embedded Artists EA3152 Development board. This board is based on the
an NXP LPC3152 MCU. This OS is built with the arm-nuttx-elf toolchain*.
STATUS: This port is has not be exercised well, but since it is
a simple derivative of the ea3131, it should be fully functional.
boards/arm/tiva/eagle100
Micromint Eagle-100 Development board. This board is based on the
an ARM Cortex-M3 MCU, the Luminary LM3S6918. This OS is built with the
arm-nuttx-elf toolchain*. STATUS: This port is complete and mature.
boards/arm/efm32/efm32-g8xx-stk
The port of NuttX to the EFM32 Gecko Starter Kit (EFM32-G8XX-STK).
boards/arm/efm32/efm32gg-stk3700
The port of NuttX to the EFM32 Giant Gecko Starter Kit
(EFM32GG-STK3700).
boards/arm/tiva/ekk-lm3s9b96
TI/Stellaris EKK-LM3S9B96 board. This board is based on the
an EKK-LM3S9B96 which is a Cortex-M3.
boards/arm/stm32/emw3162
A configuration for the EMW3162 Wi-Fi board
(https://www.waveshare.com/wiki/EMW3162). This board features
the STM32F205RGY6 MCU from STMicro.
boards/xtensa/esp32/esp-core
The ESP32 is a dual-core system from Espressif with two Harvard architecture
Xtensa LX6 CPUs. All embedded memory, external memory and peripherals are
located on the data bus and/or the instruction bus of bus of these CPUs.
With some minor exceptions, the address mapping of two CPUs is symmetric,
meaning they use the same addresses to access the same memory.
boards/z80/ez80/ez80f0910200kitg
ez80Acclaim! Microcontroller. This port use the Zilog ez80f0910200kitg
development kit, eZ80F091 part, and the Zilog ZDS-II Windows command line
tools. The development environment is Cygwin under WinXP.
boards/z80/ez80/ez80f0910200zco
ez80Acclaim! Microcontroller. This port use the Zilog ez80f0910200zco
development kit, eZ80F091 part, and the Zilog ZDS-II Windows command line
tools. The development environment is Cygwin under WinXP.
boards/arm/stm32/fire-stm32v2
A configuration for the M3 Wildfire STM32 board. This board is based on the
STM32F103VET6 chip. See http://firestm32.taobao.com . Version 2 and 3 of
the boards are supported but only version 2 has been tested.
boards/mips/pic32mz/flipnclick-pic32mz
Board support for the Mikroe Flip&Click PIC32MZ board. This board is a
chipKit Arduino-compatible board (but can also be used with the Mikroe
bootloader). It has with four Mikroe Click bus interfaces in addition to
standard Arduino connectors. This board features the Microchip
PIC32MZ2048EFH100 MCU running at 200 MHz (252 MHz capable).
boards/mips/pic32mz/chipkit-wifire
Board support for the chipKIT Wi-FIRE board. This board is a chipKIT
Arduino-compatible board. This board features
the Microchip PIC32MZ2048EFG100 MCU running at 200 MHz.
boards/arm/sam34/flipnclick-sam3x
Board support for the Mikroe Flip&Click STM32X board. This board is an
Arduino-Due work-alike with four Mikroe Click bus interfaces. Like the
Arduino DUE, this board features the Atmel ATSAM3X8E MCU running at 84
MHz.
boards/arm/kinetis/freedom-k28f
This port uses the NXP/FreeScale FREEDOM-K28F development board. This
board uses the Kinetis K28F MK28FN2M0VMI15 Cortex-M4 MCU.
boards/arm/kinetis/freedom-k64f
This port uses the NXP/FreeScale FREEDOM-K64F development board. This board
uses the Kinetis K64 MK64FN1M0VLL12 Cortex-M4 MCU.
boards/arm/kl/freedom-kl25z
boards/arm/kl/freedom-kl26z
These configurations are for the NXP/FreeScale Freedom KL25Z and very similar
KL26Z board. The Freedom-KL25Z features the K25Z120LE3AN chip; the
Freedom-KL26Z has the K26Z128VLH4 chip. These are separate configurations
because of minor differences in the on-board logic. Both include a
built-in SDA debugger.
boards/arm/stm32/hymini-stm32v
A configuration for the HY-Mini STM32v board. This board is based on the
STM32F103VCT chip.
boards/arm/kinetis/kwikstik-k40.
Kinetis K40 Cortex-M4 MCU. This port uses the NXP/FreeScale KwikStik-K40
development board.
boards/arm/tms570/launchxl-tms57004
TI Hercules TMS570LS04x/03x LaunchPad Evaluation Kit (LAUNCHXL-TMS57004)
featuring the Hercules TMS570LS0432PZ chip.
boards/arm/lpc17xx_40xx/lincoln60
NuttX port to the Micromint Lincoln 60 board.
boards/arm/tiva/lm3s6432-s2e
Stellaris RDK-S2E Reference Design Kit and the MDL-S2E Ethernet to
Serial module.
boards/arm/tiva/lm3s6965-ek
Stellaris LM3S6965 Evaluation Kit. This board is based on the
an ARM Cortex-M3 MCU, the Luminary/TI LM3S6965. This OS is built with the
arm-nuttx-elf toolchain*. STATUS: This port is complete and mature.
boards/arm/tiva/lm3s8962-ek
Stellaris LMS38962 Evaluation Kit.
boards/arm/tiva/lm4f120-launchpad
This is the port of NuttX to the Stellaris LM4F120 LaunchPad. The
Stellaris LM4F120 LaunchPad Evaluation Board is a low-cost evaluation
platform for ARM Cortex-M4F-based microcontrollers from Texas
Instruments.
boards/arm/lpc17xx_40xx/lpcxpresso-lpc1768
Embedded Artists base board with NXP LPCExpresso LPC1768. This board
is based on the NXP LPC1768. The Code Red toolchain is used by default.
STATUS: Under development.
boards/arm/lpc54xx/lpcxpresso-lpc54628
NXP LPCExpresso LPC54628. This board is based on the NXP LPC54628.
boards/arm/lpc43xx/lpc4330-xplorer
NuttX port to the LPC4330-Xplorer board from NGX Technologies featuring
the NXP LPC4330FET100 MCU
boards/arm/lpc43xx/lpc4337-ws
NuttX port to the WaveShare LPC4337-ws board featuring the NXP LPC4337JBD144
MCU.
boards/arm/lpc43xx/lpc4357-evb
NuttX port to the LPC4357-EVB board from Embest featuring the NXP
LPC4357FET256 MCU. Based on the LPC4300 Xplorer port and provided by
Toby Duckworth.
boards/arm/lpc43xx/lpc4370-link2
NuttX port to the NXP LPC4370-Link2 development board featuring the NXP
LPC4370FET100 MCU. Based on the LPC4300 Xplorer port and provided by
Lok Tep.
boards/arm/lpc17xx_40xx/lx_cpu
This port uses the PiKRON LX_CPU board. See the
http://pikron.com/pages/products/cpu_boards/lx_cpu.html for further
information. This board features the NXP LPC4088 (compatible with
LPC1788) and Xilinx Spartan 6 XC6SLX9
boards/z80/ez80/makerlisp
This port use the MakerLisp machine based on an eZ80F091 ez80Acclaim!
Microcontroller, and the Zilog ZDS-II Windows command line tools. The
development environment is Cygwin under Windows. A Windows native
development environment is available but has not been verified.
boards/arm/stm32/maple
NuttX support for the LeafLab's Maple and Maple Mini boards. These boards
are based on the STM32F103RBT6 chip for the standard version and on the
STM32F103CBT6 for the mini version (See http://leaflabs.com/docs/hardware/maple.html)
boards/arm/max326xx/max32660-evsys
The configurations in this directory support the Maxim Integrated
MAX32660-EVSYS board.
boards/arm/lpc17xx_40xx/mbed
The configurations in this directory support the mbed board (http://mbed.org)
that features the NXP LPC1768 microcontroller. This OS is also built
with the arm-nuttx-elf toolchain*. STATUS: Contributed.
boards/arm/lpc17xx_40xx/mcb1700
Board support for the Keil MCB1700
boards/arm/samd5e5/metro-m4
Th configurations in this directory are part of the port of NuttX to the
Adafruit Metro M4. The Metro M4 uses a Arduino form factor and and pinout.
It's powered with an ATSAMD51J19
boards/arm/stm32/mikroe-stm32f4
This is the port of NuttX to the MikroElektronika Mikromedia for STM32F4
development board. Contributed by Ken Petit.
boards/misoc/lm32/misoc
This directory holds the port to NuttX running on a Qemu LM32 system.
You can find the Qemu setup at https://bitbucket.org/key2/qemu
boards/arm/lpc214x/mcu123-lpc214x
This port is for the NXP LPC2148 as provided on the mcu123.com
lpc214x development board. This OS is also built with the arm-nuttx-elf
toolchain*. The port supports serial, timer0, spi, and usb.
boards/avr/at90usb/micropendous3
This is a port to the Opendous Micropendous 3 board. This board may
be populated with either an AVR AT90USB646, 647, 1286, or 1287 MCU.
Support is configured for the AT90USB647.
boards/mips/pic32mx/mirtoo
This is the port to the DTX1-4000L "Mirtoo" module. This module uses MicroChip
PIC32MX250F128D. See http://www.dimitech.com/ for further information.
boards/avr/atmega/moteino-mega
This is placeholder for the LowPowerLab MoteinoMEGA that is based
on the Atmel AVR ATMega1284P MCU. There is not much there yet and what is
there is untested due to tool-related issues.
boards/arm/moxart/moxa
Moxa NP51x0 series of 2-port advanced RS-232/422/485 serial device servers.
boards/hc/mcs92s12ne6/ne64badge
Future Electronics Group NE64 /PoE Badge board based on the
MC9S12NE64 hcs12 cpu. This port uses the m9s12x GCC toolchain.
STATUS: Under development. The port is code-complete but has
not yet been fully tested.
boards/arm/nrf52/nrf52-feather
NuttX port to the Adafruit nRF52832 Feather board
boards/arm/nrf52/nrf52832-dk
NuttX port to the Nordic nRF52832 Development Kit (PCA10040)
boards/arm/nrf52/nrf52840-dk
NuttX port to the Nordic nRF52840 Development Kit (PCA10056)
boards/arm/nrf52/nrf52840-dongle
NuttX port to the Nordic nRF52840 Dongle (PCA10059)
boards/arm/dm320/ntosd-dm320
This port uses the Neuros OSD v1.0 Dev Board with a GNU arm-nuttx-elf
toolchain*: see
http://wiki.neurostechnology.com/index.php/OSD_1.0_Developer_Home
There are some differences between the Dev Board and the currently
available commercial v1.0 Boards. See
http://wiki.neurostechnology.com/index.php/OSD_Developer_Board_v1
NuttX operates on the ARM9EJS of this dual core processor.
STATUS: This port is code complete, verified, and included in the
NuttX 0.2.1 release.
boards/arm/stm32f7/nucleo-144
STMicro Nucleo-144 development board family. Included support for (1) the
Nucleo-F767ZG board featuring the STM32F746ZGT6U MCU. The STM32F746ZGT6U
is a 216MHz Cortex-M7 operation with 1024Kb Flash memory and 320Kb SRAM.
And (2) the Nucleo-F746ZG board featuring the STM32F767ZIT6 MCU. The
STM32F767ZIT6 is a 216MHz Cortex-M7 operation with 2048Kb Flash memory
and 512Kb SRAM.
boards/arm/stm32f0l0g0/nucleo-f072rb
STMicro Nucleo F072RB board based on the STMicro STM32F072RBT6 MCU.
boards/arm/stm32/nucleo-f4x1re
STMicro ST Nucleo F401RE and F411RE boards. See
http://mbed.org/platforms/ST-Nucleo-F401RE and
http://developer.mbed.org/platforms/ST-Nucleo-F411RE for more
information about these boards.
boards/arm/stm32/nucleo-f410rb
NuttX configuration for the STMicro NucleoF410RB board from ST Micro.
This board features the STM32F410RB 100MHz Cortex-M4 with 128 KB Flash
and 32 KB SRAM.
boards/arm/stm32/nucleo-f303re
STMicro ST Nucleo F303RE board. Contributed by Paul Alexander Patience.
boards/arm/stm32f0l0g0/nucleo-l073rz
STMicro STM32L0 Discovery kit with LoRa/SigFox based on STM32L072CZ MCU.
boards/arm/nuc1xx/nutiny-nuc120
This is the port of NuttX to the NuvoTon NuTiny-SDK-NUC120 board. This
board has the NUC120LE3AN chip with a built-in NuLink debugger.
boards/arm/efm32/olimex-efm32g880f128-stk
This is the port of NuttX to the Olimex EFM32G880F128-STK development
board.
boards/arm/lpc17xx_40xx/olimex-lpc1766stk
This port uses the Olimex LPC1766-STK board and a GNU GCC toolchain* under
Linux or Cygwin. STATUS: Complete and mature.
boards/arm/lpc2378/olimex-lpc2378
This port uses the Olimex-lpc2378 board and a GNU arm-nuttx-elf toolchain* under
Linux or Cygwin. STATUS: ostest and NSH configurations available.
This port for the NXP LPC2378 was contributed by Rommel Marcelo.
boards/arm/stm32/olimex-stm32-h405
This port uses the Olimex STM32 H405 board and a GNU arm-nuttx-elf
toolchain* under Linux or Cygwin. See the http://www.olimex.com for
further information. This board features the STMicro STM32F405RGT6 MCU.
Contributed by Martin Lederhilger.
boards/arm/stm32/olimex-stm32-h407
This port uses the Olimex STM32 H407 board and a GNU arm-nuttx-elf
toolchain* under Linux or Cygwin. See the http://www.olimex.com for
further information. This board features the STMicro STM32F407ZGT6 (144
pins). Contributed by Neil Hancock.
boards/arm/stm32/olimex-stm32-e407
Olimex STM32 E407 board based on the STMicro STM32F407ZGT6 (144pins).
Contributed by Mateusz Szafoni.
boards/arm/stm32/olimex-stm32-p107
This port uses the Olimex STM32-P107 board (STM32F107VC) and a GNU arm-nuttx-elf
toolchain* under Linux or Cygwin. See the https://www.olimex.com/dev/stm32-p107.html
for further information. Contributed by Max Holtzberg.
boards/arm/stm32/olimex-stm32-p207
This port uses the Olimex STM32-P207 board (STM32F207ZE) and a GNU arm-nuttx-elf
toolchain under Linux or Cygwin. See the https://www.olimex.com/dev/stm32-p207.html
for further information. Contributed by Martin Lederhilger.
boards/arm/stm32/olimex-stm32-p407
This port uses the Olimex STM32-P407 board (STM32F407ZG) and a GNU arm-nuttx-elf
toolchain under Linux or Cygwin. See the https://www.olimex.com/dev/stm32-p407.html
for further information.
boards/arm/stm32/olimexino-stm32
This port uses the Olimexino STM32 board (STM32F103RBT6) and a GNU arm-nuttx-elf
toolchain* under Linux or Cygwin. See the http://www.olimex.com for further\
information. Contributed by David Sidrane.
boards/arm/str71x/olimex-strp711
This port uses the Olimex STR-P711 board and a GNU arm-nuttx-elf toolchain* under
Linux or Cygwin. See the http://www.olimex.com/dev/str-p711.html" for
further information. STATUS: Configurations for the basic OS test and NSH
are complete and verified.
boards/arm/stm32/omnibusf4
Flight controllers compatible with the OMINBUSF4 Betaflight target
boards/or1k/mor1kx/or1k
Generic OpenRISC board.
boards/arm/a1x/pcduino-a10
This directory contains the port of NuttX to the pcDuino v1 board
See http://www.pcduino.com/ for information about pcDuino Lite, v1,
and v2. These boards are based around the Allwinner A10 Cortex-A8 CPU.
I have not compared these boards in detail, but I believe that the
differences are cosmetic. This port was developed on the v1 board, but
the others may be compatible.
boards/z80/z180/p112
The P112 is notable because it was the first of the hobbyist single board
computers to reach the production stage. The P112 hobbyist computers
were relatively widespread and inspired other hobbyist centered home brew
computing projects such as N8VEM home brew computing project. The P112
project still maintains many devoted enthusiasts and has an online
repository of software and other information.
The P112 computer originated as a commercial product of "D-X Designs Pty
Ltd" of Australia. They describe the computer as "The P112 is a stand-alone
8-bit CPU board. Typically running CP/M (tm) or a similar operating system,
it provides a Z80182 (Z-80 upgrade) CPU with up to 1MB of memory, serial,
parallel and diskette IO, and realtime clock, in a 3.5-inch drive form factor.
Powered solely from 5V, it draws 150mA (nominal: not including disk drives)
with a 16MHz CPU clock. Clock speeds up to 24.576MHz are possible."
The P112 board was last available new in 1996 by Dave Brooks. In late 2004
on the Usenet Newsgroup comp.os.cpm, talk about making another run of P112
boards was discussed. David Griffith decided to produce additional P112 kits
with Dave Brooks blessing and the assistance of others. In addition Terry
Gulczynski makes additional P112 derivative hobbyist home brew computers.
Hal Bower was very active in the mid 1990's on the P112 project and ported
the "Banked/Portable BIOS".
Dave Brooks was successfully funded through Kickstarter for and another
run of P112 boards in November of 2012.
boards/arm/stm32/photon
A configuration for the Photon Wifi board from Particle Devices
(https://www.particle.io). This board features the STM32F205RGY6 MCU from
STMicro.
boards/mips/pic32mx/pic32mx-starterkit
This directory contains the port of NuttX to the Microchip PIC32 Ethernet
Starter Kit (DM320004) with the Multimedia Expansion Board (MEB, DM320005).
See www.microchip.com for further information.
boards/mips/pic32mx/pic32mx7mmb
This directory will (eventually) contain the port of NuttX to the
Mikroelektronika PIC32MX7 Multimedia Board (MMB). See
http://www.mikroe.com/ for further information.
boards/mips/pic32mz/pic32mz-starterkit
This directory contains the port of NuttX to the Microchip PIC32MZ
Embedded Connectivity (EC) Starter Kit. There are two configurations of
the starter kit:
1) The PIC32MZ Embedded Connectivity Starter Kit based on the
PIC32MZ2048ECH144-I/PH chip (DM320006), and
2) The PIC32MZ Embedded Connectivity Starter Kit based on the
PIC32MZ2048ECM144-I/PH w/Crypto Engine (DM320006-C)
See www.microchip.com for further information.
boards/arm/lpc17xx_40xx/pnev5180b
NXP Semiconductors' PN5180 NFC Frontend Development Kit. This board is
based on the NXP LPC1769 MCU.
boards/x86/qemu/qemu-i486
Port of NuttX to QEMU in i486 mode. This port will also run on real i486
hardware (Google the Bifferboard).
boards/arm/s32k1xx/s32k118evb
This directory holds the port of NuttX to the NXP S32K118EVB board
featuring the S32K118 Cortex-M0+.
boards/arm/s32k1xx/s32k146evb
This directory holds the port of NuttX to the NXP S32K146EVB board
featuring the S32K146 Cortex-M4F.
boards/arm/s32k1xx/s32k148evb
This directory holds the port of NuttX to the NXP S32K148EVB board
featuring the S32K148 Cortex-M4F.
boards/arm/imx6/sabre-6quad
This directory holds a port of NuttX to the NXP/Freescale Sabre board
featuring the iMX 6Quad CPU.
boards/arm/sama5/sama5d2-xult
This is the port of NuttX to the Microchip SAMA5D2-Xplained Ultra development
board. This board features the Microchip SAMA5D27. See
https://www.microchip.com/Developmenttools/ProductDetails/ATSAMA5D2C-XULT
boards/arm/sama5/giant-board
This is the port of NuttX to the Groboards Giant Board board. This board
features the Atmel SAMA5D27C-D1G. See http://groboards.com/giant-board.
boards/arm/sama5/sama5d3x-ek
This is the port of NuttX to the Atmel SAMA5D3x-EK development boards
(where x=1,3,4, or 5). These boards feature the Atmel SAMA5D3
microprocessors. Four different SAMA5D3x-EK kits are available
- SAMA5D31-EK with the ATSAMA5D1 (http://www.atmel.com/devices/sama5d31.aspx)
- SAMA5D33-EK with the ATSAMA5D3 (http://www.atmel.com/devices/sama5d33.aspx)
- SAMA5D34-EK with the ATSAMA5D4 (http://www.atmel.com/devices/sama5d34.aspx)
- SAMA5D35-EK with the ATSAMA5D5 (http://www.atmel.com/devices/sama5d35.aspx)
The each consist of an identical base board with different plug-in modules
for each CPU. An option 7 inch LCD is also available. All four boards
are supported by NuttX with a simple reconfiguration of the processor
type.
boards/arm/sama5/sama5d3-xplained
This is the port of NuttX to the Atmel SAMA5D3x-Xplained development board.
This board features the Atmel SAMA5D36. See
http://www.atmel.com/devices/sama5d36.aspx.
boards/arm/sama5/sama5d4-ek
This is the port of NuttX to the Atmel SAMA5D4-EK development board.
This board features the Atmel SAMA5D44. See http://www.atmel.com.
boards/arm/samd2l2/samd20-xplained
The port of NuttX to the Atmel SAMD20-Xplained Pro development board. This
board features the ATSAMD20J18A MCU (Cortex-M0+ with 256KB of FLASH and
32KB of SRAM).
boards/arm/samd2l2/samd21-xplained
The port of NuttX to the Atmel SAMD21-Xplained Pro development board. This
board features the ATSAMD21J18A MCU (Cortex-M0+ with 256KB of FLASH and
32KB of SRAM).
boards/arm/sam34/sam3u-ek
The port of NuttX to the Atmel SAM3U-EK development board.
boards/arm/sam34/sam4cmp-db
The port of NuttX to the Atmel SAM4CMP-DB development board.
boards/arm/sam34/sam4e-ek
The port of NuttX to the Atmel SAM4E-EK development board. This board
features the SAM4E16 MCU running at up to 120MHz.
boards/arm/sam34/sam4l-xplained
The port of NuttX to the Atmel SAM4L-Xplained development board.
boards/arm/sam34/sam4s-xplained
The port of NuttX to the Atmel SAM4S-Xplained development board.
boards/arm/sam34/sam4s-xplained-pro
The port of NuttX to the Atmel SAM4S-Xplained Pro development board.
boards/arm/samv7/same70-xplained
The port of NuttX to the Atmel SAME70 Xplained evaluation board.
boards/arm/samv7/samv71-xult
The port of NuttX to the Atmel SAMV71 Xplained Ultra evaluation board.
boards/sim/sim/sim
A user-mode port of NuttX to the x86 Linux platform is available.
The purpose of this port is primarily to support OS feature development.
This port does not support interrupts or a real timer (and hence no
round robin scheduler) Otherwise, it is complete.
boards/arm/stm32/shenzhou
This is the port of NuttX to the Shenzhou development board from
www.armjishu.com. This board features the STMicro STM32F107VCT MCU.
boards/renesas/m16c/skp16c26
Renesas M16C processor on the Renesas SKP16C26 StarterKit. This port
uses the GNU m32c toolchain. STATUS: The port is complete but untested
due to issues with compiler internal errors.
boards/arm/stm32/stm3210e-eval
STMicro STM3210E-EVAL development board based on the STMicro STM32F103ZET6
microcontroller (ARM Cortex-M3). This port uses the GNU Cortex-M3
toolchain.
boards/arm/stm32/stm3220g-eval
STMicro STM3220G-EVAL development board based on the STMicro STM32F407IG
microcontroller (ARM Cortex-M3).
boards/arm/stm32/stm3240g-eval
STMicro STM3240G-EVAL development board based on the STMicro STM32F103ZET6
microcontroller (ARM Cortex-M4 with FPU). This port uses a GNU Cortex-M4
toolchain (such as CodeSourcery).
boards/arm/stm32/stm32butterfly2
Kamami stm32butterfly2 development board with optional ETH phy. See
https://kamami.pl/zestawy-uruchomieniowe-stm32/178507-stm32butterfly2.html
boards/arm/stm32/stm32f051-discovery
STMicro STM32F051-Discovery board based on the STMicro ARCH_CHIP_STM32F051R8
MCU.
boards/arm/stm32/stm32f072-discovery
STMicro STM32F072-Discovery board based on the STMicro ARCH_CHIP_STM32F072RB
MCU.
boards/arm/stm32/stm32f103-minimum
Generic STM32F103C8T6 Minimum ARM Development Board.
boards/arm/stm32/stm32f4discovery
STMicro STM32F4-Discovery board based on the STMicro STM32F407VGT6 MCU.
boards/arm/stm32/aiit-arm32-board
STMicro STM32F4-AIIT board based on the STMicro STM32F407VGT6 MCU.
boards/arm/stm32/stm32f411e-disco
This is a minimal configuration that supports low-level test of the
STMicro STM32F411E-Discovery Board.
boards/arm/stm32/stm32f429i-disco
STMicro STM32F429I-Discovery board based on the STMicro STM32F429ZIT6 MCU.
boards/arm/stm32f7/stm32f746g-disco
STMicro STM32F746G-DISCO development board featuring the STM32F746NGH6
MCU. The STM32F746NGH6 is a 216MHz Cortex-M7 operation with 1024Kb Flash
memory and 300Kb SRAM.
boards/arm/stm32f7/stm32f746g-ws
Waveshare STM32F746 development board featuring the STM32F746IG MCU.
boards/arm/stm32l4/stm32l476-mdk
Motorola Mods Development Board (MDK) features STM32L476ME MCU.
The STM32L476ME is a Cortex-M4 optimised for low-power operation
at up to 80MHz operation with 1024Kb Flash memory and 96+32Kb SRAM.
boards/arm/stm32f7/stm32f769i-disco
NuttX configurations for the STMicro STM32F769I-DISCO development board
featuring the STM32F769NIH6 MCU. The STM32F769NIH6 is a 216MHz Cortex-M7
operating with 2048K Flash memory and 512Kb SRAM.
boards/arm/stm32l4/stm32l476vg-disco
STMicro STM32L476VG_DISCO development board featuring the STM32L476VG
MCU. The STM32L476VG is a Cortex-M4 optimised for low-power operation
at up to 80MHz operation with 1024Kb Flash memory and 96+32Kb SRAM.
boards/arm/stm32/stm32ldiscovery
STMicro STM32L-Discovery board based on the STMicro STM32L152RB MCU.
boards/arm/stm32/stm32vldiscovery
STMicro STM32VL-Discovery board based on the STMicro STM32F100RB MCU.
boards/mips/pic32mx/sure-pic32mx
The "Advanced USB Storage Demo Board," Model DB-DP11215, from Sure
Electronics (http://www.sureelectronics.net/). This board features
the MicroChip PIC32MX440F512H. See also
http://www.sureelectronics.net/goods.php?id=1168 for further
information about the Sure DB-DP11215 board.
boards/avr/at90usb/teensy-2.0
This is the port of NuttX to the PJRC Teensy++ 2.0 board. This board is
developed by http://pjrc.com/teensy/. The Teensy++ 2.0 is based
on an Atmel AT90USB1286 MCU.
boards/arm/kinetis/teensy-3.x
This is the port of NuttX to the Teensy-3.1 from PJRC
(https://www.pjrc.com/). The Teensy-3.1 features the Freescale
MK30DX256VLH7 chip (now NXP). The MK30DX256VLH7 is a 64-pin Cortex-M4
running at 72MHz. It has 256KiB of program FLASH memory and 64KiB of
SRAM. For more information about the Teensy 3.1, see
https://www.pjrc.com/teensy/teensy31.html
https://www.pjrc.com/store/teensy31.html
This board configuration can also be used with the older Teensy-3.0. The
Teensy-3.0 has the same schematic (although some pins are not used on the
Teensy-3.0). the primary difference is that the Teensy 3.0 has a
MK30DX128VLH5 with slightly less capability.
boards/arm/imxrt/teensy-4.x
This is the port of NuttX to the PJRC Teensy++ 4.x board. This board is
developed by http://pjrc.com/teensy/. The Teensy++ 4.x is based
on an NXP MIMXRT1062DVL6A MCU. The port can support both Teensy 4.0 and
Teensy 4.1 boards.
https://www.pjrc.com/store/teensy40.html
https://www.pjrc.com/store/teensy41.html
boards/arm/kl/teensy-lc
This is the port of nuttx for the Teensy LC board. The Teensy LC
is a DIP style breakout board for the MKL25Z64 and comes with a USB
based bootloader.
boards/arm/tiva/tm4c123g-launchpad
This is the port of NuttX to the Tiva TM4C123G LaunchPad. The
Tiva TM4C123G LaunchPad Evaluation Board is a low-cost evaluation
platform for ARM Cortex-M4F-based microcontrollers from Texas
Instruments.
boards/arm/tiva/tm4c1294-launchpad
This is the port of NuttX to the Tiva TM4C1294 LaunchPad. The
Tiva TM4C123G LaunchPad Evaluation Board is a low-cost evaluation
platform for ARM Cortex-M4F-based microcontrollers from Texas
Instruments.
boards/arm/tmx570/tms570ls31x-usb-kit
TI Hercules TMS570LS31xx Evaluation Kit (TMDS570ls31xx USB Kit)
featuring the Hercules TMS570LS3137ZWT chip.
boards/arm/kinetis/twr-k60n512
Kinetis K60 Cortex-M4 MCU. This port uses the FreeScale TWR-K60N512
development board.
boards/arm/kinetis/twr-k64f120m
Kinetis K64 Cortex-M4 MCU. This port uses the FreeScale TWR-K64F120M
development board.
boards/mips/pic32mx/ubw32
This is the port to the Sparkfun UBW32 board. This port uses the original v2.4
board which is based on the MicroChip PIC32MX460F512L. See
http://www.sparkfun.com/products/8971. This older version has been replaced
with this board http://www.sparkfun.com/products/9713. See also
http://www.schmalzhaus.com/UBW32/.
boards/renesas/sh1/us7032evb1
This is a port of the Hitachi SH-1 on the Hitachi SH-1/US7032EVB1 board.
STATUS: Work has just began on this port.
boards/arm/stm32/viewtool-stm32f107
NuttX configurations for the ViewTool STM32F103/F107 V1.2 board. This
board may be fitted with either: (1) STM32F107VCT6 or (2) STM32F103VCT6.
See http://www.viewtool.com/ for further information.
config/xmc4500-relax
Infineon XMC4500 Relax Lite v1
config/xmc4700-relax
Infineon XMC4700 Relax
boards/z16/z16f/z16f2800100zcog
z16f Microcontroller. This port use the Zilog z16f2800100zcog
development kit and the Zilog ZDS-II Windows command line tools. The
development environment is Cygwin under WinXP.
boards/z80/ez80/z20x
Microcontroller. This directory holds the port of NuttX to the z80x board
based on an ez80Acclaim! eZ80F091 microcontroller.
boards/z80/z80/z80sim
z80 Microcontroller. This port uses a Z80 instruction set simulator
called z80sim. This port also uses the SDCC toolchain
(http://sdcc.sourceforge.net/") (verified with version 2.6.0).
boards/z80/z8/z8encore000zco
z8Encore! Microcontroller. This port use the Zilog z8encore000zco
development kit, Z8F6403 part, and the Zilog ZDS-II Windows command line
tools. The development environment is Cygwin under WinXP.
boards/z80/z8/z8f64200100kit
z8Encore! Microcontroller. This port use the Zilog z8f64200100kit
development kit, Z8F6423 part, and the Zilog ZDS-II Windows command line
tools. The development environment is Cygwin under WinXP.
boards/arm/lpc214x/zp214xpa
This port is for the NXP LPC2148 as provided on the The0.net
ZPA213X/4XPA development board. Includes support for the
UG-2864AMBAG01 OLED also from The0.net
boards/arm/lpc17xx_40xx/zkit-arm-1769
Zilogic System's ARM development Kit, ZKIT-ARM-1769. This board is based
on the NXP LPC1769. The NuttX Buildroot toolchain is used by default.
Configuring NuttX
^^^^^^^^^^^^^^^^^
Configuring NuttX requires only copying
boards/<arch>/<chip>/<board>/<config-dir>/Make.def to ${TOPDIR}/Make.defs
boards/<arch>/<chip>/<board>/<config-dir>/defconfig to ${TOPDIR}/.config
tools/configure.sh
There is a script that automates these steps. The following steps will
accomplish the same configuration:
tools/configure.sh <board>:<config-dir>
There is an alternative Windows batch file that can be used in the
windows native environment like:
tools\configure.bat <board>:<config-dir>
See tools/README.txt for more information about these scripts.
And if your application directory is not in the standard location (../apps
or ../apps-<version>), then you should also specify the location of the
application directory on the command line like:
cd tools
./configure.sh -a <app-dir> <board>:<config-dir>
Building Symbol Tables
^^^^^^^^^^^^^^^^^^^^^^
Symbol tables are needed at several of the binfmt interfaces in order to bind
a module to the base code. These symbol tables can be tricky to create and
will probably have to be tailored for any specific application, balancing
the number of symbols and the size of the symbol table against the symbols
required by the applications.
The top-level System.map file is one good source of symbol information
(which, or course, was just generated from the top-level nuttx file
using the GNU 'nm' tool).
There are also common-separated value (CSV) values in the source try that
provide information about symbols. In particular:
nuttx/syscall/syscall.csv - Describes the NuttX RTOS interface, and
nuttx/lib/libc.csv - Describes the NuttX C library interface.
There is a tool at nuttx/tools/mksymtab that will use these CSV files as
input to generate a generic symbol table. See nuttx/tools/README.txt for
more information about using the mksymtab tool.

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